2 * Support for NXT2002 and NXT2004 - VSB/QAM
4 * Copyright (C) 2005 Kirk Lapray <kirk.lapray@gmail.com>
5 * Copyright (C) 2006 Michael Krufky <mkrufky@m1k.net>
6 * based on nxt2002 by Taylor Jacob <rtjacob@earthlink.net>
7 * and nxt2004 by Jean-Francois Thibert <jeanfrancois@sagetv.com>
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
26 * NOTES ABOUT THIS DRIVER
28 * This Linux driver supports:
29 * B2C2/BBTI Technisat Air2PC - ATSC (NXT2002)
30 * AverTVHD MCE A180 (NXT2004)
31 * ATI HDTV Wonder (NXT2004)
33 * This driver needs external firmware. Please use the command
34 * "<kerneldir>/Documentation/dvb/get_dvb_firmware nxt2002" or
35 * "<kerneldir>/Documentation/dvb/get_dvb_firmware nxt2004" to
36 * download/extract the appropriate firmware, and then copy it to
37 * /usr/lib/hotplug/firmware/ or /lib/firmware/
38 * (depending on configuration of firmware hotplug).
40 #define NXT2002_DEFAULT_FIRMWARE "dvb-fe-nxt2002.fw"
41 #define NXT2004_DEFAULT_FIRMWARE "dvb-fe-nxt2004.fw"
42 #define CRC_CCIT_MASK 0x1021
44 #include <linux/kernel.h>
45 #include <linux/init.h>
46 #include <linux/module.h>
47 #include <linux/moduleparam.h>
48 #include <linux/slab.h>
49 #include <linux/string.h>
51 #include "dvb_frontend.h"
55 struct nxt200x_state {
57 struct i2c_adapter* i2c;
58 struct dvb_frontend_ops ops;
59 const struct nxt200x_config* config;
60 struct dvb_frontend frontend;
62 /* demodulator private data */
63 nxt_chip_type demod_chip;
68 #define dprintk(args...) \
70 if (debug) printk(KERN_DEBUG "nxt200x: " args); \
73 static int i2c_writebytes (struct nxt200x_state* state, u8 addr, u8 *buf, u8 len)
76 struct i2c_msg msg = { .addr = addr, .flags = 0, .buf = buf, .len = len };
78 if ((err = i2c_transfer (state->i2c, &msg, 1)) != 1) {
79 printk (KERN_WARNING "nxt200x: %s: i2c write error (addr 0x%02x, err == %i)\n",
80 __FUNCTION__, addr, err);
86 static u8 i2c_readbytes (struct nxt200x_state* state, u8 addr, u8* buf, u8 len)
89 struct i2c_msg msg = { .addr = addr, .flags = I2C_M_RD, .buf = buf, .len = len };
91 if ((err = i2c_transfer (state->i2c, &msg, 1)) != 1) {
92 printk (KERN_WARNING "nxt200x: %s: i2c read error (addr 0x%02x, err == %i)\n",
93 __FUNCTION__, addr, err);
99 static int nxt200x_writebytes (struct nxt200x_state* state, u8 reg, u8 *buf, u8 len)
103 struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = buf2, .len = len + 1 };
106 memcpy(&buf2[1], buf, len);
108 if ((err = i2c_transfer (state->i2c, &msg, 1)) != 1) {
109 printk (KERN_WARNING "nxt200x: %s: i2c write error (addr 0x%02x, err == %i)\n",
110 __FUNCTION__, state->config->demod_address, err);
116 static u8 nxt200x_readbytes (struct nxt200x_state* state, u8 reg, u8* buf, u8 len)
118 u8 reg2 [] = { reg };
120 struct i2c_msg msg [] = { { .addr = state->config->demod_address, .flags = 0, .buf = reg2, .len = 1 },
121 { .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = buf, .len = len } };
125 if ((err = i2c_transfer (state->i2c, msg, 2)) != 2) {
126 printk (KERN_WARNING "nxt200x: %s: i2c read error (addr 0x%02x, err == %i)\n",
127 __FUNCTION__, state->config->demod_address, err);
133 static u16 nxt200x_crc(u16 crc, u8 c)
136 u16 input = (u16) c & 0xFF;
140 if((crc^input) & 0x8000)
141 crc=(crc<<1)^CRC_CCIT_MASK;
149 static int nxt200x_writereg_multibyte (struct nxt200x_state* state, u8 reg, u8* data, u8 len)
152 dprintk("%s\n", __FUNCTION__);
154 /* set mutli register register */
155 nxt200x_writebytes(state, 0x35, ®, 1);
157 /* send the actual data */
158 nxt200x_writebytes(state, 0x36, data, len);
160 switch (state->demod_chip) {
166 /* probably not right, but gives correct values */
174 len2 = ((attr << 4) | 0x10) | len;
182 /* set multi register length */
183 nxt200x_writebytes(state, 0x34, &len2, 1);
185 /* toggle the multireg write bit */
186 nxt200x_writebytes(state, 0x21, &buf, 1);
188 nxt200x_readbytes(state, 0x21, &buf, 1);
190 switch (state->demod_chip) {
192 if ((buf & 0x02) == 0)
204 printk(KERN_WARNING "nxt200x: Error writing multireg register 0x%02X\n",reg);
209 static int nxt200x_readreg_multibyte (struct nxt200x_state* state, u8 reg, u8* data, u8 len)
213 dprintk("%s\n", __FUNCTION__);
215 /* set mutli register register */
216 nxt200x_writebytes(state, 0x35, ®, 1);
218 switch (state->demod_chip) {
220 /* set multi register length */
222 nxt200x_writebytes(state, 0x34, &len2, 1);
224 /* read the actual data */
225 nxt200x_readbytes(state, reg, data, len);
229 /* probably not right, but gives correct values */
237 /* set multi register length */
238 len2 = (attr << 4) | len;
239 nxt200x_writebytes(state, 0x34, &len2, 1);
241 /* toggle the multireg bit*/
243 nxt200x_writebytes(state, 0x21, &buf, 1);
245 /* read the actual data */
246 for(i = 0; i < len; i++) {
247 nxt200x_readbytes(state, 0x36 + i, &data[i], 1);
257 static void nxt200x_microcontroller_stop (struct nxt200x_state* state)
259 u8 buf, stopval, counter = 0;
260 dprintk("%s\n", __FUNCTION__);
262 /* set correct stop value */
263 switch (state->demod_chip) {
276 nxt200x_writebytes(state, 0x22, &buf, 1);
278 while (counter < 20) {
279 nxt200x_readbytes(state, 0x31, &buf, 1);
286 printk(KERN_WARNING "nxt200x: Timeout waiting for nxt200x to stop. This is ok after firmware upload.\n");
290 static void nxt200x_microcontroller_start (struct nxt200x_state* state)
293 dprintk("%s\n", __FUNCTION__);
296 nxt200x_writebytes(state, 0x22, &buf, 1);
299 static void nxt2004_microcontroller_init (struct nxt200x_state* state)
303 dprintk("%s\n", __FUNCTION__);
306 nxt200x_writebytes(state, 0x2b, buf, 1);
308 nxt200x_writebytes(state, 0x34, buf, 1);
310 nxt200x_writebytes(state, 0x35, buf, 1);
311 buf[0] = 0x01; buf[1] = 0x23; buf[2] = 0x45; buf[3] = 0x67; buf[4] = 0x89;
312 buf[5] = 0xAB; buf[6] = 0xCD; buf[7] = 0xEF; buf[8] = 0xC0;
313 nxt200x_writebytes(state, 0x36, buf, 9);
315 nxt200x_writebytes(state, 0x21, buf, 1);
317 while (counter < 20) {
318 nxt200x_readbytes(state, 0x21, buf, 1);
325 printk(KERN_WARNING "nxt200x: Timeout waiting for nxt2004 to init.\n");
330 static int nxt200x_writetuner (struct nxt200x_state* state, u8* data)
334 dprintk("%s\n", __FUNCTION__);
336 dprintk("Tuner Bytes: %02X %02X %02X %02X\n", data[1], data[2], data[3], data[4]);
338 /* if NXT2004, write directly to tuner. if NXT2002, write through NXT chip.
339 * direct write is required for Philips TUV1236D and ALPS TDHU2 */
340 switch (state->demod_chip) {
342 if (i2c_writebytes(state, data[0], data+1, 4))
343 printk(KERN_WARNING "nxt200x: error writing to tuner\n");
344 /* wait until we have a lock */
346 i2c_readbytes(state, data[0], &buf, 1);
352 printk("nxt2004: timeout waiting for tuner lock\n");
355 /* set the i2c transfer speed to the tuner */
357 nxt200x_writebytes(state, 0x20, &buf, 1);
359 /* setup to transfer 4 bytes via i2c */
361 nxt200x_writebytes(state, 0x34, &buf, 1);
363 /* write actual tuner bytes */
364 nxt200x_writebytes(state, 0x36, data+1, 4);
366 /* set tuner i2c address */
368 nxt200x_writebytes(state, 0x35, &buf, 1);
370 /* write UC Opmode to begin transfer */
372 nxt200x_writebytes(state, 0x21, &buf, 1);
375 nxt200x_readbytes(state, 0x21, &buf, 1);
376 if ((buf & 0x80)== 0x00)
381 printk("nxt2002: timeout error writing tuner\n");
390 static void nxt200x_agc_reset(struct nxt200x_state* state)
393 dprintk("%s\n", __FUNCTION__);
395 switch (state->demod_chip) {
398 nxt200x_writebytes(state, 0x08, &buf, 1);
400 nxt200x_writebytes(state, 0x08, &buf, 1);
403 nxt200x_readreg_multibyte(state, 0x08, &buf, 1);
405 nxt200x_writereg_multibyte(state, 0x08, &buf, 1);
407 nxt200x_writereg_multibyte(state, 0x08, &buf, 1);
415 static int nxt2002_load_firmware (struct dvb_frontend* fe, const struct firmware *fw)
418 struct nxt200x_state* state = fe->demodulator_priv;
419 u8 buf[3], written = 0, chunkpos = 0;
420 u16 rambase, position, crc = 0;
422 dprintk("%s\n", __FUNCTION__);
423 dprintk("Firmware is %zu bytes\n", fw->size);
425 /* Get the RAM base for this nxt2002 */
426 nxt200x_readbytes(state, 0x10, buf, 1);
433 dprintk("rambase on this nxt2002 is %04X\n", rambase);
435 /* Hold the micro in reset while loading firmware */
437 nxt200x_writebytes(state, 0x2B, buf, 1);
439 for (position = 0; position < fw->size; position++) {
443 buf[0] = ((rambase + position) >> 8);
444 buf[1] = (rambase + position) & 0xFF;
446 /* write starting address */
447 nxt200x_writebytes(state, 0x29, buf, 3);
452 if ((written % 4) == 0)
453 nxt200x_writebytes(state, chunkpos, &fw->data[position-3], 4);
455 crc = nxt200x_crc(crc, fw->data[position]);
457 if ((written == 255) || (position+1 == fw->size)) {
458 /* write remaining bytes of firmware */
459 nxt200x_writebytes(state, chunkpos+4-(written %4),
460 &fw->data[position-(written %4) + 1],
466 nxt200x_writebytes(state, 0x2C, buf, 2);
468 /* do a read to stop things */
469 nxt200x_readbytes(state, 0x2A, buf, 1);
471 /* set transfer mode to complete */
473 nxt200x_writebytes(state, 0x2B, buf, 1);
482 static int nxt2004_load_firmware (struct dvb_frontend* fe, const struct firmware *fw)
485 struct nxt200x_state* state = fe->demodulator_priv;
487 u16 rambase, position, crc=0;
489 dprintk("%s\n", __FUNCTION__);
490 dprintk("Firmware is %zu bytes\n", fw->size);
495 /* hold the micro in reset while loading firmware */
497 nxt200x_writebytes(state, 0x2B, buf,1);
499 /* calculate firmware CRC */
500 for (position = 0; position < fw->size; position++) {
501 crc = nxt200x_crc(crc, fw->data[position]);
504 buf[0] = rambase >> 8;
505 buf[1] = rambase & 0xFF;
507 /* write starting address */
508 nxt200x_writebytes(state,0x29,buf,3);
510 for (position = 0; position < fw->size;) {
511 nxt200x_writebytes(state, 0x2C, &fw->data[position],
512 fw->size-position > 255 ? 255 : fw->size-position);
513 position += (fw->size-position > 255 ? 255 : fw->size-position);
518 dprintk("firmware crc is 0x%02X 0x%02X\n", buf[0], buf[1]);
521 nxt200x_writebytes(state, 0x2C, buf,2);
523 /* do a read to stop things */
524 nxt200x_readbytes(state, 0x2C, buf, 1);
526 /* set transfer mode to complete */
528 nxt200x_writebytes(state, 0x2B, buf,1);
533 static int nxt200x_setup_frontend_parameters (struct dvb_frontend* fe,
534 struct dvb_frontend_parameters *p)
536 struct nxt200x_state* state = fe->demodulator_priv;
539 /* stop the micro first */
540 nxt200x_microcontroller_stop(state);
542 if (state->demod_chip == NXT2004) {
543 /* make sure demod is set to digital */
545 nxt200x_writebytes(state, 0x14, buf, 1);
547 nxt200x_writebytes(state, 0x17, buf, 1);
550 /* get tuning information */
551 if (fe->ops->tuner_ops.pllbuf) {
552 fe->ops->tuner_ops.pllbuf(fe, p, buf, 5);
555 /* set additional params */
556 switch (p->u.vsb.modulation) {
559 /* Set punctured clock for QAM */
560 /* This is just a guess since I am unable to test it */
561 if (state->config->set_ts_params)
562 state->config->set_ts_params(fe, 1);
565 if (state->config->set_pll_input)
566 state->config->set_pll_input(buf, 1);
569 /* Set non-punctured clock for VSB */
570 if (state->config->set_ts_params)
571 state->config->set_ts_params(fe, 0);
574 if (state->config->set_pll_input)
575 state->config->set_pll_input(buf, 0);
582 /* write frequency information */
583 nxt200x_writetuner(state, buf);
585 /* reset the agc now that tuning has been completed */
586 nxt200x_agc_reset(state);
588 /* set target power level */
589 switch (p->u.vsb.modulation) {
601 nxt200x_writebytes(state, 0x42, buf, 1);
604 switch (state->demod_chip) {
615 nxt200x_writebytes(state, 0x57, buf, 1);
617 /* write sdm1 input */
620 switch (state->demod_chip) {
622 nxt200x_writereg_multibyte(state, 0x58, buf, 2);
625 nxt200x_writebytes(state, 0x58, buf, 2);
632 /* write sdmx input */
633 switch (p->u.vsb.modulation) {
648 switch (state->demod_chip) {
650 nxt200x_writereg_multibyte(state, 0x5C, buf, 2);
653 nxt200x_writebytes(state, 0x5C, buf, 2);
660 /* write adc power lpf fc */
662 nxt200x_writebytes(state, 0x43, buf, 1);
664 if (state->demod_chip == NXT2004) {
668 nxt200x_writebytes(state, 0x46, buf, 2);
671 /* write accumulator2 input */
674 switch (state->demod_chip) {
676 nxt200x_writereg_multibyte(state, 0x4B, buf, 2);
679 nxt200x_writebytes(state, 0x4B, buf, 2);
688 nxt200x_writebytes(state, 0x4D, buf, 1);
690 /* write sdm12 lpf fc */
692 nxt200x_writebytes(state, 0x55, buf, 1);
694 /* write agc control reg */
696 nxt200x_writebytes(state, 0x41, buf, 1);
698 if (state->demod_chip == NXT2004) {
699 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
701 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
704 nxt200x_readreg_multibyte(state, 0x08, buf, 1);
706 nxt200x_writereg_multibyte(state, 0x08, buf, 1);
707 nxt200x_readreg_multibyte(state, 0x08, buf, 1);
709 nxt200x_writereg_multibyte(state, 0x08, buf, 1);
711 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
713 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
715 nxt200x_writereg_multibyte(state, 0x81, buf, 1);
716 buf[0] = 0x80; buf[1] = 0x00; buf[2] = 0x00;
717 nxt200x_writereg_multibyte(state, 0x82, buf, 3);
718 nxt200x_readreg_multibyte(state, 0x88, buf, 1);
720 nxt200x_writereg_multibyte(state, 0x88, buf, 1);
721 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
723 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
726 /* write agc ucgp0 */
727 switch (p->u.vsb.modulation) {
741 nxt200x_writebytes(state, 0x30, buf, 1);
743 /* write agc control reg */
745 nxt200x_writebytes(state, 0x41, buf, 1);
747 /* write accumulator2 input */
750 switch (state->demod_chip) {
752 nxt200x_writereg_multibyte(state, 0x49, buf, 2);
753 nxt200x_writereg_multibyte(state, 0x4B, buf, 2);
756 nxt200x_writebytes(state, 0x49, buf, 2);
757 nxt200x_writebytes(state, 0x4B, buf, 2);
764 /* write agc control reg */
766 nxt200x_writebytes(state, 0x41, buf, 1);
768 nxt200x_microcontroller_start(state);
770 if (state->demod_chip == NXT2004) {
771 nxt2004_microcontroller_init(state);
776 nxt200x_writebytes(state, 0x5C, buf, 2);
779 /* adjacent channel detection should be done here, but I don't
780 have any stations with this need so I cannot test it */
785 static int nxt200x_read_status(struct dvb_frontend* fe, fe_status_t* status)
787 struct nxt200x_state* state = fe->demodulator_priv;
789 nxt200x_readbytes(state, 0x31, &lock, 1);
793 *status |= FE_HAS_SIGNAL;
794 *status |= FE_HAS_CARRIER;
795 *status |= FE_HAS_VITERBI;
796 *status |= FE_HAS_SYNC;
797 *status |= FE_HAS_LOCK;
802 static int nxt200x_read_ber(struct dvb_frontend* fe, u32* ber)
804 struct nxt200x_state* state = fe->demodulator_priv;
807 nxt200x_readreg_multibyte(state, 0xE6, b, 3);
809 *ber = ((b[0] << 8) + b[1]) * 8;
814 static int nxt200x_read_signal_strength(struct dvb_frontend* fe, u16* strength)
816 struct nxt200x_state* state = fe->demodulator_priv;
820 /* setup to read cluster variance */
822 nxt200x_writebytes(state, 0xA1, b, 1);
824 /* get multreg val */
825 nxt200x_readreg_multibyte(state, 0xA6, b, 2);
827 temp = (b[0] << 8) | b[1];
828 *strength = ((0x7FFF - temp) & 0x0FFF) * 16;
833 static int nxt200x_read_snr(struct dvb_frontend* fe, u16* snr)
836 struct nxt200x_state* state = fe->demodulator_priv;
841 /* setup to read cluster variance */
843 nxt200x_writebytes(state, 0xA1, b, 1);
845 /* get multreg val from 0xA6 */
846 nxt200x_readreg_multibyte(state, 0xA6, b, 2);
848 temp = (b[0] << 8) | b[1];
849 temp2 = 0x7FFF - temp;
851 /* snr will be in db */
853 snrdb = 1000*24 + ( 1000*(30-24) * ( temp2 - 0x7F00 ) / ( 0x7FFF - 0x7F00 ) );
854 else if (temp2 > 0x7EC0)
855 snrdb = 1000*18 + ( 1000*(24-18) * ( temp2 - 0x7EC0 ) / ( 0x7F00 - 0x7EC0 ) );
856 else if (temp2 > 0x7C00)
857 snrdb = 1000*12 + ( 1000*(18-12) * ( temp2 - 0x7C00 ) / ( 0x7EC0 - 0x7C00 ) );
859 snrdb = 1000*0 + ( 1000*(12-0) * ( temp2 - 0 ) / ( 0x7C00 - 0 ) );
861 /* the value reported back from the frontend will be FFFF=32db 0000=0db */
862 *snr = snrdb * (0xFFFF/32000);
867 static int nxt200x_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
869 struct nxt200x_state* state = fe->demodulator_priv;
872 nxt200x_readreg_multibyte(state, 0xE6, b, 3);
878 static int nxt200x_sleep(struct dvb_frontend* fe)
883 static int nxt2002_init(struct dvb_frontend* fe)
885 struct nxt200x_state* state = fe->demodulator_priv;
886 const struct firmware *fw;
890 /* request the firmware, this will block until someone uploads it */
891 printk("nxt2002: Waiting for firmware upload (%s)...\n", NXT2002_DEFAULT_FIRMWARE);
892 ret = request_firmware(&fw, NXT2002_DEFAULT_FIRMWARE, &state->i2c->dev);
893 printk("nxt2002: Waiting for firmware upload(2)...\n");
895 printk("nxt2002: No firmware uploaded (timeout or file not found?)\n");
899 ret = nxt2002_load_firmware(fe, fw);
901 printk("nxt2002: Writing firmware to device failed\n");
902 release_firmware(fw);
905 printk("nxt2002: Firmware upload complete\n");
907 /* Put the micro into reset */
908 nxt200x_microcontroller_stop(state);
910 /* ensure transfer is complete */
912 nxt200x_writebytes(state, 0x2B, buf, 1);
914 /* Put the micro into reset for real this time */
915 nxt200x_microcontroller_stop(state);
917 /* soft reset everything (agc,frontend,eq,fec)*/
919 nxt200x_writebytes(state, 0x08, buf, 1);
921 nxt200x_writebytes(state, 0x08, buf, 1);
923 /* write agc sdm configure */
925 nxt200x_writebytes(state, 0x57, buf, 1);
927 /* write mod output format */
929 nxt200x_writebytes(state, 0x09, buf, 1);
931 /* write fec mpeg mode */
934 nxt200x_writebytes(state, 0xE9, buf, 2);
936 /* write mux selection */
938 nxt200x_writebytes(state, 0xCC, buf, 1);
943 static int nxt2004_init(struct dvb_frontend* fe)
945 struct nxt200x_state* state = fe->demodulator_priv;
946 const struct firmware *fw;
952 nxt200x_writebytes(state, 0x1E, buf, 1);
954 /* request the firmware, this will block until someone uploads it */
955 printk("nxt2004: Waiting for firmware upload (%s)...\n", NXT2004_DEFAULT_FIRMWARE);
956 ret = request_firmware(&fw, NXT2004_DEFAULT_FIRMWARE, &state->i2c->dev);
957 printk("nxt2004: Waiting for firmware upload(2)...\n");
959 printk("nxt2004: No firmware uploaded (timeout or file not found?)\n");
963 ret = nxt2004_load_firmware(fe, fw);
965 printk("nxt2004: Writing firmware to device failed\n");
966 release_firmware(fw);
969 printk("nxt2004: Firmware upload complete\n");
971 /* ensure transfer is complete */
973 nxt200x_writebytes(state, 0x19, buf, 1);
975 nxt2004_microcontroller_init(state);
976 nxt200x_microcontroller_stop(state);
977 nxt200x_microcontroller_stop(state);
978 nxt2004_microcontroller_init(state);
979 nxt200x_microcontroller_stop(state);
981 /* soft reset everything (agc,frontend,eq,fec)*/
983 nxt200x_writereg_multibyte(state, 0x08, buf, 1);
985 nxt200x_writereg_multibyte(state, 0x08, buf, 1);
987 /* write agc sdm configure */
989 nxt200x_writebytes(state, 0x57, buf, 1);
994 nxt200x_writebytes(state, 0x35, buf, 2);
996 nxt200x_writebytes(state, 0x34, buf, 1);
998 nxt200x_writebytes(state, 0x21, buf, 1);
1002 nxt200x_writebytes(state, 0x0A, buf, 1);
1006 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1008 /* write fec mpeg mode */
1011 nxt200x_writebytes(state, 0xE9, buf, 2);
1013 /* write mux selection */
1015 nxt200x_writebytes(state, 0xCC, buf, 1);
1018 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1020 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1023 nxt200x_readreg_multibyte(state, 0x08, buf, 1);
1025 nxt200x_writereg_multibyte(state, 0x08, buf, 1);
1026 nxt200x_readreg_multibyte(state, 0x08, buf, 1);
1028 nxt200x_writereg_multibyte(state, 0x08, buf, 1);
1031 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1033 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1035 nxt200x_writereg_multibyte(state, 0x81, buf, 1);
1036 buf[0] = 0x31; buf[1] = 0x5E; buf[2] = 0x66;
1037 nxt200x_writereg_multibyte(state, 0x82, buf, 3);
1039 nxt200x_readreg_multibyte(state, 0x88, buf, 1);
1041 nxt200x_writereg_multibyte(state, 0x88, buf, 1);
1042 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1044 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1046 nxt200x_readbytes(state, 0x10, buf, 1);
1048 nxt200x_writebytes(state, 0x10, buf, 1);
1049 nxt200x_readbytes(state, 0x0A, buf, 1);
1051 nxt200x_writebytes(state, 0x0A, buf, 1);
1053 nxt2004_microcontroller_init(state);
1056 nxt200x_writebytes(state, 0x0A, buf, 1);
1058 nxt200x_writebytes(state, 0xE9, buf, 1);
1060 nxt200x_writebytes(state, 0xEA, buf, 1);
1062 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1064 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1065 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1067 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1070 nxt200x_readreg_multibyte(state, 0x08, buf, 1);
1072 nxt200x_writereg_multibyte(state, 0x08, buf, 1);
1073 nxt200x_readreg_multibyte(state, 0x08, buf, 1);
1075 nxt200x_writereg_multibyte(state, 0x08, buf, 1);
1077 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1079 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1081 nxt200x_writereg_multibyte(state, 0x81, buf, 1);
1082 buf[0] = 0x80; buf[1] = 0x00; buf[2] = 0x00;
1083 nxt200x_writereg_multibyte(state, 0x82, buf, 3);
1085 nxt200x_readreg_multibyte(state, 0x88, buf, 1);
1087 nxt200x_writereg_multibyte(state, 0x88, buf, 1);
1089 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1091 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1093 /* initialize tuner */
1094 nxt200x_readbytes(state, 0x10, buf, 1);
1096 nxt200x_writebytes(state, 0x10, buf, 1);
1098 nxt200x_writebytes(state, 0x13, buf, 1);
1100 nxt200x_writebytes(state, 0x16, buf, 1);
1102 nxt200x_writebytes(state, 0x14, buf, 1);
1104 nxt200x_writebytes(state, 0x14, buf, 1);
1105 nxt200x_writebytes(state, 0x17, buf, 1);
1106 nxt200x_writebytes(state, 0x14, buf, 1);
1107 nxt200x_writebytes(state, 0x17, buf, 1);
1112 static int nxt200x_init(struct dvb_frontend* fe)
1114 struct nxt200x_state* state = fe->demodulator_priv;
1117 if (!state->initialised) {
1118 switch (state->demod_chip) {
1120 ret = nxt2002_init(fe);
1123 ret = nxt2004_init(fe);
1129 state->initialised = 1;
1134 static int nxt200x_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fesettings)
1136 fesettings->min_delay_ms = 500;
1137 fesettings->step_size = 0;
1138 fesettings->max_drift = 0;
1142 static void nxt200x_release(struct dvb_frontend* fe)
1144 struct nxt200x_state* state = fe->demodulator_priv;
1148 static struct dvb_frontend_ops nxt200x_ops;
1150 struct dvb_frontend* nxt200x_attach(const struct nxt200x_config* config,
1151 struct i2c_adapter* i2c)
1153 struct nxt200x_state* state = NULL;
1154 u8 buf [] = {0,0,0,0,0};
1156 /* allocate memory for the internal state */
1157 state = kzalloc(sizeof(struct nxt200x_state), GFP_KERNEL);
1161 /* setup the state */
1162 state->config = config;
1164 memcpy(&state->ops, &nxt200x_ops, sizeof(struct dvb_frontend_ops));
1165 state->initialised = 0;
1168 nxt200x_readbytes(state, 0x00, buf, 5);
1169 dprintk("NXT info: %02X %02X %02X %02X %02X\n",
1170 buf[0], buf[1], buf[2], buf[3], buf[4]);
1172 /* set demod chip */
1175 state->demod_chip = NXT2002;
1176 printk("nxt200x: NXT2002 Detected\n");
1179 state->demod_chip = NXT2004;
1180 printk("nxt200x: NXT2004 Detected\n");
1186 /* make sure demod chip is supported */
1187 switch (state->demod_chip) {
1189 if (buf[0] != 0x04) goto error; /* device id */
1190 if (buf[1] != 0x02) goto error; /* fab id */
1191 if (buf[2] != 0x11) goto error; /* month */
1192 if (buf[3] != 0x20) goto error; /* year msb */
1193 if (buf[4] != 0x00) goto error; /* year lsb */
1196 if (buf[0] != 0x05) goto error; /* device id */
1202 /* create dvb_frontend */
1203 state->frontend.ops = &state->ops;
1204 state->frontend.demodulator_priv = state;
1205 return &state->frontend;
1209 printk("Unknown/Unsupported NXT chip: %02X %02X %02X %02X %02X\n",
1210 buf[0], buf[1], buf[2], buf[3], buf[4]);
1214 static struct dvb_frontend_ops nxt200x_ops = {
1217 .name = "Nextwave NXT200X VSB/QAM frontend",
1219 .frequency_min = 54000000,
1220 .frequency_max = 860000000,
1221 .frequency_stepsize = 166666, /* stepsize is just a guess */
1222 .caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
1223 FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
1224 FE_CAN_8VSB | FE_CAN_QAM_64 | FE_CAN_QAM_256
1227 .release = nxt200x_release,
1229 .init = nxt200x_init,
1230 .sleep = nxt200x_sleep,
1232 .set_frontend = nxt200x_setup_frontend_parameters,
1233 .get_tune_settings = nxt200x_get_tune_settings,
1235 .read_status = nxt200x_read_status,
1236 .read_ber = nxt200x_read_ber,
1237 .read_signal_strength = nxt200x_read_signal_strength,
1238 .read_snr = nxt200x_read_snr,
1239 .read_ucblocks = nxt200x_read_ucblocks,
1242 module_param(debug, int, 0644);
1243 MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
1245 MODULE_DESCRIPTION("NXT200X (ATSC 8VSB & ITU-T J.83 AnnexB 64/256 QAM) Demodulator Driver");
1246 MODULE_AUTHOR("Kirk Lapray, Michael Krufky, Jean-Francois Thibert, and Taylor Jacob");
1247 MODULE_LICENSE("GPL");
1249 EXPORT_SYMBOL(nxt200x_attach);