2 Conexant cx24123/cx24109 - DVB QPSK Satellite demod/tuner driver
4 Copyright (C) 2005 Steven Toth <stoth@hauppauge.com>
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 #include <linux/slab.h>
22 #include <linux/kernel.h>
23 #include <linux/module.h>
24 #include <linux/moduleparam.h>
25 #include <linux/init.h>
27 #include "dvb_frontend.h"
31 #define dprintk(args...) \
33 if (debug) printk (KERN_DEBUG "cx24123: " args); \
36 struct cx24123_state {
38 struct i2c_adapter* i2c;
39 struct dvb_frontend_ops ops;
40 const struct cx24123_config* config;
42 struct dvb_frontend frontend;
48 /* Some PLL specifics for tuning */
54 /* The Demod/Tuner can't easily provide these, we cache them */
56 u32 currentsymbolrate;
64 {0x00, 0x03}, /* Reset system */
65 {0x00, 0x00}, /* Clear reset */
66 {0x01, 0x3b}, /* Apply sensible defaults, from an i2c sniffer */
102 {0x3a, 0x00}, /* Enable AGC accumulator */
111 static int cx24123_writereg(struct cx24123_state* state, int reg, int data)
113 u8 buf[] = { reg, data };
114 struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = buf, .len = 2 };
117 if ((err = i2c_transfer(state->i2c, &msg, 1)) != 1) {
118 printk("%s: writereg error(err == %i, reg == 0x%02x,"
119 " data == 0x%02x)\n", __FUNCTION__, err, reg, data);
126 static int cx24123_writelnbreg(struct cx24123_state* state, int reg, int data)
128 u8 buf[] = { reg, data };
129 /* fixme: put the intersil addr int the config */
130 struct i2c_msg msg = { .addr = 0x08, .flags = 0, .buf = buf, .len = 2 };
133 if ((err = i2c_transfer(state->i2c, &msg, 1)) != 1) {
134 printk("%s: writelnbreg error (err == %i, reg == 0x%02x,"
135 " data == 0x%02x)\n", __FUNCTION__, err, reg, data);
139 /* cache the write, no way to read back */
140 state->lnbreg = data;
145 static int cx24123_readreg(struct cx24123_state* state, u8 reg)
150 struct i2c_msg msg[] = {
151 { .addr = state->config->demod_address, .flags = 0, .buf = b0, .len = 1 },
152 { .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = b1, .len = 1 }
155 ret = i2c_transfer(state->i2c, msg, 2);
158 printk("%s: reg=0x%x (error=%d)\n", __FUNCTION__, reg, ret);
165 static int cx24123_readlnbreg(struct cx24123_state* state, u8 reg)
167 return state->lnbreg;
170 static int cx24123_set_inversion(struct cx24123_state* state, fe_spectral_inversion_t inversion)
174 cx24123_writereg(state, 0x0e, cx24123_readreg(state, 0x0e) & 0x7f);
175 cx24123_writereg(state, 0x10, cx24123_readreg(state, 0x10) | 0x80);
178 cx24123_writereg(state, 0x0e, cx24123_readreg(state, 0x0e) | 0x80);
179 cx24123_writereg(state, 0x10, cx24123_readreg(state, 0x10) | 0x80);
182 cx24123_writereg(state, 0x10, cx24123_readreg(state, 0x10) & 0x7f);
191 static int cx24123_get_inversion(struct cx24123_state* state, fe_spectral_inversion_t *inversion)
195 val = cx24123_readreg(state, 0x1b) >> 7;
198 *inversion=INVERSION_OFF;
200 *inversion=INVERSION_ON;
205 static int cx24123_set_fec(struct cx24123_state* state, fe_code_rate_t fec)
207 if ( (fec < FEC_NONE) || (fec > FEC_AUTO) )
210 /* Hardware has 5/11 and 3/5 but are never unused */
213 return cx24123_writereg(state, 0x0f,0x01);
215 return cx24123_writereg(state, 0x0f, 0x02);
217 return cx24123_writereg(state, 0x0f, 0x04);
219 return cx24123_writereg(state, 0x0f, 0x08);
221 return cx24123_writereg(state, 0x0f, 0x20);
223 return cx24123_writereg(state, 0x0f, 0x80);
225 return cx24123_writereg(state, 0x0f, 0xae);
231 static int cx24123_get_fec(struct cx24123_state* state, fe_code_rate_t *fec)
235 val = cx24123_readreg (state, 0x1b) & 0x07;
255 case 2: /* *fec=FEC_3_5; return 0; */
256 case 0: /* *fec=FEC_5_11; return 0; */
260 *fec=FEC_NONE; return 0;
266 /* fixme: Symbol rates < 3MSps may not work because of precision loss */
267 static int cx24123_set_symbolrate(struct cx24123_state* state, u32 srate)
271 val = (srate/1185)*100;
273 /* Compensate for scaling up, by removing 17 symbols per 1Msps */
274 val = val - (17*(srate / 1000000));
276 cx24123_writereg(state, 0x08, (val >>16) & 0xff );
277 cx24123_writereg(state, 0x09, (val >> 8) & 0xff );
278 cx24123_writereg(state, 0x0a, (val ) & 0xff );
284 * Based on the required frequency and symbolrate, the tuner AGC has to be configured
285 * and the correct band selected. Calculate those values
287 static int cx24123_pll_calculate(struct dvb_frontend* fe, struct dvb_frontend_parameters *p)
289 struct cx24123_state *state = fe->demodulator_priv;
290 u32 ndiv=0, adiv=0, vco_div=0;
293 /* Defaults for low freq, low rate */
294 state->VCAarg = cx24123_AGC_vals[0].VCAprogdata;
295 state->VGAarg = cx24123_AGC_vals[0].VGAprogdata;
296 state->bandselectarg = cx24123_bandselect_vals[0].progdata;
297 vco_div = cx24123_bandselect_vals[0].VCOdivider;
299 /* For the given symbolerate, determine the VCA and VGA programming bits */
300 for (i=0; i < sizeof(cx24123_AGC_vals) / sizeof(cx24123_AGC_vals[0]); i++)
302 if ((cx24123_AGC_vals[i].symbolrate_low <= p->u.qpsk.symbol_rate) &&
303 (cx24123_AGC_vals[i].symbolrate_high >= p->u.qpsk.symbol_rate) ) {
304 state->VCAarg = cx24123_AGC_vals[i].VCAprogdata;
305 state->VGAarg = cx24123_AGC_vals[i].VGAprogdata;
309 /* For the given frequency, determine the bandselect programming bits */
310 for (i=0; i < sizeof(cx24123_bandselect_vals) / sizeof(cx24123_bandselect_vals[0]); i++)
312 if ((cx24123_bandselect_vals[i].freq_low <= p->frequency) &&
313 (cx24123_bandselect_vals[i].freq_high >= p->frequency) ) {
314 state->bandselectarg = cx24123_bandselect_vals[i].progdata;
315 vco_div = cx24123_bandselect_vals[i].VCOdivider;
319 /* Determine the N/A dividers for the requested lband freq (in kHz). */
320 /* Note: 10111 (kHz) is the Crystal Freq and divider of 10. */
321 ndiv = ( ((p->frequency * vco_div) / (10111 / 10) / 2) / 32) & 0x1ff;
322 adiv = ( ((p->frequency * vco_div) / (10111 / 10) / 2) % 32) & 0x1f;
327 /* determine the correct pll frequency values. */
328 /* Command 11, refdiv 11, cpump polarity 1, cpump current 3mA 10. */
329 state->pllarg = (3 << 19) | (3 << 17) | (1 << 16) | (2 << 14);
330 state->pllarg |= (ndiv << 5) | adiv;
336 * Tuner data is 21 bits long, must be left-aligned in data.
337 * Tuner cx24109 is written through a dedicated 3wire interface on the demod chip.
339 static int cx24123_pll_writereg(struct dvb_frontend* fe, struct dvb_frontend_parameters *p, u32 data)
341 struct cx24123_state *state = fe->demodulator_priv;
345 /* align the 21 bytes into to bit23 boundary */
348 /* Reset the demod pll word length to 0x15 bits */
349 cx24123_writereg(state, 0x21, 0x15);
352 /* write the msb 8 bits, wait for the send to be completed */
353 cx24123_writereg(state, 0x22, (data>>16) & 0xff);
354 while ( ( cx24123_readreg(state, 0x20) & 0x40 ) == 0 )
356 /* Safety - No reason why the write should not complete, and we never get here, avoid hang */
357 if (timeout++ >= 4) {
358 printk("%s: demodulator is no longer responding, aborting.\n",__FUNCTION__);
365 /* send another 8 bytes, wait for the send to be completed */
366 cx24123_writereg(state, 0x22, (data>>8) & 0xff );
367 while ( (cx24123_readreg(state, 0x20) & 0x40 ) == 0 )
369 /* Safety - No reason why the write should not complete, and we never get here, avoid hang */
370 if (timeout++ >= 4) {
371 printk("%s: demodulator is not responding, possibly hung, aborting.\n",__FUNCTION__);
378 /* send the lower 5 bits of this byte, padded with 3 LBB, wait for the send to be completed */
379 cx24123_writereg(state, 0x22, (data) & 0xff );
380 while ((cx24123_readreg(state, 0x20) & 0x80))
382 /* Safety - No reason why the write should not complete, and we never get here, avoid hang */
383 if (timeout++ >= 4) {
384 printk("%s: demodulator is not responding, possibly hung, aborting.\n",__FUNCTION__);
390 /* Trigger the demod to configure the tuner */
391 cx24123_writereg(state, 0x20, cx24123_readreg(state, 0x20) | 2);
392 cx24123_writereg(state, 0x20, cx24123_readreg(state, 0x20) & 0xfd);
397 static int cx24123_pll_tune(struct dvb_frontend* fe, struct dvb_frontend_parameters *p)
399 struct cx24123_state *state = fe->demodulator_priv;
401 if (cx24123_pll_calculate(fe, p)!=0) {
402 printk("%s: cx24123_pll_calcutate failed\n",__FUNCTION__);
406 /* Write the new VCO/VGA */
407 cx24123_pll_writereg(fe, p, state->VCAarg);
408 cx24123_pll_writereg(fe, p, state->VGAarg);
410 /* Write the new bandselect and pll args */
411 cx24123_pll_writereg(fe, p, state->bandselectarg);
412 cx24123_pll_writereg(fe, p, state->pllarg);
417 static int cx24123_initfe(struct dvb_frontend* fe)
419 struct cx24123_state *state = fe->demodulator_priv;
422 /* Configure the demod to a good set of defaults */
423 for (i=0; i < sizeof(cx24123_regdata) / sizeof(cx24123_regdata[0]); i++)
424 cx24123_writereg(state, cx24123_regdata[i].reg, cx24123_regdata[i].data);
426 if (state->config->pll_init)
427 state->config->pll_init(fe);
429 /* Configure the LNB for 14V */
430 cx24123_writelnbreg(state, 0x0, 0x2a);
435 static int cx24123_set_voltage(struct dvb_frontend* fe, fe_sec_voltage_t voltage)
437 struct cx24123_state *state = fe->demodulator_priv;
440 val = cx24123_readlnbreg(state, 0x0);
444 return cx24123_writelnbreg(state, 0x0, val & 0x32); /* V 13v */
446 return cx24123_writelnbreg(state, 0x0, val | 0x04); /* H 18v */
447 case SEC_VOLTAGE_OFF:
448 return cx24123_writelnbreg(state, 0x0, val & 0x30);
454 static int cx24123_send_diseqc_msg(struct dvb_frontend* fe,
455 struct dvb_diseqc_master_cmd *cmd)
457 /* fixme: Implement diseqc */
458 printk("%s: No support yet\n",__FUNCTION__);
463 static int cx24123_read_status(struct dvb_frontend* fe, fe_status_t* status)
465 struct cx24123_state *state = fe->demodulator_priv;
467 int sync = cx24123_readreg(state, 0x14);
468 int lock = cx24123_readreg(state, 0x20);
472 *status |= FE_HAS_CARRIER | FE_HAS_SIGNAL;
474 *status |= FE_HAS_VITERBI;
476 *status |= FE_HAS_CARRIER;
478 *status |= FE_HAS_SYNC | FE_HAS_LOCK;
484 * Configured to return the measurement of errors in blocks, because no UCBLOCKS value
485 * is available, so this value doubles up to satisfy both measurements
487 static int cx24123_read_ber(struct dvb_frontend* fe, u32* ber)
489 struct cx24123_state *state = fe->demodulator_priv;
492 ((cx24123_readreg(state, 0x1c) & 0x3f) << 16) |
493 (cx24123_readreg(state, 0x1d) << 8 |
494 cx24123_readreg(state, 0x1e));
496 /* Do the signal quality processing here, it's derived from the BER. */
497 /* Scale the BER from a 24bit to a SNR 16 bit where higher = better */
498 if (state->lastber < 5000)
499 state->snr = 655*100;
500 else if ( (state->lastber >= 5000) && (state->lastber < 55000) )
502 else if ( (state->lastber >= 55000) && (state->lastber < 150000) )
504 else if ( (state->lastber >= 150000) && (state->lastber < 250000) )
506 else if ( (state->lastber >= 250000) && (state->lastber < 450000) )
511 *ber = state->lastber;
516 static int cx24123_read_signal_strength(struct dvb_frontend* fe, u16* signal_strength)
518 struct cx24123_state *state = fe->demodulator_priv;
519 *signal_strength = cx24123_readreg(state, 0x3b) << 8; /* larger = better */
524 static int cx24123_read_snr(struct dvb_frontend* fe, u16* snr)
526 struct cx24123_state *state = fe->demodulator_priv;
532 static int cx24123_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
534 struct cx24123_state *state = fe->demodulator_priv;
535 *ucblocks = state->lastber;
540 static int cx24123_set_frontend(struct dvb_frontend* fe, struct dvb_frontend_parameters *p)
542 struct cx24123_state *state = fe->demodulator_priv;
544 if (state->config->set_ts_params)
545 state->config->set_ts_params(fe, 0);
547 state->currentfreq=p->frequency;
548 state->currentsymbolrate=p->u.qpsk.symbol_rate;
550 cx24123_set_inversion(state, p->inversion);
551 cx24123_set_fec(state, p->u.qpsk.fec_inner);
552 cx24123_set_symbolrate(state, p->u.qpsk.symbol_rate);
553 cx24123_pll_tune(fe, p);
555 /* Enable automatic aquisition and reset cycle */
556 cx24123_writereg(state, 0x03, (cx24123_readreg(state, 0x03) | 0x07) );
557 cx24123_writereg(state, 0x00, 0x10);
558 cx24123_writereg(state, 0x00, 0);
563 static int cx24123_get_frontend(struct dvb_frontend* fe, struct dvb_frontend_parameters *p)
565 struct cx24123_state *state = fe->demodulator_priv;
567 if (cx24123_get_inversion(state, &p->inversion) != 0) {
568 printk("%s: Failed to get inversion status\n",__FUNCTION__);
571 if (cx24123_get_fec(state, &p->u.qpsk.fec_inner) != 0) {
572 printk("%s: Failed to get fec status\n",__FUNCTION__);
575 p->frequency = state->currentfreq;
576 p->u.qpsk.symbol_rate = state->currentsymbolrate;
581 static int cx24123_set_tone(struct dvb_frontend* fe, fe_sec_tone_mode_t tone)
583 struct cx24123_state *state = fe->demodulator_priv;
586 val = cx24123_readlnbreg(state, 0x0);
590 return cx24123_writelnbreg(state, 0x0, val | 0x10);
592 return cx24123_writelnbreg(state, 0x0, val & 0x2f);
594 printk("%s: CASE reached default with tone=%d\n", __FUNCTION__, tone);
599 static void cx24123_release(struct dvb_frontend* fe)
601 struct cx24123_state* state = fe->demodulator_priv;
602 dprintk("%s\n",__FUNCTION__);
606 static struct dvb_frontend_ops cx24123_ops;
608 struct dvb_frontend* cx24123_attach(const struct cx24123_config* config, struct i2c_adapter* i2c)
610 struct cx24123_state* state = NULL;
613 dprintk("%s\n",__FUNCTION__);
615 /* allocate memory for the internal state */
616 state = kmalloc(sizeof(struct cx24123_state), GFP_KERNEL);
618 printk("Unable to kmalloc\n");
622 /* setup the state */
623 state->config = config;
625 memcpy(&state->ops, &cx24123_ops, sizeof(struct dvb_frontend_ops));
631 state->bandselectarg = 0;
633 state->currentfreq = 0;
634 state->currentsymbolrate = 0;
636 /* check if the demod is there */
637 ret = cx24123_readreg(state, 0x00);
638 if ((ret != 0xd1) && (ret != 0xe1)) {
639 printk("Version != d1 or e1\n");
643 /* create dvb_frontend */
644 state->frontend.ops = &state->ops;
645 state->frontend.demodulator_priv = state;
646 return &state->frontend;
654 static struct dvb_frontend_ops cx24123_ops = {
657 .name = "Conexant CX24123/CX24109",
659 .frequency_min = 950000,
660 .frequency_max = 2150000,
661 .frequency_stepsize = 1011, /* kHz for QPSK frontends */
662 .frequency_tolerance = 29500,
663 .symbol_rate_min = 1000000,
664 .symbol_rate_max = 45000000,
665 .caps = FE_CAN_INVERSION_AUTO |
666 FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
667 FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
668 FE_CAN_QPSK | FE_CAN_RECOVER
671 .release = cx24123_release,
673 .init = cx24123_initfe,
674 .set_frontend = cx24123_set_frontend,
675 .get_frontend = cx24123_get_frontend,
676 .read_status = cx24123_read_status,
677 .read_ber = cx24123_read_ber,
678 .read_signal_strength = cx24123_read_signal_strength,
679 .read_snr = cx24123_read_snr,
680 .read_ucblocks = cx24123_read_ucblocks,
681 .diseqc_send_master_cmd = cx24123_send_diseqc_msg,
682 .set_tone = cx24123_set_tone,
683 .set_voltage = cx24123_set_voltage,
686 module_param(debug, int, 0644);
687 MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
689 MODULE_DESCRIPTION("DVB Frontend module for Conexant cx24123/cx24109 hardware");
690 MODULE_AUTHOR("Steven Toth");
691 MODULE_LICENSE("GPL");
693 EXPORT_SYMBOL(cx24123_attach);