err.no Git - linux-2.6/blob - drivers/kvm/vmx.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * This module enables machines with Intel VT-x extensions to run virtual
   5  * machines without emulation or binary translation.
   6  *
   7  * Copyright (C) 2006 Qumranet, Inc.
   8  *
   9  * Authors:
  10  *   Avi Kivity   <avi@qumranet.com>
  11  *   Yaniv Kamay  <yaniv@qumranet.com>
  12  *
  13  * This work is licensed under the terms of the GNU GPL, version 2.  See
  14  * the COPYING file in the top-level directory.
  15  *
  16  */
  17
  18 #include "kvm.h"
  19 #include "vmx.h"
  20 #include "segment_descriptor.h"
  21
  22 #include <linux/module.h>
  23 #include <linux/kernel.h>
  24 #include <linux/mm.h>
  25 #include <linux/highmem.h>
  26 #include <linux/profile.h>
  27 #include <linux/sched.h>
  28
  29 #include <asm/io.h>
  30 #include <asm/desc.h>
  31
  32 MODULE_AUTHOR("Qumranet");
  33 MODULE_LICENSE("GPL");
  34
  35 struct vmcs {
  36         u32 revision_id;
  37         u32 abort;
  38         char data[0];
  39 };
  40
  41 struct vcpu_vmx {
  42         struct kvm_vcpu       vcpu;
  43         int                   launched;
  44         struct kvm_msr_entry *guest_msrs;
  45         struct kvm_msr_entry *host_msrs;
  46         int                   nmsrs;
  47         int                   save_nmsrs;
  48         int                   msr_offset_efer;
  49 #ifdef CONFIG_X86_64
  50         int                   msr_offset_kernel_gs_base;
  51 #endif
  52         struct vmcs          *vmcs;
  53         struct {
  54                 int           loaded;
  55                 u16           fs_sel, gs_sel, ldt_sel;
  56                 int           fs_gs_ldt_reload_needed;
  57         }host_state;
  58
  59 };
  60
  61 static inline struct vcpu_vmx *to_vmx(struct kvm_vcpu *vcpu)
  62 {
  63         return container_of(vcpu, struct vcpu_vmx, vcpu);
  64 }
  65
  66 static int init_rmode_tss(struct kvm *kvm);
  67
  68 static DEFINE_PER_CPU(struct vmcs *, vmxarea);
  69 static DEFINE_PER_CPU(struct vmcs *, current_vmcs);
  70
  71 static struct page *vmx_io_bitmap_a;
  72 static struct page *vmx_io_bitmap_b;
  73
  74 #ifdef CONFIG_X86_64
  75 #define HOST_IS_64 1
  76 #else
  77 #define HOST_IS_64 0
  78 #endif
  79 #define EFER_SAVE_RESTORE_BITS ((u64)EFER_SCE)
  80
  81 static struct vmcs_descriptor {
  82         int size;
  83         int order;
  84         u32 revision_id;
  85 } vmcs_descriptor;
  86
  87 #define VMX_SEGMENT_FIELD(seg)                                  \
  88         [VCPU_SREG_##seg] = {                                   \
  89                 .selector = GUEST_##seg##_SELECTOR,             \
  90                 .base = GUEST_##seg##_BASE,                     \
  91                 .limit = GUEST_##seg##_LIMIT,                   \
  92                 .ar_bytes = GUEST_##seg##_AR_BYTES,             \
  93         }
  94
  95 static struct kvm_vmx_segment_field {
  96         unsigned selector;
  97         unsigned base;
  98         unsigned limit;
  99         unsigned ar_bytes;
 100 } kvm_vmx_segment_fields[] = {
 101         VMX_SEGMENT_FIELD(CS),
 102         VMX_SEGMENT_FIELD(DS),
 103         VMX_SEGMENT_FIELD(ES),
 104         VMX_SEGMENT_FIELD(FS),
 105         VMX_SEGMENT_FIELD(GS),
 106         VMX_SEGMENT_FIELD(SS),
 107         VMX_SEGMENT_FIELD(TR),
 108         VMX_SEGMENT_FIELD(LDTR),
 109 };
 110
 111 /*
 112  * Keep MSR_K6_STAR at the end, as setup_msrs() will try to optimize it
 113  * away by decrementing the array size.
 114  */
 115 static const u32 vmx_msr_index[] = {
 116 #ifdef CONFIG_X86_64
 117         MSR_SYSCALL_MASK, MSR_LSTAR, MSR_CSTAR, MSR_KERNEL_GS_BASE,
 118 #endif
 119         MSR_EFER, MSR_K6_STAR,
 120 };
 121 #define NR_VMX_MSR ARRAY_SIZE(vmx_msr_index)
 122
 123 static void load_msrs(struct kvm_msr_entry *e, int n)
 124 {
 125         int i;
 126
 127         for (i = 0; i < n; ++i)
 128                 wrmsrl(e[i].index, e[i].data);
 129 }
 130
 131 static void save_msrs(struct kvm_msr_entry *e, int n)
 132 {
 133         int i;
 134
 135         for (i = 0; i < n; ++i)
 136                 rdmsrl(e[i].index, e[i].data);
 137 }
 138
 139 static inline u64 msr_efer_save_restore_bits(struct kvm_msr_entry msr)
 140 {
 141         return (u64)msr.data & EFER_SAVE_RESTORE_BITS;
 142 }
 143
 144 static inline int msr_efer_need_save_restore(struct kvm_vcpu *vcpu)
 145 {
 146         struct vcpu_vmx *vmx = to_vmx(vcpu);
 147         int efer_offset = vmx->msr_offset_efer;
 148         return msr_efer_save_restore_bits(vmx->host_msrs[efer_offset]) !=
 149                 msr_efer_save_restore_bits(vmx->guest_msrs[efer_offset]);
 150 }
 151
 152 static inline int is_page_fault(u32 intr_info)
 153 {
 154         return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK |
 155                              INTR_INFO_VALID_MASK)) ==
 156                 (INTR_TYPE_EXCEPTION | PF_VECTOR | INTR_INFO_VALID_MASK);
 157 }
 158
 159 static inline int is_no_device(u32 intr_info)
 160 {
 161         return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK |
 162                              INTR_INFO_VALID_MASK)) ==
 163                 (INTR_TYPE_EXCEPTION | NM_VECTOR | INTR_INFO_VALID_MASK);
 164 }
 165
 166 static inline int is_external_interrupt(u32 intr_info)
 167 {
 168         return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VALID_MASK))
 169                 == (INTR_TYPE_EXT_INTR | INTR_INFO_VALID_MASK);
 170 }
 171
 172 static int __find_msr_index(struct kvm_vcpu *vcpu, u32 msr)
 173 {
 174         struct vcpu_vmx *vmx = to_vmx(vcpu);
 175         int i;
 176
 177         for (i = 0; i < vmx->nmsrs; ++i)
 178                 if (vmx->guest_msrs[i].index == msr)
 179                         return i;
 180         return -1;
 181 }
 182
 183 static struct kvm_msr_entry *find_msr_entry(struct kvm_vcpu *vcpu, u32 msr)
 184 {
 185         struct vcpu_vmx *vmx = to_vmx(vcpu);
 186         int i;
 187
 188         i = __find_msr_index(vcpu, msr);
 189         if (i >= 0)
 190                 return &vmx->guest_msrs[i];
 191         return NULL;
 192 }
 193
 194 static void vmcs_clear(struct vmcs *vmcs)
 195 {
 196         u64 phys_addr = __pa(vmcs);
 197         u8 error;
 198
 199         asm volatile (ASM_VMX_VMCLEAR_RAX "; setna %0"
 200                       : "=g"(error) : "a"(&phys_addr), "m"(phys_addr)
 201                       : "cc", "memory");
 202         if (error)
 203                 printk(KERN_ERR "kvm: vmclear fail: %p/%llx\n",
 204                        vmcs, phys_addr);
 205 }
 206
 207 static void __vcpu_clear(void *arg)
 208 {
 209         struct kvm_vcpu *vcpu = arg;
 210         struct vcpu_vmx *vmx = to_vmx(vcpu);
 211         int cpu = raw_smp_processor_id();
 212
 213         if (vcpu->cpu == cpu)
 214                 vmcs_clear(vmx->vmcs);
 215         if (per_cpu(current_vmcs, cpu) == vmx->vmcs)
 216                 per_cpu(current_vmcs, cpu) = NULL;
 217         rdtscll(vcpu->host_tsc);
 218 }
 219
 220 static void vcpu_clear(struct kvm_vcpu *vcpu)
 221 {
 222         if (vcpu->cpu != raw_smp_processor_id() && vcpu->cpu != -1)
 223                 smp_call_function_single(vcpu->cpu, __vcpu_clear, vcpu, 0, 1);
 224         else
 225                 __vcpu_clear(vcpu);
 226         to_vmx(vcpu)->launched = 0;
 227 }
 228
 229 static unsigned long vmcs_readl(unsigned long field)
 230 {
 231         unsigned long value;
 232
 233         asm volatile (ASM_VMX_VMREAD_RDX_RAX
 234                       : "=a"(value) : "d"(field) : "cc");
 235         return value;
 236 }
 237
 238 static u16 vmcs_read16(unsigned long field)
 239 {
 240         return vmcs_readl(field);
 241 }
 242
 243 static u32 vmcs_read32(unsigned long field)
 244 {
 245         return vmcs_readl(field);
 246 }
 247
 248 static u64 vmcs_read64(unsigned long field)
 249 {
 250 #ifdef CONFIG_X86_64
 251         return vmcs_readl(field);
 252 #else
 253         return vmcs_readl(field) | ((u64)vmcs_readl(field+1) << 32);
 254 #endif
 255 }
 256
 257 static noinline void vmwrite_error(unsigned long field, unsigned long value)
 258 {
 259         printk(KERN_ERR "vmwrite error: reg %lx value %lx (err %d)\n",
 260                field, value, vmcs_read32(VM_INSTRUCTION_ERROR));
 261         dump_stack();
 262 }
 263
 264 static void vmcs_writel(unsigned long field, unsigned long value)
 265 {
 266         u8 error;
 267
 268         asm volatile (ASM_VMX_VMWRITE_RAX_RDX "; setna %0"
 269                        : "=q"(error) : "a"(value), "d"(field) : "cc" );
 270         if (unlikely(error))
 271                 vmwrite_error(field, value);
 272 }
 273
 274 static void vmcs_write16(unsigned long field, u16 value)
 275 {
 276         vmcs_writel(field, value);
 277 }
 278
 279 static void vmcs_write32(unsigned long field, u32 value)
 280 {
 281         vmcs_writel(field, value);
 282 }
 283
 284 static void vmcs_write64(unsigned long field, u64 value)
 285 {
 286 #ifdef CONFIG_X86_64
 287         vmcs_writel(field, value);
 288 #else
 289         vmcs_writel(field, value);
 290         asm volatile ("");
 291         vmcs_writel(field+1, value >> 32);
 292 #endif
 293 }
 294
 295 static void vmcs_clear_bits(unsigned long field, u32 mask)
 296 {
 297         vmcs_writel(field, vmcs_readl(field) & ~mask);
 298 }
 299
 300 static void vmcs_set_bits(unsigned long field, u32 mask)
 301 {
 302         vmcs_writel(field, vmcs_readl(field) | mask);
 303 }
 304
 305 static void update_exception_bitmap(struct kvm_vcpu *vcpu)
 306 {
 307         u32 eb;
 308
 309         eb = 1u << PF_VECTOR;
 310         if (!vcpu->fpu_active)
 311                 eb |= 1u << NM_VECTOR;
 312         if (vcpu->guest_debug.enabled)
 313                 eb |= 1u << 1;
 314         if (vcpu->rmode.active)
 315                 eb = ~0;
 316         vmcs_write32(EXCEPTION_BITMAP, eb);
 317 }
 318
 319 static void reload_tss(void)
 320 {
 321 #ifndef CONFIG_X86_64
 322
 323         /*
 324          * VT restores TR but not its size.  Useless.
 325          */
 326         struct descriptor_table gdt;
 327         struct segment_descriptor *descs;
 328
 329         get_gdt(&gdt);
 330         descs = (void *)gdt.base;
 331         descs[GDT_ENTRY_TSS].type = 9; /* available TSS */
 332         load_TR_desc();
 333 #endif
 334 }
 335
 336 static void load_transition_efer(struct kvm_vcpu *vcpu)
 337 {
 338         u64 trans_efer;
 339         struct vcpu_vmx *vmx = to_vmx(vcpu);
 340         int efer_offset = vmx->msr_offset_efer;
 341
 342         trans_efer = vmx->host_msrs[efer_offset].data;
 343         trans_efer &= ~EFER_SAVE_RESTORE_BITS;
 344         trans_efer |= msr_efer_save_restore_bits(vmx->guest_msrs[efer_offset]);
 345         wrmsrl(MSR_EFER, trans_efer);
 346         vcpu->stat.efer_reload++;
 347 }
 348
 349 static void vmx_save_host_state(struct kvm_vcpu *vcpu)
 350 {
 351         struct vcpu_vmx *vmx = to_vmx(vcpu);
 352
 353         if (vmx->host_state.loaded)
 354                 return;
 355
 356         vmx->host_state.loaded = 1;
 357         /*
 358          * Set host fs and gs selectors.  Unfortunately, 22.2.3 does not
 359          * allow segment selectors with cpl > 0 or ti == 1.
 360          */
 361         vmx->host_state.ldt_sel = read_ldt();
 362         vmx->host_state.fs_gs_ldt_reload_needed = vmx->host_state.ldt_sel;
 363         vmx->host_state.fs_sel = read_fs();
 364         if (!(vmx->host_state.fs_sel & 7))
 365                 vmcs_write16(HOST_FS_SELECTOR, vmx->host_state.fs_sel);
 366         else {
 367                 vmcs_write16(HOST_FS_SELECTOR, 0);
 368                 vmx->host_state.fs_gs_ldt_reload_needed = 1;
 369         }
 370         vmx->host_state.gs_sel = read_gs();
 371         if (!(vmx->host_state.gs_sel & 7))
 372                 vmcs_write16(HOST_GS_SELECTOR, vmx->host_state.gs_sel);
 373         else {
 374                 vmcs_write16(HOST_GS_SELECTOR, 0);
 375                 vmx->host_state.fs_gs_ldt_reload_needed = 1;
 376         }
 377
 378 #ifdef CONFIG_X86_64
 379         vmcs_writel(HOST_FS_BASE, read_msr(MSR_FS_BASE));
 380         vmcs_writel(HOST_GS_BASE, read_msr(MSR_GS_BASE));
 381 #else
 382         vmcs_writel(HOST_FS_BASE, segment_base(vmx->host_state.fs_sel));
 383         vmcs_writel(HOST_GS_BASE, segment_base(vmx->host_state.gs_sel));
 384 #endif
 385
 386 #ifdef CONFIG_X86_64
 387         if (is_long_mode(vcpu)) {
 388                 save_msrs(vmx->host_msrs +
 389                           vmx->msr_offset_kernel_gs_base, 1);
 390         }
 391 #endif
 392         load_msrs(vmx->guest_msrs, vmx->save_nmsrs);
 393         if (msr_efer_need_save_restore(vcpu))
 394                 load_transition_efer(vcpu);
 395 }
 396
 397 static void vmx_load_host_state(struct kvm_vcpu *vcpu)
 398 {
 399         struct vcpu_vmx *vmx = to_vmx(vcpu);
 400
 401         if (!vmx->host_state.loaded)
 402                 return;
 403
 404         vmx->host_state.loaded = 0;
 405         if (vmx->host_state.fs_gs_ldt_reload_needed) {
 406                 load_ldt(vmx->host_state.ldt_sel);
 407                 load_fs(vmx->host_state.fs_sel);
 408                 /*
 409                  * If we have to reload gs, we must take care to
 410                  * preserve our gs base.
 411                  */
 412                 local_irq_disable();
 413                 load_gs(vmx->host_state.gs_sel);
 414 #ifdef CONFIG_X86_64
 415                 wrmsrl(MSR_GS_BASE, vmcs_readl(HOST_GS_BASE));
 416 #endif
 417                 local_irq_enable();
 418
 419                 reload_tss();
 420         }
 421         save_msrs(vmx->guest_msrs, vmx->save_nmsrs);
 422         load_msrs(vmx->host_msrs, vmx->save_nmsrs);
 423         if (msr_efer_need_save_restore(vcpu))
 424                 load_msrs(vmx->host_msrs + vmx->msr_offset_efer, 1);
 425 }
 426
 427 /*
 428  * Switches to specified vcpu, until a matching vcpu_put(), but assumes
 429  * vcpu mutex is already taken.
 430  */
 431 static void vmx_vcpu_load(struct kvm_vcpu *vcpu)
 432 {
 433         struct vcpu_vmx *vmx = to_vmx(vcpu);
 434         u64 phys_addr = __pa(vmx->vmcs);
 435         int cpu;
 436         u64 tsc_this, delta;
 437
 438         cpu = get_cpu();
 439
 440         if (vcpu->cpu != cpu)
 441                 vcpu_clear(vcpu);
 442
 443         if (per_cpu(current_vmcs, cpu) != vmx->vmcs) {
 444                 u8 error;
 445
 446                 per_cpu(current_vmcs, cpu) = vmx->vmcs;
 447                 asm volatile (ASM_VMX_VMPTRLD_RAX "; setna %0"
 448                               : "=g"(error) : "a"(&phys_addr), "m"(phys_addr)
 449                               : "cc");
 450                 if (error)
 451                         printk(KERN_ERR "kvm: vmptrld %p/%llx fail\n",
 452                                vmx->vmcs, phys_addr);
 453         }
 454
 455         if (vcpu->cpu != cpu) {
 456                 struct descriptor_table dt;
 457                 unsigned long sysenter_esp;
 458
 459                 vcpu->cpu = cpu;
 460                 /*
 461                  * Linux uses per-cpu TSS and GDT, so set these when switching
 462                  * processors.
 463                  */
 464                 vmcs_writel(HOST_TR_BASE, read_tr_base()); /* 22.2.4 */
 465                 get_gdt(&dt);
 466                 vmcs_writel(HOST_GDTR_BASE, dt.base);   /* 22.2.4 */
 467
 468                 rdmsrl(MSR_IA32_SYSENTER_ESP, sysenter_esp);
 469                 vmcs_writel(HOST_IA32_SYSENTER_ESP, sysenter_esp); /* 22.2.3 */
 470
 471                 /*
 472                  * Make sure the time stamp counter is monotonous.
 473                  */
 474                 rdtscll(tsc_this);
 475                 delta = vcpu->host_tsc - tsc_this;
 476                 vmcs_write64(TSC_OFFSET, vmcs_read64(TSC_OFFSET) + delta);
 477         }
 478 }
 479
 480 static void vmx_vcpu_put(struct kvm_vcpu *vcpu)
 481 {
 482         vmx_load_host_state(vcpu);
 483         kvm_put_guest_fpu(vcpu);
 484         put_cpu();
 485 }
 486
 487 static void vmx_fpu_activate(struct kvm_vcpu *vcpu)
 488 {
 489         if (vcpu->fpu_active)
 490                 return;
 491         vcpu->fpu_active = 1;
 492         vmcs_clear_bits(GUEST_CR0, X86_CR0_TS);
 493         if (vcpu->cr0 & X86_CR0_TS)
 494                 vmcs_set_bits(GUEST_CR0, X86_CR0_TS);
 495         update_exception_bitmap(vcpu);
 496 }
 497
 498 static void vmx_fpu_deactivate(struct kvm_vcpu *vcpu)
 499 {
 500         if (!vcpu->fpu_active)
 501                 return;
 502         vcpu->fpu_active = 0;
 503         vmcs_set_bits(GUEST_CR0, X86_CR0_TS);
 504         update_exception_bitmap(vcpu);
 505 }
 506
 507 static void vmx_vcpu_decache(struct kvm_vcpu *vcpu)
 508 {
 509         vcpu_clear(vcpu);
 510 }
 511
 512 static unsigned long vmx_get_rflags(struct kvm_vcpu *vcpu)
 513 {
 514         return vmcs_readl(GUEST_RFLAGS);
 515 }
 516
 517 static void vmx_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
 518 {
 519         vmcs_writel(GUEST_RFLAGS, rflags);
 520 }
 521
 522 static void skip_emulated_instruction(struct kvm_vcpu *vcpu)
 523 {
 524         unsigned long rip;
 525         u32 interruptibility;
 526
 527         rip = vmcs_readl(GUEST_RIP);
 528         rip += vmcs_read32(VM_EXIT_INSTRUCTION_LEN);
 529         vmcs_writel(GUEST_RIP, rip);
 530
 531         /*
 532          * We emulated an instruction, so temporary interrupt blocking
 533          * should be removed, if set.
 534          */
 535         interruptibility = vmcs_read32(GUEST_INTERRUPTIBILITY_INFO);
 536         if (interruptibility & 3)
 537                 vmcs_write32(GUEST_INTERRUPTIBILITY_INFO,
 538                              interruptibility & ~3);
 539         vcpu->interrupt_window_open = 1;
 540 }
 541
 542 static void vmx_inject_gp(struct kvm_vcpu *vcpu, unsigned error_code)
 543 {
 544         printk(KERN_DEBUG "inject_general_protection: rip 0x%lx\n",
 545                vmcs_readl(GUEST_RIP));
 546         vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE, error_code);
 547         vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
 548                      GP_VECTOR |
 549                      INTR_TYPE_EXCEPTION |
 550                      INTR_INFO_DELIEVER_CODE_MASK |
 551                      INTR_INFO_VALID_MASK);
 552 }
 553
 554 /*
 555  * Swap MSR entry in host/guest MSR entry array.
 556  */
 557 void move_msr_up(struct kvm_vcpu *vcpu, int from, int to)
 558 {
 559         struct vcpu_vmx *vmx = to_vmx(vcpu);
 560         struct kvm_msr_entry tmp;
 561
 562         tmp = vmx->guest_msrs[to];
 563         vmx->guest_msrs[to] = vmx->guest_msrs[from];
 564         vmx->guest_msrs[from] = tmp;
 565         tmp = vmx->host_msrs[to];
 566         vmx->host_msrs[to] = vmx->host_msrs[from];
 567         vmx->host_msrs[from] = tmp;
 568 }
 569
 570 /*
 571  * Set up the vmcs to automatically save and restore system
 572  * msrs.  Don't touch the 64-bit msrs if the guest is in legacy
 573  * mode, as fiddling with msrs is very expensive.
 574  */
 575 static void setup_msrs(struct kvm_vcpu *vcpu)
 576 {
 577         struct vcpu_vmx *vmx = to_vmx(vcpu);
 578         int save_nmsrs;
 579
 580         save_nmsrs = 0;
 581 #ifdef CONFIG_X86_64
 582         if (is_long_mode(vcpu)) {
 583                 int index;
 584
 585                 index = __find_msr_index(vcpu, MSR_SYSCALL_MASK);
 586                 if (index >= 0)
 587                         move_msr_up(vcpu, index, save_nmsrs++);
 588                 index = __find_msr_index(vcpu, MSR_LSTAR);
 589                 if (index >= 0)
 590                         move_msr_up(vcpu, index, save_nmsrs++);
 591                 index = __find_msr_index(vcpu, MSR_CSTAR);
 592                 if (index >= 0)
 593                         move_msr_up(vcpu, index, save_nmsrs++);
 594                 index = __find_msr_index(vcpu, MSR_KERNEL_GS_BASE);
 595                 if (index >= 0)
 596                         move_msr_up(vcpu, index, save_nmsrs++);
 597                 /*
 598                  * MSR_K6_STAR is only needed on long mode guests, and only
 599                  * if efer.sce is enabled.
 600                  */
 601                 index = __find_msr_index(vcpu, MSR_K6_STAR);
 602                 if ((index >= 0) && (vcpu->shadow_efer & EFER_SCE))
 603                         move_msr_up(vcpu, index, save_nmsrs++);
 604         }
 605 #endif
 606         vmx->save_nmsrs = save_nmsrs;
 607
 608 #ifdef CONFIG_X86_64
 609         vmx->msr_offset_kernel_gs_base =
 610                 __find_msr_index(vcpu, MSR_KERNEL_GS_BASE);
 611 #endif
 612         vmx->msr_offset_efer = __find_msr_index(vcpu, MSR_EFER);
 613 }
 614
 615 /*
 616  * reads and returns guest's timestamp counter "register"
 617  * guest_tsc = host_tsc + tsc_offset    -- 21.3
 618  */
 619 static u64 guest_read_tsc(void)
 620 {
 621         u64 host_tsc, tsc_offset;
 622
 623         rdtscll(host_tsc);
 624         tsc_offset = vmcs_read64(TSC_OFFSET);
 625         return host_tsc + tsc_offset;
 626 }
 627
 628 /*
 629  * writes 'guest_tsc' into guest's timestamp counter "register"
 630  * guest_tsc = host_tsc + tsc_offset ==> tsc_offset = guest_tsc - host_tsc
 631  */
 632 static void guest_write_tsc(u64 guest_tsc)
 633 {
 634         u64 host_tsc;
 635
 636         rdtscll(host_tsc);
 637         vmcs_write64(TSC_OFFSET, guest_tsc - host_tsc);
 638 }
 639
 640 /*
 641  * Reads an msr value (of 'msr_index') into 'pdata'.
 642  * Returns 0 on success, non-0 otherwise.
 643  * Assumes vcpu_load() was already called.
 644  */
 645 static int vmx_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
 646 {
 647         u64 data;
 648         struct kvm_msr_entry *msr;
 649
 650         if (!pdata) {
 651                 printk(KERN_ERR "BUG: get_msr called with NULL pdata\n");
 652                 return -EINVAL;
 653         }
 654
 655         switch (msr_index) {
 656 #ifdef CONFIG_X86_64
 657         case MSR_FS_BASE:
 658                 data = vmcs_readl(GUEST_FS_BASE);
 659                 break;
 660         case MSR_GS_BASE:
 661                 data = vmcs_readl(GUEST_GS_BASE);
 662                 break;
 663         case MSR_EFER:
 664                 return kvm_get_msr_common(vcpu, msr_index, pdata);
 665 #endif
 666         case MSR_IA32_TIME_STAMP_COUNTER:
 667                 data = guest_read_tsc();
 668                 break;
 669         case MSR_IA32_SYSENTER_CS:
 670                 data = vmcs_read32(GUEST_SYSENTER_CS);
 671                 break;
 672         case MSR_IA32_SYSENTER_EIP:
 673                 data = vmcs_readl(GUEST_SYSENTER_EIP);
 674                 break;
 675         case MSR_IA32_SYSENTER_ESP:
 676                 data = vmcs_readl(GUEST_SYSENTER_ESP);
 677                 break;
 678         default:
 679                 msr = find_msr_entry(vcpu, msr_index);
 680                 if (msr) {
 681                         data = msr->data;
 682                         break;
 683                 }
 684                 return kvm_get_msr_common(vcpu, msr_index, pdata);
 685         }
 686
 687         *pdata = data;
 688         return 0;
 689 }
 690
 691 /*
 692  * Writes msr value into into the appropriate "register".
 693  * Returns 0 on success, non-0 otherwise.
 694  * Assumes vcpu_load() was already called.
 695  */
 696 static int vmx_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
 697 {
 698         struct vcpu_vmx *vmx = to_vmx(vcpu);
 699         struct kvm_msr_entry *msr;
 700         int ret = 0;
 701
 702         switch (msr_index) {
 703 #ifdef CONFIG_X86_64
 704         case MSR_EFER:
 705                 ret = kvm_set_msr_common(vcpu, msr_index, data);
 706                 if (vmx->host_state.loaded)
 707                         load_transition_efer(vcpu);
 708                 break;
 709         case MSR_FS_BASE:
 710                 vmcs_writel(GUEST_FS_BASE, data);
 711                 break;
 712         case MSR_GS_BASE:
 713                 vmcs_writel(GUEST_GS_BASE, data);
 714                 break;
 715 #endif
 716         case MSR_IA32_SYSENTER_CS:
 717                 vmcs_write32(GUEST_SYSENTER_CS, data);
 718                 break;
 719         case MSR_IA32_SYSENTER_EIP:
 720                 vmcs_writel(GUEST_SYSENTER_EIP, data);
 721                 break;
 722         case MSR_IA32_SYSENTER_ESP:
 723                 vmcs_writel(GUEST_SYSENTER_ESP, data);
 724                 break;
 725         case MSR_IA32_TIME_STAMP_COUNTER:
 726                 guest_write_tsc(data);
 727                 break;
 728         default:
 729                 msr = find_msr_entry(vcpu, msr_index);
 730                 if (msr) {
 731                         msr->data = data;
 732                         if (vmx->host_state.loaded)
 733                                 load_msrs(vmx->guest_msrs, vmx->save_nmsrs);
 734                         break;
 735                 }
 736                 ret = kvm_set_msr_common(vcpu, msr_index, data);
 737         }
 738
 739         return ret;
 740 }
 741
 742 /*
 743  * Sync the rsp and rip registers into the vcpu structure.  This allows
 744  * registers to be accessed by indexing vcpu->regs.
 745  */
 746 static void vcpu_load_rsp_rip(struct kvm_vcpu *vcpu)
 747 {
 748         vcpu->regs[VCPU_REGS_RSP] = vmcs_readl(GUEST_RSP);
 749         vcpu->rip = vmcs_readl(GUEST_RIP);
 750 }
 751
 752 /*
 753  * Syncs rsp and rip back into the vmcs.  Should be called after possible
 754  * modification.
 755  */
 756 static void vcpu_put_rsp_rip(struct kvm_vcpu *vcpu)
 757 {
 758         vmcs_writel(GUEST_RSP, vcpu->regs[VCPU_REGS_RSP]);
 759         vmcs_writel(GUEST_RIP, vcpu->rip);
 760 }
 761
 762 static int set_guest_debug(struct kvm_vcpu *vcpu, struct kvm_debug_guest *dbg)
 763 {
 764         unsigned long dr7 = 0x400;
 765         int old_singlestep;
 766
 767         old_singlestep = vcpu->guest_debug.singlestep;
 768
 769         vcpu->guest_debug.enabled = dbg->enabled;
 770         if (vcpu->guest_debug.enabled) {
 771                 int i;
 772
 773                 dr7 |= 0x200;  /* exact */
 774                 for (i = 0; i < 4; ++i) {
 775                         if (!dbg->breakpoints[i].enabled)
 776                                 continue;
 777                         vcpu->guest_debug.bp[i] = dbg->breakpoints[i].address;
 778                         dr7 |= 2 << (i*2);    /* global enable */
 779                         dr7 |= 0 << (i*4+16); /* execution breakpoint */
 780                 }
 781
 782                 vcpu->guest_debug.singlestep = dbg->singlestep;
 783         } else
 784                 vcpu->guest_debug.singlestep = 0;
 785
 786         if (old_singlestep && !vcpu->guest_debug.singlestep) {
 787                 unsigned long flags;
 788
 789                 flags = vmcs_readl(GUEST_RFLAGS);
 790                 flags &= ~(X86_EFLAGS_TF | X86_EFLAGS_RF);
 791                 vmcs_writel(GUEST_RFLAGS, flags);
 792         }
 793
 794         update_exception_bitmap(vcpu);
 795         vmcs_writel(GUEST_DR7, dr7);
 796
 797         return 0;
 798 }
 799
 800 static __init int cpu_has_kvm_support(void)
 801 {
 802         unsigned long ecx = cpuid_ecx(1);
 803         return test_bit(5, &ecx); /* CPUID.1:ECX.VMX[bit 5] -> VT */
 804 }
 805
 806 static __init int vmx_disabled_by_bios(void)
 807 {
 808         u64 msr;
 809
 810         rdmsrl(MSR_IA32_FEATURE_CONTROL, msr);
 811         return (msr & (MSR_IA32_FEATURE_CONTROL_LOCKED |
 812                        MSR_IA32_FEATURE_CONTROL_VMXON_ENABLED))
 813             == MSR_IA32_FEATURE_CONTROL_LOCKED;
 814         /* locked but not enabled */
 815 }
 816
 817 static void hardware_enable(void *garbage)
 818 {
 819         int cpu = raw_smp_processor_id();
 820         u64 phys_addr = __pa(per_cpu(vmxarea, cpu));
 821         u64 old;
 822
 823         rdmsrl(MSR_IA32_FEATURE_CONTROL, old);
 824         if ((old & (MSR_IA32_FEATURE_CONTROL_LOCKED |
 825                     MSR_IA32_FEATURE_CONTROL_VMXON_ENABLED))
 826             != (MSR_IA32_FEATURE_CONTROL_LOCKED |
 827                 MSR_IA32_FEATURE_CONTROL_VMXON_ENABLED))
 828                 /* enable and lock */
 829                 wrmsrl(MSR_IA32_FEATURE_CONTROL, old |
 830                        MSR_IA32_FEATURE_CONTROL_LOCKED |
 831                        MSR_IA32_FEATURE_CONTROL_VMXON_ENABLED);
 832         write_cr4(read_cr4() | X86_CR4_VMXE); /* FIXME: not cpu hotplug safe */
 833         asm volatile (ASM_VMX_VMXON_RAX : : "a"(&phys_addr), "m"(phys_addr)
 834                       : "memory", "cc");
 835 }
 836
 837 static void hardware_disable(void *garbage)
 838 {
 839         asm volatile (ASM_VMX_VMXOFF : : : "cc");
 840 }
 841
 842 static __init void setup_vmcs_descriptor(void)
 843 {
 844         u32 vmx_msr_low, vmx_msr_high;
 845
 846         rdmsr(MSR_IA32_VMX_BASIC, vmx_msr_low, vmx_msr_high);
 847         vmcs_descriptor.size = vmx_msr_high & 0x1fff;
 848         vmcs_descriptor.order = get_order(vmcs_descriptor.size);
 849         vmcs_descriptor.revision_id = vmx_msr_low;
 850 }
 851
 852 static struct vmcs *alloc_vmcs_cpu(int cpu)
 853 {
 854         int node = cpu_to_node(cpu);
 855         struct page *pages;
 856         struct vmcs *vmcs;
 857
 858         pages = alloc_pages_node(node, GFP_KERNEL, vmcs_descriptor.order);
 859         if (!pages)
 860                 return NULL;
 861         vmcs = page_address(pages);
 862         memset(vmcs, 0, vmcs_descriptor.size);
 863         vmcs->revision_id = vmcs_descriptor.revision_id; /* vmcs revision id */
 864         return vmcs;
 865 }
 866
 867 static struct vmcs *alloc_vmcs(void)
 868 {
 869         return alloc_vmcs_cpu(raw_smp_processor_id());
 870 }
 871
 872 static void free_vmcs(struct vmcs *vmcs)
 873 {
 874         free_pages((unsigned long)vmcs, vmcs_descriptor.order);
 875 }
 876
 877 static void free_kvm_area(void)
 878 {
 879         int cpu;
 880
 881         for_each_online_cpu(cpu)
 882                 free_vmcs(per_cpu(vmxarea, cpu));
 883 }
 884
 885 extern struct vmcs *alloc_vmcs_cpu(int cpu);
 886
 887 static __init int alloc_kvm_area(void)
 888 {
 889         int cpu;
 890
 891         for_each_online_cpu(cpu) {
 892                 struct vmcs *vmcs;
 893
 894                 vmcs = alloc_vmcs_cpu(cpu);
 895                 if (!vmcs) {
 896                         free_kvm_area();
 897                         return -ENOMEM;
 898                 }
 899
 900                 per_cpu(vmxarea, cpu) = vmcs;
 901         }
 902         return 0;
 903 }
 904
 905 static __init int hardware_setup(void)
 906 {
 907         setup_vmcs_descriptor();
 908         return alloc_kvm_area();
 909 }
 910
 911 static __exit void hardware_unsetup(void)
 912 {
 913         free_kvm_area();
 914 }
 915
 916 static void fix_pmode_dataseg(int seg, struct kvm_save_segment *save)
 917 {
 918         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
 919
 920         if (vmcs_readl(sf->base) == save->base && (save->base & AR_S_MASK)) {
 921                 vmcs_write16(sf->selector, save->selector);
 922                 vmcs_writel(sf->base, save->base);
 923                 vmcs_write32(sf->limit, save->limit);
 924                 vmcs_write32(sf->ar_bytes, save->ar);
 925         } else {
 926                 u32 dpl = (vmcs_read16(sf->selector) & SELECTOR_RPL_MASK)
 927                         << AR_DPL_SHIFT;
 928                 vmcs_write32(sf->ar_bytes, 0x93 | dpl);
 929         }
 930 }
 931
 932 static void enter_pmode(struct kvm_vcpu *vcpu)
 933 {
 934         unsigned long flags;
 935
 936         vcpu->rmode.active = 0;
 937
 938         vmcs_writel(GUEST_TR_BASE, vcpu->rmode.tr.base);
 939         vmcs_write32(GUEST_TR_LIMIT, vcpu->rmode.tr.limit);
 940         vmcs_write32(GUEST_TR_AR_BYTES, vcpu->rmode.tr.ar);
 941
 942         flags = vmcs_readl(GUEST_RFLAGS);
 943         flags &= ~(IOPL_MASK | X86_EFLAGS_VM);
 944         flags |= (vcpu->rmode.save_iopl << IOPL_SHIFT);
 945         vmcs_writel(GUEST_RFLAGS, flags);
 946
 947         vmcs_writel(GUEST_CR4, (vmcs_readl(GUEST_CR4) & ~X86_CR4_VME) |
 948                         (vmcs_readl(CR4_READ_SHADOW) & X86_CR4_VME));
 949
 950         update_exception_bitmap(vcpu);
 951
 952         fix_pmode_dataseg(VCPU_SREG_ES, &vcpu->rmode.es);
 953         fix_pmode_dataseg(VCPU_SREG_DS, &vcpu->rmode.ds);
 954         fix_pmode_dataseg(VCPU_SREG_GS, &vcpu->rmode.gs);
 955         fix_pmode_dataseg(VCPU_SREG_FS, &vcpu->rmode.fs);
 956
 957         vmcs_write16(GUEST_SS_SELECTOR, 0);
 958         vmcs_write32(GUEST_SS_AR_BYTES, 0x93);
 959
 960         vmcs_write16(GUEST_CS_SELECTOR,
 961                      vmcs_read16(GUEST_CS_SELECTOR) & ~SELECTOR_RPL_MASK);
 962         vmcs_write32(GUEST_CS_AR_BYTES, 0x9b);
 963 }
 964
 965 static int rmode_tss_base(struct kvm* kvm)
 966 {
 967         gfn_t base_gfn = kvm->memslots[0].base_gfn + kvm->memslots[0].npages - 3;
 968         return base_gfn << PAGE_SHIFT;
 969 }
 970
 971 static void fix_rmode_seg(int seg, struct kvm_save_segment *save)
 972 {
 973         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
 974
 975         save->selector = vmcs_read16(sf->selector);
 976         save->base = vmcs_readl(sf->base);
 977         save->limit = vmcs_read32(sf->limit);
 978         save->ar = vmcs_read32(sf->ar_bytes);
 979         vmcs_write16(sf->selector, vmcs_readl(sf->base) >> 4);
 980         vmcs_write32(sf->limit, 0xffff);
 981         vmcs_write32(sf->ar_bytes, 0xf3);
 982 }
 983
 984 static void enter_rmode(struct kvm_vcpu *vcpu)
 985 {
 986         unsigned long flags;
 987
 988         vcpu->rmode.active = 1;
 989
 990         vcpu->rmode.tr.base = vmcs_readl(GUEST_TR_BASE);
 991         vmcs_writel(GUEST_TR_BASE, rmode_tss_base(vcpu->kvm));
 992
 993         vcpu->rmode.tr.limit = vmcs_read32(GUEST_TR_LIMIT);
 994         vmcs_write32(GUEST_TR_LIMIT, RMODE_TSS_SIZE - 1);
 995
 996         vcpu->rmode.tr.ar = vmcs_read32(GUEST_TR_AR_BYTES);
 997         vmcs_write32(GUEST_TR_AR_BYTES, 0x008b);
 998
 999         flags = vmcs_readl(GUEST_RFLAGS);
1000         vcpu->rmode.save_iopl = (flags & IOPL_MASK) >> IOPL_SHIFT;
1001
1002         flags |= IOPL_MASK | X86_EFLAGS_VM;
1003
1004         vmcs_writel(GUEST_RFLAGS, flags);
1005         vmcs_writel(GUEST_CR4, vmcs_readl(GUEST_CR4) | X86_CR4_VME);
1006         update_exception_bitmap(vcpu);
1007
1008         vmcs_write16(GUEST_SS_SELECTOR, vmcs_readl(GUEST_SS_BASE) >> 4);
1009         vmcs_write32(GUEST_SS_LIMIT, 0xffff);
1010         vmcs_write32(GUEST_SS_AR_BYTES, 0xf3);
1011
1012         vmcs_write32(GUEST_CS_AR_BYTES, 0xf3);
1013         vmcs_write32(GUEST_CS_LIMIT, 0xffff);
1014         if (vmcs_readl(GUEST_CS_BASE) == 0xffff0000)
1015                 vmcs_writel(GUEST_CS_BASE, 0xf0000);
1016         vmcs_write16(GUEST_CS_SELECTOR, vmcs_readl(GUEST_CS_BASE) >> 4);
1017
1018         fix_rmode_seg(VCPU_SREG_ES, &vcpu->rmode.es);
1019         fix_rmode_seg(VCPU_SREG_DS, &vcpu->rmode.ds);
1020         fix_rmode_seg(VCPU_SREG_GS, &vcpu->rmode.gs);
1021         fix_rmode_seg(VCPU_SREG_FS, &vcpu->rmode.fs);
1022
1023         init_rmode_tss(vcpu->kvm);
1024 }
1025
1026 #ifdef CONFIG_X86_64
1027
1028 static void enter_lmode(struct kvm_vcpu *vcpu)
1029 {
1030         u32 guest_tr_ar;
1031
1032         guest_tr_ar = vmcs_read32(GUEST_TR_AR_BYTES);
1033         if ((guest_tr_ar & AR_TYPE_MASK) != AR_TYPE_BUSY_64_TSS) {
1034                 printk(KERN_DEBUG "%s: tss fixup for long mode. \n",
1035                        __FUNCTION__);
1036                 vmcs_write32(GUEST_TR_AR_BYTES,
1037                              (guest_tr_ar & ~AR_TYPE_MASK)
1038                              | AR_TYPE_BUSY_64_TSS);
1039         }
1040
1041         vcpu->shadow_efer |= EFER_LMA;
1042
1043         find_msr_entry(vcpu, MSR_EFER)->data |= EFER_LMA | EFER_LME;
1044         vmcs_write32(VM_ENTRY_CONTROLS,
1045                      vmcs_read32(VM_ENTRY_CONTROLS)
1046                      | VM_ENTRY_CONTROLS_IA32E_MASK);
1047 }
1048
1049 static void exit_lmode(struct kvm_vcpu *vcpu)
1050 {
1051         vcpu->shadow_efer &= ~EFER_LMA;
1052
1053         vmcs_write32(VM_ENTRY_CONTROLS,
1054                      vmcs_read32(VM_ENTRY_CONTROLS)
1055                      & ~VM_ENTRY_CONTROLS_IA32E_MASK);
1056 }
1057
1058 #endif
1059
1060 static void vmx_decache_cr4_guest_bits(struct kvm_vcpu *vcpu)
1061 {
1062         vcpu->cr4 &= KVM_GUEST_CR4_MASK;
1063         vcpu->cr4 |= vmcs_readl(GUEST_CR4) & ~KVM_GUEST_CR4_MASK;
1064 }
1065
1066 static void vmx_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
1067 {
1068         vmx_fpu_deactivate(vcpu);
1069
1070         if (vcpu->rmode.active && (cr0 & X86_CR0_PE))
1071                 enter_pmode(vcpu);
1072
1073         if (!vcpu->rmode.active && !(cr0 & X86_CR0_PE))
1074                 enter_rmode(vcpu);
1075
1076 #ifdef CONFIG_X86_64
1077         if (vcpu->shadow_efer & EFER_LME) {
1078                 if (!is_paging(vcpu) && (cr0 & X86_CR0_PG))
1079                         enter_lmode(vcpu);
1080                 if (is_paging(vcpu) && !(cr0 & X86_CR0_PG))
1081                         exit_lmode(vcpu);
1082         }
1083 #endif
1084
1085         vmcs_writel(CR0_READ_SHADOW, cr0);
1086         vmcs_writel(GUEST_CR0,
1087                     (cr0 & ~KVM_GUEST_CR0_MASK) | KVM_VM_CR0_ALWAYS_ON);
1088         vcpu->cr0 = cr0;
1089
1090         if (!(cr0 & X86_CR0_TS) || !(cr0 & X86_CR0_PE))
1091                 vmx_fpu_activate(vcpu);
1092 }
1093
1094 static void vmx_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
1095 {
1096         vmcs_writel(GUEST_CR3, cr3);
1097         if (vcpu->cr0 & X86_CR0_PE)
1098                 vmx_fpu_deactivate(vcpu);
1099 }
1100
1101 static void vmx_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
1102 {
1103         vmcs_writel(CR4_READ_SHADOW, cr4);
1104         vmcs_writel(GUEST_CR4, cr4 | (vcpu->rmode.active ?
1105                     KVM_RMODE_VM_CR4_ALWAYS_ON : KVM_PMODE_VM_CR4_ALWAYS_ON));
1106         vcpu->cr4 = cr4;
1107 }
1108
1109 #ifdef CONFIG_X86_64
1110
1111 static void vmx_set_efer(struct kvm_vcpu *vcpu, u64 efer)
1112 {
1113         struct kvm_msr_entry *msr = find_msr_entry(vcpu, MSR_EFER);
1114
1115         vcpu->shadow_efer = efer;
1116         if (efer & EFER_LMA) {
1117                 vmcs_write32(VM_ENTRY_CONTROLS,
1118                                      vmcs_read32(VM_ENTRY_CONTROLS) |
1119                                      VM_ENTRY_CONTROLS_IA32E_MASK);
1120                 msr->data = efer;
1121
1122         } else {
1123                 vmcs_write32(VM_ENTRY_CONTROLS,
1124                                      vmcs_read32(VM_ENTRY_CONTROLS) &
1125                                      ~VM_ENTRY_CONTROLS_IA32E_MASK);
1126
1127                 msr->data = efer & ~EFER_LME;
1128         }
1129         setup_msrs(vcpu);
1130 }
1131
1132 #endif
1133
1134 static u64 vmx_get_segment_base(struct kvm_vcpu *vcpu, int seg)
1135 {
1136         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
1137
1138         return vmcs_readl(sf->base);
1139 }
1140
1141 static void vmx_get_segment(struct kvm_vcpu *vcpu,
1142                             struct kvm_segment *var, int seg)
1143 {
1144         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
1145         u32 ar;
1146
1147         var->base = vmcs_readl(sf->base);
1148         var->limit = vmcs_read32(sf->limit);
1149         var->selector = vmcs_read16(sf->selector);
1150         ar = vmcs_read32(sf->ar_bytes);
1151         if (ar & AR_UNUSABLE_MASK)
1152                 ar = 0;
1153         var->type = ar & 15;
1154         var->s = (ar >> 4) & 1;
1155         var->dpl = (ar >> 5) & 3;
1156         var->present = (ar >> 7) & 1;
1157         var->avl = (ar >> 12) & 1;
1158         var->l = (ar >> 13) & 1;
1159         var->db = (ar >> 14) & 1;
1160         var->g = (ar >> 15) & 1;
1161         var->unusable = (ar >> 16) & 1;
1162 }
1163
1164 static u32 vmx_segment_access_rights(struct kvm_segment *var)
1165 {
1166         u32 ar;
1167
1168         if (var->unusable)
1169                 ar = 1 << 16;
1170         else {
1171                 ar = var->type & 15;
1172                 ar |= (var->s & 1) << 4;
1173                 ar |= (var->dpl & 3) << 5;
1174                 ar |= (var->present & 1) << 7;
1175                 ar |= (var->avl & 1) << 12;
1176                 ar |= (var->l & 1) << 13;
1177                 ar |= (var->db & 1) << 14;
1178                 ar |= (var->g & 1) << 15;
1179         }
1180         if (ar == 0) /* a 0 value means unusable */
1181                 ar = AR_UNUSABLE_MASK;
1182
1183         return ar;
1184 }
1185
1186 static void vmx_set_segment(struct kvm_vcpu *vcpu,
1187                             struct kvm_segment *var, int seg)
1188 {
1189         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
1190         u32 ar;
1191
1192         if (vcpu->rmode.active && seg == VCPU_SREG_TR) {
1193                 vcpu->rmode.tr.selector = var->selector;
1194                 vcpu->rmode.tr.base = var->base;
1195                 vcpu->rmode.tr.limit = var->limit;
1196                 vcpu->rmode.tr.ar = vmx_segment_access_rights(var);
1197                 return;
1198         }
1199         vmcs_writel(sf->base, var->base);
1200         vmcs_write32(sf->limit, var->limit);
1201         vmcs_write16(sf->selector, var->selector);
1202         if (vcpu->rmode.active && var->s) {
1203                 /*
1204                  * Hack real-mode segments into vm86 compatibility.
1205                  */
1206                 if (var->base == 0xffff0000 && var->selector == 0xf000)
1207                         vmcs_writel(sf->base, 0xf0000);
1208                 ar = 0xf3;
1209         } else
1210                 ar = vmx_segment_access_rights(var);
1211         vmcs_write32(sf->ar_bytes, ar);
1212 }
1213
1214 static void vmx_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
1215 {
1216         u32 ar = vmcs_read32(GUEST_CS_AR_BYTES);
1217
1218         *db = (ar >> 14) & 1;
1219         *l = (ar >> 13) & 1;
1220 }
1221
1222 static void vmx_get_idt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
1223 {
1224         dt->limit = vmcs_read32(GUEST_IDTR_LIMIT);
1225         dt->base = vmcs_readl(GUEST_IDTR_BASE);
1226 }
1227
1228 static void vmx_set_idt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
1229 {
1230         vmcs_write32(GUEST_IDTR_LIMIT, dt->limit);
1231         vmcs_writel(GUEST_IDTR_BASE, dt->base);
1232 }
1233
1234 static void vmx_get_gdt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
1235 {
1236         dt->limit = vmcs_read32(GUEST_GDTR_LIMIT);
1237         dt->base = vmcs_readl(GUEST_GDTR_BASE);
1238 }
1239
1240 static void vmx_set_gdt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
1241 {
1242         vmcs_write32(GUEST_GDTR_LIMIT, dt->limit);
1243         vmcs_writel(GUEST_GDTR_BASE, dt->base);
1244 }
1245
1246 static int init_rmode_tss(struct kvm* kvm)
1247 {
1248         struct page *p1, *p2, *p3;
1249         gfn_t fn = rmode_tss_base(kvm) >> PAGE_SHIFT;
1250         char *page;
1251
1252         p1 = gfn_to_page(kvm, fn++);
1253         p2 = gfn_to_page(kvm, fn++);
1254         p3 = gfn_to_page(kvm, fn);
1255
1256         if (!p1 || !p2 || !p3) {
1257                 kvm_printf(kvm,"%s: gfn_to_page failed\n", __FUNCTION__);
1258                 return 0;
1259         }
1260
1261         page = kmap_atomic(p1, KM_USER0);
1262         clear_page(page);
1263         *(u16*)(page + 0x66) = TSS_BASE_SIZE + TSS_REDIRECTION_SIZE;
1264         kunmap_atomic(page, KM_USER0);
1265
1266         page = kmap_atomic(p2, KM_USER0);
1267         clear_page(page);
1268         kunmap_atomic(page, KM_USER0);
1269
1270         page = kmap_atomic(p3, KM_USER0);
1271         clear_page(page);
1272         *(page + RMODE_TSS_SIZE - 2 * PAGE_SIZE - 1) = ~0;
1273         kunmap_atomic(page, KM_USER0);
1274
1275         return 1;
1276 }
1277
1278 static void vmcs_write32_fixedbits(u32 msr, u32 vmcs_field, u32 val)
1279 {
1280         u32 msr_high, msr_low;
1281
1282         rdmsr(msr, msr_low, msr_high);
1283
1284         val &= msr_high;
1285         val |= msr_low;
1286         vmcs_write32(vmcs_field, val);
1287 }
1288
1289 static void seg_setup(int seg)
1290 {
1291         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
1292
1293         vmcs_write16(sf->selector, 0);
1294         vmcs_writel(sf->base, 0);
1295         vmcs_write32(sf->limit, 0xffff);
1296         vmcs_write32(sf->ar_bytes, 0x93);
1297 }
1298
1299 /*
1300  * Sets up the vmcs for emulated real mode.
1301  */
1302 static int vmx_vcpu_setup(struct kvm_vcpu *vcpu)
1303 {
1304         struct vcpu_vmx *vmx = to_vmx(vcpu);
1305         u32 host_sysenter_cs;
1306         u32 junk;
1307         unsigned long a;
1308         struct descriptor_table dt;
1309         int i;
1310         int ret = 0;
1311         unsigned long kvm_vmx_return;
1312
1313         if (!init_rmode_tss(vcpu->kvm)) {
1314                 ret = -ENOMEM;
1315                 goto out;
1316         }
1317
1318         memset(vcpu->regs, 0, sizeof(vcpu->regs));
1319         vcpu->regs[VCPU_REGS_RDX] = get_rdx_init_val();
1320         vcpu->cr8 = 0;
1321         vcpu->apic_base = 0xfee00000 | MSR_IA32_APICBASE_ENABLE;
1322         if (vcpu->vcpu_id == 0)
1323                 vcpu->apic_base |= MSR_IA32_APICBASE_BSP;
1324
1325         fx_init(vcpu);
1326
1327         /*
1328          * GUEST_CS_BASE should really be 0xffff0000, but VT vm86 mode
1329          * insists on having GUEST_CS_BASE == GUEST_CS_SELECTOR << 4.  Sigh.
1330          */
1331         vmcs_write16(GUEST_CS_SELECTOR, 0xf000);
1332         vmcs_writel(GUEST_CS_BASE, 0x000f0000);
1333         vmcs_write32(GUEST_CS_LIMIT, 0xffff);
1334         vmcs_write32(GUEST_CS_AR_BYTES, 0x9b);
1335
1336         seg_setup(VCPU_SREG_DS);
1337         seg_setup(VCPU_SREG_ES);
1338         seg_setup(VCPU_SREG_FS);
1339         seg_setup(VCPU_SREG_GS);
1340         seg_setup(VCPU_SREG_SS);
1341
1342         vmcs_write16(GUEST_TR_SELECTOR, 0);
1343         vmcs_writel(GUEST_TR_BASE, 0);
1344         vmcs_write32(GUEST_TR_LIMIT, 0xffff);
1345         vmcs_write32(GUEST_TR_AR_BYTES, 0x008b);
1346
1347         vmcs_write16(GUEST_LDTR_SELECTOR, 0);
1348         vmcs_writel(GUEST_LDTR_BASE, 0);
1349         vmcs_write32(GUEST_LDTR_LIMIT, 0xffff);
1350         vmcs_write32(GUEST_LDTR_AR_BYTES, 0x00082);
1351
1352         vmcs_write32(GUEST_SYSENTER_CS, 0);
1353         vmcs_writel(GUEST_SYSENTER_ESP, 0);
1354         vmcs_writel(GUEST_SYSENTER_EIP, 0);
1355
1356         vmcs_writel(GUEST_RFLAGS, 0x02);
1357         vmcs_writel(GUEST_RIP, 0xfff0);
1358         vmcs_writel(GUEST_RSP, 0);
1359
1360         //todo: dr0 = dr1 = dr2 = dr3 = 0; dr6 = 0xffff0ff0
1361         vmcs_writel(GUEST_DR7, 0x400);
1362
1363         vmcs_writel(GUEST_GDTR_BASE, 0);
1364         vmcs_write32(GUEST_GDTR_LIMIT, 0xffff);
1365
1366         vmcs_writel(GUEST_IDTR_BASE, 0);
1367         vmcs_write32(GUEST_IDTR_LIMIT, 0xffff);
1368
1369         vmcs_write32(GUEST_ACTIVITY_STATE, 0);
1370         vmcs_write32(GUEST_INTERRUPTIBILITY_INFO, 0);
1371         vmcs_write32(GUEST_PENDING_DBG_EXCEPTIONS, 0);
1372
1373         /* I/O */
1374         vmcs_write64(IO_BITMAP_A, page_to_phys(vmx_io_bitmap_a));
1375         vmcs_write64(IO_BITMAP_B, page_to_phys(vmx_io_bitmap_b));
1376
1377         guest_write_tsc(0);
1378
1379         vmcs_write64(VMCS_LINK_POINTER, -1ull); /* 22.3.1.5 */
1380
1381         /* Special registers */
1382         vmcs_write64(GUEST_IA32_DEBUGCTL, 0);
1383
1384         /* Control */
1385         vmcs_write32_fixedbits(MSR_IA32_VMX_PINBASED_CTLS,
1386                                PIN_BASED_VM_EXEC_CONTROL,
1387                                PIN_BASED_EXT_INTR_MASK   /* 20.6.1 */
1388                                | PIN_BASED_NMI_EXITING   /* 20.6.1 */
1389                         );
1390         vmcs_write32_fixedbits(MSR_IA32_VMX_PROCBASED_CTLS,
1391                                CPU_BASED_VM_EXEC_CONTROL,
1392                                CPU_BASED_HLT_EXITING         /* 20.6.2 */
1393                                | CPU_BASED_CR8_LOAD_EXITING    /* 20.6.2 */
1394                                | CPU_BASED_CR8_STORE_EXITING   /* 20.6.2 */
1395                                | CPU_BASED_USE_IO_BITMAPS  /* 20.6.2 */
1396                                | CPU_BASED_MOV_DR_EXITING
1397                                | CPU_BASED_USE_TSC_OFFSETING   /* 21.3 */
1398                         );
1399
1400         vmcs_write32(PAGE_FAULT_ERROR_CODE_MASK, 0);
1401         vmcs_write32(PAGE_FAULT_ERROR_CODE_MATCH, 0);
1402         vmcs_write32(CR3_TARGET_COUNT, 0);           /* 22.2.1 */
1403
1404         vmcs_writel(HOST_CR0, read_cr0());  /* 22.2.3 */
1405         vmcs_writel(HOST_CR4, read_cr4());  /* 22.2.3, 22.2.5 */
1406         vmcs_writel(HOST_CR3, read_cr3());  /* 22.2.3  FIXME: shadow tables */
1407
1408         vmcs_write16(HOST_CS_SELECTOR, __KERNEL_CS);  /* 22.2.4 */
1409         vmcs_write16(HOST_DS_SELECTOR, __KERNEL_DS);  /* 22.2.4 */
1410         vmcs_write16(HOST_ES_SELECTOR, __KERNEL_DS);  /* 22.2.4 */
1411         vmcs_write16(HOST_FS_SELECTOR, read_fs());    /* 22.2.4 */
1412         vmcs_write16(HOST_GS_SELECTOR, read_gs());    /* 22.2.4 */
1413         vmcs_write16(HOST_SS_SELECTOR, __KERNEL_DS);  /* 22.2.4 */
1414 #ifdef CONFIG_X86_64
1415         rdmsrl(MSR_FS_BASE, a);
1416         vmcs_writel(HOST_FS_BASE, a); /* 22.2.4 */
1417         rdmsrl(MSR_GS_BASE, a);
1418         vmcs_writel(HOST_GS_BASE, a); /* 22.2.4 */
1419 #else
1420         vmcs_writel(HOST_FS_BASE, 0); /* 22.2.4 */
1421         vmcs_writel(HOST_GS_BASE, 0); /* 22.2.4 */
1422 #endif
1423
1424         vmcs_write16(HOST_TR_SELECTOR, GDT_ENTRY_TSS*8);  /* 22.2.4 */
1425
1426         get_idt(&dt);
1427         vmcs_writel(HOST_IDTR_BASE, dt.base);   /* 22.2.4 */
1428
1429         asm ("mov $.Lkvm_vmx_return, %0" : "=r"(kvm_vmx_return));
1430         vmcs_writel(HOST_RIP, kvm_vmx_return); /* 22.2.5 */
1431         vmcs_write32(VM_EXIT_MSR_STORE_COUNT, 0);
1432         vmcs_write32(VM_EXIT_MSR_LOAD_COUNT, 0);
1433         vmcs_write32(VM_ENTRY_MSR_LOAD_COUNT, 0);
1434
1435         rdmsr(MSR_IA32_SYSENTER_CS, host_sysenter_cs, junk);
1436         vmcs_write32(HOST_IA32_SYSENTER_CS, host_sysenter_cs);
1437         rdmsrl(MSR_IA32_SYSENTER_ESP, a);
1438         vmcs_writel(HOST_IA32_SYSENTER_ESP, a);   /* 22.2.3 */
1439         rdmsrl(MSR_IA32_SYSENTER_EIP, a);
1440         vmcs_writel(HOST_IA32_SYSENTER_EIP, a);   /* 22.2.3 */
1441
1442         for (i = 0; i < NR_VMX_MSR; ++i) {
1443                 u32 index = vmx_msr_index[i];
1444                 u32 data_low, data_high;
1445                 u64 data;
1446                 int j = vmx->nmsrs;
1447
1448                 if (rdmsr_safe(index, &data_low, &data_high) < 0)
1449                         continue;
1450                 if (wrmsr_safe(index, data_low, data_high) < 0)
1451                         continue;
1452                 data = data_low | ((u64)data_high << 32);
1453                 vmx->host_msrs[j].index = index;
1454                 vmx->host_msrs[j].reserved = 0;
1455                 vmx->host_msrs[j].data = data;
1456                 vmx->guest_msrs[j] = vmx->host_msrs[j];
1457                 ++vmx->nmsrs;
1458         }
1459
1460         setup_msrs(vcpu);
1461
1462         vmcs_write32_fixedbits(MSR_IA32_VMX_EXIT_CTLS, VM_EXIT_CONTROLS,
1463                                (HOST_IS_64 << 9));  /* 22.2,1, 20.7.1 */
1464
1465         /* 22.2.1, 20.8.1 */
1466         vmcs_write32_fixedbits(MSR_IA32_VMX_ENTRY_CTLS,
1467                                VM_ENTRY_CONTROLS, 0);
1468         vmcs_write32(VM_ENTRY_INTR_INFO_FIELD, 0);  /* 22.2.1 */
1469
1470 #ifdef CONFIG_X86_64
1471         vmcs_writel(VIRTUAL_APIC_PAGE_ADDR, 0);
1472         vmcs_writel(TPR_THRESHOLD, 0);
1473 #endif
1474
1475         vmcs_writel(CR0_GUEST_HOST_MASK, ~0UL);
1476         vmcs_writel(CR4_GUEST_HOST_MASK, KVM_GUEST_CR4_MASK);
1477
1478         vcpu->cr0 = 0x60000010;
1479         vmx_set_cr0(vcpu, vcpu->cr0); // enter rmode
1480         vmx_set_cr4(vcpu, 0);
1481 #ifdef CONFIG_X86_64
1482         vmx_set_efer(vcpu, 0);
1483 #endif
1484         vmx_fpu_activate(vcpu);
1485         update_exception_bitmap(vcpu);
1486
1487         return 0;
1488
1489 out:
1490         return ret;
1491 }
1492
1493 static void inject_rmode_irq(struct kvm_vcpu *vcpu, int irq)
1494 {
1495         u16 ent[2];
1496         u16 cs;
1497         u16 ip;
1498         unsigned long flags;
1499         unsigned long ss_base = vmcs_readl(GUEST_SS_BASE);
1500         u16 sp =  vmcs_readl(GUEST_RSP);
1501         u32 ss_limit = vmcs_read32(GUEST_SS_LIMIT);
1502
1503         if (sp > ss_limit || sp < 6 ) {
1504                 vcpu_printf(vcpu, "%s: #SS, rsp 0x%lx ss 0x%lx limit 0x%x\n",
1505                             __FUNCTION__,
1506                             vmcs_readl(GUEST_RSP),
1507                             vmcs_readl(GUEST_SS_BASE),
1508                             vmcs_read32(GUEST_SS_LIMIT));
1509                 return;
1510         }
1511
1512         if (kvm_read_guest(vcpu, irq * sizeof(ent), sizeof(ent), &ent) !=
1513                                                                 sizeof(ent)) {
1514                 vcpu_printf(vcpu, "%s: read guest err\n", __FUNCTION__);
1515                 return;
1516         }
1517
1518         flags =  vmcs_readl(GUEST_RFLAGS);
1519         cs =  vmcs_readl(GUEST_CS_BASE) >> 4;
1520         ip =  vmcs_readl(GUEST_RIP);
1521
1522
1523         if (kvm_write_guest(vcpu, ss_base + sp - 2, 2, &flags) != 2 ||
1524             kvm_write_guest(vcpu, ss_base + sp - 4, 2, &cs) != 2 ||
1525             kvm_write_guest(vcpu, ss_base + sp - 6, 2, &ip) != 2) {
1526                 vcpu_printf(vcpu, "%s: write guest err\n", __FUNCTION__);
1527                 return;
1528         }
1529
1530         vmcs_writel(GUEST_RFLAGS, flags &
1531                     ~( X86_EFLAGS_IF | X86_EFLAGS_AC | X86_EFLAGS_TF));
1532         vmcs_write16(GUEST_CS_SELECTOR, ent[1]) ;
1533         vmcs_writel(GUEST_CS_BASE, ent[1] << 4);
1534         vmcs_writel(GUEST_RIP, ent[0]);
1535         vmcs_writel(GUEST_RSP, (vmcs_readl(GUEST_RSP) & ~0xffff) | (sp - 6));
1536 }
1537
1538 static void kvm_do_inject_irq(struct kvm_vcpu *vcpu)
1539 {
1540         int word_index = __ffs(vcpu->irq_summary);
1541         int bit_index = __ffs(vcpu->irq_pending[word_index]);
1542         int irq = word_index * BITS_PER_LONG + bit_index;
1543
1544         clear_bit(bit_index, &vcpu->irq_pending[word_index]);
1545         if (!vcpu->irq_pending[word_index])
1546                 clear_bit(word_index, &vcpu->irq_summary);
1547
1548         if (vcpu->rmode.active) {
1549                 inject_rmode_irq(vcpu, irq);
1550                 return;
1551         }
1552         vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
1553                         irq | INTR_TYPE_EXT_INTR | INTR_INFO_VALID_MASK);
1554 }
1555
1556
1557 static void do_interrupt_requests(struct kvm_vcpu *vcpu,
1558                                        struct kvm_run *kvm_run)
1559 {
1560         u32 cpu_based_vm_exec_control;
1561
1562         vcpu->interrupt_window_open =
1563                 ((vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_IF) &&
1564                  (vmcs_read32(GUEST_INTERRUPTIBILITY_INFO) & 3) == 0);
1565
1566         if (vcpu->interrupt_window_open &&
1567             vcpu->irq_summary &&
1568             !(vmcs_read32(VM_ENTRY_INTR_INFO_FIELD) & INTR_INFO_VALID_MASK))
1569                 /*
1570                  * If interrupts enabled, and not blocked by sti or mov ss. Good.
1571                  */
1572                 kvm_do_inject_irq(vcpu);
1573
1574         cpu_based_vm_exec_control = vmcs_read32(CPU_BASED_VM_EXEC_CONTROL);
1575         if (!vcpu->interrupt_window_open &&
1576             (vcpu->irq_summary || kvm_run->request_interrupt_window))
1577                 /*
1578                  * Interrupts blocked.  Wait for unblock.
1579                  */
1580                 cpu_based_vm_exec_control |= CPU_BASED_VIRTUAL_INTR_PENDING;
1581         else
1582                 cpu_based_vm_exec_control &= ~CPU_BASED_VIRTUAL_INTR_PENDING;
1583         vmcs_write32(CPU_BASED_VM_EXEC_CONTROL, cpu_based_vm_exec_control);
1584 }
1585
1586 static void kvm_guest_debug_pre(struct kvm_vcpu *vcpu)
1587 {
1588         struct kvm_guest_debug *dbg = &vcpu->guest_debug;
1589
1590         set_debugreg(dbg->bp[0], 0);
1591         set_debugreg(dbg->bp[1], 1);
1592         set_debugreg(dbg->bp[2], 2);
1593         set_debugreg(dbg->bp[3], 3);
1594
1595         if (dbg->singlestep) {
1596                 unsigned long flags;
1597
1598                 flags = vmcs_readl(GUEST_RFLAGS);
1599                 flags |= X86_EFLAGS_TF | X86_EFLAGS_RF;
1600                 vmcs_writel(GUEST_RFLAGS, flags);
1601         }
1602 }
1603
1604 static int handle_rmode_exception(struct kvm_vcpu *vcpu,
1605                                   int vec, u32 err_code)
1606 {
1607         if (!vcpu->rmode.active)
1608                 return 0;
1609
1610         /*
1611          * Instruction with address size override prefix opcode 0x67
1612          * Cause the #SS fault with 0 error code in VM86 mode.
1613          */
1614         if (((vec == GP_VECTOR) || (vec == SS_VECTOR)) && err_code == 0)
1615                 if (emulate_instruction(vcpu, NULL, 0, 0) == EMULATE_DONE)
1616                         return 1;
1617         return 0;
1618 }
1619
1620 static int handle_exception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1621 {
1622         u32 intr_info, error_code;
1623         unsigned long cr2, rip;
1624         u32 vect_info;
1625         enum emulation_result er;
1626         int r;
1627
1628         vect_info = vmcs_read32(IDT_VECTORING_INFO_FIELD);
1629         intr_info = vmcs_read32(VM_EXIT_INTR_INFO);
1630
1631         if ((vect_info & VECTORING_INFO_VALID_MASK) &&
1632                                                 !is_page_fault(intr_info)) {
1633                 printk(KERN_ERR "%s: unexpected, vectoring info 0x%x "
1634                        "intr info 0x%x\n", __FUNCTION__, vect_info, intr_info);
1635         }
1636
1637         if (is_external_interrupt(vect_info)) {
1638                 int irq = vect_info & VECTORING_INFO_VECTOR_MASK;
1639                 set_bit(irq, vcpu->irq_pending);
1640                 set_bit(irq / BITS_PER_LONG, &vcpu->irq_summary);
1641         }
1642
1643         if ((intr_info & INTR_INFO_INTR_TYPE_MASK) == 0x200) { /* nmi */
1644                 asm ("int $2");
1645                 return 1;
1646         }
1647
1648         if (is_no_device(intr_info)) {
1649                 vmx_fpu_activate(vcpu);
1650                 return 1;
1651         }
1652
1653         error_code = 0;
1654         rip = vmcs_readl(GUEST_RIP);
1655         if (intr_info & INTR_INFO_DELIEVER_CODE_MASK)
1656                 error_code = vmcs_read32(VM_EXIT_INTR_ERROR_CODE);
1657         if (is_page_fault(intr_info)) {
1658                 cr2 = vmcs_readl(EXIT_QUALIFICATION);
1659
1660                 spin_lock(&vcpu->kvm->lock);
1661                 r = kvm_mmu_page_fault(vcpu, cr2, error_code);
1662                 if (r < 0) {
1663                         spin_unlock(&vcpu->kvm->lock);
1664                         return r;
1665                 }
1666                 if (!r) {
1667                         spin_unlock(&vcpu->kvm->lock);
1668                         return 1;
1669                 }
1670
1671                 er = emulate_instruction(vcpu, kvm_run, cr2, error_code);
1672                 spin_unlock(&vcpu->kvm->lock);
1673
1674                 switch (er) {
1675                 case EMULATE_DONE:
1676                         return 1;
1677                 case EMULATE_DO_MMIO:
1678                         ++vcpu->stat.mmio_exits;
1679                         return 0;
1680                  case EMULATE_FAIL:
1681                         vcpu_printf(vcpu, "%s: emulate fail\n", __FUNCTION__);
1682                         break;
1683                 default:
1684                         BUG();
1685                 }
1686         }
1687
1688         if (vcpu->rmode.active &&
1689             handle_rmode_exception(vcpu, intr_info & INTR_INFO_VECTOR_MASK,
1690                                                                 error_code)) {
1691                 if (vcpu->halt_request) {
1692                         vcpu->halt_request = 0;
1693                         return kvm_emulate_halt(vcpu);
1694                 }
1695                 return 1;
1696         }
1697
1698         if ((intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK)) == (INTR_TYPE_EXCEPTION | 1)) {
1699                 kvm_run->exit_reason = KVM_EXIT_DEBUG;
1700                 return 0;
1701         }
1702         kvm_run->exit_reason = KVM_EXIT_EXCEPTION;
1703         kvm_run->ex.exception = intr_info & INTR_INFO_VECTOR_MASK;
1704         kvm_run->ex.error_code = error_code;
1705         return 0;
1706 }
1707
1708 static int handle_external_interrupt(struct kvm_vcpu *vcpu,
1709                                      struct kvm_run *kvm_run)
1710 {
1711         ++vcpu->stat.irq_exits;
1712         return 1;
1713 }
1714
1715 static int handle_triple_fault(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1716 {
1717         kvm_run->exit_reason = KVM_EXIT_SHUTDOWN;
1718         return 0;
1719 }
1720
1721 static int get_io_count(struct kvm_vcpu *vcpu, unsigned long *count)
1722 {
1723         u64 inst;
1724         gva_t rip;
1725         int countr_size;
1726         int i, n;
1727
1728         if ((vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_VM)) {
1729                 countr_size = 2;
1730         } else {
1731                 u32 cs_ar = vmcs_read32(GUEST_CS_AR_BYTES);
1732
1733                 countr_size = (cs_ar & AR_L_MASK) ? 8:
1734                               (cs_ar & AR_DB_MASK) ? 4: 2;
1735         }
1736
1737         rip =  vmcs_readl(GUEST_RIP);
1738         if (countr_size != 8)
1739                 rip += vmcs_readl(GUEST_CS_BASE);
1740
1741         n = kvm_read_guest(vcpu, rip, sizeof(inst), &inst);
1742
1743         for (i = 0; i < n; i++) {
1744                 switch (((u8*)&inst)[i]) {
1745                 case 0xf0:
1746                 case 0xf2:
1747                 case 0xf3:
1748                 case 0x2e:
1749                 case 0x36:
1750                 case 0x3e:
1751                 case 0x26:
1752                 case 0x64:
1753                 case 0x65:
1754                 case 0x66:
1755                         break;
1756                 case 0x67:
1757                         countr_size = (countr_size == 2) ? 4: (countr_size >> 1);
1758                 default:
1759                         goto done;
1760                 }
1761         }
1762         return 0;
1763 done:
1764         countr_size *= 8;
1765         *count = vcpu->regs[VCPU_REGS_RCX] & (~0ULL >> (64 - countr_size));
1766         //printk("cx: %lx\n", vcpu->regs[VCPU_REGS_RCX]);
1767         return 1;
1768 }
1769
1770 static int handle_io(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1771 {
1772         u64 exit_qualification;
1773         int size, down, in, string, rep;
1774         unsigned port;
1775         unsigned long count;
1776         gva_t address;
1777
1778         ++vcpu->stat.io_exits;
1779         exit_qualification = vmcs_read64(EXIT_QUALIFICATION);
1780         in = (exit_qualification & 8) != 0;
1781         size = (exit_qualification & 7) + 1;
1782         string = (exit_qualification & 16) != 0;
1783         down = (vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_DF) != 0;
1784         count = 1;
1785         rep = (exit_qualification & 32) != 0;
1786         port = exit_qualification >> 16;
1787         address = 0;
1788         if (string) {
1789                 if (rep && !get_io_count(vcpu, &count))
1790                         return 1;
1791                 address = vmcs_readl(GUEST_LINEAR_ADDRESS);
1792         }
1793         return kvm_setup_pio(vcpu, kvm_run, in, size, count, string, down,
1794                              address, rep, port);
1795 }
1796
1797 static void
1798 vmx_patch_hypercall(struct kvm_vcpu *vcpu, unsigned char *hypercall)
1799 {
1800         /*
1801          * Patch in the VMCALL instruction:
1802          */
1803         hypercall[0] = 0x0f;
1804         hypercall[1] = 0x01;
1805         hypercall[2] = 0xc1;
1806         hypercall[3] = 0xc3;
1807 }
1808
1809 static int handle_cr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1810 {
1811         u64 exit_qualification;
1812         int cr;
1813         int reg;
1814
1815         exit_qualification = vmcs_read64(EXIT_QUALIFICATION);
1816         cr = exit_qualification & 15;
1817         reg = (exit_qualification >> 8) & 15;
1818         switch ((exit_qualification >> 4) & 3) {
1819         case 0: /* mov to cr */
1820                 switch (cr) {
1821                 case 0:
1822                         vcpu_load_rsp_rip(vcpu);
1823                         set_cr0(vcpu, vcpu->regs[reg]);
1824                         skip_emulated_instruction(vcpu);
1825                         return 1;
1826                 case 3:
1827                         vcpu_load_rsp_rip(vcpu);
1828                         set_cr3(vcpu, vcpu->regs[reg]);
1829                         skip_emulated_instruction(vcpu);
1830                         return 1;
1831                 case 4:
1832                         vcpu_load_rsp_rip(vcpu);
1833                         set_cr4(vcpu, vcpu->regs[reg]);
1834                         skip_emulated_instruction(vcpu);
1835                         return 1;
1836                 case 8:
1837                         vcpu_load_rsp_rip(vcpu);
1838                         set_cr8(vcpu, vcpu->regs[reg]);
1839                         skip_emulated_instruction(vcpu);
1840                         return 1;
1841                 };
1842                 break;
1843         case 2: /* clts */
1844                 vcpu_load_rsp_rip(vcpu);
1845                 vmx_fpu_deactivate(vcpu);
1846                 vcpu->cr0 &= ~X86_CR0_TS;
1847                 vmcs_writel(CR0_READ_SHADOW, vcpu->cr0);
1848                 vmx_fpu_activate(vcpu);
1849                 skip_emulated_instruction(vcpu);
1850                 return 1;
1851         case 1: /*mov from cr*/
1852                 switch (cr) {
1853                 case 3:
1854                         vcpu_load_rsp_rip(vcpu);
1855                         vcpu->regs[reg] = vcpu->cr3;
1856                         vcpu_put_rsp_rip(vcpu);
1857                         skip_emulated_instruction(vcpu);
1858                         return 1;
1859                 case 8:
1860                         vcpu_load_rsp_rip(vcpu);
1861                         vcpu->regs[reg] = vcpu->cr8;
1862                         vcpu_put_rsp_rip(vcpu);
1863                         skip_emulated_instruction(vcpu);
1864                         return 1;
1865                 }
1866                 break;
1867         case 3: /* lmsw */
1868                 lmsw(vcpu, (exit_qualification >> LMSW_SOURCE_DATA_SHIFT) & 0x0f);
1869
1870                 skip_emulated_instruction(vcpu);
1871                 return 1;
1872         default:
1873                 break;
1874         }
1875         kvm_run->exit_reason = 0;
1876         printk(KERN_ERR "kvm: unhandled control register: op %d cr %d\n",
1877                (int)(exit_qualification >> 4) & 3, cr);
1878         return 0;
1879 }
1880
1881 static int handle_dr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1882 {
1883         u64 exit_qualification;
1884         unsigned long val;
1885         int dr, reg;
1886
1887         /*
1888          * FIXME: this code assumes the host is debugging the guest.
1889          *        need to deal with guest debugging itself too.
1890          */
1891         exit_qualification = vmcs_read64(EXIT_QUALIFICATION);
1892         dr = exit_qualification & 7;
1893         reg = (exit_qualification >> 8) & 15;
1894         vcpu_load_rsp_rip(vcpu);
1895         if (exit_qualification & 16) {
1896                 /* mov from dr */
1897                 switch (dr) {
1898                 case 6:
1899                         val = 0xffff0ff0;
1900                         break;
1901                 case 7:
1902                         val = 0x400;
1903                         break;
1904                 default:
1905                         val = 0;
1906                 }
1907                 vcpu->regs[reg] = val;
1908         } else {
1909                 /* mov to dr */
1910         }
1911         vcpu_put_rsp_rip(vcpu);
1912         skip_emulated_instruction(vcpu);
1913         return 1;
1914 }
1915
1916 static int handle_cpuid(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1917 {
1918         kvm_emulate_cpuid(vcpu);
1919         return 1;
1920 }
1921
1922 static int handle_rdmsr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1923 {
1924         u32 ecx = vcpu->regs[VCPU_REGS_RCX];
1925         u64 data;
1926
1927         if (vmx_get_msr(vcpu, ecx, &data)) {
1928                 vmx_inject_gp(vcpu, 0);
1929                 return 1;
1930         }
1931
1932         /* FIXME: handling of bits 32:63 of rax, rdx */
1933         vcpu->regs[VCPU_REGS_RAX] = data & -1u;
1934         vcpu->regs[VCPU_REGS_RDX] = (data >> 32) & -1u;
1935         skip_emulated_instruction(vcpu);
1936         return 1;
1937 }
1938
1939 static int handle_wrmsr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1940 {
1941         u32 ecx = vcpu->regs[VCPU_REGS_RCX];
1942         u64 data = (vcpu->regs[VCPU_REGS_RAX] & -1u)
1943                 | ((u64)(vcpu->regs[VCPU_REGS_RDX] & -1u) << 32);
1944
1945         if (vmx_set_msr(vcpu, ecx, data) != 0) {
1946                 vmx_inject_gp(vcpu, 0);
1947                 return 1;
1948         }
1949
1950         skip_emulated_instruction(vcpu);
1951         return 1;
1952 }
1953
1954 static void post_kvm_run_save(struct kvm_vcpu *vcpu,
1955                               struct kvm_run *kvm_run)
1956 {
1957         kvm_run->if_flag = (vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_IF) != 0;
1958         kvm_run->cr8 = vcpu->cr8;
1959         kvm_run->apic_base = vcpu->apic_base;
1960         kvm_run->ready_for_interrupt_injection = (vcpu->interrupt_window_open &&
1961                                                   vcpu->irq_summary == 0);
1962 }
1963
1964 static int handle_interrupt_window(struct kvm_vcpu *vcpu,
1965                                    struct kvm_run *kvm_run)
1966 {
1967         /*
1968          * If the user space waits to inject interrupts, exit as soon as
1969          * possible
1970          */
1971         if (kvm_run->request_interrupt_window &&
1972             !vcpu->irq_summary) {
1973                 kvm_run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
1974                 ++vcpu->stat.irq_window_exits;
1975                 return 0;
1976         }
1977         return 1;
1978 }
1979
1980 static int handle_halt(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1981 {
1982         skip_emulated_instruction(vcpu);
1983         return kvm_emulate_halt(vcpu);
1984 }
1985
1986 static int handle_vmcall(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1987 {
1988         skip_emulated_instruction(vcpu);
1989         return kvm_hypercall(vcpu, kvm_run);
1990 }
1991
1992 /*
1993  * The exit handlers return 1 if the exit was handled fully and guest execution
1994  * may resume.  Otherwise they set the kvm_run parameter to indicate what needs
1995  * to be done to userspace and return 0.
1996  */
1997 static int (*kvm_vmx_exit_handlers[])(struct kvm_vcpu *vcpu,
1998                                       struct kvm_run *kvm_run) = {
1999         [EXIT_REASON_EXCEPTION_NMI]           = handle_exception,
2000         [EXIT_REASON_EXTERNAL_INTERRUPT]      = handle_external_interrupt,
2001         [EXIT_REASON_TRIPLE_FAULT]            = handle_triple_fault,
2002         [EXIT_REASON_IO_INSTRUCTION]          = handle_io,
2003         [EXIT_REASON_CR_ACCESS]               = handle_cr,
2004         [EXIT_REASON_DR_ACCESS]               = handle_dr,
2005         [EXIT_REASON_CPUID]                   = handle_cpuid,
2006         [EXIT_REASON_MSR_READ]                = handle_rdmsr,
2007         [EXIT_REASON_MSR_WRITE]               = handle_wrmsr,
2008         [EXIT_REASON_PENDING_INTERRUPT]       = handle_interrupt_window,
2009         [EXIT_REASON_HLT]                     = handle_halt,
2010         [EXIT_REASON_VMCALL]                  = handle_vmcall,
2011 };
2012
2013 static const int kvm_vmx_max_exit_handlers =
2014         ARRAY_SIZE(kvm_vmx_exit_handlers);
2015
2016 /*
2017  * The guest has exited.  See if we can fix it or if we need userspace
2018  * assistance.
2019  */
2020 static int kvm_handle_exit(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
2021 {
2022         u32 vectoring_info = vmcs_read32(IDT_VECTORING_INFO_FIELD);
2023         u32 exit_reason = vmcs_read32(VM_EXIT_REASON);
2024
2025         if ( (vectoring_info & VECTORING_INFO_VALID_MASK) &&
2026                                 exit_reason != EXIT_REASON_EXCEPTION_NMI )
2027                 printk(KERN_WARNING "%s: unexpected, valid vectoring info and "
2028                        "exit reason is 0x%x\n", __FUNCTION__, exit_reason);
2029         if (exit_reason < kvm_vmx_max_exit_handlers
2030             && kvm_vmx_exit_handlers[exit_reason])
2031                 return kvm_vmx_exit_handlers[exit_reason](vcpu, kvm_run);
2032         else {
2033                 kvm_run->exit_reason = KVM_EXIT_UNKNOWN;
2034                 kvm_run->hw.hardware_exit_reason = exit_reason;
2035         }
2036         return 0;
2037 }
2038
2039 /*
2040  * Check if userspace requested an interrupt window, and that the
2041  * interrupt window is open.
2042  *
2043  * No need to exit to userspace if we already have an interrupt queued.
2044  */
2045 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu,
2046                                           struct kvm_run *kvm_run)
2047 {
2048         return (!vcpu->irq_summary &&
2049                 kvm_run->request_interrupt_window &&
2050                 vcpu->interrupt_window_open &&
2051                 (vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_IF));
2052 }
2053
2054 static void vmx_flush_tlb(struct kvm_vcpu *vcpu)
2055 {
2056 }
2057
2058 static int vmx_vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
2059 {
2060         struct vcpu_vmx *vmx = to_vmx(vcpu);
2061         u8 fail;
2062         int r;
2063
2064 preempted:
2065         if (vcpu->guest_debug.enabled)
2066                 kvm_guest_debug_pre(vcpu);
2067
2068 again:
2069         r = kvm_mmu_reload(vcpu);
2070         if (unlikely(r))
2071                 goto out;
2072
2073         if (!vcpu->mmio_read_completed)
2074                 do_interrupt_requests(vcpu, kvm_run);
2075
2076         vmx_save_host_state(vcpu);
2077         kvm_load_guest_fpu(vcpu);
2078
2079         /*
2080          * Loading guest fpu may have cleared host cr0.ts
2081          */
2082         vmcs_writel(HOST_CR0, read_cr0());
2083
2084         local_irq_disable();
2085
2086         vcpu->guest_mode = 1;
2087         if (vcpu->requests)
2088                 if (test_and_clear_bit(KVM_TLB_FLUSH, &vcpu->requests))
2089                     vmx_flush_tlb(vcpu);
2090
2091         asm (
2092                 /* Store host registers */
2093 #ifdef CONFIG_X86_64
2094                 "push %%rax; push %%rbx; push %%rdx;"
2095                 "push %%rsi; push %%rdi; push %%rbp;"
2096                 "push %%r8;  push %%r9;  push %%r10; push %%r11;"
2097                 "push %%r12; push %%r13; push %%r14; push %%r15;"
2098                 "push %%rcx \n\t"
2099                 ASM_VMX_VMWRITE_RSP_RDX "\n\t"
2100 #else
2101                 "pusha; push %%ecx \n\t"
2102                 ASM_VMX_VMWRITE_RSP_RDX "\n\t"
2103 #endif
2104                 /* Check if vmlaunch of vmresume is needed */
2105                 "cmp $0, %1 \n\t"
2106                 /* Load guest registers.  Don't clobber flags. */
2107 #ifdef CONFIG_X86_64
2108                 "mov %c[cr2](%3), %%rax \n\t"
2109                 "mov %%rax, %%cr2 \n\t"
2110                 "mov %c[rax](%3), %%rax \n\t"
2111                 "mov %c[rbx](%3), %%rbx \n\t"
2112                 "mov %c[rdx](%3), %%rdx \n\t"
2113                 "mov %c[rsi](%3), %%rsi \n\t"
2114                 "mov %c[rdi](%3), %%rdi \n\t"
2115                 "mov %c[rbp](%3), %%rbp \n\t"
2116                 "mov %c[r8](%3),  %%r8  \n\t"
2117                 "mov %c[r9](%3),  %%r9  \n\t"
2118                 "mov %c[r10](%3), %%r10 \n\t"
2119                 "mov %c[r11](%3), %%r11 \n\t"
2120                 "mov %c[r12](%3), %%r12 \n\t"
2121                 "mov %c[r13](%3), %%r13 \n\t"
2122                 "mov %c[r14](%3), %%r14 \n\t"
2123                 "mov %c[r15](%3), %%r15 \n\t"
2124                 "mov %c[rcx](%3), %%rcx \n\t" /* kills %3 (rcx) */
2125 #else
2126                 "mov %c[cr2](%3), %%eax \n\t"
2127                 "mov %%eax,   %%cr2 \n\t"
2128                 "mov %c[rax](%3), %%eax \n\t"
2129                 "mov %c[rbx](%3), %%ebx \n\t"
2130                 "mov %c[rdx](%3), %%edx \n\t"
2131                 "mov %c[rsi](%3), %%esi \n\t"
2132                 "mov %c[rdi](%3), %%edi \n\t"
2133                 "mov %c[rbp](%3), %%ebp \n\t"
2134                 "mov %c[rcx](%3), %%ecx \n\t" /* kills %3 (ecx) */
2135 #endif
2136                 /* Enter guest mode */
2137                 "jne .Llaunched \n\t"
2138                 ASM_VMX_VMLAUNCH "\n\t"
2139                 "jmp .Lkvm_vmx_return \n\t"
2140                 ".Llaunched: " ASM_VMX_VMRESUME "\n\t"
2141                 ".Lkvm_vmx_return: "
2142                 /* Save guest registers, load host registers, keep flags */
2143 #ifdef CONFIG_X86_64
2144                 "xchg %3,     (%%rsp) \n\t"
2145                 "mov %%rax, %c[rax](%3) \n\t"
2146                 "mov %%rbx, %c[rbx](%3) \n\t"
2147                 "pushq (%%rsp); popq %c[rcx](%3) \n\t"
2148                 "mov %%rdx, %c[rdx](%3) \n\t"
2149                 "mov %%rsi, %c[rsi](%3) \n\t"
2150                 "mov %%rdi, %c[rdi](%3) \n\t"
2151                 "mov %%rbp, %c[rbp](%3) \n\t"
2152                 "mov %%r8,  %c[r8](%3) \n\t"
2153                 "mov %%r9,  %c[r9](%3) \n\t"
2154                 "mov %%r10, %c[r10](%3) \n\t"
2155                 "mov %%r11, %c[r11](%3) \n\t"
2156                 "mov %%r12, %c[r12](%3) \n\t"
2157                 "mov %%r13, %c[r13](%3) \n\t"
2158                 "mov %%r14, %c[r14](%3) \n\t"
2159                 "mov %%r15, %c[r15](%3) \n\t"
2160                 "mov %%cr2, %%rax   \n\t"
2161                 "mov %%rax, %c[cr2](%3) \n\t"
2162                 "mov (%%rsp), %3 \n\t"
2163
2164                 "pop  %%rcx; pop  %%r15; pop  %%r14; pop  %%r13; pop  %%r12;"
2165                 "pop  %%r11; pop  %%r10; pop  %%r9;  pop  %%r8;"
2166                 "pop  %%rbp; pop  %%rdi; pop  %%rsi;"
2167                 "pop  %%rdx; pop  %%rbx; pop  %%rax \n\t"
2168 #else
2169                 "xchg %3, (%%esp) \n\t"
2170                 "mov %%eax, %c[rax](%3) \n\t"
2171                 "mov %%ebx, %c[rbx](%3) \n\t"
2172                 "pushl (%%esp); popl %c[rcx](%3) \n\t"
2173                 "mov %%edx, %c[rdx](%3) \n\t"
2174                 "mov %%esi, %c[rsi](%3) \n\t"
2175                 "mov %%edi, %c[rdi](%3) \n\t"
2176                 "mov %%ebp, %c[rbp](%3) \n\t"
2177                 "mov %%cr2, %%eax  \n\t"
2178                 "mov %%eax, %c[cr2](%3) \n\t"
2179                 "mov (%%esp), %3 \n\t"
2180
2181                 "pop %%ecx; popa \n\t"
2182 #endif
2183                 "setbe %0 \n\t"
2184               : "=q" (fail)
2185               : "r"(vmx->launched), "d"((unsigned long)HOST_RSP),
2186                 "c"(vcpu),
2187                 [rax]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RAX])),
2188                 [rbx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RBX])),
2189                 [rcx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RCX])),
2190                 [rdx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RDX])),
2191                 [rsi]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RSI])),
2192                 [rdi]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RDI])),
2193                 [rbp]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RBP])),
2194 #ifdef CONFIG_X86_64
2195                 [r8 ]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R8 ])),
2196                 [r9 ]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R9 ])),
2197                 [r10]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R10])),
2198                 [r11]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R11])),
2199                 [r12]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R12])),
2200                 [r13]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R13])),
2201                 [r14]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R14])),
2202                 [r15]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R15])),
2203 #endif
2204                 [cr2]"i"(offsetof(struct kvm_vcpu, cr2))
2205               : "cc", "memory" );
2206
2207         vcpu->guest_mode = 0;
2208         local_irq_enable();
2209
2210         ++vcpu->stat.exits;
2211
2212         vcpu->interrupt_window_open = (vmcs_read32(GUEST_INTERRUPTIBILITY_INFO) & 3) == 0;
2213
2214         asm ("mov %0, %%ds; mov %0, %%es" : : "r"(__USER_DS));
2215
2216         if (unlikely(fail)) {
2217                 kvm_run->exit_reason = KVM_EXIT_FAIL_ENTRY;
2218                 kvm_run->fail_entry.hardware_entry_failure_reason
2219                         = vmcs_read32(VM_INSTRUCTION_ERROR);
2220                 r = 0;
2221                 goto out;
2222         }
2223         /*
2224          * Profile KVM exit RIPs:
2225          */
2226         if (unlikely(prof_on == KVM_PROFILING))
2227                 profile_hit(KVM_PROFILING, (void *)vmcs_readl(GUEST_RIP));
2228
2229         vmx->launched = 1;
2230         r = kvm_handle_exit(kvm_run, vcpu);
2231         if (r > 0) {
2232                 /* Give scheduler a change to reschedule. */
2233                 if (signal_pending(current)) {
2234                         r = -EINTR;
2235                         kvm_run->exit_reason = KVM_EXIT_INTR;
2236                         ++vcpu->stat.signal_exits;
2237                         goto out;
2238                 }
2239
2240                 if (dm_request_for_irq_injection(vcpu, kvm_run)) {
2241                         r = -EINTR;
2242                         kvm_run->exit_reason = KVM_EXIT_INTR;
2243                         ++vcpu->stat.request_irq_exits;
2244                         goto out;
2245                 }
2246                 if (!need_resched()) {
2247                         ++vcpu->stat.light_exits;
2248                         goto again;
2249                 }
2250         }
2251
2252 out:
2253         if (r > 0) {
2254                 kvm_resched(vcpu);
2255                 goto preempted;
2256         }
2257
2258         post_kvm_run_save(vcpu, kvm_run);
2259         return r;
2260 }
2261
2262 static void vmx_inject_page_fault(struct kvm_vcpu *vcpu,
2263                                   unsigned long addr,
2264                                   u32 err_code)
2265 {
2266         u32 vect_info = vmcs_read32(IDT_VECTORING_INFO_FIELD);
2267
2268         ++vcpu->stat.pf_guest;
2269
2270         if (is_page_fault(vect_info)) {
2271                 printk(KERN_DEBUG "inject_page_fault: "
2272                        "double fault 0x%lx @ 0x%lx\n",
2273                        addr, vmcs_readl(GUEST_RIP));
2274                 vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE, 0);
2275                 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
2276                              DF_VECTOR |
2277                              INTR_TYPE_EXCEPTION |
2278                              INTR_INFO_DELIEVER_CODE_MASK |
2279                              INTR_INFO_VALID_MASK);
2280                 return;
2281         }
2282         vcpu->cr2 = addr;
2283         vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE, err_code);
2284         vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
2285                      PF_VECTOR |
2286                      INTR_TYPE_EXCEPTION |
2287                      INTR_INFO_DELIEVER_CODE_MASK |
2288                      INTR_INFO_VALID_MASK);
2289
2290 }
2291
2292 static void vmx_free_vmcs(struct kvm_vcpu *vcpu)
2293 {
2294         struct vcpu_vmx *vmx = to_vmx(vcpu);
2295
2296         if (vmx->vmcs) {
2297                 on_each_cpu(__vcpu_clear, vcpu, 0, 1);
2298                 free_vmcs(vmx->vmcs);
2299                 vmx->vmcs = NULL;
2300         }
2301 }
2302
2303 static void vmx_free_vcpu(struct kvm_vcpu *vcpu)
2304 {
2305         struct vcpu_vmx *vmx = to_vmx(vcpu);
2306
2307         vmx_free_vmcs(vcpu);
2308         kfree(vmx->host_msrs);
2309         kfree(vmx->guest_msrs);
2310         kvm_vcpu_uninit(vcpu);
2311         kfree(vmx);
2312 }
2313
2314 static struct kvm_vcpu *vmx_create_vcpu(struct kvm *kvm, unsigned int id)
2315 {
2316         int err;
2317         struct vcpu_vmx *vmx = kzalloc(sizeof(*vmx), GFP_KERNEL);
2318
2319         if (!vmx)
2320                 return ERR_PTR(-ENOMEM);
2321
2322         err = kvm_vcpu_init(&vmx->vcpu, kvm, id);
2323         if (err)
2324                 goto free_vcpu;
2325
2326         vmx->guest_msrs = kmalloc(PAGE_SIZE, GFP_KERNEL);
2327         if (!vmx->guest_msrs) {
2328                 err = -ENOMEM;
2329                 goto uninit_vcpu;
2330         }
2331
2332         vmx->host_msrs = kmalloc(PAGE_SIZE, GFP_KERNEL);
2333         if (!vmx->host_msrs)
2334                 goto free_guest_msrs;
2335
2336         vmx->vmcs = alloc_vmcs();
2337         if (!vmx->vmcs)
2338                 goto free_msrs;
2339
2340         vmcs_clear(vmx->vmcs);
2341
2342         vmx_vcpu_load(&vmx->vcpu);
2343         err = vmx_vcpu_setup(&vmx->vcpu);
2344         vmx_vcpu_put(&vmx->vcpu);
2345         if (err)
2346                 goto free_vmcs;
2347
2348         return &vmx->vcpu;
2349
2350 free_vmcs:
2351         free_vmcs(vmx->vmcs);
2352 free_msrs:
2353         kfree(vmx->host_msrs);
2354 free_guest_msrs:
2355         kfree(vmx->guest_msrs);
2356 uninit_vcpu:
2357         kvm_vcpu_uninit(&vmx->vcpu);
2358 free_vcpu:
2359         kfree(vmx);
2360         return ERR_PTR(err);
2361 }
2362
2363 static struct kvm_arch_ops vmx_arch_ops = {
2364         .cpu_has_kvm_support = cpu_has_kvm_support,
2365         .disabled_by_bios = vmx_disabled_by_bios,
2366         .hardware_setup = hardware_setup,
2367         .hardware_unsetup = hardware_unsetup,
2368         .hardware_enable = hardware_enable,
2369         .hardware_disable = hardware_disable,
2370
2371         .vcpu_create = vmx_create_vcpu,
2372         .vcpu_free = vmx_free_vcpu,
2373
2374         .vcpu_load = vmx_vcpu_load,
2375         .vcpu_put = vmx_vcpu_put,
2376         .vcpu_decache = vmx_vcpu_decache,
2377
2378         .set_guest_debug = set_guest_debug,
2379         .get_msr = vmx_get_msr,
2380         .set_msr = vmx_set_msr,
2381         .get_segment_base = vmx_get_segment_base,
2382         .get_segment = vmx_get_segment,
2383         .set_segment = vmx_set_segment,
2384         .get_cs_db_l_bits = vmx_get_cs_db_l_bits,
2385         .decache_cr4_guest_bits = vmx_decache_cr4_guest_bits,
2386         .set_cr0 = vmx_set_cr0,
2387         .set_cr3 = vmx_set_cr3,
2388         .set_cr4 = vmx_set_cr4,
2389 #ifdef CONFIG_X86_64
2390         .set_efer = vmx_set_efer,
2391 #endif
2392         .get_idt = vmx_get_idt,
2393         .set_idt = vmx_set_idt,
2394         .get_gdt = vmx_get_gdt,
2395         .set_gdt = vmx_set_gdt,
2396         .cache_regs = vcpu_load_rsp_rip,
2397         .decache_regs = vcpu_put_rsp_rip,
2398         .get_rflags = vmx_get_rflags,
2399         .set_rflags = vmx_set_rflags,
2400
2401         .tlb_flush = vmx_flush_tlb,
2402         .inject_page_fault = vmx_inject_page_fault,
2403
2404         .inject_gp = vmx_inject_gp,
2405
2406         .run = vmx_vcpu_run,
2407         .skip_emulated_instruction = skip_emulated_instruction,
2408         .patch_hypercall = vmx_patch_hypercall,
2409 };
2410
2411 static int __init vmx_init(void)
2412 {
2413         void *iova;
2414         int r;
2415
2416         vmx_io_bitmap_a = alloc_page(GFP_KERNEL | __GFP_HIGHMEM);
2417         if (!vmx_io_bitmap_a)
2418                 return -ENOMEM;
2419
2420         vmx_io_bitmap_b = alloc_page(GFP_KERNEL | __GFP_HIGHMEM);
2421         if (!vmx_io_bitmap_b) {
2422                 r = -ENOMEM;
2423                 goto out;
2424         }
2425
2426         /*
2427          * Allow direct access to the PC debug port (it is often used for I/O
2428          * delays, but the vmexits simply slow things down).
2429          */
2430         iova = kmap(vmx_io_bitmap_a);
2431         memset(iova, 0xff, PAGE_SIZE);
2432         clear_bit(0x80, iova);
2433         kunmap(vmx_io_bitmap_a);
2434
2435         iova = kmap(vmx_io_bitmap_b);
2436         memset(iova, 0xff, PAGE_SIZE);
2437         kunmap(vmx_io_bitmap_b);
2438
2439         r = kvm_init_arch(&vmx_arch_ops, THIS_MODULE);
2440         if (r)
2441                 goto out1;
2442
2443         return 0;
2444
2445 out1:
2446         __free_page(vmx_io_bitmap_b);
2447 out:
2448         __free_page(vmx_io_bitmap_a);
2449         return r;
2450 }
2451
2452 static void __exit vmx_exit(void)
2453 {
2454         __free_page(vmx_io_bitmap_b);
2455         __free_page(vmx_io_bitmap_a);
2456
2457         kvm_exit_arch();
2458 }
2459
2460 module_init(vmx_init)
2461 module_exit(vmx_exit)