err.no Git - linux-2.6/blob - drivers/kvm/vmx.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * This module enables machines with Intel VT-x extensions to run virtual
   5  * machines without emulation or binary translation.
   6  *
   7  * Copyright (C) 2006 Qumranet, Inc.
   8  *
   9  * Authors:
  10  *   Avi Kivity   <avi@qumranet.com>
  11  *   Yaniv Kamay  <yaniv@qumranet.com>
  12  *
  13  * This work is licensed under the terms of the GNU GPL, version 2.  See
  14  * the COPYING file in the top-level directory.
  15  *
  16  */
  17
  18 #include "kvm.h"
  19 #include "vmx.h"
  20 #include <linux/module.h>
  21 #include <linux/kernel.h>
  22 #include <linux/mm.h>
  23 #include <linux/highmem.h>
  24 #include <linux/profile.h>
  25 #include <linux/sched.h>
  26 #include <asm/io.h>
  27 #include <asm/desc.h>
  28
  29 #include "segment_descriptor.h"
  30
  31 MODULE_AUTHOR("Qumranet");
  32 MODULE_LICENSE("GPL");
  33
  34 static DEFINE_PER_CPU(struct vmcs *, vmxarea);
  35 static DEFINE_PER_CPU(struct vmcs *, current_vmcs);
  36
  37 static struct page *vmx_io_bitmap_a;
  38 static struct page *vmx_io_bitmap_b;
  39
  40 #ifdef CONFIG_X86_64
  41 #define HOST_IS_64 1
  42 #else
  43 #define HOST_IS_64 0
  44 #endif
  45
  46 static struct vmcs_descriptor {
  47         int size;
  48         int order;
  49         u32 revision_id;
  50 } vmcs_descriptor;
  51
  52 #define VMX_SEGMENT_FIELD(seg)                                  \
  53         [VCPU_SREG_##seg] = {                                   \
  54                 .selector = GUEST_##seg##_SELECTOR,             \
  55                 .base = GUEST_##seg##_BASE,                     \
  56                 .limit = GUEST_##seg##_LIMIT,                   \
  57                 .ar_bytes = GUEST_##seg##_AR_BYTES,             \
  58         }
  59
  60 static struct kvm_vmx_segment_field {
  61         unsigned selector;
  62         unsigned base;
  63         unsigned limit;
  64         unsigned ar_bytes;
  65 } kvm_vmx_segment_fields[] = {
  66         VMX_SEGMENT_FIELD(CS),
  67         VMX_SEGMENT_FIELD(DS),
  68         VMX_SEGMENT_FIELD(ES),
  69         VMX_SEGMENT_FIELD(FS),
  70         VMX_SEGMENT_FIELD(GS),
  71         VMX_SEGMENT_FIELD(SS),
  72         VMX_SEGMENT_FIELD(TR),
  73         VMX_SEGMENT_FIELD(LDTR),
  74 };
  75
  76 /*
  77  * Keep MSR_K6_STAR at the end, as setup_msrs() will try to optimize it
  78  * away by decrementing the array size.
  79  */
  80 static const u32 vmx_msr_index[] = {
  81 #ifdef CONFIG_X86_64
  82         MSR_SYSCALL_MASK, MSR_LSTAR, MSR_CSTAR, MSR_KERNEL_GS_BASE,
  83 #endif
  84         MSR_EFER, MSR_K6_STAR,
  85 };
  86 #define NR_VMX_MSR ARRAY_SIZE(vmx_msr_index)
  87
  88 #ifdef CONFIG_X86_64
  89 static unsigned msr_offset_kernel_gs_base;
  90 #define NR_64BIT_MSRS 4
  91 /*
  92  * avoid save/load MSR_SYSCALL_MASK and MSR_LSTAR by std vt
  93  * mechanism (cpu bug AA24)
  94  */
  95 #define NR_BAD_MSRS 2
  96 #else
  97 #define NR_64BIT_MSRS 0
  98 #define NR_BAD_MSRS 0
  99 #endif
 100
 101 static inline int is_page_fault(u32 intr_info)
 102 {
 103         return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK |
 104                              INTR_INFO_VALID_MASK)) ==
 105                 (INTR_TYPE_EXCEPTION | PF_VECTOR | INTR_INFO_VALID_MASK);
 106 }
 107
 108 static inline int is_no_device(u32 intr_info)
 109 {
 110         return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK |
 111                              INTR_INFO_VALID_MASK)) ==
 112                 (INTR_TYPE_EXCEPTION | NM_VECTOR | INTR_INFO_VALID_MASK);
 113 }
 114
 115 static inline int is_external_interrupt(u32 intr_info)
 116 {
 117         return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VALID_MASK))
 118                 == (INTR_TYPE_EXT_INTR | INTR_INFO_VALID_MASK);
 119 }
 120
 121 static struct vmx_msr_entry *find_msr_entry(struct kvm_vcpu *vcpu, u32 msr)
 122 {
 123         int i;
 124
 125         for (i = 0; i < vcpu->nmsrs; ++i)
 126                 if (vcpu->guest_msrs[i].index == msr)
 127                         return &vcpu->guest_msrs[i];
 128         return NULL;
 129 }
 130
 131 static void vmcs_clear(struct vmcs *vmcs)
 132 {
 133         u64 phys_addr = __pa(vmcs);
 134         u8 error;
 135
 136         asm volatile (ASM_VMX_VMCLEAR_RAX "; setna %0"
 137                       : "=g"(error) : "a"(&phys_addr), "m"(phys_addr)
 138                       : "cc", "memory");
 139         if (error)
 140                 printk(KERN_ERR "kvm: vmclear fail: %p/%llx\n",
 141                        vmcs, phys_addr);
 142 }
 143
 144 static void __vcpu_clear(void *arg)
 145 {
 146         struct kvm_vcpu *vcpu = arg;
 147         int cpu = raw_smp_processor_id();
 148
 149         if (vcpu->cpu == cpu)
 150                 vmcs_clear(vcpu->vmcs);
 151         if (per_cpu(current_vmcs, cpu) == vcpu->vmcs)
 152                 per_cpu(current_vmcs, cpu) = NULL;
 153 }
 154
 155 static void vcpu_clear(struct kvm_vcpu *vcpu)
 156 {
 157         if (vcpu->cpu != raw_smp_processor_id() && vcpu->cpu != -1)
 158                 smp_call_function_single(vcpu->cpu, __vcpu_clear, vcpu, 0, 1);
 159         else
 160                 __vcpu_clear(vcpu);
 161         vcpu->launched = 0;
 162 }
 163
 164 static unsigned long vmcs_readl(unsigned long field)
 165 {
 166         unsigned long value;
 167
 168         asm volatile (ASM_VMX_VMREAD_RDX_RAX
 169                       : "=a"(value) : "d"(field) : "cc");
 170         return value;
 171 }
 172
 173 static u16 vmcs_read16(unsigned long field)
 174 {
 175         return vmcs_readl(field);
 176 }
 177
 178 static u32 vmcs_read32(unsigned long field)
 179 {
 180         return vmcs_readl(field);
 181 }
 182
 183 static u64 vmcs_read64(unsigned long field)
 184 {
 185 #ifdef CONFIG_X86_64
 186         return vmcs_readl(field);
 187 #else
 188         return vmcs_readl(field) | ((u64)vmcs_readl(field+1) << 32);
 189 #endif
 190 }
 191
 192 static noinline void vmwrite_error(unsigned long field, unsigned long value)
 193 {
 194         printk(KERN_ERR "vmwrite error: reg %lx value %lx (err %d)\n",
 195                field, value, vmcs_read32(VM_INSTRUCTION_ERROR));
 196         dump_stack();
 197 }
 198
 199 static void vmcs_writel(unsigned long field, unsigned long value)
 200 {
 201         u8 error;
 202
 203         asm volatile (ASM_VMX_VMWRITE_RAX_RDX "; setna %0"
 204                        : "=q"(error) : "a"(value), "d"(field) : "cc" );
 205         if (unlikely(error))
 206                 vmwrite_error(field, value);
 207 }
 208
 209 static void vmcs_write16(unsigned long field, u16 value)
 210 {
 211         vmcs_writel(field, value);
 212 }
 213
 214 static void vmcs_write32(unsigned long field, u32 value)
 215 {
 216         vmcs_writel(field, value);
 217 }
 218
 219 static void vmcs_write64(unsigned long field, u64 value)
 220 {
 221 #ifdef CONFIG_X86_64
 222         vmcs_writel(field, value);
 223 #else
 224         vmcs_writel(field, value);
 225         asm volatile ("");
 226         vmcs_writel(field+1, value >> 32);
 227 #endif
 228 }
 229
 230 static void vmcs_clear_bits(unsigned long field, u32 mask)
 231 {
 232         vmcs_writel(field, vmcs_readl(field) & ~mask);
 233 }
 234
 235 static void vmcs_set_bits(unsigned long field, u32 mask)
 236 {
 237         vmcs_writel(field, vmcs_readl(field) | mask);
 238 }
 239
 240 static void update_exception_bitmap(struct kvm_vcpu *vcpu)
 241 {
 242         u32 eb;
 243
 244         eb = 1u << PF_VECTOR;
 245         if (!vcpu->fpu_active)
 246                 eb |= 1u << NM_VECTOR;
 247         if (vcpu->guest_debug.enabled)
 248                 eb |= 1u << 1;
 249         if (vcpu->rmode.active)
 250                 eb = ~0;
 251         vmcs_write32(EXCEPTION_BITMAP, eb);
 252 }
 253
 254 static void reload_tss(void)
 255 {
 256 #ifndef CONFIG_X86_64
 257
 258         /*
 259          * VT restores TR but not its size.  Useless.
 260          */
 261         struct descriptor_table gdt;
 262         struct segment_descriptor *descs;
 263
 264         get_gdt(&gdt);
 265         descs = (void *)gdt.base;
 266         descs[GDT_ENTRY_TSS].type = 9; /* available TSS */
 267         load_TR_desc();
 268 #endif
 269 }
 270
 271 static void vmx_save_host_state(struct kvm_vcpu *vcpu)
 272 {
 273         struct vmx_host_state *hs = &vcpu->vmx_host_state;
 274
 275         if (hs->loaded)
 276                 return;
 277
 278         hs->loaded = 1;
 279         /*
 280          * Set host fs and gs selectors.  Unfortunately, 22.2.3 does not
 281          * allow segment selectors with cpl > 0 or ti == 1.
 282          */
 283         hs->ldt_sel = read_ldt();
 284         hs->fs_gs_ldt_reload_needed = hs->ldt_sel;
 285         hs->fs_sel = read_fs();
 286         if (!(hs->fs_sel & 7))
 287                 vmcs_write16(HOST_FS_SELECTOR, hs->fs_sel);
 288         else {
 289                 vmcs_write16(HOST_FS_SELECTOR, 0);
 290                 hs->fs_gs_ldt_reload_needed = 1;
 291         }
 292         hs->gs_sel = read_gs();
 293         if (!(hs->gs_sel & 7))
 294                 vmcs_write16(HOST_GS_SELECTOR, hs->gs_sel);
 295         else {
 296                 vmcs_write16(HOST_GS_SELECTOR, 0);
 297                 hs->fs_gs_ldt_reload_needed = 1;
 298         }
 299
 300 #ifdef CONFIG_X86_64
 301         vmcs_writel(HOST_FS_BASE, read_msr(MSR_FS_BASE));
 302         vmcs_writel(HOST_GS_BASE, read_msr(MSR_GS_BASE));
 303 #else
 304         vmcs_writel(HOST_FS_BASE, segment_base(hs->fs_sel));
 305         vmcs_writel(HOST_GS_BASE, segment_base(hs->gs_sel));
 306 #endif
 307
 308 #ifdef CONFIG_X86_64
 309         if (is_long_mode(vcpu)) {
 310                 save_msrs(vcpu->host_msrs + msr_offset_kernel_gs_base, 1);
 311                 load_msrs(vcpu->guest_msrs, NR_BAD_MSRS);
 312         }
 313 #endif
 314 }
 315
 316 static void vmx_load_host_state(struct kvm_vcpu *vcpu)
 317 {
 318         struct vmx_host_state *hs = &vcpu->vmx_host_state;
 319
 320         if (!hs->loaded)
 321                 return;
 322
 323         hs->loaded = 0;
 324         if (hs->fs_gs_ldt_reload_needed) {
 325                 load_ldt(hs->ldt_sel);
 326                 load_fs(hs->fs_sel);
 327                 /*
 328                  * If we have to reload gs, we must take care to
 329                  * preserve our gs base.
 330                  */
 331                 local_irq_disable();
 332                 load_gs(hs->gs_sel);
 333 #ifdef CONFIG_X86_64
 334                 wrmsrl(MSR_GS_BASE, vmcs_readl(HOST_GS_BASE));
 335 #endif
 336                 local_irq_enable();
 337
 338                 reload_tss();
 339         }
 340 #ifdef CONFIG_X86_64
 341         if (is_long_mode(vcpu)) {
 342                 save_msrs(vcpu->guest_msrs, NR_BAD_MSRS);
 343                 load_msrs(vcpu->host_msrs, NR_BAD_MSRS);
 344         }
 345 #endif
 346 }
 347
 348 /*
 349  * Switches to specified vcpu, until a matching vcpu_put(), but assumes
 350  * vcpu mutex is already taken.
 351  */
 352 static void vmx_vcpu_load(struct kvm_vcpu *vcpu)
 353 {
 354         u64 phys_addr = __pa(vcpu->vmcs);
 355         int cpu;
 356
 357         cpu = get_cpu();
 358
 359         if (vcpu->cpu != cpu)
 360                 vcpu_clear(vcpu);
 361
 362         if (per_cpu(current_vmcs, cpu) != vcpu->vmcs) {
 363                 u8 error;
 364
 365                 per_cpu(current_vmcs, cpu) = vcpu->vmcs;
 366                 asm volatile (ASM_VMX_VMPTRLD_RAX "; setna %0"
 367                               : "=g"(error) : "a"(&phys_addr), "m"(phys_addr)
 368                               : "cc");
 369                 if (error)
 370                         printk(KERN_ERR "kvm: vmptrld %p/%llx fail\n",
 371                                vcpu->vmcs, phys_addr);
 372         }
 373
 374         if (vcpu->cpu != cpu) {
 375                 struct descriptor_table dt;
 376                 unsigned long sysenter_esp;
 377
 378                 vcpu->cpu = cpu;
 379                 /*
 380                  * Linux uses per-cpu TSS and GDT, so set these when switching
 381                  * processors.
 382                  */
 383                 vmcs_writel(HOST_TR_BASE, read_tr_base()); /* 22.2.4 */
 384                 get_gdt(&dt);
 385                 vmcs_writel(HOST_GDTR_BASE, dt.base);   /* 22.2.4 */
 386
 387                 rdmsrl(MSR_IA32_SYSENTER_ESP, sysenter_esp);
 388                 vmcs_writel(HOST_IA32_SYSENTER_ESP, sysenter_esp); /* 22.2.3 */
 389         }
 390 }
 391
 392 static void vmx_vcpu_put(struct kvm_vcpu *vcpu)
 393 {
 394         vmx_load_host_state(vcpu);
 395         kvm_put_guest_fpu(vcpu);
 396         put_cpu();
 397 }
 398
 399 static void vmx_fpu_activate(struct kvm_vcpu *vcpu)
 400 {
 401         if (vcpu->fpu_active)
 402                 return;
 403         vcpu->fpu_active = 1;
 404         vmcs_clear_bits(GUEST_CR0, CR0_TS_MASK);
 405         if (vcpu->cr0 & CR0_TS_MASK)
 406                 vmcs_set_bits(GUEST_CR0, CR0_TS_MASK);
 407         update_exception_bitmap(vcpu);
 408 }
 409
 410 static void vmx_fpu_deactivate(struct kvm_vcpu *vcpu)
 411 {
 412         if (!vcpu->fpu_active)
 413                 return;
 414         vcpu->fpu_active = 0;
 415         vmcs_set_bits(GUEST_CR0, CR0_TS_MASK);
 416         update_exception_bitmap(vcpu);
 417 }
 418
 419 static void vmx_vcpu_decache(struct kvm_vcpu *vcpu)
 420 {
 421         vcpu_clear(vcpu);
 422 }
 423
 424 static unsigned long vmx_get_rflags(struct kvm_vcpu *vcpu)
 425 {
 426         return vmcs_readl(GUEST_RFLAGS);
 427 }
 428
 429 static void vmx_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
 430 {
 431         vmcs_writel(GUEST_RFLAGS, rflags);
 432 }
 433
 434 static void skip_emulated_instruction(struct kvm_vcpu *vcpu)
 435 {
 436         unsigned long rip;
 437         u32 interruptibility;
 438
 439         rip = vmcs_readl(GUEST_RIP);
 440         rip += vmcs_read32(VM_EXIT_INSTRUCTION_LEN);
 441         vmcs_writel(GUEST_RIP, rip);
 442
 443         /*
 444          * We emulated an instruction, so temporary interrupt blocking
 445          * should be removed, if set.
 446          */
 447         interruptibility = vmcs_read32(GUEST_INTERRUPTIBILITY_INFO);
 448         if (interruptibility & 3)
 449                 vmcs_write32(GUEST_INTERRUPTIBILITY_INFO,
 450                              interruptibility & ~3);
 451         vcpu->interrupt_window_open = 1;
 452 }
 453
 454 static void vmx_inject_gp(struct kvm_vcpu *vcpu, unsigned error_code)
 455 {
 456         printk(KERN_DEBUG "inject_general_protection: rip 0x%lx\n",
 457                vmcs_readl(GUEST_RIP));
 458         vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE, error_code);
 459         vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
 460                      GP_VECTOR |
 461                      INTR_TYPE_EXCEPTION |
 462                      INTR_INFO_DELIEVER_CODE_MASK |
 463                      INTR_INFO_VALID_MASK);
 464 }
 465
 466 /*
 467  * Set up the vmcs to automatically save and restore system
 468  * msrs.  Don't touch the 64-bit msrs if the guest is in legacy
 469  * mode, as fiddling with msrs is very expensive.
 470  */
 471 static void setup_msrs(struct kvm_vcpu *vcpu)
 472 {
 473         int nr_skip, nr_good_msrs;
 474
 475         if (is_long_mode(vcpu))
 476                 nr_skip = NR_BAD_MSRS;
 477         else
 478                 nr_skip = NR_64BIT_MSRS;
 479         nr_good_msrs = vcpu->nmsrs - nr_skip;
 480
 481         /*
 482          * MSR_K6_STAR is only needed on long mode guests, and only
 483          * if efer.sce is enabled.
 484          */
 485         if (find_msr_entry(vcpu, MSR_K6_STAR)) {
 486                 --nr_good_msrs;
 487 #ifdef CONFIG_X86_64
 488                 if (is_long_mode(vcpu) && (vcpu->shadow_efer & EFER_SCE))
 489                         ++nr_good_msrs;
 490 #endif
 491         }
 492
 493         vmcs_writel(VM_ENTRY_MSR_LOAD_ADDR,
 494                     virt_to_phys(vcpu->guest_msrs + nr_skip));
 495         vmcs_writel(VM_EXIT_MSR_STORE_ADDR,
 496                     virt_to_phys(vcpu->guest_msrs + nr_skip));
 497         vmcs_writel(VM_EXIT_MSR_LOAD_ADDR,
 498                     virt_to_phys(vcpu->host_msrs + nr_skip));
 499         vmcs_write32(VM_EXIT_MSR_STORE_COUNT, nr_good_msrs); /* 22.2.2 */
 500         vmcs_write32(VM_EXIT_MSR_LOAD_COUNT, nr_good_msrs);  /* 22.2.2 */
 501         vmcs_write32(VM_ENTRY_MSR_LOAD_COUNT, nr_good_msrs); /* 22.2.2 */
 502 }
 503
 504 /*
 505  * reads and returns guest's timestamp counter "register"
 506  * guest_tsc = host_tsc + tsc_offset    -- 21.3
 507  */
 508 static u64 guest_read_tsc(void)
 509 {
 510         u64 host_tsc, tsc_offset;
 511
 512         rdtscll(host_tsc);
 513         tsc_offset = vmcs_read64(TSC_OFFSET);
 514         return host_tsc + tsc_offset;
 515 }
 516
 517 /*
 518  * writes 'guest_tsc' into guest's timestamp counter "register"
 519  * guest_tsc = host_tsc + tsc_offset ==> tsc_offset = guest_tsc - host_tsc
 520  */
 521 static void guest_write_tsc(u64 guest_tsc)
 522 {
 523         u64 host_tsc;
 524
 525         rdtscll(host_tsc);
 526         vmcs_write64(TSC_OFFSET, guest_tsc - host_tsc);
 527 }
 528
 529 /*
 530  * Reads an msr value (of 'msr_index') into 'pdata'.
 531  * Returns 0 on success, non-0 otherwise.
 532  * Assumes vcpu_load() was already called.
 533  */
 534 static int vmx_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
 535 {
 536         u64 data;
 537         struct vmx_msr_entry *msr;
 538
 539         if (!pdata) {
 540                 printk(KERN_ERR "BUG: get_msr called with NULL pdata\n");
 541                 return -EINVAL;
 542         }
 543
 544         switch (msr_index) {
 545 #ifdef CONFIG_X86_64
 546         case MSR_FS_BASE:
 547                 data = vmcs_readl(GUEST_FS_BASE);
 548                 break;
 549         case MSR_GS_BASE:
 550                 data = vmcs_readl(GUEST_GS_BASE);
 551                 break;
 552         case MSR_EFER:
 553                 return kvm_get_msr_common(vcpu, msr_index, pdata);
 554 #endif
 555         case MSR_IA32_TIME_STAMP_COUNTER:
 556                 data = guest_read_tsc();
 557                 break;
 558         case MSR_IA32_SYSENTER_CS:
 559                 data = vmcs_read32(GUEST_SYSENTER_CS);
 560                 break;
 561         case MSR_IA32_SYSENTER_EIP:
 562                 data = vmcs_readl(GUEST_SYSENTER_EIP);
 563                 break;
 564         case MSR_IA32_SYSENTER_ESP:
 565                 data = vmcs_readl(GUEST_SYSENTER_ESP);
 566                 break;
 567         default:
 568                 msr = find_msr_entry(vcpu, msr_index);
 569                 if (msr) {
 570                         data = msr->data;
 571                         break;
 572                 }
 573                 return kvm_get_msr_common(vcpu, msr_index, pdata);
 574         }
 575
 576         *pdata = data;
 577         return 0;
 578 }
 579
 580 /*
 581  * Writes msr value into into the appropriate "register".
 582  * Returns 0 on success, non-0 otherwise.
 583  * Assumes vcpu_load() was already called.
 584  */
 585 static int vmx_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
 586 {
 587         struct vmx_msr_entry *msr;
 588         switch (msr_index) {
 589 #ifdef CONFIG_X86_64
 590         case MSR_EFER:
 591                 return kvm_set_msr_common(vcpu, msr_index, data);
 592         case MSR_FS_BASE:
 593                 vmcs_writel(GUEST_FS_BASE, data);
 594                 break;
 595         case MSR_GS_BASE:
 596                 vmcs_writel(GUEST_GS_BASE, data);
 597                 break;
 598         case MSR_LSTAR:
 599         case MSR_SYSCALL_MASK:
 600                 msr = find_msr_entry(vcpu, msr_index);
 601                 if (msr)
 602                         msr->data = data;
 603                 if (vcpu->vmx_host_state.loaded)
 604                         load_msrs(vcpu->guest_msrs, NR_BAD_MSRS);
 605                 break;
 606 #endif
 607         case MSR_IA32_SYSENTER_CS:
 608                 vmcs_write32(GUEST_SYSENTER_CS, data);
 609                 break;
 610         case MSR_IA32_SYSENTER_EIP:
 611                 vmcs_writel(GUEST_SYSENTER_EIP, data);
 612                 break;
 613         case MSR_IA32_SYSENTER_ESP:
 614                 vmcs_writel(GUEST_SYSENTER_ESP, data);
 615                 break;
 616         case MSR_IA32_TIME_STAMP_COUNTER:
 617                 guest_write_tsc(data);
 618                 break;
 619         default:
 620                 msr = find_msr_entry(vcpu, msr_index);
 621                 if (msr) {
 622                         msr->data = data;
 623                         break;
 624                 }
 625                 return kvm_set_msr_common(vcpu, msr_index, data);
 626                 msr->data = data;
 627                 break;
 628         }
 629
 630         return 0;
 631 }
 632
 633 /*
 634  * Sync the rsp and rip registers into the vcpu structure.  This allows
 635  * registers to be accessed by indexing vcpu->regs.
 636  */
 637 static void vcpu_load_rsp_rip(struct kvm_vcpu *vcpu)
 638 {
 639         vcpu->regs[VCPU_REGS_RSP] = vmcs_readl(GUEST_RSP);
 640         vcpu->rip = vmcs_readl(GUEST_RIP);
 641 }
 642
 643 /*
 644  * Syncs rsp and rip back into the vmcs.  Should be called after possible
 645  * modification.
 646  */
 647 static void vcpu_put_rsp_rip(struct kvm_vcpu *vcpu)
 648 {
 649         vmcs_writel(GUEST_RSP, vcpu->regs[VCPU_REGS_RSP]);
 650         vmcs_writel(GUEST_RIP, vcpu->rip);
 651 }
 652
 653 static int set_guest_debug(struct kvm_vcpu *vcpu, struct kvm_debug_guest *dbg)
 654 {
 655         unsigned long dr7 = 0x400;
 656         int old_singlestep;
 657
 658         old_singlestep = vcpu->guest_debug.singlestep;
 659
 660         vcpu->guest_debug.enabled = dbg->enabled;
 661         if (vcpu->guest_debug.enabled) {
 662                 int i;
 663
 664                 dr7 |= 0x200;  /* exact */
 665                 for (i = 0; i < 4; ++i) {
 666                         if (!dbg->breakpoints[i].enabled)
 667                                 continue;
 668                         vcpu->guest_debug.bp[i] = dbg->breakpoints[i].address;
 669                         dr7 |= 2 << (i*2);    /* global enable */
 670                         dr7 |= 0 << (i*4+16); /* execution breakpoint */
 671                 }
 672
 673                 vcpu->guest_debug.singlestep = dbg->singlestep;
 674         } else
 675                 vcpu->guest_debug.singlestep = 0;
 676
 677         if (old_singlestep && !vcpu->guest_debug.singlestep) {
 678                 unsigned long flags;
 679
 680                 flags = vmcs_readl(GUEST_RFLAGS);
 681                 flags &= ~(X86_EFLAGS_TF | X86_EFLAGS_RF);
 682                 vmcs_writel(GUEST_RFLAGS, flags);
 683         }
 684
 685         update_exception_bitmap(vcpu);
 686         vmcs_writel(GUEST_DR7, dr7);
 687
 688         return 0;
 689 }
 690
 691 static __init int cpu_has_kvm_support(void)
 692 {
 693         unsigned long ecx = cpuid_ecx(1);
 694         return test_bit(5, &ecx); /* CPUID.1:ECX.VMX[bit 5] -> VT */
 695 }
 696
 697 static __init int vmx_disabled_by_bios(void)
 698 {
 699         u64 msr;
 700
 701         rdmsrl(MSR_IA32_FEATURE_CONTROL, msr);
 702         return (msr & 5) == 1; /* locked but not enabled */
 703 }
 704
 705 static void hardware_enable(void *garbage)
 706 {
 707         int cpu = raw_smp_processor_id();
 708         u64 phys_addr = __pa(per_cpu(vmxarea, cpu));
 709         u64 old;
 710
 711         rdmsrl(MSR_IA32_FEATURE_CONTROL, old);
 712         if ((old & 5) != 5)
 713                 /* enable and lock */
 714                 wrmsrl(MSR_IA32_FEATURE_CONTROL, old | 5);
 715         write_cr4(read_cr4() | CR4_VMXE); /* FIXME: not cpu hotplug safe */
 716         asm volatile (ASM_VMX_VMXON_RAX : : "a"(&phys_addr), "m"(phys_addr)
 717                       : "memory", "cc");
 718 }
 719
 720 static void hardware_disable(void *garbage)
 721 {
 722         asm volatile (ASM_VMX_VMXOFF : : : "cc");
 723 }
 724
 725 static __init void setup_vmcs_descriptor(void)
 726 {
 727         u32 vmx_msr_low, vmx_msr_high;
 728
 729         rdmsr(MSR_IA32_VMX_BASIC, vmx_msr_low, vmx_msr_high);
 730         vmcs_descriptor.size = vmx_msr_high & 0x1fff;
 731         vmcs_descriptor.order = get_order(vmcs_descriptor.size);
 732         vmcs_descriptor.revision_id = vmx_msr_low;
 733 }
 734
 735 static struct vmcs *alloc_vmcs_cpu(int cpu)
 736 {
 737         int node = cpu_to_node(cpu);
 738         struct page *pages;
 739         struct vmcs *vmcs;
 740
 741         pages = alloc_pages_node(node, GFP_KERNEL, vmcs_descriptor.order);
 742         if (!pages)
 743                 return NULL;
 744         vmcs = page_address(pages);
 745         memset(vmcs, 0, vmcs_descriptor.size);
 746         vmcs->revision_id = vmcs_descriptor.revision_id; /* vmcs revision id */
 747         return vmcs;
 748 }
 749
 750 static struct vmcs *alloc_vmcs(void)
 751 {
 752         return alloc_vmcs_cpu(raw_smp_processor_id());
 753 }
 754
 755 static void free_vmcs(struct vmcs *vmcs)
 756 {
 757         free_pages((unsigned long)vmcs, vmcs_descriptor.order);
 758 }
 759
 760 static void free_kvm_area(void)
 761 {
 762         int cpu;
 763
 764         for_each_online_cpu(cpu)
 765                 free_vmcs(per_cpu(vmxarea, cpu));
 766 }
 767
 768 extern struct vmcs *alloc_vmcs_cpu(int cpu);
 769
 770 static __init int alloc_kvm_area(void)
 771 {
 772         int cpu;
 773
 774         for_each_online_cpu(cpu) {
 775                 struct vmcs *vmcs;
 776
 777                 vmcs = alloc_vmcs_cpu(cpu);
 778                 if (!vmcs) {
 779                         free_kvm_area();
 780                         return -ENOMEM;
 781                 }
 782
 783                 per_cpu(vmxarea, cpu) = vmcs;
 784         }
 785         return 0;
 786 }
 787
 788 static __init int hardware_setup(void)
 789 {
 790         setup_vmcs_descriptor();
 791         return alloc_kvm_area();
 792 }
 793
 794 static __exit void hardware_unsetup(void)
 795 {
 796         free_kvm_area();
 797 }
 798
 799 static void fix_pmode_dataseg(int seg, struct kvm_save_segment *save)
 800 {
 801         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
 802
 803         if (vmcs_readl(sf->base) == save->base && (save->base & AR_S_MASK)) {
 804                 vmcs_write16(sf->selector, save->selector);
 805                 vmcs_writel(sf->base, save->base);
 806                 vmcs_write32(sf->limit, save->limit);
 807                 vmcs_write32(sf->ar_bytes, save->ar);
 808         } else {
 809                 u32 dpl = (vmcs_read16(sf->selector) & SELECTOR_RPL_MASK)
 810                         << AR_DPL_SHIFT;
 811                 vmcs_write32(sf->ar_bytes, 0x93 | dpl);
 812         }
 813 }
 814
 815 static void enter_pmode(struct kvm_vcpu *vcpu)
 816 {
 817         unsigned long flags;
 818
 819         vcpu->rmode.active = 0;
 820
 821         vmcs_writel(GUEST_TR_BASE, vcpu->rmode.tr.base);
 822         vmcs_write32(GUEST_TR_LIMIT, vcpu->rmode.tr.limit);
 823         vmcs_write32(GUEST_TR_AR_BYTES, vcpu->rmode.tr.ar);
 824
 825         flags = vmcs_readl(GUEST_RFLAGS);
 826         flags &= ~(IOPL_MASK | X86_EFLAGS_VM);
 827         flags |= (vcpu->rmode.save_iopl << IOPL_SHIFT);
 828         vmcs_writel(GUEST_RFLAGS, flags);
 829
 830         vmcs_writel(GUEST_CR4, (vmcs_readl(GUEST_CR4) & ~CR4_VME_MASK) |
 831                         (vmcs_readl(CR4_READ_SHADOW) & CR4_VME_MASK));
 832
 833         update_exception_bitmap(vcpu);
 834
 835         fix_pmode_dataseg(VCPU_SREG_ES, &vcpu->rmode.es);
 836         fix_pmode_dataseg(VCPU_SREG_DS, &vcpu->rmode.ds);
 837         fix_pmode_dataseg(VCPU_SREG_GS, &vcpu->rmode.gs);
 838         fix_pmode_dataseg(VCPU_SREG_FS, &vcpu->rmode.fs);
 839
 840         vmcs_write16(GUEST_SS_SELECTOR, 0);
 841         vmcs_write32(GUEST_SS_AR_BYTES, 0x93);
 842
 843         vmcs_write16(GUEST_CS_SELECTOR,
 844                      vmcs_read16(GUEST_CS_SELECTOR) & ~SELECTOR_RPL_MASK);
 845         vmcs_write32(GUEST_CS_AR_BYTES, 0x9b);
 846 }
 847
 848 static int rmode_tss_base(struct kvm* kvm)
 849 {
 850         gfn_t base_gfn = kvm->memslots[0].base_gfn + kvm->memslots[0].npages - 3;
 851         return base_gfn << PAGE_SHIFT;
 852 }
 853
 854 static void fix_rmode_seg(int seg, struct kvm_save_segment *save)
 855 {
 856         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
 857
 858         save->selector = vmcs_read16(sf->selector);
 859         save->base = vmcs_readl(sf->base);
 860         save->limit = vmcs_read32(sf->limit);
 861         save->ar = vmcs_read32(sf->ar_bytes);
 862         vmcs_write16(sf->selector, vmcs_readl(sf->base) >> 4);
 863         vmcs_write32(sf->limit, 0xffff);
 864         vmcs_write32(sf->ar_bytes, 0xf3);
 865 }
 866
 867 static void enter_rmode(struct kvm_vcpu *vcpu)
 868 {
 869         unsigned long flags;
 870
 871         vcpu->rmode.active = 1;
 872
 873         vcpu->rmode.tr.base = vmcs_readl(GUEST_TR_BASE);
 874         vmcs_writel(GUEST_TR_BASE, rmode_tss_base(vcpu->kvm));
 875
 876         vcpu->rmode.tr.limit = vmcs_read32(GUEST_TR_LIMIT);
 877         vmcs_write32(GUEST_TR_LIMIT, RMODE_TSS_SIZE - 1);
 878
 879         vcpu->rmode.tr.ar = vmcs_read32(GUEST_TR_AR_BYTES);
 880         vmcs_write32(GUEST_TR_AR_BYTES, 0x008b);
 881
 882         flags = vmcs_readl(GUEST_RFLAGS);
 883         vcpu->rmode.save_iopl = (flags & IOPL_MASK) >> IOPL_SHIFT;
 884
 885         flags |= IOPL_MASK | X86_EFLAGS_VM;
 886
 887         vmcs_writel(GUEST_RFLAGS, flags);
 888         vmcs_writel(GUEST_CR4, vmcs_readl(GUEST_CR4) | CR4_VME_MASK);
 889         update_exception_bitmap(vcpu);
 890
 891         vmcs_write16(GUEST_SS_SELECTOR, vmcs_readl(GUEST_SS_BASE) >> 4);
 892         vmcs_write32(GUEST_SS_LIMIT, 0xffff);
 893         vmcs_write32(GUEST_SS_AR_BYTES, 0xf3);
 894
 895         vmcs_write32(GUEST_CS_AR_BYTES, 0xf3);
 896         vmcs_write32(GUEST_CS_LIMIT, 0xffff);
 897         if (vmcs_readl(GUEST_CS_BASE) == 0xffff0000)
 898                 vmcs_writel(GUEST_CS_BASE, 0xf0000);
 899         vmcs_write16(GUEST_CS_SELECTOR, vmcs_readl(GUEST_CS_BASE) >> 4);
 900
 901         fix_rmode_seg(VCPU_SREG_ES, &vcpu->rmode.es);
 902         fix_rmode_seg(VCPU_SREG_DS, &vcpu->rmode.ds);
 903         fix_rmode_seg(VCPU_SREG_GS, &vcpu->rmode.gs);
 904         fix_rmode_seg(VCPU_SREG_FS, &vcpu->rmode.fs);
 905 }
 906
 907 #ifdef CONFIG_X86_64
 908
 909 static void enter_lmode(struct kvm_vcpu *vcpu)
 910 {
 911         u32 guest_tr_ar;
 912
 913         guest_tr_ar = vmcs_read32(GUEST_TR_AR_BYTES);
 914         if ((guest_tr_ar & AR_TYPE_MASK) != AR_TYPE_BUSY_64_TSS) {
 915                 printk(KERN_DEBUG "%s: tss fixup for long mode. \n",
 916                        __FUNCTION__);
 917                 vmcs_write32(GUEST_TR_AR_BYTES,
 918                              (guest_tr_ar & ~AR_TYPE_MASK)
 919                              | AR_TYPE_BUSY_64_TSS);
 920         }
 921
 922         vcpu->shadow_efer |= EFER_LMA;
 923
 924         find_msr_entry(vcpu, MSR_EFER)->data |= EFER_LMA | EFER_LME;
 925         vmcs_write32(VM_ENTRY_CONTROLS,
 926                      vmcs_read32(VM_ENTRY_CONTROLS)
 927                      | VM_ENTRY_CONTROLS_IA32E_MASK);
 928 }
 929
 930 static void exit_lmode(struct kvm_vcpu *vcpu)
 931 {
 932         vcpu->shadow_efer &= ~EFER_LMA;
 933
 934         vmcs_write32(VM_ENTRY_CONTROLS,
 935                      vmcs_read32(VM_ENTRY_CONTROLS)
 936                      & ~VM_ENTRY_CONTROLS_IA32E_MASK);
 937 }
 938
 939 #endif
 940
 941 static void vmx_decache_cr4_guest_bits(struct kvm_vcpu *vcpu)
 942 {
 943         vcpu->cr4 &= KVM_GUEST_CR4_MASK;
 944         vcpu->cr4 |= vmcs_readl(GUEST_CR4) & ~KVM_GUEST_CR4_MASK;
 945 }
 946
 947 static void vmx_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 948 {
 949         vmx_fpu_deactivate(vcpu);
 950
 951         if (vcpu->rmode.active && (cr0 & CR0_PE_MASK))
 952                 enter_pmode(vcpu);
 953
 954         if (!vcpu->rmode.active && !(cr0 & CR0_PE_MASK))
 955                 enter_rmode(vcpu);
 956
 957 #ifdef CONFIG_X86_64
 958         if (vcpu->shadow_efer & EFER_LME) {
 959                 if (!is_paging(vcpu) && (cr0 & CR0_PG_MASK))
 960                         enter_lmode(vcpu);
 961                 if (is_paging(vcpu) && !(cr0 & CR0_PG_MASK))
 962                         exit_lmode(vcpu);
 963         }
 964 #endif
 965
 966         vmcs_writel(CR0_READ_SHADOW, cr0);
 967         vmcs_writel(GUEST_CR0,
 968                     (cr0 & ~KVM_GUEST_CR0_MASK) | KVM_VM_CR0_ALWAYS_ON);
 969         vcpu->cr0 = cr0;
 970
 971         if (!(cr0 & CR0_TS_MASK) || !(cr0 & CR0_PE_MASK))
 972                 vmx_fpu_activate(vcpu);
 973 }
 974
 975 static void vmx_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 976 {
 977         vmcs_writel(GUEST_CR3, cr3);
 978         if (vcpu->cr0 & CR0_PE_MASK)
 979                 vmx_fpu_deactivate(vcpu);
 980 }
 981
 982 static void vmx_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 983 {
 984         vmcs_writel(CR4_READ_SHADOW, cr4);
 985         vmcs_writel(GUEST_CR4, cr4 | (vcpu->rmode.active ?
 986                     KVM_RMODE_VM_CR4_ALWAYS_ON : KVM_PMODE_VM_CR4_ALWAYS_ON));
 987         vcpu->cr4 = cr4;
 988 }
 989
 990 #ifdef CONFIG_X86_64
 991
 992 static void vmx_set_efer(struct kvm_vcpu *vcpu, u64 efer)
 993 {
 994         struct vmx_msr_entry *msr = find_msr_entry(vcpu, MSR_EFER);
 995
 996         vcpu->shadow_efer = efer;
 997         if (efer & EFER_LMA) {
 998                 vmcs_write32(VM_ENTRY_CONTROLS,
 999                                      vmcs_read32(VM_ENTRY_CONTROLS) |
1000                                      VM_ENTRY_CONTROLS_IA32E_MASK);
1001                 msr->data = efer;
1002
1003         } else {
1004                 vmcs_write32(VM_ENTRY_CONTROLS,
1005                                      vmcs_read32(VM_ENTRY_CONTROLS) &
1006                                      ~VM_ENTRY_CONTROLS_IA32E_MASK);
1007
1008                 msr->data = efer & ~EFER_LME;
1009         }
1010         setup_msrs(vcpu);
1011 }
1012
1013 #endif
1014
1015 static u64 vmx_get_segment_base(struct kvm_vcpu *vcpu, int seg)
1016 {
1017         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
1018
1019         return vmcs_readl(sf->base);
1020 }
1021
1022 static void vmx_get_segment(struct kvm_vcpu *vcpu,
1023                             struct kvm_segment *var, int seg)
1024 {
1025         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
1026         u32 ar;
1027
1028         var->base = vmcs_readl(sf->base);
1029         var->limit = vmcs_read32(sf->limit);
1030         var->selector = vmcs_read16(sf->selector);
1031         ar = vmcs_read32(sf->ar_bytes);
1032         if (ar & AR_UNUSABLE_MASK)
1033                 ar = 0;
1034         var->type = ar & 15;
1035         var->s = (ar >> 4) & 1;
1036         var->dpl = (ar >> 5) & 3;
1037         var->present = (ar >> 7) & 1;
1038         var->avl = (ar >> 12) & 1;
1039         var->l = (ar >> 13) & 1;
1040         var->db = (ar >> 14) & 1;
1041         var->g = (ar >> 15) & 1;
1042         var->unusable = (ar >> 16) & 1;
1043 }
1044
1045 static void vmx_set_segment(struct kvm_vcpu *vcpu,
1046                             struct kvm_segment *var, int seg)
1047 {
1048         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
1049         u32 ar;
1050
1051         vmcs_writel(sf->base, var->base);
1052         vmcs_write32(sf->limit, var->limit);
1053         vmcs_write16(sf->selector, var->selector);
1054         if (vcpu->rmode.active && var->s) {
1055                 /*
1056                  * Hack real-mode segments into vm86 compatibility.
1057                  */
1058                 if (var->base == 0xffff0000 && var->selector == 0xf000)
1059                         vmcs_writel(sf->base, 0xf0000);
1060                 ar = 0xf3;
1061         } else if (var->unusable)
1062                 ar = 1 << 16;
1063         else {
1064                 ar = var->type & 15;
1065                 ar |= (var->s & 1) << 4;
1066                 ar |= (var->dpl & 3) << 5;
1067                 ar |= (var->present & 1) << 7;
1068                 ar |= (var->avl & 1) << 12;
1069                 ar |= (var->l & 1) << 13;
1070                 ar |= (var->db & 1) << 14;
1071                 ar |= (var->g & 1) << 15;
1072         }
1073         if (ar == 0) /* a 0 value means unusable */
1074                 ar = AR_UNUSABLE_MASK;
1075         vmcs_write32(sf->ar_bytes, ar);
1076 }
1077
1078 static void vmx_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
1079 {
1080         u32 ar = vmcs_read32(GUEST_CS_AR_BYTES);
1081
1082         *db = (ar >> 14) & 1;
1083         *l = (ar >> 13) & 1;
1084 }
1085
1086 static void vmx_get_idt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
1087 {
1088         dt->limit = vmcs_read32(GUEST_IDTR_LIMIT);
1089         dt->base = vmcs_readl(GUEST_IDTR_BASE);
1090 }
1091
1092 static void vmx_set_idt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
1093 {
1094         vmcs_write32(GUEST_IDTR_LIMIT, dt->limit);
1095         vmcs_writel(GUEST_IDTR_BASE, dt->base);
1096 }
1097
1098 static void vmx_get_gdt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
1099 {
1100         dt->limit = vmcs_read32(GUEST_GDTR_LIMIT);
1101         dt->base = vmcs_readl(GUEST_GDTR_BASE);
1102 }
1103
1104 static void vmx_set_gdt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
1105 {
1106         vmcs_write32(GUEST_GDTR_LIMIT, dt->limit);
1107         vmcs_writel(GUEST_GDTR_BASE, dt->base);
1108 }
1109
1110 static int init_rmode_tss(struct kvm* kvm)
1111 {
1112         struct page *p1, *p2, *p3;
1113         gfn_t fn = rmode_tss_base(kvm) >> PAGE_SHIFT;
1114         char *page;
1115
1116         p1 = gfn_to_page(kvm, fn++);
1117         p2 = gfn_to_page(kvm, fn++);
1118         p3 = gfn_to_page(kvm, fn);
1119
1120         if (!p1 || !p2 || !p3) {
1121                 kvm_printf(kvm,"%s: gfn_to_page failed\n", __FUNCTION__);
1122                 return 0;
1123         }
1124
1125         page = kmap_atomic(p1, KM_USER0);
1126         memset(page, 0, PAGE_SIZE);
1127         *(u16*)(page + 0x66) = TSS_BASE_SIZE + TSS_REDIRECTION_SIZE;
1128         kunmap_atomic(page, KM_USER0);
1129
1130         page = kmap_atomic(p2, KM_USER0);
1131         memset(page, 0, PAGE_SIZE);
1132         kunmap_atomic(page, KM_USER0);
1133
1134         page = kmap_atomic(p3, KM_USER0);
1135         memset(page, 0, PAGE_SIZE);
1136         *(page + RMODE_TSS_SIZE - 2 * PAGE_SIZE - 1) = ~0;
1137         kunmap_atomic(page, KM_USER0);
1138
1139         return 1;
1140 }
1141
1142 static void vmcs_write32_fixedbits(u32 msr, u32 vmcs_field, u32 val)
1143 {
1144         u32 msr_high, msr_low;
1145
1146         rdmsr(msr, msr_low, msr_high);
1147
1148         val &= msr_high;
1149         val |= msr_low;
1150         vmcs_write32(vmcs_field, val);
1151 }
1152
1153 static void seg_setup(int seg)
1154 {
1155         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
1156
1157         vmcs_write16(sf->selector, 0);
1158         vmcs_writel(sf->base, 0);
1159         vmcs_write32(sf->limit, 0xffff);
1160         vmcs_write32(sf->ar_bytes, 0x93);
1161 }
1162
1163 /*
1164  * Sets up the vmcs for emulated real mode.
1165  */
1166 static int vmx_vcpu_setup(struct kvm_vcpu *vcpu)
1167 {
1168         u32 host_sysenter_cs;
1169         u32 junk;
1170         unsigned long a;
1171         struct descriptor_table dt;
1172         int i;
1173         int ret = 0;
1174         extern asmlinkage void kvm_vmx_return(void);
1175
1176         if (!init_rmode_tss(vcpu->kvm)) {
1177                 ret = -ENOMEM;
1178                 goto out;
1179         }
1180
1181         memset(vcpu->regs, 0, sizeof(vcpu->regs));
1182         vcpu->regs[VCPU_REGS_RDX] = get_rdx_init_val();
1183         vcpu->cr8 = 0;
1184         vcpu->apic_base = 0xfee00000 |
1185                         /*for vcpu 0*/ MSR_IA32_APICBASE_BSP |
1186                         MSR_IA32_APICBASE_ENABLE;
1187
1188         fx_init(vcpu);
1189
1190         /*
1191          * GUEST_CS_BASE should really be 0xffff0000, but VT vm86 mode
1192          * insists on having GUEST_CS_BASE == GUEST_CS_SELECTOR << 4.  Sigh.
1193          */
1194         vmcs_write16(GUEST_CS_SELECTOR, 0xf000);
1195         vmcs_writel(GUEST_CS_BASE, 0x000f0000);
1196         vmcs_write32(GUEST_CS_LIMIT, 0xffff);
1197         vmcs_write32(GUEST_CS_AR_BYTES, 0x9b);
1198
1199         seg_setup(VCPU_SREG_DS);
1200         seg_setup(VCPU_SREG_ES);
1201         seg_setup(VCPU_SREG_FS);
1202         seg_setup(VCPU_SREG_GS);
1203         seg_setup(VCPU_SREG_SS);
1204
1205         vmcs_write16(GUEST_TR_SELECTOR, 0);
1206         vmcs_writel(GUEST_TR_BASE, 0);
1207         vmcs_write32(GUEST_TR_LIMIT, 0xffff);
1208         vmcs_write32(GUEST_TR_AR_BYTES, 0x008b);
1209
1210         vmcs_write16(GUEST_LDTR_SELECTOR, 0);
1211         vmcs_writel(GUEST_LDTR_BASE, 0);
1212         vmcs_write32(GUEST_LDTR_LIMIT, 0xffff);
1213         vmcs_write32(GUEST_LDTR_AR_BYTES, 0x00082);
1214
1215         vmcs_write32(GUEST_SYSENTER_CS, 0);
1216         vmcs_writel(GUEST_SYSENTER_ESP, 0);
1217         vmcs_writel(GUEST_SYSENTER_EIP, 0);
1218
1219         vmcs_writel(GUEST_RFLAGS, 0x02);
1220         vmcs_writel(GUEST_RIP, 0xfff0);
1221         vmcs_writel(GUEST_RSP, 0);
1222
1223         //todo: dr0 = dr1 = dr2 = dr3 = 0; dr6 = 0xffff0ff0
1224         vmcs_writel(GUEST_DR7, 0x400);
1225
1226         vmcs_writel(GUEST_GDTR_BASE, 0);
1227         vmcs_write32(GUEST_GDTR_LIMIT, 0xffff);
1228
1229         vmcs_writel(GUEST_IDTR_BASE, 0);
1230         vmcs_write32(GUEST_IDTR_LIMIT, 0xffff);
1231
1232         vmcs_write32(GUEST_ACTIVITY_STATE, 0);
1233         vmcs_write32(GUEST_INTERRUPTIBILITY_INFO, 0);
1234         vmcs_write32(GUEST_PENDING_DBG_EXCEPTIONS, 0);
1235
1236         /* I/O */
1237         vmcs_write64(IO_BITMAP_A, page_to_phys(vmx_io_bitmap_a));
1238         vmcs_write64(IO_BITMAP_B, page_to_phys(vmx_io_bitmap_b));
1239
1240         guest_write_tsc(0);
1241
1242         vmcs_write64(VMCS_LINK_POINTER, -1ull); /* 22.3.1.5 */
1243
1244         /* Special registers */
1245         vmcs_write64(GUEST_IA32_DEBUGCTL, 0);
1246
1247         /* Control */
1248         vmcs_write32_fixedbits(MSR_IA32_VMX_PINBASED_CTLS,
1249                                PIN_BASED_VM_EXEC_CONTROL,
1250                                PIN_BASED_EXT_INTR_MASK   /* 20.6.1 */
1251                                | PIN_BASED_NMI_EXITING   /* 20.6.1 */
1252                         );
1253         vmcs_write32_fixedbits(MSR_IA32_VMX_PROCBASED_CTLS,
1254                                CPU_BASED_VM_EXEC_CONTROL,
1255                                CPU_BASED_HLT_EXITING         /* 20.6.2 */
1256                                | CPU_BASED_CR8_LOAD_EXITING    /* 20.6.2 */
1257                                | CPU_BASED_CR8_STORE_EXITING   /* 20.6.2 */
1258                                | CPU_BASED_ACTIVATE_IO_BITMAP  /* 20.6.2 */
1259                                | CPU_BASED_MOV_DR_EXITING
1260                                | CPU_BASED_USE_TSC_OFFSETING   /* 21.3 */
1261                         );
1262
1263         vmcs_write32(PAGE_FAULT_ERROR_CODE_MASK, 0);
1264         vmcs_write32(PAGE_FAULT_ERROR_CODE_MATCH, 0);
1265         vmcs_write32(CR3_TARGET_COUNT, 0);           /* 22.2.1 */
1266
1267         vmcs_writel(HOST_CR0, read_cr0());  /* 22.2.3 */
1268         vmcs_writel(HOST_CR4, read_cr4());  /* 22.2.3, 22.2.5 */
1269         vmcs_writel(HOST_CR3, read_cr3());  /* 22.2.3  FIXME: shadow tables */
1270
1271         vmcs_write16(HOST_CS_SELECTOR, __KERNEL_CS);  /* 22.2.4 */
1272         vmcs_write16(HOST_DS_SELECTOR, __KERNEL_DS);  /* 22.2.4 */
1273         vmcs_write16(HOST_ES_SELECTOR, __KERNEL_DS);  /* 22.2.4 */
1274         vmcs_write16(HOST_FS_SELECTOR, read_fs());    /* 22.2.4 */
1275         vmcs_write16(HOST_GS_SELECTOR, read_gs());    /* 22.2.4 */
1276         vmcs_write16(HOST_SS_SELECTOR, __KERNEL_DS);  /* 22.2.4 */
1277 #ifdef CONFIG_X86_64
1278         rdmsrl(MSR_FS_BASE, a);
1279         vmcs_writel(HOST_FS_BASE, a); /* 22.2.4 */
1280         rdmsrl(MSR_GS_BASE, a);
1281         vmcs_writel(HOST_GS_BASE, a); /* 22.2.4 */
1282 #else
1283         vmcs_writel(HOST_FS_BASE, 0); /* 22.2.4 */
1284         vmcs_writel(HOST_GS_BASE, 0); /* 22.2.4 */
1285 #endif
1286
1287         vmcs_write16(HOST_TR_SELECTOR, GDT_ENTRY_TSS*8);  /* 22.2.4 */
1288
1289         get_idt(&dt);
1290         vmcs_writel(HOST_IDTR_BASE, dt.base);   /* 22.2.4 */
1291
1292
1293         vmcs_writel(HOST_RIP, (unsigned long)kvm_vmx_return); /* 22.2.5 */
1294
1295         rdmsr(MSR_IA32_SYSENTER_CS, host_sysenter_cs, junk);
1296         vmcs_write32(HOST_IA32_SYSENTER_CS, host_sysenter_cs);
1297         rdmsrl(MSR_IA32_SYSENTER_ESP, a);
1298         vmcs_writel(HOST_IA32_SYSENTER_ESP, a);   /* 22.2.3 */
1299         rdmsrl(MSR_IA32_SYSENTER_EIP, a);
1300         vmcs_writel(HOST_IA32_SYSENTER_EIP, a);   /* 22.2.3 */
1301
1302         for (i = 0; i < NR_VMX_MSR; ++i) {
1303                 u32 index = vmx_msr_index[i];
1304                 u32 data_low, data_high;
1305                 u64 data;
1306                 int j = vcpu->nmsrs;
1307
1308                 if (rdmsr_safe(index, &data_low, &data_high) < 0)
1309                         continue;
1310                 if (wrmsr_safe(index, data_low, data_high) < 0)
1311                         continue;
1312                 data = data_low | ((u64)data_high << 32);
1313                 vcpu->host_msrs[j].index = index;
1314                 vcpu->host_msrs[j].reserved = 0;
1315                 vcpu->host_msrs[j].data = data;
1316                 vcpu->guest_msrs[j] = vcpu->host_msrs[j];
1317 #ifdef CONFIG_X86_64
1318                 if (index == MSR_KERNEL_GS_BASE)
1319                         msr_offset_kernel_gs_base = j;
1320 #endif
1321                 ++vcpu->nmsrs;
1322         }
1323
1324         setup_msrs(vcpu);
1325
1326         vmcs_write32_fixedbits(MSR_IA32_VMX_EXIT_CTLS, VM_EXIT_CONTROLS,
1327                                (HOST_IS_64 << 9));  /* 22.2,1, 20.7.1 */
1328
1329         /* 22.2.1, 20.8.1 */
1330         vmcs_write32_fixedbits(MSR_IA32_VMX_ENTRY_CTLS,
1331                                VM_ENTRY_CONTROLS, 0);
1332         vmcs_write32(VM_ENTRY_INTR_INFO_FIELD, 0);  /* 22.2.1 */
1333
1334 #ifdef CONFIG_X86_64
1335         vmcs_writel(VIRTUAL_APIC_PAGE_ADDR, 0);
1336         vmcs_writel(TPR_THRESHOLD, 0);
1337 #endif
1338
1339         vmcs_writel(CR0_GUEST_HOST_MASK, ~0UL);
1340         vmcs_writel(CR4_GUEST_HOST_MASK, KVM_GUEST_CR4_MASK);
1341
1342         vcpu->cr0 = 0x60000010;
1343         vmx_set_cr0(vcpu, vcpu->cr0); // enter rmode
1344         vmx_set_cr4(vcpu, 0);
1345 #ifdef CONFIG_X86_64
1346         vmx_set_efer(vcpu, 0);
1347 #endif
1348         vmx_fpu_activate(vcpu);
1349         update_exception_bitmap(vcpu);
1350
1351         return 0;
1352
1353 out:
1354         return ret;
1355 }
1356
1357 static void inject_rmode_irq(struct kvm_vcpu *vcpu, int irq)
1358 {
1359         u16 ent[2];
1360         u16 cs;
1361         u16 ip;
1362         unsigned long flags;
1363         unsigned long ss_base = vmcs_readl(GUEST_SS_BASE);
1364         u16 sp =  vmcs_readl(GUEST_RSP);
1365         u32 ss_limit = vmcs_read32(GUEST_SS_LIMIT);
1366
1367         if (sp > ss_limit || sp < 6 ) {
1368                 vcpu_printf(vcpu, "%s: #SS, rsp 0x%lx ss 0x%lx limit 0x%x\n",
1369                             __FUNCTION__,
1370                             vmcs_readl(GUEST_RSP),
1371                             vmcs_readl(GUEST_SS_BASE),
1372                             vmcs_read32(GUEST_SS_LIMIT));
1373                 return;
1374         }
1375
1376         if (kvm_read_guest(vcpu, irq * sizeof(ent), sizeof(ent), &ent) !=
1377                                                                 sizeof(ent)) {
1378                 vcpu_printf(vcpu, "%s: read guest err\n", __FUNCTION__);
1379                 return;
1380         }
1381
1382         flags =  vmcs_readl(GUEST_RFLAGS);
1383         cs =  vmcs_readl(GUEST_CS_BASE) >> 4;
1384         ip =  vmcs_readl(GUEST_RIP);
1385
1386
1387         if (kvm_write_guest(vcpu, ss_base + sp - 2, 2, &flags) != 2 ||
1388             kvm_write_guest(vcpu, ss_base + sp - 4, 2, &cs) != 2 ||
1389             kvm_write_guest(vcpu, ss_base + sp - 6, 2, &ip) != 2) {
1390                 vcpu_printf(vcpu, "%s: write guest err\n", __FUNCTION__);
1391                 return;
1392         }
1393
1394         vmcs_writel(GUEST_RFLAGS, flags &
1395                     ~( X86_EFLAGS_IF | X86_EFLAGS_AC | X86_EFLAGS_TF));
1396         vmcs_write16(GUEST_CS_SELECTOR, ent[1]) ;
1397         vmcs_writel(GUEST_CS_BASE, ent[1] << 4);
1398         vmcs_writel(GUEST_RIP, ent[0]);
1399         vmcs_writel(GUEST_RSP, (vmcs_readl(GUEST_RSP) & ~0xffff) | (sp - 6));
1400 }
1401
1402 static void kvm_do_inject_irq(struct kvm_vcpu *vcpu)
1403 {
1404         int word_index = __ffs(vcpu->irq_summary);
1405         int bit_index = __ffs(vcpu->irq_pending[word_index]);
1406         int irq = word_index * BITS_PER_LONG + bit_index;
1407
1408         clear_bit(bit_index, &vcpu->irq_pending[word_index]);
1409         if (!vcpu->irq_pending[word_index])
1410                 clear_bit(word_index, &vcpu->irq_summary);
1411
1412         if (vcpu->rmode.active) {
1413                 inject_rmode_irq(vcpu, irq);
1414                 return;
1415         }
1416         vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
1417                         irq | INTR_TYPE_EXT_INTR | INTR_INFO_VALID_MASK);
1418 }
1419
1420
1421 static void do_interrupt_requests(struct kvm_vcpu *vcpu,
1422                                        struct kvm_run *kvm_run)
1423 {
1424         u32 cpu_based_vm_exec_control;
1425
1426         vcpu->interrupt_window_open =
1427                 ((vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_IF) &&
1428                  (vmcs_read32(GUEST_INTERRUPTIBILITY_INFO) & 3) == 0);
1429
1430         if (vcpu->interrupt_window_open &&
1431             vcpu->irq_summary &&
1432             !(vmcs_read32(VM_ENTRY_INTR_INFO_FIELD) & INTR_INFO_VALID_MASK))
1433                 /*
1434                  * If interrupts enabled, and not blocked by sti or mov ss. Good.
1435                  */
1436                 kvm_do_inject_irq(vcpu);
1437
1438         cpu_based_vm_exec_control = vmcs_read32(CPU_BASED_VM_EXEC_CONTROL);
1439         if (!vcpu->interrupt_window_open &&
1440             (vcpu->irq_summary || kvm_run->request_interrupt_window))
1441                 /*
1442                  * Interrupts blocked.  Wait for unblock.
1443                  */
1444                 cpu_based_vm_exec_control |= CPU_BASED_VIRTUAL_INTR_PENDING;
1445         else
1446                 cpu_based_vm_exec_control &= ~CPU_BASED_VIRTUAL_INTR_PENDING;
1447         vmcs_write32(CPU_BASED_VM_EXEC_CONTROL, cpu_based_vm_exec_control);
1448 }
1449
1450 static void kvm_guest_debug_pre(struct kvm_vcpu *vcpu)
1451 {
1452         struct kvm_guest_debug *dbg = &vcpu->guest_debug;
1453
1454         set_debugreg(dbg->bp[0], 0);
1455         set_debugreg(dbg->bp[1], 1);
1456         set_debugreg(dbg->bp[2], 2);
1457         set_debugreg(dbg->bp[3], 3);
1458
1459         if (dbg->singlestep) {
1460                 unsigned long flags;
1461
1462                 flags = vmcs_readl(GUEST_RFLAGS);
1463                 flags |= X86_EFLAGS_TF | X86_EFLAGS_RF;
1464                 vmcs_writel(GUEST_RFLAGS, flags);
1465         }
1466 }
1467
1468 static int handle_rmode_exception(struct kvm_vcpu *vcpu,
1469                                   int vec, u32 err_code)
1470 {
1471         if (!vcpu->rmode.active)
1472                 return 0;
1473
1474         if (vec == GP_VECTOR && err_code == 0)
1475                 if (emulate_instruction(vcpu, NULL, 0, 0) == EMULATE_DONE)
1476                         return 1;
1477         return 0;
1478 }
1479
1480 static int handle_exception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1481 {
1482         u32 intr_info, error_code;
1483         unsigned long cr2, rip;
1484         u32 vect_info;
1485         enum emulation_result er;
1486         int r;
1487
1488         vect_info = vmcs_read32(IDT_VECTORING_INFO_FIELD);
1489         intr_info = vmcs_read32(VM_EXIT_INTR_INFO);
1490
1491         if ((vect_info & VECTORING_INFO_VALID_MASK) &&
1492                                                 !is_page_fault(intr_info)) {
1493                 printk(KERN_ERR "%s: unexpected, vectoring info 0x%x "
1494                        "intr info 0x%x\n", __FUNCTION__, vect_info, intr_info);
1495         }
1496
1497         if (is_external_interrupt(vect_info)) {
1498                 int irq = vect_info & VECTORING_INFO_VECTOR_MASK;
1499                 set_bit(irq, vcpu->irq_pending);
1500                 set_bit(irq / BITS_PER_LONG, &vcpu->irq_summary);
1501         }
1502
1503         if ((intr_info & INTR_INFO_INTR_TYPE_MASK) == 0x200) { /* nmi */
1504                 asm ("int $2");
1505                 return 1;
1506         }
1507
1508         if (is_no_device(intr_info)) {
1509                 vmx_fpu_activate(vcpu);
1510                 return 1;
1511         }
1512
1513         error_code = 0;
1514         rip = vmcs_readl(GUEST_RIP);
1515         if (intr_info & INTR_INFO_DELIEVER_CODE_MASK)
1516                 error_code = vmcs_read32(VM_EXIT_INTR_ERROR_CODE);
1517         if (is_page_fault(intr_info)) {
1518                 cr2 = vmcs_readl(EXIT_QUALIFICATION);
1519
1520                 spin_lock(&vcpu->kvm->lock);
1521                 r = kvm_mmu_page_fault(vcpu, cr2, error_code);
1522                 if (r < 0) {
1523                         spin_unlock(&vcpu->kvm->lock);
1524                         return r;
1525                 }
1526                 if (!r) {
1527                         spin_unlock(&vcpu->kvm->lock);
1528                         return 1;
1529                 }
1530
1531                 er = emulate_instruction(vcpu, kvm_run, cr2, error_code);
1532                 spin_unlock(&vcpu->kvm->lock);
1533
1534                 switch (er) {
1535                 case EMULATE_DONE:
1536                         return 1;
1537                 case EMULATE_DO_MMIO:
1538                         ++vcpu->stat.mmio_exits;
1539                         kvm_run->exit_reason = KVM_EXIT_MMIO;
1540                         return 0;
1541                  case EMULATE_FAIL:
1542                         vcpu_printf(vcpu, "%s: emulate fail\n", __FUNCTION__);
1543                         break;
1544                 default:
1545                         BUG();
1546                 }
1547         }
1548
1549         if (vcpu->rmode.active &&
1550             handle_rmode_exception(vcpu, intr_info & INTR_INFO_VECTOR_MASK,
1551                                                                 error_code))
1552                 return 1;
1553
1554         if ((intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK)) == (INTR_TYPE_EXCEPTION | 1)) {
1555                 kvm_run->exit_reason = KVM_EXIT_DEBUG;
1556                 return 0;
1557         }
1558         kvm_run->exit_reason = KVM_EXIT_EXCEPTION;
1559         kvm_run->ex.exception = intr_info & INTR_INFO_VECTOR_MASK;
1560         kvm_run->ex.error_code = error_code;
1561         return 0;
1562 }
1563
1564 static int handle_external_interrupt(struct kvm_vcpu *vcpu,
1565                                      struct kvm_run *kvm_run)
1566 {
1567         ++vcpu->stat.irq_exits;
1568         return 1;
1569 }
1570
1571 static int handle_triple_fault(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1572 {
1573         kvm_run->exit_reason = KVM_EXIT_SHUTDOWN;
1574         return 0;
1575 }
1576
1577 static int get_io_count(struct kvm_vcpu *vcpu, unsigned long *count)
1578 {
1579         u64 inst;
1580         gva_t rip;
1581         int countr_size;
1582         int i, n;
1583
1584         if ((vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_VM)) {
1585                 countr_size = 2;
1586         } else {
1587                 u32 cs_ar = vmcs_read32(GUEST_CS_AR_BYTES);
1588
1589                 countr_size = (cs_ar & AR_L_MASK) ? 8:
1590                               (cs_ar & AR_DB_MASK) ? 4: 2;
1591         }
1592
1593         rip =  vmcs_readl(GUEST_RIP);
1594         if (countr_size != 8)
1595                 rip += vmcs_readl(GUEST_CS_BASE);
1596
1597         n = kvm_read_guest(vcpu, rip, sizeof(inst), &inst);
1598
1599         for (i = 0; i < n; i++) {
1600                 switch (((u8*)&inst)[i]) {
1601                 case 0xf0:
1602                 case 0xf2:
1603                 case 0xf3:
1604                 case 0x2e:
1605                 case 0x36:
1606                 case 0x3e:
1607                 case 0x26:
1608                 case 0x64:
1609                 case 0x65:
1610                 case 0x66:
1611                         break;
1612                 case 0x67:
1613                         countr_size = (countr_size == 2) ? 4: (countr_size >> 1);
1614                 default:
1615                         goto done;
1616                 }
1617         }
1618         return 0;
1619 done:
1620         countr_size *= 8;
1621         *count = vcpu->regs[VCPU_REGS_RCX] & (~0ULL >> (64 - countr_size));
1622         //printk("cx: %lx\n", vcpu->regs[VCPU_REGS_RCX]);
1623         return 1;
1624 }
1625
1626 static int handle_io(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1627 {
1628         u64 exit_qualification;
1629         int size, down, in, string, rep;
1630         unsigned port;
1631         unsigned long count;
1632         gva_t address;
1633
1634         ++vcpu->stat.io_exits;
1635         exit_qualification = vmcs_read64(EXIT_QUALIFICATION);
1636         in = (exit_qualification & 8) != 0;
1637         size = (exit_qualification & 7) + 1;
1638         string = (exit_qualification & 16) != 0;
1639         down = (vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_DF) != 0;
1640         count = 1;
1641         rep = (exit_qualification & 32) != 0;
1642         port = exit_qualification >> 16;
1643         address = 0;
1644         if (string) {
1645                 if (rep && !get_io_count(vcpu, &count))
1646                         return 1;
1647                 address = vmcs_readl(GUEST_LINEAR_ADDRESS);
1648         }
1649         return kvm_setup_pio(vcpu, kvm_run, in, size, count, string, down,
1650                              address, rep, port);
1651 }
1652
1653 static void
1654 vmx_patch_hypercall(struct kvm_vcpu *vcpu, unsigned char *hypercall)
1655 {
1656         /*
1657          * Patch in the VMCALL instruction:
1658          */
1659         hypercall[0] = 0x0f;
1660         hypercall[1] = 0x01;
1661         hypercall[2] = 0xc1;
1662         hypercall[3] = 0xc3;
1663 }
1664
1665 static int handle_cr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1666 {
1667         u64 exit_qualification;
1668         int cr;
1669         int reg;
1670
1671         exit_qualification = vmcs_read64(EXIT_QUALIFICATION);
1672         cr = exit_qualification & 15;
1673         reg = (exit_qualification >> 8) & 15;
1674         switch ((exit_qualification >> 4) & 3) {
1675         case 0: /* mov to cr */
1676                 switch (cr) {
1677                 case 0:
1678                         vcpu_load_rsp_rip(vcpu);
1679                         set_cr0(vcpu, vcpu->regs[reg]);
1680                         skip_emulated_instruction(vcpu);
1681                         return 1;
1682                 case 3:
1683                         vcpu_load_rsp_rip(vcpu);
1684                         set_cr3(vcpu, vcpu->regs[reg]);
1685                         skip_emulated_instruction(vcpu);
1686                         return 1;
1687                 case 4:
1688                         vcpu_load_rsp_rip(vcpu);
1689                         set_cr4(vcpu, vcpu->regs[reg]);
1690                         skip_emulated_instruction(vcpu);
1691                         return 1;
1692                 case 8:
1693                         vcpu_load_rsp_rip(vcpu);
1694                         set_cr8(vcpu, vcpu->regs[reg]);
1695                         skip_emulated_instruction(vcpu);
1696                         return 1;
1697                 };
1698                 break;
1699         case 2: /* clts */
1700                 vcpu_load_rsp_rip(vcpu);
1701                 vmx_fpu_deactivate(vcpu);
1702                 vcpu->cr0 &= ~CR0_TS_MASK;
1703                 vmcs_writel(CR0_READ_SHADOW, vcpu->cr0);
1704                 vmx_fpu_activate(vcpu);
1705                 skip_emulated_instruction(vcpu);
1706                 return 1;
1707         case 1: /*mov from cr*/
1708                 switch (cr) {
1709                 case 3:
1710                         vcpu_load_rsp_rip(vcpu);
1711                         vcpu->regs[reg] = vcpu->cr3;
1712                         vcpu_put_rsp_rip(vcpu);
1713                         skip_emulated_instruction(vcpu);
1714                         return 1;
1715                 case 8:
1716                         vcpu_load_rsp_rip(vcpu);
1717                         vcpu->regs[reg] = vcpu->cr8;
1718                         vcpu_put_rsp_rip(vcpu);
1719                         skip_emulated_instruction(vcpu);
1720                         return 1;
1721                 }
1722                 break;
1723         case 3: /* lmsw */
1724                 lmsw(vcpu, (exit_qualification >> LMSW_SOURCE_DATA_SHIFT) & 0x0f);
1725
1726                 skip_emulated_instruction(vcpu);
1727                 return 1;
1728         default:
1729                 break;
1730         }
1731         kvm_run->exit_reason = 0;
1732         printk(KERN_ERR "kvm: unhandled control register: op %d cr %d\n",
1733                (int)(exit_qualification >> 4) & 3, cr);
1734         return 0;
1735 }
1736
1737 static int handle_dr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1738 {
1739         u64 exit_qualification;
1740         unsigned long val;
1741         int dr, reg;
1742
1743         /*
1744          * FIXME: this code assumes the host is debugging the guest.
1745          *        need to deal with guest debugging itself too.
1746          */
1747         exit_qualification = vmcs_read64(EXIT_QUALIFICATION);
1748         dr = exit_qualification & 7;
1749         reg = (exit_qualification >> 8) & 15;
1750         vcpu_load_rsp_rip(vcpu);
1751         if (exit_qualification & 16) {
1752                 /* mov from dr */
1753                 switch (dr) {
1754                 case 6:
1755                         val = 0xffff0ff0;
1756                         break;
1757                 case 7:
1758                         val = 0x400;
1759                         break;
1760                 default:
1761                         val = 0;
1762                 }
1763                 vcpu->regs[reg] = val;
1764         } else {
1765                 /* mov to dr */
1766         }
1767         vcpu_put_rsp_rip(vcpu);
1768         skip_emulated_instruction(vcpu);
1769         return 1;
1770 }
1771
1772 static int handle_cpuid(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1773 {
1774         kvm_emulate_cpuid(vcpu);
1775         return 1;
1776 }
1777
1778 static int handle_rdmsr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1779 {
1780         u32 ecx = vcpu->regs[VCPU_REGS_RCX];
1781         u64 data;
1782
1783         if (vmx_get_msr(vcpu, ecx, &data)) {
1784                 vmx_inject_gp(vcpu, 0);
1785                 return 1;
1786         }
1787
1788         /* FIXME: handling of bits 32:63 of rax, rdx */
1789         vcpu->regs[VCPU_REGS_RAX] = data & -1u;
1790         vcpu->regs[VCPU_REGS_RDX] = (data >> 32) & -1u;
1791         skip_emulated_instruction(vcpu);
1792         return 1;
1793 }
1794
1795 static int handle_wrmsr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1796 {
1797         u32 ecx = vcpu->regs[VCPU_REGS_RCX];
1798         u64 data = (vcpu->regs[VCPU_REGS_RAX] & -1u)
1799                 | ((u64)(vcpu->regs[VCPU_REGS_RDX] & -1u) << 32);
1800
1801         if (vmx_set_msr(vcpu, ecx, data) != 0) {
1802                 vmx_inject_gp(vcpu, 0);
1803                 return 1;
1804         }
1805
1806         skip_emulated_instruction(vcpu);
1807         return 1;
1808 }
1809
1810 static void post_kvm_run_save(struct kvm_vcpu *vcpu,
1811                               struct kvm_run *kvm_run)
1812 {
1813         kvm_run->if_flag = (vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_IF) != 0;
1814         kvm_run->cr8 = vcpu->cr8;
1815         kvm_run->apic_base = vcpu->apic_base;
1816         kvm_run->ready_for_interrupt_injection = (vcpu->interrupt_window_open &&
1817                                                   vcpu->irq_summary == 0);
1818 }
1819
1820 static int handle_interrupt_window(struct kvm_vcpu *vcpu,
1821                                    struct kvm_run *kvm_run)
1822 {
1823         /*
1824          * If the user space waits to inject interrupts, exit as soon as
1825          * possible
1826          */
1827         if (kvm_run->request_interrupt_window &&
1828             !vcpu->irq_summary) {
1829                 kvm_run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
1830                 ++vcpu->stat.irq_window_exits;
1831                 return 0;
1832         }
1833         return 1;
1834 }
1835
1836 static int handle_halt(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1837 {
1838         skip_emulated_instruction(vcpu);
1839         if (vcpu->irq_summary)
1840                 return 1;
1841
1842         kvm_run->exit_reason = KVM_EXIT_HLT;
1843         ++vcpu->stat.halt_exits;
1844         return 0;
1845 }
1846
1847 static int handle_vmcall(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1848 {
1849         skip_emulated_instruction(vcpu);
1850         return kvm_hypercall(vcpu, kvm_run);
1851 }
1852
1853 /*
1854  * The exit handlers return 1 if the exit was handled fully and guest execution
1855  * may resume.  Otherwise they set the kvm_run parameter to indicate what needs
1856  * to be done to userspace and return 0.
1857  */
1858 static int (*kvm_vmx_exit_handlers[])(struct kvm_vcpu *vcpu,
1859                                       struct kvm_run *kvm_run) = {
1860         [EXIT_REASON_EXCEPTION_NMI]           = handle_exception,
1861         [EXIT_REASON_EXTERNAL_INTERRUPT]      = handle_external_interrupt,
1862         [EXIT_REASON_TRIPLE_FAULT]            = handle_triple_fault,
1863         [EXIT_REASON_IO_INSTRUCTION]          = handle_io,
1864         [EXIT_REASON_CR_ACCESS]               = handle_cr,
1865         [EXIT_REASON_DR_ACCESS]               = handle_dr,
1866         [EXIT_REASON_CPUID]                   = handle_cpuid,
1867         [EXIT_REASON_MSR_READ]                = handle_rdmsr,
1868         [EXIT_REASON_MSR_WRITE]               = handle_wrmsr,
1869         [EXIT_REASON_PENDING_INTERRUPT]       = handle_interrupt_window,
1870         [EXIT_REASON_HLT]                     = handle_halt,
1871         [EXIT_REASON_VMCALL]                  = handle_vmcall,
1872 };
1873
1874 static const int kvm_vmx_max_exit_handlers =
1875         sizeof(kvm_vmx_exit_handlers) / sizeof(*kvm_vmx_exit_handlers);
1876
1877 /*
1878  * The guest has exited.  See if we can fix it or if we need userspace
1879  * assistance.
1880  */
1881 static int kvm_handle_exit(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
1882 {
1883         u32 vectoring_info = vmcs_read32(IDT_VECTORING_INFO_FIELD);
1884         u32 exit_reason = vmcs_read32(VM_EXIT_REASON);
1885
1886         if ( (vectoring_info & VECTORING_INFO_VALID_MASK) &&
1887                                 exit_reason != EXIT_REASON_EXCEPTION_NMI )
1888                 printk(KERN_WARNING "%s: unexpected, valid vectoring info and "
1889                        "exit reason is 0x%x\n", __FUNCTION__, exit_reason);
1890         if (exit_reason < kvm_vmx_max_exit_handlers
1891             && kvm_vmx_exit_handlers[exit_reason])
1892                 return kvm_vmx_exit_handlers[exit_reason](vcpu, kvm_run);
1893         else {
1894                 kvm_run->exit_reason = KVM_EXIT_UNKNOWN;
1895                 kvm_run->hw.hardware_exit_reason = exit_reason;
1896         }
1897         return 0;
1898 }
1899
1900 /*
1901  * Check if userspace requested an interrupt window, and that the
1902  * interrupt window is open.
1903  *
1904  * No need to exit to userspace if we already have an interrupt queued.
1905  */
1906 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu,
1907                                           struct kvm_run *kvm_run)
1908 {
1909         return (!vcpu->irq_summary &&
1910                 kvm_run->request_interrupt_window &&
1911                 vcpu->interrupt_window_open &&
1912                 (vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_IF));
1913 }
1914
1915 static int vmx_vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1916 {
1917         u8 fail;
1918         int r;
1919
1920 preempted:
1921         if (!vcpu->mmio_read_completed)
1922                 do_interrupt_requests(vcpu, kvm_run);
1923
1924         if (vcpu->guest_debug.enabled)
1925                 kvm_guest_debug_pre(vcpu);
1926
1927 again:
1928         vmx_save_host_state(vcpu);
1929         kvm_load_guest_fpu(vcpu);
1930
1931         /*
1932          * Loading guest fpu may have cleared host cr0.ts
1933          */
1934         vmcs_writel(HOST_CR0, read_cr0());
1935
1936         asm (
1937                 /* Store host registers */
1938                 "pushf \n\t"
1939 #ifdef CONFIG_X86_64
1940                 "push %%rax; push %%rbx; push %%rdx;"
1941                 "push %%rsi; push %%rdi; push %%rbp;"
1942                 "push %%r8;  push %%r9;  push %%r10; push %%r11;"
1943                 "push %%r12; push %%r13; push %%r14; push %%r15;"
1944                 "push %%rcx \n\t"
1945                 ASM_VMX_VMWRITE_RSP_RDX "\n\t"
1946 #else
1947                 "pusha; push %%ecx \n\t"
1948                 ASM_VMX_VMWRITE_RSP_RDX "\n\t"
1949 #endif
1950                 /* Check if vmlaunch of vmresume is needed */
1951                 "cmp $0, %1 \n\t"
1952                 /* Load guest registers.  Don't clobber flags. */
1953 #ifdef CONFIG_X86_64
1954                 "mov %c[cr2](%3), %%rax \n\t"
1955                 "mov %%rax, %%cr2 \n\t"
1956                 "mov %c[rax](%3), %%rax \n\t"
1957                 "mov %c[rbx](%3), %%rbx \n\t"
1958                 "mov %c[rdx](%3), %%rdx \n\t"
1959                 "mov %c[rsi](%3), %%rsi \n\t"
1960                 "mov %c[rdi](%3), %%rdi \n\t"
1961                 "mov %c[rbp](%3), %%rbp \n\t"
1962                 "mov %c[r8](%3),  %%r8  \n\t"
1963                 "mov %c[r9](%3),  %%r9  \n\t"
1964                 "mov %c[r10](%3), %%r10 \n\t"
1965                 "mov %c[r11](%3), %%r11 \n\t"
1966                 "mov %c[r12](%3), %%r12 \n\t"
1967                 "mov %c[r13](%3), %%r13 \n\t"
1968                 "mov %c[r14](%3), %%r14 \n\t"
1969                 "mov %c[r15](%3), %%r15 \n\t"
1970                 "mov %c[rcx](%3), %%rcx \n\t" /* kills %3 (rcx) */
1971 #else
1972                 "mov %c[cr2](%3), %%eax \n\t"
1973                 "mov %%eax,   %%cr2 \n\t"
1974                 "mov %c[rax](%3), %%eax \n\t"
1975                 "mov %c[rbx](%3), %%ebx \n\t"
1976                 "mov %c[rdx](%3), %%edx \n\t"
1977                 "mov %c[rsi](%3), %%esi \n\t"
1978                 "mov %c[rdi](%3), %%edi \n\t"
1979                 "mov %c[rbp](%3), %%ebp \n\t"
1980                 "mov %c[rcx](%3), %%ecx \n\t" /* kills %3 (ecx) */
1981 #endif
1982                 /* Enter guest mode */
1983                 "jne launched \n\t"
1984                 ASM_VMX_VMLAUNCH "\n\t"
1985                 "jmp kvm_vmx_return \n\t"
1986                 "launched: " ASM_VMX_VMRESUME "\n\t"
1987                 ".globl kvm_vmx_return \n\t"
1988                 "kvm_vmx_return: "
1989                 /* Save guest registers, load host registers, keep flags */
1990 #ifdef CONFIG_X86_64
1991                 "xchg %3,     (%%rsp) \n\t"
1992                 "mov %%rax, %c[rax](%3) \n\t"
1993                 "mov %%rbx, %c[rbx](%3) \n\t"
1994                 "pushq (%%rsp); popq %c[rcx](%3) \n\t"
1995                 "mov %%rdx, %c[rdx](%3) \n\t"
1996                 "mov %%rsi, %c[rsi](%3) \n\t"
1997                 "mov %%rdi, %c[rdi](%3) \n\t"
1998                 "mov %%rbp, %c[rbp](%3) \n\t"
1999                 "mov %%r8,  %c[r8](%3) \n\t"
2000                 "mov %%r9,  %c[r9](%3) \n\t"
2001                 "mov %%r10, %c[r10](%3) \n\t"
2002                 "mov %%r11, %c[r11](%3) \n\t"
2003                 "mov %%r12, %c[r12](%3) \n\t"
2004                 "mov %%r13, %c[r13](%3) \n\t"
2005                 "mov %%r14, %c[r14](%3) \n\t"
2006                 "mov %%r15, %c[r15](%3) \n\t"
2007                 "mov %%cr2, %%rax   \n\t"
2008                 "mov %%rax, %c[cr2](%3) \n\t"
2009                 "mov (%%rsp), %3 \n\t"
2010
2011                 "pop  %%rcx; pop  %%r15; pop  %%r14; pop  %%r13; pop  %%r12;"
2012                 "pop  %%r11; pop  %%r10; pop  %%r9;  pop  %%r8;"
2013                 "pop  %%rbp; pop  %%rdi; pop  %%rsi;"
2014                 "pop  %%rdx; pop  %%rbx; pop  %%rax \n\t"
2015 #else
2016                 "xchg %3, (%%esp) \n\t"
2017                 "mov %%eax, %c[rax](%3) \n\t"
2018                 "mov %%ebx, %c[rbx](%3) \n\t"
2019                 "pushl (%%esp); popl %c[rcx](%3) \n\t"
2020                 "mov %%edx, %c[rdx](%3) \n\t"
2021                 "mov %%esi, %c[rsi](%3) \n\t"
2022                 "mov %%edi, %c[rdi](%3) \n\t"
2023                 "mov %%ebp, %c[rbp](%3) \n\t"
2024                 "mov %%cr2, %%eax  \n\t"
2025                 "mov %%eax, %c[cr2](%3) \n\t"
2026                 "mov (%%esp), %3 \n\t"
2027
2028                 "pop %%ecx; popa \n\t"
2029 #endif
2030                 "setbe %0 \n\t"
2031                 "popf \n\t"
2032               : "=q" (fail)
2033               : "r"(vcpu->launched), "d"((unsigned long)HOST_RSP),
2034                 "c"(vcpu),
2035                 [rax]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RAX])),
2036                 [rbx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RBX])),
2037                 [rcx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RCX])),
2038                 [rdx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RDX])),
2039                 [rsi]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RSI])),
2040                 [rdi]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RDI])),
2041                 [rbp]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RBP])),
2042 #ifdef CONFIG_X86_64
2043                 [r8 ]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R8 ])),
2044                 [r9 ]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R9 ])),
2045                 [r10]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R10])),
2046                 [r11]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R11])),
2047                 [r12]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R12])),
2048                 [r13]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R13])),
2049                 [r14]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R14])),
2050                 [r15]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R15])),
2051 #endif
2052                 [cr2]"i"(offsetof(struct kvm_vcpu, cr2))
2053               : "cc", "memory" );
2054
2055         ++vcpu->stat.exits;
2056
2057         vcpu->interrupt_window_open = (vmcs_read32(GUEST_INTERRUPTIBILITY_INFO) & 3) == 0;
2058
2059         asm ("mov %0, %%ds; mov %0, %%es" : : "r"(__USER_DS));
2060
2061         if (unlikely(fail)) {
2062                 kvm_run->exit_reason = KVM_EXIT_FAIL_ENTRY;
2063                 kvm_run->fail_entry.hardware_entry_failure_reason
2064                         = vmcs_read32(VM_INSTRUCTION_ERROR);
2065                 r = 0;
2066                 goto out;
2067         }
2068         /*
2069          * Profile KVM exit RIPs:
2070          */
2071         if (unlikely(prof_on == KVM_PROFILING))
2072                 profile_hit(KVM_PROFILING, (void *)vmcs_readl(GUEST_RIP));
2073
2074         vcpu->launched = 1;
2075         r = kvm_handle_exit(kvm_run, vcpu);
2076         if (r > 0) {
2077                 /* Give scheduler a change to reschedule. */
2078                 if (signal_pending(current)) {
2079                         r = -EINTR;
2080                         kvm_run->exit_reason = KVM_EXIT_INTR;
2081                         ++vcpu->stat.signal_exits;
2082                         goto out;
2083                 }
2084
2085                 if (dm_request_for_irq_injection(vcpu, kvm_run)) {
2086                         r = -EINTR;
2087                         kvm_run->exit_reason = KVM_EXIT_INTR;
2088                         ++vcpu->stat.request_irq_exits;
2089                         goto out;
2090                 }
2091                 if (!need_resched()) {
2092                         ++vcpu->stat.light_exits;
2093                         goto again;
2094                 }
2095         }
2096
2097 out:
2098         if (r > 0) {
2099                 kvm_resched(vcpu);
2100                 goto preempted;
2101         }
2102
2103         post_kvm_run_save(vcpu, kvm_run);
2104         return r;
2105 }
2106
2107 static void vmx_flush_tlb(struct kvm_vcpu *vcpu)
2108 {
2109         vmcs_writel(GUEST_CR3, vmcs_readl(GUEST_CR3));
2110 }
2111
2112 static void vmx_inject_page_fault(struct kvm_vcpu *vcpu,
2113                                   unsigned long addr,
2114                                   u32 err_code)
2115 {
2116         u32 vect_info = vmcs_read32(IDT_VECTORING_INFO_FIELD);
2117
2118         ++vcpu->stat.pf_guest;
2119
2120         if (is_page_fault(vect_info)) {
2121                 printk(KERN_DEBUG "inject_page_fault: "
2122                        "double fault 0x%lx @ 0x%lx\n",
2123                        addr, vmcs_readl(GUEST_RIP));
2124                 vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE, 0);
2125                 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
2126                              DF_VECTOR |
2127                              INTR_TYPE_EXCEPTION |
2128                              INTR_INFO_DELIEVER_CODE_MASK |
2129                              INTR_INFO_VALID_MASK);
2130                 return;
2131         }
2132         vcpu->cr2 = addr;
2133         vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE, err_code);
2134         vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
2135                      PF_VECTOR |
2136                      INTR_TYPE_EXCEPTION |
2137                      INTR_INFO_DELIEVER_CODE_MASK |
2138                      INTR_INFO_VALID_MASK);
2139
2140 }
2141
2142 static void vmx_free_vmcs(struct kvm_vcpu *vcpu)
2143 {
2144         if (vcpu->vmcs) {
2145                 on_each_cpu(__vcpu_clear, vcpu, 0, 1);
2146                 free_vmcs(vcpu->vmcs);
2147                 vcpu->vmcs = NULL;
2148         }
2149 }
2150
2151 static void vmx_free_vcpu(struct kvm_vcpu *vcpu)
2152 {
2153         vmx_free_vmcs(vcpu);
2154 }
2155
2156 static int vmx_create_vcpu(struct kvm_vcpu *vcpu)
2157 {
2158         struct vmcs *vmcs;
2159
2160         vcpu->guest_msrs = kmalloc(PAGE_SIZE, GFP_KERNEL);
2161         if (!vcpu->guest_msrs)
2162                 return -ENOMEM;
2163
2164         vcpu->host_msrs = kmalloc(PAGE_SIZE, GFP_KERNEL);
2165         if (!vcpu->host_msrs)
2166                 goto out_free_guest_msrs;
2167
2168         vmcs = alloc_vmcs();
2169         if (!vmcs)
2170                 goto out_free_msrs;
2171
2172         vmcs_clear(vmcs);
2173         vcpu->vmcs = vmcs;
2174         vcpu->launched = 0;
2175
2176         return 0;
2177
2178 out_free_msrs:
2179         kfree(vcpu->host_msrs);
2180         vcpu->host_msrs = NULL;
2181
2182 out_free_guest_msrs:
2183         kfree(vcpu->guest_msrs);
2184         vcpu->guest_msrs = NULL;
2185
2186         return -ENOMEM;
2187 }
2188
2189 static struct kvm_arch_ops vmx_arch_ops = {
2190         .cpu_has_kvm_support = cpu_has_kvm_support,
2191         .disabled_by_bios = vmx_disabled_by_bios,
2192         .hardware_setup = hardware_setup,
2193         .hardware_unsetup = hardware_unsetup,
2194         .hardware_enable = hardware_enable,
2195         .hardware_disable = hardware_disable,
2196
2197         .vcpu_create = vmx_create_vcpu,
2198         .vcpu_free = vmx_free_vcpu,
2199
2200         .vcpu_load = vmx_vcpu_load,
2201         .vcpu_put = vmx_vcpu_put,
2202         .vcpu_decache = vmx_vcpu_decache,
2203
2204         .set_guest_debug = set_guest_debug,
2205         .get_msr = vmx_get_msr,
2206         .set_msr = vmx_set_msr,
2207         .get_segment_base = vmx_get_segment_base,
2208         .get_segment = vmx_get_segment,
2209         .set_segment = vmx_set_segment,
2210         .get_cs_db_l_bits = vmx_get_cs_db_l_bits,
2211         .decache_cr4_guest_bits = vmx_decache_cr4_guest_bits,
2212         .set_cr0 = vmx_set_cr0,
2213         .set_cr3 = vmx_set_cr3,
2214         .set_cr4 = vmx_set_cr4,
2215 #ifdef CONFIG_X86_64
2216         .set_efer = vmx_set_efer,
2217 #endif
2218         .get_idt = vmx_get_idt,
2219         .set_idt = vmx_set_idt,
2220         .get_gdt = vmx_get_gdt,
2221         .set_gdt = vmx_set_gdt,
2222         .cache_regs = vcpu_load_rsp_rip,
2223         .decache_regs = vcpu_put_rsp_rip,
2224         .get_rflags = vmx_get_rflags,
2225         .set_rflags = vmx_set_rflags,
2226
2227         .tlb_flush = vmx_flush_tlb,
2228         .inject_page_fault = vmx_inject_page_fault,
2229
2230         .inject_gp = vmx_inject_gp,
2231
2232         .run = vmx_vcpu_run,
2233         .skip_emulated_instruction = skip_emulated_instruction,
2234         .vcpu_setup = vmx_vcpu_setup,
2235         .patch_hypercall = vmx_patch_hypercall,
2236 };
2237
2238 static int __init vmx_init(void)
2239 {
2240         void *iova;
2241         int r;
2242
2243         vmx_io_bitmap_a = alloc_page(GFP_KERNEL | __GFP_HIGHMEM);
2244         if (!vmx_io_bitmap_a)
2245                 return -ENOMEM;
2246
2247         vmx_io_bitmap_b = alloc_page(GFP_KERNEL | __GFP_HIGHMEM);
2248         if (!vmx_io_bitmap_b) {
2249                 r = -ENOMEM;
2250                 goto out;
2251         }
2252
2253         /*
2254          * Allow direct access to the PC debug port (it is often used for I/O
2255          * delays, but the vmexits simply slow things down).
2256          */
2257         iova = kmap(vmx_io_bitmap_a);
2258         memset(iova, 0xff, PAGE_SIZE);
2259         clear_bit(0x80, iova);
2260         kunmap(iova);
2261
2262         iova = kmap(vmx_io_bitmap_b);
2263         memset(iova, 0xff, PAGE_SIZE);
2264         kunmap(iova);
2265
2266         r = kvm_init_arch(&vmx_arch_ops, THIS_MODULE);
2267         if (r)
2268                 goto out1;
2269
2270         return 0;
2271
2272 out1:
2273         __free_page(vmx_io_bitmap_b);
2274 out:
2275         __free_page(vmx_io_bitmap_a);
2276         return r;
2277 }
2278
2279 static void __exit vmx_exit(void)
2280 {
2281         __free_page(vmx_io_bitmap_b);
2282         __free_page(vmx_io_bitmap_a);
2283
2284         kvm_exit_arch();
2285 }
2286
2287 module_init(vmx_init)
2288 module_exit(vmx_exit)