2 * Kernel-based Virtual Machine driver for Linux
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
7 * Copyright (C) 2006 Qumranet, Inc.
10 * Avi Kivity <avi@qumranet.com>
11 * Yaniv Kamay <yaniv@qumranet.com>
13 * This work is licensed under the terms of the GNU GPL, version 2. See
14 * the COPYING file in the top-level directory.
20 #include <linux/module.h>
21 #include <linux/kernel.h>
23 #include <linux/highmem.h>
24 #include <linux/profile.h>
25 #include <linux/sched.h>
29 #include "segment_descriptor.h"
31 MODULE_AUTHOR("Qumranet");
32 MODULE_LICENSE("GPL");
34 static DEFINE_PER_CPU(struct vmcs *, vmxarea);
35 static DEFINE_PER_CPU(struct vmcs *, current_vmcs);
37 static struct page *vmx_io_bitmap_a;
38 static struct page *vmx_io_bitmap_b;
46 static struct vmcs_descriptor {
52 #define VMX_SEGMENT_FIELD(seg) \
53 [VCPU_SREG_##seg] = { \
54 .selector = GUEST_##seg##_SELECTOR, \
55 .base = GUEST_##seg##_BASE, \
56 .limit = GUEST_##seg##_LIMIT, \
57 .ar_bytes = GUEST_##seg##_AR_BYTES, \
60 static struct kvm_vmx_segment_field {
65 } kvm_vmx_segment_fields[] = {
66 VMX_SEGMENT_FIELD(CS),
67 VMX_SEGMENT_FIELD(DS),
68 VMX_SEGMENT_FIELD(ES),
69 VMX_SEGMENT_FIELD(FS),
70 VMX_SEGMENT_FIELD(GS),
71 VMX_SEGMENT_FIELD(SS),
72 VMX_SEGMENT_FIELD(TR),
73 VMX_SEGMENT_FIELD(LDTR),
77 * Keep MSR_K6_STAR at the end, as setup_msrs() will try to optimize it
78 * away by decrementing the array size.
80 static const u32 vmx_msr_index[] = {
82 MSR_SYSCALL_MASK, MSR_LSTAR, MSR_CSTAR, MSR_KERNEL_GS_BASE,
84 MSR_EFER, MSR_K6_STAR,
86 #define NR_VMX_MSR ARRAY_SIZE(vmx_msr_index)
89 static unsigned msr_offset_kernel_gs_base;
90 #define NR_64BIT_MSRS 4
92 * avoid save/load MSR_SYSCALL_MASK and MSR_LSTAR by std vt
93 * mechanism (cpu bug AA24)
97 #define NR_64BIT_MSRS 0
101 static inline int is_page_fault(u32 intr_info)
103 return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK |
104 INTR_INFO_VALID_MASK)) ==
105 (INTR_TYPE_EXCEPTION | PF_VECTOR | INTR_INFO_VALID_MASK);
108 static inline int is_no_device(u32 intr_info)
110 return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK |
111 INTR_INFO_VALID_MASK)) ==
112 (INTR_TYPE_EXCEPTION | NM_VECTOR | INTR_INFO_VALID_MASK);
115 static inline int is_external_interrupt(u32 intr_info)
117 return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VALID_MASK))
118 == (INTR_TYPE_EXT_INTR | INTR_INFO_VALID_MASK);
121 static struct vmx_msr_entry *find_msr_entry(struct kvm_vcpu *vcpu, u32 msr)
125 for (i = 0; i < vcpu->nmsrs; ++i)
126 if (vcpu->guest_msrs[i].index == msr)
127 return &vcpu->guest_msrs[i];
131 static void vmcs_clear(struct vmcs *vmcs)
133 u64 phys_addr = __pa(vmcs);
136 asm volatile (ASM_VMX_VMCLEAR_RAX "; setna %0"
137 : "=g"(error) : "a"(&phys_addr), "m"(phys_addr)
140 printk(KERN_ERR "kvm: vmclear fail: %p/%llx\n",
144 static void __vcpu_clear(void *arg)
146 struct kvm_vcpu *vcpu = arg;
147 int cpu = raw_smp_processor_id();
149 if (vcpu->cpu == cpu)
150 vmcs_clear(vcpu->vmcs);
151 if (per_cpu(current_vmcs, cpu) == vcpu->vmcs)
152 per_cpu(current_vmcs, cpu) = NULL;
155 static void vcpu_clear(struct kvm_vcpu *vcpu)
157 if (vcpu->cpu != raw_smp_processor_id() && vcpu->cpu != -1)
158 smp_call_function_single(vcpu->cpu, __vcpu_clear, vcpu, 0, 1);
164 static unsigned long vmcs_readl(unsigned long field)
168 asm volatile (ASM_VMX_VMREAD_RDX_RAX
169 : "=a"(value) : "d"(field) : "cc");
173 static u16 vmcs_read16(unsigned long field)
175 return vmcs_readl(field);
178 static u32 vmcs_read32(unsigned long field)
180 return vmcs_readl(field);
183 static u64 vmcs_read64(unsigned long field)
186 return vmcs_readl(field);
188 return vmcs_readl(field) | ((u64)vmcs_readl(field+1) << 32);
192 static noinline void vmwrite_error(unsigned long field, unsigned long value)
194 printk(KERN_ERR "vmwrite error: reg %lx value %lx (err %d)\n",
195 field, value, vmcs_read32(VM_INSTRUCTION_ERROR));
199 static void vmcs_writel(unsigned long field, unsigned long value)
203 asm volatile (ASM_VMX_VMWRITE_RAX_RDX "; setna %0"
204 : "=q"(error) : "a"(value), "d"(field) : "cc" );
206 vmwrite_error(field, value);
209 static void vmcs_write16(unsigned long field, u16 value)
211 vmcs_writel(field, value);
214 static void vmcs_write32(unsigned long field, u32 value)
216 vmcs_writel(field, value);
219 static void vmcs_write64(unsigned long field, u64 value)
222 vmcs_writel(field, value);
224 vmcs_writel(field, value);
226 vmcs_writel(field+1, value >> 32);
230 static void vmcs_clear_bits(unsigned long field, u32 mask)
232 vmcs_writel(field, vmcs_readl(field) & ~mask);
235 static void vmcs_set_bits(unsigned long field, u32 mask)
237 vmcs_writel(field, vmcs_readl(field) | mask);
240 static void update_exception_bitmap(struct kvm_vcpu *vcpu)
244 eb = 1u << PF_VECTOR;
245 if (!vcpu->fpu_active)
246 eb |= 1u << NM_VECTOR;
247 if (vcpu->guest_debug.enabled)
249 if (vcpu->rmode.active)
251 vmcs_write32(EXCEPTION_BITMAP, eb);
254 static void reload_tss(void)
256 #ifndef CONFIG_X86_64
259 * VT restores TR but not its size. Useless.
261 struct descriptor_table gdt;
262 struct segment_descriptor *descs;
265 descs = (void *)gdt.base;
266 descs[GDT_ENTRY_TSS].type = 9; /* available TSS */
271 static void vmx_save_host_state(struct kvm_vcpu *vcpu)
273 struct vmx_host_state *hs = &vcpu->vmx_host_state;
280 * Set host fs and gs selectors. Unfortunately, 22.2.3 does not
281 * allow segment selectors with cpl > 0 or ti == 1.
283 hs->ldt_sel = read_ldt();
284 hs->fs_gs_ldt_reload_needed = hs->ldt_sel;
285 hs->fs_sel = read_fs();
286 if (!(hs->fs_sel & 7))
287 vmcs_write16(HOST_FS_SELECTOR, hs->fs_sel);
289 vmcs_write16(HOST_FS_SELECTOR, 0);
290 hs->fs_gs_ldt_reload_needed = 1;
292 hs->gs_sel = read_gs();
293 if (!(hs->gs_sel & 7))
294 vmcs_write16(HOST_GS_SELECTOR, hs->gs_sel);
296 vmcs_write16(HOST_GS_SELECTOR, 0);
297 hs->fs_gs_ldt_reload_needed = 1;
301 vmcs_writel(HOST_FS_BASE, read_msr(MSR_FS_BASE));
302 vmcs_writel(HOST_GS_BASE, read_msr(MSR_GS_BASE));
304 vmcs_writel(HOST_FS_BASE, segment_base(hs->fs_sel));
305 vmcs_writel(HOST_GS_BASE, segment_base(hs->gs_sel));
309 if (is_long_mode(vcpu)) {
310 save_msrs(vcpu->host_msrs + msr_offset_kernel_gs_base, 1);
311 load_msrs(vcpu->guest_msrs, NR_BAD_MSRS);
316 static void vmx_load_host_state(struct kvm_vcpu *vcpu)
318 struct vmx_host_state *hs = &vcpu->vmx_host_state;
324 if (hs->fs_gs_ldt_reload_needed) {
325 load_ldt(hs->ldt_sel);
328 * If we have to reload gs, we must take care to
329 * preserve our gs base.
334 wrmsrl(MSR_GS_BASE, vmcs_readl(HOST_GS_BASE));
341 if (is_long_mode(vcpu)) {
342 save_msrs(vcpu->guest_msrs, NR_BAD_MSRS);
343 load_msrs(vcpu->host_msrs, NR_BAD_MSRS);
349 * Switches to specified vcpu, until a matching vcpu_put(), but assumes
350 * vcpu mutex is already taken.
352 static void vmx_vcpu_load(struct kvm_vcpu *vcpu)
354 u64 phys_addr = __pa(vcpu->vmcs);
359 if (vcpu->cpu != cpu)
362 if (per_cpu(current_vmcs, cpu) != vcpu->vmcs) {
365 per_cpu(current_vmcs, cpu) = vcpu->vmcs;
366 asm volatile (ASM_VMX_VMPTRLD_RAX "; setna %0"
367 : "=g"(error) : "a"(&phys_addr), "m"(phys_addr)
370 printk(KERN_ERR "kvm: vmptrld %p/%llx fail\n",
371 vcpu->vmcs, phys_addr);
374 if (vcpu->cpu != cpu) {
375 struct descriptor_table dt;
376 unsigned long sysenter_esp;
380 * Linux uses per-cpu TSS and GDT, so set these when switching
383 vmcs_writel(HOST_TR_BASE, read_tr_base()); /* 22.2.4 */
385 vmcs_writel(HOST_GDTR_BASE, dt.base); /* 22.2.4 */
387 rdmsrl(MSR_IA32_SYSENTER_ESP, sysenter_esp);
388 vmcs_writel(HOST_IA32_SYSENTER_ESP, sysenter_esp); /* 22.2.3 */
392 static void vmx_vcpu_put(struct kvm_vcpu *vcpu)
394 vmx_load_host_state(vcpu);
395 kvm_put_guest_fpu(vcpu);
399 static void vmx_fpu_activate(struct kvm_vcpu *vcpu)
401 if (vcpu->fpu_active)
403 vcpu->fpu_active = 1;
404 vmcs_clear_bits(GUEST_CR0, CR0_TS_MASK);
405 if (vcpu->cr0 & CR0_TS_MASK)
406 vmcs_set_bits(GUEST_CR0, CR0_TS_MASK);
407 update_exception_bitmap(vcpu);
410 static void vmx_fpu_deactivate(struct kvm_vcpu *vcpu)
412 if (!vcpu->fpu_active)
414 vcpu->fpu_active = 0;
415 vmcs_set_bits(GUEST_CR0, CR0_TS_MASK);
416 update_exception_bitmap(vcpu);
419 static void vmx_vcpu_decache(struct kvm_vcpu *vcpu)
424 static unsigned long vmx_get_rflags(struct kvm_vcpu *vcpu)
426 return vmcs_readl(GUEST_RFLAGS);
429 static void vmx_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
431 vmcs_writel(GUEST_RFLAGS, rflags);
434 static void skip_emulated_instruction(struct kvm_vcpu *vcpu)
437 u32 interruptibility;
439 rip = vmcs_readl(GUEST_RIP);
440 rip += vmcs_read32(VM_EXIT_INSTRUCTION_LEN);
441 vmcs_writel(GUEST_RIP, rip);
444 * We emulated an instruction, so temporary interrupt blocking
445 * should be removed, if set.
447 interruptibility = vmcs_read32(GUEST_INTERRUPTIBILITY_INFO);
448 if (interruptibility & 3)
449 vmcs_write32(GUEST_INTERRUPTIBILITY_INFO,
450 interruptibility & ~3);
451 vcpu->interrupt_window_open = 1;
454 static void vmx_inject_gp(struct kvm_vcpu *vcpu, unsigned error_code)
456 printk(KERN_DEBUG "inject_general_protection: rip 0x%lx\n",
457 vmcs_readl(GUEST_RIP));
458 vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE, error_code);
459 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
461 INTR_TYPE_EXCEPTION |
462 INTR_INFO_DELIEVER_CODE_MASK |
463 INTR_INFO_VALID_MASK);
467 * Set up the vmcs to automatically save and restore system
468 * msrs. Don't touch the 64-bit msrs if the guest is in legacy
469 * mode, as fiddling with msrs is very expensive.
471 static void setup_msrs(struct kvm_vcpu *vcpu)
473 int nr_skip, nr_good_msrs;
475 if (is_long_mode(vcpu))
476 nr_skip = NR_BAD_MSRS;
478 nr_skip = NR_64BIT_MSRS;
479 nr_good_msrs = vcpu->nmsrs - nr_skip;
482 * MSR_K6_STAR is only needed on long mode guests, and only
483 * if efer.sce is enabled.
485 if (find_msr_entry(vcpu, MSR_K6_STAR)) {
488 if (is_long_mode(vcpu) && (vcpu->shadow_efer & EFER_SCE))
493 vmcs_writel(VM_ENTRY_MSR_LOAD_ADDR,
494 virt_to_phys(vcpu->guest_msrs + nr_skip));
495 vmcs_writel(VM_EXIT_MSR_STORE_ADDR,
496 virt_to_phys(vcpu->guest_msrs + nr_skip));
497 vmcs_writel(VM_EXIT_MSR_LOAD_ADDR,
498 virt_to_phys(vcpu->host_msrs + nr_skip));
499 vmcs_write32(VM_EXIT_MSR_STORE_COUNT, nr_good_msrs); /* 22.2.2 */
500 vmcs_write32(VM_EXIT_MSR_LOAD_COUNT, nr_good_msrs); /* 22.2.2 */
501 vmcs_write32(VM_ENTRY_MSR_LOAD_COUNT, nr_good_msrs); /* 22.2.2 */
505 * reads and returns guest's timestamp counter "register"
506 * guest_tsc = host_tsc + tsc_offset -- 21.3
508 static u64 guest_read_tsc(void)
510 u64 host_tsc, tsc_offset;
513 tsc_offset = vmcs_read64(TSC_OFFSET);
514 return host_tsc + tsc_offset;
518 * writes 'guest_tsc' into guest's timestamp counter "register"
519 * guest_tsc = host_tsc + tsc_offset ==> tsc_offset = guest_tsc - host_tsc
521 static void guest_write_tsc(u64 guest_tsc)
526 vmcs_write64(TSC_OFFSET, guest_tsc - host_tsc);
530 * Reads an msr value (of 'msr_index') into 'pdata'.
531 * Returns 0 on success, non-0 otherwise.
532 * Assumes vcpu_load() was already called.
534 static int vmx_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
537 struct vmx_msr_entry *msr;
540 printk(KERN_ERR "BUG: get_msr called with NULL pdata\n");
547 data = vmcs_readl(GUEST_FS_BASE);
550 data = vmcs_readl(GUEST_GS_BASE);
553 return kvm_get_msr_common(vcpu, msr_index, pdata);
555 case MSR_IA32_TIME_STAMP_COUNTER:
556 data = guest_read_tsc();
558 case MSR_IA32_SYSENTER_CS:
559 data = vmcs_read32(GUEST_SYSENTER_CS);
561 case MSR_IA32_SYSENTER_EIP:
562 data = vmcs_readl(GUEST_SYSENTER_EIP);
564 case MSR_IA32_SYSENTER_ESP:
565 data = vmcs_readl(GUEST_SYSENTER_ESP);
568 msr = find_msr_entry(vcpu, msr_index);
573 return kvm_get_msr_common(vcpu, msr_index, pdata);
581 * Writes msr value into into the appropriate "register".
582 * Returns 0 on success, non-0 otherwise.
583 * Assumes vcpu_load() was already called.
585 static int vmx_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
587 struct vmx_msr_entry *msr;
591 return kvm_set_msr_common(vcpu, msr_index, data);
593 vmcs_writel(GUEST_FS_BASE, data);
596 vmcs_writel(GUEST_GS_BASE, data);
599 case MSR_SYSCALL_MASK:
600 msr = find_msr_entry(vcpu, msr_index);
603 if (vcpu->vmx_host_state.loaded)
604 load_msrs(vcpu->guest_msrs, NR_BAD_MSRS);
607 case MSR_IA32_SYSENTER_CS:
608 vmcs_write32(GUEST_SYSENTER_CS, data);
610 case MSR_IA32_SYSENTER_EIP:
611 vmcs_writel(GUEST_SYSENTER_EIP, data);
613 case MSR_IA32_SYSENTER_ESP:
614 vmcs_writel(GUEST_SYSENTER_ESP, data);
616 case MSR_IA32_TIME_STAMP_COUNTER:
617 guest_write_tsc(data);
620 msr = find_msr_entry(vcpu, msr_index);
625 return kvm_set_msr_common(vcpu, msr_index, data);
634 * Sync the rsp and rip registers into the vcpu structure. This allows
635 * registers to be accessed by indexing vcpu->regs.
637 static void vcpu_load_rsp_rip(struct kvm_vcpu *vcpu)
639 vcpu->regs[VCPU_REGS_RSP] = vmcs_readl(GUEST_RSP);
640 vcpu->rip = vmcs_readl(GUEST_RIP);
644 * Syncs rsp and rip back into the vmcs. Should be called after possible
647 static void vcpu_put_rsp_rip(struct kvm_vcpu *vcpu)
649 vmcs_writel(GUEST_RSP, vcpu->regs[VCPU_REGS_RSP]);
650 vmcs_writel(GUEST_RIP, vcpu->rip);
653 static int set_guest_debug(struct kvm_vcpu *vcpu, struct kvm_debug_guest *dbg)
655 unsigned long dr7 = 0x400;
658 old_singlestep = vcpu->guest_debug.singlestep;
660 vcpu->guest_debug.enabled = dbg->enabled;
661 if (vcpu->guest_debug.enabled) {
664 dr7 |= 0x200; /* exact */
665 for (i = 0; i < 4; ++i) {
666 if (!dbg->breakpoints[i].enabled)
668 vcpu->guest_debug.bp[i] = dbg->breakpoints[i].address;
669 dr7 |= 2 << (i*2); /* global enable */
670 dr7 |= 0 << (i*4+16); /* execution breakpoint */
673 vcpu->guest_debug.singlestep = dbg->singlestep;
675 vcpu->guest_debug.singlestep = 0;
677 if (old_singlestep && !vcpu->guest_debug.singlestep) {
680 flags = vmcs_readl(GUEST_RFLAGS);
681 flags &= ~(X86_EFLAGS_TF | X86_EFLAGS_RF);
682 vmcs_writel(GUEST_RFLAGS, flags);
685 update_exception_bitmap(vcpu);
686 vmcs_writel(GUEST_DR7, dr7);
691 static __init int cpu_has_kvm_support(void)
693 unsigned long ecx = cpuid_ecx(1);
694 return test_bit(5, &ecx); /* CPUID.1:ECX.VMX[bit 5] -> VT */
697 static __init int vmx_disabled_by_bios(void)
701 rdmsrl(MSR_IA32_FEATURE_CONTROL, msr);
702 return (msr & 5) == 1; /* locked but not enabled */
705 static void hardware_enable(void *garbage)
707 int cpu = raw_smp_processor_id();
708 u64 phys_addr = __pa(per_cpu(vmxarea, cpu));
711 rdmsrl(MSR_IA32_FEATURE_CONTROL, old);
713 /* enable and lock */
714 wrmsrl(MSR_IA32_FEATURE_CONTROL, old | 5);
715 write_cr4(read_cr4() | CR4_VMXE); /* FIXME: not cpu hotplug safe */
716 asm volatile (ASM_VMX_VMXON_RAX : : "a"(&phys_addr), "m"(phys_addr)
720 static void hardware_disable(void *garbage)
722 asm volatile (ASM_VMX_VMXOFF : : : "cc");
725 static __init void setup_vmcs_descriptor(void)
727 u32 vmx_msr_low, vmx_msr_high;
729 rdmsr(MSR_IA32_VMX_BASIC, vmx_msr_low, vmx_msr_high);
730 vmcs_descriptor.size = vmx_msr_high & 0x1fff;
731 vmcs_descriptor.order = get_order(vmcs_descriptor.size);
732 vmcs_descriptor.revision_id = vmx_msr_low;
735 static struct vmcs *alloc_vmcs_cpu(int cpu)
737 int node = cpu_to_node(cpu);
741 pages = alloc_pages_node(node, GFP_KERNEL, vmcs_descriptor.order);
744 vmcs = page_address(pages);
745 memset(vmcs, 0, vmcs_descriptor.size);
746 vmcs->revision_id = vmcs_descriptor.revision_id; /* vmcs revision id */
750 static struct vmcs *alloc_vmcs(void)
752 return alloc_vmcs_cpu(raw_smp_processor_id());
755 static void free_vmcs(struct vmcs *vmcs)
757 free_pages((unsigned long)vmcs, vmcs_descriptor.order);
760 static void free_kvm_area(void)
764 for_each_online_cpu(cpu)
765 free_vmcs(per_cpu(vmxarea, cpu));
768 extern struct vmcs *alloc_vmcs_cpu(int cpu);
770 static __init int alloc_kvm_area(void)
774 for_each_online_cpu(cpu) {
777 vmcs = alloc_vmcs_cpu(cpu);
783 per_cpu(vmxarea, cpu) = vmcs;
788 static __init int hardware_setup(void)
790 setup_vmcs_descriptor();
791 return alloc_kvm_area();
794 static __exit void hardware_unsetup(void)
799 static void fix_pmode_dataseg(int seg, struct kvm_save_segment *save)
801 struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
803 if (vmcs_readl(sf->base) == save->base && (save->base & AR_S_MASK)) {
804 vmcs_write16(sf->selector, save->selector);
805 vmcs_writel(sf->base, save->base);
806 vmcs_write32(sf->limit, save->limit);
807 vmcs_write32(sf->ar_bytes, save->ar);
809 u32 dpl = (vmcs_read16(sf->selector) & SELECTOR_RPL_MASK)
811 vmcs_write32(sf->ar_bytes, 0x93 | dpl);
815 static void enter_pmode(struct kvm_vcpu *vcpu)
819 vcpu->rmode.active = 0;
821 vmcs_writel(GUEST_TR_BASE, vcpu->rmode.tr.base);
822 vmcs_write32(GUEST_TR_LIMIT, vcpu->rmode.tr.limit);
823 vmcs_write32(GUEST_TR_AR_BYTES, vcpu->rmode.tr.ar);
825 flags = vmcs_readl(GUEST_RFLAGS);
826 flags &= ~(IOPL_MASK | X86_EFLAGS_VM);
827 flags |= (vcpu->rmode.save_iopl << IOPL_SHIFT);
828 vmcs_writel(GUEST_RFLAGS, flags);
830 vmcs_writel(GUEST_CR4, (vmcs_readl(GUEST_CR4) & ~CR4_VME_MASK) |
831 (vmcs_readl(CR4_READ_SHADOW) & CR4_VME_MASK));
833 update_exception_bitmap(vcpu);
835 fix_pmode_dataseg(VCPU_SREG_ES, &vcpu->rmode.es);
836 fix_pmode_dataseg(VCPU_SREG_DS, &vcpu->rmode.ds);
837 fix_pmode_dataseg(VCPU_SREG_GS, &vcpu->rmode.gs);
838 fix_pmode_dataseg(VCPU_SREG_FS, &vcpu->rmode.fs);
840 vmcs_write16(GUEST_SS_SELECTOR, 0);
841 vmcs_write32(GUEST_SS_AR_BYTES, 0x93);
843 vmcs_write16(GUEST_CS_SELECTOR,
844 vmcs_read16(GUEST_CS_SELECTOR) & ~SELECTOR_RPL_MASK);
845 vmcs_write32(GUEST_CS_AR_BYTES, 0x9b);
848 static int rmode_tss_base(struct kvm* kvm)
850 gfn_t base_gfn = kvm->memslots[0].base_gfn + kvm->memslots[0].npages - 3;
851 return base_gfn << PAGE_SHIFT;
854 static void fix_rmode_seg(int seg, struct kvm_save_segment *save)
856 struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
858 save->selector = vmcs_read16(sf->selector);
859 save->base = vmcs_readl(sf->base);
860 save->limit = vmcs_read32(sf->limit);
861 save->ar = vmcs_read32(sf->ar_bytes);
862 vmcs_write16(sf->selector, vmcs_readl(sf->base) >> 4);
863 vmcs_write32(sf->limit, 0xffff);
864 vmcs_write32(sf->ar_bytes, 0xf3);
867 static void enter_rmode(struct kvm_vcpu *vcpu)
871 vcpu->rmode.active = 1;
873 vcpu->rmode.tr.base = vmcs_readl(GUEST_TR_BASE);
874 vmcs_writel(GUEST_TR_BASE, rmode_tss_base(vcpu->kvm));
876 vcpu->rmode.tr.limit = vmcs_read32(GUEST_TR_LIMIT);
877 vmcs_write32(GUEST_TR_LIMIT, RMODE_TSS_SIZE - 1);
879 vcpu->rmode.tr.ar = vmcs_read32(GUEST_TR_AR_BYTES);
880 vmcs_write32(GUEST_TR_AR_BYTES, 0x008b);
882 flags = vmcs_readl(GUEST_RFLAGS);
883 vcpu->rmode.save_iopl = (flags & IOPL_MASK) >> IOPL_SHIFT;
885 flags |= IOPL_MASK | X86_EFLAGS_VM;
887 vmcs_writel(GUEST_RFLAGS, flags);
888 vmcs_writel(GUEST_CR4, vmcs_readl(GUEST_CR4) | CR4_VME_MASK);
889 update_exception_bitmap(vcpu);
891 vmcs_write16(GUEST_SS_SELECTOR, vmcs_readl(GUEST_SS_BASE) >> 4);
892 vmcs_write32(GUEST_SS_LIMIT, 0xffff);
893 vmcs_write32(GUEST_SS_AR_BYTES, 0xf3);
895 vmcs_write32(GUEST_CS_AR_BYTES, 0xf3);
896 vmcs_write32(GUEST_CS_LIMIT, 0xffff);
897 if (vmcs_readl(GUEST_CS_BASE) == 0xffff0000)
898 vmcs_writel(GUEST_CS_BASE, 0xf0000);
899 vmcs_write16(GUEST_CS_SELECTOR, vmcs_readl(GUEST_CS_BASE) >> 4);
901 fix_rmode_seg(VCPU_SREG_ES, &vcpu->rmode.es);
902 fix_rmode_seg(VCPU_SREG_DS, &vcpu->rmode.ds);
903 fix_rmode_seg(VCPU_SREG_GS, &vcpu->rmode.gs);
904 fix_rmode_seg(VCPU_SREG_FS, &vcpu->rmode.fs);
909 static void enter_lmode(struct kvm_vcpu *vcpu)
913 guest_tr_ar = vmcs_read32(GUEST_TR_AR_BYTES);
914 if ((guest_tr_ar & AR_TYPE_MASK) != AR_TYPE_BUSY_64_TSS) {
915 printk(KERN_DEBUG "%s: tss fixup for long mode. \n",
917 vmcs_write32(GUEST_TR_AR_BYTES,
918 (guest_tr_ar & ~AR_TYPE_MASK)
919 | AR_TYPE_BUSY_64_TSS);
922 vcpu->shadow_efer |= EFER_LMA;
924 find_msr_entry(vcpu, MSR_EFER)->data |= EFER_LMA | EFER_LME;
925 vmcs_write32(VM_ENTRY_CONTROLS,
926 vmcs_read32(VM_ENTRY_CONTROLS)
927 | VM_ENTRY_CONTROLS_IA32E_MASK);
930 static void exit_lmode(struct kvm_vcpu *vcpu)
932 vcpu->shadow_efer &= ~EFER_LMA;
934 vmcs_write32(VM_ENTRY_CONTROLS,
935 vmcs_read32(VM_ENTRY_CONTROLS)
936 & ~VM_ENTRY_CONTROLS_IA32E_MASK);
941 static void vmx_decache_cr4_guest_bits(struct kvm_vcpu *vcpu)
943 vcpu->cr4 &= KVM_GUEST_CR4_MASK;
944 vcpu->cr4 |= vmcs_readl(GUEST_CR4) & ~KVM_GUEST_CR4_MASK;
947 static void vmx_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
949 vmx_fpu_deactivate(vcpu);
951 if (vcpu->rmode.active && (cr0 & CR0_PE_MASK))
954 if (!vcpu->rmode.active && !(cr0 & CR0_PE_MASK))
958 if (vcpu->shadow_efer & EFER_LME) {
959 if (!is_paging(vcpu) && (cr0 & CR0_PG_MASK))
961 if (is_paging(vcpu) && !(cr0 & CR0_PG_MASK))
966 vmcs_writel(CR0_READ_SHADOW, cr0);
967 vmcs_writel(GUEST_CR0,
968 (cr0 & ~KVM_GUEST_CR0_MASK) | KVM_VM_CR0_ALWAYS_ON);
971 if (!(cr0 & CR0_TS_MASK) || !(cr0 & CR0_PE_MASK))
972 vmx_fpu_activate(vcpu);
975 static void vmx_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
977 vmcs_writel(GUEST_CR3, cr3);
978 if (vcpu->cr0 & CR0_PE_MASK)
979 vmx_fpu_deactivate(vcpu);
982 static void vmx_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
984 vmcs_writel(CR4_READ_SHADOW, cr4);
985 vmcs_writel(GUEST_CR4, cr4 | (vcpu->rmode.active ?
986 KVM_RMODE_VM_CR4_ALWAYS_ON : KVM_PMODE_VM_CR4_ALWAYS_ON));
992 static void vmx_set_efer(struct kvm_vcpu *vcpu, u64 efer)
994 struct vmx_msr_entry *msr = find_msr_entry(vcpu, MSR_EFER);
996 vcpu->shadow_efer = efer;
997 if (efer & EFER_LMA) {
998 vmcs_write32(VM_ENTRY_CONTROLS,
999 vmcs_read32(VM_ENTRY_CONTROLS) |
1000 VM_ENTRY_CONTROLS_IA32E_MASK);
1004 vmcs_write32(VM_ENTRY_CONTROLS,
1005 vmcs_read32(VM_ENTRY_CONTROLS) &
1006 ~VM_ENTRY_CONTROLS_IA32E_MASK);
1008 msr->data = efer & ~EFER_LME;
1015 static u64 vmx_get_segment_base(struct kvm_vcpu *vcpu, int seg)
1017 struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
1019 return vmcs_readl(sf->base);
1022 static void vmx_get_segment(struct kvm_vcpu *vcpu,
1023 struct kvm_segment *var, int seg)
1025 struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
1028 var->base = vmcs_readl(sf->base);
1029 var->limit = vmcs_read32(sf->limit);
1030 var->selector = vmcs_read16(sf->selector);
1031 ar = vmcs_read32(sf->ar_bytes);
1032 if (ar & AR_UNUSABLE_MASK)
1034 var->type = ar & 15;
1035 var->s = (ar >> 4) & 1;
1036 var->dpl = (ar >> 5) & 3;
1037 var->present = (ar >> 7) & 1;
1038 var->avl = (ar >> 12) & 1;
1039 var->l = (ar >> 13) & 1;
1040 var->db = (ar >> 14) & 1;
1041 var->g = (ar >> 15) & 1;
1042 var->unusable = (ar >> 16) & 1;
1045 static u32 vmx_segment_access_rights(struct kvm_segment *var)
1052 ar = var->type & 15;
1053 ar |= (var->s & 1) << 4;
1054 ar |= (var->dpl & 3) << 5;
1055 ar |= (var->present & 1) << 7;
1056 ar |= (var->avl & 1) << 12;
1057 ar |= (var->l & 1) << 13;
1058 ar |= (var->db & 1) << 14;
1059 ar |= (var->g & 1) << 15;
1061 if (ar == 0) /* a 0 value means unusable */
1062 ar = AR_UNUSABLE_MASK;
1067 static void vmx_set_segment(struct kvm_vcpu *vcpu,
1068 struct kvm_segment *var, int seg)
1070 struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
1073 if (vcpu->rmode.active && seg == VCPU_SREG_TR) {
1074 vcpu->rmode.tr.selector = var->selector;
1075 vcpu->rmode.tr.base = var->base;
1076 vcpu->rmode.tr.limit = var->limit;
1077 vcpu->rmode.tr.ar = vmx_segment_access_rights(var);
1080 vmcs_writel(sf->base, var->base);
1081 vmcs_write32(sf->limit, var->limit);
1082 vmcs_write16(sf->selector, var->selector);
1083 if (vcpu->rmode.active && var->s) {
1085 * Hack real-mode segments into vm86 compatibility.
1087 if (var->base == 0xffff0000 && var->selector == 0xf000)
1088 vmcs_writel(sf->base, 0xf0000);
1091 ar = vmx_segment_access_rights(var);
1092 vmcs_write32(sf->ar_bytes, ar);
1095 static void vmx_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
1097 u32 ar = vmcs_read32(GUEST_CS_AR_BYTES);
1099 *db = (ar >> 14) & 1;
1100 *l = (ar >> 13) & 1;
1103 static void vmx_get_idt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
1105 dt->limit = vmcs_read32(GUEST_IDTR_LIMIT);
1106 dt->base = vmcs_readl(GUEST_IDTR_BASE);
1109 static void vmx_set_idt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
1111 vmcs_write32(GUEST_IDTR_LIMIT, dt->limit);
1112 vmcs_writel(GUEST_IDTR_BASE, dt->base);
1115 static void vmx_get_gdt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
1117 dt->limit = vmcs_read32(GUEST_GDTR_LIMIT);
1118 dt->base = vmcs_readl(GUEST_GDTR_BASE);
1121 static void vmx_set_gdt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
1123 vmcs_write32(GUEST_GDTR_LIMIT, dt->limit);
1124 vmcs_writel(GUEST_GDTR_BASE, dt->base);
1127 static int init_rmode_tss(struct kvm* kvm)
1129 struct page *p1, *p2, *p3;
1130 gfn_t fn = rmode_tss_base(kvm) >> PAGE_SHIFT;
1133 p1 = gfn_to_page(kvm, fn++);
1134 p2 = gfn_to_page(kvm, fn++);
1135 p3 = gfn_to_page(kvm, fn);
1137 if (!p1 || !p2 || !p3) {
1138 kvm_printf(kvm,"%s: gfn_to_page failed\n", __FUNCTION__);
1142 page = kmap_atomic(p1, KM_USER0);
1143 memset(page, 0, PAGE_SIZE);
1144 *(u16*)(page + 0x66) = TSS_BASE_SIZE + TSS_REDIRECTION_SIZE;
1145 kunmap_atomic(page, KM_USER0);
1147 page = kmap_atomic(p2, KM_USER0);
1148 memset(page, 0, PAGE_SIZE);
1149 kunmap_atomic(page, KM_USER0);
1151 page = kmap_atomic(p3, KM_USER0);
1152 memset(page, 0, PAGE_SIZE);
1153 *(page + RMODE_TSS_SIZE - 2 * PAGE_SIZE - 1) = ~0;
1154 kunmap_atomic(page, KM_USER0);
1159 static void vmcs_write32_fixedbits(u32 msr, u32 vmcs_field, u32 val)
1161 u32 msr_high, msr_low;
1163 rdmsr(msr, msr_low, msr_high);
1167 vmcs_write32(vmcs_field, val);
1170 static void seg_setup(int seg)
1172 struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
1174 vmcs_write16(sf->selector, 0);
1175 vmcs_writel(sf->base, 0);
1176 vmcs_write32(sf->limit, 0xffff);
1177 vmcs_write32(sf->ar_bytes, 0x93);
1181 * Sets up the vmcs for emulated real mode.
1183 static int vmx_vcpu_setup(struct kvm_vcpu *vcpu)
1185 u32 host_sysenter_cs;
1188 struct descriptor_table dt;
1191 unsigned long kvm_vmx_return;
1193 if (!init_rmode_tss(vcpu->kvm)) {
1198 memset(vcpu->regs, 0, sizeof(vcpu->regs));
1199 vcpu->regs[VCPU_REGS_RDX] = get_rdx_init_val();
1201 vcpu->apic_base = 0xfee00000 |
1202 /*for vcpu 0*/ MSR_IA32_APICBASE_BSP |
1203 MSR_IA32_APICBASE_ENABLE;
1208 * GUEST_CS_BASE should really be 0xffff0000, but VT vm86 mode
1209 * insists on having GUEST_CS_BASE == GUEST_CS_SELECTOR << 4. Sigh.
1211 vmcs_write16(GUEST_CS_SELECTOR, 0xf000);
1212 vmcs_writel(GUEST_CS_BASE, 0x000f0000);
1213 vmcs_write32(GUEST_CS_LIMIT, 0xffff);
1214 vmcs_write32(GUEST_CS_AR_BYTES, 0x9b);
1216 seg_setup(VCPU_SREG_DS);
1217 seg_setup(VCPU_SREG_ES);
1218 seg_setup(VCPU_SREG_FS);
1219 seg_setup(VCPU_SREG_GS);
1220 seg_setup(VCPU_SREG_SS);
1222 vmcs_write16(GUEST_TR_SELECTOR, 0);
1223 vmcs_writel(GUEST_TR_BASE, 0);
1224 vmcs_write32(GUEST_TR_LIMIT, 0xffff);
1225 vmcs_write32(GUEST_TR_AR_BYTES, 0x008b);
1227 vmcs_write16(GUEST_LDTR_SELECTOR, 0);
1228 vmcs_writel(GUEST_LDTR_BASE, 0);
1229 vmcs_write32(GUEST_LDTR_LIMIT, 0xffff);
1230 vmcs_write32(GUEST_LDTR_AR_BYTES, 0x00082);
1232 vmcs_write32(GUEST_SYSENTER_CS, 0);
1233 vmcs_writel(GUEST_SYSENTER_ESP, 0);
1234 vmcs_writel(GUEST_SYSENTER_EIP, 0);
1236 vmcs_writel(GUEST_RFLAGS, 0x02);
1237 vmcs_writel(GUEST_RIP, 0xfff0);
1238 vmcs_writel(GUEST_RSP, 0);
1240 //todo: dr0 = dr1 = dr2 = dr3 = 0; dr6 = 0xffff0ff0
1241 vmcs_writel(GUEST_DR7, 0x400);
1243 vmcs_writel(GUEST_GDTR_BASE, 0);
1244 vmcs_write32(GUEST_GDTR_LIMIT, 0xffff);
1246 vmcs_writel(GUEST_IDTR_BASE, 0);
1247 vmcs_write32(GUEST_IDTR_LIMIT, 0xffff);
1249 vmcs_write32(GUEST_ACTIVITY_STATE, 0);
1250 vmcs_write32(GUEST_INTERRUPTIBILITY_INFO, 0);
1251 vmcs_write32(GUEST_PENDING_DBG_EXCEPTIONS, 0);
1254 vmcs_write64(IO_BITMAP_A, page_to_phys(vmx_io_bitmap_a));
1255 vmcs_write64(IO_BITMAP_B, page_to_phys(vmx_io_bitmap_b));
1259 vmcs_write64(VMCS_LINK_POINTER, -1ull); /* 22.3.1.5 */
1261 /* Special registers */
1262 vmcs_write64(GUEST_IA32_DEBUGCTL, 0);
1265 vmcs_write32_fixedbits(MSR_IA32_VMX_PINBASED_CTLS,
1266 PIN_BASED_VM_EXEC_CONTROL,
1267 PIN_BASED_EXT_INTR_MASK /* 20.6.1 */
1268 | PIN_BASED_NMI_EXITING /* 20.6.1 */
1270 vmcs_write32_fixedbits(MSR_IA32_VMX_PROCBASED_CTLS,
1271 CPU_BASED_VM_EXEC_CONTROL,
1272 CPU_BASED_HLT_EXITING /* 20.6.2 */
1273 | CPU_BASED_CR8_LOAD_EXITING /* 20.6.2 */
1274 | CPU_BASED_CR8_STORE_EXITING /* 20.6.2 */
1275 | CPU_BASED_ACTIVATE_IO_BITMAP /* 20.6.2 */
1276 | CPU_BASED_MOV_DR_EXITING
1277 | CPU_BASED_USE_TSC_OFFSETING /* 21.3 */
1280 vmcs_write32(PAGE_FAULT_ERROR_CODE_MASK, 0);
1281 vmcs_write32(PAGE_FAULT_ERROR_CODE_MATCH, 0);
1282 vmcs_write32(CR3_TARGET_COUNT, 0); /* 22.2.1 */
1284 vmcs_writel(HOST_CR0, read_cr0()); /* 22.2.3 */
1285 vmcs_writel(HOST_CR4, read_cr4()); /* 22.2.3, 22.2.5 */
1286 vmcs_writel(HOST_CR3, read_cr3()); /* 22.2.3 FIXME: shadow tables */
1288 vmcs_write16(HOST_CS_SELECTOR, __KERNEL_CS); /* 22.2.4 */
1289 vmcs_write16(HOST_DS_SELECTOR, __KERNEL_DS); /* 22.2.4 */
1290 vmcs_write16(HOST_ES_SELECTOR, __KERNEL_DS); /* 22.2.4 */
1291 vmcs_write16(HOST_FS_SELECTOR, read_fs()); /* 22.2.4 */
1292 vmcs_write16(HOST_GS_SELECTOR, read_gs()); /* 22.2.4 */
1293 vmcs_write16(HOST_SS_SELECTOR, __KERNEL_DS); /* 22.2.4 */
1294 #ifdef CONFIG_X86_64
1295 rdmsrl(MSR_FS_BASE, a);
1296 vmcs_writel(HOST_FS_BASE, a); /* 22.2.4 */
1297 rdmsrl(MSR_GS_BASE, a);
1298 vmcs_writel(HOST_GS_BASE, a); /* 22.2.4 */
1300 vmcs_writel(HOST_FS_BASE, 0); /* 22.2.4 */
1301 vmcs_writel(HOST_GS_BASE, 0); /* 22.2.4 */
1304 vmcs_write16(HOST_TR_SELECTOR, GDT_ENTRY_TSS*8); /* 22.2.4 */
1307 vmcs_writel(HOST_IDTR_BASE, dt.base); /* 22.2.4 */
1309 asm ("mov $.Lkvm_vmx_return, %0" : "=r"(kvm_vmx_return));
1310 vmcs_writel(HOST_RIP, kvm_vmx_return); /* 22.2.5 */
1312 rdmsr(MSR_IA32_SYSENTER_CS, host_sysenter_cs, junk);
1313 vmcs_write32(HOST_IA32_SYSENTER_CS, host_sysenter_cs);
1314 rdmsrl(MSR_IA32_SYSENTER_ESP, a);
1315 vmcs_writel(HOST_IA32_SYSENTER_ESP, a); /* 22.2.3 */
1316 rdmsrl(MSR_IA32_SYSENTER_EIP, a);
1317 vmcs_writel(HOST_IA32_SYSENTER_EIP, a); /* 22.2.3 */
1319 for (i = 0; i < NR_VMX_MSR; ++i) {
1320 u32 index = vmx_msr_index[i];
1321 u32 data_low, data_high;
1323 int j = vcpu->nmsrs;
1325 if (rdmsr_safe(index, &data_low, &data_high) < 0)
1327 if (wrmsr_safe(index, data_low, data_high) < 0)
1329 data = data_low | ((u64)data_high << 32);
1330 vcpu->host_msrs[j].index = index;
1331 vcpu->host_msrs[j].reserved = 0;
1332 vcpu->host_msrs[j].data = data;
1333 vcpu->guest_msrs[j] = vcpu->host_msrs[j];
1334 #ifdef CONFIG_X86_64
1335 if (index == MSR_KERNEL_GS_BASE)
1336 msr_offset_kernel_gs_base = j;
1343 vmcs_write32_fixedbits(MSR_IA32_VMX_EXIT_CTLS, VM_EXIT_CONTROLS,
1344 (HOST_IS_64 << 9)); /* 22.2,1, 20.7.1 */
1346 /* 22.2.1, 20.8.1 */
1347 vmcs_write32_fixedbits(MSR_IA32_VMX_ENTRY_CTLS,
1348 VM_ENTRY_CONTROLS, 0);
1349 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD, 0); /* 22.2.1 */
1351 #ifdef CONFIG_X86_64
1352 vmcs_writel(VIRTUAL_APIC_PAGE_ADDR, 0);
1353 vmcs_writel(TPR_THRESHOLD, 0);
1356 vmcs_writel(CR0_GUEST_HOST_MASK, ~0UL);
1357 vmcs_writel(CR4_GUEST_HOST_MASK, KVM_GUEST_CR4_MASK);
1359 vcpu->cr0 = 0x60000010;
1360 vmx_set_cr0(vcpu, vcpu->cr0); // enter rmode
1361 vmx_set_cr4(vcpu, 0);
1362 #ifdef CONFIG_X86_64
1363 vmx_set_efer(vcpu, 0);
1365 vmx_fpu_activate(vcpu);
1366 update_exception_bitmap(vcpu);
1374 static void inject_rmode_irq(struct kvm_vcpu *vcpu, int irq)
1379 unsigned long flags;
1380 unsigned long ss_base = vmcs_readl(GUEST_SS_BASE);
1381 u16 sp = vmcs_readl(GUEST_RSP);
1382 u32 ss_limit = vmcs_read32(GUEST_SS_LIMIT);
1384 if (sp > ss_limit || sp < 6 ) {
1385 vcpu_printf(vcpu, "%s: #SS, rsp 0x%lx ss 0x%lx limit 0x%x\n",
1387 vmcs_readl(GUEST_RSP),
1388 vmcs_readl(GUEST_SS_BASE),
1389 vmcs_read32(GUEST_SS_LIMIT));
1393 if (kvm_read_guest(vcpu, irq * sizeof(ent), sizeof(ent), &ent) !=
1395 vcpu_printf(vcpu, "%s: read guest err\n", __FUNCTION__);
1399 flags = vmcs_readl(GUEST_RFLAGS);
1400 cs = vmcs_readl(GUEST_CS_BASE) >> 4;
1401 ip = vmcs_readl(GUEST_RIP);
1404 if (kvm_write_guest(vcpu, ss_base + sp - 2, 2, &flags) != 2 ||
1405 kvm_write_guest(vcpu, ss_base + sp - 4, 2, &cs) != 2 ||
1406 kvm_write_guest(vcpu, ss_base + sp - 6, 2, &ip) != 2) {
1407 vcpu_printf(vcpu, "%s: write guest err\n", __FUNCTION__);
1411 vmcs_writel(GUEST_RFLAGS, flags &
1412 ~( X86_EFLAGS_IF | X86_EFLAGS_AC | X86_EFLAGS_TF));
1413 vmcs_write16(GUEST_CS_SELECTOR, ent[1]) ;
1414 vmcs_writel(GUEST_CS_BASE, ent[1] << 4);
1415 vmcs_writel(GUEST_RIP, ent[0]);
1416 vmcs_writel(GUEST_RSP, (vmcs_readl(GUEST_RSP) & ~0xffff) | (sp - 6));
1419 static void kvm_do_inject_irq(struct kvm_vcpu *vcpu)
1421 int word_index = __ffs(vcpu->irq_summary);
1422 int bit_index = __ffs(vcpu->irq_pending[word_index]);
1423 int irq = word_index * BITS_PER_LONG + bit_index;
1425 clear_bit(bit_index, &vcpu->irq_pending[word_index]);
1426 if (!vcpu->irq_pending[word_index])
1427 clear_bit(word_index, &vcpu->irq_summary);
1429 if (vcpu->rmode.active) {
1430 inject_rmode_irq(vcpu, irq);
1433 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
1434 irq | INTR_TYPE_EXT_INTR | INTR_INFO_VALID_MASK);
1438 static void do_interrupt_requests(struct kvm_vcpu *vcpu,
1439 struct kvm_run *kvm_run)
1441 u32 cpu_based_vm_exec_control;
1443 vcpu->interrupt_window_open =
1444 ((vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_IF) &&
1445 (vmcs_read32(GUEST_INTERRUPTIBILITY_INFO) & 3) == 0);
1447 if (vcpu->interrupt_window_open &&
1448 vcpu->irq_summary &&
1449 !(vmcs_read32(VM_ENTRY_INTR_INFO_FIELD) & INTR_INFO_VALID_MASK))
1451 * If interrupts enabled, and not blocked by sti or mov ss. Good.
1453 kvm_do_inject_irq(vcpu);
1455 cpu_based_vm_exec_control = vmcs_read32(CPU_BASED_VM_EXEC_CONTROL);
1456 if (!vcpu->interrupt_window_open &&
1457 (vcpu->irq_summary || kvm_run->request_interrupt_window))
1459 * Interrupts blocked. Wait for unblock.
1461 cpu_based_vm_exec_control |= CPU_BASED_VIRTUAL_INTR_PENDING;
1463 cpu_based_vm_exec_control &= ~CPU_BASED_VIRTUAL_INTR_PENDING;
1464 vmcs_write32(CPU_BASED_VM_EXEC_CONTROL, cpu_based_vm_exec_control);
1467 static void kvm_guest_debug_pre(struct kvm_vcpu *vcpu)
1469 struct kvm_guest_debug *dbg = &vcpu->guest_debug;
1471 set_debugreg(dbg->bp[0], 0);
1472 set_debugreg(dbg->bp[1], 1);
1473 set_debugreg(dbg->bp[2], 2);
1474 set_debugreg(dbg->bp[3], 3);
1476 if (dbg->singlestep) {
1477 unsigned long flags;
1479 flags = vmcs_readl(GUEST_RFLAGS);
1480 flags |= X86_EFLAGS_TF | X86_EFLAGS_RF;
1481 vmcs_writel(GUEST_RFLAGS, flags);
1485 static int handle_rmode_exception(struct kvm_vcpu *vcpu,
1486 int vec, u32 err_code)
1488 if (!vcpu->rmode.active)
1491 if (vec == GP_VECTOR && err_code == 0)
1492 if (emulate_instruction(vcpu, NULL, 0, 0) == EMULATE_DONE)
1497 static int handle_exception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1499 u32 intr_info, error_code;
1500 unsigned long cr2, rip;
1502 enum emulation_result er;
1505 vect_info = vmcs_read32(IDT_VECTORING_INFO_FIELD);
1506 intr_info = vmcs_read32(VM_EXIT_INTR_INFO);
1508 if ((vect_info & VECTORING_INFO_VALID_MASK) &&
1509 !is_page_fault(intr_info)) {
1510 printk(KERN_ERR "%s: unexpected, vectoring info 0x%x "
1511 "intr info 0x%x\n", __FUNCTION__, vect_info, intr_info);
1514 if (is_external_interrupt(vect_info)) {
1515 int irq = vect_info & VECTORING_INFO_VECTOR_MASK;
1516 set_bit(irq, vcpu->irq_pending);
1517 set_bit(irq / BITS_PER_LONG, &vcpu->irq_summary);
1520 if ((intr_info & INTR_INFO_INTR_TYPE_MASK) == 0x200) { /* nmi */
1525 if (is_no_device(intr_info)) {
1526 vmx_fpu_activate(vcpu);
1531 rip = vmcs_readl(GUEST_RIP);
1532 if (intr_info & INTR_INFO_DELIEVER_CODE_MASK)
1533 error_code = vmcs_read32(VM_EXIT_INTR_ERROR_CODE);
1534 if (is_page_fault(intr_info)) {
1535 cr2 = vmcs_readl(EXIT_QUALIFICATION);
1537 spin_lock(&vcpu->kvm->lock);
1538 r = kvm_mmu_page_fault(vcpu, cr2, error_code);
1540 spin_unlock(&vcpu->kvm->lock);
1544 spin_unlock(&vcpu->kvm->lock);
1548 er = emulate_instruction(vcpu, kvm_run, cr2, error_code);
1549 spin_unlock(&vcpu->kvm->lock);
1554 case EMULATE_DO_MMIO:
1555 ++vcpu->stat.mmio_exits;
1556 kvm_run->exit_reason = KVM_EXIT_MMIO;
1559 vcpu_printf(vcpu, "%s: emulate fail\n", __FUNCTION__);
1566 if (vcpu->rmode.active &&
1567 handle_rmode_exception(vcpu, intr_info & INTR_INFO_VECTOR_MASK,
1571 if ((intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK)) == (INTR_TYPE_EXCEPTION | 1)) {
1572 kvm_run->exit_reason = KVM_EXIT_DEBUG;
1575 kvm_run->exit_reason = KVM_EXIT_EXCEPTION;
1576 kvm_run->ex.exception = intr_info & INTR_INFO_VECTOR_MASK;
1577 kvm_run->ex.error_code = error_code;
1581 static int handle_external_interrupt(struct kvm_vcpu *vcpu,
1582 struct kvm_run *kvm_run)
1584 ++vcpu->stat.irq_exits;
1588 static int handle_triple_fault(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1590 kvm_run->exit_reason = KVM_EXIT_SHUTDOWN;
1594 static int get_io_count(struct kvm_vcpu *vcpu, unsigned long *count)
1601 if ((vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_VM)) {
1604 u32 cs_ar = vmcs_read32(GUEST_CS_AR_BYTES);
1606 countr_size = (cs_ar & AR_L_MASK) ? 8:
1607 (cs_ar & AR_DB_MASK) ? 4: 2;
1610 rip = vmcs_readl(GUEST_RIP);
1611 if (countr_size != 8)
1612 rip += vmcs_readl(GUEST_CS_BASE);
1614 n = kvm_read_guest(vcpu, rip, sizeof(inst), &inst);
1616 for (i = 0; i < n; i++) {
1617 switch (((u8*)&inst)[i]) {
1630 countr_size = (countr_size == 2) ? 4: (countr_size >> 1);
1638 *count = vcpu->regs[VCPU_REGS_RCX] & (~0ULL >> (64 - countr_size));
1639 //printk("cx: %lx\n", vcpu->regs[VCPU_REGS_RCX]);
1643 static int handle_io(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1645 u64 exit_qualification;
1646 int size, down, in, string, rep;
1648 unsigned long count;
1651 ++vcpu->stat.io_exits;
1652 exit_qualification = vmcs_read64(EXIT_QUALIFICATION);
1653 in = (exit_qualification & 8) != 0;
1654 size = (exit_qualification & 7) + 1;
1655 string = (exit_qualification & 16) != 0;
1656 down = (vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_DF) != 0;
1658 rep = (exit_qualification & 32) != 0;
1659 port = exit_qualification >> 16;
1662 if (rep && !get_io_count(vcpu, &count))
1664 address = vmcs_readl(GUEST_LINEAR_ADDRESS);
1666 return kvm_setup_pio(vcpu, kvm_run, in, size, count, string, down,
1667 address, rep, port);
1671 vmx_patch_hypercall(struct kvm_vcpu *vcpu, unsigned char *hypercall)
1674 * Patch in the VMCALL instruction:
1676 hypercall[0] = 0x0f;
1677 hypercall[1] = 0x01;
1678 hypercall[2] = 0xc1;
1679 hypercall[3] = 0xc3;
1682 static int handle_cr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1684 u64 exit_qualification;
1688 exit_qualification = vmcs_read64(EXIT_QUALIFICATION);
1689 cr = exit_qualification & 15;
1690 reg = (exit_qualification >> 8) & 15;
1691 switch ((exit_qualification >> 4) & 3) {
1692 case 0: /* mov to cr */
1695 vcpu_load_rsp_rip(vcpu);
1696 set_cr0(vcpu, vcpu->regs[reg]);
1697 skip_emulated_instruction(vcpu);
1700 vcpu_load_rsp_rip(vcpu);
1701 set_cr3(vcpu, vcpu->regs[reg]);
1702 skip_emulated_instruction(vcpu);
1705 vcpu_load_rsp_rip(vcpu);
1706 set_cr4(vcpu, vcpu->regs[reg]);
1707 skip_emulated_instruction(vcpu);
1710 vcpu_load_rsp_rip(vcpu);
1711 set_cr8(vcpu, vcpu->regs[reg]);
1712 skip_emulated_instruction(vcpu);
1717 vcpu_load_rsp_rip(vcpu);
1718 vmx_fpu_deactivate(vcpu);
1719 vcpu->cr0 &= ~CR0_TS_MASK;
1720 vmcs_writel(CR0_READ_SHADOW, vcpu->cr0);
1721 vmx_fpu_activate(vcpu);
1722 skip_emulated_instruction(vcpu);
1724 case 1: /*mov from cr*/
1727 vcpu_load_rsp_rip(vcpu);
1728 vcpu->regs[reg] = vcpu->cr3;
1729 vcpu_put_rsp_rip(vcpu);
1730 skip_emulated_instruction(vcpu);
1733 vcpu_load_rsp_rip(vcpu);
1734 vcpu->regs[reg] = vcpu->cr8;
1735 vcpu_put_rsp_rip(vcpu);
1736 skip_emulated_instruction(vcpu);
1741 lmsw(vcpu, (exit_qualification >> LMSW_SOURCE_DATA_SHIFT) & 0x0f);
1743 skip_emulated_instruction(vcpu);
1748 kvm_run->exit_reason = 0;
1749 printk(KERN_ERR "kvm: unhandled control register: op %d cr %d\n",
1750 (int)(exit_qualification >> 4) & 3, cr);
1754 static int handle_dr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1756 u64 exit_qualification;
1761 * FIXME: this code assumes the host is debugging the guest.
1762 * need to deal with guest debugging itself too.
1764 exit_qualification = vmcs_read64(EXIT_QUALIFICATION);
1765 dr = exit_qualification & 7;
1766 reg = (exit_qualification >> 8) & 15;
1767 vcpu_load_rsp_rip(vcpu);
1768 if (exit_qualification & 16) {
1780 vcpu->regs[reg] = val;
1784 vcpu_put_rsp_rip(vcpu);
1785 skip_emulated_instruction(vcpu);
1789 static int handle_cpuid(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1791 kvm_emulate_cpuid(vcpu);
1795 static int handle_rdmsr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1797 u32 ecx = vcpu->regs[VCPU_REGS_RCX];
1800 if (vmx_get_msr(vcpu, ecx, &data)) {
1801 vmx_inject_gp(vcpu, 0);
1805 /* FIXME: handling of bits 32:63 of rax, rdx */
1806 vcpu->regs[VCPU_REGS_RAX] = data & -1u;
1807 vcpu->regs[VCPU_REGS_RDX] = (data >> 32) & -1u;
1808 skip_emulated_instruction(vcpu);
1812 static int handle_wrmsr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1814 u32 ecx = vcpu->regs[VCPU_REGS_RCX];
1815 u64 data = (vcpu->regs[VCPU_REGS_RAX] & -1u)
1816 | ((u64)(vcpu->regs[VCPU_REGS_RDX] & -1u) << 32);
1818 if (vmx_set_msr(vcpu, ecx, data) != 0) {
1819 vmx_inject_gp(vcpu, 0);
1823 skip_emulated_instruction(vcpu);
1827 static void post_kvm_run_save(struct kvm_vcpu *vcpu,
1828 struct kvm_run *kvm_run)
1830 kvm_run->if_flag = (vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_IF) != 0;
1831 kvm_run->cr8 = vcpu->cr8;
1832 kvm_run->apic_base = vcpu->apic_base;
1833 kvm_run->ready_for_interrupt_injection = (vcpu->interrupt_window_open &&
1834 vcpu->irq_summary == 0);
1837 static int handle_interrupt_window(struct kvm_vcpu *vcpu,
1838 struct kvm_run *kvm_run)
1841 * If the user space waits to inject interrupts, exit as soon as
1844 if (kvm_run->request_interrupt_window &&
1845 !vcpu->irq_summary) {
1846 kvm_run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
1847 ++vcpu->stat.irq_window_exits;
1853 static int handle_halt(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1855 skip_emulated_instruction(vcpu);
1856 if (vcpu->irq_summary)
1859 kvm_run->exit_reason = KVM_EXIT_HLT;
1860 ++vcpu->stat.halt_exits;
1864 static int handle_vmcall(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1866 skip_emulated_instruction(vcpu);
1867 return kvm_hypercall(vcpu, kvm_run);
1871 * The exit handlers return 1 if the exit was handled fully and guest execution
1872 * may resume. Otherwise they set the kvm_run parameter to indicate what needs
1873 * to be done to userspace and return 0.
1875 static int (*kvm_vmx_exit_handlers[])(struct kvm_vcpu *vcpu,
1876 struct kvm_run *kvm_run) = {
1877 [EXIT_REASON_EXCEPTION_NMI] = handle_exception,
1878 [EXIT_REASON_EXTERNAL_INTERRUPT] = handle_external_interrupt,
1879 [EXIT_REASON_TRIPLE_FAULT] = handle_triple_fault,
1880 [EXIT_REASON_IO_INSTRUCTION] = handle_io,
1881 [EXIT_REASON_CR_ACCESS] = handle_cr,
1882 [EXIT_REASON_DR_ACCESS] = handle_dr,
1883 [EXIT_REASON_CPUID] = handle_cpuid,
1884 [EXIT_REASON_MSR_READ] = handle_rdmsr,
1885 [EXIT_REASON_MSR_WRITE] = handle_wrmsr,
1886 [EXIT_REASON_PENDING_INTERRUPT] = handle_interrupt_window,
1887 [EXIT_REASON_HLT] = handle_halt,
1888 [EXIT_REASON_VMCALL] = handle_vmcall,
1891 static const int kvm_vmx_max_exit_handlers =
1892 sizeof(kvm_vmx_exit_handlers) / sizeof(*kvm_vmx_exit_handlers);
1895 * The guest has exited. See if we can fix it or if we need userspace
1898 static int kvm_handle_exit(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
1900 u32 vectoring_info = vmcs_read32(IDT_VECTORING_INFO_FIELD);
1901 u32 exit_reason = vmcs_read32(VM_EXIT_REASON);
1903 if ( (vectoring_info & VECTORING_INFO_VALID_MASK) &&
1904 exit_reason != EXIT_REASON_EXCEPTION_NMI )
1905 printk(KERN_WARNING "%s: unexpected, valid vectoring info and "
1906 "exit reason is 0x%x\n", __FUNCTION__, exit_reason);
1907 if (exit_reason < kvm_vmx_max_exit_handlers
1908 && kvm_vmx_exit_handlers[exit_reason])
1909 return kvm_vmx_exit_handlers[exit_reason](vcpu, kvm_run);
1911 kvm_run->exit_reason = KVM_EXIT_UNKNOWN;
1912 kvm_run->hw.hardware_exit_reason = exit_reason;
1918 * Check if userspace requested an interrupt window, and that the
1919 * interrupt window is open.
1921 * No need to exit to userspace if we already have an interrupt queued.
1923 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu,
1924 struct kvm_run *kvm_run)
1926 return (!vcpu->irq_summary &&
1927 kvm_run->request_interrupt_window &&
1928 vcpu->interrupt_window_open &&
1929 (vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_IF));
1932 static int vmx_vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1938 if (!vcpu->mmio_read_completed)
1939 do_interrupt_requests(vcpu, kvm_run);
1941 if (vcpu->guest_debug.enabled)
1942 kvm_guest_debug_pre(vcpu);
1945 vmx_save_host_state(vcpu);
1946 kvm_load_guest_fpu(vcpu);
1949 * Loading guest fpu may have cleared host cr0.ts
1951 vmcs_writel(HOST_CR0, read_cr0());
1954 /* Store host registers */
1956 #ifdef CONFIG_X86_64
1957 "push %%rax; push %%rbx; push %%rdx;"
1958 "push %%rsi; push %%rdi; push %%rbp;"
1959 "push %%r8; push %%r9; push %%r10; push %%r11;"
1960 "push %%r12; push %%r13; push %%r14; push %%r15;"
1962 ASM_VMX_VMWRITE_RSP_RDX "\n\t"
1964 "pusha; push %%ecx \n\t"
1965 ASM_VMX_VMWRITE_RSP_RDX "\n\t"
1967 /* Check if vmlaunch of vmresume is needed */
1969 /* Load guest registers. Don't clobber flags. */
1970 #ifdef CONFIG_X86_64
1971 "mov %c[cr2](%3), %%rax \n\t"
1972 "mov %%rax, %%cr2 \n\t"
1973 "mov %c[rax](%3), %%rax \n\t"
1974 "mov %c[rbx](%3), %%rbx \n\t"
1975 "mov %c[rdx](%3), %%rdx \n\t"
1976 "mov %c[rsi](%3), %%rsi \n\t"
1977 "mov %c[rdi](%3), %%rdi \n\t"
1978 "mov %c[rbp](%3), %%rbp \n\t"
1979 "mov %c[r8](%3), %%r8 \n\t"
1980 "mov %c[r9](%3), %%r9 \n\t"
1981 "mov %c[r10](%3), %%r10 \n\t"
1982 "mov %c[r11](%3), %%r11 \n\t"
1983 "mov %c[r12](%3), %%r12 \n\t"
1984 "mov %c[r13](%3), %%r13 \n\t"
1985 "mov %c[r14](%3), %%r14 \n\t"
1986 "mov %c[r15](%3), %%r15 \n\t"
1987 "mov %c[rcx](%3), %%rcx \n\t" /* kills %3 (rcx) */
1989 "mov %c[cr2](%3), %%eax \n\t"
1990 "mov %%eax, %%cr2 \n\t"
1991 "mov %c[rax](%3), %%eax \n\t"
1992 "mov %c[rbx](%3), %%ebx \n\t"
1993 "mov %c[rdx](%3), %%edx \n\t"
1994 "mov %c[rsi](%3), %%esi \n\t"
1995 "mov %c[rdi](%3), %%edi \n\t"
1996 "mov %c[rbp](%3), %%ebp \n\t"
1997 "mov %c[rcx](%3), %%ecx \n\t" /* kills %3 (ecx) */
1999 /* Enter guest mode */
2000 "jne .Llaunched \n\t"
2001 ASM_VMX_VMLAUNCH "\n\t"
2002 "jmp .Lkvm_vmx_return \n\t"
2003 ".Llaunched: " ASM_VMX_VMRESUME "\n\t"
2004 ".Lkvm_vmx_return: "
2005 /* Save guest registers, load host registers, keep flags */
2006 #ifdef CONFIG_X86_64
2007 "xchg %3, (%%rsp) \n\t"
2008 "mov %%rax, %c[rax](%3) \n\t"
2009 "mov %%rbx, %c[rbx](%3) \n\t"
2010 "pushq (%%rsp); popq %c[rcx](%3) \n\t"
2011 "mov %%rdx, %c[rdx](%3) \n\t"
2012 "mov %%rsi, %c[rsi](%3) \n\t"
2013 "mov %%rdi, %c[rdi](%3) \n\t"
2014 "mov %%rbp, %c[rbp](%3) \n\t"
2015 "mov %%r8, %c[r8](%3) \n\t"
2016 "mov %%r9, %c[r9](%3) \n\t"
2017 "mov %%r10, %c[r10](%3) \n\t"
2018 "mov %%r11, %c[r11](%3) \n\t"
2019 "mov %%r12, %c[r12](%3) \n\t"
2020 "mov %%r13, %c[r13](%3) \n\t"
2021 "mov %%r14, %c[r14](%3) \n\t"
2022 "mov %%r15, %c[r15](%3) \n\t"
2023 "mov %%cr2, %%rax \n\t"
2024 "mov %%rax, %c[cr2](%3) \n\t"
2025 "mov (%%rsp), %3 \n\t"
2027 "pop %%rcx; pop %%r15; pop %%r14; pop %%r13; pop %%r12;"
2028 "pop %%r11; pop %%r10; pop %%r9; pop %%r8;"
2029 "pop %%rbp; pop %%rdi; pop %%rsi;"
2030 "pop %%rdx; pop %%rbx; pop %%rax \n\t"
2032 "xchg %3, (%%esp) \n\t"
2033 "mov %%eax, %c[rax](%3) \n\t"
2034 "mov %%ebx, %c[rbx](%3) \n\t"
2035 "pushl (%%esp); popl %c[rcx](%3) \n\t"
2036 "mov %%edx, %c[rdx](%3) \n\t"
2037 "mov %%esi, %c[rsi](%3) \n\t"
2038 "mov %%edi, %c[rdi](%3) \n\t"
2039 "mov %%ebp, %c[rbp](%3) \n\t"
2040 "mov %%cr2, %%eax \n\t"
2041 "mov %%eax, %c[cr2](%3) \n\t"
2042 "mov (%%esp), %3 \n\t"
2044 "pop %%ecx; popa \n\t"
2049 : "r"(vcpu->launched), "d"((unsigned long)HOST_RSP),
2051 [rax]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RAX])),
2052 [rbx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RBX])),
2053 [rcx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RCX])),
2054 [rdx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RDX])),
2055 [rsi]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RSI])),
2056 [rdi]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RDI])),
2057 [rbp]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RBP])),
2058 #ifdef CONFIG_X86_64
2059 [r8 ]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R8 ])),
2060 [r9 ]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R9 ])),
2061 [r10]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R10])),
2062 [r11]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R11])),
2063 [r12]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R12])),
2064 [r13]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R13])),
2065 [r14]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R14])),
2066 [r15]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R15])),
2068 [cr2]"i"(offsetof(struct kvm_vcpu, cr2))
2073 vcpu->interrupt_window_open = (vmcs_read32(GUEST_INTERRUPTIBILITY_INFO) & 3) == 0;
2075 asm ("mov %0, %%ds; mov %0, %%es" : : "r"(__USER_DS));
2077 if (unlikely(fail)) {
2078 kvm_run->exit_reason = KVM_EXIT_FAIL_ENTRY;
2079 kvm_run->fail_entry.hardware_entry_failure_reason
2080 = vmcs_read32(VM_INSTRUCTION_ERROR);
2085 * Profile KVM exit RIPs:
2087 if (unlikely(prof_on == KVM_PROFILING))
2088 profile_hit(KVM_PROFILING, (void *)vmcs_readl(GUEST_RIP));
2091 r = kvm_handle_exit(kvm_run, vcpu);
2093 /* Give scheduler a change to reschedule. */
2094 if (signal_pending(current)) {
2096 kvm_run->exit_reason = KVM_EXIT_INTR;
2097 ++vcpu->stat.signal_exits;
2101 if (dm_request_for_irq_injection(vcpu, kvm_run)) {
2103 kvm_run->exit_reason = KVM_EXIT_INTR;
2104 ++vcpu->stat.request_irq_exits;
2107 if (!need_resched()) {
2108 ++vcpu->stat.light_exits;
2119 post_kvm_run_save(vcpu, kvm_run);
2123 static void vmx_flush_tlb(struct kvm_vcpu *vcpu)
2125 vmcs_writel(GUEST_CR3, vmcs_readl(GUEST_CR3));
2128 static void vmx_inject_page_fault(struct kvm_vcpu *vcpu,
2132 u32 vect_info = vmcs_read32(IDT_VECTORING_INFO_FIELD);
2134 ++vcpu->stat.pf_guest;
2136 if (is_page_fault(vect_info)) {
2137 printk(KERN_DEBUG "inject_page_fault: "
2138 "double fault 0x%lx @ 0x%lx\n",
2139 addr, vmcs_readl(GUEST_RIP));
2140 vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE, 0);
2141 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
2143 INTR_TYPE_EXCEPTION |
2144 INTR_INFO_DELIEVER_CODE_MASK |
2145 INTR_INFO_VALID_MASK);
2149 vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE, err_code);
2150 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
2152 INTR_TYPE_EXCEPTION |
2153 INTR_INFO_DELIEVER_CODE_MASK |
2154 INTR_INFO_VALID_MASK);
2158 static void vmx_free_vmcs(struct kvm_vcpu *vcpu)
2161 on_each_cpu(__vcpu_clear, vcpu, 0, 1);
2162 free_vmcs(vcpu->vmcs);
2167 static void vmx_free_vcpu(struct kvm_vcpu *vcpu)
2169 vmx_free_vmcs(vcpu);
2172 static int vmx_create_vcpu(struct kvm_vcpu *vcpu)
2176 vcpu->guest_msrs = kmalloc(PAGE_SIZE, GFP_KERNEL);
2177 if (!vcpu->guest_msrs)
2180 vcpu->host_msrs = kmalloc(PAGE_SIZE, GFP_KERNEL);
2181 if (!vcpu->host_msrs)
2182 goto out_free_guest_msrs;
2184 vmcs = alloc_vmcs();
2195 kfree(vcpu->host_msrs);
2196 vcpu->host_msrs = NULL;
2198 out_free_guest_msrs:
2199 kfree(vcpu->guest_msrs);
2200 vcpu->guest_msrs = NULL;
2205 static struct kvm_arch_ops vmx_arch_ops = {
2206 .cpu_has_kvm_support = cpu_has_kvm_support,
2207 .disabled_by_bios = vmx_disabled_by_bios,
2208 .hardware_setup = hardware_setup,
2209 .hardware_unsetup = hardware_unsetup,
2210 .hardware_enable = hardware_enable,
2211 .hardware_disable = hardware_disable,
2213 .vcpu_create = vmx_create_vcpu,
2214 .vcpu_free = vmx_free_vcpu,
2216 .vcpu_load = vmx_vcpu_load,
2217 .vcpu_put = vmx_vcpu_put,
2218 .vcpu_decache = vmx_vcpu_decache,
2220 .set_guest_debug = set_guest_debug,
2221 .get_msr = vmx_get_msr,
2222 .set_msr = vmx_set_msr,
2223 .get_segment_base = vmx_get_segment_base,
2224 .get_segment = vmx_get_segment,
2225 .set_segment = vmx_set_segment,
2226 .get_cs_db_l_bits = vmx_get_cs_db_l_bits,
2227 .decache_cr4_guest_bits = vmx_decache_cr4_guest_bits,
2228 .set_cr0 = vmx_set_cr0,
2229 .set_cr3 = vmx_set_cr3,
2230 .set_cr4 = vmx_set_cr4,
2231 #ifdef CONFIG_X86_64
2232 .set_efer = vmx_set_efer,
2234 .get_idt = vmx_get_idt,
2235 .set_idt = vmx_set_idt,
2236 .get_gdt = vmx_get_gdt,
2237 .set_gdt = vmx_set_gdt,
2238 .cache_regs = vcpu_load_rsp_rip,
2239 .decache_regs = vcpu_put_rsp_rip,
2240 .get_rflags = vmx_get_rflags,
2241 .set_rflags = vmx_set_rflags,
2243 .tlb_flush = vmx_flush_tlb,
2244 .inject_page_fault = vmx_inject_page_fault,
2246 .inject_gp = vmx_inject_gp,
2248 .run = vmx_vcpu_run,
2249 .skip_emulated_instruction = skip_emulated_instruction,
2250 .vcpu_setup = vmx_vcpu_setup,
2251 .patch_hypercall = vmx_patch_hypercall,
2254 static int __init vmx_init(void)
2259 vmx_io_bitmap_a = alloc_page(GFP_KERNEL | __GFP_HIGHMEM);
2260 if (!vmx_io_bitmap_a)
2263 vmx_io_bitmap_b = alloc_page(GFP_KERNEL | __GFP_HIGHMEM);
2264 if (!vmx_io_bitmap_b) {
2270 * Allow direct access to the PC debug port (it is often used for I/O
2271 * delays, but the vmexits simply slow things down).
2273 iova = kmap(vmx_io_bitmap_a);
2274 memset(iova, 0xff, PAGE_SIZE);
2275 clear_bit(0x80, iova);
2276 kunmap(vmx_io_bitmap_a);
2278 iova = kmap(vmx_io_bitmap_b);
2279 memset(iova, 0xff, PAGE_SIZE);
2280 kunmap(vmx_io_bitmap_b);
2282 r = kvm_init_arch(&vmx_arch_ops, THIS_MODULE);
2289 __free_page(vmx_io_bitmap_b);
2291 __free_page(vmx_io_bitmap_a);
2295 static void __exit vmx_exit(void)
2297 __free_page(vmx_io_bitmap_b);
2298 __free_page(vmx_io_bitmap_a);
2303 module_init(vmx_init)
2304 module_exit(vmx_exit)