err.no Git - linux-2.6/blob - drivers/kvm/vmx.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * This module enables machines with Intel VT-x extensions to run virtual
   5  * machines without emulation or binary translation.
   6  *
   7  * Copyright (C) 2006 Qumranet, Inc.
   8  *
   9  * Authors:
  10  *   Avi Kivity   <avi@qumranet.com>
  11  *   Yaniv Kamay  <yaniv@qumranet.com>
  12  *
  13  * This work is licensed under the terms of the GNU GPL, version 2.  See
  14  * the COPYING file in the top-level directory.
  15  *
  16  */
  17
  18 #include "kvm.h"
  19 #include "vmx.h"
  20 #include "segment_descriptor.h"
  21
  22 #include <linux/module.h>
  23 #include <linux/kernel.h>
  24 #include <linux/mm.h>
  25 #include <linux/highmem.h>
  26 #include <linux/profile.h>
  27 #include <linux/sched.h>
  28
  29 #include <asm/io.h>
  30 #include <asm/desc.h>
  31
  32 MODULE_AUTHOR("Qumranet");
  33 MODULE_LICENSE("GPL");
  34
  35 struct vmcs {
  36         u32 revision_id;
  37         u32 abort;
  38         char data[0];
  39 };
  40
  41 struct vcpu_vmx {
  42         struct kvm_vcpu       vcpu;
  43         int                   launched;
  44         struct kvm_msr_entry *guest_msrs;
  45         struct kvm_msr_entry *host_msrs;
  46         int                   nmsrs;
  47         int                   save_nmsrs;
  48         int                   msr_offset_efer;
  49 #ifdef CONFIG_X86_64
  50         int                   msr_offset_kernel_gs_base;
  51 #endif
  52         struct vmcs          *vmcs;
  53         struct {
  54                 int           loaded;
  55                 u16           fs_sel, gs_sel, ldt_sel;
  56                 int           fs_gs_ldt_reload_needed;
  57         }host_state;
  58
  59 };
  60
  61 static inline struct vcpu_vmx *to_vmx(struct kvm_vcpu *vcpu)
  62 {
  63         return container_of(vcpu, struct vcpu_vmx, vcpu);
  64 }
  65
  66 static int init_rmode_tss(struct kvm *kvm);
  67
  68 static DEFINE_PER_CPU(struct vmcs *, vmxarea);
  69 static DEFINE_PER_CPU(struct vmcs *, current_vmcs);
  70
  71 static struct page *vmx_io_bitmap_a;
  72 static struct page *vmx_io_bitmap_b;
  73
  74 #define EFER_SAVE_RESTORE_BITS ((u64)EFER_SCE)
  75
  76 static struct vmcs_config {
  77         int size;
  78         int order;
  79         u32 revision_id;
  80         u32 pin_based_exec_ctrl;
  81         u32 cpu_based_exec_ctrl;
  82         u32 vmexit_ctrl;
  83         u32 vmentry_ctrl;
  84 } vmcs_config;
  85
  86 #define VMX_SEGMENT_FIELD(seg)                                  \
  87         [VCPU_SREG_##seg] = {                                   \
  88                 .selector = GUEST_##seg##_SELECTOR,             \
  89                 .base = GUEST_##seg##_BASE,                     \
  90                 .limit = GUEST_##seg##_LIMIT,                   \
  91                 .ar_bytes = GUEST_##seg##_AR_BYTES,             \
  92         }
  93
  94 static struct kvm_vmx_segment_field {
  95         unsigned selector;
  96         unsigned base;
  97         unsigned limit;
  98         unsigned ar_bytes;
  99 } kvm_vmx_segment_fields[] = {
 100         VMX_SEGMENT_FIELD(CS),
 101         VMX_SEGMENT_FIELD(DS),
 102         VMX_SEGMENT_FIELD(ES),
 103         VMX_SEGMENT_FIELD(FS),
 104         VMX_SEGMENT_FIELD(GS),
 105         VMX_SEGMENT_FIELD(SS),
 106         VMX_SEGMENT_FIELD(TR),
 107         VMX_SEGMENT_FIELD(LDTR),
 108 };
 109
 110 /*
 111  * Keep MSR_K6_STAR at the end, as setup_msrs() will try to optimize it
 112  * away by decrementing the array size.
 113  */
 114 static const u32 vmx_msr_index[] = {
 115 #ifdef CONFIG_X86_64
 116         MSR_SYSCALL_MASK, MSR_LSTAR, MSR_CSTAR, MSR_KERNEL_GS_BASE,
 117 #endif
 118         MSR_EFER, MSR_K6_STAR,
 119 };
 120 #define NR_VMX_MSR ARRAY_SIZE(vmx_msr_index)
 121
 122 static void load_msrs(struct kvm_msr_entry *e, int n)
 123 {
 124         int i;
 125
 126         for (i = 0; i < n; ++i)
 127                 wrmsrl(e[i].index, e[i].data);
 128 }
 129
 130 static void save_msrs(struct kvm_msr_entry *e, int n)
 131 {
 132         int i;
 133
 134         for (i = 0; i < n; ++i)
 135                 rdmsrl(e[i].index, e[i].data);
 136 }
 137
 138 static inline u64 msr_efer_save_restore_bits(struct kvm_msr_entry msr)
 139 {
 140         return (u64)msr.data & EFER_SAVE_RESTORE_BITS;
 141 }
 142
 143 static inline int msr_efer_need_save_restore(struct vcpu_vmx *vmx)
 144 {
 145         int efer_offset = vmx->msr_offset_efer;
 146         return msr_efer_save_restore_bits(vmx->host_msrs[efer_offset]) !=
 147                 msr_efer_save_restore_bits(vmx->guest_msrs[efer_offset]);
 148 }
 149
 150 static inline int is_page_fault(u32 intr_info)
 151 {
 152         return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK |
 153                              INTR_INFO_VALID_MASK)) ==
 154                 (INTR_TYPE_EXCEPTION | PF_VECTOR | INTR_INFO_VALID_MASK);
 155 }
 156
 157 static inline int is_no_device(u32 intr_info)
 158 {
 159         return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK |
 160                              INTR_INFO_VALID_MASK)) ==
 161                 (INTR_TYPE_EXCEPTION | NM_VECTOR | INTR_INFO_VALID_MASK);
 162 }
 163
 164 static inline int is_external_interrupt(u32 intr_info)
 165 {
 166         return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VALID_MASK))
 167                 == (INTR_TYPE_EXT_INTR | INTR_INFO_VALID_MASK);
 168 }
 169
 170 static int __find_msr_index(struct vcpu_vmx *vmx, u32 msr)
 171 {
 172         int i;
 173
 174         for (i = 0; i < vmx->nmsrs; ++i)
 175                 if (vmx->guest_msrs[i].index == msr)
 176                         return i;
 177         return -1;
 178 }
 179
 180 static struct kvm_msr_entry *find_msr_entry(struct vcpu_vmx *vmx, u32 msr)
 181 {
 182         int i;
 183
 184         i = __find_msr_index(vmx, msr);
 185         if (i >= 0)
 186                 return &vmx->guest_msrs[i];
 187         return NULL;
 188 }
 189
 190 static void vmcs_clear(struct vmcs *vmcs)
 191 {
 192         u64 phys_addr = __pa(vmcs);
 193         u8 error;
 194
 195         asm volatile (ASM_VMX_VMCLEAR_RAX "; setna %0"
 196                       : "=g"(error) : "a"(&phys_addr), "m"(phys_addr)
 197                       : "cc", "memory");
 198         if (error)
 199                 printk(KERN_ERR "kvm: vmclear fail: %p/%llx\n",
 200                        vmcs, phys_addr);
 201 }
 202
 203 static void __vcpu_clear(void *arg)
 204 {
 205         struct vcpu_vmx *vmx = arg;
 206         int cpu = raw_smp_processor_id();
 207
 208         if (vmx->vcpu.cpu == cpu)
 209                 vmcs_clear(vmx->vmcs);
 210         if (per_cpu(current_vmcs, cpu) == vmx->vmcs)
 211                 per_cpu(current_vmcs, cpu) = NULL;
 212         rdtscll(vmx->vcpu.host_tsc);
 213 }
 214
 215 static void vcpu_clear(struct vcpu_vmx *vmx)
 216 {
 217         if (vmx->vcpu.cpu != raw_smp_processor_id() && vmx->vcpu.cpu != -1)
 218                 smp_call_function_single(vmx->vcpu.cpu, __vcpu_clear,
 219                                          vmx, 0, 1);
 220         else
 221                 __vcpu_clear(vmx);
 222         vmx->launched = 0;
 223 }
 224
 225 static unsigned long vmcs_readl(unsigned long field)
 226 {
 227         unsigned long value;
 228
 229         asm volatile (ASM_VMX_VMREAD_RDX_RAX
 230                       : "=a"(value) : "d"(field) : "cc");
 231         return value;
 232 }
 233
 234 static u16 vmcs_read16(unsigned long field)
 235 {
 236         return vmcs_readl(field);
 237 }
 238
 239 static u32 vmcs_read32(unsigned long field)
 240 {
 241         return vmcs_readl(field);
 242 }
 243
 244 static u64 vmcs_read64(unsigned long field)
 245 {
 246 #ifdef CONFIG_X86_64
 247         return vmcs_readl(field);
 248 #else
 249         return vmcs_readl(field) | ((u64)vmcs_readl(field+1) << 32);
 250 #endif
 251 }
 252
 253 static noinline void vmwrite_error(unsigned long field, unsigned long value)
 254 {
 255         printk(KERN_ERR "vmwrite error: reg %lx value %lx (err %d)\n",
 256                field, value, vmcs_read32(VM_INSTRUCTION_ERROR));
 257         dump_stack();
 258 }
 259
 260 static void vmcs_writel(unsigned long field, unsigned long value)
 261 {
 262         u8 error;
 263
 264         asm volatile (ASM_VMX_VMWRITE_RAX_RDX "; setna %0"
 265                        : "=q"(error) : "a"(value), "d"(field) : "cc" );
 266         if (unlikely(error))
 267                 vmwrite_error(field, value);
 268 }
 269
 270 static void vmcs_write16(unsigned long field, u16 value)
 271 {
 272         vmcs_writel(field, value);
 273 }
 274
 275 static void vmcs_write32(unsigned long field, u32 value)
 276 {
 277         vmcs_writel(field, value);
 278 }
 279
 280 static void vmcs_write64(unsigned long field, u64 value)
 281 {
 282 #ifdef CONFIG_X86_64
 283         vmcs_writel(field, value);
 284 #else
 285         vmcs_writel(field, value);
 286         asm volatile ("");
 287         vmcs_writel(field+1, value >> 32);
 288 #endif
 289 }
 290
 291 static void vmcs_clear_bits(unsigned long field, u32 mask)
 292 {
 293         vmcs_writel(field, vmcs_readl(field) & ~mask);
 294 }
 295
 296 static void vmcs_set_bits(unsigned long field, u32 mask)
 297 {
 298         vmcs_writel(field, vmcs_readl(field) | mask);
 299 }
 300
 301 static void update_exception_bitmap(struct kvm_vcpu *vcpu)
 302 {
 303         u32 eb;
 304
 305         eb = 1u << PF_VECTOR;
 306         if (!vcpu->fpu_active)
 307                 eb |= 1u << NM_VECTOR;
 308         if (vcpu->guest_debug.enabled)
 309                 eb |= 1u << 1;
 310         if (vcpu->rmode.active)
 311                 eb = ~0;
 312         vmcs_write32(EXCEPTION_BITMAP, eb);
 313 }
 314
 315 static void reload_tss(void)
 316 {
 317 #ifndef CONFIG_X86_64
 318
 319         /*
 320          * VT restores TR but not its size.  Useless.
 321          */
 322         struct descriptor_table gdt;
 323         struct segment_descriptor *descs;
 324
 325         get_gdt(&gdt);
 326         descs = (void *)gdt.base;
 327         descs[GDT_ENTRY_TSS].type = 9; /* available TSS */
 328         load_TR_desc();
 329 #endif
 330 }
 331
 332 static void load_transition_efer(struct vcpu_vmx *vmx)
 333 {
 334         u64 trans_efer;
 335         int efer_offset = vmx->msr_offset_efer;
 336
 337         trans_efer = vmx->host_msrs[efer_offset].data;
 338         trans_efer &= ~EFER_SAVE_RESTORE_BITS;
 339         trans_efer |= msr_efer_save_restore_bits(vmx->guest_msrs[efer_offset]);
 340         wrmsrl(MSR_EFER, trans_efer);
 341         vmx->vcpu.stat.efer_reload++;
 342 }
 343
 344 static void vmx_save_host_state(struct vcpu_vmx *vmx)
 345 {
 346         if (vmx->host_state.loaded)
 347                 return;
 348
 349         vmx->host_state.loaded = 1;
 350         /*
 351          * Set host fs and gs selectors.  Unfortunately, 22.2.3 does not
 352          * allow segment selectors with cpl > 0 or ti == 1.
 353          */
 354         vmx->host_state.ldt_sel = read_ldt();
 355         vmx->host_state.fs_gs_ldt_reload_needed = vmx->host_state.ldt_sel;
 356         vmx->host_state.fs_sel = read_fs();
 357         if (!(vmx->host_state.fs_sel & 7))
 358                 vmcs_write16(HOST_FS_SELECTOR, vmx->host_state.fs_sel);
 359         else {
 360                 vmcs_write16(HOST_FS_SELECTOR, 0);
 361                 vmx->host_state.fs_gs_ldt_reload_needed = 1;
 362         }
 363         vmx->host_state.gs_sel = read_gs();
 364         if (!(vmx->host_state.gs_sel & 7))
 365                 vmcs_write16(HOST_GS_SELECTOR, vmx->host_state.gs_sel);
 366         else {
 367                 vmcs_write16(HOST_GS_SELECTOR, 0);
 368                 vmx->host_state.fs_gs_ldt_reload_needed = 1;
 369         }
 370
 371 #ifdef CONFIG_X86_64
 372         vmcs_writel(HOST_FS_BASE, read_msr(MSR_FS_BASE));
 373         vmcs_writel(HOST_GS_BASE, read_msr(MSR_GS_BASE));
 374 #else
 375         vmcs_writel(HOST_FS_BASE, segment_base(vmx->host_state.fs_sel));
 376         vmcs_writel(HOST_GS_BASE, segment_base(vmx->host_state.gs_sel));
 377 #endif
 378
 379 #ifdef CONFIG_X86_64
 380         if (is_long_mode(&vmx->vcpu)) {
 381                 save_msrs(vmx->host_msrs +
 382                           vmx->msr_offset_kernel_gs_base, 1);
 383         }
 384 #endif
 385         load_msrs(vmx->guest_msrs, vmx->save_nmsrs);
 386         if (msr_efer_need_save_restore(vmx))
 387                 load_transition_efer(vmx);
 388 }
 389
 390 static void vmx_load_host_state(struct vcpu_vmx *vmx)
 391 {
 392         unsigned long flags;
 393
 394         if (!vmx->host_state.loaded)
 395                 return;
 396
 397         vmx->host_state.loaded = 0;
 398         if (vmx->host_state.fs_gs_ldt_reload_needed) {
 399                 load_ldt(vmx->host_state.ldt_sel);
 400                 load_fs(vmx->host_state.fs_sel);
 401                 /*
 402                  * If we have to reload gs, we must take care to
 403                  * preserve our gs base.
 404                  */
 405                 local_irq_save(flags);
 406                 load_gs(vmx->host_state.gs_sel);
 407 #ifdef CONFIG_X86_64
 408                 wrmsrl(MSR_GS_BASE, vmcs_readl(HOST_GS_BASE));
 409 #endif
 410                 local_irq_restore(flags);
 411
 412                 reload_tss();
 413         }
 414         save_msrs(vmx->guest_msrs, vmx->save_nmsrs);
 415         load_msrs(vmx->host_msrs, vmx->save_nmsrs);
 416         if (msr_efer_need_save_restore(vmx))
 417                 load_msrs(vmx->host_msrs + vmx->msr_offset_efer, 1);
 418 }
 419
 420 /*
 421  * Switches to specified vcpu, until a matching vcpu_put(), but assumes
 422  * vcpu mutex is already taken.
 423  */
 424 static void vmx_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
 425 {
 426         struct vcpu_vmx *vmx = to_vmx(vcpu);
 427         u64 phys_addr = __pa(vmx->vmcs);
 428         u64 tsc_this, delta;
 429
 430         if (vcpu->cpu != cpu)
 431                 vcpu_clear(vmx);
 432
 433         if (per_cpu(current_vmcs, cpu) != vmx->vmcs) {
 434                 u8 error;
 435
 436                 per_cpu(current_vmcs, cpu) = vmx->vmcs;
 437                 asm volatile (ASM_VMX_VMPTRLD_RAX "; setna %0"
 438                               : "=g"(error) : "a"(&phys_addr), "m"(phys_addr)
 439                               : "cc");
 440                 if (error)
 441                         printk(KERN_ERR "kvm: vmptrld %p/%llx fail\n",
 442                                vmx->vmcs, phys_addr);
 443         }
 444
 445         if (vcpu->cpu != cpu) {
 446                 struct descriptor_table dt;
 447                 unsigned long sysenter_esp;
 448
 449                 vcpu->cpu = cpu;
 450                 /*
 451                  * Linux uses per-cpu TSS and GDT, so set these when switching
 452                  * processors.
 453                  */
 454                 vmcs_writel(HOST_TR_BASE, read_tr_base()); /* 22.2.4 */
 455                 get_gdt(&dt);
 456                 vmcs_writel(HOST_GDTR_BASE, dt.base);   /* 22.2.4 */
 457
 458                 rdmsrl(MSR_IA32_SYSENTER_ESP, sysenter_esp);
 459                 vmcs_writel(HOST_IA32_SYSENTER_ESP, sysenter_esp); /* 22.2.3 */
 460
 461                 /*
 462                  * Make sure the time stamp counter is monotonous.
 463                  */
 464                 rdtscll(tsc_this);
 465                 delta = vcpu->host_tsc - tsc_this;
 466                 vmcs_write64(TSC_OFFSET, vmcs_read64(TSC_OFFSET) + delta);
 467         }
 468 }
 469
 470 static void vmx_vcpu_put(struct kvm_vcpu *vcpu)
 471 {
 472         vmx_load_host_state(to_vmx(vcpu));
 473         kvm_put_guest_fpu(vcpu);
 474 }
 475
 476 static void vmx_fpu_activate(struct kvm_vcpu *vcpu)
 477 {
 478         if (vcpu->fpu_active)
 479                 return;
 480         vcpu->fpu_active = 1;
 481         vmcs_clear_bits(GUEST_CR0, X86_CR0_TS);
 482         if (vcpu->cr0 & X86_CR0_TS)
 483                 vmcs_set_bits(GUEST_CR0, X86_CR0_TS);
 484         update_exception_bitmap(vcpu);
 485 }
 486
 487 static void vmx_fpu_deactivate(struct kvm_vcpu *vcpu)
 488 {
 489         if (!vcpu->fpu_active)
 490                 return;
 491         vcpu->fpu_active = 0;
 492         vmcs_set_bits(GUEST_CR0, X86_CR0_TS);
 493         update_exception_bitmap(vcpu);
 494 }
 495
 496 static void vmx_vcpu_decache(struct kvm_vcpu *vcpu)
 497 {
 498         vcpu_clear(to_vmx(vcpu));
 499 }
 500
 501 static unsigned long vmx_get_rflags(struct kvm_vcpu *vcpu)
 502 {
 503         return vmcs_readl(GUEST_RFLAGS);
 504 }
 505
 506 static void vmx_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
 507 {
 508         vmcs_writel(GUEST_RFLAGS, rflags);
 509 }
 510
 511 static void skip_emulated_instruction(struct kvm_vcpu *vcpu)
 512 {
 513         unsigned long rip;
 514         u32 interruptibility;
 515
 516         rip = vmcs_readl(GUEST_RIP);
 517         rip += vmcs_read32(VM_EXIT_INSTRUCTION_LEN);
 518         vmcs_writel(GUEST_RIP, rip);
 519
 520         /*
 521          * We emulated an instruction, so temporary interrupt blocking
 522          * should be removed, if set.
 523          */
 524         interruptibility = vmcs_read32(GUEST_INTERRUPTIBILITY_INFO);
 525         if (interruptibility & 3)
 526                 vmcs_write32(GUEST_INTERRUPTIBILITY_INFO,
 527                              interruptibility & ~3);
 528         vcpu->interrupt_window_open = 1;
 529 }
 530
 531 static void vmx_inject_gp(struct kvm_vcpu *vcpu, unsigned error_code)
 532 {
 533         printk(KERN_DEBUG "inject_general_protection: rip 0x%lx\n",
 534                vmcs_readl(GUEST_RIP));
 535         vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE, error_code);
 536         vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
 537                      GP_VECTOR |
 538                      INTR_TYPE_EXCEPTION |
 539                      INTR_INFO_DELIEVER_CODE_MASK |
 540                      INTR_INFO_VALID_MASK);
 541 }
 542
 543 /*
 544  * Swap MSR entry in host/guest MSR entry array.
 545  */
 546 static void move_msr_up(struct vcpu_vmx *vmx, int from, int to)
 547 {
 548         struct kvm_msr_entry tmp;
 549
 550         tmp = vmx->guest_msrs[to];
 551         vmx->guest_msrs[to] = vmx->guest_msrs[from];
 552         vmx->guest_msrs[from] = tmp;
 553         tmp = vmx->host_msrs[to];
 554         vmx->host_msrs[to] = vmx->host_msrs[from];
 555         vmx->host_msrs[from] = tmp;
 556 }
 557
 558 /*
 559  * Set up the vmcs to automatically save and restore system
 560  * msrs.  Don't touch the 64-bit msrs if the guest is in legacy
 561  * mode, as fiddling with msrs is very expensive.
 562  */
 563 static void setup_msrs(struct vcpu_vmx *vmx)
 564 {
 565         int save_nmsrs;
 566
 567         save_nmsrs = 0;
 568 #ifdef CONFIG_X86_64
 569         if (is_long_mode(&vmx->vcpu)) {
 570                 int index;
 571
 572                 index = __find_msr_index(vmx, MSR_SYSCALL_MASK);
 573                 if (index >= 0)
 574                         move_msr_up(vmx, index, save_nmsrs++);
 575                 index = __find_msr_index(vmx, MSR_LSTAR);
 576                 if (index >= 0)
 577                         move_msr_up(vmx, index, save_nmsrs++);
 578                 index = __find_msr_index(vmx, MSR_CSTAR);
 579                 if (index >= 0)
 580                         move_msr_up(vmx, index, save_nmsrs++);
 581                 index = __find_msr_index(vmx, MSR_KERNEL_GS_BASE);
 582                 if (index >= 0)
 583                         move_msr_up(vmx, index, save_nmsrs++);
 584                 /*
 585                  * MSR_K6_STAR is only needed on long mode guests, and only
 586                  * if efer.sce is enabled.
 587                  */
 588                 index = __find_msr_index(vmx, MSR_K6_STAR);
 589                 if ((index >= 0) && (vmx->vcpu.shadow_efer & EFER_SCE))
 590                         move_msr_up(vmx, index, save_nmsrs++);
 591         }
 592 #endif
 593         vmx->save_nmsrs = save_nmsrs;
 594
 595 #ifdef CONFIG_X86_64
 596         vmx->msr_offset_kernel_gs_base =
 597                 __find_msr_index(vmx, MSR_KERNEL_GS_BASE);
 598 #endif
 599         vmx->msr_offset_efer = __find_msr_index(vmx, MSR_EFER);
 600 }
 601
 602 /*
 603  * reads and returns guest's timestamp counter "register"
 604  * guest_tsc = host_tsc + tsc_offset    -- 21.3
 605  */
 606 static u64 guest_read_tsc(void)
 607 {
 608         u64 host_tsc, tsc_offset;
 609
 610         rdtscll(host_tsc);
 611         tsc_offset = vmcs_read64(TSC_OFFSET);
 612         return host_tsc + tsc_offset;
 613 }
 614
 615 /*
 616  * writes 'guest_tsc' into guest's timestamp counter "register"
 617  * guest_tsc = host_tsc + tsc_offset ==> tsc_offset = guest_tsc - host_tsc
 618  */
 619 static void guest_write_tsc(u64 guest_tsc)
 620 {
 621         u64 host_tsc;
 622
 623         rdtscll(host_tsc);
 624         vmcs_write64(TSC_OFFSET, guest_tsc - host_tsc);
 625 }
 626
 627 /*
 628  * Reads an msr value (of 'msr_index') into 'pdata'.
 629  * Returns 0 on success, non-0 otherwise.
 630  * Assumes vcpu_load() was already called.
 631  */
 632 static int vmx_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
 633 {
 634         u64 data;
 635         struct kvm_msr_entry *msr;
 636
 637         if (!pdata) {
 638                 printk(KERN_ERR "BUG: get_msr called with NULL pdata\n");
 639                 return -EINVAL;
 640         }
 641
 642         switch (msr_index) {
 643 #ifdef CONFIG_X86_64
 644         case MSR_FS_BASE:
 645                 data = vmcs_readl(GUEST_FS_BASE);
 646                 break;
 647         case MSR_GS_BASE:
 648                 data = vmcs_readl(GUEST_GS_BASE);
 649                 break;
 650         case MSR_EFER:
 651                 return kvm_get_msr_common(vcpu, msr_index, pdata);
 652 #endif
 653         case MSR_IA32_TIME_STAMP_COUNTER:
 654                 data = guest_read_tsc();
 655                 break;
 656         case MSR_IA32_SYSENTER_CS:
 657                 data = vmcs_read32(GUEST_SYSENTER_CS);
 658                 break;
 659         case MSR_IA32_SYSENTER_EIP:
 660                 data = vmcs_readl(GUEST_SYSENTER_EIP);
 661                 break;
 662         case MSR_IA32_SYSENTER_ESP:
 663                 data = vmcs_readl(GUEST_SYSENTER_ESP);
 664                 break;
 665         default:
 666                 msr = find_msr_entry(to_vmx(vcpu), msr_index);
 667                 if (msr) {
 668                         data = msr->data;
 669                         break;
 670                 }
 671                 return kvm_get_msr_common(vcpu, msr_index, pdata);
 672         }
 673
 674         *pdata = data;
 675         return 0;
 676 }
 677
 678 /*
 679  * Writes msr value into into the appropriate "register".
 680  * Returns 0 on success, non-0 otherwise.
 681  * Assumes vcpu_load() was already called.
 682  */
 683 static int vmx_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
 684 {
 685         struct vcpu_vmx *vmx = to_vmx(vcpu);
 686         struct kvm_msr_entry *msr;
 687         int ret = 0;
 688
 689         switch (msr_index) {
 690 #ifdef CONFIG_X86_64
 691         case MSR_EFER:
 692                 ret = kvm_set_msr_common(vcpu, msr_index, data);
 693                 if (vmx->host_state.loaded)
 694                         load_transition_efer(vmx);
 695                 break;
 696         case MSR_FS_BASE:
 697                 vmcs_writel(GUEST_FS_BASE, data);
 698                 break;
 699         case MSR_GS_BASE:
 700                 vmcs_writel(GUEST_GS_BASE, data);
 701                 break;
 702 #endif
 703         case MSR_IA32_SYSENTER_CS:
 704                 vmcs_write32(GUEST_SYSENTER_CS, data);
 705                 break;
 706         case MSR_IA32_SYSENTER_EIP:
 707                 vmcs_writel(GUEST_SYSENTER_EIP, data);
 708                 break;
 709         case MSR_IA32_SYSENTER_ESP:
 710                 vmcs_writel(GUEST_SYSENTER_ESP, data);
 711                 break;
 712         case MSR_IA32_TIME_STAMP_COUNTER:
 713                 guest_write_tsc(data);
 714                 break;
 715         default:
 716                 msr = find_msr_entry(vmx, msr_index);
 717                 if (msr) {
 718                         msr->data = data;
 719                         if (vmx->host_state.loaded)
 720                                 load_msrs(vmx->guest_msrs, vmx->save_nmsrs);
 721                         break;
 722                 }
 723                 ret = kvm_set_msr_common(vcpu, msr_index, data);
 724         }
 725
 726         return ret;
 727 }
 728
 729 /*
 730  * Sync the rsp and rip registers into the vcpu structure.  This allows
 731  * registers to be accessed by indexing vcpu->regs.
 732  */
 733 static void vcpu_load_rsp_rip(struct kvm_vcpu *vcpu)
 734 {
 735         vcpu->regs[VCPU_REGS_RSP] = vmcs_readl(GUEST_RSP);
 736         vcpu->rip = vmcs_readl(GUEST_RIP);
 737 }
 738
 739 /*
 740  * Syncs rsp and rip back into the vmcs.  Should be called after possible
 741  * modification.
 742  */
 743 static void vcpu_put_rsp_rip(struct kvm_vcpu *vcpu)
 744 {
 745         vmcs_writel(GUEST_RSP, vcpu->regs[VCPU_REGS_RSP]);
 746         vmcs_writel(GUEST_RIP, vcpu->rip);
 747 }
 748
 749 static int set_guest_debug(struct kvm_vcpu *vcpu, struct kvm_debug_guest *dbg)
 750 {
 751         unsigned long dr7 = 0x400;
 752         int old_singlestep;
 753
 754         old_singlestep = vcpu->guest_debug.singlestep;
 755
 756         vcpu->guest_debug.enabled = dbg->enabled;
 757         if (vcpu->guest_debug.enabled) {
 758                 int i;
 759
 760                 dr7 |= 0x200;  /* exact */
 761                 for (i = 0; i < 4; ++i) {
 762                         if (!dbg->breakpoints[i].enabled)
 763                                 continue;
 764                         vcpu->guest_debug.bp[i] = dbg->breakpoints[i].address;
 765                         dr7 |= 2 << (i*2);    /* global enable */
 766                         dr7 |= 0 << (i*4+16); /* execution breakpoint */
 767                 }
 768
 769                 vcpu->guest_debug.singlestep = dbg->singlestep;
 770         } else
 771                 vcpu->guest_debug.singlestep = 0;
 772
 773         if (old_singlestep && !vcpu->guest_debug.singlestep) {
 774                 unsigned long flags;
 775
 776                 flags = vmcs_readl(GUEST_RFLAGS);
 777                 flags &= ~(X86_EFLAGS_TF | X86_EFLAGS_RF);
 778                 vmcs_writel(GUEST_RFLAGS, flags);
 779         }
 780
 781         update_exception_bitmap(vcpu);
 782         vmcs_writel(GUEST_DR7, dr7);
 783
 784         return 0;
 785 }
 786
 787 static __init int cpu_has_kvm_support(void)
 788 {
 789         unsigned long ecx = cpuid_ecx(1);
 790         return test_bit(5, &ecx); /* CPUID.1:ECX.VMX[bit 5] -> VT */
 791 }
 792
 793 static __init int vmx_disabled_by_bios(void)
 794 {
 795         u64 msr;
 796
 797         rdmsrl(MSR_IA32_FEATURE_CONTROL, msr);
 798         return (msr & (MSR_IA32_FEATURE_CONTROL_LOCKED |
 799                        MSR_IA32_FEATURE_CONTROL_VMXON_ENABLED))
 800             == MSR_IA32_FEATURE_CONTROL_LOCKED;
 801         /* locked but not enabled */
 802 }
 803
 804 static void hardware_enable(void *garbage)
 805 {
 806         int cpu = raw_smp_processor_id();
 807         u64 phys_addr = __pa(per_cpu(vmxarea, cpu));
 808         u64 old;
 809
 810         rdmsrl(MSR_IA32_FEATURE_CONTROL, old);
 811         if ((old & (MSR_IA32_FEATURE_CONTROL_LOCKED |
 812                     MSR_IA32_FEATURE_CONTROL_VMXON_ENABLED))
 813             != (MSR_IA32_FEATURE_CONTROL_LOCKED |
 814                 MSR_IA32_FEATURE_CONTROL_VMXON_ENABLED))
 815                 /* enable and lock */
 816                 wrmsrl(MSR_IA32_FEATURE_CONTROL, old |
 817                        MSR_IA32_FEATURE_CONTROL_LOCKED |
 818                        MSR_IA32_FEATURE_CONTROL_VMXON_ENABLED);
 819         write_cr4(read_cr4() | X86_CR4_VMXE); /* FIXME: not cpu hotplug safe */
 820         asm volatile (ASM_VMX_VMXON_RAX : : "a"(&phys_addr), "m"(phys_addr)
 821                       : "memory", "cc");
 822 }
 823
 824 static void hardware_disable(void *garbage)
 825 {
 826         asm volatile (ASM_VMX_VMXOFF : : : "cc");
 827 }
 828
 829 static __init int adjust_vmx_controls(u32 ctl_min, u32 ctl_opt,
 830                                       u32 msr, u32* result)
 831 {
 832         u32 vmx_msr_low, vmx_msr_high;
 833         u32 ctl = ctl_min | ctl_opt;
 834
 835         rdmsr(msr, vmx_msr_low, vmx_msr_high);
 836
 837         ctl &= vmx_msr_high; /* bit == 0 in high word ==> must be zero */
 838         ctl |= vmx_msr_low;  /* bit == 1 in low word  ==> must be one  */
 839
 840         /* Ensure minimum (required) set of control bits are supported. */
 841         if (ctl_min & ~ctl)
 842                 return -1;
 843
 844         *result = ctl;
 845         return 0;
 846 }
 847
 848 static __init int setup_vmcs_config(void)
 849 {
 850         u32 vmx_msr_low, vmx_msr_high;
 851         u32 min, opt;
 852         u32 _pin_based_exec_control = 0;
 853         u32 _cpu_based_exec_control = 0;
 854         u32 _vmexit_control = 0;
 855         u32 _vmentry_control = 0;
 856
 857         min = PIN_BASED_EXT_INTR_MASK | PIN_BASED_NMI_EXITING;
 858         opt = 0;
 859         if (adjust_vmx_controls(min, opt, MSR_IA32_VMX_PINBASED_CTLS,
 860                                 &_pin_based_exec_control) < 0)
 861                 return -1;
 862
 863         min = CPU_BASED_HLT_EXITING |
 864 #ifdef CONFIG_X86_64
 865               CPU_BASED_CR8_LOAD_EXITING |
 866               CPU_BASED_CR8_STORE_EXITING |
 867 #endif
 868               CPU_BASED_USE_IO_BITMAPS |
 869               CPU_BASED_MOV_DR_EXITING |
 870               CPU_BASED_USE_TSC_OFFSETING;
 871         opt = 0;
 872         if (adjust_vmx_controls(min, opt, MSR_IA32_VMX_PROCBASED_CTLS,
 873                                 &_cpu_based_exec_control) < 0)
 874                 return -1;
 875
 876         min = 0;
 877 #ifdef CONFIG_X86_64
 878         min |= VM_EXIT_HOST_ADDR_SPACE_SIZE;
 879 #endif
 880         opt = 0;
 881         if (adjust_vmx_controls(min, opt, MSR_IA32_VMX_EXIT_CTLS,
 882                                 &_vmexit_control) < 0)
 883                 return -1;
 884
 885         min = opt = 0;
 886         if (adjust_vmx_controls(min, opt, MSR_IA32_VMX_ENTRY_CTLS,
 887                                 &_vmentry_control) < 0)
 888                 return -1;
 889
 890         rdmsr(MSR_IA32_VMX_BASIC, vmx_msr_low, vmx_msr_high);
 891
 892         /* IA-32 SDM Vol 3B: VMCS size is never greater than 4kB. */
 893         if ((vmx_msr_high & 0x1fff) > PAGE_SIZE)
 894                 return -1;
 895
 896 #ifdef CONFIG_X86_64
 897         /* IA-32 SDM Vol 3B: 64-bit CPUs always have VMX_BASIC_MSR[48]==0. */
 898         if (vmx_msr_high & (1u<<16))
 899                 return -1;
 900 #endif
 901
 902         /* Require Write-Back (WB) memory type for VMCS accesses. */
 903         if (((vmx_msr_high >> 18) & 15) != 6)
 904                 return -1;
 905
 906         vmcs_config.size = vmx_msr_high & 0x1fff;
 907         vmcs_config.order = get_order(vmcs_config.size);
 908         vmcs_config.revision_id = vmx_msr_low;
 909
 910         vmcs_config.pin_based_exec_ctrl = _pin_based_exec_control;
 911         vmcs_config.cpu_based_exec_ctrl = _cpu_based_exec_control;
 912         vmcs_config.vmexit_ctrl         = _vmexit_control;
 913         vmcs_config.vmentry_ctrl        = _vmentry_control;
 914
 915         return 0;
 916 }
 917
 918 static struct vmcs *alloc_vmcs_cpu(int cpu)
 919 {
 920         int node = cpu_to_node(cpu);
 921         struct page *pages;
 922         struct vmcs *vmcs;
 923
 924         pages = alloc_pages_node(node, GFP_KERNEL, vmcs_config.order);
 925         if (!pages)
 926                 return NULL;
 927         vmcs = page_address(pages);
 928         memset(vmcs, 0, vmcs_config.size);
 929         vmcs->revision_id = vmcs_config.revision_id; /* vmcs revision id */
 930         return vmcs;
 931 }
 932
 933 static struct vmcs *alloc_vmcs(void)
 934 {
 935         return alloc_vmcs_cpu(raw_smp_processor_id());
 936 }
 937
 938 static void free_vmcs(struct vmcs *vmcs)
 939 {
 940         free_pages((unsigned long)vmcs, vmcs_config.order);
 941 }
 942
 943 static void free_kvm_area(void)
 944 {
 945         int cpu;
 946
 947         for_each_online_cpu(cpu)
 948                 free_vmcs(per_cpu(vmxarea, cpu));
 949 }
 950
 951 extern struct vmcs *alloc_vmcs_cpu(int cpu);
 952
 953 static __init int alloc_kvm_area(void)
 954 {
 955         int cpu;
 956
 957         for_each_online_cpu(cpu) {
 958                 struct vmcs *vmcs;
 959
 960                 vmcs = alloc_vmcs_cpu(cpu);
 961                 if (!vmcs) {
 962                         free_kvm_area();
 963                         return -ENOMEM;
 964                 }
 965
 966                 per_cpu(vmxarea, cpu) = vmcs;
 967         }
 968         return 0;
 969 }
 970
 971 static __init int hardware_setup(void)
 972 {
 973         if (setup_vmcs_config() < 0)
 974                 return -1;
 975         return alloc_kvm_area();
 976 }
 977
 978 static __exit void hardware_unsetup(void)
 979 {
 980         free_kvm_area();
 981 }
 982
 983 static void fix_pmode_dataseg(int seg, struct kvm_save_segment *save)
 984 {
 985         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
 986
 987         if (vmcs_readl(sf->base) == save->base && (save->base & AR_S_MASK)) {
 988                 vmcs_write16(sf->selector, save->selector);
 989                 vmcs_writel(sf->base, save->base);
 990                 vmcs_write32(sf->limit, save->limit);
 991                 vmcs_write32(sf->ar_bytes, save->ar);
 992         } else {
 993                 u32 dpl = (vmcs_read16(sf->selector) & SELECTOR_RPL_MASK)
 994                         << AR_DPL_SHIFT;
 995                 vmcs_write32(sf->ar_bytes, 0x93 | dpl);
 996         }
 997 }
 998
 999 static void enter_pmode(struct kvm_vcpu *vcpu)
1000 {
1001         unsigned long flags;
1002
1003         vcpu->rmode.active = 0;
1004
1005         vmcs_writel(GUEST_TR_BASE, vcpu->rmode.tr.base);
1006         vmcs_write32(GUEST_TR_LIMIT, vcpu->rmode.tr.limit);
1007         vmcs_write32(GUEST_TR_AR_BYTES, vcpu->rmode.tr.ar);
1008
1009         flags = vmcs_readl(GUEST_RFLAGS);
1010         flags &= ~(IOPL_MASK | X86_EFLAGS_VM);
1011         flags |= (vcpu->rmode.save_iopl << IOPL_SHIFT);
1012         vmcs_writel(GUEST_RFLAGS, flags);
1013
1014         vmcs_writel(GUEST_CR4, (vmcs_readl(GUEST_CR4) & ~X86_CR4_VME) |
1015                         (vmcs_readl(CR4_READ_SHADOW) & X86_CR4_VME));
1016
1017         update_exception_bitmap(vcpu);
1018
1019         fix_pmode_dataseg(VCPU_SREG_ES, &vcpu->rmode.es);
1020         fix_pmode_dataseg(VCPU_SREG_DS, &vcpu->rmode.ds);
1021         fix_pmode_dataseg(VCPU_SREG_GS, &vcpu->rmode.gs);
1022         fix_pmode_dataseg(VCPU_SREG_FS, &vcpu->rmode.fs);
1023
1024         vmcs_write16(GUEST_SS_SELECTOR, 0);
1025         vmcs_write32(GUEST_SS_AR_BYTES, 0x93);
1026
1027         vmcs_write16(GUEST_CS_SELECTOR,
1028                      vmcs_read16(GUEST_CS_SELECTOR) & ~SELECTOR_RPL_MASK);
1029         vmcs_write32(GUEST_CS_AR_BYTES, 0x9b);
1030 }
1031
1032 static int rmode_tss_base(struct kvm* kvm)
1033 {
1034         gfn_t base_gfn = kvm->memslots[0].base_gfn + kvm->memslots[0].npages - 3;
1035         return base_gfn << PAGE_SHIFT;
1036 }
1037
1038 static void fix_rmode_seg(int seg, struct kvm_save_segment *save)
1039 {
1040         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
1041
1042         save->selector = vmcs_read16(sf->selector);
1043         save->base = vmcs_readl(sf->base);
1044         save->limit = vmcs_read32(sf->limit);
1045         save->ar = vmcs_read32(sf->ar_bytes);
1046         vmcs_write16(sf->selector, vmcs_readl(sf->base) >> 4);
1047         vmcs_write32(sf->limit, 0xffff);
1048         vmcs_write32(sf->ar_bytes, 0xf3);
1049 }
1050
1051 static void enter_rmode(struct kvm_vcpu *vcpu)
1052 {
1053         unsigned long flags;
1054
1055         vcpu->rmode.active = 1;
1056
1057         vcpu->rmode.tr.base = vmcs_readl(GUEST_TR_BASE);
1058         vmcs_writel(GUEST_TR_BASE, rmode_tss_base(vcpu->kvm));
1059
1060         vcpu->rmode.tr.limit = vmcs_read32(GUEST_TR_LIMIT);
1061         vmcs_write32(GUEST_TR_LIMIT, RMODE_TSS_SIZE - 1);
1062
1063         vcpu->rmode.tr.ar = vmcs_read32(GUEST_TR_AR_BYTES);
1064         vmcs_write32(GUEST_TR_AR_BYTES, 0x008b);
1065
1066         flags = vmcs_readl(GUEST_RFLAGS);
1067         vcpu->rmode.save_iopl = (flags & IOPL_MASK) >> IOPL_SHIFT;
1068
1069         flags |= IOPL_MASK | X86_EFLAGS_VM;
1070
1071         vmcs_writel(GUEST_RFLAGS, flags);
1072         vmcs_writel(GUEST_CR4, vmcs_readl(GUEST_CR4) | X86_CR4_VME);
1073         update_exception_bitmap(vcpu);
1074
1075         vmcs_write16(GUEST_SS_SELECTOR, vmcs_readl(GUEST_SS_BASE) >> 4);
1076         vmcs_write32(GUEST_SS_LIMIT, 0xffff);
1077         vmcs_write32(GUEST_SS_AR_BYTES, 0xf3);
1078
1079         vmcs_write32(GUEST_CS_AR_BYTES, 0xf3);
1080         vmcs_write32(GUEST_CS_LIMIT, 0xffff);
1081         if (vmcs_readl(GUEST_CS_BASE) == 0xffff0000)
1082                 vmcs_writel(GUEST_CS_BASE, 0xf0000);
1083         vmcs_write16(GUEST_CS_SELECTOR, vmcs_readl(GUEST_CS_BASE) >> 4);
1084
1085         fix_rmode_seg(VCPU_SREG_ES, &vcpu->rmode.es);
1086         fix_rmode_seg(VCPU_SREG_DS, &vcpu->rmode.ds);
1087         fix_rmode_seg(VCPU_SREG_GS, &vcpu->rmode.gs);
1088         fix_rmode_seg(VCPU_SREG_FS, &vcpu->rmode.fs);
1089
1090         init_rmode_tss(vcpu->kvm);
1091 }
1092
1093 #ifdef CONFIG_X86_64
1094
1095 static void enter_lmode(struct kvm_vcpu *vcpu)
1096 {
1097         u32 guest_tr_ar;
1098
1099         guest_tr_ar = vmcs_read32(GUEST_TR_AR_BYTES);
1100         if ((guest_tr_ar & AR_TYPE_MASK) != AR_TYPE_BUSY_64_TSS) {
1101                 printk(KERN_DEBUG "%s: tss fixup for long mode. \n",
1102                        __FUNCTION__);
1103                 vmcs_write32(GUEST_TR_AR_BYTES,
1104                              (guest_tr_ar & ~AR_TYPE_MASK)
1105                              | AR_TYPE_BUSY_64_TSS);
1106         }
1107
1108         vcpu->shadow_efer |= EFER_LMA;
1109
1110         find_msr_entry(to_vmx(vcpu), MSR_EFER)->data |= EFER_LMA | EFER_LME;
1111         vmcs_write32(VM_ENTRY_CONTROLS,
1112                      vmcs_read32(VM_ENTRY_CONTROLS)
1113                      | VM_ENTRY_CONTROLS_IA32E_MASK);
1114 }
1115
1116 static void exit_lmode(struct kvm_vcpu *vcpu)
1117 {
1118         vcpu->shadow_efer &= ~EFER_LMA;
1119
1120         vmcs_write32(VM_ENTRY_CONTROLS,
1121                      vmcs_read32(VM_ENTRY_CONTROLS)
1122                      & ~VM_ENTRY_CONTROLS_IA32E_MASK);
1123 }
1124
1125 #endif
1126
1127 static void vmx_decache_cr4_guest_bits(struct kvm_vcpu *vcpu)
1128 {
1129         vcpu->cr4 &= KVM_GUEST_CR4_MASK;
1130         vcpu->cr4 |= vmcs_readl(GUEST_CR4) & ~KVM_GUEST_CR4_MASK;
1131 }
1132
1133 static void vmx_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
1134 {
1135         vmx_fpu_deactivate(vcpu);
1136
1137         if (vcpu->rmode.active && (cr0 & X86_CR0_PE))
1138                 enter_pmode(vcpu);
1139
1140         if (!vcpu->rmode.active && !(cr0 & X86_CR0_PE))
1141                 enter_rmode(vcpu);
1142
1143 #ifdef CONFIG_X86_64
1144         if (vcpu->shadow_efer & EFER_LME) {
1145                 if (!is_paging(vcpu) && (cr0 & X86_CR0_PG))
1146                         enter_lmode(vcpu);
1147                 if (is_paging(vcpu) && !(cr0 & X86_CR0_PG))
1148                         exit_lmode(vcpu);
1149         }
1150 #endif
1151
1152         vmcs_writel(CR0_READ_SHADOW, cr0);
1153         vmcs_writel(GUEST_CR0,
1154                     (cr0 & ~KVM_GUEST_CR0_MASK) | KVM_VM_CR0_ALWAYS_ON);
1155         vcpu->cr0 = cr0;
1156
1157         if (!(cr0 & X86_CR0_TS) || !(cr0 & X86_CR0_PE))
1158                 vmx_fpu_activate(vcpu);
1159 }
1160
1161 static void vmx_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
1162 {
1163         vmcs_writel(GUEST_CR3, cr3);
1164         if (vcpu->cr0 & X86_CR0_PE)
1165                 vmx_fpu_deactivate(vcpu);
1166 }
1167
1168 static void vmx_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
1169 {
1170         vmcs_writel(CR4_READ_SHADOW, cr4);
1171         vmcs_writel(GUEST_CR4, cr4 | (vcpu->rmode.active ?
1172                     KVM_RMODE_VM_CR4_ALWAYS_ON : KVM_PMODE_VM_CR4_ALWAYS_ON));
1173         vcpu->cr4 = cr4;
1174 }
1175
1176 #ifdef CONFIG_X86_64
1177
1178 static void vmx_set_efer(struct kvm_vcpu *vcpu, u64 efer)
1179 {
1180         struct vcpu_vmx *vmx = to_vmx(vcpu);
1181         struct kvm_msr_entry *msr = find_msr_entry(vmx, MSR_EFER);
1182
1183         vcpu->shadow_efer = efer;
1184         if (efer & EFER_LMA) {
1185                 vmcs_write32(VM_ENTRY_CONTROLS,
1186                                      vmcs_read32(VM_ENTRY_CONTROLS) |
1187                                      VM_ENTRY_CONTROLS_IA32E_MASK);
1188                 msr->data = efer;
1189
1190         } else {
1191                 vmcs_write32(VM_ENTRY_CONTROLS,
1192                                      vmcs_read32(VM_ENTRY_CONTROLS) &
1193                                      ~VM_ENTRY_CONTROLS_IA32E_MASK);
1194
1195                 msr->data = efer & ~EFER_LME;
1196         }
1197         setup_msrs(vmx);
1198 }
1199
1200 #endif
1201
1202 static u64 vmx_get_segment_base(struct kvm_vcpu *vcpu, int seg)
1203 {
1204         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
1205
1206         return vmcs_readl(sf->base);
1207 }
1208
1209 static void vmx_get_segment(struct kvm_vcpu *vcpu,
1210                             struct kvm_segment *var, int seg)
1211 {
1212         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
1213         u32 ar;
1214
1215         var->base = vmcs_readl(sf->base);
1216         var->limit = vmcs_read32(sf->limit);
1217         var->selector = vmcs_read16(sf->selector);
1218         ar = vmcs_read32(sf->ar_bytes);
1219         if (ar & AR_UNUSABLE_MASK)
1220                 ar = 0;
1221         var->type = ar & 15;
1222         var->s = (ar >> 4) & 1;
1223         var->dpl = (ar >> 5) & 3;
1224         var->present = (ar >> 7) & 1;
1225         var->avl = (ar >> 12) & 1;
1226         var->l = (ar >> 13) & 1;
1227         var->db = (ar >> 14) & 1;
1228         var->g = (ar >> 15) & 1;
1229         var->unusable = (ar >> 16) & 1;
1230 }
1231
1232 static u32 vmx_segment_access_rights(struct kvm_segment *var)
1233 {
1234         u32 ar;
1235
1236         if (var->unusable)
1237                 ar = 1 << 16;
1238         else {
1239                 ar = var->type & 15;
1240                 ar |= (var->s & 1) << 4;
1241                 ar |= (var->dpl & 3) << 5;
1242                 ar |= (var->present & 1) << 7;
1243                 ar |= (var->avl & 1) << 12;
1244                 ar |= (var->l & 1) << 13;
1245                 ar |= (var->db & 1) << 14;
1246                 ar |= (var->g & 1) << 15;
1247         }
1248         if (ar == 0) /* a 0 value means unusable */
1249                 ar = AR_UNUSABLE_MASK;
1250
1251         return ar;
1252 }
1253
1254 static void vmx_set_segment(struct kvm_vcpu *vcpu,
1255                             struct kvm_segment *var, int seg)
1256 {
1257         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
1258         u32 ar;
1259
1260         if (vcpu->rmode.active && seg == VCPU_SREG_TR) {
1261                 vcpu->rmode.tr.selector = var->selector;
1262                 vcpu->rmode.tr.base = var->base;
1263                 vcpu->rmode.tr.limit = var->limit;
1264                 vcpu->rmode.tr.ar = vmx_segment_access_rights(var);
1265                 return;
1266         }
1267         vmcs_writel(sf->base, var->base);
1268         vmcs_write32(sf->limit, var->limit);
1269         vmcs_write16(sf->selector, var->selector);
1270         if (vcpu->rmode.active && var->s) {
1271                 /*
1272                  * Hack real-mode segments into vm86 compatibility.
1273                  */
1274                 if (var->base == 0xffff0000 && var->selector == 0xf000)
1275                         vmcs_writel(sf->base, 0xf0000);
1276                 ar = 0xf3;
1277         } else
1278                 ar = vmx_segment_access_rights(var);
1279         vmcs_write32(sf->ar_bytes, ar);
1280 }
1281
1282 static void vmx_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
1283 {
1284         u32 ar = vmcs_read32(GUEST_CS_AR_BYTES);
1285
1286         *db = (ar >> 14) & 1;
1287         *l = (ar >> 13) & 1;
1288 }
1289
1290 static void vmx_get_idt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
1291 {
1292         dt->limit = vmcs_read32(GUEST_IDTR_LIMIT);
1293         dt->base = vmcs_readl(GUEST_IDTR_BASE);
1294 }
1295
1296 static void vmx_set_idt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
1297 {
1298         vmcs_write32(GUEST_IDTR_LIMIT, dt->limit);
1299         vmcs_writel(GUEST_IDTR_BASE, dt->base);
1300 }
1301
1302 static void vmx_get_gdt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
1303 {
1304         dt->limit = vmcs_read32(GUEST_GDTR_LIMIT);
1305         dt->base = vmcs_readl(GUEST_GDTR_BASE);
1306 }
1307
1308 static void vmx_set_gdt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
1309 {
1310         vmcs_write32(GUEST_GDTR_LIMIT, dt->limit);
1311         vmcs_writel(GUEST_GDTR_BASE, dt->base);
1312 }
1313
1314 static int init_rmode_tss(struct kvm* kvm)
1315 {
1316         struct page *p1, *p2, *p3;
1317         gfn_t fn = rmode_tss_base(kvm) >> PAGE_SHIFT;
1318         char *page;
1319
1320         p1 = gfn_to_page(kvm, fn++);
1321         p2 = gfn_to_page(kvm, fn++);
1322         p3 = gfn_to_page(kvm, fn);
1323
1324         if (!p1 || !p2 || !p3) {
1325                 kvm_printf(kvm,"%s: gfn_to_page failed\n", __FUNCTION__);
1326                 return 0;
1327         }
1328
1329         page = kmap_atomic(p1, KM_USER0);
1330         clear_page(page);
1331         *(u16*)(page + 0x66) = TSS_BASE_SIZE + TSS_REDIRECTION_SIZE;
1332         kunmap_atomic(page, KM_USER0);
1333
1334         page = kmap_atomic(p2, KM_USER0);
1335         clear_page(page);
1336         kunmap_atomic(page, KM_USER0);
1337
1338         page = kmap_atomic(p3, KM_USER0);
1339         clear_page(page);
1340         *(page + RMODE_TSS_SIZE - 2 * PAGE_SIZE - 1) = ~0;
1341         kunmap_atomic(page, KM_USER0);
1342
1343         return 1;
1344 }
1345
1346 static void seg_setup(int seg)
1347 {
1348         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
1349
1350         vmcs_write16(sf->selector, 0);
1351         vmcs_writel(sf->base, 0);
1352         vmcs_write32(sf->limit, 0xffff);
1353         vmcs_write32(sf->ar_bytes, 0x93);
1354 }
1355
1356 /*
1357  * Sets up the vmcs for emulated real mode.
1358  */
1359 static int vmx_vcpu_setup(struct vcpu_vmx *vmx)
1360 {
1361         u32 host_sysenter_cs;
1362         u32 junk;
1363         unsigned long a;
1364         struct descriptor_table dt;
1365         int i;
1366         int ret = 0;
1367         unsigned long kvm_vmx_return;
1368
1369         if (!init_rmode_tss(vmx->vcpu.kvm)) {
1370                 ret = -ENOMEM;
1371                 goto out;
1372         }
1373
1374         vmx->vcpu.regs[VCPU_REGS_RDX] = get_rdx_init_val();
1375         vmx->vcpu.cr8 = 0;
1376         vmx->vcpu.apic_base = 0xfee00000 | MSR_IA32_APICBASE_ENABLE;
1377         if (vmx->vcpu.vcpu_id == 0)
1378                 vmx->vcpu.apic_base |= MSR_IA32_APICBASE_BSP;
1379
1380         fx_init(&vmx->vcpu);
1381
1382         /*
1383          * GUEST_CS_BASE should really be 0xffff0000, but VT vm86 mode
1384          * insists on having GUEST_CS_BASE == GUEST_CS_SELECTOR << 4.  Sigh.
1385          */
1386         vmcs_write16(GUEST_CS_SELECTOR, 0xf000);
1387         vmcs_writel(GUEST_CS_BASE, 0x000f0000);
1388         vmcs_write32(GUEST_CS_LIMIT, 0xffff);
1389         vmcs_write32(GUEST_CS_AR_BYTES, 0x9b);
1390
1391         seg_setup(VCPU_SREG_DS);
1392         seg_setup(VCPU_SREG_ES);
1393         seg_setup(VCPU_SREG_FS);
1394         seg_setup(VCPU_SREG_GS);
1395         seg_setup(VCPU_SREG_SS);
1396
1397         vmcs_write16(GUEST_TR_SELECTOR, 0);
1398         vmcs_writel(GUEST_TR_BASE, 0);
1399         vmcs_write32(GUEST_TR_LIMIT, 0xffff);
1400         vmcs_write32(GUEST_TR_AR_BYTES, 0x008b);
1401
1402         vmcs_write16(GUEST_LDTR_SELECTOR, 0);
1403         vmcs_writel(GUEST_LDTR_BASE, 0);
1404         vmcs_write32(GUEST_LDTR_LIMIT, 0xffff);
1405         vmcs_write32(GUEST_LDTR_AR_BYTES, 0x00082);
1406
1407         vmcs_write32(GUEST_SYSENTER_CS, 0);
1408         vmcs_writel(GUEST_SYSENTER_ESP, 0);
1409         vmcs_writel(GUEST_SYSENTER_EIP, 0);
1410
1411         vmcs_writel(GUEST_RFLAGS, 0x02);
1412         vmcs_writel(GUEST_RIP, 0xfff0);
1413         vmcs_writel(GUEST_RSP, 0);
1414
1415         //todo: dr0 = dr1 = dr2 = dr3 = 0; dr6 = 0xffff0ff0
1416         vmcs_writel(GUEST_DR7, 0x400);
1417
1418         vmcs_writel(GUEST_GDTR_BASE, 0);
1419         vmcs_write32(GUEST_GDTR_LIMIT, 0xffff);
1420
1421         vmcs_writel(GUEST_IDTR_BASE, 0);
1422         vmcs_write32(GUEST_IDTR_LIMIT, 0xffff);
1423
1424         vmcs_write32(GUEST_ACTIVITY_STATE, 0);
1425         vmcs_write32(GUEST_INTERRUPTIBILITY_INFO, 0);
1426         vmcs_write32(GUEST_PENDING_DBG_EXCEPTIONS, 0);
1427
1428         /* I/O */
1429         vmcs_write64(IO_BITMAP_A, page_to_phys(vmx_io_bitmap_a));
1430         vmcs_write64(IO_BITMAP_B, page_to_phys(vmx_io_bitmap_b));
1431
1432         guest_write_tsc(0);
1433
1434         vmcs_write64(VMCS_LINK_POINTER, -1ull); /* 22.3.1.5 */
1435
1436         /* Special registers */
1437         vmcs_write64(GUEST_IA32_DEBUGCTL, 0);
1438
1439         /* Control */
1440         vmcs_write32(PIN_BASED_VM_EXEC_CONTROL,
1441                 vmcs_config.pin_based_exec_ctrl);
1442         vmcs_write32(CPU_BASED_VM_EXEC_CONTROL,
1443                 vmcs_config.cpu_based_exec_ctrl);
1444
1445         vmcs_write32(PAGE_FAULT_ERROR_CODE_MASK, 0);
1446         vmcs_write32(PAGE_FAULT_ERROR_CODE_MATCH, 0);
1447         vmcs_write32(CR3_TARGET_COUNT, 0);           /* 22.2.1 */
1448
1449         vmcs_writel(HOST_CR0, read_cr0());  /* 22.2.3 */
1450         vmcs_writel(HOST_CR4, read_cr4());  /* 22.2.3, 22.2.5 */
1451         vmcs_writel(HOST_CR3, read_cr3());  /* 22.2.3  FIXME: shadow tables */
1452
1453         vmcs_write16(HOST_CS_SELECTOR, __KERNEL_CS);  /* 22.2.4 */
1454         vmcs_write16(HOST_DS_SELECTOR, __KERNEL_DS);  /* 22.2.4 */
1455         vmcs_write16(HOST_ES_SELECTOR, __KERNEL_DS);  /* 22.2.4 */
1456         vmcs_write16(HOST_FS_SELECTOR, read_fs());    /* 22.2.4 */
1457         vmcs_write16(HOST_GS_SELECTOR, read_gs());    /* 22.2.4 */
1458         vmcs_write16(HOST_SS_SELECTOR, __KERNEL_DS);  /* 22.2.4 */
1459 #ifdef CONFIG_X86_64
1460         rdmsrl(MSR_FS_BASE, a);
1461         vmcs_writel(HOST_FS_BASE, a); /* 22.2.4 */
1462         rdmsrl(MSR_GS_BASE, a);
1463         vmcs_writel(HOST_GS_BASE, a); /* 22.2.4 */
1464 #else
1465         vmcs_writel(HOST_FS_BASE, 0); /* 22.2.4 */
1466         vmcs_writel(HOST_GS_BASE, 0); /* 22.2.4 */
1467 #endif
1468
1469         vmcs_write16(HOST_TR_SELECTOR, GDT_ENTRY_TSS*8);  /* 22.2.4 */
1470
1471         get_idt(&dt);
1472         vmcs_writel(HOST_IDTR_BASE, dt.base);   /* 22.2.4 */
1473
1474         asm ("mov $.Lkvm_vmx_return, %0" : "=r"(kvm_vmx_return));
1475         vmcs_writel(HOST_RIP, kvm_vmx_return); /* 22.2.5 */
1476         vmcs_write32(VM_EXIT_MSR_STORE_COUNT, 0);
1477         vmcs_write32(VM_EXIT_MSR_LOAD_COUNT, 0);
1478         vmcs_write32(VM_ENTRY_MSR_LOAD_COUNT, 0);
1479
1480         rdmsr(MSR_IA32_SYSENTER_CS, host_sysenter_cs, junk);
1481         vmcs_write32(HOST_IA32_SYSENTER_CS, host_sysenter_cs);
1482         rdmsrl(MSR_IA32_SYSENTER_ESP, a);
1483         vmcs_writel(HOST_IA32_SYSENTER_ESP, a);   /* 22.2.3 */
1484         rdmsrl(MSR_IA32_SYSENTER_EIP, a);
1485         vmcs_writel(HOST_IA32_SYSENTER_EIP, a);   /* 22.2.3 */
1486
1487         for (i = 0; i < NR_VMX_MSR; ++i) {
1488                 u32 index = vmx_msr_index[i];
1489                 u32 data_low, data_high;
1490                 u64 data;
1491                 int j = vmx->nmsrs;
1492
1493                 if (rdmsr_safe(index, &data_low, &data_high) < 0)
1494                         continue;
1495                 if (wrmsr_safe(index, data_low, data_high) < 0)
1496                         continue;
1497                 data = data_low | ((u64)data_high << 32);
1498                 vmx->host_msrs[j].index = index;
1499                 vmx->host_msrs[j].reserved = 0;
1500                 vmx->host_msrs[j].data = data;
1501                 vmx->guest_msrs[j] = vmx->host_msrs[j];
1502                 ++vmx->nmsrs;
1503         }
1504
1505         setup_msrs(vmx);
1506
1507         vmcs_write32(VM_EXIT_CONTROLS, vmcs_config.vmexit_ctrl);
1508
1509         /* 22.2.1, 20.8.1 */
1510         vmcs_write32(VM_ENTRY_CONTROLS, vmcs_config.vmentry_ctrl);
1511
1512         vmcs_write32(VM_ENTRY_INTR_INFO_FIELD, 0);  /* 22.2.1 */
1513
1514 #ifdef CONFIG_X86_64
1515         vmcs_writel(VIRTUAL_APIC_PAGE_ADDR, 0);
1516         vmcs_writel(TPR_THRESHOLD, 0);
1517 #endif
1518
1519         vmcs_writel(CR0_GUEST_HOST_MASK, ~0UL);
1520         vmcs_writel(CR4_GUEST_HOST_MASK, KVM_GUEST_CR4_MASK);
1521
1522         vmx->vcpu.cr0 = 0x60000010;
1523         vmx_set_cr0(&vmx->vcpu, vmx->vcpu.cr0); // enter rmode
1524         vmx_set_cr4(&vmx->vcpu, 0);
1525 #ifdef CONFIG_X86_64
1526         vmx_set_efer(&vmx->vcpu, 0);
1527 #endif
1528         vmx_fpu_activate(&vmx->vcpu);
1529         update_exception_bitmap(&vmx->vcpu);
1530
1531         return 0;
1532
1533 out:
1534         return ret;
1535 }
1536
1537 static void inject_rmode_irq(struct kvm_vcpu *vcpu, int irq)
1538 {
1539         u16 ent[2];
1540         u16 cs;
1541         u16 ip;
1542         unsigned long flags;
1543         unsigned long ss_base = vmcs_readl(GUEST_SS_BASE);
1544         u16 sp =  vmcs_readl(GUEST_RSP);
1545         u32 ss_limit = vmcs_read32(GUEST_SS_LIMIT);
1546
1547         if (sp > ss_limit || sp < 6 ) {
1548                 vcpu_printf(vcpu, "%s: #SS, rsp 0x%lx ss 0x%lx limit 0x%x\n",
1549                             __FUNCTION__,
1550                             vmcs_readl(GUEST_RSP),
1551                             vmcs_readl(GUEST_SS_BASE),
1552                             vmcs_read32(GUEST_SS_LIMIT));
1553                 return;
1554         }
1555
1556         if (kvm_read_guest(vcpu, irq * sizeof(ent), sizeof(ent), &ent) !=
1557                                                                 sizeof(ent)) {
1558                 vcpu_printf(vcpu, "%s: read guest err\n", __FUNCTION__);
1559                 return;
1560         }
1561
1562         flags =  vmcs_readl(GUEST_RFLAGS);
1563         cs =  vmcs_readl(GUEST_CS_BASE) >> 4;
1564         ip =  vmcs_readl(GUEST_RIP);
1565
1566
1567         if (kvm_write_guest(vcpu, ss_base + sp - 2, 2, &flags) != 2 ||
1568             kvm_write_guest(vcpu, ss_base + sp - 4, 2, &cs) != 2 ||
1569             kvm_write_guest(vcpu, ss_base + sp - 6, 2, &ip) != 2) {
1570                 vcpu_printf(vcpu, "%s: write guest err\n", __FUNCTION__);
1571                 return;
1572         }
1573
1574         vmcs_writel(GUEST_RFLAGS, flags &
1575                     ~( X86_EFLAGS_IF | X86_EFLAGS_AC | X86_EFLAGS_TF));
1576         vmcs_write16(GUEST_CS_SELECTOR, ent[1]) ;
1577         vmcs_writel(GUEST_CS_BASE, ent[1] << 4);
1578         vmcs_writel(GUEST_RIP, ent[0]);
1579         vmcs_writel(GUEST_RSP, (vmcs_readl(GUEST_RSP) & ~0xffff) | (sp - 6));
1580 }
1581
1582 static void kvm_do_inject_irq(struct kvm_vcpu *vcpu)
1583 {
1584         int word_index = __ffs(vcpu->irq_summary);
1585         int bit_index = __ffs(vcpu->irq_pending[word_index]);
1586         int irq = word_index * BITS_PER_LONG + bit_index;
1587
1588         clear_bit(bit_index, &vcpu->irq_pending[word_index]);
1589         if (!vcpu->irq_pending[word_index])
1590                 clear_bit(word_index, &vcpu->irq_summary);
1591
1592         if (vcpu->rmode.active) {
1593                 inject_rmode_irq(vcpu, irq);
1594                 return;
1595         }
1596         vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
1597                         irq | INTR_TYPE_EXT_INTR | INTR_INFO_VALID_MASK);
1598 }
1599
1600
1601 static void do_interrupt_requests(struct kvm_vcpu *vcpu,
1602                                        struct kvm_run *kvm_run)
1603 {
1604         u32 cpu_based_vm_exec_control;
1605
1606         vcpu->interrupt_window_open =
1607                 ((vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_IF) &&
1608                  (vmcs_read32(GUEST_INTERRUPTIBILITY_INFO) & 3) == 0);
1609
1610         if (vcpu->interrupt_window_open &&
1611             vcpu->irq_summary &&
1612             !(vmcs_read32(VM_ENTRY_INTR_INFO_FIELD) & INTR_INFO_VALID_MASK))
1613                 /*
1614                  * If interrupts enabled, and not blocked by sti or mov ss. Good.
1615                  */
1616                 kvm_do_inject_irq(vcpu);
1617
1618         cpu_based_vm_exec_control = vmcs_read32(CPU_BASED_VM_EXEC_CONTROL);
1619         if (!vcpu->interrupt_window_open &&
1620             (vcpu->irq_summary || kvm_run->request_interrupt_window))
1621                 /*
1622                  * Interrupts blocked.  Wait for unblock.
1623                  */
1624                 cpu_based_vm_exec_control |= CPU_BASED_VIRTUAL_INTR_PENDING;
1625         else
1626                 cpu_based_vm_exec_control &= ~CPU_BASED_VIRTUAL_INTR_PENDING;
1627         vmcs_write32(CPU_BASED_VM_EXEC_CONTROL, cpu_based_vm_exec_control);
1628 }
1629
1630 static void kvm_guest_debug_pre(struct kvm_vcpu *vcpu)
1631 {
1632         struct kvm_guest_debug *dbg = &vcpu->guest_debug;
1633
1634         set_debugreg(dbg->bp[0], 0);
1635         set_debugreg(dbg->bp[1], 1);
1636         set_debugreg(dbg->bp[2], 2);
1637         set_debugreg(dbg->bp[3], 3);
1638
1639         if (dbg->singlestep) {
1640                 unsigned long flags;
1641
1642                 flags = vmcs_readl(GUEST_RFLAGS);
1643                 flags |= X86_EFLAGS_TF | X86_EFLAGS_RF;
1644                 vmcs_writel(GUEST_RFLAGS, flags);
1645         }
1646 }
1647
1648 static int handle_rmode_exception(struct kvm_vcpu *vcpu,
1649                                   int vec, u32 err_code)
1650 {
1651         if (!vcpu->rmode.active)
1652                 return 0;
1653
1654         /*
1655          * Instruction with address size override prefix opcode 0x67
1656          * Cause the #SS fault with 0 error code in VM86 mode.
1657          */
1658         if (((vec == GP_VECTOR) || (vec == SS_VECTOR)) && err_code == 0)
1659                 if (emulate_instruction(vcpu, NULL, 0, 0) == EMULATE_DONE)
1660                         return 1;
1661         return 0;
1662 }
1663
1664 static int handle_exception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1665 {
1666         u32 intr_info, error_code;
1667         unsigned long cr2, rip;
1668         u32 vect_info;
1669         enum emulation_result er;
1670         int r;
1671
1672         vect_info = vmcs_read32(IDT_VECTORING_INFO_FIELD);
1673         intr_info = vmcs_read32(VM_EXIT_INTR_INFO);
1674
1675         if ((vect_info & VECTORING_INFO_VALID_MASK) &&
1676                                                 !is_page_fault(intr_info)) {
1677                 printk(KERN_ERR "%s: unexpected, vectoring info 0x%x "
1678                        "intr info 0x%x\n", __FUNCTION__, vect_info, intr_info);
1679         }
1680
1681         if (is_external_interrupt(vect_info)) {
1682                 int irq = vect_info & VECTORING_INFO_VECTOR_MASK;
1683                 set_bit(irq, vcpu->irq_pending);
1684                 set_bit(irq / BITS_PER_LONG, &vcpu->irq_summary);
1685         }
1686
1687         if ((intr_info & INTR_INFO_INTR_TYPE_MASK) == 0x200) { /* nmi */
1688                 asm ("int $2");
1689                 return 1;
1690         }
1691
1692         if (is_no_device(intr_info)) {
1693                 vmx_fpu_activate(vcpu);
1694                 return 1;
1695         }
1696
1697         error_code = 0;
1698         rip = vmcs_readl(GUEST_RIP);
1699         if (intr_info & INTR_INFO_DELIEVER_CODE_MASK)
1700                 error_code = vmcs_read32(VM_EXIT_INTR_ERROR_CODE);
1701         if (is_page_fault(intr_info)) {
1702                 cr2 = vmcs_readl(EXIT_QUALIFICATION);
1703
1704                 mutex_lock(&vcpu->kvm->lock);
1705                 r = kvm_mmu_page_fault(vcpu, cr2, error_code);
1706                 if (r < 0) {
1707                         mutex_unlock(&vcpu->kvm->lock);
1708                         return r;
1709                 }
1710                 if (!r) {
1711                         mutex_unlock(&vcpu->kvm->lock);
1712                         return 1;
1713                 }
1714
1715                 er = emulate_instruction(vcpu, kvm_run, cr2, error_code);
1716                 mutex_unlock(&vcpu->kvm->lock);
1717
1718                 switch (er) {
1719                 case EMULATE_DONE:
1720                         return 1;
1721                 case EMULATE_DO_MMIO:
1722                         ++vcpu->stat.mmio_exits;
1723                         return 0;
1724                  case EMULATE_FAIL:
1725                         vcpu_printf(vcpu, "%s: emulate fail\n", __FUNCTION__);
1726                         break;
1727                 default:
1728                         BUG();
1729                 }
1730         }
1731
1732         if (vcpu->rmode.active &&
1733             handle_rmode_exception(vcpu, intr_info & INTR_INFO_VECTOR_MASK,
1734                                                                 error_code)) {
1735                 if (vcpu->halt_request) {
1736                         vcpu->halt_request = 0;
1737                         return kvm_emulate_halt(vcpu);
1738                 }
1739                 return 1;
1740         }
1741
1742         if ((intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK)) == (INTR_TYPE_EXCEPTION | 1)) {
1743                 kvm_run->exit_reason = KVM_EXIT_DEBUG;
1744                 return 0;
1745         }
1746         kvm_run->exit_reason = KVM_EXIT_EXCEPTION;
1747         kvm_run->ex.exception = intr_info & INTR_INFO_VECTOR_MASK;
1748         kvm_run->ex.error_code = error_code;
1749         return 0;
1750 }
1751
1752 static int handle_external_interrupt(struct kvm_vcpu *vcpu,
1753                                      struct kvm_run *kvm_run)
1754 {
1755         ++vcpu->stat.irq_exits;
1756         return 1;
1757 }
1758
1759 static int handle_triple_fault(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1760 {
1761         kvm_run->exit_reason = KVM_EXIT_SHUTDOWN;
1762         return 0;
1763 }
1764
1765 static int get_io_count(struct kvm_vcpu *vcpu, unsigned long *count)
1766 {
1767         u64 inst;
1768         gva_t rip;
1769         int countr_size;
1770         int i, n;
1771
1772         if ((vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_VM)) {
1773                 countr_size = 2;
1774         } else {
1775                 u32 cs_ar = vmcs_read32(GUEST_CS_AR_BYTES);
1776
1777                 countr_size = (cs_ar & AR_L_MASK) ? 8:
1778                               (cs_ar & AR_DB_MASK) ? 4: 2;
1779         }
1780
1781         rip =  vmcs_readl(GUEST_RIP);
1782         if (countr_size != 8)
1783                 rip += vmcs_readl(GUEST_CS_BASE);
1784
1785         n = kvm_read_guest(vcpu, rip, sizeof(inst), &inst);
1786
1787         for (i = 0; i < n; i++) {
1788                 switch (((u8*)&inst)[i]) {
1789                 case 0xf0:
1790                 case 0xf2:
1791                 case 0xf3:
1792                 case 0x2e:
1793                 case 0x36:
1794                 case 0x3e:
1795                 case 0x26:
1796                 case 0x64:
1797                 case 0x65:
1798                 case 0x66:
1799                         break;
1800                 case 0x67:
1801                         countr_size = (countr_size == 2) ? 4: (countr_size >> 1);
1802                 default:
1803                         goto done;
1804                 }
1805         }
1806         return 0;
1807 done:
1808         countr_size *= 8;
1809         *count = vcpu->regs[VCPU_REGS_RCX] & (~0ULL >> (64 - countr_size));
1810         //printk("cx: %lx\n", vcpu->regs[VCPU_REGS_RCX]);
1811         return 1;
1812 }
1813
1814 static int handle_io(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1815 {
1816         u64 exit_qualification;
1817         int size, down, in, string, rep;
1818         unsigned port;
1819         unsigned long count;
1820         gva_t address;
1821
1822         ++vcpu->stat.io_exits;
1823         exit_qualification = vmcs_read64(EXIT_QUALIFICATION);
1824         in = (exit_qualification & 8) != 0;
1825         size = (exit_qualification & 7) + 1;
1826         string = (exit_qualification & 16) != 0;
1827         down = (vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_DF) != 0;
1828         count = 1;
1829         rep = (exit_qualification & 32) != 0;
1830         port = exit_qualification >> 16;
1831         address = 0;
1832         if (string) {
1833                 if (rep && !get_io_count(vcpu, &count))
1834                         return 1;
1835                 address = vmcs_readl(GUEST_LINEAR_ADDRESS);
1836         }
1837         return kvm_setup_pio(vcpu, kvm_run, in, size, count, string, down,
1838                              address, rep, port);
1839 }
1840
1841 static void
1842 vmx_patch_hypercall(struct kvm_vcpu *vcpu, unsigned char *hypercall)
1843 {
1844         /*
1845          * Patch in the VMCALL instruction:
1846          */
1847         hypercall[0] = 0x0f;
1848         hypercall[1] = 0x01;
1849         hypercall[2] = 0xc1;
1850         hypercall[3] = 0xc3;
1851 }
1852
1853 static int handle_cr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1854 {
1855         u64 exit_qualification;
1856         int cr;
1857         int reg;
1858
1859         exit_qualification = vmcs_read64(EXIT_QUALIFICATION);
1860         cr = exit_qualification & 15;
1861         reg = (exit_qualification >> 8) & 15;
1862         switch ((exit_qualification >> 4) & 3) {
1863         case 0: /* mov to cr */
1864                 switch (cr) {
1865                 case 0:
1866                         vcpu_load_rsp_rip(vcpu);
1867                         set_cr0(vcpu, vcpu->regs[reg]);
1868                         skip_emulated_instruction(vcpu);
1869                         return 1;
1870                 case 3:
1871                         vcpu_load_rsp_rip(vcpu);
1872                         set_cr3(vcpu, vcpu->regs[reg]);
1873                         skip_emulated_instruction(vcpu);
1874                         return 1;
1875                 case 4:
1876                         vcpu_load_rsp_rip(vcpu);
1877                         set_cr4(vcpu, vcpu->regs[reg]);
1878                         skip_emulated_instruction(vcpu);
1879                         return 1;
1880                 case 8:
1881                         vcpu_load_rsp_rip(vcpu);
1882                         set_cr8(vcpu, vcpu->regs[reg]);
1883                         skip_emulated_instruction(vcpu);
1884                         return 1;
1885                 };
1886                 break;
1887         case 2: /* clts */
1888                 vcpu_load_rsp_rip(vcpu);
1889                 vmx_fpu_deactivate(vcpu);
1890                 vcpu->cr0 &= ~X86_CR0_TS;
1891                 vmcs_writel(CR0_READ_SHADOW, vcpu->cr0);
1892                 vmx_fpu_activate(vcpu);
1893                 skip_emulated_instruction(vcpu);
1894                 return 1;
1895         case 1: /*mov from cr*/
1896                 switch (cr) {
1897                 case 3:
1898                         vcpu_load_rsp_rip(vcpu);
1899                         vcpu->regs[reg] = vcpu->cr3;
1900                         vcpu_put_rsp_rip(vcpu);
1901                         skip_emulated_instruction(vcpu);
1902                         return 1;
1903                 case 8:
1904                         vcpu_load_rsp_rip(vcpu);
1905                         vcpu->regs[reg] = vcpu->cr8;
1906                         vcpu_put_rsp_rip(vcpu);
1907                         skip_emulated_instruction(vcpu);
1908                         return 1;
1909                 }
1910                 break;
1911         case 3: /* lmsw */
1912                 lmsw(vcpu, (exit_qualification >> LMSW_SOURCE_DATA_SHIFT) & 0x0f);
1913
1914                 skip_emulated_instruction(vcpu);
1915                 return 1;
1916         default:
1917                 break;
1918         }
1919         kvm_run->exit_reason = 0;
1920         printk(KERN_ERR "kvm: unhandled control register: op %d cr %d\n",
1921                (int)(exit_qualification >> 4) & 3, cr);
1922         return 0;
1923 }
1924
1925 static int handle_dr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1926 {
1927         u64 exit_qualification;
1928         unsigned long val;
1929         int dr, reg;
1930
1931         /*
1932          * FIXME: this code assumes the host is debugging the guest.
1933          *        need to deal with guest debugging itself too.
1934          */
1935         exit_qualification = vmcs_read64(EXIT_QUALIFICATION);
1936         dr = exit_qualification & 7;
1937         reg = (exit_qualification >> 8) & 15;
1938         vcpu_load_rsp_rip(vcpu);
1939         if (exit_qualification & 16) {
1940                 /* mov from dr */
1941                 switch (dr) {
1942                 case 6:
1943                         val = 0xffff0ff0;
1944                         break;
1945                 case 7:
1946                         val = 0x400;
1947                         break;
1948                 default:
1949                         val = 0;
1950                 }
1951                 vcpu->regs[reg] = val;
1952         } else {
1953                 /* mov to dr */
1954         }
1955         vcpu_put_rsp_rip(vcpu);
1956         skip_emulated_instruction(vcpu);
1957         return 1;
1958 }
1959
1960 static int handle_cpuid(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1961 {
1962         kvm_emulate_cpuid(vcpu);
1963         return 1;
1964 }
1965
1966 static int handle_rdmsr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1967 {
1968         u32 ecx = vcpu->regs[VCPU_REGS_RCX];
1969         u64 data;
1970
1971         if (vmx_get_msr(vcpu, ecx, &data)) {
1972                 vmx_inject_gp(vcpu, 0);
1973                 return 1;
1974         }
1975
1976         /* FIXME: handling of bits 32:63 of rax, rdx */
1977         vcpu->regs[VCPU_REGS_RAX] = data & -1u;
1978         vcpu->regs[VCPU_REGS_RDX] = (data >> 32) & -1u;
1979         skip_emulated_instruction(vcpu);
1980         return 1;
1981 }
1982
1983 static int handle_wrmsr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1984 {
1985         u32 ecx = vcpu->regs[VCPU_REGS_RCX];
1986         u64 data = (vcpu->regs[VCPU_REGS_RAX] & -1u)
1987                 | ((u64)(vcpu->regs[VCPU_REGS_RDX] & -1u) << 32);
1988
1989         if (vmx_set_msr(vcpu, ecx, data) != 0) {
1990                 vmx_inject_gp(vcpu, 0);
1991                 return 1;
1992         }
1993
1994         skip_emulated_instruction(vcpu);
1995         return 1;
1996 }
1997
1998 static void post_kvm_run_save(struct kvm_vcpu *vcpu,
1999                               struct kvm_run *kvm_run)
2000 {
2001         kvm_run->if_flag = (vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_IF) != 0;
2002         kvm_run->cr8 = vcpu->cr8;
2003         kvm_run->apic_base = vcpu->apic_base;
2004         kvm_run->ready_for_interrupt_injection = (vcpu->interrupt_window_open &&
2005                                                   vcpu->irq_summary == 0);
2006 }
2007
2008 static int handle_interrupt_window(struct kvm_vcpu *vcpu,
2009                                    struct kvm_run *kvm_run)
2010 {
2011         /*
2012          * If the user space waits to inject interrupts, exit as soon as
2013          * possible
2014          */
2015         if (kvm_run->request_interrupt_window &&
2016             !vcpu->irq_summary) {
2017                 kvm_run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
2018                 ++vcpu->stat.irq_window_exits;
2019                 return 0;
2020         }
2021         return 1;
2022 }
2023
2024 static int handle_halt(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
2025 {
2026         skip_emulated_instruction(vcpu);
2027         return kvm_emulate_halt(vcpu);
2028 }
2029
2030 static int handle_vmcall(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
2031 {
2032         skip_emulated_instruction(vcpu);
2033         return kvm_hypercall(vcpu, kvm_run);
2034 }
2035
2036 /*
2037  * The exit handlers return 1 if the exit was handled fully and guest execution
2038  * may resume.  Otherwise they set the kvm_run parameter to indicate what needs
2039  * to be done to userspace and return 0.
2040  */
2041 static int (*kvm_vmx_exit_handlers[])(struct kvm_vcpu *vcpu,
2042                                       struct kvm_run *kvm_run) = {
2043         [EXIT_REASON_EXCEPTION_NMI]           = handle_exception,
2044         [EXIT_REASON_EXTERNAL_INTERRUPT]      = handle_external_interrupt,
2045         [EXIT_REASON_TRIPLE_FAULT]            = handle_triple_fault,
2046         [EXIT_REASON_IO_INSTRUCTION]          = handle_io,
2047         [EXIT_REASON_CR_ACCESS]               = handle_cr,
2048         [EXIT_REASON_DR_ACCESS]               = handle_dr,
2049         [EXIT_REASON_CPUID]                   = handle_cpuid,
2050         [EXIT_REASON_MSR_READ]                = handle_rdmsr,
2051         [EXIT_REASON_MSR_WRITE]               = handle_wrmsr,
2052         [EXIT_REASON_PENDING_INTERRUPT]       = handle_interrupt_window,
2053         [EXIT_REASON_HLT]                     = handle_halt,
2054         [EXIT_REASON_VMCALL]                  = handle_vmcall,
2055 };
2056
2057 static const int kvm_vmx_max_exit_handlers =
2058         ARRAY_SIZE(kvm_vmx_exit_handlers);
2059
2060 /*
2061  * The guest has exited.  See if we can fix it or if we need userspace
2062  * assistance.
2063  */
2064 static int kvm_handle_exit(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
2065 {
2066         u32 vectoring_info = vmcs_read32(IDT_VECTORING_INFO_FIELD);
2067         u32 exit_reason = vmcs_read32(VM_EXIT_REASON);
2068
2069         if ( (vectoring_info & VECTORING_INFO_VALID_MASK) &&
2070                                 exit_reason != EXIT_REASON_EXCEPTION_NMI )
2071                 printk(KERN_WARNING "%s: unexpected, valid vectoring info and "
2072                        "exit reason is 0x%x\n", __FUNCTION__, exit_reason);
2073         if (exit_reason < kvm_vmx_max_exit_handlers
2074             && kvm_vmx_exit_handlers[exit_reason])
2075                 return kvm_vmx_exit_handlers[exit_reason](vcpu, kvm_run);
2076         else {
2077                 kvm_run->exit_reason = KVM_EXIT_UNKNOWN;
2078                 kvm_run->hw.hardware_exit_reason = exit_reason;
2079         }
2080         return 0;
2081 }
2082
2083 /*
2084  * Check if userspace requested an interrupt window, and that the
2085  * interrupt window is open.
2086  *
2087  * No need to exit to userspace if we already have an interrupt queued.
2088  */
2089 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu,
2090                                           struct kvm_run *kvm_run)
2091 {
2092         return (!vcpu->irq_summary &&
2093                 kvm_run->request_interrupt_window &&
2094                 vcpu->interrupt_window_open &&
2095                 (vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_IF));
2096 }
2097
2098 static void vmx_flush_tlb(struct kvm_vcpu *vcpu)
2099 {
2100 }
2101
2102 static int vmx_vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
2103 {
2104         struct vcpu_vmx *vmx = to_vmx(vcpu);
2105         u8 fail;
2106         int r;
2107
2108 preempted:
2109         if (vcpu->guest_debug.enabled)
2110                 kvm_guest_debug_pre(vcpu);
2111
2112 again:
2113         r = kvm_mmu_reload(vcpu);
2114         if (unlikely(r))
2115                 goto out;
2116
2117         preempt_disable();
2118
2119         if (!vcpu->mmio_read_completed)
2120                 do_interrupt_requests(vcpu, kvm_run);
2121
2122         vmx_save_host_state(vmx);
2123         kvm_load_guest_fpu(vcpu);
2124
2125         /*
2126          * Loading guest fpu may have cleared host cr0.ts
2127          */
2128         vmcs_writel(HOST_CR0, read_cr0());
2129
2130         local_irq_disable();
2131
2132         vcpu->guest_mode = 1;
2133         if (vcpu->requests)
2134                 if (test_and_clear_bit(KVM_TLB_FLUSH, &vcpu->requests))
2135                     vmx_flush_tlb(vcpu);
2136
2137         asm (
2138                 /* Store host registers */
2139 #ifdef CONFIG_X86_64
2140                 "push %%rax; push %%rbx; push %%rdx;"
2141                 "push %%rsi; push %%rdi; push %%rbp;"
2142                 "push %%r8;  push %%r9;  push %%r10; push %%r11;"
2143                 "push %%r12; push %%r13; push %%r14; push %%r15;"
2144                 "push %%rcx \n\t"
2145                 ASM_VMX_VMWRITE_RSP_RDX "\n\t"
2146 #else
2147                 "pusha; push %%ecx \n\t"
2148                 ASM_VMX_VMWRITE_RSP_RDX "\n\t"
2149 #endif
2150                 /* Check if vmlaunch of vmresume is needed */
2151                 "cmp $0, %1 \n\t"
2152                 /* Load guest registers.  Don't clobber flags. */
2153 #ifdef CONFIG_X86_64
2154                 "mov %c[cr2](%3), %%rax \n\t"
2155                 "mov %%rax, %%cr2 \n\t"
2156                 "mov %c[rax](%3), %%rax \n\t"
2157                 "mov %c[rbx](%3), %%rbx \n\t"
2158                 "mov %c[rdx](%3), %%rdx \n\t"
2159                 "mov %c[rsi](%3), %%rsi \n\t"
2160                 "mov %c[rdi](%3), %%rdi \n\t"
2161                 "mov %c[rbp](%3), %%rbp \n\t"
2162                 "mov %c[r8](%3),  %%r8  \n\t"
2163                 "mov %c[r9](%3),  %%r9  \n\t"
2164                 "mov %c[r10](%3), %%r10 \n\t"
2165                 "mov %c[r11](%3), %%r11 \n\t"
2166                 "mov %c[r12](%3), %%r12 \n\t"
2167                 "mov %c[r13](%3), %%r13 \n\t"
2168                 "mov %c[r14](%3), %%r14 \n\t"
2169                 "mov %c[r15](%3), %%r15 \n\t"
2170                 "mov %c[rcx](%3), %%rcx \n\t" /* kills %3 (rcx) */
2171 #else
2172                 "mov %c[cr2](%3), %%eax \n\t"
2173                 "mov %%eax,   %%cr2 \n\t"
2174                 "mov %c[rax](%3), %%eax \n\t"
2175                 "mov %c[rbx](%3), %%ebx \n\t"
2176                 "mov %c[rdx](%3), %%edx \n\t"
2177                 "mov %c[rsi](%3), %%esi \n\t"
2178                 "mov %c[rdi](%3), %%edi \n\t"
2179                 "mov %c[rbp](%3), %%ebp \n\t"
2180                 "mov %c[rcx](%3), %%ecx \n\t" /* kills %3 (ecx) */
2181 #endif
2182                 /* Enter guest mode */
2183                 "jne .Llaunched \n\t"
2184                 ASM_VMX_VMLAUNCH "\n\t"
2185                 "jmp .Lkvm_vmx_return \n\t"
2186                 ".Llaunched: " ASM_VMX_VMRESUME "\n\t"
2187                 ".Lkvm_vmx_return: "
2188                 /* Save guest registers, load host registers, keep flags */
2189 #ifdef CONFIG_X86_64
2190                 "xchg %3,     (%%rsp) \n\t"
2191                 "mov %%rax, %c[rax](%3) \n\t"
2192                 "mov %%rbx, %c[rbx](%3) \n\t"
2193                 "pushq (%%rsp); popq %c[rcx](%3) \n\t"
2194                 "mov %%rdx, %c[rdx](%3) \n\t"
2195                 "mov %%rsi, %c[rsi](%3) \n\t"
2196                 "mov %%rdi, %c[rdi](%3) \n\t"
2197                 "mov %%rbp, %c[rbp](%3) \n\t"
2198                 "mov %%r8,  %c[r8](%3) \n\t"
2199                 "mov %%r9,  %c[r9](%3) \n\t"
2200                 "mov %%r10, %c[r10](%3) \n\t"
2201                 "mov %%r11, %c[r11](%3) \n\t"
2202                 "mov %%r12, %c[r12](%3) \n\t"
2203                 "mov %%r13, %c[r13](%3) \n\t"
2204                 "mov %%r14, %c[r14](%3) \n\t"
2205                 "mov %%r15, %c[r15](%3) \n\t"
2206                 "mov %%cr2, %%rax   \n\t"
2207                 "mov %%rax, %c[cr2](%3) \n\t"
2208                 "mov (%%rsp), %3 \n\t"
2209
2210                 "pop  %%rcx; pop  %%r15; pop  %%r14; pop  %%r13; pop  %%r12;"
2211                 "pop  %%r11; pop  %%r10; pop  %%r9;  pop  %%r8;"
2212                 "pop  %%rbp; pop  %%rdi; pop  %%rsi;"
2213                 "pop  %%rdx; pop  %%rbx; pop  %%rax \n\t"
2214 #else
2215                 "xchg %3, (%%esp) \n\t"
2216                 "mov %%eax, %c[rax](%3) \n\t"
2217                 "mov %%ebx, %c[rbx](%3) \n\t"
2218                 "pushl (%%esp); popl %c[rcx](%3) \n\t"
2219                 "mov %%edx, %c[rdx](%3) \n\t"
2220                 "mov %%esi, %c[rsi](%3) \n\t"
2221                 "mov %%edi, %c[rdi](%3) \n\t"
2222                 "mov %%ebp, %c[rbp](%3) \n\t"
2223                 "mov %%cr2, %%eax  \n\t"
2224                 "mov %%eax, %c[cr2](%3) \n\t"
2225                 "mov (%%esp), %3 \n\t"
2226
2227                 "pop %%ecx; popa \n\t"
2228 #endif
2229                 "setbe %0 \n\t"
2230               : "=q" (fail)
2231               : "r"(vmx->launched), "d"((unsigned long)HOST_RSP),
2232                 "c"(vcpu),
2233                 [rax]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RAX])),
2234                 [rbx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RBX])),
2235                 [rcx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RCX])),
2236                 [rdx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RDX])),
2237                 [rsi]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RSI])),
2238                 [rdi]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RDI])),
2239                 [rbp]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RBP])),
2240 #ifdef CONFIG_X86_64
2241                 [r8 ]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R8 ])),
2242                 [r9 ]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R9 ])),
2243                 [r10]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R10])),
2244                 [r11]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R11])),
2245                 [r12]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R12])),
2246                 [r13]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R13])),
2247                 [r14]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R14])),
2248                 [r15]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R15])),
2249 #endif
2250                 [cr2]"i"(offsetof(struct kvm_vcpu, cr2))
2251               : "cc", "memory" );
2252
2253         vcpu->guest_mode = 0;
2254         local_irq_enable();
2255
2256         ++vcpu->stat.exits;
2257
2258         vcpu->interrupt_window_open = (vmcs_read32(GUEST_INTERRUPTIBILITY_INFO) & 3) == 0;
2259
2260         asm ("mov %0, %%ds; mov %0, %%es" : : "r"(__USER_DS));
2261         vmx->launched = 1;
2262
2263         preempt_enable();
2264
2265         if (unlikely(fail)) {
2266                 kvm_run->exit_reason = KVM_EXIT_FAIL_ENTRY;
2267                 kvm_run->fail_entry.hardware_entry_failure_reason
2268                         = vmcs_read32(VM_INSTRUCTION_ERROR);
2269                 r = 0;
2270                 goto out;
2271         }
2272         /*
2273          * Profile KVM exit RIPs:
2274          */
2275         if (unlikely(prof_on == KVM_PROFILING))
2276                 profile_hit(KVM_PROFILING, (void *)vmcs_readl(GUEST_RIP));
2277
2278         r = kvm_handle_exit(kvm_run, vcpu);
2279         if (r > 0) {
2280                 /* Give scheduler a change to reschedule. */
2281                 if (signal_pending(current)) {
2282                         r = -EINTR;
2283                         kvm_run->exit_reason = KVM_EXIT_INTR;
2284                         ++vcpu->stat.signal_exits;
2285                         goto out;
2286                 }
2287
2288                 if (dm_request_for_irq_injection(vcpu, kvm_run)) {
2289                         r = -EINTR;
2290                         kvm_run->exit_reason = KVM_EXIT_INTR;
2291                         ++vcpu->stat.request_irq_exits;
2292                         goto out;
2293                 }
2294                 if (!need_resched()) {
2295                         ++vcpu->stat.light_exits;
2296                         goto again;
2297                 }
2298         }
2299
2300 out:
2301         if (r > 0) {
2302                 kvm_resched(vcpu);
2303                 goto preempted;
2304         }
2305
2306         post_kvm_run_save(vcpu, kvm_run);
2307         return r;
2308 }
2309
2310 static void vmx_inject_page_fault(struct kvm_vcpu *vcpu,
2311                                   unsigned long addr,
2312                                   u32 err_code)
2313 {
2314         u32 vect_info = vmcs_read32(IDT_VECTORING_INFO_FIELD);
2315
2316         ++vcpu->stat.pf_guest;
2317
2318         if (is_page_fault(vect_info)) {
2319                 printk(KERN_DEBUG "inject_page_fault: "
2320                        "double fault 0x%lx @ 0x%lx\n",
2321                        addr, vmcs_readl(GUEST_RIP));
2322                 vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE, 0);
2323                 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
2324                              DF_VECTOR |
2325                              INTR_TYPE_EXCEPTION |
2326                              INTR_INFO_DELIEVER_CODE_MASK |
2327                              INTR_INFO_VALID_MASK);
2328                 return;
2329         }
2330         vcpu->cr2 = addr;
2331         vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE, err_code);
2332         vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
2333                      PF_VECTOR |
2334                      INTR_TYPE_EXCEPTION |
2335                      INTR_INFO_DELIEVER_CODE_MASK |
2336                      INTR_INFO_VALID_MASK);
2337
2338 }
2339
2340 static void vmx_free_vmcs(struct kvm_vcpu *vcpu)
2341 {
2342         struct vcpu_vmx *vmx = to_vmx(vcpu);
2343
2344         if (vmx->vmcs) {
2345                 on_each_cpu(__vcpu_clear, vmx, 0, 1);
2346                 free_vmcs(vmx->vmcs);
2347                 vmx->vmcs = NULL;
2348         }
2349 }
2350
2351 static void vmx_free_vcpu(struct kvm_vcpu *vcpu)
2352 {
2353         struct vcpu_vmx *vmx = to_vmx(vcpu);
2354
2355         vmx_free_vmcs(vcpu);
2356         kfree(vmx->host_msrs);
2357         kfree(vmx->guest_msrs);
2358         kvm_vcpu_uninit(vcpu);
2359         kfree(vmx);
2360 }
2361
2362 static struct kvm_vcpu *vmx_create_vcpu(struct kvm *kvm, unsigned int id)
2363 {
2364         int err;
2365         struct vcpu_vmx *vmx = kzalloc(sizeof(*vmx), GFP_KERNEL);
2366         int cpu;
2367
2368         if (!vmx)
2369                 return ERR_PTR(-ENOMEM);
2370
2371         err = kvm_vcpu_init(&vmx->vcpu, kvm, id);
2372         if (err)
2373                 goto free_vcpu;
2374
2375         vmx->guest_msrs = kmalloc(PAGE_SIZE, GFP_KERNEL);
2376         if (!vmx->guest_msrs) {
2377                 err = -ENOMEM;
2378                 goto uninit_vcpu;
2379         }
2380
2381         vmx->host_msrs = kmalloc(PAGE_SIZE, GFP_KERNEL);
2382         if (!vmx->host_msrs)
2383                 goto free_guest_msrs;
2384
2385         vmx->vmcs = alloc_vmcs();
2386         if (!vmx->vmcs)
2387                 goto free_msrs;
2388
2389         vmcs_clear(vmx->vmcs);
2390
2391         cpu = get_cpu();
2392         vmx_vcpu_load(&vmx->vcpu, cpu);
2393         err = vmx_vcpu_setup(vmx);
2394         vmx_vcpu_put(&vmx->vcpu);
2395         put_cpu();
2396         if (err)
2397                 goto free_vmcs;
2398
2399         return &vmx->vcpu;
2400
2401 free_vmcs:
2402         free_vmcs(vmx->vmcs);
2403 free_msrs:
2404         kfree(vmx->host_msrs);
2405 free_guest_msrs:
2406         kfree(vmx->guest_msrs);
2407 uninit_vcpu:
2408         kvm_vcpu_uninit(&vmx->vcpu);
2409 free_vcpu:
2410         kfree(vmx);
2411         return ERR_PTR(err);
2412 }
2413
2414 static struct kvm_arch_ops vmx_arch_ops = {
2415         .cpu_has_kvm_support = cpu_has_kvm_support,
2416         .disabled_by_bios = vmx_disabled_by_bios,
2417         .hardware_setup = hardware_setup,
2418         .hardware_unsetup = hardware_unsetup,
2419         .hardware_enable = hardware_enable,
2420         .hardware_disable = hardware_disable,
2421
2422         .vcpu_create = vmx_create_vcpu,
2423         .vcpu_free = vmx_free_vcpu,
2424
2425         .vcpu_load = vmx_vcpu_load,
2426         .vcpu_put = vmx_vcpu_put,
2427         .vcpu_decache = vmx_vcpu_decache,
2428
2429         .set_guest_debug = set_guest_debug,
2430         .get_msr = vmx_get_msr,
2431         .set_msr = vmx_set_msr,
2432         .get_segment_base = vmx_get_segment_base,
2433         .get_segment = vmx_get_segment,
2434         .set_segment = vmx_set_segment,
2435         .get_cs_db_l_bits = vmx_get_cs_db_l_bits,
2436         .decache_cr4_guest_bits = vmx_decache_cr4_guest_bits,
2437         .set_cr0 = vmx_set_cr0,
2438         .set_cr3 = vmx_set_cr3,
2439         .set_cr4 = vmx_set_cr4,
2440 #ifdef CONFIG_X86_64
2441         .set_efer = vmx_set_efer,
2442 #endif
2443         .get_idt = vmx_get_idt,
2444         .set_idt = vmx_set_idt,
2445         .get_gdt = vmx_get_gdt,
2446         .set_gdt = vmx_set_gdt,
2447         .cache_regs = vcpu_load_rsp_rip,
2448         .decache_regs = vcpu_put_rsp_rip,
2449         .get_rflags = vmx_get_rflags,
2450         .set_rflags = vmx_set_rflags,
2451
2452         .tlb_flush = vmx_flush_tlb,
2453         .inject_page_fault = vmx_inject_page_fault,
2454
2455         .inject_gp = vmx_inject_gp,
2456
2457         .run = vmx_vcpu_run,
2458         .skip_emulated_instruction = skip_emulated_instruction,
2459         .patch_hypercall = vmx_patch_hypercall,
2460 };
2461
2462 static int __init vmx_init(void)
2463 {
2464         void *iova;
2465         int r;
2466
2467         vmx_io_bitmap_a = alloc_page(GFP_KERNEL | __GFP_HIGHMEM);
2468         if (!vmx_io_bitmap_a)
2469                 return -ENOMEM;
2470
2471         vmx_io_bitmap_b = alloc_page(GFP_KERNEL | __GFP_HIGHMEM);
2472         if (!vmx_io_bitmap_b) {
2473                 r = -ENOMEM;
2474                 goto out;
2475         }
2476
2477         /*
2478          * Allow direct access to the PC debug port (it is often used for I/O
2479          * delays, but the vmexits simply slow things down).
2480          */
2481         iova = kmap(vmx_io_bitmap_a);
2482         memset(iova, 0xff, PAGE_SIZE);
2483         clear_bit(0x80, iova);
2484         kunmap(vmx_io_bitmap_a);
2485
2486         iova = kmap(vmx_io_bitmap_b);
2487         memset(iova, 0xff, PAGE_SIZE);
2488         kunmap(vmx_io_bitmap_b);
2489
2490         r = kvm_init_arch(&vmx_arch_ops, THIS_MODULE);
2491         if (r)
2492                 goto out1;
2493
2494         return 0;
2495
2496 out1:
2497         __free_page(vmx_io_bitmap_b);
2498 out:
2499         __free_page(vmx_io_bitmap_a);
2500         return r;
2501 }
2502
2503 static void __exit vmx_exit(void)
2504 {
2505         __free_page(vmx_io_bitmap_b);
2506         __free_page(vmx_io_bitmap_a);
2507
2508         kvm_exit_arch();
2509 }
2510
2511 module_init(vmx_init)
2512 module_exit(vmx_exit)