err.no Git - linux-2.6/blob - drivers/kvm/vmx.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * This module enables machines with Intel VT-x extensions to run virtual
   5  * machines without emulation or binary translation.
   6  *
   7  * Copyright (C) 2006 Qumranet, Inc.
   8  *
   9  * Authors:
  10  *   Avi Kivity   <avi@qumranet.com>
  11  *   Yaniv Kamay  <yaniv@qumranet.com>
  12  *
  13  * This work is licensed under the terms of the GNU GPL, version 2.  See
  14  * the COPYING file in the top-level directory.
  15  *
  16  */
  17
  18 #include "kvm.h"
  19 #include "x86_emulate.h"
  20 #include "irq.h"
  21 #include "vmx.h"
  22 #include "segment_descriptor.h"
  23
  24 #include <linux/module.h>
  25 #include <linux/kernel.h>
  26 #include <linux/mm.h>
  27 #include <linux/highmem.h>
  28 #include <linux/profile.h>
  29 #include <linux/sched.h>
  30
  31 #include <asm/io.h>
  32 #include <asm/desc.h>
  33
  34 MODULE_AUTHOR("Qumranet");
  35 MODULE_LICENSE("GPL");
  36
  37 struct vmcs {
  38         u32 revision_id;
  39         u32 abort;
  40         char data[0];
  41 };
  42
  43 struct vcpu_vmx {
  44         struct kvm_vcpu       vcpu;
  45         int                   launched;
  46         struct kvm_msr_entry *guest_msrs;
  47         struct kvm_msr_entry *host_msrs;
  48         int                   nmsrs;
  49         int                   save_nmsrs;
  50         int                   msr_offset_efer;
  51 #ifdef CONFIG_X86_64
  52         int                   msr_offset_kernel_gs_base;
  53 #endif
  54         struct vmcs          *vmcs;
  55         struct {
  56                 int           loaded;
  57                 u16           fs_sel, gs_sel, ldt_sel;
  58                 int           gs_ldt_reload_needed;
  59                 int           fs_reload_needed;
  60         }host_state;
  61
  62 };
  63
  64 static inline struct vcpu_vmx *to_vmx(struct kvm_vcpu *vcpu)
  65 {
  66         return container_of(vcpu, struct vcpu_vmx, vcpu);
  67 }
  68
  69 static int init_rmode_tss(struct kvm *kvm);
  70
  71 static DEFINE_PER_CPU(struct vmcs *, vmxarea);
  72 static DEFINE_PER_CPU(struct vmcs *, current_vmcs);
  73
  74 static struct page *vmx_io_bitmap_a;
  75 static struct page *vmx_io_bitmap_b;
  76
  77 #define EFER_SAVE_RESTORE_BITS ((u64)EFER_SCE)
  78
  79 static struct vmcs_config {
  80         int size;
  81         int order;
  82         u32 revision_id;
  83         u32 pin_based_exec_ctrl;
  84         u32 cpu_based_exec_ctrl;
  85         u32 vmexit_ctrl;
  86         u32 vmentry_ctrl;
  87 } vmcs_config;
  88
  89 #define VMX_SEGMENT_FIELD(seg)                                  \
  90         [VCPU_SREG_##seg] = {                                   \
  91                 .selector = GUEST_##seg##_SELECTOR,             \
  92                 .base = GUEST_##seg##_BASE,                     \
  93                 .limit = GUEST_##seg##_LIMIT,                   \
  94                 .ar_bytes = GUEST_##seg##_AR_BYTES,             \
  95         }
  96
  97 static struct kvm_vmx_segment_field {
  98         unsigned selector;
  99         unsigned base;
 100         unsigned limit;
 101         unsigned ar_bytes;
 102 } kvm_vmx_segment_fields[] = {
 103         VMX_SEGMENT_FIELD(CS),
 104         VMX_SEGMENT_FIELD(DS),
 105         VMX_SEGMENT_FIELD(ES),
 106         VMX_SEGMENT_FIELD(FS),
 107         VMX_SEGMENT_FIELD(GS),
 108         VMX_SEGMENT_FIELD(SS),
 109         VMX_SEGMENT_FIELD(TR),
 110         VMX_SEGMENT_FIELD(LDTR),
 111 };
 112
 113 /*
 114  * Keep MSR_K6_STAR at the end, as setup_msrs() will try to optimize it
 115  * away by decrementing the array size.
 116  */
 117 static const u32 vmx_msr_index[] = {
 118 #ifdef CONFIG_X86_64
 119         MSR_SYSCALL_MASK, MSR_LSTAR, MSR_CSTAR, MSR_KERNEL_GS_BASE,
 120 #endif
 121         MSR_EFER, MSR_K6_STAR,
 122 };
 123 #define NR_VMX_MSR ARRAY_SIZE(vmx_msr_index)
 124
 125 static void load_msrs(struct kvm_msr_entry *e, int n)
 126 {
 127         int i;
 128
 129         for (i = 0; i < n; ++i)
 130                 wrmsrl(e[i].index, e[i].data);
 131 }
 132
 133 static void save_msrs(struct kvm_msr_entry *e, int n)
 134 {
 135         int i;
 136
 137         for (i = 0; i < n; ++i)
 138                 rdmsrl(e[i].index, e[i].data);
 139 }
 140
 141 static inline u64 msr_efer_save_restore_bits(struct kvm_msr_entry msr)
 142 {
 143         return (u64)msr.data & EFER_SAVE_RESTORE_BITS;
 144 }
 145
 146 static inline int msr_efer_need_save_restore(struct vcpu_vmx *vmx)
 147 {
 148         int efer_offset = vmx->msr_offset_efer;
 149         return msr_efer_save_restore_bits(vmx->host_msrs[efer_offset]) !=
 150                 msr_efer_save_restore_bits(vmx->guest_msrs[efer_offset]);
 151 }
 152
 153 static inline int is_page_fault(u32 intr_info)
 154 {
 155         return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK |
 156                              INTR_INFO_VALID_MASK)) ==
 157                 (INTR_TYPE_EXCEPTION | PF_VECTOR | INTR_INFO_VALID_MASK);
 158 }
 159
 160 static inline int is_no_device(u32 intr_info)
 161 {
 162         return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK |
 163                              INTR_INFO_VALID_MASK)) ==
 164                 (INTR_TYPE_EXCEPTION | NM_VECTOR | INTR_INFO_VALID_MASK);
 165 }
 166
 167 static inline int is_external_interrupt(u32 intr_info)
 168 {
 169         return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VALID_MASK))
 170                 == (INTR_TYPE_EXT_INTR | INTR_INFO_VALID_MASK);
 171 }
 172
 173 static inline int cpu_has_vmx_tpr_shadow(void)
 174 {
 175         return (vmcs_config.cpu_based_exec_ctrl & CPU_BASED_TPR_SHADOW);
 176 }
 177
 178 static inline int vm_need_tpr_shadow(struct kvm *kvm)
 179 {
 180         return ((cpu_has_vmx_tpr_shadow()) && (irqchip_in_kernel(kvm)));
 181 }
 182
 183 static int __find_msr_index(struct vcpu_vmx *vmx, u32 msr)
 184 {
 185         int i;
 186
 187         for (i = 0; i < vmx->nmsrs; ++i)
 188                 if (vmx->guest_msrs[i].index == msr)
 189                         return i;
 190         return -1;
 191 }
 192
 193 static struct kvm_msr_entry *find_msr_entry(struct vcpu_vmx *vmx, u32 msr)
 194 {
 195         int i;
 196
 197         i = __find_msr_index(vmx, msr);
 198         if (i >= 0)
 199                 return &vmx->guest_msrs[i];
 200         return NULL;
 201 }
 202
 203 static void vmcs_clear(struct vmcs *vmcs)
 204 {
 205         u64 phys_addr = __pa(vmcs);
 206         u8 error;
 207
 208         asm volatile (ASM_VMX_VMCLEAR_RAX "; setna %0"
 209                       : "=g"(error) : "a"(&phys_addr), "m"(phys_addr)
 210                       : "cc", "memory");
 211         if (error)
 212                 printk(KERN_ERR "kvm: vmclear fail: %p/%llx\n",
 213                        vmcs, phys_addr);
 214 }
 215
 216 static void __vcpu_clear(void *arg)
 217 {
 218         struct vcpu_vmx *vmx = arg;
 219         int cpu = raw_smp_processor_id();
 220
 221         if (vmx->vcpu.cpu == cpu)
 222                 vmcs_clear(vmx->vmcs);
 223         if (per_cpu(current_vmcs, cpu) == vmx->vmcs)
 224                 per_cpu(current_vmcs, cpu) = NULL;
 225         rdtscll(vmx->vcpu.host_tsc);
 226 }
 227
 228 static void vcpu_clear(struct vcpu_vmx *vmx)
 229 {
 230         if (vmx->vcpu.cpu != raw_smp_processor_id() && vmx->vcpu.cpu != -1)
 231                 smp_call_function_single(vmx->vcpu.cpu, __vcpu_clear,
 232                                          vmx, 0, 1);
 233         else
 234                 __vcpu_clear(vmx);
 235         vmx->launched = 0;
 236 }
 237
 238 static unsigned long vmcs_readl(unsigned long field)
 239 {
 240         unsigned long value;
 241
 242         asm volatile (ASM_VMX_VMREAD_RDX_RAX
 243                       : "=a"(value) : "d"(field) : "cc");
 244         return value;
 245 }
 246
 247 static u16 vmcs_read16(unsigned long field)
 248 {
 249         return vmcs_readl(field);
 250 }
 251
 252 static u32 vmcs_read32(unsigned long field)
 253 {
 254         return vmcs_readl(field);
 255 }
 256
 257 static u64 vmcs_read64(unsigned long field)
 258 {
 259 #ifdef CONFIG_X86_64
 260         return vmcs_readl(field);
 261 #else
 262         return vmcs_readl(field) | ((u64)vmcs_readl(field+1) << 32);
 263 #endif
 264 }
 265
 266 static noinline void vmwrite_error(unsigned long field, unsigned long value)
 267 {
 268         printk(KERN_ERR "vmwrite error: reg %lx value %lx (err %d)\n",
 269                field, value, vmcs_read32(VM_INSTRUCTION_ERROR));
 270         dump_stack();
 271 }
 272
 273 static void vmcs_writel(unsigned long field, unsigned long value)
 274 {
 275         u8 error;
 276
 277         asm volatile (ASM_VMX_VMWRITE_RAX_RDX "; setna %0"
 278                        : "=q"(error) : "a"(value), "d"(field) : "cc" );
 279         if (unlikely(error))
 280                 vmwrite_error(field, value);
 281 }
 282
 283 static void vmcs_write16(unsigned long field, u16 value)
 284 {
 285         vmcs_writel(field, value);
 286 }
 287
 288 static void vmcs_write32(unsigned long field, u32 value)
 289 {
 290         vmcs_writel(field, value);
 291 }
 292
 293 static void vmcs_write64(unsigned long field, u64 value)
 294 {
 295 #ifdef CONFIG_X86_64
 296         vmcs_writel(field, value);
 297 #else
 298         vmcs_writel(field, value);
 299         asm volatile ("");
 300         vmcs_writel(field+1, value >> 32);
 301 #endif
 302 }
 303
 304 static void vmcs_clear_bits(unsigned long field, u32 mask)
 305 {
 306         vmcs_writel(field, vmcs_readl(field) & ~mask);
 307 }
 308
 309 static void vmcs_set_bits(unsigned long field, u32 mask)
 310 {
 311         vmcs_writel(field, vmcs_readl(field) | mask);
 312 }
 313
 314 static void update_exception_bitmap(struct kvm_vcpu *vcpu)
 315 {
 316         u32 eb;
 317
 318         eb = 1u << PF_VECTOR;
 319         if (!vcpu->fpu_active)
 320                 eb |= 1u << NM_VECTOR;
 321         if (vcpu->guest_debug.enabled)
 322                 eb |= 1u << 1;
 323         if (vcpu->rmode.active)
 324                 eb = ~0;
 325         vmcs_write32(EXCEPTION_BITMAP, eb);
 326 }
 327
 328 static void reload_tss(void)
 329 {
 330 #ifndef CONFIG_X86_64
 331
 332         /*
 333          * VT restores TR but not its size.  Useless.
 334          */
 335         struct descriptor_table gdt;
 336         struct segment_descriptor *descs;
 337
 338         get_gdt(&gdt);
 339         descs = (void *)gdt.base;
 340         descs[GDT_ENTRY_TSS].type = 9; /* available TSS */
 341         load_TR_desc();
 342 #endif
 343 }
 344
 345 static void load_transition_efer(struct vcpu_vmx *vmx)
 346 {
 347         u64 trans_efer;
 348         int efer_offset = vmx->msr_offset_efer;
 349
 350         trans_efer = vmx->host_msrs[efer_offset].data;
 351         trans_efer &= ~EFER_SAVE_RESTORE_BITS;
 352         trans_efer |= msr_efer_save_restore_bits(vmx->guest_msrs[efer_offset]);
 353         wrmsrl(MSR_EFER, trans_efer);
 354         vmx->vcpu.stat.efer_reload++;
 355 }
 356
 357 static void vmx_save_host_state(struct vcpu_vmx *vmx)
 358 {
 359         if (vmx->host_state.loaded)
 360                 return;
 361
 362         vmx->host_state.loaded = 1;
 363         /*
 364          * Set host fs and gs selectors.  Unfortunately, 22.2.3 does not
 365          * allow segment selectors with cpl > 0 or ti == 1.
 366          */
 367         vmx->host_state.ldt_sel = read_ldt();
 368         vmx->host_state.gs_ldt_reload_needed = vmx->host_state.ldt_sel;
 369         vmx->host_state.fs_sel = read_fs();
 370         if (!(vmx->host_state.fs_sel & 7)) {
 371                 vmcs_write16(HOST_FS_SELECTOR, vmx->host_state.fs_sel);
 372                 vmx->host_state.fs_reload_needed = 0;
 373         } else {
 374                 vmcs_write16(HOST_FS_SELECTOR, 0);
 375                 vmx->host_state.fs_reload_needed = 1;
 376         }
 377         vmx->host_state.gs_sel = read_gs();
 378         if (!(vmx->host_state.gs_sel & 7))
 379                 vmcs_write16(HOST_GS_SELECTOR, vmx->host_state.gs_sel);
 380         else {
 381                 vmcs_write16(HOST_GS_SELECTOR, 0);
 382                 vmx->host_state.gs_ldt_reload_needed = 1;
 383         }
 384
 385 #ifdef CONFIG_X86_64
 386         vmcs_writel(HOST_FS_BASE, read_msr(MSR_FS_BASE));
 387         vmcs_writel(HOST_GS_BASE, read_msr(MSR_GS_BASE));
 388 #else
 389         vmcs_writel(HOST_FS_BASE, segment_base(vmx->host_state.fs_sel));
 390         vmcs_writel(HOST_GS_BASE, segment_base(vmx->host_state.gs_sel));
 391 #endif
 392
 393 #ifdef CONFIG_X86_64
 394         if (is_long_mode(&vmx->vcpu)) {
 395                 save_msrs(vmx->host_msrs +
 396                           vmx->msr_offset_kernel_gs_base, 1);
 397         }
 398 #endif
 399         load_msrs(vmx->guest_msrs, vmx->save_nmsrs);
 400         if (msr_efer_need_save_restore(vmx))
 401                 load_transition_efer(vmx);
 402 }
 403
 404 static void vmx_load_host_state(struct vcpu_vmx *vmx)
 405 {
 406         unsigned long flags;
 407
 408         if (!vmx->host_state.loaded)
 409                 return;
 410
 411         vmx->host_state.loaded = 0;
 412         if (vmx->host_state.fs_reload_needed)
 413                 load_fs(vmx->host_state.fs_sel);
 414         if (vmx->host_state.gs_ldt_reload_needed) {
 415                 load_ldt(vmx->host_state.ldt_sel);
 416                 /*
 417                  * If we have to reload gs, we must take care to
 418                  * preserve our gs base.
 419                  */
 420                 local_irq_save(flags);
 421                 load_gs(vmx->host_state.gs_sel);
 422 #ifdef CONFIG_X86_64
 423                 wrmsrl(MSR_GS_BASE, vmcs_readl(HOST_GS_BASE));
 424 #endif
 425                 local_irq_restore(flags);
 426         }
 427         reload_tss();
 428         save_msrs(vmx->guest_msrs, vmx->save_nmsrs);
 429         load_msrs(vmx->host_msrs, vmx->save_nmsrs);
 430         if (msr_efer_need_save_restore(vmx))
 431                 load_msrs(vmx->host_msrs + vmx->msr_offset_efer, 1);
 432 }
 433
 434 /*
 435  * Switches to specified vcpu, until a matching vcpu_put(), but assumes
 436  * vcpu mutex is already taken.
 437  */
 438 static void vmx_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
 439 {
 440         struct vcpu_vmx *vmx = to_vmx(vcpu);
 441         u64 phys_addr = __pa(vmx->vmcs);
 442         u64 tsc_this, delta;
 443
 444         if (vcpu->cpu != cpu)
 445                 vcpu_clear(vmx);
 446
 447         if (per_cpu(current_vmcs, cpu) != vmx->vmcs) {
 448                 u8 error;
 449
 450                 per_cpu(current_vmcs, cpu) = vmx->vmcs;
 451                 asm volatile (ASM_VMX_VMPTRLD_RAX "; setna %0"
 452                               : "=g"(error) : "a"(&phys_addr), "m"(phys_addr)
 453                               : "cc");
 454                 if (error)
 455                         printk(KERN_ERR "kvm: vmptrld %p/%llx fail\n",
 456                                vmx->vmcs, phys_addr);
 457         }
 458
 459         if (vcpu->cpu != cpu) {
 460                 struct descriptor_table dt;
 461                 unsigned long sysenter_esp;
 462
 463                 vcpu->cpu = cpu;
 464                 /*
 465                  * Linux uses per-cpu TSS and GDT, so set these when switching
 466                  * processors.
 467                  */
 468                 vmcs_writel(HOST_TR_BASE, read_tr_base()); /* 22.2.4 */
 469                 get_gdt(&dt);
 470                 vmcs_writel(HOST_GDTR_BASE, dt.base);   /* 22.2.4 */
 471
 472                 rdmsrl(MSR_IA32_SYSENTER_ESP, sysenter_esp);
 473                 vmcs_writel(HOST_IA32_SYSENTER_ESP, sysenter_esp); /* 22.2.3 */
 474
 475                 /*
 476                  * Make sure the time stamp counter is monotonous.
 477                  */
 478                 rdtscll(tsc_this);
 479                 delta = vcpu->host_tsc - tsc_this;
 480                 vmcs_write64(TSC_OFFSET, vmcs_read64(TSC_OFFSET) + delta);
 481         }
 482 }
 483
 484 static void vmx_vcpu_put(struct kvm_vcpu *vcpu)
 485 {
 486         vmx_load_host_state(to_vmx(vcpu));
 487         kvm_put_guest_fpu(vcpu);
 488 }
 489
 490 static void vmx_fpu_activate(struct kvm_vcpu *vcpu)
 491 {
 492         if (vcpu->fpu_active)
 493                 return;
 494         vcpu->fpu_active = 1;
 495         vmcs_clear_bits(GUEST_CR0, X86_CR0_TS);
 496         if (vcpu->cr0 & X86_CR0_TS)
 497                 vmcs_set_bits(GUEST_CR0, X86_CR0_TS);
 498         update_exception_bitmap(vcpu);
 499 }
 500
 501 static void vmx_fpu_deactivate(struct kvm_vcpu *vcpu)
 502 {
 503         if (!vcpu->fpu_active)
 504                 return;
 505         vcpu->fpu_active = 0;
 506         vmcs_set_bits(GUEST_CR0, X86_CR0_TS);
 507         update_exception_bitmap(vcpu);
 508 }
 509
 510 static void vmx_vcpu_decache(struct kvm_vcpu *vcpu)
 511 {
 512         vcpu_clear(to_vmx(vcpu));
 513 }
 514
 515 static unsigned long vmx_get_rflags(struct kvm_vcpu *vcpu)
 516 {
 517         return vmcs_readl(GUEST_RFLAGS);
 518 }
 519
 520 static void vmx_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
 521 {
 522         vmcs_writel(GUEST_RFLAGS, rflags);
 523 }
 524
 525 static void skip_emulated_instruction(struct kvm_vcpu *vcpu)
 526 {
 527         unsigned long rip;
 528         u32 interruptibility;
 529
 530         rip = vmcs_readl(GUEST_RIP);
 531         rip += vmcs_read32(VM_EXIT_INSTRUCTION_LEN);
 532         vmcs_writel(GUEST_RIP, rip);
 533
 534         /*
 535          * We emulated an instruction, so temporary interrupt blocking
 536          * should be removed, if set.
 537          */
 538         interruptibility = vmcs_read32(GUEST_INTERRUPTIBILITY_INFO);
 539         if (interruptibility & 3)
 540                 vmcs_write32(GUEST_INTERRUPTIBILITY_INFO,
 541                              interruptibility & ~3);
 542         vcpu->interrupt_window_open = 1;
 543 }
 544
 545 static void vmx_inject_gp(struct kvm_vcpu *vcpu, unsigned error_code)
 546 {
 547         printk(KERN_DEBUG "inject_general_protection: rip 0x%lx\n",
 548                vmcs_readl(GUEST_RIP));
 549         vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE, error_code);
 550         vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
 551                      GP_VECTOR |
 552                      INTR_TYPE_EXCEPTION |
 553                      INTR_INFO_DELIEVER_CODE_MASK |
 554                      INTR_INFO_VALID_MASK);
 555 }
 556
 557 /*
 558  * Swap MSR entry in host/guest MSR entry array.
 559  */
 560 #ifdef CONFIG_X86_64
 561 static void move_msr_up(struct vcpu_vmx *vmx, int from, int to)
 562 {
 563         struct kvm_msr_entry tmp;
 564
 565         tmp = vmx->guest_msrs[to];
 566         vmx->guest_msrs[to] = vmx->guest_msrs[from];
 567         vmx->guest_msrs[from] = tmp;
 568         tmp = vmx->host_msrs[to];
 569         vmx->host_msrs[to] = vmx->host_msrs[from];
 570         vmx->host_msrs[from] = tmp;
 571 }
 572 #endif
 573
 574 /*
 575  * Set up the vmcs to automatically save and restore system
 576  * msrs.  Don't touch the 64-bit msrs if the guest is in legacy
 577  * mode, as fiddling with msrs is very expensive.
 578  */
 579 static void setup_msrs(struct vcpu_vmx *vmx)
 580 {
 581         int save_nmsrs;
 582
 583         save_nmsrs = 0;
 584 #ifdef CONFIG_X86_64
 585         if (is_long_mode(&vmx->vcpu)) {
 586                 int index;
 587
 588                 index = __find_msr_index(vmx, MSR_SYSCALL_MASK);
 589                 if (index >= 0)
 590                         move_msr_up(vmx, index, save_nmsrs++);
 591                 index = __find_msr_index(vmx, MSR_LSTAR);
 592                 if (index >= 0)
 593                         move_msr_up(vmx, index, save_nmsrs++);
 594                 index = __find_msr_index(vmx, MSR_CSTAR);
 595                 if (index >= 0)
 596                         move_msr_up(vmx, index, save_nmsrs++);
 597                 index = __find_msr_index(vmx, MSR_KERNEL_GS_BASE);
 598                 if (index >= 0)
 599                         move_msr_up(vmx, index, save_nmsrs++);
 600                 /*
 601                  * MSR_K6_STAR is only needed on long mode guests, and only
 602                  * if efer.sce is enabled.
 603                  */
 604                 index = __find_msr_index(vmx, MSR_K6_STAR);
 605                 if ((index >= 0) && (vmx->vcpu.shadow_efer & EFER_SCE))
 606                         move_msr_up(vmx, index, save_nmsrs++);
 607         }
 608 #endif
 609         vmx->save_nmsrs = save_nmsrs;
 610
 611 #ifdef CONFIG_X86_64
 612         vmx->msr_offset_kernel_gs_base =
 613                 __find_msr_index(vmx, MSR_KERNEL_GS_BASE);
 614 #endif
 615         vmx->msr_offset_efer = __find_msr_index(vmx, MSR_EFER);
 616 }
 617
 618 /*
 619  * reads and returns guest's timestamp counter "register"
 620  * guest_tsc = host_tsc + tsc_offset    -- 21.3
 621  */
 622 static u64 guest_read_tsc(void)
 623 {
 624         u64 host_tsc, tsc_offset;
 625
 626         rdtscll(host_tsc);
 627         tsc_offset = vmcs_read64(TSC_OFFSET);
 628         return host_tsc + tsc_offset;
 629 }
 630
 631 /*
 632  * writes 'guest_tsc' into guest's timestamp counter "register"
 633  * guest_tsc = host_tsc + tsc_offset ==> tsc_offset = guest_tsc - host_tsc
 634  */
 635 static void guest_write_tsc(u64 guest_tsc)
 636 {
 637         u64 host_tsc;
 638
 639         rdtscll(host_tsc);
 640         vmcs_write64(TSC_OFFSET, guest_tsc - host_tsc);
 641 }
 642
 643 /*
 644  * Reads an msr value (of 'msr_index') into 'pdata'.
 645  * Returns 0 on success, non-0 otherwise.
 646  * Assumes vcpu_load() was already called.
 647  */
 648 static int vmx_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
 649 {
 650         u64 data;
 651         struct kvm_msr_entry *msr;
 652
 653         if (!pdata) {
 654                 printk(KERN_ERR "BUG: get_msr called with NULL pdata\n");
 655                 return -EINVAL;
 656         }
 657
 658         switch (msr_index) {
 659 #ifdef CONFIG_X86_64
 660         case MSR_FS_BASE:
 661                 data = vmcs_readl(GUEST_FS_BASE);
 662                 break;
 663         case MSR_GS_BASE:
 664                 data = vmcs_readl(GUEST_GS_BASE);
 665                 break;
 666         case MSR_EFER:
 667                 return kvm_get_msr_common(vcpu, msr_index, pdata);
 668 #endif
 669         case MSR_IA32_TIME_STAMP_COUNTER:
 670                 data = guest_read_tsc();
 671                 break;
 672         case MSR_IA32_SYSENTER_CS:
 673                 data = vmcs_read32(GUEST_SYSENTER_CS);
 674                 break;
 675         case MSR_IA32_SYSENTER_EIP:
 676                 data = vmcs_readl(GUEST_SYSENTER_EIP);
 677                 break;
 678         case MSR_IA32_SYSENTER_ESP:
 679                 data = vmcs_readl(GUEST_SYSENTER_ESP);
 680                 break;
 681         default:
 682                 msr = find_msr_entry(to_vmx(vcpu), msr_index);
 683                 if (msr) {
 684                         data = msr->data;
 685                         break;
 686                 }
 687                 return kvm_get_msr_common(vcpu, msr_index, pdata);
 688         }
 689
 690         *pdata = data;
 691         return 0;
 692 }
 693
 694 /*
 695  * Writes msr value into into the appropriate "register".
 696  * Returns 0 on success, non-0 otherwise.
 697  * Assumes vcpu_load() was already called.
 698  */
 699 static int vmx_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
 700 {
 701         struct vcpu_vmx *vmx = to_vmx(vcpu);
 702         struct kvm_msr_entry *msr;
 703         int ret = 0;
 704
 705         switch (msr_index) {
 706 #ifdef CONFIG_X86_64
 707         case MSR_EFER:
 708                 ret = kvm_set_msr_common(vcpu, msr_index, data);
 709                 if (vmx->host_state.loaded)
 710                         load_transition_efer(vmx);
 711                 break;
 712         case MSR_FS_BASE:
 713                 vmcs_writel(GUEST_FS_BASE, data);
 714                 break;
 715         case MSR_GS_BASE:
 716                 vmcs_writel(GUEST_GS_BASE, data);
 717                 break;
 718 #endif
 719         case MSR_IA32_SYSENTER_CS:
 720                 vmcs_write32(GUEST_SYSENTER_CS, data);
 721                 break;
 722         case MSR_IA32_SYSENTER_EIP:
 723                 vmcs_writel(GUEST_SYSENTER_EIP, data);
 724                 break;
 725         case MSR_IA32_SYSENTER_ESP:
 726                 vmcs_writel(GUEST_SYSENTER_ESP, data);
 727                 break;
 728         case MSR_IA32_TIME_STAMP_COUNTER:
 729                 guest_write_tsc(data);
 730                 break;
 731         default:
 732                 msr = find_msr_entry(vmx, msr_index);
 733                 if (msr) {
 734                         msr->data = data;
 735                         if (vmx->host_state.loaded)
 736                                 load_msrs(vmx->guest_msrs, vmx->save_nmsrs);
 737                         break;
 738                 }
 739                 ret = kvm_set_msr_common(vcpu, msr_index, data);
 740         }
 741
 742         return ret;
 743 }
 744
 745 /*
 746  * Sync the rsp and rip registers into the vcpu structure.  This allows
 747  * registers to be accessed by indexing vcpu->regs.
 748  */
 749 static void vcpu_load_rsp_rip(struct kvm_vcpu *vcpu)
 750 {
 751         vcpu->regs[VCPU_REGS_RSP] = vmcs_readl(GUEST_RSP);
 752         vcpu->rip = vmcs_readl(GUEST_RIP);
 753 }
 754
 755 /*
 756  * Syncs rsp and rip back into the vmcs.  Should be called after possible
 757  * modification.
 758  */
 759 static void vcpu_put_rsp_rip(struct kvm_vcpu *vcpu)
 760 {
 761         vmcs_writel(GUEST_RSP, vcpu->regs[VCPU_REGS_RSP]);
 762         vmcs_writel(GUEST_RIP, vcpu->rip);
 763 }
 764
 765 static int set_guest_debug(struct kvm_vcpu *vcpu, struct kvm_debug_guest *dbg)
 766 {
 767         unsigned long dr7 = 0x400;
 768         int old_singlestep;
 769
 770         old_singlestep = vcpu->guest_debug.singlestep;
 771
 772         vcpu->guest_debug.enabled = dbg->enabled;
 773         if (vcpu->guest_debug.enabled) {
 774                 int i;
 775
 776                 dr7 |= 0x200;  /* exact */
 777                 for (i = 0; i < 4; ++i) {
 778                         if (!dbg->breakpoints[i].enabled)
 779                                 continue;
 780                         vcpu->guest_debug.bp[i] = dbg->breakpoints[i].address;
 781                         dr7 |= 2 << (i*2);    /* global enable */
 782                         dr7 |= 0 << (i*4+16); /* execution breakpoint */
 783                 }
 784
 785                 vcpu->guest_debug.singlestep = dbg->singlestep;
 786         } else
 787                 vcpu->guest_debug.singlestep = 0;
 788
 789         if (old_singlestep && !vcpu->guest_debug.singlestep) {
 790                 unsigned long flags;
 791
 792                 flags = vmcs_readl(GUEST_RFLAGS);
 793                 flags &= ~(X86_EFLAGS_TF | X86_EFLAGS_RF);
 794                 vmcs_writel(GUEST_RFLAGS, flags);
 795         }
 796
 797         update_exception_bitmap(vcpu);
 798         vmcs_writel(GUEST_DR7, dr7);
 799
 800         return 0;
 801 }
 802
 803 static int vmx_get_irq(struct kvm_vcpu *vcpu)
 804 {
 805         u32 idtv_info_field;
 806
 807         idtv_info_field = vmcs_read32(IDT_VECTORING_INFO_FIELD);
 808         if (idtv_info_field & INTR_INFO_VALID_MASK) {
 809                 if (is_external_interrupt(idtv_info_field))
 810                         return idtv_info_field & VECTORING_INFO_VECTOR_MASK;
 811                 else
 812                         printk("pending exception: not handled yet\n");
 813         }
 814         return -1;
 815 }
 816
 817 static __init int cpu_has_kvm_support(void)
 818 {
 819         unsigned long ecx = cpuid_ecx(1);
 820         return test_bit(5, &ecx); /* CPUID.1:ECX.VMX[bit 5] -> VT */
 821 }
 822
 823 static __init int vmx_disabled_by_bios(void)
 824 {
 825         u64 msr;
 826
 827         rdmsrl(MSR_IA32_FEATURE_CONTROL, msr);
 828         return (msr & (MSR_IA32_FEATURE_CONTROL_LOCKED |
 829                        MSR_IA32_FEATURE_CONTROL_VMXON_ENABLED))
 830             == MSR_IA32_FEATURE_CONTROL_LOCKED;
 831         /* locked but not enabled */
 832 }
 833
 834 static void hardware_enable(void *garbage)
 835 {
 836         int cpu = raw_smp_processor_id();
 837         u64 phys_addr = __pa(per_cpu(vmxarea, cpu));
 838         u64 old;
 839
 840         rdmsrl(MSR_IA32_FEATURE_CONTROL, old);
 841         if ((old & (MSR_IA32_FEATURE_CONTROL_LOCKED |
 842                     MSR_IA32_FEATURE_CONTROL_VMXON_ENABLED))
 843             != (MSR_IA32_FEATURE_CONTROL_LOCKED |
 844                 MSR_IA32_FEATURE_CONTROL_VMXON_ENABLED))
 845                 /* enable and lock */
 846                 wrmsrl(MSR_IA32_FEATURE_CONTROL, old |
 847                        MSR_IA32_FEATURE_CONTROL_LOCKED |
 848                        MSR_IA32_FEATURE_CONTROL_VMXON_ENABLED);
 849         write_cr4(read_cr4() | X86_CR4_VMXE); /* FIXME: not cpu hotplug safe */
 850         asm volatile (ASM_VMX_VMXON_RAX : : "a"(&phys_addr), "m"(phys_addr)
 851                       : "memory", "cc");
 852 }
 853
 854 static void hardware_disable(void *garbage)
 855 {
 856         asm volatile (ASM_VMX_VMXOFF : : : "cc");
 857 }
 858
 859 static __init int adjust_vmx_controls(u32 ctl_min, u32 ctl_opt,
 860                                       u32 msr, u32* result)
 861 {
 862         u32 vmx_msr_low, vmx_msr_high;
 863         u32 ctl = ctl_min | ctl_opt;
 864
 865         rdmsr(msr, vmx_msr_low, vmx_msr_high);
 866
 867         ctl &= vmx_msr_high; /* bit == 0 in high word ==> must be zero */
 868         ctl |= vmx_msr_low;  /* bit == 1 in low word  ==> must be one  */
 869
 870         /* Ensure minimum (required) set of control bits are supported. */
 871         if (ctl_min & ~ctl)
 872                 return -EIO;
 873
 874         *result = ctl;
 875         return 0;
 876 }
 877
 878 static __init int setup_vmcs_config(struct vmcs_config *vmcs_conf)
 879 {
 880         u32 vmx_msr_low, vmx_msr_high;
 881         u32 min, opt;
 882         u32 _pin_based_exec_control = 0;
 883         u32 _cpu_based_exec_control = 0;
 884         u32 _vmexit_control = 0;
 885         u32 _vmentry_control = 0;
 886
 887         min = PIN_BASED_EXT_INTR_MASK | PIN_BASED_NMI_EXITING;
 888         opt = 0;
 889         if (adjust_vmx_controls(min, opt, MSR_IA32_VMX_PINBASED_CTLS,
 890                                 &_pin_based_exec_control) < 0)
 891                 return -EIO;
 892
 893         min = CPU_BASED_HLT_EXITING |
 894 #ifdef CONFIG_X86_64
 895               CPU_BASED_CR8_LOAD_EXITING |
 896               CPU_BASED_CR8_STORE_EXITING |
 897 #endif
 898               CPU_BASED_USE_IO_BITMAPS |
 899               CPU_BASED_MOV_DR_EXITING |
 900               CPU_BASED_USE_TSC_OFFSETING;
 901 #ifdef CONFIG_X86_64
 902         opt = CPU_BASED_TPR_SHADOW;
 903 #else
 904         opt = 0;
 905 #endif
 906         if (adjust_vmx_controls(min, opt, MSR_IA32_VMX_PROCBASED_CTLS,
 907                                 &_cpu_based_exec_control) < 0)
 908                 return -EIO;
 909 #ifdef CONFIG_X86_64
 910         if ((_cpu_based_exec_control & CPU_BASED_TPR_SHADOW))
 911                 _cpu_based_exec_control &= ~CPU_BASED_CR8_LOAD_EXITING &
 912                                            ~CPU_BASED_CR8_STORE_EXITING;
 913 #endif
 914
 915         min = 0;
 916 #ifdef CONFIG_X86_64
 917         min |= VM_EXIT_HOST_ADDR_SPACE_SIZE;
 918 #endif
 919         opt = 0;
 920         if (adjust_vmx_controls(min, opt, MSR_IA32_VMX_EXIT_CTLS,
 921                                 &_vmexit_control) < 0)
 922                 return -EIO;
 923
 924         min = opt = 0;
 925         if (adjust_vmx_controls(min, opt, MSR_IA32_VMX_ENTRY_CTLS,
 926                                 &_vmentry_control) < 0)
 927                 return -EIO;
 928
 929         rdmsr(MSR_IA32_VMX_BASIC, vmx_msr_low, vmx_msr_high);
 930
 931         /* IA-32 SDM Vol 3B: VMCS size is never greater than 4kB. */
 932         if ((vmx_msr_high & 0x1fff) > PAGE_SIZE)
 933                 return -EIO;
 934
 935 #ifdef CONFIG_X86_64
 936         /* IA-32 SDM Vol 3B: 64-bit CPUs always have VMX_BASIC_MSR[48]==0. */
 937         if (vmx_msr_high & (1u<<16))
 938                 return -EIO;
 939 #endif
 940
 941         /* Require Write-Back (WB) memory type for VMCS accesses. */
 942         if (((vmx_msr_high >> 18) & 15) != 6)
 943                 return -EIO;
 944
 945         vmcs_conf->size = vmx_msr_high & 0x1fff;
 946         vmcs_conf->order = get_order(vmcs_config.size);
 947         vmcs_conf->revision_id = vmx_msr_low;
 948
 949         vmcs_conf->pin_based_exec_ctrl = _pin_based_exec_control;
 950         vmcs_conf->cpu_based_exec_ctrl = _cpu_based_exec_control;
 951         vmcs_conf->vmexit_ctrl         = _vmexit_control;
 952         vmcs_conf->vmentry_ctrl        = _vmentry_control;
 953
 954         return 0;
 955 }
 956
 957 static struct vmcs *alloc_vmcs_cpu(int cpu)
 958 {
 959         int node = cpu_to_node(cpu);
 960         struct page *pages;
 961         struct vmcs *vmcs;
 962
 963         pages = alloc_pages_node(node, GFP_KERNEL, vmcs_config.order);
 964         if (!pages)
 965                 return NULL;
 966         vmcs = page_address(pages);
 967         memset(vmcs, 0, vmcs_config.size);
 968         vmcs->revision_id = vmcs_config.revision_id; /* vmcs revision id */
 969         return vmcs;
 970 }
 971
 972 static struct vmcs *alloc_vmcs(void)
 973 {
 974         return alloc_vmcs_cpu(raw_smp_processor_id());
 975 }
 976
 977 static void free_vmcs(struct vmcs *vmcs)
 978 {
 979         free_pages((unsigned long)vmcs, vmcs_config.order);
 980 }
 981
 982 static void free_kvm_area(void)
 983 {
 984         int cpu;
 985
 986         for_each_online_cpu(cpu)
 987                 free_vmcs(per_cpu(vmxarea, cpu));
 988 }
 989
 990 static __init int alloc_kvm_area(void)
 991 {
 992         int cpu;
 993
 994         for_each_online_cpu(cpu) {
 995                 struct vmcs *vmcs;
 996
 997                 vmcs = alloc_vmcs_cpu(cpu);
 998                 if (!vmcs) {
 999                         free_kvm_area();
1000                         return -ENOMEM;
1001                 }
1002
1003                 per_cpu(vmxarea, cpu) = vmcs;
1004         }
1005         return 0;
1006 }
1007
1008 static __init int hardware_setup(void)
1009 {
1010         if (setup_vmcs_config(&vmcs_config) < 0)
1011                 return -EIO;
1012         return alloc_kvm_area();
1013 }
1014
1015 static __exit void hardware_unsetup(void)
1016 {
1017         free_kvm_area();
1018 }
1019
1020 static void fix_pmode_dataseg(int seg, struct kvm_save_segment *save)
1021 {
1022         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
1023
1024         if (vmcs_readl(sf->base) == save->base && (save->base & AR_S_MASK)) {
1025                 vmcs_write16(sf->selector, save->selector);
1026                 vmcs_writel(sf->base, save->base);
1027                 vmcs_write32(sf->limit, save->limit);
1028                 vmcs_write32(sf->ar_bytes, save->ar);
1029         } else {
1030                 u32 dpl = (vmcs_read16(sf->selector) & SELECTOR_RPL_MASK)
1031                         << AR_DPL_SHIFT;
1032                 vmcs_write32(sf->ar_bytes, 0x93 | dpl);
1033         }
1034 }
1035
1036 static void enter_pmode(struct kvm_vcpu *vcpu)
1037 {
1038         unsigned long flags;
1039
1040         vcpu->rmode.active = 0;
1041
1042         vmcs_writel(GUEST_TR_BASE, vcpu->rmode.tr.base);
1043         vmcs_write32(GUEST_TR_LIMIT, vcpu->rmode.tr.limit);
1044         vmcs_write32(GUEST_TR_AR_BYTES, vcpu->rmode.tr.ar);
1045
1046         flags = vmcs_readl(GUEST_RFLAGS);
1047         flags &= ~(IOPL_MASK | X86_EFLAGS_VM);
1048         flags |= (vcpu->rmode.save_iopl << IOPL_SHIFT);
1049         vmcs_writel(GUEST_RFLAGS, flags);
1050
1051         vmcs_writel(GUEST_CR4, (vmcs_readl(GUEST_CR4) & ~X86_CR4_VME) |
1052                         (vmcs_readl(CR4_READ_SHADOW) & X86_CR4_VME));
1053
1054         update_exception_bitmap(vcpu);
1055
1056         fix_pmode_dataseg(VCPU_SREG_ES, &vcpu->rmode.es);
1057         fix_pmode_dataseg(VCPU_SREG_DS, &vcpu->rmode.ds);
1058         fix_pmode_dataseg(VCPU_SREG_GS, &vcpu->rmode.gs);
1059         fix_pmode_dataseg(VCPU_SREG_FS, &vcpu->rmode.fs);
1060
1061         vmcs_write16(GUEST_SS_SELECTOR, 0);
1062         vmcs_write32(GUEST_SS_AR_BYTES, 0x93);
1063
1064         vmcs_write16(GUEST_CS_SELECTOR,
1065                      vmcs_read16(GUEST_CS_SELECTOR) & ~SELECTOR_RPL_MASK);
1066         vmcs_write32(GUEST_CS_AR_BYTES, 0x9b);
1067 }
1068
1069 static gva_t rmode_tss_base(struct kvm* kvm)
1070 {
1071         gfn_t base_gfn = kvm->memslots[0].base_gfn + kvm->memslots[0].npages - 3;
1072         return base_gfn << PAGE_SHIFT;
1073 }
1074
1075 static void fix_rmode_seg(int seg, struct kvm_save_segment *save)
1076 {
1077         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
1078
1079         save->selector = vmcs_read16(sf->selector);
1080         save->base = vmcs_readl(sf->base);
1081         save->limit = vmcs_read32(sf->limit);
1082         save->ar = vmcs_read32(sf->ar_bytes);
1083         vmcs_write16(sf->selector, vmcs_readl(sf->base) >> 4);
1084         vmcs_write32(sf->limit, 0xffff);
1085         vmcs_write32(sf->ar_bytes, 0xf3);
1086 }
1087
1088 static void enter_rmode(struct kvm_vcpu *vcpu)
1089 {
1090         unsigned long flags;
1091
1092         vcpu->rmode.active = 1;
1093
1094         vcpu->rmode.tr.base = vmcs_readl(GUEST_TR_BASE);
1095         vmcs_writel(GUEST_TR_BASE, rmode_tss_base(vcpu->kvm));
1096
1097         vcpu->rmode.tr.limit = vmcs_read32(GUEST_TR_LIMIT);
1098         vmcs_write32(GUEST_TR_LIMIT, RMODE_TSS_SIZE - 1);
1099
1100         vcpu->rmode.tr.ar = vmcs_read32(GUEST_TR_AR_BYTES);
1101         vmcs_write32(GUEST_TR_AR_BYTES, 0x008b);
1102
1103         flags = vmcs_readl(GUEST_RFLAGS);
1104         vcpu->rmode.save_iopl = (flags & IOPL_MASK) >> IOPL_SHIFT;
1105
1106         flags |= IOPL_MASK | X86_EFLAGS_VM;
1107
1108         vmcs_writel(GUEST_RFLAGS, flags);
1109         vmcs_writel(GUEST_CR4, vmcs_readl(GUEST_CR4) | X86_CR4_VME);
1110         update_exception_bitmap(vcpu);
1111
1112         vmcs_write16(GUEST_SS_SELECTOR, vmcs_readl(GUEST_SS_BASE) >> 4);
1113         vmcs_write32(GUEST_SS_LIMIT, 0xffff);
1114         vmcs_write32(GUEST_SS_AR_BYTES, 0xf3);
1115
1116         vmcs_write32(GUEST_CS_AR_BYTES, 0xf3);
1117         vmcs_write32(GUEST_CS_LIMIT, 0xffff);
1118         if (vmcs_readl(GUEST_CS_BASE) == 0xffff0000)
1119                 vmcs_writel(GUEST_CS_BASE, 0xf0000);
1120         vmcs_write16(GUEST_CS_SELECTOR, vmcs_readl(GUEST_CS_BASE) >> 4);
1121
1122         fix_rmode_seg(VCPU_SREG_ES, &vcpu->rmode.es);
1123         fix_rmode_seg(VCPU_SREG_DS, &vcpu->rmode.ds);
1124         fix_rmode_seg(VCPU_SREG_GS, &vcpu->rmode.gs);
1125         fix_rmode_seg(VCPU_SREG_FS, &vcpu->rmode.fs);
1126
1127         init_rmode_tss(vcpu->kvm);
1128 }
1129
1130 #ifdef CONFIG_X86_64
1131
1132 static void enter_lmode(struct kvm_vcpu *vcpu)
1133 {
1134         u32 guest_tr_ar;
1135
1136         guest_tr_ar = vmcs_read32(GUEST_TR_AR_BYTES);
1137         if ((guest_tr_ar & AR_TYPE_MASK) != AR_TYPE_BUSY_64_TSS) {
1138                 printk(KERN_DEBUG "%s: tss fixup for long mode. \n",
1139                        __FUNCTION__);
1140                 vmcs_write32(GUEST_TR_AR_BYTES,
1141                              (guest_tr_ar & ~AR_TYPE_MASK)
1142                              | AR_TYPE_BUSY_64_TSS);
1143         }
1144
1145         vcpu->shadow_efer |= EFER_LMA;
1146
1147         find_msr_entry(to_vmx(vcpu), MSR_EFER)->data |= EFER_LMA | EFER_LME;
1148         vmcs_write32(VM_ENTRY_CONTROLS,
1149                      vmcs_read32(VM_ENTRY_CONTROLS)
1150                      | VM_ENTRY_IA32E_MODE);
1151 }
1152
1153 static void exit_lmode(struct kvm_vcpu *vcpu)
1154 {
1155         vcpu->shadow_efer &= ~EFER_LMA;
1156
1157         vmcs_write32(VM_ENTRY_CONTROLS,
1158                      vmcs_read32(VM_ENTRY_CONTROLS)
1159                      & ~VM_ENTRY_IA32E_MODE);
1160 }
1161
1162 #endif
1163
1164 static void vmx_decache_cr4_guest_bits(struct kvm_vcpu *vcpu)
1165 {
1166         vcpu->cr4 &= KVM_GUEST_CR4_MASK;
1167         vcpu->cr4 |= vmcs_readl(GUEST_CR4) & ~KVM_GUEST_CR4_MASK;
1168 }
1169
1170 static void vmx_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
1171 {
1172         vmx_fpu_deactivate(vcpu);
1173
1174         if (vcpu->rmode.active && (cr0 & X86_CR0_PE))
1175                 enter_pmode(vcpu);
1176
1177         if (!vcpu->rmode.active && !(cr0 & X86_CR0_PE))
1178                 enter_rmode(vcpu);
1179
1180 #ifdef CONFIG_X86_64
1181         if (vcpu->shadow_efer & EFER_LME) {
1182                 if (!is_paging(vcpu) && (cr0 & X86_CR0_PG))
1183                         enter_lmode(vcpu);
1184                 if (is_paging(vcpu) && !(cr0 & X86_CR0_PG))
1185                         exit_lmode(vcpu);
1186         }
1187 #endif
1188
1189         vmcs_writel(CR0_READ_SHADOW, cr0);
1190         vmcs_writel(GUEST_CR0,
1191                     (cr0 & ~KVM_GUEST_CR0_MASK) | KVM_VM_CR0_ALWAYS_ON);
1192         vcpu->cr0 = cr0;
1193
1194         if (!(cr0 & X86_CR0_TS) || !(cr0 & X86_CR0_PE))
1195                 vmx_fpu_activate(vcpu);
1196 }
1197
1198 static void vmx_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
1199 {
1200         vmcs_writel(GUEST_CR3, cr3);
1201         if (vcpu->cr0 & X86_CR0_PE)
1202                 vmx_fpu_deactivate(vcpu);
1203 }
1204
1205 static void vmx_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
1206 {
1207         vmcs_writel(CR4_READ_SHADOW, cr4);
1208         vmcs_writel(GUEST_CR4, cr4 | (vcpu->rmode.active ?
1209                     KVM_RMODE_VM_CR4_ALWAYS_ON : KVM_PMODE_VM_CR4_ALWAYS_ON));
1210         vcpu->cr4 = cr4;
1211 }
1212
1213 #ifdef CONFIG_X86_64
1214
1215 static void vmx_set_efer(struct kvm_vcpu *vcpu, u64 efer)
1216 {
1217         struct vcpu_vmx *vmx = to_vmx(vcpu);
1218         struct kvm_msr_entry *msr = find_msr_entry(vmx, MSR_EFER);
1219
1220         vcpu->shadow_efer = efer;
1221         if (efer & EFER_LMA) {
1222                 vmcs_write32(VM_ENTRY_CONTROLS,
1223                                      vmcs_read32(VM_ENTRY_CONTROLS) |
1224                                      VM_ENTRY_IA32E_MODE);
1225                 msr->data = efer;
1226
1227         } else {
1228                 vmcs_write32(VM_ENTRY_CONTROLS,
1229                                      vmcs_read32(VM_ENTRY_CONTROLS) &
1230                                      ~VM_ENTRY_IA32E_MODE);
1231
1232                 msr->data = efer & ~EFER_LME;
1233         }
1234         setup_msrs(vmx);
1235 }
1236
1237 #endif
1238
1239 static u64 vmx_get_segment_base(struct kvm_vcpu *vcpu, int seg)
1240 {
1241         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
1242
1243         return vmcs_readl(sf->base);
1244 }
1245
1246 static void vmx_get_segment(struct kvm_vcpu *vcpu,
1247                             struct kvm_segment *var, int seg)
1248 {
1249         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
1250         u32 ar;
1251
1252         var->base = vmcs_readl(sf->base);
1253         var->limit = vmcs_read32(sf->limit);
1254         var->selector = vmcs_read16(sf->selector);
1255         ar = vmcs_read32(sf->ar_bytes);
1256         if (ar & AR_UNUSABLE_MASK)
1257                 ar = 0;
1258         var->type = ar & 15;
1259         var->s = (ar >> 4) & 1;
1260         var->dpl = (ar >> 5) & 3;
1261         var->present = (ar >> 7) & 1;
1262         var->avl = (ar >> 12) & 1;
1263         var->l = (ar >> 13) & 1;
1264         var->db = (ar >> 14) & 1;
1265         var->g = (ar >> 15) & 1;
1266         var->unusable = (ar >> 16) & 1;
1267 }
1268
1269 static u32 vmx_segment_access_rights(struct kvm_segment *var)
1270 {
1271         u32 ar;
1272
1273         if (var->unusable)
1274                 ar = 1 << 16;
1275         else {
1276                 ar = var->type & 15;
1277                 ar |= (var->s & 1) << 4;
1278                 ar |= (var->dpl & 3) << 5;
1279                 ar |= (var->present & 1) << 7;
1280                 ar |= (var->avl & 1) << 12;
1281                 ar |= (var->l & 1) << 13;
1282                 ar |= (var->db & 1) << 14;
1283                 ar |= (var->g & 1) << 15;
1284         }
1285         if (ar == 0) /* a 0 value means unusable */
1286                 ar = AR_UNUSABLE_MASK;
1287
1288         return ar;
1289 }
1290
1291 static void vmx_set_segment(struct kvm_vcpu *vcpu,
1292                             struct kvm_segment *var, int seg)
1293 {
1294         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
1295         u32 ar;
1296
1297         if (vcpu->rmode.active && seg == VCPU_SREG_TR) {
1298                 vcpu->rmode.tr.selector = var->selector;
1299                 vcpu->rmode.tr.base = var->base;
1300                 vcpu->rmode.tr.limit = var->limit;
1301                 vcpu->rmode.tr.ar = vmx_segment_access_rights(var);
1302                 return;
1303         }
1304         vmcs_writel(sf->base, var->base);
1305         vmcs_write32(sf->limit, var->limit);
1306         vmcs_write16(sf->selector, var->selector);
1307         if (vcpu->rmode.active && var->s) {
1308                 /*
1309                  * Hack real-mode segments into vm86 compatibility.
1310                  */
1311                 if (var->base == 0xffff0000 && var->selector == 0xf000)
1312                         vmcs_writel(sf->base, 0xf0000);
1313                 ar = 0xf3;
1314         } else
1315                 ar = vmx_segment_access_rights(var);
1316         vmcs_write32(sf->ar_bytes, ar);
1317 }
1318
1319 static void vmx_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
1320 {
1321         u32 ar = vmcs_read32(GUEST_CS_AR_BYTES);
1322
1323         *db = (ar >> 14) & 1;
1324         *l = (ar >> 13) & 1;
1325 }
1326
1327 static void vmx_get_idt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
1328 {
1329         dt->limit = vmcs_read32(GUEST_IDTR_LIMIT);
1330         dt->base = vmcs_readl(GUEST_IDTR_BASE);
1331 }
1332
1333 static void vmx_set_idt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
1334 {
1335         vmcs_write32(GUEST_IDTR_LIMIT, dt->limit);
1336         vmcs_writel(GUEST_IDTR_BASE, dt->base);
1337 }
1338
1339 static void vmx_get_gdt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
1340 {
1341         dt->limit = vmcs_read32(GUEST_GDTR_LIMIT);
1342         dt->base = vmcs_readl(GUEST_GDTR_BASE);
1343 }
1344
1345 static void vmx_set_gdt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
1346 {
1347         vmcs_write32(GUEST_GDTR_LIMIT, dt->limit);
1348         vmcs_writel(GUEST_GDTR_BASE, dt->base);
1349 }
1350
1351 static int init_rmode_tss(struct kvm* kvm)
1352 {
1353         struct page *p1, *p2, *p3;
1354         gfn_t fn = rmode_tss_base(kvm) >> PAGE_SHIFT;
1355         char *page;
1356
1357         p1 = gfn_to_page(kvm, fn++);
1358         p2 = gfn_to_page(kvm, fn++);
1359         p3 = gfn_to_page(kvm, fn);
1360
1361         if (!p1 || !p2 || !p3) {
1362                 kvm_printf(kvm,"%s: gfn_to_page failed\n", __FUNCTION__);
1363                 return 0;
1364         }
1365
1366         page = kmap_atomic(p1, KM_USER0);
1367         clear_page(page);
1368         *(u16*)(page + 0x66) = TSS_BASE_SIZE + TSS_REDIRECTION_SIZE;
1369         kunmap_atomic(page, KM_USER0);
1370
1371         page = kmap_atomic(p2, KM_USER0);
1372         clear_page(page);
1373         kunmap_atomic(page, KM_USER0);
1374
1375         page = kmap_atomic(p3, KM_USER0);
1376         clear_page(page);
1377         *(page + RMODE_TSS_SIZE - 2 * PAGE_SIZE - 1) = ~0;
1378         kunmap_atomic(page, KM_USER0);
1379
1380         return 1;
1381 }
1382
1383 static void seg_setup(int seg)
1384 {
1385         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
1386
1387         vmcs_write16(sf->selector, 0);
1388         vmcs_writel(sf->base, 0);
1389         vmcs_write32(sf->limit, 0xffff);
1390         vmcs_write32(sf->ar_bytes, 0x93);
1391 }
1392
1393 /*
1394  * Sets up the vmcs for emulated real mode.
1395  */
1396 static int vmx_vcpu_setup(struct vcpu_vmx *vmx)
1397 {
1398         u32 host_sysenter_cs;
1399         u32 junk;
1400         unsigned long a;
1401         struct descriptor_table dt;
1402         int i;
1403         int ret = 0;
1404         unsigned long kvm_vmx_return;
1405         u64 msr;
1406         u32 exec_control;
1407
1408         if (!init_rmode_tss(vmx->vcpu.kvm)) {
1409                 ret = -ENOMEM;
1410                 goto out;
1411         }
1412
1413         vmx->vcpu.regs[VCPU_REGS_RDX] = get_rdx_init_val();
1414         set_cr8(&vmx->vcpu, 0);
1415         msr = 0xfee00000 | MSR_IA32_APICBASE_ENABLE;
1416         if (vmx->vcpu.vcpu_id == 0)
1417                 msr |= MSR_IA32_APICBASE_BSP;
1418         kvm_set_apic_base(&vmx->vcpu, msr);
1419
1420         fx_init(&vmx->vcpu);
1421
1422         /*
1423          * GUEST_CS_BASE should really be 0xffff0000, but VT vm86 mode
1424          * insists on having GUEST_CS_BASE == GUEST_CS_SELECTOR << 4.  Sigh.
1425          */
1426         vmcs_write16(GUEST_CS_SELECTOR, 0xf000);
1427         vmcs_writel(GUEST_CS_BASE, 0x000f0000);
1428         vmcs_write32(GUEST_CS_LIMIT, 0xffff);
1429         vmcs_write32(GUEST_CS_AR_BYTES, 0x9b);
1430
1431         seg_setup(VCPU_SREG_DS);
1432         seg_setup(VCPU_SREG_ES);
1433         seg_setup(VCPU_SREG_FS);
1434         seg_setup(VCPU_SREG_GS);
1435         seg_setup(VCPU_SREG_SS);
1436
1437         vmcs_write16(GUEST_TR_SELECTOR, 0);
1438         vmcs_writel(GUEST_TR_BASE, 0);
1439         vmcs_write32(GUEST_TR_LIMIT, 0xffff);
1440         vmcs_write32(GUEST_TR_AR_BYTES, 0x008b);
1441
1442         vmcs_write16(GUEST_LDTR_SELECTOR, 0);
1443         vmcs_writel(GUEST_LDTR_BASE, 0);
1444         vmcs_write32(GUEST_LDTR_LIMIT, 0xffff);
1445         vmcs_write32(GUEST_LDTR_AR_BYTES, 0x00082);
1446
1447         vmcs_write32(GUEST_SYSENTER_CS, 0);
1448         vmcs_writel(GUEST_SYSENTER_ESP, 0);
1449         vmcs_writel(GUEST_SYSENTER_EIP, 0);
1450
1451         vmcs_writel(GUEST_RFLAGS, 0x02);
1452         vmcs_writel(GUEST_RIP, 0xfff0);
1453         vmcs_writel(GUEST_RSP, 0);
1454
1455         //todo: dr0 = dr1 = dr2 = dr3 = 0; dr6 = 0xffff0ff0
1456         vmcs_writel(GUEST_DR7, 0x400);
1457
1458         vmcs_writel(GUEST_GDTR_BASE, 0);
1459         vmcs_write32(GUEST_GDTR_LIMIT, 0xffff);
1460
1461         vmcs_writel(GUEST_IDTR_BASE, 0);
1462         vmcs_write32(GUEST_IDTR_LIMIT, 0xffff);
1463
1464         vmcs_write32(GUEST_ACTIVITY_STATE, 0);
1465         vmcs_write32(GUEST_INTERRUPTIBILITY_INFO, 0);
1466         vmcs_write32(GUEST_PENDING_DBG_EXCEPTIONS, 0);
1467
1468         /* I/O */
1469         vmcs_write64(IO_BITMAP_A, page_to_phys(vmx_io_bitmap_a));
1470         vmcs_write64(IO_BITMAP_B, page_to_phys(vmx_io_bitmap_b));
1471
1472         guest_write_tsc(0);
1473
1474         vmcs_write64(VMCS_LINK_POINTER, -1ull); /* 22.3.1.5 */
1475
1476         /* Special registers */
1477         vmcs_write64(GUEST_IA32_DEBUGCTL, 0);
1478
1479         /* Control */
1480         vmcs_write32(PIN_BASED_VM_EXEC_CONTROL,
1481                 vmcs_config.pin_based_exec_ctrl);
1482
1483         exec_control = vmcs_config.cpu_based_exec_ctrl;
1484         if (!vm_need_tpr_shadow(vmx->vcpu.kvm)) {
1485                 exec_control &= ~CPU_BASED_TPR_SHADOW;
1486 #ifdef CONFIG_X86_64
1487                 exec_control |= CPU_BASED_CR8_STORE_EXITING |
1488                                 CPU_BASED_CR8_LOAD_EXITING;
1489 #endif
1490         }
1491         vmcs_write32(CPU_BASED_VM_EXEC_CONTROL, exec_control);
1492
1493         vmcs_write32(PAGE_FAULT_ERROR_CODE_MASK, 0);
1494         vmcs_write32(PAGE_FAULT_ERROR_CODE_MATCH, 0);
1495         vmcs_write32(CR3_TARGET_COUNT, 0);           /* 22.2.1 */
1496
1497         vmcs_writel(HOST_CR0, read_cr0());  /* 22.2.3 */
1498         vmcs_writel(HOST_CR4, read_cr4());  /* 22.2.3, 22.2.5 */
1499         vmcs_writel(HOST_CR3, read_cr3());  /* 22.2.3  FIXME: shadow tables */
1500
1501         vmcs_write16(HOST_CS_SELECTOR, __KERNEL_CS);  /* 22.2.4 */
1502         vmcs_write16(HOST_DS_SELECTOR, __KERNEL_DS);  /* 22.2.4 */
1503         vmcs_write16(HOST_ES_SELECTOR, __KERNEL_DS);  /* 22.2.4 */
1504         vmcs_write16(HOST_FS_SELECTOR, read_fs());    /* 22.2.4 */
1505         vmcs_write16(HOST_GS_SELECTOR, read_gs());    /* 22.2.4 */
1506         vmcs_write16(HOST_SS_SELECTOR, __KERNEL_DS);  /* 22.2.4 */
1507 #ifdef CONFIG_X86_64
1508         rdmsrl(MSR_FS_BASE, a);
1509         vmcs_writel(HOST_FS_BASE, a); /* 22.2.4 */
1510         rdmsrl(MSR_GS_BASE, a);
1511         vmcs_writel(HOST_GS_BASE, a); /* 22.2.4 */
1512 #else
1513         vmcs_writel(HOST_FS_BASE, 0); /* 22.2.4 */
1514         vmcs_writel(HOST_GS_BASE, 0); /* 22.2.4 */
1515 #endif
1516
1517         vmcs_write16(HOST_TR_SELECTOR, GDT_ENTRY_TSS*8);  /* 22.2.4 */
1518
1519         get_idt(&dt);
1520         vmcs_writel(HOST_IDTR_BASE, dt.base);   /* 22.2.4 */
1521
1522         asm ("mov $.Lkvm_vmx_return, %0" : "=r"(kvm_vmx_return));
1523         vmcs_writel(HOST_RIP, kvm_vmx_return); /* 22.2.5 */
1524         vmcs_write32(VM_EXIT_MSR_STORE_COUNT, 0);
1525         vmcs_write32(VM_EXIT_MSR_LOAD_COUNT, 0);
1526         vmcs_write32(VM_ENTRY_MSR_LOAD_COUNT, 0);
1527
1528         rdmsr(MSR_IA32_SYSENTER_CS, host_sysenter_cs, junk);
1529         vmcs_write32(HOST_IA32_SYSENTER_CS, host_sysenter_cs);
1530         rdmsrl(MSR_IA32_SYSENTER_ESP, a);
1531         vmcs_writel(HOST_IA32_SYSENTER_ESP, a);   /* 22.2.3 */
1532         rdmsrl(MSR_IA32_SYSENTER_EIP, a);
1533         vmcs_writel(HOST_IA32_SYSENTER_EIP, a);   /* 22.2.3 */
1534
1535         for (i = 0; i < NR_VMX_MSR; ++i) {
1536                 u32 index = vmx_msr_index[i];
1537                 u32 data_low, data_high;
1538                 u64 data;
1539                 int j = vmx->nmsrs;
1540
1541                 if (rdmsr_safe(index, &data_low, &data_high) < 0)
1542                         continue;
1543                 if (wrmsr_safe(index, data_low, data_high) < 0)
1544                         continue;
1545                 data = data_low | ((u64)data_high << 32);
1546                 vmx->host_msrs[j].index = index;
1547                 vmx->host_msrs[j].reserved = 0;
1548                 vmx->host_msrs[j].data = data;
1549                 vmx->guest_msrs[j] = vmx->host_msrs[j];
1550                 ++vmx->nmsrs;
1551         }
1552
1553         setup_msrs(vmx);
1554
1555         vmcs_write32(VM_EXIT_CONTROLS, vmcs_config.vmexit_ctrl);
1556
1557         /* 22.2.1, 20.8.1 */
1558         vmcs_write32(VM_ENTRY_CONTROLS, vmcs_config.vmentry_ctrl);
1559
1560         vmcs_write32(VM_ENTRY_INTR_INFO_FIELD, 0);  /* 22.2.1 */
1561
1562 #ifdef CONFIG_X86_64
1563         vmcs_write64(VIRTUAL_APIC_PAGE_ADDR, 0);
1564         if (vm_need_tpr_shadow(vmx->vcpu.kvm))
1565                 vmcs_write64(VIRTUAL_APIC_PAGE_ADDR,
1566                              page_to_phys(vmx->vcpu.apic->regs_page));
1567         vmcs_write32(TPR_THRESHOLD, 0);
1568 #endif
1569
1570         vmcs_writel(CR0_GUEST_HOST_MASK, ~0UL);
1571         vmcs_writel(CR4_GUEST_HOST_MASK, KVM_GUEST_CR4_MASK);
1572
1573         vmx->vcpu.cr0 = 0x60000010;
1574         vmx_set_cr0(&vmx->vcpu, vmx->vcpu.cr0); // enter rmode
1575         vmx_set_cr4(&vmx->vcpu, 0);
1576 #ifdef CONFIG_X86_64
1577         vmx_set_efer(&vmx->vcpu, 0);
1578 #endif
1579         vmx_fpu_activate(&vmx->vcpu);
1580         update_exception_bitmap(&vmx->vcpu);
1581
1582         return 0;
1583
1584 out:
1585         return ret;
1586 }
1587
1588 static void inject_rmode_irq(struct kvm_vcpu *vcpu, int irq)
1589 {
1590         u16 ent[2];
1591         u16 cs;
1592         u16 ip;
1593         unsigned long flags;
1594         unsigned long ss_base = vmcs_readl(GUEST_SS_BASE);
1595         u16 sp =  vmcs_readl(GUEST_RSP);
1596         u32 ss_limit = vmcs_read32(GUEST_SS_LIMIT);
1597
1598         if (sp > ss_limit || sp < 6 ) {
1599                 vcpu_printf(vcpu, "%s: #SS, rsp 0x%lx ss 0x%lx limit 0x%x\n",
1600                             __FUNCTION__,
1601                             vmcs_readl(GUEST_RSP),
1602                             vmcs_readl(GUEST_SS_BASE),
1603                             vmcs_read32(GUEST_SS_LIMIT));
1604                 return;
1605         }
1606
1607         if (emulator_read_std(irq * sizeof(ent), &ent, sizeof(ent), vcpu) !=
1608                                                         X86EMUL_CONTINUE) {
1609                 vcpu_printf(vcpu, "%s: read guest err\n", __FUNCTION__);
1610                 return;
1611         }
1612
1613         flags =  vmcs_readl(GUEST_RFLAGS);
1614         cs =  vmcs_readl(GUEST_CS_BASE) >> 4;
1615         ip =  vmcs_readl(GUEST_RIP);
1616
1617
1618         if (emulator_write_emulated(ss_base + sp - 2, &flags, 2, vcpu) != X86EMUL_CONTINUE ||
1619             emulator_write_emulated(ss_base + sp - 4, &cs, 2, vcpu) != X86EMUL_CONTINUE ||
1620             emulator_write_emulated(ss_base + sp - 6, &ip, 2, vcpu) != X86EMUL_CONTINUE) {
1621                 vcpu_printf(vcpu, "%s: write guest err\n", __FUNCTION__);
1622                 return;
1623         }
1624
1625         vmcs_writel(GUEST_RFLAGS, flags &
1626                     ~( X86_EFLAGS_IF | X86_EFLAGS_AC | X86_EFLAGS_TF));
1627         vmcs_write16(GUEST_CS_SELECTOR, ent[1]) ;
1628         vmcs_writel(GUEST_CS_BASE, ent[1] << 4);
1629         vmcs_writel(GUEST_RIP, ent[0]);
1630         vmcs_writel(GUEST_RSP, (vmcs_readl(GUEST_RSP) & ~0xffff) | (sp - 6));
1631 }
1632
1633 static void vmx_inject_irq(struct kvm_vcpu *vcpu, int irq)
1634 {
1635         if (vcpu->rmode.active) {
1636                 inject_rmode_irq(vcpu, irq);
1637                 return;
1638         }
1639         vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
1640                         irq | INTR_TYPE_EXT_INTR | INTR_INFO_VALID_MASK);
1641 }
1642
1643 static void kvm_do_inject_irq(struct kvm_vcpu *vcpu)
1644 {
1645         int word_index = __ffs(vcpu->irq_summary);
1646         int bit_index = __ffs(vcpu->irq_pending[word_index]);
1647         int irq = word_index * BITS_PER_LONG + bit_index;
1648
1649         clear_bit(bit_index, &vcpu->irq_pending[word_index]);
1650         if (!vcpu->irq_pending[word_index])
1651                 clear_bit(word_index, &vcpu->irq_summary);
1652         vmx_inject_irq(vcpu, irq);
1653 }
1654
1655
1656 static void do_interrupt_requests(struct kvm_vcpu *vcpu,
1657                                        struct kvm_run *kvm_run)
1658 {
1659         u32 cpu_based_vm_exec_control;
1660
1661         vcpu->interrupt_window_open =
1662                 ((vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_IF) &&
1663                  (vmcs_read32(GUEST_INTERRUPTIBILITY_INFO) & 3) == 0);
1664
1665         if (vcpu->interrupt_window_open &&
1666             vcpu->irq_summary &&
1667             !(vmcs_read32(VM_ENTRY_INTR_INFO_FIELD) & INTR_INFO_VALID_MASK))
1668                 /*
1669                  * If interrupts enabled, and not blocked by sti or mov ss. Good.
1670                  */
1671                 kvm_do_inject_irq(vcpu);
1672
1673         cpu_based_vm_exec_control = vmcs_read32(CPU_BASED_VM_EXEC_CONTROL);
1674         if (!vcpu->interrupt_window_open &&
1675             (vcpu->irq_summary || kvm_run->request_interrupt_window))
1676                 /*
1677                  * Interrupts blocked.  Wait for unblock.
1678                  */
1679                 cpu_based_vm_exec_control |= CPU_BASED_VIRTUAL_INTR_PENDING;
1680         else
1681                 cpu_based_vm_exec_control &= ~CPU_BASED_VIRTUAL_INTR_PENDING;
1682         vmcs_write32(CPU_BASED_VM_EXEC_CONTROL, cpu_based_vm_exec_control);
1683 }
1684
1685 static void kvm_guest_debug_pre(struct kvm_vcpu *vcpu)
1686 {
1687         struct kvm_guest_debug *dbg = &vcpu->guest_debug;
1688
1689         set_debugreg(dbg->bp[0], 0);
1690         set_debugreg(dbg->bp[1], 1);
1691         set_debugreg(dbg->bp[2], 2);
1692         set_debugreg(dbg->bp[3], 3);
1693
1694         if (dbg->singlestep) {
1695                 unsigned long flags;
1696
1697                 flags = vmcs_readl(GUEST_RFLAGS);
1698                 flags |= X86_EFLAGS_TF | X86_EFLAGS_RF;
1699                 vmcs_writel(GUEST_RFLAGS, flags);
1700         }
1701 }
1702
1703 static int handle_rmode_exception(struct kvm_vcpu *vcpu,
1704                                   int vec, u32 err_code)
1705 {
1706         if (!vcpu->rmode.active)
1707                 return 0;
1708
1709         /*
1710          * Instruction with address size override prefix opcode 0x67
1711          * Cause the #SS fault with 0 error code in VM86 mode.
1712          */
1713         if (((vec == GP_VECTOR) || (vec == SS_VECTOR)) && err_code == 0)
1714                 if (emulate_instruction(vcpu, NULL, 0, 0) == EMULATE_DONE)
1715                         return 1;
1716         return 0;
1717 }
1718
1719 static int handle_exception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1720 {
1721         u32 intr_info, error_code;
1722         unsigned long cr2, rip;
1723         u32 vect_info;
1724         enum emulation_result er;
1725         int r;
1726
1727         vect_info = vmcs_read32(IDT_VECTORING_INFO_FIELD);
1728         intr_info = vmcs_read32(VM_EXIT_INTR_INFO);
1729
1730         if ((vect_info & VECTORING_INFO_VALID_MASK) &&
1731                                                 !is_page_fault(intr_info)) {
1732                 printk(KERN_ERR "%s: unexpected, vectoring info 0x%x "
1733                        "intr info 0x%x\n", __FUNCTION__, vect_info, intr_info);
1734         }
1735
1736         if (!irqchip_in_kernel(vcpu->kvm) && is_external_interrupt(vect_info)) {
1737                 int irq = vect_info & VECTORING_INFO_VECTOR_MASK;
1738                 set_bit(irq, vcpu->irq_pending);
1739                 set_bit(irq / BITS_PER_LONG, &vcpu->irq_summary);
1740         }
1741
1742         if ((intr_info & INTR_INFO_INTR_TYPE_MASK) == 0x200) { /* nmi */
1743                 asm ("int $2");
1744                 return 1;
1745         }
1746
1747         if (is_no_device(intr_info)) {
1748                 vmx_fpu_activate(vcpu);
1749                 return 1;
1750         }
1751
1752         error_code = 0;
1753         rip = vmcs_readl(GUEST_RIP);
1754         if (intr_info & INTR_INFO_DELIEVER_CODE_MASK)
1755                 error_code = vmcs_read32(VM_EXIT_INTR_ERROR_CODE);
1756         if (is_page_fault(intr_info)) {
1757                 cr2 = vmcs_readl(EXIT_QUALIFICATION);
1758
1759                 mutex_lock(&vcpu->kvm->lock);
1760                 r = kvm_mmu_page_fault(vcpu, cr2, error_code);
1761                 if (r < 0) {
1762                         mutex_unlock(&vcpu->kvm->lock);
1763                         return r;
1764                 }
1765                 if (!r) {
1766                         mutex_unlock(&vcpu->kvm->lock);
1767                         return 1;
1768                 }
1769
1770                 er = emulate_instruction(vcpu, kvm_run, cr2, error_code);
1771                 mutex_unlock(&vcpu->kvm->lock);
1772
1773                 switch (er) {
1774                 case EMULATE_DONE:
1775                         return 1;
1776                 case EMULATE_DO_MMIO:
1777                         ++vcpu->stat.mmio_exits;
1778                         return 0;
1779                  case EMULATE_FAIL:
1780                         vcpu_printf(vcpu, "%s: emulate fail\n", __FUNCTION__);
1781                         break;
1782                 default:
1783                         BUG();
1784                 }
1785         }
1786
1787         if (vcpu->rmode.active &&
1788             handle_rmode_exception(vcpu, intr_info & INTR_INFO_VECTOR_MASK,
1789                                                                 error_code)) {
1790                 if (vcpu->halt_request) {
1791                         vcpu->halt_request = 0;
1792                         return kvm_emulate_halt(vcpu);
1793                 }
1794                 return 1;
1795         }
1796
1797         if ((intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK)) == (INTR_TYPE_EXCEPTION | 1)) {
1798                 kvm_run->exit_reason = KVM_EXIT_DEBUG;
1799                 return 0;
1800         }
1801         kvm_run->exit_reason = KVM_EXIT_EXCEPTION;
1802         kvm_run->ex.exception = intr_info & INTR_INFO_VECTOR_MASK;
1803         kvm_run->ex.error_code = error_code;
1804         return 0;
1805 }
1806
1807 static int handle_external_interrupt(struct kvm_vcpu *vcpu,
1808                                      struct kvm_run *kvm_run)
1809 {
1810         ++vcpu->stat.irq_exits;
1811         return 1;
1812 }
1813
1814 static int handle_triple_fault(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1815 {
1816         kvm_run->exit_reason = KVM_EXIT_SHUTDOWN;
1817         return 0;
1818 }
1819
1820 static int handle_io(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1821 {
1822         u64 exit_qualification;
1823         int size, down, in, string, rep;
1824         unsigned port;
1825
1826         ++vcpu->stat.io_exits;
1827         exit_qualification = vmcs_read64(EXIT_QUALIFICATION);
1828         string = (exit_qualification & 16) != 0;
1829
1830         if (string) {
1831                 if (emulate_instruction(vcpu, kvm_run, 0, 0) == EMULATE_DO_MMIO)
1832                         return 0;
1833                 return 1;
1834         }
1835
1836         size = (exit_qualification & 7) + 1;
1837         in = (exit_qualification & 8) != 0;
1838         down = (vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_DF) != 0;
1839         rep = (exit_qualification & 32) != 0;
1840         port = exit_qualification >> 16;
1841
1842         return kvm_emulate_pio(vcpu, kvm_run, in, size, port);
1843 }
1844
1845 static void
1846 vmx_patch_hypercall(struct kvm_vcpu *vcpu, unsigned char *hypercall)
1847 {
1848         /*
1849          * Patch in the VMCALL instruction:
1850          */
1851         hypercall[0] = 0x0f;
1852         hypercall[1] = 0x01;
1853         hypercall[2] = 0xc1;
1854         hypercall[3] = 0xc3;
1855 }
1856
1857 static int handle_cr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1858 {
1859         u64 exit_qualification;
1860         int cr;
1861         int reg;
1862
1863         exit_qualification = vmcs_read64(EXIT_QUALIFICATION);
1864         cr = exit_qualification & 15;
1865         reg = (exit_qualification >> 8) & 15;
1866         switch ((exit_qualification >> 4) & 3) {
1867         case 0: /* mov to cr */
1868                 switch (cr) {
1869                 case 0:
1870                         vcpu_load_rsp_rip(vcpu);
1871                         set_cr0(vcpu, vcpu->regs[reg]);
1872                         skip_emulated_instruction(vcpu);
1873                         return 1;
1874                 case 3:
1875                         vcpu_load_rsp_rip(vcpu);
1876                         set_cr3(vcpu, vcpu->regs[reg]);
1877                         skip_emulated_instruction(vcpu);
1878                         return 1;
1879                 case 4:
1880                         vcpu_load_rsp_rip(vcpu);
1881                         set_cr4(vcpu, vcpu->regs[reg]);
1882                         skip_emulated_instruction(vcpu);
1883                         return 1;
1884                 case 8:
1885                         vcpu_load_rsp_rip(vcpu);
1886                         set_cr8(vcpu, vcpu->regs[reg]);
1887                         skip_emulated_instruction(vcpu);
1888                         kvm_run->exit_reason = KVM_EXIT_SET_TPR;
1889                         return 0;
1890                 };
1891                 break;
1892         case 2: /* clts */
1893                 vcpu_load_rsp_rip(vcpu);
1894                 vmx_fpu_deactivate(vcpu);
1895                 vcpu->cr0 &= ~X86_CR0_TS;
1896                 vmcs_writel(CR0_READ_SHADOW, vcpu->cr0);
1897                 vmx_fpu_activate(vcpu);
1898                 skip_emulated_instruction(vcpu);
1899                 return 1;
1900         case 1: /*mov from cr*/
1901                 switch (cr) {
1902                 case 3:
1903                         vcpu_load_rsp_rip(vcpu);
1904                         vcpu->regs[reg] = vcpu->cr3;
1905                         vcpu_put_rsp_rip(vcpu);
1906                         skip_emulated_instruction(vcpu);
1907                         return 1;
1908                 case 8:
1909                         vcpu_load_rsp_rip(vcpu);
1910                         vcpu->regs[reg] = get_cr8(vcpu);
1911                         vcpu_put_rsp_rip(vcpu);
1912                         skip_emulated_instruction(vcpu);
1913                         return 1;
1914                 }
1915                 break;
1916         case 3: /* lmsw */
1917                 lmsw(vcpu, (exit_qualification >> LMSW_SOURCE_DATA_SHIFT) & 0x0f);
1918
1919                 skip_emulated_instruction(vcpu);
1920                 return 1;
1921         default:
1922                 break;
1923         }
1924         kvm_run->exit_reason = 0;
1925         pr_unimpl(vcpu, "unhandled control register: op %d cr %d\n",
1926                (int)(exit_qualification >> 4) & 3, cr);
1927         return 0;
1928 }
1929
1930 static int handle_dr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1931 {
1932         u64 exit_qualification;
1933         unsigned long val;
1934         int dr, reg;
1935
1936         /*
1937          * FIXME: this code assumes the host is debugging the guest.
1938          *        need to deal with guest debugging itself too.
1939          */
1940         exit_qualification = vmcs_read64(EXIT_QUALIFICATION);
1941         dr = exit_qualification & 7;
1942         reg = (exit_qualification >> 8) & 15;
1943         vcpu_load_rsp_rip(vcpu);
1944         if (exit_qualification & 16) {
1945                 /* mov from dr */
1946                 switch (dr) {
1947                 case 6:
1948                         val = 0xffff0ff0;
1949                         break;
1950                 case 7:
1951                         val = 0x400;
1952                         break;
1953                 default:
1954                         val = 0;
1955                 }
1956                 vcpu->regs[reg] = val;
1957         } else {
1958                 /* mov to dr */
1959         }
1960         vcpu_put_rsp_rip(vcpu);
1961         skip_emulated_instruction(vcpu);
1962         return 1;
1963 }
1964
1965 static int handle_cpuid(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1966 {
1967         kvm_emulate_cpuid(vcpu);
1968         return 1;
1969 }
1970
1971 static int handle_rdmsr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1972 {
1973         u32 ecx = vcpu->regs[VCPU_REGS_RCX];
1974         u64 data;
1975
1976         if (vmx_get_msr(vcpu, ecx, &data)) {
1977                 vmx_inject_gp(vcpu, 0);
1978                 return 1;
1979         }
1980
1981         /* FIXME: handling of bits 32:63 of rax, rdx */
1982         vcpu->regs[VCPU_REGS_RAX] = data & -1u;
1983         vcpu->regs[VCPU_REGS_RDX] = (data >> 32) & -1u;
1984         skip_emulated_instruction(vcpu);
1985         return 1;
1986 }
1987
1988 static int handle_wrmsr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1989 {
1990         u32 ecx = vcpu->regs[VCPU_REGS_RCX];
1991         u64 data = (vcpu->regs[VCPU_REGS_RAX] & -1u)
1992                 | ((u64)(vcpu->regs[VCPU_REGS_RDX] & -1u) << 32);
1993
1994         if (vmx_set_msr(vcpu, ecx, data) != 0) {
1995                 vmx_inject_gp(vcpu, 0);
1996                 return 1;
1997         }
1998
1999         skip_emulated_instruction(vcpu);
2000         return 1;
2001 }
2002
2003 static int handle_tpr_below_threshold(struct kvm_vcpu *vcpu,
2004                                       struct kvm_run *kvm_run)
2005 {
2006         return 1;
2007 }
2008
2009 static void post_kvm_run_save(struct kvm_vcpu *vcpu,
2010                               struct kvm_run *kvm_run)
2011 {
2012         kvm_run->if_flag = (vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_IF) != 0;
2013         kvm_run->cr8 = get_cr8(vcpu);
2014         kvm_run->apic_base = kvm_get_apic_base(vcpu);
2015         if (irqchip_in_kernel(vcpu->kvm))
2016                 kvm_run->ready_for_interrupt_injection = 1;
2017         else
2018                 kvm_run->ready_for_interrupt_injection =
2019                                         (vcpu->interrupt_window_open &&
2020                                          vcpu->irq_summary == 0);
2021 }
2022
2023 static int handle_interrupt_window(struct kvm_vcpu *vcpu,
2024                                    struct kvm_run *kvm_run)
2025 {
2026         u32 cpu_based_vm_exec_control;
2027
2028         /* clear pending irq */
2029         cpu_based_vm_exec_control = vmcs_read32(CPU_BASED_VM_EXEC_CONTROL);
2030         cpu_based_vm_exec_control &= ~CPU_BASED_VIRTUAL_INTR_PENDING;
2031         vmcs_write32(CPU_BASED_VM_EXEC_CONTROL, cpu_based_vm_exec_control);
2032         /*
2033          * If the user space waits to inject interrupts, exit as soon as
2034          * possible
2035          */
2036         if (kvm_run->request_interrupt_window &&
2037             !vcpu->irq_summary) {
2038                 kvm_run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
2039                 ++vcpu->stat.irq_window_exits;
2040                 return 0;
2041         }
2042         return 1;
2043 }
2044
2045 static int handle_halt(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
2046 {
2047         skip_emulated_instruction(vcpu);
2048         return kvm_emulate_halt(vcpu);
2049 }
2050
2051 static int handle_vmcall(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
2052 {
2053         skip_emulated_instruction(vcpu);
2054         return kvm_hypercall(vcpu, kvm_run);
2055 }
2056
2057 /*
2058  * The exit handlers return 1 if the exit was handled fully and guest execution
2059  * may resume.  Otherwise they set the kvm_run parameter to indicate what needs
2060  * to be done to userspace and return 0.
2061  */
2062 static int (*kvm_vmx_exit_handlers[])(struct kvm_vcpu *vcpu,
2063                                       struct kvm_run *kvm_run) = {
2064         [EXIT_REASON_EXCEPTION_NMI]           = handle_exception,
2065         [EXIT_REASON_EXTERNAL_INTERRUPT]      = handle_external_interrupt,
2066         [EXIT_REASON_TRIPLE_FAULT]            = handle_triple_fault,
2067         [EXIT_REASON_IO_INSTRUCTION]          = handle_io,
2068         [EXIT_REASON_CR_ACCESS]               = handle_cr,
2069         [EXIT_REASON_DR_ACCESS]               = handle_dr,
2070         [EXIT_REASON_CPUID]                   = handle_cpuid,
2071         [EXIT_REASON_MSR_READ]                = handle_rdmsr,
2072         [EXIT_REASON_MSR_WRITE]               = handle_wrmsr,
2073         [EXIT_REASON_PENDING_INTERRUPT]       = handle_interrupt_window,
2074         [EXIT_REASON_HLT]                     = handle_halt,
2075         [EXIT_REASON_VMCALL]                  = handle_vmcall,
2076         [EXIT_REASON_TPR_BELOW_THRESHOLD]     = handle_tpr_below_threshold
2077 };
2078
2079 static const int kvm_vmx_max_exit_handlers =
2080         ARRAY_SIZE(kvm_vmx_exit_handlers);
2081
2082 /*
2083  * The guest has exited.  See if we can fix it or if we need userspace
2084  * assistance.
2085  */
2086 static int kvm_handle_exit(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
2087 {
2088         u32 vectoring_info = vmcs_read32(IDT_VECTORING_INFO_FIELD);
2089         u32 exit_reason = vmcs_read32(VM_EXIT_REASON);
2090
2091         if ( (vectoring_info & VECTORING_INFO_VALID_MASK) &&
2092                                 exit_reason != EXIT_REASON_EXCEPTION_NMI )
2093                 printk(KERN_WARNING "%s: unexpected, valid vectoring info and "
2094                        "exit reason is 0x%x\n", __FUNCTION__, exit_reason);
2095         if (exit_reason < kvm_vmx_max_exit_handlers
2096             && kvm_vmx_exit_handlers[exit_reason])
2097                 return kvm_vmx_exit_handlers[exit_reason](vcpu, kvm_run);
2098         else {
2099                 kvm_run->exit_reason = KVM_EXIT_UNKNOWN;
2100                 kvm_run->hw.hardware_exit_reason = exit_reason;
2101         }
2102         return 0;
2103 }
2104
2105 /*
2106  * Check if userspace requested an interrupt window, and that the
2107  * interrupt window is open.
2108  *
2109  * No need to exit to userspace if we already have an interrupt queued.
2110  */
2111 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu,
2112                                           struct kvm_run *kvm_run)
2113 {
2114         return (!vcpu->irq_summary &&
2115                 kvm_run->request_interrupt_window &&
2116                 vcpu->interrupt_window_open &&
2117                 (vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_IF));
2118 }
2119
2120 static void vmx_flush_tlb(struct kvm_vcpu *vcpu)
2121 {
2122 }
2123
2124 static void update_tpr_threshold(struct kvm_vcpu *vcpu)
2125 {
2126         int max_irr, tpr;
2127
2128         if (!vm_need_tpr_shadow(vcpu->kvm))
2129                 return;
2130
2131         if (!kvm_lapic_enabled(vcpu) ||
2132             ((max_irr = kvm_lapic_find_highest_irr(vcpu)) == -1)) {
2133                 vmcs_write32(TPR_THRESHOLD, 0);
2134                 return;
2135         }
2136
2137         tpr = (kvm_lapic_get_cr8(vcpu) & 0x0f) << 4;
2138         vmcs_write32(TPR_THRESHOLD, (max_irr > tpr) ? tpr >> 4 : max_irr >> 4);
2139 }
2140
2141 static void enable_irq_window(struct kvm_vcpu *vcpu)
2142 {
2143         u32 cpu_based_vm_exec_control;
2144
2145         cpu_based_vm_exec_control = vmcs_read32(CPU_BASED_VM_EXEC_CONTROL);
2146         cpu_based_vm_exec_control |= CPU_BASED_VIRTUAL_INTR_PENDING;
2147         vmcs_write32(CPU_BASED_VM_EXEC_CONTROL, cpu_based_vm_exec_control);
2148 }
2149
2150 static void vmx_intr_assist(struct kvm_vcpu *vcpu)
2151 {
2152         u32 idtv_info_field, intr_info_field;
2153         int has_ext_irq, interrupt_window_open;
2154
2155         update_tpr_threshold(vcpu);
2156
2157         has_ext_irq = kvm_cpu_has_interrupt(vcpu);
2158         intr_info_field = vmcs_read32(VM_ENTRY_INTR_INFO_FIELD);
2159         idtv_info_field = vmcs_read32(IDT_VECTORING_INFO_FIELD);
2160         if (intr_info_field & INTR_INFO_VALID_MASK) {
2161                 if (idtv_info_field & INTR_INFO_VALID_MASK) {
2162                         /* TODO: fault when IDT_Vectoring */
2163                         printk(KERN_ERR "Fault when IDT_Vectoring\n");
2164                 }
2165                 if (has_ext_irq)
2166                         enable_irq_window(vcpu);
2167                 return;
2168         }
2169         if (unlikely(idtv_info_field & INTR_INFO_VALID_MASK)) {
2170                 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD, idtv_info_field);
2171                 vmcs_write32(VM_ENTRY_INSTRUCTION_LEN,
2172                                 vmcs_read32(VM_EXIT_INSTRUCTION_LEN));
2173
2174                 if (unlikely(idtv_info_field & INTR_INFO_DELIEVER_CODE_MASK))
2175                         vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE,
2176                                 vmcs_read32(IDT_VECTORING_ERROR_CODE));
2177                 if (unlikely(has_ext_irq))
2178                         enable_irq_window(vcpu);
2179                 return;
2180         }
2181         if (!has_ext_irq)
2182                 return;
2183         interrupt_window_open =
2184                 ((vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_IF) &&
2185                  (vmcs_read32(GUEST_INTERRUPTIBILITY_INFO) & 3) == 0);
2186         if (interrupt_window_open)
2187                 vmx_inject_irq(vcpu, kvm_cpu_get_interrupt(vcpu));
2188         else
2189                 enable_irq_window(vcpu);
2190 }
2191
2192 static int vmx_vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
2193 {
2194         struct vcpu_vmx *vmx = to_vmx(vcpu);
2195         u8 fail;
2196         int r;
2197
2198 preempted:
2199         if (vcpu->guest_debug.enabled)
2200                 kvm_guest_debug_pre(vcpu);
2201
2202 again:
2203         r = kvm_mmu_reload(vcpu);
2204         if (unlikely(r))
2205                 goto out;
2206
2207         preempt_disable();
2208
2209         vmx_save_host_state(vmx);
2210         kvm_load_guest_fpu(vcpu);
2211
2212         /*
2213          * Loading guest fpu may have cleared host cr0.ts
2214          */
2215         vmcs_writel(HOST_CR0, read_cr0());
2216
2217         local_irq_disable();
2218
2219         if (signal_pending(current)) {
2220                 local_irq_enable();
2221                 preempt_enable();
2222                 r = -EINTR;
2223                 kvm_run->exit_reason = KVM_EXIT_INTR;
2224                 ++vcpu->stat.signal_exits;
2225                 goto out;
2226         }
2227
2228         if (irqchip_in_kernel(vcpu->kvm))
2229                 vmx_intr_assist(vcpu);
2230         else if (!vcpu->mmio_read_completed)
2231                 do_interrupt_requests(vcpu, kvm_run);
2232
2233         vcpu->guest_mode = 1;
2234         if (vcpu->requests)
2235                 if (test_and_clear_bit(KVM_TLB_FLUSH, &vcpu->requests))
2236                     vmx_flush_tlb(vcpu);
2237
2238         asm (
2239                 /* Store host registers */
2240 #ifdef CONFIG_X86_64
2241                 "push %%rax; push %%rbx; push %%rdx;"
2242                 "push %%rsi; push %%rdi; push %%rbp;"
2243                 "push %%r8;  push %%r9;  push %%r10; push %%r11;"
2244                 "push %%r12; push %%r13; push %%r14; push %%r15;"
2245                 "push %%rcx \n\t"
2246                 ASM_VMX_VMWRITE_RSP_RDX "\n\t"
2247 #else
2248                 "pusha; push %%ecx \n\t"
2249                 ASM_VMX_VMWRITE_RSP_RDX "\n\t"
2250 #endif
2251                 /* Check if vmlaunch of vmresume is needed */
2252                 "cmp $0, %1 \n\t"
2253                 /* Load guest registers.  Don't clobber flags. */
2254 #ifdef CONFIG_X86_64
2255                 "mov %c[cr2](%3), %%rax \n\t"
2256                 "mov %%rax, %%cr2 \n\t"
2257                 "mov %c[rax](%3), %%rax \n\t"
2258                 "mov %c[rbx](%3), %%rbx \n\t"
2259                 "mov %c[rdx](%3), %%rdx \n\t"
2260                 "mov %c[rsi](%3), %%rsi \n\t"
2261                 "mov %c[rdi](%3), %%rdi \n\t"
2262                 "mov %c[rbp](%3), %%rbp \n\t"
2263                 "mov %c[r8](%3),  %%r8  \n\t"
2264                 "mov %c[r9](%3),  %%r9  \n\t"
2265                 "mov %c[r10](%3), %%r10 \n\t"
2266                 "mov %c[r11](%3), %%r11 \n\t"
2267                 "mov %c[r12](%3), %%r12 \n\t"
2268                 "mov %c[r13](%3), %%r13 \n\t"
2269                 "mov %c[r14](%3), %%r14 \n\t"
2270                 "mov %c[r15](%3), %%r15 \n\t"
2271                 "mov %c[rcx](%3), %%rcx \n\t" /* kills %3 (rcx) */
2272 #else
2273                 "mov %c[cr2](%3), %%eax \n\t"
2274                 "mov %%eax,   %%cr2 \n\t"
2275                 "mov %c[rax](%3), %%eax \n\t"
2276                 "mov %c[rbx](%3), %%ebx \n\t"
2277                 "mov %c[rdx](%3), %%edx \n\t"
2278                 "mov %c[rsi](%3), %%esi \n\t"
2279                 "mov %c[rdi](%3), %%edi \n\t"
2280                 "mov %c[rbp](%3), %%ebp \n\t"
2281                 "mov %c[rcx](%3), %%ecx \n\t" /* kills %3 (ecx) */
2282 #endif
2283                 /* Enter guest mode */
2284                 "jne .Llaunched \n\t"
2285                 ASM_VMX_VMLAUNCH "\n\t"
2286                 "jmp .Lkvm_vmx_return \n\t"
2287                 ".Llaunched: " ASM_VMX_VMRESUME "\n\t"
2288                 ".Lkvm_vmx_return: "
2289                 /* Save guest registers, load host registers, keep flags */
2290 #ifdef CONFIG_X86_64
2291                 "xchg %3,     (%%rsp) \n\t"
2292                 "mov %%rax, %c[rax](%3) \n\t"
2293                 "mov %%rbx, %c[rbx](%3) \n\t"
2294                 "pushq (%%rsp); popq %c[rcx](%3) \n\t"
2295                 "mov %%rdx, %c[rdx](%3) \n\t"
2296                 "mov %%rsi, %c[rsi](%3) \n\t"
2297                 "mov %%rdi, %c[rdi](%3) \n\t"
2298                 "mov %%rbp, %c[rbp](%3) \n\t"
2299                 "mov %%r8,  %c[r8](%3) \n\t"
2300                 "mov %%r9,  %c[r9](%3) \n\t"
2301                 "mov %%r10, %c[r10](%3) \n\t"
2302                 "mov %%r11, %c[r11](%3) \n\t"
2303                 "mov %%r12, %c[r12](%3) \n\t"
2304                 "mov %%r13, %c[r13](%3) \n\t"
2305                 "mov %%r14, %c[r14](%3) \n\t"
2306                 "mov %%r15, %c[r15](%3) \n\t"
2307                 "mov %%cr2, %%rax   \n\t"
2308                 "mov %%rax, %c[cr2](%3) \n\t"
2309                 "mov (%%rsp), %3 \n\t"
2310
2311                 "pop  %%rcx; pop  %%r15; pop  %%r14; pop  %%r13; pop  %%r12;"
2312                 "pop  %%r11; pop  %%r10; pop  %%r9;  pop  %%r8;"
2313                 "pop  %%rbp; pop  %%rdi; pop  %%rsi;"
2314                 "pop  %%rdx; pop  %%rbx; pop  %%rax \n\t"
2315 #else
2316                 "xchg %3, (%%esp) \n\t"
2317                 "mov %%eax, %c[rax](%3) \n\t"
2318                 "mov %%ebx, %c[rbx](%3) \n\t"
2319                 "pushl (%%esp); popl %c[rcx](%3) \n\t"
2320                 "mov %%edx, %c[rdx](%3) \n\t"
2321                 "mov %%esi, %c[rsi](%3) \n\t"
2322                 "mov %%edi, %c[rdi](%3) \n\t"
2323                 "mov %%ebp, %c[rbp](%3) \n\t"
2324                 "mov %%cr2, %%eax  \n\t"
2325                 "mov %%eax, %c[cr2](%3) \n\t"
2326                 "mov (%%esp), %3 \n\t"
2327
2328                 "pop %%ecx; popa \n\t"
2329 #endif
2330                 "setbe %0 \n\t"
2331               : "=q" (fail)
2332               : "r"(vmx->launched), "d"((unsigned long)HOST_RSP),
2333                 "c"(vcpu),
2334                 [rax]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RAX])),
2335                 [rbx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RBX])),
2336                 [rcx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RCX])),
2337                 [rdx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RDX])),
2338                 [rsi]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RSI])),
2339                 [rdi]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RDI])),
2340                 [rbp]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RBP])),
2341 #ifdef CONFIG_X86_64
2342                 [r8 ]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R8 ])),
2343                 [r9 ]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R9 ])),
2344                 [r10]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R10])),
2345                 [r11]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R11])),
2346                 [r12]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R12])),
2347                 [r13]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R13])),
2348                 [r14]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R14])),
2349                 [r15]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R15])),
2350 #endif
2351                 [cr2]"i"(offsetof(struct kvm_vcpu, cr2))
2352               : "cc", "memory" );
2353
2354         vcpu->guest_mode = 0;
2355         local_irq_enable();
2356
2357         ++vcpu->stat.exits;
2358
2359         vcpu->interrupt_window_open = (vmcs_read32(GUEST_INTERRUPTIBILITY_INFO) & 3) == 0;
2360
2361         asm ("mov %0, %%ds; mov %0, %%es" : : "r"(__USER_DS));
2362         vmx->launched = 1;
2363
2364         preempt_enable();
2365
2366         if (unlikely(fail)) {
2367                 kvm_run->exit_reason = KVM_EXIT_FAIL_ENTRY;
2368                 kvm_run->fail_entry.hardware_entry_failure_reason
2369                         = vmcs_read32(VM_INSTRUCTION_ERROR);
2370                 r = 0;
2371                 goto out;
2372         }
2373         /*
2374          * Profile KVM exit RIPs:
2375          */
2376         if (unlikely(prof_on == KVM_PROFILING))
2377                 profile_hit(KVM_PROFILING, (void *)vmcs_readl(GUEST_RIP));
2378
2379         r = kvm_handle_exit(kvm_run, vcpu);
2380         if (r > 0) {
2381                 if (dm_request_for_irq_injection(vcpu, kvm_run)) {
2382                         r = -EINTR;
2383                         kvm_run->exit_reason = KVM_EXIT_INTR;
2384                         ++vcpu->stat.request_irq_exits;
2385                         goto out;
2386                 }
2387                 if (!need_resched()) {
2388                         ++vcpu->stat.light_exits;
2389                         goto again;
2390                 }
2391         }
2392
2393 out:
2394         if (r > 0) {
2395                 kvm_resched(vcpu);
2396                 goto preempted;
2397         }
2398
2399         post_kvm_run_save(vcpu, kvm_run);
2400         return r;
2401 }
2402
2403 static void vmx_inject_page_fault(struct kvm_vcpu *vcpu,
2404                                   unsigned long addr,
2405                                   u32 err_code)
2406 {
2407         u32 vect_info = vmcs_read32(IDT_VECTORING_INFO_FIELD);
2408
2409         ++vcpu->stat.pf_guest;
2410
2411         if (is_page_fault(vect_info)) {
2412                 printk(KERN_DEBUG "inject_page_fault: "
2413                        "double fault 0x%lx @ 0x%lx\n",
2414                        addr, vmcs_readl(GUEST_RIP));
2415                 vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE, 0);
2416                 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
2417                              DF_VECTOR |
2418                              INTR_TYPE_EXCEPTION |
2419                              INTR_INFO_DELIEVER_CODE_MASK |
2420                              INTR_INFO_VALID_MASK);
2421                 return;
2422         }
2423         vcpu->cr2 = addr;
2424         vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE, err_code);
2425         vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
2426                      PF_VECTOR |
2427                      INTR_TYPE_EXCEPTION |
2428                      INTR_INFO_DELIEVER_CODE_MASK |
2429                      INTR_INFO_VALID_MASK);
2430
2431 }
2432
2433 static void vmx_free_vmcs(struct kvm_vcpu *vcpu)
2434 {
2435         struct vcpu_vmx *vmx = to_vmx(vcpu);
2436
2437         if (vmx->vmcs) {
2438                 on_each_cpu(__vcpu_clear, vmx, 0, 1);
2439                 free_vmcs(vmx->vmcs);
2440                 vmx->vmcs = NULL;
2441         }
2442 }
2443
2444 static void vmx_free_vcpu(struct kvm_vcpu *vcpu)
2445 {
2446         struct vcpu_vmx *vmx = to_vmx(vcpu);
2447
2448         vmx_free_vmcs(vcpu);
2449         kfree(vmx->host_msrs);
2450         kfree(vmx->guest_msrs);
2451         kvm_vcpu_uninit(vcpu);
2452         kmem_cache_free(kvm_vcpu_cache, vmx);
2453 }
2454
2455 static struct kvm_vcpu *vmx_create_vcpu(struct kvm *kvm, unsigned int id)
2456 {
2457         int err;
2458         struct vcpu_vmx *vmx = kmem_cache_zalloc(kvm_vcpu_cache, GFP_KERNEL);
2459         int cpu;
2460
2461         if (!vmx)
2462                 return ERR_PTR(-ENOMEM);
2463
2464         err = kvm_vcpu_init(&vmx->vcpu, kvm, id);
2465         if (err)
2466                 goto free_vcpu;
2467
2468         if (irqchip_in_kernel(kvm)) {
2469                 err = kvm_create_lapic(&vmx->vcpu);
2470                 if (err < 0)
2471                         goto free_vcpu;
2472         }
2473
2474         vmx->guest_msrs = kmalloc(PAGE_SIZE, GFP_KERNEL);
2475         if (!vmx->guest_msrs) {
2476                 err = -ENOMEM;
2477                 goto uninit_vcpu;
2478         }
2479
2480         vmx->host_msrs = kmalloc(PAGE_SIZE, GFP_KERNEL);
2481         if (!vmx->host_msrs)
2482                 goto free_guest_msrs;
2483
2484         vmx->vmcs = alloc_vmcs();
2485         if (!vmx->vmcs)
2486                 goto free_msrs;
2487
2488         vmcs_clear(vmx->vmcs);
2489
2490         cpu = get_cpu();
2491         vmx_vcpu_load(&vmx->vcpu, cpu);
2492         err = vmx_vcpu_setup(vmx);
2493         vmx_vcpu_put(&vmx->vcpu);
2494         put_cpu();
2495         if (err)
2496                 goto free_vmcs;
2497
2498         return &vmx->vcpu;
2499
2500 free_vmcs:
2501         free_vmcs(vmx->vmcs);
2502 free_msrs:
2503         kfree(vmx->host_msrs);
2504 free_guest_msrs:
2505         kfree(vmx->guest_msrs);
2506 uninit_vcpu:
2507         kvm_vcpu_uninit(&vmx->vcpu);
2508 free_vcpu:
2509         kmem_cache_free(kvm_vcpu_cache, vmx);
2510         return ERR_PTR(err);
2511 }
2512
2513 static void __init vmx_check_processor_compat(void *rtn)
2514 {
2515         struct vmcs_config vmcs_conf;
2516
2517         *(int *)rtn = 0;
2518         if (setup_vmcs_config(&vmcs_conf) < 0)
2519                 *(int *)rtn = -EIO;
2520         if (memcmp(&vmcs_config, &vmcs_conf, sizeof(struct vmcs_config)) != 0) {
2521                 printk(KERN_ERR "kvm: CPU %d feature inconsistency!\n",
2522                                 smp_processor_id());
2523                 *(int *)rtn = -EIO;
2524         }
2525 }
2526
2527 static struct kvm_arch_ops vmx_arch_ops = {
2528         .cpu_has_kvm_support = cpu_has_kvm_support,
2529         .disabled_by_bios = vmx_disabled_by_bios,
2530         .hardware_setup = hardware_setup,
2531         .hardware_unsetup = hardware_unsetup,
2532         .check_processor_compatibility = vmx_check_processor_compat,
2533         .hardware_enable = hardware_enable,
2534         .hardware_disable = hardware_disable,
2535
2536         .vcpu_create = vmx_create_vcpu,
2537         .vcpu_free = vmx_free_vcpu,
2538
2539         .vcpu_load = vmx_vcpu_load,
2540         .vcpu_put = vmx_vcpu_put,
2541         .vcpu_decache = vmx_vcpu_decache,
2542
2543         .set_guest_debug = set_guest_debug,
2544         .get_msr = vmx_get_msr,
2545         .set_msr = vmx_set_msr,
2546         .get_segment_base = vmx_get_segment_base,
2547         .get_segment = vmx_get_segment,
2548         .set_segment = vmx_set_segment,
2549         .get_cs_db_l_bits = vmx_get_cs_db_l_bits,
2550         .decache_cr4_guest_bits = vmx_decache_cr4_guest_bits,
2551         .set_cr0 = vmx_set_cr0,
2552         .set_cr3 = vmx_set_cr3,
2553         .set_cr4 = vmx_set_cr4,
2554 #ifdef CONFIG_X86_64
2555         .set_efer = vmx_set_efer,
2556 #endif
2557         .get_idt = vmx_get_idt,
2558         .set_idt = vmx_set_idt,
2559         .get_gdt = vmx_get_gdt,
2560         .set_gdt = vmx_set_gdt,
2561         .cache_regs = vcpu_load_rsp_rip,
2562         .decache_regs = vcpu_put_rsp_rip,
2563         .get_rflags = vmx_get_rflags,
2564         .set_rflags = vmx_set_rflags,
2565
2566         .tlb_flush = vmx_flush_tlb,
2567         .inject_page_fault = vmx_inject_page_fault,
2568
2569         .inject_gp = vmx_inject_gp,
2570
2571         .run = vmx_vcpu_run,
2572         .skip_emulated_instruction = skip_emulated_instruction,
2573         .patch_hypercall = vmx_patch_hypercall,
2574         .get_irq = vmx_get_irq,
2575         .set_irq = vmx_inject_irq,
2576 };
2577
2578 static int __init vmx_init(void)
2579 {
2580         void *iova;
2581         int r;
2582
2583         vmx_io_bitmap_a = alloc_page(GFP_KERNEL | __GFP_HIGHMEM);
2584         if (!vmx_io_bitmap_a)
2585                 return -ENOMEM;
2586
2587         vmx_io_bitmap_b = alloc_page(GFP_KERNEL | __GFP_HIGHMEM);
2588         if (!vmx_io_bitmap_b) {
2589                 r = -ENOMEM;
2590                 goto out;
2591         }
2592
2593         /*
2594          * Allow direct access to the PC debug port (it is often used for I/O
2595          * delays, but the vmexits simply slow things down).
2596          */
2597         iova = kmap(vmx_io_bitmap_a);
2598         memset(iova, 0xff, PAGE_SIZE);
2599         clear_bit(0x80, iova);
2600         kunmap(vmx_io_bitmap_a);
2601
2602         iova = kmap(vmx_io_bitmap_b);
2603         memset(iova, 0xff, PAGE_SIZE);
2604         kunmap(vmx_io_bitmap_b);
2605
2606         r = kvm_init_arch(&vmx_arch_ops, sizeof(struct vcpu_vmx), THIS_MODULE);
2607         if (r)
2608                 goto out1;
2609
2610         return 0;
2611
2612 out1:
2613         __free_page(vmx_io_bitmap_b);
2614 out:
2615         __free_page(vmx_io_bitmap_a);
2616         return r;
2617 }
2618
2619 static void __exit vmx_exit(void)
2620 {
2621         __free_page(vmx_io_bitmap_b);
2622         __free_page(vmx_io_bitmap_a);
2623
2624         kvm_exit_arch();
2625 }
2626
2627 module_init(vmx_init)
2628 module_exit(vmx_exit)