2 * Kernel-based Virtual Machine driver for Linux
6 * Copyright (C) 2006 Qumranet, Inc.
9 * Yaniv Kamay <yaniv@qumranet.com>
10 * Avi Kivity <avi@qumranet.com>
12 * This work is licensed under the terms of the GNU GPL, version 2. See
13 * the COPYING file in the top-level directory.
18 #include "x86_emulate.h"
20 #include <linux/module.h>
21 #include <linux/kernel.h>
22 #include <linux/vmalloc.h>
23 #include <linux/highmem.h>
24 #include <linux/profile.h>
25 #include <linux/sched.h>
29 MODULE_AUTHOR("Qumranet");
30 MODULE_LICENSE("GPL");
32 #define IOPM_ALLOC_ORDER 2
33 #define MSRPM_ALLOC_ORDER 1
39 #define DR7_GD_MASK (1 << 13)
40 #define DR6_BD_MASK (1 << 13)
42 #define SEG_TYPE_LDT 2
43 #define SEG_TYPE_BUSY_TSS16 3
45 #define KVM_EFER_LMA (1 << 10)
46 #define KVM_EFER_LME (1 << 8)
48 #define SVM_FEATURE_NPT (1 << 0)
49 #define SVM_FEATURE_LBRV (1 << 1)
50 #define SVM_DEATURE_SVML (1 << 2)
52 static inline struct vcpu_svm *to_svm(struct kvm_vcpu *vcpu)
54 return container_of(vcpu, struct vcpu_svm, vcpu);
57 unsigned long iopm_base;
58 unsigned long msrpm_base;
60 struct kvm_ldttss_desc {
63 unsigned base1 : 8, type : 5, dpl : 2, p : 1;
64 unsigned limit1 : 4, zero0 : 3, g : 1, base2 : 8;
67 } __attribute__((packed));
75 struct kvm_ldttss_desc *tss_desc;
77 struct page *save_area;
80 static DEFINE_PER_CPU(struct svm_cpu_data *, svm_data);
81 static uint32_t svm_features;
83 struct svm_init_data {
88 static u32 msrpm_ranges[] = {0, 0xc0000000, 0xc0010000};
90 #define NUM_MSR_MAPS ARRAY_SIZE(msrpm_ranges)
91 #define MSRS_RANGE_SIZE 2048
92 #define MSRS_IN_RANGE (MSRS_RANGE_SIZE * 8 / 2)
94 #define MAX_INST_SIZE 15
96 static inline u32 svm_has(u32 feat)
98 return svm_features & feat;
101 static inline u8 pop_irq(struct kvm_vcpu *vcpu)
103 int word_index = __ffs(vcpu->irq_summary);
104 int bit_index = __ffs(vcpu->irq_pending[word_index]);
105 int irq = word_index * BITS_PER_LONG + bit_index;
107 clear_bit(bit_index, &vcpu->irq_pending[word_index]);
108 if (!vcpu->irq_pending[word_index])
109 clear_bit(word_index, &vcpu->irq_summary);
113 static inline void push_irq(struct kvm_vcpu *vcpu, u8 irq)
115 set_bit(irq, vcpu->irq_pending);
116 set_bit(irq / BITS_PER_LONG, &vcpu->irq_summary);
119 static inline void clgi(void)
121 asm volatile (SVM_CLGI);
124 static inline void stgi(void)
126 asm volatile (SVM_STGI);
129 static inline void invlpga(unsigned long addr, u32 asid)
131 asm volatile (SVM_INVLPGA :: "a"(addr), "c"(asid));
134 static inline unsigned long kvm_read_cr2(void)
138 asm volatile ("mov %%cr2, %0" : "=r" (cr2));
142 static inline void kvm_write_cr2(unsigned long val)
144 asm volatile ("mov %0, %%cr2" :: "r" (val));
147 static inline unsigned long read_dr6(void)
151 asm volatile ("mov %%dr6, %0" : "=r" (dr6));
155 static inline void write_dr6(unsigned long val)
157 asm volatile ("mov %0, %%dr6" :: "r" (val));
160 static inline unsigned long read_dr7(void)
164 asm volatile ("mov %%dr7, %0" : "=r" (dr7));
168 static inline void write_dr7(unsigned long val)
170 asm volatile ("mov %0, %%dr7" :: "r" (val));
173 static inline void force_new_asid(struct kvm_vcpu *vcpu)
175 to_svm(vcpu)->asid_generation--;
178 static inline void flush_guest_tlb(struct kvm_vcpu *vcpu)
180 force_new_asid(vcpu);
183 static void svm_set_efer(struct kvm_vcpu *vcpu, u64 efer)
185 if (!(efer & KVM_EFER_LMA))
186 efer &= ~KVM_EFER_LME;
188 to_svm(vcpu)->vmcb->save.efer = efer | MSR_EFER_SVME_MASK;
189 vcpu->shadow_efer = efer;
192 static void svm_inject_gp(struct kvm_vcpu *vcpu, unsigned error_code)
194 struct vcpu_svm *svm = to_svm(vcpu);
196 svm->vmcb->control.event_inj = SVM_EVTINJ_VALID |
197 SVM_EVTINJ_VALID_ERR |
198 SVM_EVTINJ_TYPE_EXEPT |
200 svm->vmcb->control.event_inj_err = error_code;
203 static void inject_ud(struct kvm_vcpu *vcpu)
205 to_svm(vcpu)->vmcb->control.event_inj = SVM_EVTINJ_VALID |
206 SVM_EVTINJ_TYPE_EXEPT |
210 static int is_page_fault(uint32_t info)
212 info &= SVM_EVTINJ_VEC_MASK | SVM_EVTINJ_TYPE_MASK | SVM_EVTINJ_VALID;
213 return info == (PF_VECTOR | SVM_EVTINJ_VALID | SVM_EVTINJ_TYPE_EXEPT);
216 static int is_external_interrupt(u32 info)
218 info &= SVM_EVTINJ_TYPE_MASK | SVM_EVTINJ_VALID;
219 return info == (SVM_EVTINJ_VALID | SVM_EVTINJ_TYPE_INTR);
222 static void skip_emulated_instruction(struct kvm_vcpu *vcpu)
224 struct vcpu_svm *svm = to_svm(vcpu);
226 if (!svm->next_rip) {
227 printk(KERN_DEBUG "%s: NOP\n", __FUNCTION__);
230 if (svm->next_rip - svm->vmcb->save.rip > MAX_INST_SIZE) {
231 printk(KERN_ERR "%s: ip 0x%llx next 0x%llx\n",
237 vcpu->rip = svm->vmcb->save.rip = svm->next_rip;
238 svm->vmcb->control.int_state &= ~SVM_INTERRUPT_SHADOW_MASK;
240 vcpu->interrupt_window_open = 1;
243 static int has_svm(void)
245 uint32_t eax, ebx, ecx, edx;
247 if (boot_cpu_data.x86_vendor != X86_VENDOR_AMD) {
248 printk(KERN_INFO "has_svm: not amd\n");
252 cpuid(0x80000000, &eax, &ebx, &ecx, &edx);
253 if (eax < SVM_CPUID_FUNC) {
254 printk(KERN_INFO "has_svm: can't execute cpuid_8000000a\n");
258 cpuid(0x80000001, &eax, &ebx, &ecx, &edx);
259 if (!(ecx & (1 << SVM_CPUID_FEATURE_SHIFT))) {
260 printk(KERN_DEBUG "has_svm: svm not available\n");
266 static void svm_hardware_disable(void *garbage)
268 struct svm_cpu_data *svm_data
269 = per_cpu(svm_data, raw_smp_processor_id());
274 wrmsrl(MSR_VM_HSAVE_PA, 0);
275 rdmsrl(MSR_EFER, efer);
276 wrmsrl(MSR_EFER, efer & ~MSR_EFER_SVME_MASK);
277 per_cpu(svm_data, raw_smp_processor_id()) = NULL;
278 __free_page(svm_data->save_area);
283 static void svm_hardware_enable(void *garbage)
286 struct svm_cpu_data *svm_data;
289 struct desc_ptr gdt_descr;
291 struct Xgt_desc_struct gdt_descr;
293 struct desc_struct *gdt;
294 int me = raw_smp_processor_id();
297 printk(KERN_ERR "svm_cpu_init: err EOPNOTSUPP on %d\n", me);
300 svm_data = per_cpu(svm_data, me);
303 printk(KERN_ERR "svm_cpu_init: svm_data is NULL on %d\n",
308 svm_data->asid_generation = 1;
309 svm_data->max_asid = cpuid_ebx(SVM_CPUID_FUNC) - 1;
310 svm_data->next_asid = svm_data->max_asid + 1;
311 svm_features = cpuid_edx(SVM_CPUID_FUNC);
313 asm volatile ( "sgdt %0" : "=m"(gdt_descr) );
314 gdt = (struct desc_struct *)gdt_descr.address;
315 svm_data->tss_desc = (struct kvm_ldttss_desc *)(gdt + GDT_ENTRY_TSS);
317 rdmsrl(MSR_EFER, efer);
318 wrmsrl(MSR_EFER, efer | MSR_EFER_SVME_MASK);
320 wrmsrl(MSR_VM_HSAVE_PA,
321 page_to_pfn(svm_data->save_area) << PAGE_SHIFT);
324 static int svm_cpu_init(int cpu)
326 struct svm_cpu_data *svm_data;
329 svm_data = kzalloc(sizeof(struct svm_cpu_data), GFP_KERNEL);
333 svm_data->save_area = alloc_page(GFP_KERNEL);
335 if (!svm_data->save_area)
338 per_cpu(svm_data, cpu) = svm_data;
348 static void set_msr_interception(u32 *msrpm, unsigned msr,
353 for (i = 0; i < NUM_MSR_MAPS; i++) {
354 if (msr >= msrpm_ranges[i] &&
355 msr < msrpm_ranges[i] + MSRS_IN_RANGE) {
356 u32 msr_offset = (i * MSRS_IN_RANGE + msr -
357 msrpm_ranges[i]) * 2;
359 u32 *base = msrpm + (msr_offset / 32);
360 u32 msr_shift = msr_offset % 32;
361 u32 mask = ((write) ? 0 : 2) | ((read) ? 0 : 1);
362 *base = (*base & ~(0x3 << msr_shift)) |
370 static __init int svm_hardware_setup(void)
373 struct page *iopm_pages;
374 struct page *msrpm_pages;
375 void *iopm_va, *msrpm_va;
378 kvm_emulator_want_group7_invlpg();
380 iopm_pages = alloc_pages(GFP_KERNEL, IOPM_ALLOC_ORDER);
385 iopm_va = page_address(iopm_pages);
386 memset(iopm_va, 0xff, PAGE_SIZE * (1 << IOPM_ALLOC_ORDER));
387 clear_bit(0x80, iopm_va); /* allow direct access to PC debug port */
388 iopm_base = page_to_pfn(iopm_pages) << PAGE_SHIFT;
391 msrpm_pages = alloc_pages(GFP_KERNEL, MSRPM_ALLOC_ORDER);
397 msrpm_va = page_address(msrpm_pages);
398 memset(msrpm_va, 0xff, PAGE_SIZE * (1 << MSRPM_ALLOC_ORDER));
399 msrpm_base = page_to_pfn(msrpm_pages) << PAGE_SHIFT;
402 set_msr_interception(msrpm_va, MSR_GS_BASE, 1, 1);
403 set_msr_interception(msrpm_va, MSR_FS_BASE, 1, 1);
404 set_msr_interception(msrpm_va, MSR_KERNEL_GS_BASE, 1, 1);
405 set_msr_interception(msrpm_va, MSR_LSTAR, 1, 1);
406 set_msr_interception(msrpm_va, MSR_CSTAR, 1, 1);
407 set_msr_interception(msrpm_va, MSR_SYSCALL_MASK, 1, 1);
409 set_msr_interception(msrpm_va, MSR_K6_STAR, 1, 1);
410 set_msr_interception(msrpm_va, MSR_IA32_SYSENTER_CS, 1, 1);
411 set_msr_interception(msrpm_va, MSR_IA32_SYSENTER_ESP, 1, 1);
412 set_msr_interception(msrpm_va, MSR_IA32_SYSENTER_EIP, 1, 1);
414 for_each_online_cpu(cpu) {
415 r = svm_cpu_init(cpu);
422 __free_pages(msrpm_pages, MSRPM_ALLOC_ORDER);
425 __free_pages(iopm_pages, IOPM_ALLOC_ORDER);
430 static __exit void svm_hardware_unsetup(void)
432 __free_pages(pfn_to_page(msrpm_base >> PAGE_SHIFT), MSRPM_ALLOC_ORDER);
433 __free_pages(pfn_to_page(iopm_base >> PAGE_SHIFT), IOPM_ALLOC_ORDER);
434 iopm_base = msrpm_base = 0;
437 static void init_seg(struct vmcb_seg *seg)
440 seg->attrib = SVM_SELECTOR_P_MASK | SVM_SELECTOR_S_MASK |
441 SVM_SELECTOR_WRITE_MASK; /* Read/Write Data Segment */
446 static void init_sys_seg(struct vmcb_seg *seg, uint32_t type)
449 seg->attrib = SVM_SELECTOR_P_MASK | type;
454 static void init_vmcb(struct vmcb *vmcb)
456 struct vmcb_control_area *control = &vmcb->control;
457 struct vmcb_save_area *save = &vmcb->save;
459 control->intercept_cr_read = INTERCEPT_CR0_MASK |
463 control->intercept_cr_write = INTERCEPT_CR0_MASK |
467 control->intercept_dr_read = INTERCEPT_DR0_MASK |
472 control->intercept_dr_write = INTERCEPT_DR0_MASK |
479 control->intercept_exceptions = 1 << PF_VECTOR;
482 control->intercept = (1ULL << INTERCEPT_INTR) |
483 (1ULL << INTERCEPT_NMI) |
484 (1ULL << INTERCEPT_SMI) |
486 * selective cr0 intercept bug?
487 * 0: 0f 22 d8 mov %eax,%cr3
488 * 3: 0f 20 c0 mov %cr0,%eax
489 * 6: 0d 00 00 00 80 or $0x80000000,%eax
490 * b: 0f 22 c0 mov %eax,%cr0
491 * set cr3 ->interception
492 * get cr0 ->interception
493 * set cr0 -> no interception
495 /* (1ULL << INTERCEPT_SELECTIVE_CR0) | */
496 (1ULL << INTERCEPT_CPUID) |
497 (1ULL << INTERCEPT_HLT) |
498 (1ULL << INTERCEPT_INVLPGA) |
499 (1ULL << INTERCEPT_IOIO_PROT) |
500 (1ULL << INTERCEPT_MSR_PROT) |
501 (1ULL << INTERCEPT_TASK_SWITCH) |
502 (1ULL << INTERCEPT_SHUTDOWN) |
503 (1ULL << INTERCEPT_VMRUN) |
504 (1ULL << INTERCEPT_VMMCALL) |
505 (1ULL << INTERCEPT_VMLOAD) |
506 (1ULL << INTERCEPT_VMSAVE) |
507 (1ULL << INTERCEPT_STGI) |
508 (1ULL << INTERCEPT_CLGI) |
509 (1ULL << INTERCEPT_SKINIT) |
510 (1ULL << INTERCEPT_MONITOR) |
511 (1ULL << INTERCEPT_MWAIT);
513 control->iopm_base_pa = iopm_base;
514 control->msrpm_base_pa = msrpm_base;
515 control->tsc_offset = 0;
516 control->int_ctl = V_INTR_MASKING_MASK;
524 save->cs.selector = 0xf000;
525 /* Executable/Readable Code Segment */
526 save->cs.attrib = SVM_SELECTOR_READ_MASK | SVM_SELECTOR_P_MASK |
527 SVM_SELECTOR_S_MASK | SVM_SELECTOR_CODE_MASK;
528 save->cs.limit = 0xffff;
530 * cs.base should really be 0xffff0000, but vmx can't handle that, so
531 * be consistent with it.
533 * Replace when we have real mode working for vmx.
535 save->cs.base = 0xf0000;
537 save->gdtr.limit = 0xffff;
538 save->idtr.limit = 0xffff;
540 init_sys_seg(&save->ldtr, SEG_TYPE_LDT);
541 init_sys_seg(&save->tr, SEG_TYPE_BUSY_TSS16);
543 save->efer = MSR_EFER_SVME_MASK;
545 save->dr6 = 0xffff0ff0;
548 save->rip = 0x0000fff0;
551 * cr0 val on cpu init should be 0x60000010, we enable cpu
552 * cache by default. the orderly way is to enable cache in bios.
554 save->cr0 = 0x00000010 | X86_CR0_PG | X86_CR0_WP;
555 save->cr4 = X86_CR4_PAE;
559 static struct kvm_vcpu *svm_create_vcpu(struct kvm *kvm, unsigned int id)
561 struct vcpu_svm *svm;
565 svm = kmem_cache_zalloc(kvm_vcpu_cache, GFP_KERNEL);
571 err = kvm_vcpu_init(&svm->vcpu, kvm, id);
575 page = alloc_page(GFP_KERNEL);
581 svm->vmcb = page_address(page);
582 clear_page(svm->vmcb);
583 svm->vmcb_pa = page_to_pfn(page) << PAGE_SHIFT;
584 svm->asid_generation = 0;
585 memset(svm->db_regs, 0, sizeof(svm->db_regs));
586 init_vmcb(svm->vmcb);
589 svm->vcpu.fpu_active = 1;
590 svm->vcpu.apic_base = 0xfee00000 | MSR_IA32_APICBASE_ENABLE;
591 if (svm->vcpu.vcpu_id == 0)
592 svm->vcpu.apic_base |= MSR_IA32_APICBASE_BSP;
597 kvm_vcpu_uninit(&svm->vcpu);
599 kmem_cache_free(kvm_vcpu_cache, svm);
604 static void svm_free_vcpu(struct kvm_vcpu *vcpu)
606 struct vcpu_svm *svm = to_svm(vcpu);
608 __free_page(pfn_to_page(svm->vmcb_pa >> PAGE_SHIFT));
609 kvm_vcpu_uninit(vcpu);
610 kmem_cache_free(kvm_vcpu_cache, svm);
613 static void svm_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
615 struct vcpu_svm *svm = to_svm(vcpu);
618 if (unlikely(cpu != vcpu->cpu)) {
622 * Make sure that the guest sees a monotonically
626 delta = vcpu->host_tsc - tsc_this;
627 svm->vmcb->control.tsc_offset += delta;
631 for (i = 0; i < NR_HOST_SAVE_USER_MSRS; i++)
632 rdmsrl(host_save_user_msrs[i], svm->host_user_msrs[i]);
635 static void svm_vcpu_put(struct kvm_vcpu *vcpu)
637 struct vcpu_svm *svm = to_svm(vcpu);
640 for (i = 0; i < NR_HOST_SAVE_USER_MSRS; i++)
641 wrmsrl(host_save_user_msrs[i], svm->host_user_msrs[i]);
643 rdtscll(vcpu->host_tsc);
646 static void svm_vcpu_decache(struct kvm_vcpu *vcpu)
650 static void svm_cache_regs(struct kvm_vcpu *vcpu)
652 struct vcpu_svm *svm = to_svm(vcpu);
654 vcpu->regs[VCPU_REGS_RAX] = svm->vmcb->save.rax;
655 vcpu->regs[VCPU_REGS_RSP] = svm->vmcb->save.rsp;
656 vcpu->rip = svm->vmcb->save.rip;
659 static void svm_decache_regs(struct kvm_vcpu *vcpu)
661 struct vcpu_svm *svm = to_svm(vcpu);
662 svm->vmcb->save.rax = vcpu->regs[VCPU_REGS_RAX];
663 svm->vmcb->save.rsp = vcpu->regs[VCPU_REGS_RSP];
664 svm->vmcb->save.rip = vcpu->rip;
667 static unsigned long svm_get_rflags(struct kvm_vcpu *vcpu)
669 return to_svm(vcpu)->vmcb->save.rflags;
672 static void svm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
674 to_svm(vcpu)->vmcb->save.rflags = rflags;
677 static struct vmcb_seg *svm_seg(struct kvm_vcpu *vcpu, int seg)
679 struct vmcb_save_area *save = &to_svm(vcpu)->vmcb->save;
682 case VCPU_SREG_CS: return &save->cs;
683 case VCPU_SREG_DS: return &save->ds;
684 case VCPU_SREG_ES: return &save->es;
685 case VCPU_SREG_FS: return &save->fs;
686 case VCPU_SREG_GS: return &save->gs;
687 case VCPU_SREG_SS: return &save->ss;
688 case VCPU_SREG_TR: return &save->tr;
689 case VCPU_SREG_LDTR: return &save->ldtr;
695 static u64 svm_get_segment_base(struct kvm_vcpu *vcpu, int seg)
697 struct vmcb_seg *s = svm_seg(vcpu, seg);
702 static void svm_get_segment(struct kvm_vcpu *vcpu,
703 struct kvm_segment *var, int seg)
705 struct vmcb_seg *s = svm_seg(vcpu, seg);
708 var->limit = s->limit;
709 var->selector = s->selector;
710 var->type = s->attrib & SVM_SELECTOR_TYPE_MASK;
711 var->s = (s->attrib >> SVM_SELECTOR_S_SHIFT) & 1;
712 var->dpl = (s->attrib >> SVM_SELECTOR_DPL_SHIFT) & 3;
713 var->present = (s->attrib >> SVM_SELECTOR_P_SHIFT) & 1;
714 var->avl = (s->attrib >> SVM_SELECTOR_AVL_SHIFT) & 1;
715 var->l = (s->attrib >> SVM_SELECTOR_L_SHIFT) & 1;
716 var->db = (s->attrib >> SVM_SELECTOR_DB_SHIFT) & 1;
717 var->g = (s->attrib >> SVM_SELECTOR_G_SHIFT) & 1;
718 var->unusable = !var->present;
721 static void svm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
723 struct vmcb_seg *s = svm_seg(vcpu, VCPU_SREG_CS);
725 *db = (s->attrib >> SVM_SELECTOR_DB_SHIFT) & 1;
726 *l = (s->attrib >> SVM_SELECTOR_L_SHIFT) & 1;
729 static void svm_get_idt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
731 struct vcpu_svm *svm = to_svm(vcpu);
733 dt->limit = svm->vmcb->save.idtr.limit;
734 dt->base = svm->vmcb->save.idtr.base;
737 static void svm_set_idt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
739 struct vcpu_svm *svm = to_svm(vcpu);
741 svm->vmcb->save.idtr.limit = dt->limit;
742 svm->vmcb->save.idtr.base = dt->base ;
745 static void svm_get_gdt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
747 struct vcpu_svm *svm = to_svm(vcpu);
749 dt->limit = svm->vmcb->save.gdtr.limit;
750 dt->base = svm->vmcb->save.gdtr.base;
753 static void svm_set_gdt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
755 struct vcpu_svm *svm = to_svm(vcpu);
757 svm->vmcb->save.gdtr.limit = dt->limit;
758 svm->vmcb->save.gdtr.base = dt->base ;
761 static void svm_decache_cr4_guest_bits(struct kvm_vcpu *vcpu)
765 static void svm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
767 struct vcpu_svm *svm = to_svm(vcpu);
770 if (vcpu->shadow_efer & KVM_EFER_LME) {
771 if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
772 vcpu->shadow_efer |= KVM_EFER_LMA;
773 svm->vmcb->save.efer |= KVM_EFER_LMA | KVM_EFER_LME;
776 if (is_paging(vcpu) && !(cr0 & X86_CR0_PG) ) {
777 vcpu->shadow_efer &= ~KVM_EFER_LMA;
778 svm->vmcb->save.efer &= ~(KVM_EFER_LMA | KVM_EFER_LME);
782 if ((vcpu->cr0 & X86_CR0_TS) && !(cr0 & X86_CR0_TS)) {
783 svm->vmcb->control.intercept_exceptions &= ~(1 << NM_VECTOR);
784 vcpu->fpu_active = 1;
788 cr0 |= X86_CR0_PG | X86_CR0_WP;
789 cr0 &= ~(X86_CR0_CD | X86_CR0_NW);
790 svm->vmcb->save.cr0 = cr0;
793 static void svm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
796 to_svm(vcpu)->vmcb->save.cr4 = cr4 | X86_CR4_PAE;
799 static void svm_set_segment(struct kvm_vcpu *vcpu,
800 struct kvm_segment *var, int seg)
802 struct vcpu_svm *svm = to_svm(vcpu);
803 struct vmcb_seg *s = svm_seg(vcpu, seg);
806 s->limit = var->limit;
807 s->selector = var->selector;
811 s->attrib = (var->type & SVM_SELECTOR_TYPE_MASK);
812 s->attrib |= (var->s & 1) << SVM_SELECTOR_S_SHIFT;
813 s->attrib |= (var->dpl & 3) << SVM_SELECTOR_DPL_SHIFT;
814 s->attrib |= (var->present & 1) << SVM_SELECTOR_P_SHIFT;
815 s->attrib |= (var->avl & 1) << SVM_SELECTOR_AVL_SHIFT;
816 s->attrib |= (var->l & 1) << SVM_SELECTOR_L_SHIFT;
817 s->attrib |= (var->db & 1) << SVM_SELECTOR_DB_SHIFT;
818 s->attrib |= (var->g & 1) << SVM_SELECTOR_G_SHIFT;
820 if (seg == VCPU_SREG_CS)
822 = (svm->vmcb->save.cs.attrib
823 >> SVM_SELECTOR_DPL_SHIFT) & 3;
829 svm(vcpu)->vmcb->control.int_ctl &= ~V_TPR_MASK;
830 svm(vcpu)->vmcb->control.int_ctl |= (sregs->cr8 & V_TPR_MASK);
834 static int svm_guest_debug(struct kvm_vcpu *vcpu, struct kvm_debug_guest *dbg)
839 static void load_host_msrs(struct kvm_vcpu *vcpu)
842 wrmsrl(MSR_GS_BASE, to_svm(vcpu)->host_gs_base);
846 static void save_host_msrs(struct kvm_vcpu *vcpu)
849 rdmsrl(MSR_GS_BASE, to_svm(vcpu)->host_gs_base);
853 static void new_asid(struct vcpu_svm *svm, struct svm_cpu_data *svm_data)
855 if (svm_data->next_asid > svm_data->max_asid) {
856 ++svm_data->asid_generation;
857 svm_data->next_asid = 1;
858 svm->vmcb->control.tlb_ctl = TLB_CONTROL_FLUSH_ALL_ASID;
861 svm->vcpu.cpu = svm_data->cpu;
862 svm->asid_generation = svm_data->asid_generation;
863 svm->vmcb->control.asid = svm_data->next_asid++;
866 static void svm_invlpg(struct kvm_vcpu *vcpu, gva_t address)
868 invlpga(address, to_svm(vcpu)->vmcb->control.asid); // is needed?
871 static unsigned long svm_get_dr(struct kvm_vcpu *vcpu, int dr)
873 return to_svm(vcpu)->db_regs[dr];
876 static void svm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long value,
879 struct vcpu_svm *svm = to_svm(vcpu);
883 if (svm->vmcb->save.dr7 & DR7_GD_MASK) {
884 svm->vmcb->save.dr7 &= ~DR7_GD_MASK;
885 svm->vmcb->save.dr6 |= DR6_BD_MASK;
886 *exception = DB_VECTOR;
892 svm->db_regs[dr] = value;
895 if (vcpu->cr4 & X86_CR4_DE) {
896 *exception = UD_VECTOR;
900 if (value & ~((1ULL << 32) - 1)) {
901 *exception = GP_VECTOR;
904 svm->vmcb->save.dr7 = value;
908 printk(KERN_DEBUG "%s: unexpected dr %u\n",
910 *exception = UD_VECTOR;
915 static int pf_interception(struct vcpu_svm *svm, struct kvm_run *kvm_run)
917 u32 exit_int_info = svm->vmcb->control.exit_int_info;
918 struct kvm *kvm = svm->vcpu.kvm;
921 enum emulation_result er;
924 if (is_external_interrupt(exit_int_info))
925 push_irq(&svm->vcpu, exit_int_info & SVM_EVTINJ_VEC_MASK);
927 mutex_lock(&kvm->lock);
929 fault_address = svm->vmcb->control.exit_info_2;
930 error_code = svm->vmcb->control.exit_info_1;
931 r = kvm_mmu_page_fault(&svm->vcpu, fault_address, error_code);
933 mutex_unlock(&kvm->lock);
937 mutex_unlock(&kvm->lock);
940 er = emulate_instruction(&svm->vcpu, kvm_run, fault_address,
942 mutex_unlock(&kvm->lock);
947 case EMULATE_DO_MMIO:
948 ++svm->vcpu.stat.mmio_exits;
951 vcpu_printf(&svm->vcpu, "%s: emulate fail\n", __FUNCTION__);
957 kvm_run->exit_reason = KVM_EXIT_UNKNOWN;
961 static int nm_interception(struct vcpu_svm *svm, struct kvm_run *kvm_run)
963 svm->vmcb->control.intercept_exceptions &= ~(1 << NM_VECTOR);
964 if (!(svm->vcpu.cr0 & X86_CR0_TS))
965 svm->vmcb->save.cr0 &= ~X86_CR0_TS;
966 svm->vcpu.fpu_active = 1;
971 static int shutdown_interception(struct vcpu_svm *svm, struct kvm_run *kvm_run)
974 * VMCB is undefined after a SHUTDOWN intercept
975 * so reinitialize it.
977 clear_page(svm->vmcb);
978 init_vmcb(svm->vmcb);
980 kvm_run->exit_reason = KVM_EXIT_SHUTDOWN;
984 static int io_interception(struct vcpu_svm *svm, struct kvm_run *kvm_run)
986 u32 io_info = svm->vmcb->control.exit_info_1; //address size bug?
987 int size, down, in, string, rep;
990 ++svm->vcpu.stat.io_exits;
992 svm->next_rip = svm->vmcb->control.exit_info_2;
994 string = (io_info & SVM_IOIO_STR_MASK) != 0;
997 if (emulate_instruction(&svm->vcpu, kvm_run, 0, 0) == EMULATE_DO_MMIO)
1002 in = (io_info & SVM_IOIO_TYPE_MASK) != 0;
1003 port = io_info >> 16;
1004 size = (io_info & SVM_IOIO_SIZE_MASK) >> SVM_IOIO_SIZE_SHIFT;
1005 rep = (io_info & SVM_IOIO_REP_MASK) != 0;
1006 down = (svm->vmcb->save.rflags & X86_EFLAGS_DF) != 0;
1008 return kvm_setup_pio(&svm->vcpu, kvm_run, in, size, 1, 0,
1009 down, 0, rep, port);
1012 static int nop_on_interception(struct vcpu_svm *svm, struct kvm_run *kvm_run)
1017 static int halt_interception(struct vcpu_svm *svm, struct kvm_run *kvm_run)
1019 svm->next_rip = svm->vmcb->save.rip + 1;
1020 skip_emulated_instruction(&svm->vcpu);
1021 return kvm_emulate_halt(&svm->vcpu);
1024 static int vmmcall_interception(struct vcpu_svm *svm, struct kvm_run *kvm_run)
1026 svm->next_rip = svm->vmcb->save.rip + 3;
1027 skip_emulated_instruction(&svm->vcpu);
1028 return kvm_hypercall(&svm->vcpu, kvm_run);
1031 static int invalid_op_interception(struct vcpu_svm *svm,
1032 struct kvm_run *kvm_run)
1034 inject_ud(&svm->vcpu);
1038 static int task_switch_interception(struct vcpu_svm *svm,
1039 struct kvm_run *kvm_run)
1041 pr_unimpl(&svm->vcpu, "%s: task switch is unsupported\n", __FUNCTION__);
1042 kvm_run->exit_reason = KVM_EXIT_UNKNOWN;
1046 static int cpuid_interception(struct vcpu_svm *svm, struct kvm_run *kvm_run)
1048 svm->next_rip = svm->vmcb->save.rip + 2;
1049 kvm_emulate_cpuid(&svm->vcpu);
1053 static int emulate_on_interception(struct vcpu_svm *svm,
1054 struct kvm_run *kvm_run)
1056 if (emulate_instruction(&svm->vcpu, NULL, 0, 0) != EMULATE_DONE)
1057 pr_unimpl(&svm->vcpu, "%s: failed\n", __FUNCTION__);
1061 static int svm_get_msr(struct kvm_vcpu *vcpu, unsigned ecx, u64 *data)
1063 struct vcpu_svm *svm = to_svm(vcpu);
1066 case MSR_IA32_TIME_STAMP_COUNTER: {
1070 *data = svm->vmcb->control.tsc_offset + tsc;
1074 *data = svm->vmcb->save.star;
1076 #ifdef CONFIG_X86_64
1078 *data = svm->vmcb->save.lstar;
1081 *data = svm->vmcb->save.cstar;
1083 case MSR_KERNEL_GS_BASE:
1084 *data = svm->vmcb->save.kernel_gs_base;
1086 case MSR_SYSCALL_MASK:
1087 *data = svm->vmcb->save.sfmask;
1090 case MSR_IA32_SYSENTER_CS:
1091 *data = svm->vmcb->save.sysenter_cs;
1093 case MSR_IA32_SYSENTER_EIP:
1094 *data = svm->vmcb->save.sysenter_eip;
1096 case MSR_IA32_SYSENTER_ESP:
1097 *data = svm->vmcb->save.sysenter_esp;
1100 return kvm_get_msr_common(vcpu, ecx, data);
1105 static int rdmsr_interception(struct vcpu_svm *svm, struct kvm_run *kvm_run)
1107 u32 ecx = svm->vcpu.regs[VCPU_REGS_RCX];
1110 if (svm_get_msr(&svm->vcpu, ecx, &data))
1111 svm_inject_gp(&svm->vcpu, 0);
1113 svm->vmcb->save.rax = data & 0xffffffff;
1114 svm->vcpu.regs[VCPU_REGS_RDX] = data >> 32;
1115 svm->next_rip = svm->vmcb->save.rip + 2;
1116 skip_emulated_instruction(&svm->vcpu);
1121 static int svm_set_msr(struct kvm_vcpu *vcpu, unsigned ecx, u64 data)
1123 struct vcpu_svm *svm = to_svm(vcpu);
1126 case MSR_IA32_TIME_STAMP_COUNTER: {
1130 svm->vmcb->control.tsc_offset = data - tsc;
1134 svm->vmcb->save.star = data;
1136 #ifdef CONFIG_X86_64
1138 svm->vmcb->save.lstar = data;
1141 svm->vmcb->save.cstar = data;
1143 case MSR_KERNEL_GS_BASE:
1144 svm->vmcb->save.kernel_gs_base = data;
1146 case MSR_SYSCALL_MASK:
1147 svm->vmcb->save.sfmask = data;
1150 case MSR_IA32_SYSENTER_CS:
1151 svm->vmcb->save.sysenter_cs = data;
1153 case MSR_IA32_SYSENTER_EIP:
1154 svm->vmcb->save.sysenter_eip = data;
1156 case MSR_IA32_SYSENTER_ESP:
1157 svm->vmcb->save.sysenter_esp = data;
1160 return kvm_set_msr_common(vcpu, ecx, data);
1165 static int wrmsr_interception(struct vcpu_svm *svm, struct kvm_run *kvm_run)
1167 u32 ecx = svm->vcpu.regs[VCPU_REGS_RCX];
1168 u64 data = (svm->vmcb->save.rax & -1u)
1169 | ((u64)(svm->vcpu.regs[VCPU_REGS_RDX] & -1u) << 32);
1170 svm->next_rip = svm->vmcb->save.rip + 2;
1171 if (svm_set_msr(&svm->vcpu, ecx, data))
1172 svm_inject_gp(&svm->vcpu, 0);
1174 skip_emulated_instruction(&svm->vcpu);
1178 static int msr_interception(struct vcpu_svm *svm, struct kvm_run *kvm_run)
1180 if (svm->vmcb->control.exit_info_1)
1181 return wrmsr_interception(svm, kvm_run);
1183 return rdmsr_interception(svm, kvm_run);
1186 static int interrupt_window_interception(struct vcpu_svm *svm,
1187 struct kvm_run *kvm_run)
1190 * If the user space waits to inject interrupts, exit as soon as
1193 if (kvm_run->request_interrupt_window &&
1194 !svm->vcpu.irq_summary) {
1195 ++svm->vcpu.stat.irq_window_exits;
1196 kvm_run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
1203 static int (*svm_exit_handlers[])(struct vcpu_svm *svm,
1204 struct kvm_run *kvm_run) = {
1205 [SVM_EXIT_READ_CR0] = emulate_on_interception,
1206 [SVM_EXIT_READ_CR3] = emulate_on_interception,
1207 [SVM_EXIT_READ_CR4] = emulate_on_interception,
1209 [SVM_EXIT_WRITE_CR0] = emulate_on_interception,
1210 [SVM_EXIT_WRITE_CR3] = emulate_on_interception,
1211 [SVM_EXIT_WRITE_CR4] = emulate_on_interception,
1212 [SVM_EXIT_READ_DR0] = emulate_on_interception,
1213 [SVM_EXIT_READ_DR1] = emulate_on_interception,
1214 [SVM_EXIT_READ_DR2] = emulate_on_interception,
1215 [SVM_EXIT_READ_DR3] = emulate_on_interception,
1216 [SVM_EXIT_WRITE_DR0] = emulate_on_interception,
1217 [SVM_EXIT_WRITE_DR1] = emulate_on_interception,
1218 [SVM_EXIT_WRITE_DR2] = emulate_on_interception,
1219 [SVM_EXIT_WRITE_DR3] = emulate_on_interception,
1220 [SVM_EXIT_WRITE_DR5] = emulate_on_interception,
1221 [SVM_EXIT_WRITE_DR7] = emulate_on_interception,
1222 [SVM_EXIT_EXCP_BASE + PF_VECTOR] = pf_interception,
1223 [SVM_EXIT_EXCP_BASE + NM_VECTOR] = nm_interception,
1224 [SVM_EXIT_INTR] = nop_on_interception,
1225 [SVM_EXIT_NMI] = nop_on_interception,
1226 [SVM_EXIT_SMI] = nop_on_interception,
1227 [SVM_EXIT_INIT] = nop_on_interception,
1228 [SVM_EXIT_VINTR] = interrupt_window_interception,
1229 /* [SVM_EXIT_CR0_SEL_WRITE] = emulate_on_interception, */
1230 [SVM_EXIT_CPUID] = cpuid_interception,
1231 [SVM_EXIT_HLT] = halt_interception,
1232 [SVM_EXIT_INVLPG] = emulate_on_interception,
1233 [SVM_EXIT_INVLPGA] = invalid_op_interception,
1234 [SVM_EXIT_IOIO] = io_interception,
1235 [SVM_EXIT_MSR] = msr_interception,
1236 [SVM_EXIT_TASK_SWITCH] = task_switch_interception,
1237 [SVM_EXIT_SHUTDOWN] = shutdown_interception,
1238 [SVM_EXIT_VMRUN] = invalid_op_interception,
1239 [SVM_EXIT_VMMCALL] = vmmcall_interception,
1240 [SVM_EXIT_VMLOAD] = invalid_op_interception,
1241 [SVM_EXIT_VMSAVE] = invalid_op_interception,
1242 [SVM_EXIT_STGI] = invalid_op_interception,
1243 [SVM_EXIT_CLGI] = invalid_op_interception,
1244 [SVM_EXIT_SKINIT] = invalid_op_interception,
1245 [SVM_EXIT_MONITOR] = invalid_op_interception,
1246 [SVM_EXIT_MWAIT] = invalid_op_interception,
1250 static int handle_exit(struct vcpu_svm *svm, struct kvm_run *kvm_run)
1252 u32 exit_code = svm->vmcb->control.exit_code;
1254 if (is_external_interrupt(svm->vmcb->control.exit_int_info) &&
1255 exit_code != SVM_EXIT_EXCP_BASE + PF_VECTOR)
1256 printk(KERN_ERR "%s: unexpected exit_ini_info 0x%x "
1258 __FUNCTION__, svm->vmcb->control.exit_int_info,
1261 if (exit_code >= ARRAY_SIZE(svm_exit_handlers)
1262 || svm_exit_handlers[exit_code] == 0) {
1263 kvm_run->exit_reason = KVM_EXIT_UNKNOWN;
1264 kvm_run->hw.hardware_exit_reason = exit_code;
1268 return svm_exit_handlers[exit_code](svm, kvm_run);
1271 static void reload_tss(struct kvm_vcpu *vcpu)
1273 int cpu = raw_smp_processor_id();
1275 struct svm_cpu_data *svm_data = per_cpu(svm_data, cpu);
1276 svm_data->tss_desc->type = 9; //available 32/64-bit TSS
1280 static void pre_svm_run(struct vcpu_svm *svm)
1282 int cpu = raw_smp_processor_id();
1284 struct svm_cpu_data *svm_data = per_cpu(svm_data, cpu);
1286 svm->vmcb->control.tlb_ctl = TLB_CONTROL_DO_NOTHING;
1287 if (svm->vcpu.cpu != cpu ||
1288 svm->asid_generation != svm_data->asid_generation)
1289 new_asid(svm, svm_data);
1293 static inline void inject_irq(struct vcpu_svm *svm)
1295 struct vmcb_control_area *control;
1297 control = &svm->vmcb->control;
1298 control->int_vector = pop_irq(&svm->vcpu);
1299 control->int_ctl &= ~V_INTR_PRIO_MASK;
1300 control->int_ctl |= V_IRQ_MASK |
1301 ((/*control->int_vector >> 4*/ 0xf) << V_INTR_PRIO_SHIFT);
1304 static void reput_irq(struct vcpu_svm *svm)
1306 struct vmcb_control_area *control = &svm->vmcb->control;
1308 if (control->int_ctl & V_IRQ_MASK) {
1309 control->int_ctl &= ~V_IRQ_MASK;
1310 push_irq(&svm->vcpu, control->int_vector);
1313 svm->vcpu.interrupt_window_open =
1314 !(control->int_state & SVM_INTERRUPT_SHADOW_MASK);
1317 static void do_interrupt_requests(struct vcpu_svm *svm,
1318 struct kvm_run *kvm_run)
1320 struct vmcb_control_area *control = &svm->vmcb->control;
1322 svm->vcpu.interrupt_window_open =
1323 (!(control->int_state & SVM_INTERRUPT_SHADOW_MASK) &&
1324 (svm->vmcb->save.rflags & X86_EFLAGS_IF));
1326 if (svm->vcpu.interrupt_window_open && svm->vcpu.irq_summary)
1328 * If interrupts enabled, and not blocked by sti or mov ss. Good.
1333 * Interrupts blocked. Wait for unblock.
1335 if (!svm->vcpu.interrupt_window_open &&
1336 (svm->vcpu.irq_summary || kvm_run->request_interrupt_window)) {
1337 control->intercept |= 1ULL << INTERCEPT_VINTR;
1339 control->intercept &= ~(1ULL << INTERCEPT_VINTR);
1342 static void post_kvm_run_save(struct vcpu_svm *svm,
1343 struct kvm_run *kvm_run)
1345 kvm_run->ready_for_interrupt_injection
1346 = (svm->vcpu.interrupt_window_open &&
1347 svm->vcpu.irq_summary == 0);
1348 kvm_run->if_flag = (svm->vmcb->save.rflags & X86_EFLAGS_IF) != 0;
1349 kvm_run->cr8 = svm->vcpu.cr8;
1350 kvm_run->apic_base = svm->vcpu.apic_base;
1354 * Check if userspace requested an interrupt window, and that the
1355 * interrupt window is open.
1357 * No need to exit to userspace if we already have an interrupt queued.
1359 static int dm_request_for_irq_injection(struct vcpu_svm *svm,
1360 struct kvm_run *kvm_run)
1362 return (!svm->vcpu.irq_summary &&
1363 kvm_run->request_interrupt_window &&
1364 svm->vcpu.interrupt_window_open &&
1365 (svm->vmcb->save.rflags & X86_EFLAGS_IF));
1368 static void save_db_regs(unsigned long *db_regs)
1370 asm volatile ("mov %%dr0, %0" : "=r"(db_regs[0]));
1371 asm volatile ("mov %%dr1, %0" : "=r"(db_regs[1]));
1372 asm volatile ("mov %%dr2, %0" : "=r"(db_regs[2]));
1373 asm volatile ("mov %%dr3, %0" : "=r"(db_regs[3]));
1376 static void load_db_regs(unsigned long *db_regs)
1378 asm volatile ("mov %0, %%dr0" : : "r"(db_regs[0]));
1379 asm volatile ("mov %0, %%dr1" : : "r"(db_regs[1]));
1380 asm volatile ("mov %0, %%dr2" : : "r"(db_regs[2]));
1381 asm volatile ("mov %0, %%dr3" : : "r"(db_regs[3]));
1384 static void svm_flush_tlb(struct kvm_vcpu *vcpu)
1386 force_new_asid(vcpu);
1389 static int svm_vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1391 struct vcpu_svm *svm = to_svm(vcpu);
1398 r = kvm_mmu_reload(vcpu);
1402 if (!vcpu->mmio_read_completed)
1403 do_interrupt_requests(svm, kvm_run);
1407 vcpu->guest_mode = 1;
1409 if (test_and_clear_bit(KVM_TLB_FLUSH, &vcpu->requests))
1410 svm_flush_tlb(vcpu);
1414 save_host_msrs(vcpu);
1415 fs_selector = read_fs();
1416 gs_selector = read_gs();
1417 ldt_selector = read_ldt();
1418 svm->host_cr2 = kvm_read_cr2();
1419 svm->host_dr6 = read_dr6();
1420 svm->host_dr7 = read_dr7();
1421 svm->vmcb->save.cr2 = vcpu->cr2;
1423 if (svm->vmcb->save.dr7 & 0xff) {
1425 save_db_regs(svm->host_db_regs);
1426 load_db_regs(svm->db_regs);
1429 if (vcpu->fpu_active) {
1430 fx_save(&vcpu->host_fx_image);
1431 fx_restore(&vcpu->guest_fx_image);
1435 #ifdef CONFIG_X86_64
1436 "push %%rbx; push %%rcx; push %%rdx;"
1437 "push %%rsi; push %%rdi; push %%rbp;"
1438 "push %%r8; push %%r9; push %%r10; push %%r11;"
1439 "push %%r12; push %%r13; push %%r14; push %%r15;"
1441 "push %%ebx; push %%ecx; push %%edx;"
1442 "push %%esi; push %%edi; push %%ebp;"
1445 #ifdef CONFIG_X86_64
1446 "mov %c[rbx](%[svm]), %%rbx \n\t"
1447 "mov %c[rcx](%[svm]), %%rcx \n\t"
1448 "mov %c[rdx](%[svm]), %%rdx \n\t"
1449 "mov %c[rsi](%[svm]), %%rsi \n\t"
1450 "mov %c[rdi](%[svm]), %%rdi \n\t"
1451 "mov %c[rbp](%[svm]), %%rbp \n\t"
1452 "mov %c[r8](%[svm]), %%r8 \n\t"
1453 "mov %c[r9](%[svm]), %%r9 \n\t"
1454 "mov %c[r10](%[svm]), %%r10 \n\t"
1455 "mov %c[r11](%[svm]), %%r11 \n\t"
1456 "mov %c[r12](%[svm]), %%r12 \n\t"
1457 "mov %c[r13](%[svm]), %%r13 \n\t"
1458 "mov %c[r14](%[svm]), %%r14 \n\t"
1459 "mov %c[r15](%[svm]), %%r15 \n\t"
1461 "mov %c[rbx](%[svm]), %%ebx \n\t"
1462 "mov %c[rcx](%[svm]), %%ecx \n\t"
1463 "mov %c[rdx](%[svm]), %%edx \n\t"
1464 "mov %c[rsi](%[svm]), %%esi \n\t"
1465 "mov %c[rdi](%[svm]), %%edi \n\t"
1466 "mov %c[rbp](%[svm]), %%ebp \n\t"
1469 #ifdef CONFIG_X86_64
1470 /* Enter guest mode */
1472 "mov %c[vmcb](%[svm]), %%rax \n\t"
1478 /* Enter guest mode */
1480 "mov %c[vmcb](%[svm]), %%eax \n\t"
1487 /* Save guest registers, load host registers */
1488 #ifdef CONFIG_X86_64
1489 "mov %%rbx, %c[rbx](%[svm]) \n\t"
1490 "mov %%rcx, %c[rcx](%[svm]) \n\t"
1491 "mov %%rdx, %c[rdx](%[svm]) \n\t"
1492 "mov %%rsi, %c[rsi](%[svm]) \n\t"
1493 "mov %%rdi, %c[rdi](%[svm]) \n\t"
1494 "mov %%rbp, %c[rbp](%[svm]) \n\t"
1495 "mov %%r8, %c[r8](%[svm]) \n\t"
1496 "mov %%r9, %c[r9](%[svm]) \n\t"
1497 "mov %%r10, %c[r10](%[svm]) \n\t"
1498 "mov %%r11, %c[r11](%[svm]) \n\t"
1499 "mov %%r12, %c[r12](%[svm]) \n\t"
1500 "mov %%r13, %c[r13](%[svm]) \n\t"
1501 "mov %%r14, %c[r14](%[svm]) \n\t"
1502 "mov %%r15, %c[r15](%[svm]) \n\t"
1504 "pop %%r15; pop %%r14; pop %%r13; pop %%r12;"
1505 "pop %%r11; pop %%r10; pop %%r9; pop %%r8;"
1506 "pop %%rbp; pop %%rdi; pop %%rsi;"
1507 "pop %%rdx; pop %%rcx; pop %%rbx; \n\t"
1509 "mov %%ebx, %c[rbx](%[svm]) \n\t"
1510 "mov %%ecx, %c[rcx](%[svm]) \n\t"
1511 "mov %%edx, %c[rdx](%[svm]) \n\t"
1512 "mov %%esi, %c[rsi](%[svm]) \n\t"
1513 "mov %%edi, %c[rdi](%[svm]) \n\t"
1514 "mov %%ebp, %c[rbp](%[svm]) \n\t"
1516 "pop %%ebp; pop %%edi; pop %%esi;"
1517 "pop %%edx; pop %%ecx; pop %%ebx; \n\t"
1521 [vmcb]"i"(offsetof(struct vcpu_svm, vmcb_pa)),
1522 [rbx]"i"(offsetof(struct vcpu_svm,vcpu.regs[VCPU_REGS_RBX])),
1523 [rcx]"i"(offsetof(struct vcpu_svm,vcpu.regs[VCPU_REGS_RCX])),
1524 [rdx]"i"(offsetof(struct vcpu_svm,vcpu.regs[VCPU_REGS_RDX])),
1525 [rsi]"i"(offsetof(struct vcpu_svm,vcpu.regs[VCPU_REGS_RSI])),
1526 [rdi]"i"(offsetof(struct vcpu_svm,vcpu.regs[VCPU_REGS_RDI])),
1527 [rbp]"i"(offsetof(struct vcpu_svm,vcpu.regs[VCPU_REGS_RBP]))
1528 #ifdef CONFIG_X86_64
1529 ,[r8 ]"i"(offsetof(struct vcpu_svm,vcpu.regs[VCPU_REGS_R8])),
1530 [r9 ]"i"(offsetof(struct vcpu_svm,vcpu.regs[VCPU_REGS_R9 ])),
1531 [r10]"i"(offsetof(struct vcpu_svm,vcpu.regs[VCPU_REGS_R10])),
1532 [r11]"i"(offsetof(struct vcpu_svm,vcpu.regs[VCPU_REGS_R11])),
1533 [r12]"i"(offsetof(struct vcpu_svm,vcpu.regs[VCPU_REGS_R12])),
1534 [r13]"i"(offsetof(struct vcpu_svm,vcpu.regs[VCPU_REGS_R13])),
1535 [r14]"i"(offsetof(struct vcpu_svm,vcpu.regs[VCPU_REGS_R14])),
1536 [r15]"i"(offsetof(struct vcpu_svm,vcpu.regs[VCPU_REGS_R15]))
1540 vcpu->guest_mode = 0;
1542 if (vcpu->fpu_active) {
1543 fx_save(&vcpu->guest_fx_image);
1544 fx_restore(&vcpu->host_fx_image);
1547 if ((svm->vmcb->save.dr7 & 0xff))
1548 load_db_regs(svm->host_db_regs);
1550 vcpu->cr2 = svm->vmcb->save.cr2;
1552 write_dr6(svm->host_dr6);
1553 write_dr7(svm->host_dr7);
1554 kvm_write_cr2(svm->host_cr2);
1556 load_fs(fs_selector);
1557 load_gs(gs_selector);
1558 load_ldt(ldt_selector);
1559 load_host_msrs(vcpu);
1564 * Profile KVM exit RIPs:
1566 if (unlikely(prof_on == KVM_PROFILING))
1567 profile_hit(KVM_PROFILING,
1568 (void *)(unsigned long)svm->vmcb->save.rip);
1576 if (svm->vmcb->control.exit_code == SVM_EXIT_ERR) {
1577 kvm_run->exit_reason = KVM_EXIT_FAIL_ENTRY;
1578 kvm_run->fail_entry.hardware_entry_failure_reason
1579 = svm->vmcb->control.exit_code;
1580 post_kvm_run_save(svm, kvm_run);
1584 r = handle_exit(svm, kvm_run);
1586 if (signal_pending(current)) {
1587 ++vcpu->stat.signal_exits;
1588 post_kvm_run_save(svm, kvm_run);
1589 kvm_run->exit_reason = KVM_EXIT_INTR;
1593 if (dm_request_for_irq_injection(svm, kvm_run)) {
1594 ++vcpu->stat.request_irq_exits;
1595 post_kvm_run_save(svm, kvm_run);
1596 kvm_run->exit_reason = KVM_EXIT_INTR;
1602 post_kvm_run_save(svm, kvm_run);
1606 static void svm_set_cr3(struct kvm_vcpu *vcpu, unsigned long root)
1608 struct vcpu_svm *svm = to_svm(vcpu);
1610 svm->vmcb->save.cr3 = root;
1611 force_new_asid(vcpu);
1613 if (vcpu->fpu_active) {
1614 svm->vmcb->control.intercept_exceptions |= (1 << NM_VECTOR);
1615 svm->vmcb->save.cr0 |= X86_CR0_TS;
1616 vcpu->fpu_active = 0;
1620 static void svm_inject_page_fault(struct kvm_vcpu *vcpu,
1624 struct vcpu_svm *svm = to_svm(vcpu);
1625 uint32_t exit_int_info = svm->vmcb->control.exit_int_info;
1627 ++vcpu->stat.pf_guest;
1629 if (is_page_fault(exit_int_info)) {
1631 svm->vmcb->control.event_inj_err = 0;
1632 svm->vmcb->control.event_inj = SVM_EVTINJ_VALID |
1633 SVM_EVTINJ_VALID_ERR |
1634 SVM_EVTINJ_TYPE_EXEPT |
1639 svm->vmcb->save.cr2 = addr;
1640 svm->vmcb->control.event_inj = SVM_EVTINJ_VALID |
1641 SVM_EVTINJ_VALID_ERR |
1642 SVM_EVTINJ_TYPE_EXEPT |
1644 svm->vmcb->control.event_inj_err = err_code;
1648 static int is_disabled(void)
1652 rdmsrl(MSR_VM_CR, vm_cr);
1653 if (vm_cr & (1 << SVM_VM_CR_SVM_DISABLE))
1660 svm_patch_hypercall(struct kvm_vcpu *vcpu, unsigned char *hypercall)
1663 * Patch in the VMMCALL instruction:
1665 hypercall[0] = 0x0f;
1666 hypercall[1] = 0x01;
1667 hypercall[2] = 0xd9;
1668 hypercall[3] = 0xc3;
1671 static void svm_check_processor_compat(void *rtn)
1676 static struct kvm_arch_ops svm_arch_ops = {
1677 .cpu_has_kvm_support = has_svm,
1678 .disabled_by_bios = is_disabled,
1679 .hardware_setup = svm_hardware_setup,
1680 .hardware_unsetup = svm_hardware_unsetup,
1681 .check_processor_compatibility = svm_check_processor_compat,
1682 .hardware_enable = svm_hardware_enable,
1683 .hardware_disable = svm_hardware_disable,
1685 .vcpu_create = svm_create_vcpu,
1686 .vcpu_free = svm_free_vcpu,
1688 .vcpu_load = svm_vcpu_load,
1689 .vcpu_put = svm_vcpu_put,
1690 .vcpu_decache = svm_vcpu_decache,
1692 .set_guest_debug = svm_guest_debug,
1693 .get_msr = svm_get_msr,
1694 .set_msr = svm_set_msr,
1695 .get_segment_base = svm_get_segment_base,
1696 .get_segment = svm_get_segment,
1697 .set_segment = svm_set_segment,
1698 .get_cs_db_l_bits = svm_get_cs_db_l_bits,
1699 .decache_cr4_guest_bits = svm_decache_cr4_guest_bits,
1700 .set_cr0 = svm_set_cr0,
1701 .set_cr3 = svm_set_cr3,
1702 .set_cr4 = svm_set_cr4,
1703 .set_efer = svm_set_efer,
1704 .get_idt = svm_get_idt,
1705 .set_idt = svm_set_idt,
1706 .get_gdt = svm_get_gdt,
1707 .set_gdt = svm_set_gdt,
1708 .get_dr = svm_get_dr,
1709 .set_dr = svm_set_dr,
1710 .cache_regs = svm_cache_regs,
1711 .decache_regs = svm_decache_regs,
1712 .get_rflags = svm_get_rflags,
1713 .set_rflags = svm_set_rflags,
1715 .invlpg = svm_invlpg,
1716 .tlb_flush = svm_flush_tlb,
1717 .inject_page_fault = svm_inject_page_fault,
1719 .inject_gp = svm_inject_gp,
1721 .run = svm_vcpu_run,
1722 .skip_emulated_instruction = skip_emulated_instruction,
1723 .patch_hypercall = svm_patch_hypercall,
1726 static int __init svm_init(void)
1728 return kvm_init_arch(&svm_arch_ops, sizeof(struct vcpu_svm),
1732 static void __exit svm_exit(void)
1737 module_init(svm_init)
1738 module_exit(svm_exit)