2 * Kernel-based Virtual Machine driver for Linux
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
9 * Copyright (C) 2006 Qumranet, Inc.
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Avi Kivity <avi@qumranet.com>
15 * This work is licensed under the terms of the GNU GPL, version 2. See
16 * the COPYING file in the top-level directory.
19 #include <linux/types.h>
20 #include <linux/string.h>
23 #include <linux/highmem.h>
24 #include <linux/module.h>
29 #define pgprintk(x...) do { printk(x); } while (0)
30 #define rmap_printk(x...) do { printk(x); } while (0)
34 printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
35 __FILE__, __LINE__, #x); \
38 #define PT64_PT_BITS 9
39 #define PT64_ENT_PER_PAGE (1 << PT64_PT_BITS)
40 #define PT32_PT_BITS 10
41 #define PT32_ENT_PER_PAGE (1 << PT32_PT_BITS)
43 #define PT_WRITABLE_SHIFT 1
45 #define PT_PRESENT_MASK (1ULL << 0)
46 #define PT_WRITABLE_MASK (1ULL << PT_WRITABLE_SHIFT)
47 #define PT_USER_MASK (1ULL << 2)
48 #define PT_PWT_MASK (1ULL << 3)
49 #define PT_PCD_MASK (1ULL << 4)
50 #define PT_ACCESSED_MASK (1ULL << 5)
51 #define PT_DIRTY_MASK (1ULL << 6)
52 #define PT_PAGE_SIZE_MASK (1ULL << 7)
53 #define PT_PAT_MASK (1ULL << 7)
54 #define PT_GLOBAL_MASK (1ULL << 8)
55 #define PT64_NX_MASK (1ULL << 63)
57 #define PT_PAT_SHIFT 7
58 #define PT_DIR_PAT_SHIFT 12
59 #define PT_DIR_PAT_MASK (1ULL << PT_DIR_PAT_SHIFT)
61 #define PT32_DIR_PSE36_SIZE 4
62 #define PT32_DIR_PSE36_SHIFT 13
63 #define PT32_DIR_PSE36_MASK (((1ULL << PT32_DIR_PSE36_SIZE) - 1) << PT32_DIR_PSE36_SHIFT)
66 #define PT32_PTE_COPY_MASK \
67 (PT_PRESENT_MASK | PT_ACCESSED_MASK | PT_DIRTY_MASK | PT_GLOBAL_MASK)
69 #define PT64_PTE_COPY_MASK (PT64_NX_MASK | PT32_PTE_COPY_MASK)
71 #define PT_FIRST_AVAIL_BITS_SHIFT 9
72 #define PT64_SECOND_AVAIL_BITS_SHIFT 52
74 #define PT_SHADOW_PS_MARK (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
75 #define PT_SHADOW_IO_MARK (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
77 #define PT_SHADOW_WRITABLE_SHIFT (PT_FIRST_AVAIL_BITS_SHIFT + 1)
78 #define PT_SHADOW_WRITABLE_MASK (1ULL << PT_SHADOW_WRITABLE_SHIFT)
80 #define PT_SHADOW_USER_SHIFT (PT_SHADOW_WRITABLE_SHIFT + 1)
81 #define PT_SHADOW_USER_MASK (1ULL << (PT_SHADOW_USER_SHIFT))
83 #define PT_SHADOW_BITS_OFFSET (PT_SHADOW_WRITABLE_SHIFT - PT_WRITABLE_SHIFT)
85 #define VALID_PAGE(x) ((x) != INVALID_PAGE)
87 #define PT64_LEVEL_BITS 9
89 #define PT64_LEVEL_SHIFT(level) \
90 ( PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS )
92 #define PT64_LEVEL_MASK(level) \
93 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
95 #define PT64_INDEX(address, level)\
96 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
99 #define PT32_LEVEL_BITS 10
101 #define PT32_LEVEL_SHIFT(level) \
102 ( PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS )
104 #define PT32_LEVEL_MASK(level) \
105 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
107 #define PT32_INDEX(address, level)\
108 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
111 #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & PAGE_MASK)
112 #define PT64_DIR_BASE_ADDR_MASK \
113 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
115 #define PT32_BASE_ADDR_MASK PAGE_MASK
116 #define PT32_DIR_BASE_ADDR_MASK \
117 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
120 #define PFERR_PRESENT_MASK (1U << 0)
121 #define PFERR_WRITE_MASK (1U << 1)
122 #define PFERR_USER_MASK (1U << 2)
124 #define PT64_ROOT_LEVEL 4
125 #define PT32_ROOT_LEVEL 2
126 #define PT32E_ROOT_LEVEL 3
128 #define PT_DIRECTORY_LEVEL 2
129 #define PT_PAGE_TABLE_LEVEL 1
133 struct kvm_rmap_desc {
134 u64 *shadow_ptes[RMAP_EXT];
135 struct kvm_rmap_desc *more;
138 static int is_write_protection(struct kvm_vcpu *vcpu)
140 return vcpu->cr0 & CR0_WP_MASK;
143 static int is_cpuid_PSE36(void)
148 static int is_present_pte(unsigned long pte)
150 return pte & PT_PRESENT_MASK;
153 static int is_writeble_pte(unsigned long pte)
155 return pte & PT_WRITABLE_MASK;
158 static int is_io_pte(unsigned long pte)
160 return pte & PT_SHADOW_IO_MARK;
163 static int is_rmap_pte(u64 pte)
165 return (pte & (PT_WRITABLE_MASK | PT_PRESENT_MASK))
166 == (PT_WRITABLE_MASK | PT_PRESENT_MASK);
170 * Reverse mapping data structures:
172 * If page->private bit zero is zero, then page->private points to the
173 * shadow page table entry that points to page_address(page).
175 * If page->private bit zero is one, (then page->private & ~1) points
176 * to a struct kvm_rmap_desc containing more mappings.
178 static void rmap_add(struct kvm *kvm, u64 *spte)
181 struct kvm_rmap_desc *desc;
184 if (!is_rmap_pte(*spte))
186 page = pfn_to_page((*spte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT);
187 if (!page->private) {
188 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
189 page->private = (unsigned long)spte;
190 } else if (!(page->private & 1)) {
191 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
192 desc = kzalloc(sizeof *desc, GFP_NOWAIT);
194 BUG(); /* FIXME: return error */
195 desc->shadow_ptes[0] = (u64 *)page->private;
196 desc->shadow_ptes[1] = spte;
197 page->private = (unsigned long)desc | 1;
199 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
200 desc = (struct kvm_rmap_desc *)(page->private & ~1ul);
201 while (desc->shadow_ptes[RMAP_EXT-1] && desc->more)
203 if (desc->shadow_ptes[RMAP_EXT-1]) {
204 desc->more = kzalloc(sizeof *desc->more, GFP_NOWAIT);
206 BUG(); /* FIXME: return error */
209 for (i = 0; desc->shadow_ptes[i]; ++i)
211 desc->shadow_ptes[i] = spte;
215 static void rmap_desc_remove_entry(struct page *page,
216 struct kvm_rmap_desc *desc,
218 struct kvm_rmap_desc *prev_desc)
222 for (j = RMAP_EXT - 1; !desc->shadow_ptes[j] && j > i; --j)
224 desc->shadow_ptes[i] = desc->shadow_ptes[j];
225 desc->shadow_ptes[j] = 0;
228 if (!prev_desc && !desc->more)
229 page->private = (unsigned long)desc->shadow_ptes[0];
232 prev_desc->more = desc->more;
234 page->private = (unsigned long)desc->more | 1;
238 static void rmap_remove(struct kvm *kvm, u64 *spte)
241 struct kvm_rmap_desc *desc;
242 struct kvm_rmap_desc *prev_desc;
245 if (!is_rmap_pte(*spte))
247 page = pfn_to_page((*spte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT);
248 if (!page->private) {
249 printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
251 } else if (!(page->private & 1)) {
252 rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
253 if ((u64 *)page->private != spte) {
254 printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
260 rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
261 desc = (struct kvm_rmap_desc *)(page->private & ~1ul);
264 for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i)
265 if (desc->shadow_ptes[i] == spte) {
266 rmap_desc_remove_entry(page, desc, i,
277 static void rmap_write_protect(struct kvm *kvm, u64 gfn)
280 struct kvm_memory_slot *slot;
281 struct kvm_rmap_desc *desc;
284 slot = gfn_to_memslot(kvm, gfn);
286 page = gfn_to_page(slot, gfn);
288 while (page->private) {
289 if (!(page->private & 1))
290 spte = (u64 *)page->private;
292 desc = (struct kvm_rmap_desc *)(page->private & ~1ul);
293 spte = desc->shadow_ptes[0];
296 BUG_ON((*spte & PT64_BASE_ADDR_MASK) !=
297 page_to_pfn(page) << PAGE_SHIFT);
298 BUG_ON(!(*spte & PT_PRESENT_MASK));
299 BUG_ON(!(*spte & PT_WRITABLE_MASK));
300 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
301 rmap_remove(kvm, spte);
302 *spte &= ~(u64)PT_WRITABLE_MASK;
306 static void kvm_mmu_free_page(struct kvm_vcpu *vcpu, hpa_t page_hpa)
308 struct kvm_mmu_page *page_head = page_header(page_hpa);
310 list_del(&page_head->link);
311 page_head->page_hpa = page_hpa;
312 list_add(&page_head->link, &vcpu->free_pages);
315 static int is_empty_shadow_page(hpa_t page_hpa)
319 for (pos = __va(page_hpa), end = pos + PAGE_SIZE / sizeof(u32);
326 static unsigned kvm_page_table_hashfn(gfn_t gfn)
331 static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
334 struct kvm_mmu_page *page;
336 if (list_empty(&vcpu->free_pages))
339 page = list_entry(vcpu->free_pages.next, struct kvm_mmu_page, link);
340 list_del(&page->link);
341 list_add(&page->link, &vcpu->kvm->active_mmu_pages);
342 ASSERT(is_empty_shadow_page(page->page_hpa));
343 page->slot_bitmap = 0;
345 page->multimapped = 0;
346 page->parent_pte = parent_pte;
350 static void mmu_page_add_parent_pte(struct kvm_mmu_page *page, u64 *parent_pte)
352 struct kvm_pte_chain *pte_chain;
353 struct hlist_node *node;
358 if (!page->multimapped) {
359 u64 *old = page->parent_pte;
362 page->parent_pte = parent_pte;
365 page->multimapped = 1;
366 pte_chain = kzalloc(sizeof(struct kvm_pte_chain), GFP_NOWAIT);
368 INIT_HLIST_HEAD(&page->parent_ptes);
369 hlist_add_head(&pte_chain->link, &page->parent_ptes);
370 pte_chain->parent_ptes[0] = old;
372 hlist_for_each_entry(pte_chain, node, &page->parent_ptes, link) {
373 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
375 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
376 if (!pte_chain->parent_ptes[i]) {
377 pte_chain->parent_ptes[i] = parent_pte;
381 pte_chain = kzalloc(sizeof(struct kvm_pte_chain), GFP_NOWAIT);
383 hlist_add_head(&pte_chain->link, &page->parent_ptes);
384 pte_chain->parent_ptes[0] = parent_pte;
387 static void mmu_page_remove_parent_pte(struct kvm_mmu_page *page,
390 struct kvm_pte_chain *pte_chain;
391 struct hlist_node *node;
394 if (!page->multimapped) {
395 BUG_ON(page->parent_pte != parent_pte);
396 page->parent_pte = NULL;
399 hlist_for_each_entry(pte_chain, node, &page->parent_ptes, link)
400 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
401 if (!pte_chain->parent_ptes[i])
403 if (pte_chain->parent_ptes[i] != parent_pte)
405 while (i + 1 < NR_PTE_CHAIN_ENTRIES) {
406 pte_chain->parent_ptes[i]
407 = pte_chain->parent_ptes[i + 1];
410 pte_chain->parent_ptes[i] = NULL;
416 static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm_vcpu *vcpu,
420 struct hlist_head *bucket;
421 struct kvm_mmu_page *page;
422 struct hlist_node *node;
424 pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn);
425 index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
426 bucket = &vcpu->kvm->mmu_page_hash[index];
427 hlist_for_each_entry(page, node, bucket, hash_link)
428 if (page->gfn == gfn && !page->role.metaphysical) {
429 pgprintk("%s: found role %x\n",
430 __FUNCTION__, page->role.word);
436 static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
443 union kvm_mmu_page_role role;
446 struct hlist_head *bucket;
447 struct kvm_mmu_page *page;
448 struct hlist_node *node;
451 role.glevels = vcpu->mmu.root_level;
453 role.metaphysical = metaphysical;
454 if (vcpu->mmu.root_level <= PT32_ROOT_LEVEL) {
455 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
456 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
457 role.quadrant = quadrant;
459 pgprintk("%s: looking gfn %lx role %x\n", __FUNCTION__,
461 index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
462 bucket = &vcpu->kvm->mmu_page_hash[index];
463 hlist_for_each_entry(page, node, bucket, hash_link)
464 if (page->gfn == gfn && page->role.word == role.word) {
465 mmu_page_add_parent_pte(page, parent_pte);
466 pgprintk("%s: found\n", __FUNCTION__);
469 page = kvm_mmu_alloc_page(vcpu, parent_pte);
472 pgprintk("%s: adding gfn %lx role %x\n", __FUNCTION__, gfn, role.word);
475 hlist_add_head(&page->hash_link, bucket);
477 rmap_write_protect(vcpu->kvm, gfn);
481 static void kvm_mmu_page_unlink_children(struct kvm_vcpu *vcpu,
482 struct kvm_mmu_page *page)
487 static void kvm_mmu_put_page(struct kvm_vcpu *vcpu,
488 struct kvm_mmu_page *page,
491 mmu_page_remove_parent_pte(page, parent_pte);
492 if (page->role.level > PT_PAGE_TABLE_LEVEL)
493 kvm_mmu_page_unlink_children(vcpu, page);
494 hlist_del(&page->hash_link);
495 list_del(&page->link);
496 list_add(&page->link, &vcpu->free_pages);
499 static void kvm_mmu_zap_page(struct kvm_vcpu *vcpu,
500 struct kvm_mmu_page *page)
504 while (page->multimapped || page->parent_pte) {
505 if (!page->multimapped)
506 parent_pte = page->parent_pte;
508 struct kvm_pte_chain *chain;
510 chain = container_of(page->parent_ptes.first,
511 struct kvm_pte_chain, link);
512 parent_pte = chain->parent_ptes[0];
514 kvm_mmu_put_page(vcpu, page, parent_pte);
519 static int kvm_mmu_unprotect_page(struct kvm_vcpu *vcpu, gfn_t gfn)
522 struct hlist_head *bucket;
523 struct kvm_mmu_page *page;
524 struct hlist_node *node, *n;
527 pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn);
529 index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
530 bucket = &vcpu->kvm->mmu_page_hash[index];
531 hlist_for_each_entry_safe(page, node, n, bucket, hash_link)
532 if (page->gfn == gfn && !page->role.metaphysical) {
533 kvm_mmu_zap_page(vcpu, page);
539 static void page_header_update_slot(struct kvm *kvm, void *pte, gpa_t gpa)
541 int slot = memslot_id(kvm, gfn_to_memslot(kvm, gpa >> PAGE_SHIFT));
542 struct kvm_mmu_page *page_head = page_header(__pa(pte));
544 __set_bit(slot, &page_head->slot_bitmap);
547 hpa_t safe_gpa_to_hpa(struct kvm_vcpu *vcpu, gpa_t gpa)
549 hpa_t hpa = gpa_to_hpa(vcpu, gpa);
551 return is_error_hpa(hpa) ? bad_page_address | (gpa & ~PAGE_MASK): hpa;
554 hpa_t gpa_to_hpa(struct kvm_vcpu *vcpu, gpa_t gpa)
556 struct kvm_memory_slot *slot;
559 ASSERT((gpa & HPA_ERR_MASK) == 0);
560 slot = gfn_to_memslot(vcpu->kvm, gpa >> PAGE_SHIFT);
562 return gpa | HPA_ERR_MASK;
563 page = gfn_to_page(slot, gpa >> PAGE_SHIFT);
564 return ((hpa_t)page_to_pfn(page) << PAGE_SHIFT)
565 | (gpa & (PAGE_SIZE-1));
568 hpa_t gva_to_hpa(struct kvm_vcpu *vcpu, gva_t gva)
570 gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva);
572 if (gpa == UNMAPPED_GVA)
574 return gpa_to_hpa(vcpu, gpa);
578 static void release_pt_page_64(struct kvm_vcpu *vcpu, hpa_t page_hpa,
585 ASSERT(VALID_PAGE(page_hpa));
586 ASSERT(level <= PT64_ROOT_LEVEL && level > 0);
588 for (pos = __va(page_hpa), end = pos + PT64_ENT_PER_PAGE;
590 u64 current_ent = *pos;
592 if (is_present_pte(current_ent)) {
594 release_pt_page_64(vcpu,
599 rmap_remove(vcpu->kvm, pos);
603 kvm_mmu_free_page(vcpu, page_hpa);
606 static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
610 static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, hpa_t p)
612 int level = PT32E_ROOT_LEVEL;
613 hpa_t table_addr = vcpu->mmu.root_hpa;
616 u32 index = PT64_INDEX(v, level);
620 ASSERT(VALID_PAGE(table_addr));
621 table = __va(table_addr);
625 if (is_present_pte(pte) && is_writeble_pte(pte))
627 mark_page_dirty(vcpu->kvm, v >> PAGE_SHIFT);
628 page_header_update_slot(vcpu->kvm, table, v);
629 table[index] = p | PT_PRESENT_MASK | PT_WRITABLE_MASK |
631 rmap_add(vcpu->kvm, &table[index]);
635 if (table[index] == 0) {
636 struct kvm_mmu_page *new_table;
639 pseudo_gfn = (v & PT64_DIR_BASE_ADDR_MASK)
641 new_table = kvm_mmu_get_page(vcpu, pseudo_gfn,
645 pgprintk("nonpaging_map: ENOMEM\n");
649 table[index] = new_table->page_hpa | PT_PRESENT_MASK
650 | PT_WRITABLE_MASK | PT_USER_MASK;
652 table_addr = table[index] & PT64_BASE_ADDR_MASK;
656 static void mmu_free_roots(struct kvm_vcpu *vcpu)
661 if (vcpu->mmu.shadow_root_level == PT64_ROOT_LEVEL) {
662 hpa_t root = vcpu->mmu.root_hpa;
664 ASSERT(VALID_PAGE(root));
665 vcpu->mmu.root_hpa = INVALID_PAGE;
669 for (i = 0; i < 4; ++i) {
670 hpa_t root = vcpu->mmu.pae_root[i];
672 ASSERT(VALID_PAGE(root));
673 root &= PT64_BASE_ADDR_MASK;
674 vcpu->mmu.pae_root[i] = INVALID_PAGE;
676 vcpu->mmu.root_hpa = INVALID_PAGE;
679 static void mmu_alloc_roots(struct kvm_vcpu *vcpu)
683 root_gfn = vcpu->cr3 >> PAGE_SHIFT;
686 if (vcpu->mmu.shadow_root_level == PT64_ROOT_LEVEL) {
687 hpa_t root = vcpu->mmu.root_hpa;
689 ASSERT(!VALID_PAGE(root));
690 root = kvm_mmu_get_page(vcpu, root_gfn, 0,
691 PT64_ROOT_LEVEL, 0, NULL)->page_hpa;
692 vcpu->mmu.root_hpa = root;
696 for (i = 0; i < 4; ++i) {
697 hpa_t root = vcpu->mmu.pae_root[i];
699 ASSERT(!VALID_PAGE(root));
700 if (vcpu->mmu.root_level == PT32E_ROOT_LEVEL)
701 root_gfn = vcpu->pdptrs[i] >> PAGE_SHIFT;
702 else if (vcpu->mmu.root_level == 0)
704 root = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
705 PT32_ROOT_LEVEL, !is_paging(vcpu),
707 vcpu->mmu.pae_root[i] = root | PT_PRESENT_MASK;
709 vcpu->mmu.root_hpa = __pa(vcpu->mmu.pae_root);
712 static void nonpaging_flush(struct kvm_vcpu *vcpu)
714 hpa_t root = vcpu->mmu.root_hpa;
716 ++kvm_stat.tlb_flush;
717 pgprintk("nonpaging_flush\n");
718 mmu_free_roots(vcpu);
719 mmu_alloc_roots(vcpu);
720 kvm_arch_ops->set_cr3(vcpu, root);
721 kvm_arch_ops->tlb_flush(vcpu);
724 static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr)
729 static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
736 ASSERT(VALID_PAGE(vcpu->mmu.root_hpa));
741 paddr = gpa_to_hpa(vcpu , addr & PT64_BASE_ADDR_MASK);
743 if (is_error_hpa(paddr))
746 ret = nonpaging_map(vcpu, addr & PAGE_MASK, paddr);
748 nonpaging_flush(vcpu);
756 static void nonpaging_inval_page(struct kvm_vcpu *vcpu, gva_t addr)
760 static void nonpaging_free(struct kvm_vcpu *vcpu)
762 mmu_free_roots(vcpu);
765 static int nonpaging_init_context(struct kvm_vcpu *vcpu)
767 struct kvm_mmu *context = &vcpu->mmu;
769 context->new_cr3 = nonpaging_new_cr3;
770 context->page_fault = nonpaging_page_fault;
771 context->inval_page = nonpaging_inval_page;
772 context->gva_to_gpa = nonpaging_gva_to_gpa;
773 context->free = nonpaging_free;
774 context->root_level = 0;
775 context->shadow_root_level = PT32E_ROOT_LEVEL;
776 mmu_alloc_roots(vcpu);
777 ASSERT(VALID_PAGE(context->root_hpa));
778 kvm_arch_ops->set_cr3(vcpu, context->root_hpa);
782 static void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
784 ++kvm_stat.tlb_flush;
785 kvm_arch_ops->tlb_flush(vcpu);
788 static void paging_new_cr3(struct kvm_vcpu *vcpu)
790 pgprintk("%s: cr3 %lx\n", __FUNCTION__, vcpu->cr3);
791 mmu_free_roots(vcpu);
792 mmu_alloc_roots(vcpu);
793 kvm_mmu_flush_tlb(vcpu);
794 kvm_arch_ops->set_cr3(vcpu, vcpu->mmu.root_hpa);
797 static void mark_pagetable_nonglobal(void *shadow_pte)
799 page_header(__pa(shadow_pte))->global = 0;
802 static inline void set_pte_common(struct kvm_vcpu *vcpu,
811 *shadow_pte |= access_bits << PT_SHADOW_BITS_OFFSET;
813 access_bits &= ~PT_WRITABLE_MASK;
815 paddr = gpa_to_hpa(vcpu, gaddr & PT64_BASE_ADDR_MASK);
817 *shadow_pte |= access_bits;
819 if (!(*shadow_pte & PT_GLOBAL_MASK))
820 mark_pagetable_nonglobal(shadow_pte);
822 if (is_error_hpa(paddr)) {
823 *shadow_pte |= gaddr;
824 *shadow_pte |= PT_SHADOW_IO_MARK;
825 *shadow_pte &= ~PT_PRESENT_MASK;
829 *shadow_pte |= paddr;
831 if (access_bits & PT_WRITABLE_MASK) {
832 struct kvm_mmu_page *shadow;
834 shadow = kvm_mmu_lookup_page(vcpu, gfn);
836 pgprintk("%s: found shadow page for %lx, marking ro\n",
838 access_bits &= ~PT_WRITABLE_MASK;
839 *shadow_pte &= ~PT_WRITABLE_MASK;
843 if (access_bits & PT_WRITABLE_MASK)
844 mark_page_dirty(vcpu->kvm, gaddr >> PAGE_SHIFT);
846 page_header_update_slot(vcpu->kvm, shadow_pte, gaddr);
847 rmap_add(vcpu->kvm, shadow_pte);
850 static void inject_page_fault(struct kvm_vcpu *vcpu,
854 kvm_arch_ops->inject_page_fault(vcpu, addr, err_code);
857 static inline int fix_read_pf(u64 *shadow_ent)
859 if ((*shadow_ent & PT_SHADOW_USER_MASK) &&
860 !(*shadow_ent & PT_USER_MASK)) {
862 * If supervisor write protect is disabled, we shadow kernel
863 * pages as user pages so we can trap the write access.
865 *shadow_ent |= PT_USER_MASK;
866 *shadow_ent &= ~PT_WRITABLE_MASK;
874 static int may_access(u64 pte, int write, int user)
877 if (user && !(pte & PT_USER_MASK))
879 if (write && !(pte & PT_WRITABLE_MASK))
885 * Remove a shadow pte.
887 static void paging_inval_page(struct kvm_vcpu *vcpu, gva_t addr)
889 hpa_t page_addr = vcpu->mmu.root_hpa;
890 int level = vcpu->mmu.shadow_root_level;
895 u32 index = PT64_INDEX(addr, level);
896 u64 *table = __va(page_addr);
898 if (level == PT_PAGE_TABLE_LEVEL ) {
899 rmap_remove(vcpu->kvm, &table[index]);
904 if (!is_present_pte(table[index]))
907 page_addr = table[index] & PT64_BASE_ADDR_MASK;
909 if (level == PT_DIRECTORY_LEVEL &&
910 (table[index] & PT_SHADOW_PS_MARK)) {
912 release_pt_page_64(vcpu, page_addr, PT_PAGE_TABLE_LEVEL);
914 kvm_arch_ops->tlb_flush(vcpu);
920 static void paging_free(struct kvm_vcpu *vcpu)
922 nonpaging_free(vcpu);
926 #include "paging_tmpl.h"
930 #include "paging_tmpl.h"
933 static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
935 struct kvm_mmu *context = &vcpu->mmu;
937 ASSERT(is_pae(vcpu));
938 context->new_cr3 = paging_new_cr3;
939 context->page_fault = paging64_page_fault;
940 context->inval_page = paging_inval_page;
941 context->gva_to_gpa = paging64_gva_to_gpa;
942 context->free = paging_free;
943 context->root_level = level;
944 context->shadow_root_level = level;
945 mmu_alloc_roots(vcpu);
946 ASSERT(VALID_PAGE(context->root_hpa));
947 kvm_arch_ops->set_cr3(vcpu, context->root_hpa |
948 (vcpu->cr3 & (CR3_PCD_MASK | CR3_WPT_MASK)));
952 static int paging64_init_context(struct kvm_vcpu *vcpu)
954 return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
957 static int paging32_init_context(struct kvm_vcpu *vcpu)
959 struct kvm_mmu *context = &vcpu->mmu;
961 context->new_cr3 = paging_new_cr3;
962 context->page_fault = paging32_page_fault;
963 context->inval_page = paging_inval_page;
964 context->gva_to_gpa = paging32_gva_to_gpa;
965 context->free = paging_free;
966 context->root_level = PT32_ROOT_LEVEL;
967 context->shadow_root_level = PT32E_ROOT_LEVEL;
968 mmu_alloc_roots(vcpu);
969 ASSERT(VALID_PAGE(context->root_hpa));
970 kvm_arch_ops->set_cr3(vcpu, context->root_hpa |
971 (vcpu->cr3 & (CR3_PCD_MASK | CR3_WPT_MASK)));
975 static int paging32E_init_context(struct kvm_vcpu *vcpu)
977 return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
980 static int init_kvm_mmu(struct kvm_vcpu *vcpu)
983 ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
985 if (!is_paging(vcpu))
986 return nonpaging_init_context(vcpu);
987 else if (is_long_mode(vcpu))
988 return paging64_init_context(vcpu);
989 else if (is_pae(vcpu))
990 return paging32E_init_context(vcpu);
992 return paging32_init_context(vcpu);
995 static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
998 if (VALID_PAGE(vcpu->mmu.root_hpa)) {
999 vcpu->mmu.free(vcpu);
1000 vcpu->mmu.root_hpa = INVALID_PAGE;
1004 int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
1006 destroy_kvm_mmu(vcpu);
1007 return init_kvm_mmu(vcpu);
1010 void kvm_mmu_pre_write(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes)
1012 gfn_t gfn = gpa >> PAGE_SHIFT;
1013 struct kvm_mmu_page *page;
1014 struct kvm_mmu_page *child;
1015 struct hlist_node *node;
1016 struct hlist_head *bucket;
1020 unsigned offset = offset_in_page(gpa);
1021 unsigned page_offset;
1024 pgprintk("%s: gpa %llx bytes %d\n", __FUNCTION__, gpa, bytes);
1025 index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
1026 bucket = &vcpu->kvm->mmu_page_hash[index];
1027 hlist_for_each_entry(page, node, bucket, hash_link) {
1028 if (page->gfn != gfn || page->role.metaphysical)
1030 page_offset = offset;
1031 level = page->role.level;
1032 if (page->role.glevels == PT32_ROOT_LEVEL) {
1033 page_offset <<= 1; /* 32->64 */
1034 page_offset &= ~PAGE_MASK;
1036 spte = __va(page->page_hpa);
1037 spte += page_offset / sizeof(*spte);
1039 if (is_present_pte(pte)) {
1040 if (level == PT_PAGE_TABLE_LEVEL)
1041 rmap_remove(vcpu->kvm, spte);
1043 child = page_header(pte & PT64_BASE_ADDR_MASK);
1044 mmu_page_remove_parent_pte(child, spte);
1051 void kvm_mmu_post_write(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes)
1055 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
1057 gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva);
1059 return kvm_mmu_unprotect_page(vcpu, gpa >> PAGE_SHIFT);
1062 static void free_mmu_pages(struct kvm_vcpu *vcpu)
1064 while (!list_empty(&vcpu->free_pages)) {
1065 struct kvm_mmu_page *page;
1067 page = list_entry(vcpu->free_pages.next,
1068 struct kvm_mmu_page, link);
1069 list_del(&page->link);
1070 __free_page(pfn_to_page(page->page_hpa >> PAGE_SHIFT));
1071 page->page_hpa = INVALID_PAGE;
1073 free_page((unsigned long)vcpu->mmu.pae_root);
1076 static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
1083 for (i = 0; i < KVM_NUM_MMU_PAGES; i++) {
1084 struct kvm_mmu_page *page_header = &vcpu->page_header_buf[i];
1086 INIT_LIST_HEAD(&page_header->link);
1087 if ((page = alloc_page(GFP_KERNEL)) == NULL)
1089 page->private = (unsigned long)page_header;
1090 page_header->page_hpa = (hpa_t)page_to_pfn(page) << PAGE_SHIFT;
1091 memset(__va(page_header->page_hpa), 0, PAGE_SIZE);
1092 list_add(&page_header->link, &vcpu->free_pages);
1096 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
1097 * Therefore we need to allocate shadow page tables in the first
1098 * 4GB of memory, which happens to fit the DMA32 zone.
1100 page = alloc_page(GFP_KERNEL | __GFP_DMA32);
1103 vcpu->mmu.pae_root = page_address(page);
1104 for (i = 0; i < 4; ++i)
1105 vcpu->mmu.pae_root[i] = INVALID_PAGE;
1110 free_mmu_pages(vcpu);
1114 int kvm_mmu_create(struct kvm_vcpu *vcpu)
1117 ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
1118 ASSERT(list_empty(&vcpu->free_pages));
1120 return alloc_mmu_pages(vcpu);
1123 int kvm_mmu_setup(struct kvm_vcpu *vcpu)
1126 ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
1127 ASSERT(!list_empty(&vcpu->free_pages));
1129 return init_kvm_mmu(vcpu);
1132 void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
1136 destroy_kvm_mmu(vcpu);
1137 free_mmu_pages(vcpu);
1140 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
1142 struct kvm_mmu_page *page;
1144 list_for_each_entry(page, &kvm->active_mmu_pages, link) {
1148 if (!test_bit(slot, &page->slot_bitmap))
1151 pt = __va(page->page_hpa);
1152 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
1154 if (pt[i] & PT_WRITABLE_MASK) {
1155 rmap_remove(kvm, &pt[i]);
1156 pt[i] &= ~PT_WRITABLE_MASK;