2 * Kernel-based Virtual Machine driver for Linux
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
9 * Copyright (C) 2006 Qumranet, Inc.
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Avi Kivity <avi@qumranet.com>
15 * This work is licensed under the terms of the GNU GPL, version 2. See
16 * the COPYING file in the top-level directory.
19 #include <linux/types.h>
20 #include <linux/string.h>
23 #include <linux/highmem.h>
24 #include <linux/module.h>
29 #define pgprintk(x...) do { printk(x); } while (0)
30 #define rmap_printk(x...) do { printk(x); } while (0)
34 printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
35 __FILE__, __LINE__, #x); \
38 #define PT64_PT_BITS 9
39 #define PT64_ENT_PER_PAGE (1 << PT64_PT_BITS)
40 #define PT32_PT_BITS 10
41 #define PT32_ENT_PER_PAGE (1 << PT32_PT_BITS)
43 #define PT_WRITABLE_SHIFT 1
45 #define PT_PRESENT_MASK (1ULL << 0)
46 #define PT_WRITABLE_MASK (1ULL << PT_WRITABLE_SHIFT)
47 #define PT_USER_MASK (1ULL << 2)
48 #define PT_PWT_MASK (1ULL << 3)
49 #define PT_PCD_MASK (1ULL << 4)
50 #define PT_ACCESSED_MASK (1ULL << 5)
51 #define PT_DIRTY_MASK (1ULL << 6)
52 #define PT_PAGE_SIZE_MASK (1ULL << 7)
53 #define PT_PAT_MASK (1ULL << 7)
54 #define PT_GLOBAL_MASK (1ULL << 8)
55 #define PT64_NX_MASK (1ULL << 63)
57 #define PT_PAT_SHIFT 7
58 #define PT_DIR_PAT_SHIFT 12
59 #define PT_DIR_PAT_MASK (1ULL << PT_DIR_PAT_SHIFT)
61 #define PT32_DIR_PSE36_SIZE 4
62 #define PT32_DIR_PSE36_SHIFT 13
63 #define PT32_DIR_PSE36_MASK (((1ULL << PT32_DIR_PSE36_SIZE) - 1) << PT32_DIR_PSE36_SHIFT)
66 #define PT32_PTE_COPY_MASK \
67 (PT_PRESENT_MASK | PT_ACCESSED_MASK | PT_DIRTY_MASK | PT_GLOBAL_MASK)
69 #define PT64_PTE_COPY_MASK (PT64_NX_MASK | PT32_PTE_COPY_MASK)
71 #define PT_FIRST_AVAIL_BITS_SHIFT 9
72 #define PT64_SECOND_AVAIL_BITS_SHIFT 52
74 #define PT_SHADOW_PS_MARK (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
75 #define PT_SHADOW_IO_MARK (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
77 #define PT_SHADOW_WRITABLE_SHIFT (PT_FIRST_AVAIL_BITS_SHIFT + 1)
78 #define PT_SHADOW_WRITABLE_MASK (1ULL << PT_SHADOW_WRITABLE_SHIFT)
80 #define PT_SHADOW_USER_SHIFT (PT_SHADOW_WRITABLE_SHIFT + 1)
81 #define PT_SHADOW_USER_MASK (1ULL << (PT_SHADOW_USER_SHIFT))
83 #define PT_SHADOW_BITS_OFFSET (PT_SHADOW_WRITABLE_SHIFT - PT_WRITABLE_SHIFT)
85 #define VALID_PAGE(x) ((x) != INVALID_PAGE)
87 #define PT64_LEVEL_BITS 9
89 #define PT64_LEVEL_SHIFT(level) \
90 ( PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS )
92 #define PT64_LEVEL_MASK(level) \
93 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
95 #define PT64_INDEX(address, level)\
96 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
99 #define PT32_LEVEL_BITS 10
101 #define PT32_LEVEL_SHIFT(level) \
102 ( PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS )
104 #define PT32_LEVEL_MASK(level) \
105 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
107 #define PT32_INDEX(address, level)\
108 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
111 #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & PAGE_MASK)
112 #define PT64_DIR_BASE_ADDR_MASK \
113 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
115 #define PT32_BASE_ADDR_MASK PAGE_MASK
116 #define PT32_DIR_BASE_ADDR_MASK \
117 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
120 #define PFERR_PRESENT_MASK (1U << 0)
121 #define PFERR_WRITE_MASK (1U << 1)
122 #define PFERR_USER_MASK (1U << 2)
124 #define PT64_ROOT_LEVEL 4
125 #define PT32_ROOT_LEVEL 2
126 #define PT32E_ROOT_LEVEL 3
128 #define PT_DIRECTORY_LEVEL 2
129 #define PT_PAGE_TABLE_LEVEL 1
133 struct kvm_rmap_desc {
134 u64 *shadow_ptes[RMAP_EXT];
135 struct kvm_rmap_desc *more;
138 static int is_write_protection(struct kvm_vcpu *vcpu)
140 return vcpu->cr0 & CR0_WP_MASK;
143 static int is_cpuid_PSE36(void)
148 static int is_present_pte(unsigned long pte)
150 return pte & PT_PRESENT_MASK;
153 static int is_writeble_pte(unsigned long pte)
155 return pte & PT_WRITABLE_MASK;
158 static int is_io_pte(unsigned long pte)
160 return pte & PT_SHADOW_IO_MARK;
163 static int is_rmap_pte(u64 pte)
165 return (pte & (PT_WRITABLE_MASK | PT_PRESENT_MASK))
166 == (PT_WRITABLE_MASK | PT_PRESENT_MASK);
170 * Reverse mapping data structures:
172 * If page->private bit zero is zero, then page->private points to the
173 * shadow page table entry that points to page_address(page).
175 * If page->private bit zero is one, (then page->private & ~1) points
176 * to a struct kvm_rmap_desc containing more mappings.
178 static void rmap_add(struct kvm *kvm, u64 *spte)
181 struct kvm_rmap_desc *desc;
184 if (!is_rmap_pte(*spte))
186 page = pfn_to_page((*spte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT);
187 if (!page->private) {
188 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
189 page->private = (unsigned long)spte;
190 } else if (!(page->private & 1)) {
191 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
192 desc = kzalloc(sizeof *desc, GFP_NOWAIT);
194 BUG(); /* FIXME: return error */
195 desc->shadow_ptes[0] = (u64 *)page->private;
196 desc->shadow_ptes[1] = spte;
197 page->private = (unsigned long)desc | 1;
199 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
200 desc = (struct kvm_rmap_desc *)(page->private & ~1ul);
201 while (desc->shadow_ptes[RMAP_EXT-1] && desc->more)
203 if (desc->shadow_ptes[RMAP_EXT-1]) {
204 desc->more = kzalloc(sizeof *desc->more, GFP_NOWAIT);
206 BUG(); /* FIXME: return error */
209 for (i = 0; desc->shadow_ptes[i]; ++i)
211 desc->shadow_ptes[i] = spte;
215 static void rmap_desc_remove_entry(struct page *page,
216 struct kvm_rmap_desc *desc,
218 struct kvm_rmap_desc *prev_desc)
222 for (j = RMAP_EXT - 1; !desc->shadow_ptes[j] && j > i; --j)
224 desc->shadow_ptes[i] = desc->shadow_ptes[j];
225 desc->shadow_ptes[j] = 0;
228 if (!prev_desc && !desc->more)
229 page->private = (unsigned long)desc->shadow_ptes[0];
232 prev_desc->more = desc->more;
234 page->private = (unsigned long)desc->more | 1;
238 static void rmap_remove(struct kvm *kvm, u64 *spte)
241 struct kvm_rmap_desc *desc;
242 struct kvm_rmap_desc *prev_desc;
245 if (!is_rmap_pte(*spte))
247 page = pfn_to_page((*spte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT);
248 if (!page->private) {
249 printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
251 } else if (!(page->private & 1)) {
252 rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
253 if ((u64 *)page->private != spte) {
254 printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
260 rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
261 desc = (struct kvm_rmap_desc *)(page->private & ~1ul);
264 for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i)
265 if (desc->shadow_ptes[i] == spte) {
266 rmap_desc_remove_entry(page, desc, i,
277 static void rmap_write_protect(struct kvm *kvm, u64 gfn)
280 struct kvm_memory_slot *slot;
281 struct kvm_rmap_desc *desc;
284 slot = gfn_to_memslot(kvm, gfn);
286 page = gfn_to_page(slot, gfn);
288 while (page->private) {
289 if (!(page->private & 1))
290 spte = (u64 *)page->private;
292 desc = (struct kvm_rmap_desc *)(page->private & ~1ul);
293 spte = desc->shadow_ptes[0];
296 BUG_ON((*spte & PT64_BASE_ADDR_MASK) !=
297 page_to_pfn(page) << PAGE_SHIFT);
298 BUG_ON(!(*spte & PT_PRESENT_MASK));
299 BUG_ON(!(*spte & PT_WRITABLE_MASK));
300 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
301 rmap_remove(kvm, spte);
302 *spte &= ~(u64)PT_WRITABLE_MASK;
306 static void kvm_mmu_free_page(struct kvm_vcpu *vcpu, hpa_t page_hpa)
308 struct kvm_mmu_page *page_head = page_header(page_hpa);
310 list_del(&page_head->link);
311 page_head->page_hpa = page_hpa;
312 list_add(&page_head->link, &vcpu->free_pages);
315 static int is_empty_shadow_page(hpa_t page_hpa)
319 for (pos = __va(page_hpa), end = pos + PAGE_SIZE / sizeof(u32);
326 static unsigned kvm_page_table_hashfn(gfn_t gfn)
331 static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
334 struct kvm_mmu_page *page;
336 if (list_empty(&vcpu->free_pages))
339 page = list_entry(vcpu->free_pages.next, struct kvm_mmu_page, link);
340 list_del(&page->link);
341 list_add(&page->link, &vcpu->kvm->active_mmu_pages);
342 ASSERT(is_empty_shadow_page(page->page_hpa));
343 page->slot_bitmap = 0;
345 page->multimapped = 0;
346 page->parent_pte = parent_pte;
350 static void mmu_page_add_parent_pte(struct kvm_mmu_page *page, u64 *parent_pte)
352 struct kvm_pte_chain *pte_chain;
353 struct hlist_node *node;
358 if (!page->multimapped) {
359 u64 *old = page->parent_pte;
362 page->parent_pte = parent_pte;
365 page->multimapped = 1;
366 pte_chain = kzalloc(sizeof(struct kvm_pte_chain), GFP_NOWAIT);
368 INIT_HLIST_HEAD(&page->parent_ptes);
369 hlist_add_head(&pte_chain->link, &page->parent_ptes);
370 pte_chain->parent_ptes[0] = old;
372 hlist_for_each_entry(pte_chain, node, &page->parent_ptes, link) {
373 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
375 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
376 if (!pte_chain->parent_ptes[i]) {
377 pte_chain->parent_ptes[i] = parent_pte;
381 pte_chain = kzalloc(sizeof(struct kvm_pte_chain), GFP_NOWAIT);
383 hlist_add_head(&pte_chain->link, &page->parent_ptes);
384 pte_chain->parent_ptes[0] = parent_pte;
387 static void mmu_page_remove_parent_pte(struct kvm_mmu_page *page,
390 struct kvm_pte_chain *pte_chain;
391 struct hlist_node *node;
394 if (!page->multimapped) {
395 BUG_ON(page->parent_pte != parent_pte);
396 page->parent_pte = NULL;
399 hlist_for_each_entry(pte_chain, node, &page->parent_ptes, link)
400 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
401 if (!pte_chain->parent_ptes[i])
403 if (pte_chain->parent_ptes[i] != parent_pte)
405 while (i + 1 < NR_PTE_CHAIN_ENTRIES) {
406 pte_chain->parent_ptes[i]
407 = pte_chain->parent_ptes[i + 1];
410 pte_chain->parent_ptes[i] = NULL;
416 static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm_vcpu *vcpu,
420 struct hlist_head *bucket;
421 struct kvm_mmu_page *page;
422 struct hlist_node *node;
424 pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn);
425 index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
426 bucket = &vcpu->kvm->mmu_page_hash[index];
427 hlist_for_each_entry(page, node, bucket, hash_link)
428 if (page->gfn == gfn && !page->role.metaphysical) {
429 pgprintk("%s: found role %x\n",
430 __FUNCTION__, page->role.word);
436 static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
443 union kvm_mmu_page_role role;
446 struct hlist_head *bucket;
447 struct kvm_mmu_page *page;
448 struct hlist_node *node;
451 role.glevels = vcpu->mmu.root_level;
453 role.metaphysical = metaphysical;
454 if (vcpu->mmu.root_level <= PT32_ROOT_LEVEL) {
455 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
456 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
457 role.quadrant = quadrant;
459 pgprintk("%s: looking gfn %lx role %x\n", __FUNCTION__,
461 index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
462 bucket = &vcpu->kvm->mmu_page_hash[index];
463 hlist_for_each_entry(page, node, bucket, hash_link)
464 if (page->gfn == gfn && page->role.word == role.word) {
465 mmu_page_add_parent_pte(page, parent_pte);
466 pgprintk("%s: found\n", __FUNCTION__);
469 page = kvm_mmu_alloc_page(vcpu, parent_pte);
472 pgprintk("%s: adding gfn %lx role %x\n", __FUNCTION__, gfn, role.word);
475 hlist_add_head(&page->hash_link, bucket);
477 rmap_write_protect(vcpu->kvm, gfn);
481 static void kvm_mmu_put_page(struct kvm_vcpu *vcpu,
482 struct kvm_mmu_page *page,
485 mmu_page_remove_parent_pte(page, parent_pte);
488 static void page_header_update_slot(struct kvm *kvm, void *pte, gpa_t gpa)
490 int slot = memslot_id(kvm, gfn_to_memslot(kvm, gpa >> PAGE_SHIFT));
491 struct kvm_mmu_page *page_head = page_header(__pa(pte));
493 __set_bit(slot, &page_head->slot_bitmap);
496 hpa_t safe_gpa_to_hpa(struct kvm_vcpu *vcpu, gpa_t gpa)
498 hpa_t hpa = gpa_to_hpa(vcpu, gpa);
500 return is_error_hpa(hpa) ? bad_page_address | (gpa & ~PAGE_MASK): hpa;
503 hpa_t gpa_to_hpa(struct kvm_vcpu *vcpu, gpa_t gpa)
505 struct kvm_memory_slot *slot;
508 ASSERT((gpa & HPA_ERR_MASK) == 0);
509 slot = gfn_to_memslot(vcpu->kvm, gpa >> PAGE_SHIFT);
511 return gpa | HPA_ERR_MASK;
512 page = gfn_to_page(slot, gpa >> PAGE_SHIFT);
513 return ((hpa_t)page_to_pfn(page) << PAGE_SHIFT)
514 | (gpa & (PAGE_SIZE-1));
517 hpa_t gva_to_hpa(struct kvm_vcpu *vcpu, gva_t gva)
519 gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva);
521 if (gpa == UNMAPPED_GVA)
523 return gpa_to_hpa(vcpu, gpa);
527 static void release_pt_page_64(struct kvm_vcpu *vcpu, hpa_t page_hpa,
534 ASSERT(VALID_PAGE(page_hpa));
535 ASSERT(level <= PT64_ROOT_LEVEL && level > 0);
537 for (pos = __va(page_hpa), end = pos + PT64_ENT_PER_PAGE;
539 u64 current_ent = *pos;
541 if (is_present_pte(current_ent)) {
543 release_pt_page_64(vcpu,
548 rmap_remove(vcpu->kvm, pos);
552 kvm_mmu_free_page(vcpu, page_hpa);
555 static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
559 static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, hpa_t p)
561 int level = PT32E_ROOT_LEVEL;
562 hpa_t table_addr = vcpu->mmu.root_hpa;
565 u32 index = PT64_INDEX(v, level);
569 ASSERT(VALID_PAGE(table_addr));
570 table = __va(table_addr);
574 if (is_present_pte(pte) && is_writeble_pte(pte))
576 mark_page_dirty(vcpu->kvm, v >> PAGE_SHIFT);
577 page_header_update_slot(vcpu->kvm, table, v);
578 table[index] = p | PT_PRESENT_MASK | PT_WRITABLE_MASK |
580 rmap_add(vcpu->kvm, &table[index]);
584 if (table[index] == 0) {
585 struct kvm_mmu_page *new_table;
588 pseudo_gfn = (v & PT64_DIR_BASE_ADDR_MASK)
590 new_table = kvm_mmu_get_page(vcpu, pseudo_gfn,
594 pgprintk("nonpaging_map: ENOMEM\n");
598 table[index] = new_table->page_hpa | PT_PRESENT_MASK
599 | PT_WRITABLE_MASK | PT_USER_MASK;
601 table_addr = table[index] & PT64_BASE_ADDR_MASK;
605 static void mmu_free_roots(struct kvm_vcpu *vcpu)
610 if (vcpu->mmu.shadow_root_level == PT64_ROOT_LEVEL) {
611 hpa_t root = vcpu->mmu.root_hpa;
613 ASSERT(VALID_PAGE(root));
614 vcpu->mmu.root_hpa = INVALID_PAGE;
618 for (i = 0; i < 4; ++i) {
619 hpa_t root = vcpu->mmu.pae_root[i];
621 ASSERT(VALID_PAGE(root));
622 root &= PT64_BASE_ADDR_MASK;
623 vcpu->mmu.pae_root[i] = INVALID_PAGE;
625 vcpu->mmu.root_hpa = INVALID_PAGE;
628 static void mmu_alloc_roots(struct kvm_vcpu *vcpu)
632 root_gfn = vcpu->cr3 >> PAGE_SHIFT;
635 if (vcpu->mmu.shadow_root_level == PT64_ROOT_LEVEL) {
636 hpa_t root = vcpu->mmu.root_hpa;
638 ASSERT(!VALID_PAGE(root));
639 root = kvm_mmu_get_page(vcpu, root_gfn, 0,
640 PT64_ROOT_LEVEL, 0, NULL)->page_hpa;
641 vcpu->mmu.root_hpa = root;
645 for (i = 0; i < 4; ++i) {
646 hpa_t root = vcpu->mmu.pae_root[i];
648 ASSERT(!VALID_PAGE(root));
649 if (vcpu->mmu.root_level == PT32E_ROOT_LEVEL)
650 root_gfn = vcpu->pdptrs[i] >> PAGE_SHIFT;
651 else if (vcpu->mmu.root_level == 0)
653 root = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
654 PT32_ROOT_LEVEL, !is_paging(vcpu),
656 vcpu->mmu.pae_root[i] = root | PT_PRESENT_MASK;
658 vcpu->mmu.root_hpa = __pa(vcpu->mmu.pae_root);
661 static void nonpaging_flush(struct kvm_vcpu *vcpu)
663 hpa_t root = vcpu->mmu.root_hpa;
665 ++kvm_stat.tlb_flush;
666 pgprintk("nonpaging_flush\n");
667 mmu_free_roots(vcpu);
668 mmu_alloc_roots(vcpu);
669 kvm_arch_ops->set_cr3(vcpu, root);
670 kvm_arch_ops->tlb_flush(vcpu);
673 static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr)
678 static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
685 ASSERT(VALID_PAGE(vcpu->mmu.root_hpa));
690 paddr = gpa_to_hpa(vcpu , addr & PT64_BASE_ADDR_MASK);
692 if (is_error_hpa(paddr))
695 ret = nonpaging_map(vcpu, addr & PAGE_MASK, paddr);
697 nonpaging_flush(vcpu);
705 static void nonpaging_inval_page(struct kvm_vcpu *vcpu, gva_t addr)
709 static void nonpaging_free(struct kvm_vcpu *vcpu)
711 mmu_free_roots(vcpu);
714 static int nonpaging_init_context(struct kvm_vcpu *vcpu)
716 struct kvm_mmu *context = &vcpu->mmu;
718 context->new_cr3 = nonpaging_new_cr3;
719 context->page_fault = nonpaging_page_fault;
720 context->inval_page = nonpaging_inval_page;
721 context->gva_to_gpa = nonpaging_gva_to_gpa;
722 context->free = nonpaging_free;
723 context->root_level = 0;
724 context->shadow_root_level = PT32E_ROOT_LEVEL;
725 mmu_alloc_roots(vcpu);
726 ASSERT(VALID_PAGE(context->root_hpa));
727 kvm_arch_ops->set_cr3(vcpu, context->root_hpa);
731 static void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
733 ++kvm_stat.tlb_flush;
734 kvm_arch_ops->tlb_flush(vcpu);
737 static void paging_new_cr3(struct kvm_vcpu *vcpu)
739 pgprintk("%s: cr3 %lx\n", __FUNCTION__, vcpu->cr3);
740 mmu_free_roots(vcpu);
741 mmu_alloc_roots(vcpu);
742 kvm_mmu_flush_tlb(vcpu);
743 kvm_arch_ops->set_cr3(vcpu, vcpu->mmu.root_hpa);
746 static void mark_pagetable_nonglobal(void *shadow_pte)
748 page_header(__pa(shadow_pte))->global = 0;
751 static inline void set_pte_common(struct kvm_vcpu *vcpu,
759 *shadow_pte |= access_bits << PT_SHADOW_BITS_OFFSET;
761 access_bits &= ~PT_WRITABLE_MASK;
763 paddr = gpa_to_hpa(vcpu, gaddr & PT64_BASE_ADDR_MASK);
765 *shadow_pte |= access_bits;
767 if (!(*shadow_pte & PT_GLOBAL_MASK))
768 mark_pagetable_nonglobal(shadow_pte);
770 if (is_error_hpa(paddr)) {
771 *shadow_pte |= gaddr;
772 *shadow_pte |= PT_SHADOW_IO_MARK;
773 *shadow_pte &= ~PT_PRESENT_MASK;
777 *shadow_pte |= paddr;
779 if (access_bits & PT_WRITABLE_MASK) {
780 struct kvm_mmu_page *shadow;
782 shadow = kvm_mmu_lookup_page(vcpu, gaddr >> PAGE_SHIFT);
784 pgprintk("%s: found shadow page for %lx, marking ro\n",
785 __FUNCTION__, (gfn_t)(gaddr >> PAGE_SHIFT));
786 access_bits &= ~PT_WRITABLE_MASK;
787 *shadow_pte &= ~PT_WRITABLE_MASK;
791 if (access_bits & PT_WRITABLE_MASK)
792 mark_page_dirty(vcpu->kvm, gaddr >> PAGE_SHIFT);
794 page_header_update_slot(vcpu->kvm, shadow_pte, gaddr);
795 rmap_add(vcpu->kvm, shadow_pte);
798 static void inject_page_fault(struct kvm_vcpu *vcpu,
802 kvm_arch_ops->inject_page_fault(vcpu, addr, err_code);
805 static inline int fix_read_pf(u64 *shadow_ent)
807 if ((*shadow_ent & PT_SHADOW_USER_MASK) &&
808 !(*shadow_ent & PT_USER_MASK)) {
810 * If supervisor write protect is disabled, we shadow kernel
811 * pages as user pages so we can trap the write access.
813 *shadow_ent |= PT_USER_MASK;
814 *shadow_ent &= ~PT_WRITABLE_MASK;
822 static int may_access(u64 pte, int write, int user)
825 if (user && !(pte & PT_USER_MASK))
827 if (write && !(pte & PT_WRITABLE_MASK))
833 * Remove a shadow pte.
835 static void paging_inval_page(struct kvm_vcpu *vcpu, gva_t addr)
837 hpa_t page_addr = vcpu->mmu.root_hpa;
838 int level = vcpu->mmu.shadow_root_level;
843 u32 index = PT64_INDEX(addr, level);
844 u64 *table = __va(page_addr);
846 if (level == PT_PAGE_TABLE_LEVEL ) {
847 rmap_remove(vcpu->kvm, &table[index]);
852 if (!is_present_pte(table[index]))
855 page_addr = table[index] & PT64_BASE_ADDR_MASK;
857 if (level == PT_DIRECTORY_LEVEL &&
858 (table[index] & PT_SHADOW_PS_MARK)) {
860 release_pt_page_64(vcpu, page_addr, PT_PAGE_TABLE_LEVEL);
862 kvm_arch_ops->tlb_flush(vcpu);
868 static void paging_free(struct kvm_vcpu *vcpu)
870 nonpaging_free(vcpu);
874 #include "paging_tmpl.h"
878 #include "paging_tmpl.h"
881 static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
883 struct kvm_mmu *context = &vcpu->mmu;
885 ASSERT(is_pae(vcpu));
886 context->new_cr3 = paging_new_cr3;
887 context->page_fault = paging64_page_fault;
888 context->inval_page = paging_inval_page;
889 context->gva_to_gpa = paging64_gva_to_gpa;
890 context->free = paging_free;
891 context->root_level = level;
892 context->shadow_root_level = level;
893 mmu_alloc_roots(vcpu);
894 ASSERT(VALID_PAGE(context->root_hpa));
895 kvm_arch_ops->set_cr3(vcpu, context->root_hpa |
896 (vcpu->cr3 & (CR3_PCD_MASK | CR3_WPT_MASK)));
900 static int paging64_init_context(struct kvm_vcpu *vcpu)
902 return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
905 static int paging32_init_context(struct kvm_vcpu *vcpu)
907 struct kvm_mmu *context = &vcpu->mmu;
909 context->new_cr3 = paging_new_cr3;
910 context->page_fault = paging32_page_fault;
911 context->inval_page = paging_inval_page;
912 context->gva_to_gpa = paging32_gva_to_gpa;
913 context->free = paging_free;
914 context->root_level = PT32_ROOT_LEVEL;
915 context->shadow_root_level = PT32E_ROOT_LEVEL;
916 mmu_alloc_roots(vcpu);
917 ASSERT(VALID_PAGE(context->root_hpa));
918 kvm_arch_ops->set_cr3(vcpu, context->root_hpa |
919 (vcpu->cr3 & (CR3_PCD_MASK | CR3_WPT_MASK)));
923 static int paging32E_init_context(struct kvm_vcpu *vcpu)
925 return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
928 static int init_kvm_mmu(struct kvm_vcpu *vcpu)
931 ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
933 if (!is_paging(vcpu))
934 return nonpaging_init_context(vcpu);
935 else if (is_long_mode(vcpu))
936 return paging64_init_context(vcpu);
937 else if (is_pae(vcpu))
938 return paging32E_init_context(vcpu);
940 return paging32_init_context(vcpu);
943 static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
946 if (VALID_PAGE(vcpu->mmu.root_hpa)) {
947 vcpu->mmu.free(vcpu);
948 vcpu->mmu.root_hpa = INVALID_PAGE;
952 int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
954 destroy_kvm_mmu(vcpu);
955 return init_kvm_mmu(vcpu);
958 static void free_mmu_pages(struct kvm_vcpu *vcpu)
960 while (!list_empty(&vcpu->free_pages)) {
961 struct kvm_mmu_page *page;
963 page = list_entry(vcpu->free_pages.next,
964 struct kvm_mmu_page, link);
965 list_del(&page->link);
966 __free_page(pfn_to_page(page->page_hpa >> PAGE_SHIFT));
967 page->page_hpa = INVALID_PAGE;
969 free_page((unsigned long)vcpu->mmu.pae_root);
972 static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
979 for (i = 0; i < KVM_NUM_MMU_PAGES; i++) {
980 struct kvm_mmu_page *page_header = &vcpu->page_header_buf[i];
982 INIT_LIST_HEAD(&page_header->link);
983 if ((page = alloc_page(GFP_KERNEL)) == NULL)
985 page->private = (unsigned long)page_header;
986 page_header->page_hpa = (hpa_t)page_to_pfn(page) << PAGE_SHIFT;
987 memset(__va(page_header->page_hpa), 0, PAGE_SIZE);
988 list_add(&page_header->link, &vcpu->free_pages);
992 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
993 * Therefore we need to allocate shadow page tables in the first
994 * 4GB of memory, which happens to fit the DMA32 zone.
996 page = alloc_page(GFP_KERNEL | __GFP_DMA32);
999 vcpu->mmu.pae_root = page_address(page);
1000 for (i = 0; i < 4; ++i)
1001 vcpu->mmu.pae_root[i] = INVALID_PAGE;
1006 free_mmu_pages(vcpu);
1010 int kvm_mmu_create(struct kvm_vcpu *vcpu)
1013 ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
1014 ASSERT(list_empty(&vcpu->free_pages));
1016 return alloc_mmu_pages(vcpu);
1019 int kvm_mmu_setup(struct kvm_vcpu *vcpu)
1022 ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
1023 ASSERT(!list_empty(&vcpu->free_pages));
1025 return init_kvm_mmu(vcpu);
1028 void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
1032 destroy_kvm_mmu(vcpu);
1033 free_mmu_pages(vcpu);
1036 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
1038 struct kvm_mmu_page *page;
1040 list_for_each_entry(page, &kvm->active_mmu_pages, link) {
1044 if (!test_bit(slot, &page->slot_bitmap))
1047 pt = __va(page->page_hpa);
1048 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
1050 if (pt[i] & PT_WRITABLE_MASK) {
1051 rmap_remove(kvm, &pt[i]);
1052 pt[i] &= ~PT_WRITABLE_MASK;