2 * Kernel-based Virtual Machine driver for Linux
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
9 * Copyright (C) 2006 Qumranet, Inc.
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Avi Kivity <avi@qumranet.com>
15 * This work is licensed under the terms of the GNU GPL, version 2. See
16 * the COPYING file in the top-level directory.
23 #include <linux/types.h>
24 #include <linux/string.h>
26 #include <linux/highmem.h>
27 #include <linux/module.h>
30 #include <asm/cmpxchg.h>
37 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
39 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
44 #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
45 #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
49 #define pgprintk(x...) do { } while (0)
50 #define rmap_printk(x...) do { } while (0)
54 #if defined(MMU_DEBUG) || defined(AUDIT)
59 #define ASSERT(x) do { } while (0)
63 printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
64 __FILE__, __LINE__, #x); \
68 #define PT64_PT_BITS 9
69 #define PT64_ENT_PER_PAGE (1 << PT64_PT_BITS)
70 #define PT32_PT_BITS 10
71 #define PT32_ENT_PER_PAGE (1 << PT32_PT_BITS)
73 #define PT_WRITABLE_SHIFT 1
75 #define PT_PRESENT_MASK (1ULL << 0)
76 #define PT_WRITABLE_MASK (1ULL << PT_WRITABLE_SHIFT)
77 #define PT_USER_MASK (1ULL << 2)
78 #define PT_PWT_MASK (1ULL << 3)
79 #define PT_PCD_MASK (1ULL << 4)
80 #define PT_ACCESSED_MASK (1ULL << 5)
81 #define PT_DIRTY_MASK (1ULL << 6)
82 #define PT_PAGE_SIZE_MASK (1ULL << 7)
83 #define PT_PAT_MASK (1ULL << 7)
84 #define PT_GLOBAL_MASK (1ULL << 8)
85 #define PT64_NX_MASK (1ULL << 63)
87 #define PT_PAT_SHIFT 7
88 #define PT_DIR_PAT_SHIFT 12
89 #define PT_DIR_PAT_MASK (1ULL << PT_DIR_PAT_SHIFT)
91 #define PT32_DIR_PSE36_SIZE 4
92 #define PT32_DIR_PSE36_SHIFT 13
93 #define PT32_DIR_PSE36_MASK (((1ULL << PT32_DIR_PSE36_SIZE) - 1) << PT32_DIR_PSE36_SHIFT)
96 #define PT_FIRST_AVAIL_BITS_SHIFT 9
97 #define PT64_SECOND_AVAIL_BITS_SHIFT 52
99 #define PT_SHADOW_IO_MARK (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
101 #define VALID_PAGE(x) ((x) != INVALID_PAGE)
103 #define PT64_LEVEL_BITS 9
105 #define PT64_LEVEL_SHIFT(level) \
106 ( PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS )
108 #define PT64_LEVEL_MASK(level) \
109 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
111 #define PT64_INDEX(address, level)\
112 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
115 #define PT32_LEVEL_BITS 10
117 #define PT32_LEVEL_SHIFT(level) \
118 ( PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS )
120 #define PT32_LEVEL_MASK(level) \
121 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
123 #define PT32_INDEX(address, level)\
124 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
127 #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
128 #define PT64_DIR_BASE_ADDR_MASK \
129 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
131 #define PT32_BASE_ADDR_MASK PAGE_MASK
132 #define PT32_DIR_BASE_ADDR_MASK \
133 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
136 #define PFERR_PRESENT_MASK (1U << 0)
137 #define PFERR_WRITE_MASK (1U << 1)
138 #define PFERR_USER_MASK (1U << 2)
139 #define PFERR_FETCH_MASK (1U << 4)
141 #define PT64_ROOT_LEVEL 4
142 #define PT32_ROOT_LEVEL 2
143 #define PT32E_ROOT_LEVEL 3
145 #define PT_DIRECTORY_LEVEL 2
146 #define PT_PAGE_TABLE_LEVEL 1
150 struct kvm_rmap_desc {
151 u64 *shadow_ptes[RMAP_EXT];
152 struct kvm_rmap_desc *more;
155 static struct kmem_cache *pte_chain_cache;
156 static struct kmem_cache *rmap_desc_cache;
157 static struct kmem_cache *mmu_page_header_cache;
159 static int is_write_protection(struct kvm_vcpu *vcpu)
161 return vcpu->cr0 & X86_CR0_WP;
164 static int is_cpuid_PSE36(void)
169 static int is_nx(struct kvm_vcpu *vcpu)
171 return vcpu->shadow_efer & EFER_NX;
174 static int is_present_pte(unsigned long pte)
176 return pte & PT_PRESENT_MASK;
179 static int is_writeble_pte(unsigned long pte)
181 return pte & PT_WRITABLE_MASK;
184 static int is_io_pte(unsigned long pte)
186 return pte & PT_SHADOW_IO_MARK;
189 static int is_rmap_pte(u64 pte)
191 return (pte & (PT_WRITABLE_MASK | PT_PRESENT_MASK))
192 == (PT_WRITABLE_MASK | PT_PRESENT_MASK);
195 static void set_shadow_pte(u64 *sptep, u64 spte)
198 set_64bit((unsigned long *)sptep, spte);
200 set_64bit((unsigned long long *)sptep, spte);
204 static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
205 struct kmem_cache *base_cache, int min,
210 if (cache->nobjs >= min)
212 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
213 obj = kmem_cache_zalloc(base_cache, gfp_flags);
216 cache->objects[cache->nobjs++] = obj;
221 static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
224 kfree(mc->objects[--mc->nobjs]);
227 static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
228 int min, gfp_t gfp_flags)
232 if (cache->nobjs >= min)
234 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
235 page = alloc_page(gfp_flags);
238 set_page_private(page, 0);
239 cache->objects[cache->nobjs++] = page_address(page);
244 static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
247 free_page((unsigned long)mc->objects[--mc->nobjs]);
250 static int __mmu_topup_memory_caches(struct kvm_vcpu *vcpu, gfp_t gfp_flags)
254 r = mmu_topup_memory_cache(&vcpu->mmu_pte_chain_cache,
255 pte_chain_cache, 4, gfp_flags);
258 r = mmu_topup_memory_cache(&vcpu->mmu_rmap_desc_cache,
259 rmap_desc_cache, 1, gfp_flags);
262 r = mmu_topup_memory_cache_page(&vcpu->mmu_page_cache, 4, gfp_flags);
265 r = mmu_topup_memory_cache(&vcpu->mmu_page_header_cache,
266 mmu_page_header_cache, 4, gfp_flags);
271 static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
275 r = __mmu_topup_memory_caches(vcpu, GFP_NOWAIT);
276 kvm_mmu_free_some_pages(vcpu);
278 mutex_unlock(&vcpu->kvm->lock);
279 r = __mmu_topup_memory_caches(vcpu, GFP_KERNEL);
280 mutex_lock(&vcpu->kvm->lock);
285 static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
287 mmu_free_memory_cache(&vcpu->mmu_pte_chain_cache);
288 mmu_free_memory_cache(&vcpu->mmu_rmap_desc_cache);
289 mmu_free_memory_cache_page(&vcpu->mmu_page_cache);
290 mmu_free_memory_cache(&vcpu->mmu_page_header_cache);
293 static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
299 p = mc->objects[--mc->nobjs];
304 static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
306 return mmu_memory_cache_alloc(&vcpu->mmu_pte_chain_cache,
307 sizeof(struct kvm_pte_chain));
310 static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
315 static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
317 return mmu_memory_cache_alloc(&vcpu->mmu_rmap_desc_cache,
318 sizeof(struct kvm_rmap_desc));
321 static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
327 * Reverse mapping data structures:
329 * If page->private bit zero is zero, then page->private points to the
330 * shadow page table entry that points to page_address(page).
332 * If page->private bit zero is one, (then page->private & ~1) points
333 * to a struct kvm_rmap_desc containing more mappings.
335 static void rmap_add(struct kvm_vcpu *vcpu, u64 *spte)
338 struct kvm_rmap_desc *desc;
341 if (!is_rmap_pte(*spte))
343 page = pfn_to_page((*spte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT);
344 if (!page_private(page)) {
345 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
346 set_page_private(page,(unsigned long)spte);
347 } else if (!(page_private(page) & 1)) {
348 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
349 desc = mmu_alloc_rmap_desc(vcpu);
350 desc->shadow_ptes[0] = (u64 *)page_private(page);
351 desc->shadow_ptes[1] = spte;
352 set_page_private(page,(unsigned long)desc | 1);
354 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
355 desc = (struct kvm_rmap_desc *)(page_private(page) & ~1ul);
356 while (desc->shadow_ptes[RMAP_EXT-1] && desc->more)
358 if (desc->shadow_ptes[RMAP_EXT-1]) {
359 desc->more = mmu_alloc_rmap_desc(vcpu);
362 for (i = 0; desc->shadow_ptes[i]; ++i)
364 desc->shadow_ptes[i] = spte;
368 static void rmap_desc_remove_entry(struct page *page,
369 struct kvm_rmap_desc *desc,
371 struct kvm_rmap_desc *prev_desc)
375 for (j = RMAP_EXT - 1; !desc->shadow_ptes[j] && j > i; --j)
377 desc->shadow_ptes[i] = desc->shadow_ptes[j];
378 desc->shadow_ptes[j] = NULL;
381 if (!prev_desc && !desc->more)
382 set_page_private(page,(unsigned long)desc->shadow_ptes[0]);
385 prev_desc->more = desc->more;
387 set_page_private(page,(unsigned long)desc->more | 1);
388 mmu_free_rmap_desc(desc);
391 static void rmap_remove(u64 *spte)
394 struct kvm_rmap_desc *desc;
395 struct kvm_rmap_desc *prev_desc;
398 if (!is_rmap_pte(*spte))
400 page = pfn_to_page((*spte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT);
401 if (!page_private(page)) {
402 printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
404 } else if (!(page_private(page) & 1)) {
405 rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
406 if ((u64 *)page_private(page) != spte) {
407 printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
411 set_page_private(page,0);
413 rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
414 desc = (struct kvm_rmap_desc *)(page_private(page) & ~1ul);
417 for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i)
418 if (desc->shadow_ptes[i] == spte) {
419 rmap_desc_remove_entry(page,
431 static void rmap_write_protect(struct kvm_vcpu *vcpu, u64 gfn)
433 struct kvm *kvm = vcpu->kvm;
435 struct kvm_rmap_desc *desc;
438 page = gfn_to_page(kvm, gfn);
441 while (page_private(page)) {
442 if (!(page_private(page) & 1))
443 spte = (u64 *)page_private(page);
445 desc = (struct kvm_rmap_desc *)(page_private(page) & ~1ul);
446 spte = desc->shadow_ptes[0];
449 BUG_ON((*spte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT
450 != page_to_pfn(page));
451 BUG_ON(!(*spte & PT_PRESENT_MASK));
452 BUG_ON(!(*spte & PT_WRITABLE_MASK));
453 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
455 set_shadow_pte(spte, *spte & ~PT_WRITABLE_MASK);
456 kvm_flush_remote_tlbs(vcpu->kvm);
461 static int is_empty_shadow_page(u64 *spt)
466 for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
468 printk(KERN_ERR "%s: %p %llx\n", __FUNCTION__,
476 static void kvm_mmu_free_page(struct kvm *kvm,
477 struct kvm_mmu_page *page_head)
479 ASSERT(is_empty_shadow_page(page_head->spt));
480 list_del(&page_head->link);
481 __free_page(virt_to_page(page_head->spt));
483 ++kvm->n_free_mmu_pages;
486 static unsigned kvm_page_table_hashfn(gfn_t gfn)
491 static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
494 struct kvm_mmu_page *page;
496 if (!vcpu->kvm->n_free_mmu_pages)
499 page = mmu_memory_cache_alloc(&vcpu->mmu_page_header_cache,
501 page->spt = mmu_memory_cache_alloc(&vcpu->mmu_page_cache, PAGE_SIZE);
502 set_page_private(virt_to_page(page->spt), (unsigned long)page);
503 list_add(&page->link, &vcpu->kvm->active_mmu_pages);
504 ASSERT(is_empty_shadow_page(page->spt));
505 page->slot_bitmap = 0;
506 page->multimapped = 0;
507 page->parent_pte = parent_pte;
508 --vcpu->kvm->n_free_mmu_pages;
512 static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
513 struct kvm_mmu_page *page, u64 *parent_pte)
515 struct kvm_pte_chain *pte_chain;
516 struct hlist_node *node;
521 if (!page->multimapped) {
522 u64 *old = page->parent_pte;
525 page->parent_pte = parent_pte;
528 page->multimapped = 1;
529 pte_chain = mmu_alloc_pte_chain(vcpu);
530 INIT_HLIST_HEAD(&page->parent_ptes);
531 hlist_add_head(&pte_chain->link, &page->parent_ptes);
532 pte_chain->parent_ptes[0] = old;
534 hlist_for_each_entry(pte_chain, node, &page->parent_ptes, link) {
535 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
537 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
538 if (!pte_chain->parent_ptes[i]) {
539 pte_chain->parent_ptes[i] = parent_pte;
543 pte_chain = mmu_alloc_pte_chain(vcpu);
545 hlist_add_head(&pte_chain->link, &page->parent_ptes);
546 pte_chain->parent_ptes[0] = parent_pte;
549 static void mmu_page_remove_parent_pte(struct kvm_mmu_page *page,
552 struct kvm_pte_chain *pte_chain;
553 struct hlist_node *node;
556 if (!page->multimapped) {
557 BUG_ON(page->parent_pte != parent_pte);
558 page->parent_pte = NULL;
561 hlist_for_each_entry(pte_chain, node, &page->parent_ptes, link)
562 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
563 if (!pte_chain->parent_ptes[i])
565 if (pte_chain->parent_ptes[i] != parent_pte)
567 while (i + 1 < NR_PTE_CHAIN_ENTRIES
568 && pte_chain->parent_ptes[i + 1]) {
569 pte_chain->parent_ptes[i]
570 = pte_chain->parent_ptes[i + 1];
573 pte_chain->parent_ptes[i] = NULL;
575 hlist_del(&pte_chain->link);
576 mmu_free_pte_chain(pte_chain);
577 if (hlist_empty(&page->parent_ptes)) {
578 page->multimapped = 0;
579 page->parent_pte = NULL;
587 static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm_vcpu *vcpu,
591 struct hlist_head *bucket;
592 struct kvm_mmu_page *page;
593 struct hlist_node *node;
595 pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn);
596 index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
597 bucket = &vcpu->kvm->mmu_page_hash[index];
598 hlist_for_each_entry(page, node, bucket, hash_link)
599 if (page->gfn == gfn && !page->role.metaphysical) {
600 pgprintk("%s: found role %x\n",
601 __FUNCTION__, page->role.word);
607 static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
612 unsigned hugepage_access,
615 union kvm_mmu_page_role role;
618 struct hlist_head *bucket;
619 struct kvm_mmu_page *page;
620 struct hlist_node *node;
623 role.glevels = vcpu->mmu.root_level;
625 role.metaphysical = metaphysical;
626 role.hugepage_access = hugepage_access;
627 if (vcpu->mmu.root_level <= PT32_ROOT_LEVEL) {
628 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
629 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
630 role.quadrant = quadrant;
632 pgprintk("%s: looking gfn %lx role %x\n", __FUNCTION__,
634 index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
635 bucket = &vcpu->kvm->mmu_page_hash[index];
636 hlist_for_each_entry(page, node, bucket, hash_link)
637 if (page->gfn == gfn && page->role.word == role.word) {
638 mmu_page_add_parent_pte(vcpu, page, parent_pte);
639 pgprintk("%s: found\n", __FUNCTION__);
642 page = kvm_mmu_alloc_page(vcpu, parent_pte);
645 pgprintk("%s: adding gfn %lx role %x\n", __FUNCTION__, gfn, role.word);
648 hlist_add_head(&page->hash_link, bucket);
650 rmap_write_protect(vcpu, gfn);
654 static void kvm_mmu_page_unlink_children(struct kvm *kvm,
655 struct kvm_mmu_page *page)
663 if (page->role.level == PT_PAGE_TABLE_LEVEL) {
664 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
665 if (pt[i] & PT_PRESENT_MASK)
669 kvm_flush_remote_tlbs(kvm);
673 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
677 if (!(ent & PT_PRESENT_MASK))
679 ent &= PT64_BASE_ADDR_MASK;
680 mmu_page_remove_parent_pte(page_header(ent), &pt[i]);
682 kvm_flush_remote_tlbs(kvm);
685 static void kvm_mmu_put_page(struct kvm_mmu_page *page,
688 mmu_page_remove_parent_pte(page, parent_pte);
691 static void kvm_mmu_zap_page(struct kvm *kvm,
692 struct kvm_mmu_page *page)
696 while (page->multimapped || page->parent_pte) {
697 if (!page->multimapped)
698 parent_pte = page->parent_pte;
700 struct kvm_pte_chain *chain;
702 chain = container_of(page->parent_ptes.first,
703 struct kvm_pte_chain, link);
704 parent_pte = chain->parent_ptes[0];
707 kvm_mmu_put_page(page, parent_pte);
708 set_shadow_pte(parent_pte, 0);
710 kvm_mmu_page_unlink_children(kvm, page);
711 if (!page->root_count) {
712 hlist_del(&page->hash_link);
713 kvm_mmu_free_page(kvm, page);
715 list_move(&page->link, &kvm->active_mmu_pages);
718 static int kvm_mmu_unprotect_page(struct kvm_vcpu *vcpu, gfn_t gfn)
721 struct hlist_head *bucket;
722 struct kvm_mmu_page *page;
723 struct hlist_node *node, *n;
726 pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn);
728 index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
729 bucket = &vcpu->kvm->mmu_page_hash[index];
730 hlist_for_each_entry_safe(page, node, n, bucket, hash_link)
731 if (page->gfn == gfn && !page->role.metaphysical) {
732 pgprintk("%s: gfn %lx role %x\n", __FUNCTION__, gfn,
734 kvm_mmu_zap_page(vcpu->kvm, page);
740 static void mmu_unshadow(struct kvm_vcpu *vcpu, gfn_t gfn)
742 struct kvm_mmu_page *page;
744 while ((page = kvm_mmu_lookup_page(vcpu, gfn)) != NULL) {
745 pgprintk("%s: zap %lx %x\n",
746 __FUNCTION__, gfn, page->role.word);
747 kvm_mmu_zap_page(vcpu->kvm, page);
751 static void page_header_update_slot(struct kvm *kvm, void *pte, gpa_t gpa)
753 int slot = memslot_id(kvm, gfn_to_memslot(kvm, gpa >> PAGE_SHIFT));
754 struct kvm_mmu_page *page_head = page_header(__pa(pte));
756 __set_bit(slot, &page_head->slot_bitmap);
759 hpa_t safe_gpa_to_hpa(struct kvm_vcpu *vcpu, gpa_t gpa)
761 hpa_t hpa = gpa_to_hpa(vcpu, gpa);
763 return is_error_hpa(hpa) ? bad_page_address | (gpa & ~PAGE_MASK): hpa;
766 hpa_t gpa_to_hpa(struct kvm_vcpu *vcpu, gpa_t gpa)
770 ASSERT((gpa & HPA_ERR_MASK) == 0);
771 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
773 return gpa | HPA_ERR_MASK;
774 return ((hpa_t)page_to_pfn(page) << PAGE_SHIFT)
775 | (gpa & (PAGE_SIZE-1));
778 hpa_t gva_to_hpa(struct kvm_vcpu *vcpu, gva_t gva)
780 gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva);
782 if (gpa == UNMAPPED_GVA)
784 return gpa_to_hpa(vcpu, gpa);
787 struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva)
789 gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva);
791 if (gpa == UNMAPPED_GVA)
793 return pfn_to_page(gpa_to_hpa(vcpu, gpa) >> PAGE_SHIFT);
796 static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
800 static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, hpa_t p)
802 int level = PT32E_ROOT_LEVEL;
803 hpa_t table_addr = vcpu->mmu.root_hpa;
806 u32 index = PT64_INDEX(v, level);
810 ASSERT(VALID_PAGE(table_addr));
811 table = __va(table_addr);
815 if (is_present_pte(pte) && is_writeble_pte(pte))
817 mark_page_dirty(vcpu->kvm, v >> PAGE_SHIFT);
818 page_header_update_slot(vcpu->kvm, table, v);
819 table[index] = p | PT_PRESENT_MASK | PT_WRITABLE_MASK |
821 rmap_add(vcpu, &table[index]);
825 if (table[index] == 0) {
826 struct kvm_mmu_page *new_table;
829 pseudo_gfn = (v & PT64_DIR_BASE_ADDR_MASK)
831 new_table = kvm_mmu_get_page(vcpu, pseudo_gfn,
833 1, 0, &table[index]);
835 pgprintk("nonpaging_map: ENOMEM\n");
839 table[index] = __pa(new_table->spt) | PT_PRESENT_MASK
840 | PT_WRITABLE_MASK | PT_USER_MASK;
842 table_addr = table[index] & PT64_BASE_ADDR_MASK;
846 static void mmu_free_roots(struct kvm_vcpu *vcpu)
849 struct kvm_mmu_page *page;
851 if (!VALID_PAGE(vcpu->mmu.root_hpa))
854 if (vcpu->mmu.shadow_root_level == PT64_ROOT_LEVEL) {
855 hpa_t root = vcpu->mmu.root_hpa;
857 page = page_header(root);
859 vcpu->mmu.root_hpa = INVALID_PAGE;
863 for (i = 0; i < 4; ++i) {
864 hpa_t root = vcpu->mmu.pae_root[i];
867 root &= PT64_BASE_ADDR_MASK;
868 page = page_header(root);
871 vcpu->mmu.pae_root[i] = INVALID_PAGE;
873 vcpu->mmu.root_hpa = INVALID_PAGE;
876 static void mmu_alloc_roots(struct kvm_vcpu *vcpu)
880 struct kvm_mmu_page *page;
882 root_gfn = vcpu->cr3 >> PAGE_SHIFT;
885 if (vcpu->mmu.shadow_root_level == PT64_ROOT_LEVEL) {
886 hpa_t root = vcpu->mmu.root_hpa;
888 ASSERT(!VALID_PAGE(root));
889 page = kvm_mmu_get_page(vcpu, root_gfn, 0,
890 PT64_ROOT_LEVEL, 0, 0, NULL);
891 root = __pa(page->spt);
893 vcpu->mmu.root_hpa = root;
897 for (i = 0; i < 4; ++i) {
898 hpa_t root = vcpu->mmu.pae_root[i];
900 ASSERT(!VALID_PAGE(root));
901 if (vcpu->mmu.root_level == PT32E_ROOT_LEVEL) {
902 if (!is_present_pte(vcpu->pdptrs[i])) {
903 vcpu->mmu.pae_root[i] = 0;
906 root_gfn = vcpu->pdptrs[i] >> PAGE_SHIFT;
907 } else if (vcpu->mmu.root_level == 0)
909 page = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
910 PT32_ROOT_LEVEL, !is_paging(vcpu),
912 root = __pa(page->spt);
914 vcpu->mmu.pae_root[i] = root | PT_PRESENT_MASK;
916 vcpu->mmu.root_hpa = __pa(vcpu->mmu.pae_root);
919 static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr)
924 static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
931 r = mmu_topup_memory_caches(vcpu);
936 ASSERT(VALID_PAGE(vcpu->mmu.root_hpa));
939 paddr = gpa_to_hpa(vcpu , addr & PT64_BASE_ADDR_MASK);
941 if (is_error_hpa(paddr))
944 return nonpaging_map(vcpu, addr & PAGE_MASK, paddr);
947 static void nonpaging_free(struct kvm_vcpu *vcpu)
949 mmu_free_roots(vcpu);
952 static int nonpaging_init_context(struct kvm_vcpu *vcpu)
954 struct kvm_mmu *context = &vcpu->mmu;
956 context->new_cr3 = nonpaging_new_cr3;
957 context->page_fault = nonpaging_page_fault;
958 context->gva_to_gpa = nonpaging_gva_to_gpa;
959 context->free = nonpaging_free;
960 context->root_level = 0;
961 context->shadow_root_level = PT32E_ROOT_LEVEL;
962 context->root_hpa = INVALID_PAGE;
966 static void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
968 ++vcpu->stat.tlb_flush;
969 kvm_arch_ops->tlb_flush(vcpu);
972 static void paging_new_cr3(struct kvm_vcpu *vcpu)
974 pgprintk("%s: cr3 %lx\n", __FUNCTION__, vcpu->cr3);
975 mmu_free_roots(vcpu);
978 static void inject_page_fault(struct kvm_vcpu *vcpu,
982 kvm_arch_ops->inject_page_fault(vcpu, addr, err_code);
985 static void paging_free(struct kvm_vcpu *vcpu)
987 nonpaging_free(vcpu);
991 #include "paging_tmpl.h"
995 #include "paging_tmpl.h"
998 static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
1000 struct kvm_mmu *context = &vcpu->mmu;
1002 ASSERT(is_pae(vcpu));
1003 context->new_cr3 = paging_new_cr3;
1004 context->page_fault = paging64_page_fault;
1005 context->gva_to_gpa = paging64_gva_to_gpa;
1006 context->free = paging_free;
1007 context->root_level = level;
1008 context->shadow_root_level = level;
1009 context->root_hpa = INVALID_PAGE;
1013 static int paging64_init_context(struct kvm_vcpu *vcpu)
1015 return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
1018 static int paging32_init_context(struct kvm_vcpu *vcpu)
1020 struct kvm_mmu *context = &vcpu->mmu;
1022 context->new_cr3 = paging_new_cr3;
1023 context->page_fault = paging32_page_fault;
1024 context->gva_to_gpa = paging32_gva_to_gpa;
1025 context->free = paging_free;
1026 context->root_level = PT32_ROOT_LEVEL;
1027 context->shadow_root_level = PT32E_ROOT_LEVEL;
1028 context->root_hpa = INVALID_PAGE;
1032 static int paging32E_init_context(struct kvm_vcpu *vcpu)
1034 return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
1037 static int init_kvm_mmu(struct kvm_vcpu *vcpu)
1040 ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
1042 if (!is_paging(vcpu))
1043 return nonpaging_init_context(vcpu);
1044 else if (is_long_mode(vcpu))
1045 return paging64_init_context(vcpu);
1046 else if (is_pae(vcpu))
1047 return paging32E_init_context(vcpu);
1049 return paging32_init_context(vcpu);
1052 static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
1055 if (VALID_PAGE(vcpu->mmu.root_hpa)) {
1056 vcpu->mmu.free(vcpu);
1057 vcpu->mmu.root_hpa = INVALID_PAGE;
1061 int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
1063 destroy_kvm_mmu(vcpu);
1064 return init_kvm_mmu(vcpu);
1067 int kvm_mmu_load(struct kvm_vcpu *vcpu)
1071 mutex_lock(&vcpu->kvm->lock);
1072 r = mmu_topup_memory_caches(vcpu);
1075 mmu_alloc_roots(vcpu);
1076 kvm_arch_ops->set_cr3(vcpu, vcpu->mmu.root_hpa);
1077 kvm_mmu_flush_tlb(vcpu);
1079 mutex_unlock(&vcpu->kvm->lock);
1082 EXPORT_SYMBOL_GPL(kvm_mmu_load);
1084 void kvm_mmu_unload(struct kvm_vcpu *vcpu)
1086 mmu_free_roots(vcpu);
1089 static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
1090 struct kvm_mmu_page *page,
1094 struct kvm_mmu_page *child;
1097 if (is_present_pte(pte)) {
1098 if (page->role.level == PT_PAGE_TABLE_LEVEL)
1101 child = page_header(pte & PT64_BASE_ADDR_MASK);
1102 mmu_page_remove_parent_pte(child, spte);
1106 kvm_flush_remote_tlbs(vcpu->kvm);
1109 static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
1110 struct kvm_mmu_page *page,
1112 const void *new, int bytes)
1114 if (page->role.level != PT_PAGE_TABLE_LEVEL)
1117 if (page->role.glevels == PT32_ROOT_LEVEL)
1118 paging32_update_pte(vcpu, page, spte, new, bytes);
1120 paging64_update_pte(vcpu, page, spte, new, bytes);
1123 void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
1124 const u8 *new, int bytes)
1126 gfn_t gfn = gpa >> PAGE_SHIFT;
1127 struct kvm_mmu_page *page;
1128 struct hlist_node *node, *n;
1129 struct hlist_head *bucket;
1132 unsigned offset = offset_in_page(gpa);
1134 unsigned page_offset;
1135 unsigned misaligned;
1141 pgprintk("%s: gpa %llx bytes %d\n", __FUNCTION__, gpa, bytes);
1142 if (gfn == vcpu->last_pt_write_gfn) {
1143 ++vcpu->last_pt_write_count;
1144 if (vcpu->last_pt_write_count >= 3)
1147 vcpu->last_pt_write_gfn = gfn;
1148 vcpu->last_pt_write_count = 1;
1150 index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
1151 bucket = &vcpu->kvm->mmu_page_hash[index];
1152 hlist_for_each_entry_safe(page, node, n, bucket, hash_link) {
1153 if (page->gfn != gfn || page->role.metaphysical)
1155 pte_size = page->role.glevels == PT32_ROOT_LEVEL ? 4 : 8;
1156 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
1157 misaligned |= bytes < 4;
1158 if (misaligned || flooded) {
1160 * Misaligned accesses are too much trouble to fix
1161 * up; also, they usually indicate a page is not used
1164 * If we're seeing too many writes to a page,
1165 * it may no longer be a page table, or we may be
1166 * forking, in which case it is better to unmap the
1169 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
1170 gpa, bytes, page->role.word);
1171 kvm_mmu_zap_page(vcpu->kvm, page);
1174 page_offset = offset;
1175 level = page->role.level;
1177 if (page->role.glevels == PT32_ROOT_LEVEL) {
1178 page_offset <<= 1; /* 32->64 */
1180 * A 32-bit pde maps 4MB while the shadow pdes map
1181 * only 2MB. So we need to double the offset again
1182 * and zap two pdes instead of one.
1184 if (level == PT32_ROOT_LEVEL) {
1185 page_offset &= ~7; /* kill rounding error */
1189 quadrant = page_offset >> PAGE_SHIFT;
1190 page_offset &= ~PAGE_MASK;
1191 if (quadrant != page->role.quadrant)
1194 spte = &page->spt[page_offset / sizeof(*spte)];
1196 mmu_pte_write_zap_pte(vcpu, page, spte);
1197 mmu_pte_write_new_pte(vcpu, page, spte, new, bytes);
1203 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
1205 gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva);
1207 return kvm_mmu_unprotect_page(vcpu, gpa >> PAGE_SHIFT);
1210 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
1212 while (vcpu->kvm->n_free_mmu_pages < KVM_REFILL_PAGES) {
1213 struct kvm_mmu_page *page;
1215 page = container_of(vcpu->kvm->active_mmu_pages.prev,
1216 struct kvm_mmu_page, link);
1217 kvm_mmu_zap_page(vcpu->kvm, page);
1221 static void free_mmu_pages(struct kvm_vcpu *vcpu)
1223 struct kvm_mmu_page *page;
1225 while (!list_empty(&vcpu->kvm->active_mmu_pages)) {
1226 page = container_of(vcpu->kvm->active_mmu_pages.next,
1227 struct kvm_mmu_page, link);
1228 kvm_mmu_zap_page(vcpu->kvm, page);
1230 free_page((unsigned long)vcpu->mmu.pae_root);
1233 static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
1240 vcpu->kvm->n_free_mmu_pages = KVM_NUM_MMU_PAGES;
1243 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
1244 * Therefore we need to allocate shadow page tables in the first
1245 * 4GB of memory, which happens to fit the DMA32 zone.
1247 page = alloc_page(GFP_KERNEL | __GFP_DMA32);
1250 vcpu->mmu.pae_root = page_address(page);
1251 for (i = 0; i < 4; ++i)
1252 vcpu->mmu.pae_root[i] = INVALID_PAGE;
1257 free_mmu_pages(vcpu);
1261 int kvm_mmu_create(struct kvm_vcpu *vcpu)
1264 ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
1266 return alloc_mmu_pages(vcpu);
1269 int kvm_mmu_setup(struct kvm_vcpu *vcpu)
1272 ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
1274 return init_kvm_mmu(vcpu);
1277 void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
1281 destroy_kvm_mmu(vcpu);
1282 free_mmu_pages(vcpu);
1283 mmu_free_memory_caches(vcpu);
1286 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
1288 struct kvm_mmu_page *page;
1290 list_for_each_entry(page, &kvm->active_mmu_pages, link) {
1294 if (!test_bit(slot, &page->slot_bitmap))
1298 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
1300 if (pt[i] & PT_WRITABLE_MASK) {
1301 rmap_remove(&pt[i]);
1302 pt[i] &= ~PT_WRITABLE_MASK;
1307 void kvm_mmu_zap_all(struct kvm *kvm)
1309 struct kvm_mmu_page *page, *node;
1311 list_for_each_entry_safe(page, node, &kvm->active_mmu_pages, link)
1312 kvm_mmu_zap_page(kvm, page);
1314 kvm_flush_remote_tlbs(kvm);
1317 void kvm_mmu_module_exit(void)
1319 if (pte_chain_cache)
1320 kmem_cache_destroy(pte_chain_cache);
1321 if (rmap_desc_cache)
1322 kmem_cache_destroy(rmap_desc_cache);
1323 if (mmu_page_header_cache)
1324 kmem_cache_destroy(mmu_page_header_cache);
1327 int kvm_mmu_module_init(void)
1329 pte_chain_cache = kmem_cache_create("kvm_pte_chain",
1330 sizeof(struct kvm_pte_chain),
1332 if (!pte_chain_cache)
1334 rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
1335 sizeof(struct kvm_rmap_desc),
1337 if (!rmap_desc_cache)
1340 mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
1341 sizeof(struct kvm_mmu_page),
1343 if (!mmu_page_header_cache)
1349 kvm_mmu_module_exit();
1355 static const char *audit_msg;
1357 static gva_t canonicalize(gva_t gva)
1359 #ifdef CONFIG_X86_64
1360 gva = (long long)(gva << 16) >> 16;
1365 static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
1366 gva_t va, int level)
1368 u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
1370 gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
1372 for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
1375 if (!(ent & PT_PRESENT_MASK))
1378 va = canonicalize(va);
1380 audit_mappings_page(vcpu, ent, va, level - 1);
1382 gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, va);
1383 hpa_t hpa = gpa_to_hpa(vcpu, gpa);
1385 if ((ent & PT_PRESENT_MASK)
1386 && (ent & PT64_BASE_ADDR_MASK) != hpa)
1387 printk(KERN_ERR "audit error: (%s) levels %d"
1388 " gva %lx gpa %llx hpa %llx ent %llx\n",
1389 audit_msg, vcpu->mmu.root_level,
1395 static void audit_mappings(struct kvm_vcpu *vcpu)
1399 if (vcpu->mmu.root_level == 4)
1400 audit_mappings_page(vcpu, vcpu->mmu.root_hpa, 0, 4);
1402 for (i = 0; i < 4; ++i)
1403 if (vcpu->mmu.pae_root[i] & PT_PRESENT_MASK)
1404 audit_mappings_page(vcpu,
1405 vcpu->mmu.pae_root[i],
1410 static int count_rmaps(struct kvm_vcpu *vcpu)
1415 for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
1416 struct kvm_memory_slot *m = &vcpu->kvm->memslots[i];
1417 struct kvm_rmap_desc *d;
1419 for (j = 0; j < m->npages; ++j) {
1420 struct page *page = m->phys_mem[j];
1424 if (!(page->private & 1)) {
1428 d = (struct kvm_rmap_desc *)(page->private & ~1ul);
1430 for (k = 0; k < RMAP_EXT; ++k)
1431 if (d->shadow_ptes[k])
1442 static int count_writable_mappings(struct kvm_vcpu *vcpu)
1445 struct kvm_mmu_page *page;
1448 list_for_each_entry(page, &vcpu->kvm->active_mmu_pages, link) {
1449 u64 *pt = page->spt;
1451 if (page->role.level != PT_PAGE_TABLE_LEVEL)
1454 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1457 if (!(ent & PT_PRESENT_MASK))
1459 if (!(ent & PT_WRITABLE_MASK))
1467 static void audit_rmap(struct kvm_vcpu *vcpu)
1469 int n_rmap = count_rmaps(vcpu);
1470 int n_actual = count_writable_mappings(vcpu);
1472 if (n_rmap != n_actual)
1473 printk(KERN_ERR "%s: (%s) rmap %d actual %d\n",
1474 __FUNCTION__, audit_msg, n_rmap, n_actual);
1477 static void audit_write_protection(struct kvm_vcpu *vcpu)
1479 struct kvm_mmu_page *page;
1481 list_for_each_entry(page, &vcpu->kvm->active_mmu_pages, link) {
1485 if (page->role.metaphysical)
1488 hfn = gpa_to_hpa(vcpu, (gpa_t)page->gfn << PAGE_SHIFT)
1490 pg = pfn_to_page(hfn);
1492 printk(KERN_ERR "%s: (%s) shadow page has writable"
1493 " mappings: gfn %lx role %x\n",
1494 __FUNCTION__, audit_msg, page->gfn,
1499 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
1506 audit_write_protection(vcpu);
1507 audit_mappings(vcpu);