2 * 8259 interrupt controller emulation
4 * Copyright (c) 2003-2004 Fabrice Bellard
5 * Copyright (c) 2007 Intel Corporation
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
25 * Yaozu (Eddie) Dong <Eddie.dong@intel.com>
32 * set irq level. If an edge is detected, then the IRR is set to 1
34 static inline void pic_set_irq1(struct kvm_kpic_state *s, int irq, int level)
38 if (s->elcr & mask) /* level triggered */
46 else /* edge triggered */
48 if ((s->last_irr & mask) == 0)
56 * return the highest priority found in mask (highest = smallest
57 * number). Return 8 if no irq
59 static inline int get_priority(struct kvm_kpic_state *s, int mask)
65 while ((mask & (1 << ((priority + s->priority_add) & 7))) == 0)
71 * return the pic wanted interrupt. return -1 if none
73 static int pic_get_irq(struct kvm_kpic_state *s)
75 int mask, cur_priority, priority;
77 mask = s->irr & ~s->imr;
78 priority = get_priority(s, mask);
82 * compute current priority. If special fully nested mode on the
83 * master, the IRQ coming from the slave is not taken into account
84 * for the priority computation.
87 if (s->special_fully_nested_mode && s == &s->pics_state->pics[0])
89 cur_priority = get_priority(s, mask);
90 if (priority < cur_priority)
92 * higher priority found: an irq should be generated
94 return (priority + s->priority_add) & 7;
100 * raise irq to CPU if necessary. must be called every time the active
103 static void pic_update_irq(struct kvm_pic *s)
107 irq2 = pic_get_irq(&s->pics[1]);
110 * if irq request by slave pic, signal master PIC
112 pic_set_irq1(&s->pics[0], 2, 1);
113 pic_set_irq1(&s->pics[0], 2, 0);
115 irq = pic_get_irq(&s->pics[0]);
117 s->irq_request(s->irq_request_opaque, 1);
119 s->irq_request(s->irq_request_opaque, 0);
122 void kvm_pic_set_irq(void *opaque, int irq, int level)
124 struct kvm_pic *s = opaque;
126 pic_set_irq1(&s->pics[irq >> 3], irq & 7, level);
131 * acknowledge interrupt 'irq'
133 static inline void pic_intack(struct kvm_kpic_state *s, int irq)
136 if (s->rotate_on_auto_eoi)
137 s->priority_add = (irq + 1) & 7;
139 s->isr |= (1 << irq);
141 * We don't clear a level sensitive interrupt here
143 if (!(s->elcr & (1 << irq)))
144 s->irr &= ~(1 << irq);
147 int kvm_pic_read_irq(struct kvm_pic *s)
149 int irq, irq2, intno;
151 irq = pic_get_irq(&s->pics[0]);
153 pic_intack(&s->pics[0], irq);
155 irq2 = pic_get_irq(&s->pics[1]);
157 pic_intack(&s->pics[1], irq2);
160 * spurious IRQ on slave controller
163 intno = s->pics[1].irq_base + irq2;
166 intno = s->pics[0].irq_base + irq;
169 * spurious IRQ on host controller
172 intno = s->pics[0].irq_base + irq;
179 static void pic_reset(void *opaque)
181 struct kvm_kpic_state *s = opaque;
189 s->read_reg_select = 0;
194 s->rotate_on_auto_eoi = 0;
195 s->special_fully_nested_mode = 0;
199 static void pic_ioport_write(void *opaque, u32 addr, u32 val)
201 struct kvm_kpic_state *s = opaque;
202 int priority, cmd, irq;
207 pic_reset(s); /* init */
209 * deassert a pending interrupt
211 s->pics_state->irq_request(s->pics_state->
212 irq_request_opaque, 0);
216 printk(KERN_ERR "single mode not supported");
219 "level sensitive irq not supported");
220 } else if (val & 0x08) {
224 s->read_reg_select = val & 1;
226 s->special_mask = (val >> 5) & 1;
232 s->rotate_on_auto_eoi = cmd >> 2;
234 case 1: /* end of interrupt */
236 priority = get_priority(s, s->isr);
238 irq = (priority + s->priority_add) & 7;
239 s->isr &= ~(1 << irq);
241 s->priority_add = (irq + 1) & 7;
242 pic_update_irq(s->pics_state);
247 s->isr &= ~(1 << irq);
248 pic_update_irq(s->pics_state);
251 s->priority_add = (val + 1) & 7;
252 pic_update_irq(s->pics_state);
256 s->isr &= ~(1 << irq);
257 s->priority_add = (irq + 1) & 7;
258 pic_update_irq(s->pics_state);
261 break; /* no operation */
265 switch (s->init_state) {
266 case 0: /* normal mode */
268 pic_update_irq(s->pics_state);
271 s->irq_base = val & 0xf8;
281 s->special_fully_nested_mode = (val >> 4) & 1;
282 s->auto_eoi = (val >> 1) & 1;
288 static u32 pic_poll_read(struct kvm_kpic_state *s, u32 addr1)
292 ret = pic_get_irq(s);
295 s->pics_state->pics[0].isr &= ~(1 << 2);
296 s->pics_state->pics[0].irr &= ~(1 << 2);
298 s->irr &= ~(1 << ret);
299 s->isr &= ~(1 << ret);
300 if (addr1 >> 7 || ret != 2)
301 pic_update_irq(s->pics_state);
304 pic_update_irq(s->pics_state);
310 static u32 pic_ioport_read(void *opaque, u32 addr1)
312 struct kvm_kpic_state *s = opaque;
319 ret = pic_poll_read(s, addr1);
323 if (s->read_reg_select)
332 static void elcr_ioport_write(void *opaque, u32 addr, u32 val)
334 struct kvm_kpic_state *s = opaque;
335 s->elcr = val & s->elcr_mask;
338 static u32 elcr_ioport_read(void *opaque, u32 addr1)
340 struct kvm_kpic_state *s = opaque;
344 static int picdev_in_range(struct kvm_io_device *this, gpa_t addr)
359 static void picdev_write(struct kvm_io_device *this,
360 gpa_t addr, int len, const void *val)
362 struct kvm_pic *s = this->private;
363 unsigned char data = *(unsigned char *)val;
366 if (printk_ratelimit())
367 printk(KERN_ERR "PIC: non byte write\n");
375 pic_ioport_write(&s->pics[addr >> 7], addr, data);
379 elcr_ioport_write(&s->pics[addr & 1], addr, data);
384 static void picdev_read(struct kvm_io_device *this,
385 gpa_t addr, int len, void *val)
387 struct kvm_pic *s = this->private;
388 unsigned char data = 0;
391 if (printk_ratelimit())
392 printk(KERN_ERR "PIC: non byte read\n");
400 data = pic_ioport_read(&s->pics[addr >> 7], addr);
404 data = elcr_ioport_read(&s->pics[addr & 1], addr);
407 *(unsigned char *)val = data;
411 * callback when PIC0 irq status changed
413 static void pic_irq_request(void *opaque, int level)
415 struct kvm *kvm = opaque;
416 struct kvm_vcpu *vcpu = kvm->vcpus[0];
418 pic_irqchip(kvm)->output = level;
423 struct kvm_pic *kvm_create_pic(struct kvm *kvm)
426 s = kzalloc(sizeof(struct kvm_pic), GFP_KERNEL);
429 s->pics[0].elcr_mask = 0xf8;
430 s->pics[1].elcr_mask = 0xde;
431 s->irq_request = pic_irq_request;
432 s->irq_request_opaque = kvm;
433 s->pics[0].pics_state = s;
434 s->pics[1].pics_state = s;
437 * Initialize PIO device
439 s->dev.read = picdev_read;
440 s->dev.write = picdev_write;
441 s->dev.in_range = picdev_in_range;
443 kvm_io_bus_register_dev(&kvm->pio_bus, &s->dev);