2 * HP i8042-based System Device Controller driver.
4 * Copyright (c) 2001 Brian S. Julin
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions, and the following disclaimer,
12 * without modification.
13 * 2. The name of the author may not be used to endorse or promote products
14 * derived from this software without specific prior written permission.
16 * Alternatively, this software may be distributed under the terms of the
17 * GNU General Public License ("GPL").
19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30 * System Device Controller Microprocessor Firmware Theory of Operation
31 * for Part Number 1820-4784 Revision B. Dwg No. A-1820-4784-2
32 * Helge Deller's original hilkbd.c port for PA-RISC.
35 * Driver theory of operation:
37 * hp_sdc_put does all writing to the SDC. ISR can run on a different
38 * CPU than hp_sdc_put, but only one CPU runs hp_sdc_put at a time
39 * (it cannot really benefit from SMP anyway.) A tasket fit this perfectly.
41 * All data coming back from the SDC is sent via interrupt and can be read
42 * fully in the ISR, so there are no latency/throughput problems there.
43 * The problem is with output, due to the slow clock speed of the SDC
44 * compared to the CPU. This should not be too horrible most of the time,
45 * but if used with HIL devices that support the multibyte transfer command,
46 * keeping outbound throughput flowing at the 6500KBps that the HIL is
47 * capable of is more than can be done at HZ=100.
49 * Busy polling for IBF clear wastes CPU cycles and bus cycles. hp_sdc.ibf
50 * is set to 0 when the IBF flag in the status register has cleared. ISR
51 * may do this, and may also access the parts of queued transactions related
52 * to reading data back from the SDC, but otherwise will not touch the
53 * hp_sdc state. Whenever a register is written hp_sdc.ibf is set to 1.
55 * The i8042 write index and the values in the 4-byte input buffer
56 * starting at 0x70 are kept track of in hp_sdc.wi, and .r7[], respectively,
57 * to minimize the amount of IO needed to the SDC. However these values
58 * do not need to be locked since they are only ever accessed by hp_sdc_put.
60 * A timer task schedules the tasklet once per second just to make
61 * sure it doesn't freeze up and to allow for bad reads to time out.
64 #include <linux/hp_sdc.h>
65 #include <linux/errno.h>
66 #include <linux/init.h>
67 #include <linux/module.h>
68 #include <linux/ioport.h>
69 #include <linux/time.h>
70 #include <linux/slab.h>
71 #include <linux/hil.h>
73 #include <asm/system.h>
75 /* Machine-specific abstraction */
78 # include <asm/parisc-device.h>
79 # define sdc_readb(p) gsc_readb(p)
80 # define sdc_writeb(v,p) gsc_writeb((v),(p))
81 #elif defined(__mc68000__)
82 # include <asm/uaccess.h>
83 # define sdc_readb(p) in_8(p)
84 # define sdc_writeb(v,p) out_8((p),(v))
86 # error "HIL is not supported on this platform"
89 #define PREFIX "HP SDC: "
91 MODULE_AUTHOR("Brian S. Julin <bri@calyx.com>");
92 MODULE_DESCRIPTION("HP i8042-based SDC Driver");
93 MODULE_LICENSE("Dual BSD/GPL");
95 EXPORT_SYMBOL(hp_sdc_request_timer_irq);
96 EXPORT_SYMBOL(hp_sdc_request_hil_irq);
97 EXPORT_SYMBOL(hp_sdc_request_cooked_irq);
99 EXPORT_SYMBOL(hp_sdc_release_timer_irq);
100 EXPORT_SYMBOL(hp_sdc_release_hil_irq);
101 EXPORT_SYMBOL(hp_sdc_release_cooked_irq);
103 EXPORT_SYMBOL(hp_sdc_enqueue_transaction);
104 EXPORT_SYMBOL(hp_sdc_dequeue_transaction);
106 static hp_i8042_sdc hp_sdc; /* All driver state is kept in here. */
108 /*************** primitives for use in any context *********************/
109 static inline uint8_t hp_sdc_status_in8(void)
114 write_lock_irqsave(&hp_sdc.ibf_lock, flags);
115 status = sdc_readb(hp_sdc.status_io);
116 if (!(status & HP_SDC_STATUS_IBF))
118 write_unlock_irqrestore(&hp_sdc.ibf_lock, flags);
123 static inline uint8_t hp_sdc_data_in8(void)
125 return sdc_readb(hp_sdc.data_io);
128 static inline void hp_sdc_status_out8(uint8_t val)
132 write_lock_irqsave(&hp_sdc.ibf_lock, flags);
134 if ((val & 0xf0) == 0xe0)
136 sdc_writeb(val, hp_sdc.status_io);
137 write_unlock_irqrestore(&hp_sdc.ibf_lock, flags);
140 static inline void hp_sdc_data_out8(uint8_t val)
144 write_lock_irqsave(&hp_sdc.ibf_lock, flags);
146 sdc_writeb(val, hp_sdc.data_io);
147 write_unlock_irqrestore(&hp_sdc.ibf_lock, flags);
150 /* Care must be taken to only invoke hp_sdc_spin_ibf when
151 * absolutely needed, or in rarely invoked subroutines.
152 * Not only does it waste CPU cycles, it also wastes bus cycles.
154 static inline void hp_sdc_spin_ibf(void)
159 lock = &hp_sdc.ibf_lock;
161 read_lock_irqsave(lock, flags);
163 read_unlock_irqrestore(lock, flags);
168 while (sdc_readb(hp_sdc.status_io) & HP_SDC_STATUS_IBF)
171 write_unlock_irqrestore(lock, flags);
175 /************************ Interrupt context functions ************************/
176 static void hp_sdc_take(int irq, void *dev_id, uint8_t status, uint8_t data)
178 hp_sdc_transaction *curr;
180 read_lock(&hp_sdc.rtq_lock);
181 if (hp_sdc.rcurr < 0) {
182 read_unlock(&hp_sdc.rtq_lock);
185 curr = hp_sdc.tq[hp_sdc.rcurr];
186 read_unlock(&hp_sdc.rtq_lock);
188 curr->seq[curr->idx++] = status;
189 curr->seq[curr->idx++] = data;
191 do_gettimeofday(&hp_sdc.rtv);
193 if (hp_sdc.rqty <= 0) {
194 /* All data has been gathered. */
195 if (curr->seq[curr->actidx] & HP_SDC_ACT_SEMAPHORE)
196 if (curr->act.semaphore)
197 up(curr->act.semaphore);
199 if (curr->seq[curr->actidx] & HP_SDC_ACT_CALLBACK)
200 if (curr->act.irqhook)
201 curr->act.irqhook(irq, dev_id, status, data);
203 curr->actidx = curr->idx;
205 /* Return control of this transaction */
206 write_lock(&hp_sdc.rtq_lock);
209 write_unlock(&hp_sdc.rtq_lock);
210 tasklet_schedule(&hp_sdc.task);
214 static irqreturn_t hp_sdc_isr(int irq, void *dev_id)
216 uint8_t status, data;
218 status = hp_sdc_status_in8();
219 /* Read data unconditionally to advance i8042. */
220 data = hp_sdc_data_in8();
222 /* For now we are ignoring these until we get the SDC to behave. */
223 if (((status & 0xf1) == 0x51) && data == 0x82)
226 switch (status & HP_SDC_STATUS_IRQMASK) {
227 case 0: /* This case is not documented. */
230 case HP_SDC_STATUS_USERTIMER:
231 case HP_SDC_STATUS_PERIODIC:
232 case HP_SDC_STATUS_TIMER:
233 read_lock(&hp_sdc.hook_lock);
234 if (hp_sdc.timer != NULL)
235 hp_sdc.timer(irq, dev_id, status, data);
236 read_unlock(&hp_sdc.hook_lock);
239 case HP_SDC_STATUS_REG:
240 hp_sdc_take(irq, dev_id, status, data);
243 case HP_SDC_STATUS_HILCMD:
244 case HP_SDC_STATUS_HILDATA:
245 read_lock(&hp_sdc.hook_lock);
246 if (hp_sdc.hil != NULL)
247 hp_sdc.hil(irq, dev_id, status, data);
248 read_unlock(&hp_sdc.hook_lock);
251 case HP_SDC_STATUS_PUP:
252 read_lock(&hp_sdc.hook_lock);
253 if (hp_sdc.pup != NULL)
254 hp_sdc.pup(irq, dev_id, status, data);
256 printk(KERN_INFO PREFIX "HP SDC reports successful PUP.\n");
257 read_unlock(&hp_sdc.hook_lock);
261 read_lock(&hp_sdc.hook_lock);
262 if (hp_sdc.cooked != NULL)
263 hp_sdc.cooked(irq, dev_id, status, data);
264 read_unlock(&hp_sdc.hook_lock);
272 static irqreturn_t hp_sdc_nmisr(int irq, void *dev_id)
276 status = hp_sdc_status_in8();
277 printk(KERN_WARNING PREFIX "NMI !\n");
280 if (status & HP_SDC_NMISTATUS_FHS) {
281 read_lock(&hp_sdc.hook_lock);
282 if (hp_sdc.timer != NULL)
283 hp_sdc.timer(irq, dev_id, status, 0);
284 read_unlock(&hp_sdc.hook_lock);
286 /* TODO: pass this on to the HIL handler, or do SAK here? */
287 printk(KERN_WARNING PREFIX "HIL NMI\n");
295 /***************** Kernel (tasklet) context functions ****************/
297 unsigned long hp_sdc_put(void);
299 static void hp_sdc_tasklet(unsigned long foo)
301 write_lock_irq(&hp_sdc.rtq_lock);
303 if (hp_sdc.rcurr >= 0) {
306 do_gettimeofday(&tv);
307 if (tv.tv_sec > hp_sdc.rtv.tv_sec)
308 tv.tv_usec += USEC_PER_SEC;
310 if (tv.tv_usec - hp_sdc.rtv.tv_usec > HP_SDC_MAX_REG_DELAY) {
311 hp_sdc_transaction *curr;
314 curr = hp_sdc.tq[hp_sdc.rcurr];
315 /* If this turns out to be a normal failure mode
316 * we'll need to figure out a way to communicate
317 * it back to the application. and be less verbose.
319 printk(KERN_WARNING PREFIX "read timeout (%ius)!\n",
320 tv.tv_usec - hp_sdc.rtv.tv_usec);
321 curr->idx += hp_sdc.rqty;
323 tmp = curr->seq[curr->actidx];
324 curr->seq[curr->actidx] |= HP_SDC_ACT_DEAD;
325 if (tmp & HP_SDC_ACT_SEMAPHORE)
326 if (curr->act.semaphore)
327 up(curr->act.semaphore);
329 if (tmp & HP_SDC_ACT_CALLBACK) {
330 /* Note this means that irqhooks may be called
331 * in tasklet/bh context.
333 if (curr->act.irqhook)
334 curr->act.irqhook(0, NULL, 0, 0);
337 curr->actidx = curr->idx;
342 write_unlock_irq(&hp_sdc.rtq_lock);
346 unsigned long hp_sdc_put(void)
348 hp_sdc_transaction *curr;
354 write_lock(&hp_sdc.lock);
356 /* If i8042 buffers are full, we cannot do anything that
357 requires output, so we skip to the administrativa. */
365 /* See if we are in the middle of a sequence. */
366 if (hp_sdc.wcurr < 0)
368 read_lock_irq(&hp_sdc.rtq_lock);
369 if (hp_sdc.rcurr == hp_sdc.wcurr)
371 read_unlock_irq(&hp_sdc.rtq_lock);
372 if (hp_sdc.wcurr >= HP_SDC_QUEUE_LEN)
374 curridx = hp_sdc.wcurr;
376 if (hp_sdc.tq[curridx] != NULL)
379 while (++curridx != hp_sdc.wcurr) {
380 if (curridx >= HP_SDC_QUEUE_LEN) {
381 curridx = -1; /* Wrap to top */
384 read_lock_irq(&hp_sdc.rtq_lock);
385 if (hp_sdc.rcurr == curridx) {
386 read_unlock_irq(&hp_sdc.rtq_lock);
389 read_unlock_irq(&hp_sdc.rtq_lock);
390 if (hp_sdc.tq[curridx] != NULL)
391 break; /* Found one. */
393 if (curridx == hp_sdc.wcurr) { /* There's nothing queued to do. */
396 hp_sdc.wcurr = curridx;
400 /* Check to see if the interrupt mask needs to be set. */
402 hp_sdc_status_out8(hp_sdc.im | HP_SDC_CMD_SET_IM);
407 if (hp_sdc.wcurr == -1)
410 curr = hp_sdc.tq[curridx];
413 if (curr->actidx >= curr->endidx) {
414 hp_sdc.tq[curridx] = NULL;
415 /* Interleave outbound data between the transactions. */
417 if (hp_sdc.wcurr >= HP_SDC_QUEUE_LEN)
422 act = curr->seq[idx];
425 if (curr->idx >= curr->endidx) {
426 if (act & HP_SDC_ACT_DEALLOC)
428 hp_sdc.tq[curridx] = NULL;
429 /* Interleave outbound data between the transactions. */
431 if (hp_sdc.wcurr >= HP_SDC_QUEUE_LEN)
436 while (act & HP_SDC_ACT_PRECMD) {
437 if (curr->idx != idx) {
439 act &= ~HP_SDC_ACT_PRECMD;
442 hp_sdc_status_out8(curr->seq[idx]);
445 if ((act & HP_SDC_ACT_DURING) == HP_SDC_ACT_PRECMD)
447 /* skip quantity field if data-out sequence follows. */
448 if (act & HP_SDC_ACT_DATAOUT)
452 if (act & HP_SDC_ACT_DATAOUT) {
455 qty = curr->seq[idx];
457 if (curr->idx - idx < qty) {
458 hp_sdc_data_out8(curr->seq[curr->idx]);
461 if (curr->idx - idx >= qty &&
462 (act & HP_SDC_ACT_DURING) == HP_SDC_ACT_DATAOUT)
467 act &= ~HP_SDC_ACT_DATAOUT;
469 while (act & HP_SDC_ACT_DATAREG) {
473 mask = curr->seq[idx];
474 if (idx != curr->idx) {
480 act &= ~HP_SDC_ACT_DATAREG;
484 w7[0] = (mask & 1) ? curr->seq[++idx] : hp_sdc.r7[0];
485 w7[1] = (mask & 2) ? curr->seq[++idx] : hp_sdc.r7[1];
486 w7[2] = (mask & 4) ? curr->seq[++idx] : hp_sdc.r7[2];
487 w7[3] = (mask & 8) ? curr->seq[++idx] : hp_sdc.r7[3];
489 if (hp_sdc.wi > 0x73 || hp_sdc.wi < 0x70 ||
490 w7[hp_sdc.wi - 0x70] == hp_sdc.r7[hp_sdc.wi - 0x70]) {
493 /* Need to point the write index register */
494 while (i < 4 && w7[i] == hp_sdc.r7[i])
498 hp_sdc_status_out8(HP_SDC_CMD_SET_D0 + i);
499 hp_sdc.wi = 0x70 + i;
504 if ((act & HP_SDC_ACT_DURING) == HP_SDC_ACT_DATAREG)
508 act &= ~HP_SDC_ACT_DATAREG;
512 hp_sdc_data_out8(w7[hp_sdc.wi - 0x70]);
513 hp_sdc.r7[hp_sdc.wi - 0x70] = w7[hp_sdc.wi - 0x70];
514 hp_sdc.wi++; /* write index register autoincrements */
518 while ((i < 4) && w7[i] == hp_sdc.r7[i])
522 if ((act & HP_SDC_ACT_DURING) ==
529 /* We don't go any further in the command if there is a pending read,
530 because we don't want interleaved results. */
531 read_lock_irq(&hp_sdc.rtq_lock);
532 if (hp_sdc.rcurr >= 0) {
533 read_unlock_irq(&hp_sdc.rtq_lock);
536 read_unlock_irq(&hp_sdc.rtq_lock);
539 if (act & HP_SDC_ACT_POSTCMD) {
542 /* curr->idx should == idx at this point. */
543 postcmd = curr->seq[idx];
545 if (act & HP_SDC_ACT_DATAIN) {
547 /* Start a new read */
548 hp_sdc.rqty = curr->seq[curr->idx];
549 do_gettimeofday(&hp_sdc.rtv);
551 /* Still need to lock here in case of spurious irq. */
552 write_lock_irq(&hp_sdc.rtq_lock);
553 hp_sdc.rcurr = curridx;
554 write_unlock_irq(&hp_sdc.rtq_lock);
555 hp_sdc_status_out8(postcmd);
558 hp_sdc_status_out8(postcmd);
563 if (act & HP_SDC_ACT_SEMAPHORE)
564 up(curr->act.semaphore);
565 else if (act & HP_SDC_ACT_CALLBACK)
566 curr->act.irqhook(0,NULL,0,0);
568 if (curr->idx >= curr->endidx) { /* This transaction is over. */
569 if (act & HP_SDC_ACT_DEALLOC)
571 hp_sdc.tq[curridx] = NULL;
573 curr->actidx = idx + 1;
576 /* Interleave outbound data between the transactions. */
578 if (hp_sdc.wcurr >= HP_SDC_QUEUE_LEN)
582 /* If by some quirk IBF has cleared and our ISR has run to
583 see that that has happened, do it all again. */
584 if (!hp_sdc.ibf && limit++ < 20)
588 if (hp_sdc.wcurr >= 0)
589 tasklet_schedule(&hp_sdc.task);
590 write_unlock(&hp_sdc.lock);
595 /******* Functions called in either user or kernel context ****/
596 int hp_sdc_enqueue_transaction(hp_sdc_transaction *this)
602 tasklet_schedule(&hp_sdc.task);
606 write_lock_irqsave(&hp_sdc.lock, flags);
608 /* Can't have same transaction on queue twice */
609 for (i = 0; i < HP_SDC_QUEUE_LEN; i++)
610 if (hp_sdc.tq[i] == this)
616 /* Search for empty slot */
617 for (i = 0; i < HP_SDC_QUEUE_LEN; i++)
618 if (hp_sdc.tq[i] == NULL) {
620 write_unlock_irqrestore(&hp_sdc.lock, flags);
621 tasklet_schedule(&hp_sdc.task);
625 write_unlock_irqrestore(&hp_sdc.lock, flags);
626 printk(KERN_WARNING PREFIX "No free slot to add transaction.\n");
630 write_unlock_irqrestore(&hp_sdc.lock,flags);
631 printk(KERN_WARNING PREFIX "Transaction add failed: transaction already queued?\n");
635 int hp_sdc_dequeue_transaction(hp_sdc_transaction *this)
640 write_lock_irqsave(&hp_sdc.lock, flags);
642 /* TODO: don't remove it if it's not done. */
644 for (i = 0; i < HP_SDC_QUEUE_LEN; i++)
645 if (hp_sdc.tq[i] == this)
648 write_unlock_irqrestore(&hp_sdc.lock, flags);
654 /********************** User context functions **************************/
655 int hp_sdc_request_timer_irq(hp_sdc_irqhook *callback)
657 if (callback == NULL || hp_sdc.dev == NULL)
660 write_lock_irq(&hp_sdc.hook_lock);
661 if (hp_sdc.timer != NULL) {
662 write_unlock_irq(&hp_sdc.hook_lock);
666 hp_sdc.timer = callback;
667 /* Enable interrupts from the timers */
668 hp_sdc.im &= ~HP_SDC_IM_FH;
669 hp_sdc.im &= ~HP_SDC_IM_PT;
670 hp_sdc.im &= ~HP_SDC_IM_TIMERS;
672 write_unlock_irq(&hp_sdc.hook_lock);
674 tasklet_schedule(&hp_sdc.task);
679 int hp_sdc_request_hil_irq(hp_sdc_irqhook *callback)
681 if (callback == NULL || hp_sdc.dev == NULL)
684 write_lock_irq(&hp_sdc.hook_lock);
685 if (hp_sdc.hil != NULL) {
686 write_unlock_irq(&hp_sdc.hook_lock);
690 hp_sdc.hil = callback;
691 hp_sdc.im &= ~(HP_SDC_IM_HIL | HP_SDC_IM_RESET);
693 write_unlock_irq(&hp_sdc.hook_lock);
695 tasklet_schedule(&hp_sdc.task);
700 int hp_sdc_request_cooked_irq(hp_sdc_irqhook *callback)
702 if (callback == NULL || hp_sdc.dev == NULL)
705 write_lock_irq(&hp_sdc.hook_lock);
706 if (hp_sdc.cooked != NULL) {
707 write_unlock_irq(&hp_sdc.hook_lock);
711 /* Enable interrupts from the HIL MLC */
712 hp_sdc.cooked = callback;
713 hp_sdc.im &= ~(HP_SDC_IM_HIL | HP_SDC_IM_RESET);
715 write_unlock_irq(&hp_sdc.hook_lock);
717 tasklet_schedule(&hp_sdc.task);
722 int hp_sdc_release_timer_irq(hp_sdc_irqhook *callback)
724 write_lock_irq(&hp_sdc.hook_lock);
725 if ((callback != hp_sdc.timer) ||
726 (hp_sdc.timer == NULL)) {
727 write_unlock_irq(&hp_sdc.hook_lock);
731 /* Disable interrupts from the timers */
733 hp_sdc.im |= HP_SDC_IM_TIMERS;
734 hp_sdc.im |= HP_SDC_IM_FH;
735 hp_sdc.im |= HP_SDC_IM_PT;
737 write_unlock_irq(&hp_sdc.hook_lock);
738 tasklet_schedule(&hp_sdc.task);
743 int hp_sdc_release_hil_irq(hp_sdc_irqhook *callback)
745 write_lock_irq(&hp_sdc.hook_lock);
746 if ((callback != hp_sdc.hil) ||
747 (hp_sdc.hil == NULL)) {
748 write_unlock_irq(&hp_sdc.hook_lock);
753 /* Disable interrupts from HIL only if there is no cooked driver. */
754 if(hp_sdc.cooked == NULL) {
755 hp_sdc.im |= (HP_SDC_IM_HIL | HP_SDC_IM_RESET);
758 write_unlock_irq(&hp_sdc.hook_lock);
759 tasklet_schedule(&hp_sdc.task);
764 int hp_sdc_release_cooked_irq(hp_sdc_irqhook *callback)
766 write_lock_irq(&hp_sdc.hook_lock);
767 if ((callback != hp_sdc.cooked) ||
768 (hp_sdc.cooked == NULL)) {
769 write_unlock_irq(&hp_sdc.hook_lock);
773 hp_sdc.cooked = NULL;
774 /* Disable interrupts from HIL only if there is no raw HIL driver. */
775 if(hp_sdc.hil == NULL) {
776 hp_sdc.im |= (HP_SDC_IM_HIL | HP_SDC_IM_RESET);
779 write_unlock_irq(&hp_sdc.hook_lock);
780 tasklet_schedule(&hp_sdc.task);
785 /************************* Keepalive timer task *********************/
787 void hp_sdc_kicker (unsigned long data)
789 tasklet_schedule(&hp_sdc.task);
790 /* Re-insert the periodic task. */
791 mod_timer(&hp_sdc.kicker, jiffies + HZ);
794 /************************** Module Initialization ***************************/
796 #if defined(__hppa__)
798 static const struct parisc_device_id hp_sdc_tbl[] = {
801 .hversion_rev = HVERSION_REV_ANY_ID,
802 .hversion = HVERSION_ANY_ID,
808 MODULE_DEVICE_TABLE(parisc, hp_sdc_tbl);
810 static int __init hp_sdc_init_hppa(struct parisc_device *d);
812 static struct parisc_driver hp_sdc_driver = {
814 .id_table = hp_sdc_tbl,
815 .probe = hp_sdc_init_hppa,
818 #endif /* __hppa__ */
820 static int __init hp_sdc_init(void)
823 hp_sdc_transaction t_sync;
825 struct semaphore s_sync;
827 rwlock_init(&hp_sdc.lock);
828 rwlock_init(&hp_sdc.ibf_lock);
829 rwlock_init(&hp_sdc.rtq_lock);
830 rwlock_init(&hp_sdc.hook_lock);
835 hp_sdc.cooked = NULL;
836 hp_sdc.im = HP_SDC_IM_MASK; /* Mask maskable irqs */
845 memset(&hp_sdc.tq, 0, sizeof(hp_sdc.tq));
851 hp_sdc.dev_err = -ENODEV;
853 errstr = "IO not found for";
857 errstr = "IRQ not found for";
861 hp_sdc.dev_err = -EBUSY;
863 #if defined(__hppa__)
864 errstr = "IO not available for";
865 if (request_region(hp_sdc.data_io, 2, hp_sdc_driver.name))
869 errstr = "IRQ not available for";
870 if (request_irq(hp_sdc.irq, &hp_sdc_isr, IRQF_SHARED|IRQF_SAMPLE_RANDOM,
874 errstr = "NMI not available for";
875 if (request_irq(hp_sdc.nmi, &hp_sdc_nmisr, IRQF_SHARED,
876 "HP SDC NMI", &hp_sdc))
879 printk(KERN_INFO PREFIX "HP SDC at 0x%p, IRQ %d (NMI IRQ %d)\n",
880 (void *)hp_sdc.base_io, hp_sdc.irq, hp_sdc.nmi);
885 tasklet_init(&hp_sdc.task, hp_sdc_tasklet, 0);
887 /* Sync the output buffer registers, thus scheduling hp_sdc_tasklet. */
891 t_sync.seq = ts_sync;
892 ts_sync[0] = HP_SDC_ACT_DATAREG | HP_SDC_ACT_SEMAPHORE;
894 ts_sync[2] = ts_sync[3] = ts_sync[4] = ts_sync[5] = 0;
895 t_sync.act.semaphore = &s_sync;
896 init_MUTEX_LOCKED(&s_sync);
897 hp_sdc_enqueue_transaction(&t_sync);
898 down(&s_sync); /* Wait for t_sync to complete */
900 /* Create the keepalive task */
901 init_timer(&hp_sdc.kicker);
902 hp_sdc.kicker.expires = jiffies + HZ;
903 hp_sdc.kicker.function = &hp_sdc_kicker;
904 add_timer(&hp_sdc.kicker);
909 free_irq(hp_sdc.irq, &hp_sdc);
911 release_region(hp_sdc.data_io, 2);
913 printk(KERN_WARNING PREFIX ": %s SDC IO=0x%p IRQ=0x%x NMI=0x%x\n",
914 errstr, (void *)hp_sdc.base_io, hp_sdc.irq, hp_sdc.nmi);
917 return hp_sdc.dev_err;
920 #if defined(__hppa__)
922 static int __init hp_sdc_init_hppa(struct parisc_device *d)
926 if (hp_sdc.dev != NULL)
927 return 1; /* We only expect one SDC */
931 hp_sdc.nmi = d->aux_irq;
932 hp_sdc.base_io = d->hpa.start;
933 hp_sdc.data_io = d->hpa.start + 0x800;
934 hp_sdc.status_io = d->hpa.start + 0x801;
936 return hp_sdc_init();
939 #endif /* __hppa__ */
941 #if !defined(__mc68000__) /* Link error on m68k! */
942 static void __exit hp_sdc_exit(void)
944 static void hp_sdc_exit(void)
947 write_lock_irq(&hp_sdc.lock);
949 /* Turn off all maskable "sub-function" irq's. */
951 sdc_writeb(HP_SDC_CMD_SET_IM | HP_SDC_IM_MASK, hp_sdc.status_io);
953 /* Wait until we know this has been processed by the i8042 */
956 free_irq(hp_sdc.nmi, &hp_sdc);
957 free_irq(hp_sdc.irq, &hp_sdc);
958 write_unlock_irq(&hp_sdc.lock);
960 del_timer(&hp_sdc.kicker);
962 tasklet_kill(&hp_sdc.task);
964 #if defined(__hppa__)
965 if (unregister_parisc_driver(&hp_sdc_driver))
966 printk(KERN_WARNING PREFIX "Error unregistering HP SDC");
970 static int __init hp_sdc_register(void)
972 hp_sdc_transaction tq_init;
973 uint8_t tq_init_seq[5];
974 struct semaphore tq_init_sem;
975 #if defined(__mc68000__)
982 #if defined(__hppa__)
983 if (register_parisc_driver(&hp_sdc_driver)) {
984 printk(KERN_WARNING PREFIX "Error registering SDC with system bus tree.\n");
987 #elif defined(__mc68000__)
993 hp_sdc.base_io = (unsigned long) 0xf0428000;
994 hp_sdc.data_io = (unsigned long) hp_sdc.base_io + 1;
995 hp_sdc.status_io = (unsigned long) hp_sdc.base_io + 3;
998 if (!get_user(i, (unsigned char *)hp_sdc.data_io))
999 hp_sdc.dev = (void *)1;
1001 hp_sdc.dev_err = hp_sdc_init();
1003 if (hp_sdc.dev == NULL) {
1004 printk(KERN_WARNING PREFIX "No SDC found.\n");
1005 return hp_sdc.dev_err;
1008 init_MUTEX_LOCKED(&tq_init_sem);
1013 tq_init.seq = tq_init_seq;
1014 tq_init.act.semaphore = &tq_init_sem;
1017 HP_SDC_ACT_POSTCMD | HP_SDC_ACT_DATAIN | HP_SDC_ACT_SEMAPHORE;
1018 tq_init_seq[1] = HP_SDC_CMD_READ_KCC;
1023 hp_sdc_enqueue_transaction(&tq_init);
1028 if ((tq_init_seq[0] & HP_SDC_ACT_DEAD) == HP_SDC_ACT_DEAD) {
1029 printk(KERN_WARNING PREFIX "Error reading config byte.\n");
1033 hp_sdc.r11 = tq_init_seq[4];
1034 if (hp_sdc.r11 & HP_SDC_CFG_NEW) {
1036 printk(KERN_INFO PREFIX "New style SDC\n");
1037 tq_init_seq[1] = HP_SDC_CMD_READ_XTD;
1041 hp_sdc_enqueue_transaction(&tq_init);
1044 if ((tq_init_seq[0] & HP_SDC_ACT_DEAD) == HP_SDC_ACT_DEAD) {
1045 printk(KERN_WARNING PREFIX "Error reading extended config byte.\n");
1048 hp_sdc.r7e = tq_init_seq[4];
1049 HP_SDC_XTD_REV_STRINGS(hp_sdc.r7e & HP_SDC_XTD_REV, str)
1050 printk(KERN_INFO PREFIX "Revision: %s\n", str);
1051 if (hp_sdc.r7e & HP_SDC_XTD_BEEPER)
1052 printk(KERN_INFO PREFIX "TI SN76494 beeper present\n");
1053 if (hp_sdc.r7e & HP_SDC_XTD_BBRTC)
1054 printk(KERN_INFO PREFIX "OKI MSM-58321 BBRTC present\n");
1055 printk(KERN_INFO PREFIX "Spunking the self test register to force PUP "
1056 "on next firmware reset.\n");
1057 tq_init_seq[0] = HP_SDC_ACT_PRECMD |
1058 HP_SDC_ACT_DATAOUT | HP_SDC_ACT_SEMAPHORE;
1059 tq_init_seq[1] = HP_SDC_CMD_SET_STR;
1066 hp_sdc_enqueue_transaction(&tq_init);
1070 printk(KERN_INFO PREFIX "Old style SDC (1820-%s).\n",
1071 (hp_sdc.r11 & HP_SDC_CFG_REV) ? "3300" : "2564/3087");
1076 module_init(hp_sdc_register);
1077 module_exit(hp_sdc_exit);
1079 /* Timing notes: These measurements taken on my 64MHz 7100-LC (715/64)
1080 * cycles cycles-adj time
1081 * between two consecutive mfctl(16)'s: 4 n/a 63ns
1082 * hp_sdc_spin_ibf when idle: 119 115 1.7us
1083 * gsc_writeb status register: 83 79 1.2us
1084 * IBF to clear after sending SET_IM: 6204 6006 93us
1085 * IBF to clear after sending LOAD_RT: 4467 4352 68us
1086 * IBF to clear after sending two LOAD_RTs: 18974 18859 295us
1087 * READ_T1, read status/data, IRQ, call handler: 35564 n/a 556us
1088 * cmd to ~IBF READ_T1 2nd time right after: 5158403 n/a 81ms
1089 * between IRQ received and ~IBF for above: 2578877 n/a 40ms
1091 * Performance stats after a run of this module configuring HIL and
1092 * receiving a few mouse events:
1094 * status in8 282508 cycles 7128 calls
1095 * status out8 8404 cycles 341 calls
1096 * data out8 1734 cycles 78 calls
1097 * isr 174324 cycles 617 calls (includes take)
1098 * take 1241 cycles 2 calls
1099 * put 1411504 cycles 6937 calls
1100 * task 1655209 cycles 6937 calls (includes put)