2 * HP i8042-based System Device Controller driver.
4 * Copyright (c) 2001 Brian S. Julin
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions, and the following disclaimer,
12 * without modification.
13 * 2. The name of the author may not be used to endorse or promote products
14 * derived from this software without specific prior written permission.
16 * Alternatively, this software may be distributed under the terms of the
17 * GNU General Public License ("GPL").
19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30 * System Device Controller Microprocessor Firmware Theory of Operation
31 * for Part Number 1820-4784 Revision B. Dwg No. A-1820-4784-2
32 * Helge Deller's original hilkbd.c port for PA-RISC.
35 * Driver theory of operation:
37 * hp_sdc_put does all writing to the SDC. ISR can run on a different
38 * CPU than hp_sdc_put, but only one CPU runs hp_sdc_put at a time
39 * (it cannot really benefit from SMP anyway.) A tasket fit this perfectly.
41 * All data coming back from the SDC is sent via interrupt and can be read
42 * fully in the ISR, so there are no latency/throughput problems there.
43 * The problem is with output, due to the slow clock speed of the SDC
44 * compared to the CPU. This should not be too horrible most of the time,
45 * but if used with HIL devices that support the multibyte transfer command,
46 * keeping outbound throughput flowing at the 6500KBps that the HIL is
47 * capable of is more than can be done at HZ=100.
49 * Busy polling for IBF clear wastes CPU cycles and bus cycles. hp_sdc.ibf
50 * is set to 0 when the IBF flag in the status register has cleared. ISR
51 * may do this, and may also access the parts of queued transactions related
52 * to reading data back from the SDC, but otherwise will not touch the
53 * hp_sdc state. Whenever a register is written hp_sdc.ibf is set to 1.
55 * The i8042 write index and the values in the 4-byte input buffer
56 * starting at 0x70 are kept track of in hp_sdc.wi, and .r7[], respectively,
57 * to minimize the amount of IO needed to the SDC. However these values
58 * do not need to be locked since they are only ever accessed by hp_sdc_put.
60 * A timer task schedules the tasklet once per second just to make
61 * sure it doesn't freeze up and to allow for bad reads to time out.
64 #include <linux/hp_sdc.h>
65 #include <linux/errno.h>
66 #include <linux/init.h>
67 #include <linux/module.h>
68 #include <linux/ioport.h>
69 #include <linux/time.h>
70 #include <linux/semaphore.h>
71 #include <linux/slab.h>
72 #include <linux/hil.h>
73 #include <linux/semaphore.h>
75 #include <asm/system.h>
77 /* Machine-specific abstraction */
80 # include <asm/parisc-device.h>
81 # define sdc_readb(p) gsc_readb(p)
82 # define sdc_writeb(v,p) gsc_writeb((v),(p))
83 #elif defined(__mc68000__)
84 # include <asm/uaccess.h>
85 # define sdc_readb(p) in_8(p)
86 # define sdc_writeb(v,p) out_8((p),(v))
88 # error "HIL is not supported on this platform"
91 #define PREFIX "HP SDC: "
93 MODULE_AUTHOR("Brian S. Julin <bri@calyx.com>");
94 MODULE_DESCRIPTION("HP i8042-based SDC Driver");
95 MODULE_LICENSE("Dual BSD/GPL");
97 EXPORT_SYMBOL(hp_sdc_request_timer_irq);
98 EXPORT_SYMBOL(hp_sdc_request_hil_irq);
99 EXPORT_SYMBOL(hp_sdc_request_cooked_irq);
101 EXPORT_SYMBOL(hp_sdc_release_timer_irq);
102 EXPORT_SYMBOL(hp_sdc_release_hil_irq);
103 EXPORT_SYMBOL(hp_sdc_release_cooked_irq);
105 EXPORT_SYMBOL(__hp_sdc_enqueue_transaction);
106 EXPORT_SYMBOL(hp_sdc_enqueue_transaction);
107 EXPORT_SYMBOL(hp_sdc_dequeue_transaction);
109 static unsigned int hp_sdc_disabled;
110 module_param_named(no_hpsdc, hp_sdc_disabled, bool, 0);
111 MODULE_PARM_DESC(no_hpsdc, "Do not enable HP SDC driver.");
113 static hp_i8042_sdc hp_sdc; /* All driver state is kept in here. */
115 /*************** primitives for use in any context *********************/
116 static inline uint8_t hp_sdc_status_in8(void)
121 write_lock_irqsave(&hp_sdc.ibf_lock, flags);
122 status = sdc_readb(hp_sdc.status_io);
123 if (!(status & HP_SDC_STATUS_IBF))
125 write_unlock_irqrestore(&hp_sdc.ibf_lock, flags);
130 static inline uint8_t hp_sdc_data_in8(void)
132 return sdc_readb(hp_sdc.data_io);
135 static inline void hp_sdc_status_out8(uint8_t val)
139 write_lock_irqsave(&hp_sdc.ibf_lock, flags);
141 if ((val & 0xf0) == 0xe0)
143 sdc_writeb(val, hp_sdc.status_io);
144 write_unlock_irqrestore(&hp_sdc.ibf_lock, flags);
147 static inline void hp_sdc_data_out8(uint8_t val)
151 write_lock_irqsave(&hp_sdc.ibf_lock, flags);
153 sdc_writeb(val, hp_sdc.data_io);
154 write_unlock_irqrestore(&hp_sdc.ibf_lock, flags);
157 /* Care must be taken to only invoke hp_sdc_spin_ibf when
158 * absolutely needed, or in rarely invoked subroutines.
159 * Not only does it waste CPU cycles, it also wastes bus cycles.
161 static inline void hp_sdc_spin_ibf(void)
166 lock = &hp_sdc.ibf_lock;
168 read_lock_irqsave(lock, flags);
170 read_unlock_irqrestore(lock, flags);
175 while (sdc_readb(hp_sdc.status_io) & HP_SDC_STATUS_IBF)
178 write_unlock_irqrestore(lock, flags);
182 /************************ Interrupt context functions ************************/
183 static void hp_sdc_take(int irq, void *dev_id, uint8_t status, uint8_t data)
185 hp_sdc_transaction *curr;
187 read_lock(&hp_sdc.rtq_lock);
188 if (hp_sdc.rcurr < 0) {
189 read_unlock(&hp_sdc.rtq_lock);
192 curr = hp_sdc.tq[hp_sdc.rcurr];
193 read_unlock(&hp_sdc.rtq_lock);
195 curr->seq[curr->idx++] = status;
196 curr->seq[curr->idx++] = data;
198 do_gettimeofday(&hp_sdc.rtv);
200 if (hp_sdc.rqty <= 0) {
201 /* All data has been gathered. */
202 if (curr->seq[curr->actidx] & HP_SDC_ACT_SEMAPHORE)
203 if (curr->act.semaphore)
204 up(curr->act.semaphore);
206 if (curr->seq[curr->actidx] & HP_SDC_ACT_CALLBACK)
207 if (curr->act.irqhook)
208 curr->act.irqhook(irq, dev_id, status, data);
210 curr->actidx = curr->idx;
212 /* Return control of this transaction */
213 write_lock(&hp_sdc.rtq_lock);
216 write_unlock(&hp_sdc.rtq_lock);
217 tasklet_schedule(&hp_sdc.task);
221 static irqreturn_t hp_sdc_isr(int irq, void *dev_id)
223 uint8_t status, data;
225 status = hp_sdc_status_in8();
226 /* Read data unconditionally to advance i8042. */
227 data = hp_sdc_data_in8();
229 /* For now we are ignoring these until we get the SDC to behave. */
230 if (((status & 0xf1) == 0x51) && data == 0x82)
233 switch (status & HP_SDC_STATUS_IRQMASK) {
234 case 0: /* This case is not documented. */
237 case HP_SDC_STATUS_USERTIMER:
238 case HP_SDC_STATUS_PERIODIC:
239 case HP_SDC_STATUS_TIMER:
240 read_lock(&hp_sdc.hook_lock);
241 if (hp_sdc.timer != NULL)
242 hp_sdc.timer(irq, dev_id, status, data);
243 read_unlock(&hp_sdc.hook_lock);
246 case HP_SDC_STATUS_REG:
247 hp_sdc_take(irq, dev_id, status, data);
250 case HP_SDC_STATUS_HILCMD:
251 case HP_SDC_STATUS_HILDATA:
252 read_lock(&hp_sdc.hook_lock);
253 if (hp_sdc.hil != NULL)
254 hp_sdc.hil(irq, dev_id, status, data);
255 read_unlock(&hp_sdc.hook_lock);
258 case HP_SDC_STATUS_PUP:
259 read_lock(&hp_sdc.hook_lock);
260 if (hp_sdc.pup != NULL)
261 hp_sdc.pup(irq, dev_id, status, data);
263 printk(KERN_INFO PREFIX "HP SDC reports successful PUP.\n");
264 read_unlock(&hp_sdc.hook_lock);
268 read_lock(&hp_sdc.hook_lock);
269 if (hp_sdc.cooked != NULL)
270 hp_sdc.cooked(irq, dev_id, status, data);
271 read_unlock(&hp_sdc.hook_lock);
279 static irqreturn_t hp_sdc_nmisr(int irq, void *dev_id)
283 status = hp_sdc_status_in8();
284 printk(KERN_WARNING PREFIX "NMI !\n");
287 if (status & HP_SDC_NMISTATUS_FHS) {
288 read_lock(&hp_sdc.hook_lock);
289 if (hp_sdc.timer != NULL)
290 hp_sdc.timer(irq, dev_id, status, 0);
291 read_unlock(&hp_sdc.hook_lock);
293 /* TODO: pass this on to the HIL handler, or do SAK here? */
294 printk(KERN_WARNING PREFIX "HIL NMI\n");
302 /***************** Kernel (tasklet) context functions ****************/
304 unsigned long hp_sdc_put(void);
306 static void hp_sdc_tasklet(unsigned long foo)
308 write_lock_irq(&hp_sdc.rtq_lock);
310 if (hp_sdc.rcurr >= 0) {
313 do_gettimeofday(&tv);
314 if (tv.tv_sec > hp_sdc.rtv.tv_sec)
315 tv.tv_usec += USEC_PER_SEC;
317 if (tv.tv_usec - hp_sdc.rtv.tv_usec > HP_SDC_MAX_REG_DELAY) {
318 hp_sdc_transaction *curr;
321 curr = hp_sdc.tq[hp_sdc.rcurr];
322 /* If this turns out to be a normal failure mode
323 * we'll need to figure out a way to communicate
324 * it back to the application. and be less verbose.
326 printk(KERN_WARNING PREFIX "read timeout (%ius)!\n",
327 tv.tv_usec - hp_sdc.rtv.tv_usec);
328 curr->idx += hp_sdc.rqty;
330 tmp = curr->seq[curr->actidx];
331 curr->seq[curr->actidx] |= HP_SDC_ACT_DEAD;
332 if (tmp & HP_SDC_ACT_SEMAPHORE)
333 if (curr->act.semaphore)
334 up(curr->act.semaphore);
336 if (tmp & HP_SDC_ACT_CALLBACK) {
337 /* Note this means that irqhooks may be called
338 * in tasklet/bh context.
340 if (curr->act.irqhook)
341 curr->act.irqhook(0, NULL, 0, 0);
344 curr->actidx = curr->idx;
349 write_unlock_irq(&hp_sdc.rtq_lock);
353 unsigned long hp_sdc_put(void)
355 hp_sdc_transaction *curr;
361 write_lock(&hp_sdc.lock);
363 /* If i8042 buffers are full, we cannot do anything that
364 requires output, so we skip to the administrativa. */
372 /* See if we are in the middle of a sequence. */
373 if (hp_sdc.wcurr < 0)
375 read_lock_irq(&hp_sdc.rtq_lock);
376 if (hp_sdc.rcurr == hp_sdc.wcurr)
378 read_unlock_irq(&hp_sdc.rtq_lock);
379 if (hp_sdc.wcurr >= HP_SDC_QUEUE_LEN)
381 curridx = hp_sdc.wcurr;
383 if (hp_sdc.tq[curridx] != NULL)
386 while (++curridx != hp_sdc.wcurr) {
387 if (curridx >= HP_SDC_QUEUE_LEN) {
388 curridx = -1; /* Wrap to top */
391 read_lock_irq(&hp_sdc.rtq_lock);
392 if (hp_sdc.rcurr == curridx) {
393 read_unlock_irq(&hp_sdc.rtq_lock);
396 read_unlock_irq(&hp_sdc.rtq_lock);
397 if (hp_sdc.tq[curridx] != NULL)
398 break; /* Found one. */
400 if (curridx == hp_sdc.wcurr) { /* There's nothing queued to do. */
403 hp_sdc.wcurr = curridx;
407 /* Check to see if the interrupt mask needs to be set. */
409 hp_sdc_status_out8(hp_sdc.im | HP_SDC_CMD_SET_IM);
414 if (hp_sdc.wcurr == -1)
417 curr = hp_sdc.tq[curridx];
420 if (curr->actidx >= curr->endidx) {
421 hp_sdc.tq[curridx] = NULL;
422 /* Interleave outbound data between the transactions. */
424 if (hp_sdc.wcurr >= HP_SDC_QUEUE_LEN)
429 act = curr->seq[idx];
432 if (curr->idx >= curr->endidx) {
433 if (act & HP_SDC_ACT_DEALLOC)
435 hp_sdc.tq[curridx] = NULL;
436 /* Interleave outbound data between the transactions. */
438 if (hp_sdc.wcurr >= HP_SDC_QUEUE_LEN)
443 while (act & HP_SDC_ACT_PRECMD) {
444 if (curr->idx != idx) {
446 act &= ~HP_SDC_ACT_PRECMD;
449 hp_sdc_status_out8(curr->seq[idx]);
452 if ((act & HP_SDC_ACT_DURING) == HP_SDC_ACT_PRECMD)
454 /* skip quantity field if data-out sequence follows. */
455 if (act & HP_SDC_ACT_DATAOUT)
459 if (act & HP_SDC_ACT_DATAOUT) {
462 qty = curr->seq[idx];
464 if (curr->idx - idx < qty) {
465 hp_sdc_data_out8(curr->seq[curr->idx]);
468 if (curr->idx - idx >= qty &&
469 (act & HP_SDC_ACT_DURING) == HP_SDC_ACT_DATAOUT)
474 act &= ~HP_SDC_ACT_DATAOUT;
476 while (act & HP_SDC_ACT_DATAREG) {
480 mask = curr->seq[idx];
481 if (idx != curr->idx) {
487 act &= ~HP_SDC_ACT_DATAREG;
491 w7[0] = (mask & 1) ? curr->seq[++idx] : hp_sdc.r7[0];
492 w7[1] = (mask & 2) ? curr->seq[++idx] : hp_sdc.r7[1];
493 w7[2] = (mask & 4) ? curr->seq[++idx] : hp_sdc.r7[2];
494 w7[3] = (mask & 8) ? curr->seq[++idx] : hp_sdc.r7[3];
496 if (hp_sdc.wi > 0x73 || hp_sdc.wi < 0x70 ||
497 w7[hp_sdc.wi - 0x70] == hp_sdc.r7[hp_sdc.wi - 0x70]) {
500 /* Need to point the write index register */
501 while (i < 4 && w7[i] == hp_sdc.r7[i])
505 hp_sdc_status_out8(HP_SDC_CMD_SET_D0 + i);
506 hp_sdc.wi = 0x70 + i;
511 if ((act & HP_SDC_ACT_DURING) == HP_SDC_ACT_DATAREG)
515 act &= ~HP_SDC_ACT_DATAREG;
519 hp_sdc_data_out8(w7[hp_sdc.wi - 0x70]);
520 hp_sdc.r7[hp_sdc.wi - 0x70] = w7[hp_sdc.wi - 0x70];
521 hp_sdc.wi++; /* write index register autoincrements */
525 while ((i < 4) && w7[i] == hp_sdc.r7[i])
529 if ((act & HP_SDC_ACT_DURING) ==
536 /* We don't go any further in the command if there is a pending read,
537 because we don't want interleaved results. */
538 read_lock_irq(&hp_sdc.rtq_lock);
539 if (hp_sdc.rcurr >= 0) {
540 read_unlock_irq(&hp_sdc.rtq_lock);
543 read_unlock_irq(&hp_sdc.rtq_lock);
546 if (act & HP_SDC_ACT_POSTCMD) {
549 /* curr->idx should == idx at this point. */
550 postcmd = curr->seq[idx];
552 if (act & HP_SDC_ACT_DATAIN) {
554 /* Start a new read */
555 hp_sdc.rqty = curr->seq[curr->idx];
556 do_gettimeofday(&hp_sdc.rtv);
558 /* Still need to lock here in case of spurious irq. */
559 write_lock_irq(&hp_sdc.rtq_lock);
560 hp_sdc.rcurr = curridx;
561 write_unlock_irq(&hp_sdc.rtq_lock);
562 hp_sdc_status_out8(postcmd);
565 hp_sdc_status_out8(postcmd);
570 if (act & HP_SDC_ACT_SEMAPHORE)
571 up(curr->act.semaphore);
572 else if (act & HP_SDC_ACT_CALLBACK)
573 curr->act.irqhook(0,NULL,0,0);
575 if (curr->idx >= curr->endidx) { /* This transaction is over. */
576 if (act & HP_SDC_ACT_DEALLOC)
578 hp_sdc.tq[curridx] = NULL;
580 curr->actidx = idx + 1;
583 /* Interleave outbound data between the transactions. */
585 if (hp_sdc.wcurr >= HP_SDC_QUEUE_LEN)
589 /* If by some quirk IBF has cleared and our ISR has run to
590 see that that has happened, do it all again. */
591 if (!hp_sdc.ibf && limit++ < 20)
595 if (hp_sdc.wcurr >= 0)
596 tasklet_schedule(&hp_sdc.task);
597 write_unlock(&hp_sdc.lock);
602 /******* Functions called in either user or kernel context ****/
603 int __hp_sdc_enqueue_transaction(hp_sdc_transaction *this)
612 /* Can't have same transaction on queue twice */
613 for (i = 0; i < HP_SDC_QUEUE_LEN; i++)
614 if (hp_sdc.tq[i] == this)
620 /* Search for empty slot */
621 for (i = 0; i < HP_SDC_QUEUE_LEN; i++)
622 if (hp_sdc.tq[i] == NULL) {
624 tasklet_schedule(&hp_sdc.task);
628 printk(KERN_WARNING PREFIX "No free slot to add transaction.\n");
632 printk(KERN_WARNING PREFIX "Transaction add failed: transaction already queued?\n");
636 int hp_sdc_enqueue_transaction(hp_sdc_transaction *this) {
640 write_lock_irqsave(&hp_sdc.lock, flags);
641 ret = __hp_sdc_enqueue_transaction(this);
642 write_unlock_irqrestore(&hp_sdc.lock,flags);
647 int hp_sdc_dequeue_transaction(hp_sdc_transaction *this)
652 write_lock_irqsave(&hp_sdc.lock, flags);
654 /* TODO: don't remove it if it's not done. */
656 for (i = 0; i < HP_SDC_QUEUE_LEN; i++)
657 if (hp_sdc.tq[i] == this)
660 write_unlock_irqrestore(&hp_sdc.lock, flags);
666 /********************** User context functions **************************/
667 int hp_sdc_request_timer_irq(hp_sdc_irqhook *callback)
669 if (callback == NULL || hp_sdc.dev == NULL)
672 write_lock_irq(&hp_sdc.hook_lock);
673 if (hp_sdc.timer != NULL) {
674 write_unlock_irq(&hp_sdc.hook_lock);
678 hp_sdc.timer = callback;
679 /* Enable interrupts from the timers */
680 hp_sdc.im &= ~HP_SDC_IM_FH;
681 hp_sdc.im &= ~HP_SDC_IM_PT;
682 hp_sdc.im &= ~HP_SDC_IM_TIMERS;
684 write_unlock_irq(&hp_sdc.hook_lock);
686 tasklet_schedule(&hp_sdc.task);
691 int hp_sdc_request_hil_irq(hp_sdc_irqhook *callback)
693 if (callback == NULL || hp_sdc.dev == NULL)
696 write_lock_irq(&hp_sdc.hook_lock);
697 if (hp_sdc.hil != NULL) {
698 write_unlock_irq(&hp_sdc.hook_lock);
702 hp_sdc.hil = callback;
703 hp_sdc.im &= ~(HP_SDC_IM_HIL | HP_SDC_IM_RESET);
705 write_unlock_irq(&hp_sdc.hook_lock);
707 tasklet_schedule(&hp_sdc.task);
712 int hp_sdc_request_cooked_irq(hp_sdc_irqhook *callback)
714 if (callback == NULL || hp_sdc.dev == NULL)
717 write_lock_irq(&hp_sdc.hook_lock);
718 if (hp_sdc.cooked != NULL) {
719 write_unlock_irq(&hp_sdc.hook_lock);
723 /* Enable interrupts from the HIL MLC */
724 hp_sdc.cooked = callback;
725 hp_sdc.im &= ~(HP_SDC_IM_HIL | HP_SDC_IM_RESET);
727 write_unlock_irq(&hp_sdc.hook_lock);
729 tasklet_schedule(&hp_sdc.task);
734 int hp_sdc_release_timer_irq(hp_sdc_irqhook *callback)
736 write_lock_irq(&hp_sdc.hook_lock);
737 if ((callback != hp_sdc.timer) ||
738 (hp_sdc.timer == NULL)) {
739 write_unlock_irq(&hp_sdc.hook_lock);
743 /* Disable interrupts from the timers */
745 hp_sdc.im |= HP_SDC_IM_TIMERS;
746 hp_sdc.im |= HP_SDC_IM_FH;
747 hp_sdc.im |= HP_SDC_IM_PT;
749 write_unlock_irq(&hp_sdc.hook_lock);
750 tasklet_schedule(&hp_sdc.task);
755 int hp_sdc_release_hil_irq(hp_sdc_irqhook *callback)
757 write_lock_irq(&hp_sdc.hook_lock);
758 if ((callback != hp_sdc.hil) ||
759 (hp_sdc.hil == NULL)) {
760 write_unlock_irq(&hp_sdc.hook_lock);
765 /* Disable interrupts from HIL only if there is no cooked driver. */
766 if(hp_sdc.cooked == NULL) {
767 hp_sdc.im |= (HP_SDC_IM_HIL | HP_SDC_IM_RESET);
770 write_unlock_irq(&hp_sdc.hook_lock);
771 tasklet_schedule(&hp_sdc.task);
776 int hp_sdc_release_cooked_irq(hp_sdc_irqhook *callback)
778 write_lock_irq(&hp_sdc.hook_lock);
779 if ((callback != hp_sdc.cooked) ||
780 (hp_sdc.cooked == NULL)) {
781 write_unlock_irq(&hp_sdc.hook_lock);
785 hp_sdc.cooked = NULL;
786 /* Disable interrupts from HIL only if there is no raw HIL driver. */
787 if(hp_sdc.hil == NULL) {
788 hp_sdc.im |= (HP_SDC_IM_HIL | HP_SDC_IM_RESET);
791 write_unlock_irq(&hp_sdc.hook_lock);
792 tasklet_schedule(&hp_sdc.task);
797 /************************* Keepalive timer task *********************/
799 void hp_sdc_kicker (unsigned long data)
801 tasklet_schedule(&hp_sdc.task);
802 /* Re-insert the periodic task. */
803 mod_timer(&hp_sdc.kicker, jiffies + HZ);
806 /************************** Module Initialization ***************************/
808 #if defined(__hppa__)
810 static const struct parisc_device_id hp_sdc_tbl[] = {
813 .hversion_rev = HVERSION_REV_ANY_ID,
814 .hversion = HVERSION_ANY_ID,
820 MODULE_DEVICE_TABLE(parisc, hp_sdc_tbl);
822 static int __init hp_sdc_init_hppa(struct parisc_device *d);
824 static struct parisc_driver hp_sdc_driver = {
826 .id_table = hp_sdc_tbl,
827 .probe = hp_sdc_init_hppa,
830 #endif /* __hppa__ */
832 static int __init hp_sdc_init(void)
835 hp_sdc_transaction t_sync;
837 struct semaphore s_sync;
839 rwlock_init(&hp_sdc.lock);
840 rwlock_init(&hp_sdc.ibf_lock);
841 rwlock_init(&hp_sdc.rtq_lock);
842 rwlock_init(&hp_sdc.hook_lock);
847 hp_sdc.cooked = NULL;
848 hp_sdc.im = HP_SDC_IM_MASK; /* Mask maskable irqs */
857 memset(&hp_sdc.tq, 0, sizeof(hp_sdc.tq));
863 hp_sdc.dev_err = -ENODEV;
865 errstr = "IO not found for";
869 errstr = "IRQ not found for";
873 hp_sdc.dev_err = -EBUSY;
875 #if defined(__hppa__)
876 errstr = "IO not available for";
877 if (request_region(hp_sdc.data_io, 2, hp_sdc_driver.name))
881 errstr = "IRQ not available for";
882 if (request_irq(hp_sdc.irq, &hp_sdc_isr, IRQF_SHARED|IRQF_SAMPLE_RANDOM,
886 errstr = "NMI not available for";
887 if (request_irq(hp_sdc.nmi, &hp_sdc_nmisr, IRQF_SHARED,
888 "HP SDC NMI", &hp_sdc))
891 printk(KERN_INFO PREFIX "HP SDC at 0x%p, IRQ %d (NMI IRQ %d)\n",
892 (void *)hp_sdc.base_io, hp_sdc.irq, hp_sdc.nmi);
897 tasklet_init(&hp_sdc.task, hp_sdc_tasklet, 0);
899 /* Sync the output buffer registers, thus scheduling hp_sdc_tasklet. */
903 t_sync.seq = ts_sync;
904 ts_sync[0] = HP_SDC_ACT_DATAREG | HP_SDC_ACT_SEMAPHORE;
906 ts_sync[2] = ts_sync[3] = ts_sync[4] = ts_sync[5] = 0;
907 t_sync.act.semaphore = &s_sync;
908 init_MUTEX_LOCKED(&s_sync);
909 hp_sdc_enqueue_transaction(&t_sync);
910 down(&s_sync); /* Wait for t_sync to complete */
912 /* Create the keepalive task */
913 init_timer(&hp_sdc.kicker);
914 hp_sdc.kicker.expires = jiffies + HZ;
915 hp_sdc.kicker.function = &hp_sdc_kicker;
916 add_timer(&hp_sdc.kicker);
921 free_irq(hp_sdc.irq, &hp_sdc);
923 release_region(hp_sdc.data_io, 2);
925 printk(KERN_WARNING PREFIX ": %s SDC IO=0x%p IRQ=0x%x NMI=0x%x\n",
926 errstr, (void *)hp_sdc.base_io, hp_sdc.irq, hp_sdc.nmi);
929 return hp_sdc.dev_err;
932 #if defined(__hppa__)
934 static int __init hp_sdc_init_hppa(struct parisc_device *d)
938 if (hp_sdc.dev != NULL)
939 return 1; /* We only expect one SDC */
943 hp_sdc.nmi = d->aux_irq;
944 hp_sdc.base_io = d->hpa.start;
945 hp_sdc.data_io = d->hpa.start + 0x800;
946 hp_sdc.status_io = d->hpa.start + 0x801;
948 return hp_sdc_init();
951 #endif /* __hppa__ */
953 static void hp_sdc_exit(void)
955 write_lock_irq(&hp_sdc.lock);
957 /* Turn off all maskable "sub-function" irq's. */
959 sdc_writeb(HP_SDC_CMD_SET_IM | HP_SDC_IM_MASK, hp_sdc.status_io);
961 /* Wait until we know this has been processed by the i8042 */
964 free_irq(hp_sdc.nmi, &hp_sdc);
965 free_irq(hp_sdc.irq, &hp_sdc);
966 write_unlock_irq(&hp_sdc.lock);
968 del_timer(&hp_sdc.kicker);
970 tasklet_kill(&hp_sdc.task);
972 #if defined(__hppa__)
973 if (unregister_parisc_driver(&hp_sdc_driver))
974 printk(KERN_WARNING PREFIX "Error unregistering HP SDC");
978 static int __init hp_sdc_register(void)
980 hp_sdc_transaction tq_init;
981 uint8_t tq_init_seq[5];
982 struct semaphore tq_init_sem;
983 #if defined(__mc68000__)
988 if (hp_sdc_disabled) {
989 printk(KERN_WARNING PREFIX "HP SDC driver disabled by no_hpsdc=1.\n");
995 #if defined(__hppa__)
996 if (register_parisc_driver(&hp_sdc_driver)) {
997 printk(KERN_WARNING PREFIX "Error registering SDC with system bus tree.\n");
1000 #elif defined(__mc68000__)
1006 hp_sdc.base_io = (unsigned long) 0xf0428000;
1007 hp_sdc.data_io = (unsigned long) hp_sdc.base_io + 1;
1008 hp_sdc.status_io = (unsigned long) hp_sdc.base_io + 3;
1011 if (!get_user(i, (unsigned char *)hp_sdc.data_io))
1012 hp_sdc.dev = (void *)1;
1014 hp_sdc.dev_err = hp_sdc_init();
1016 if (hp_sdc.dev == NULL) {
1017 printk(KERN_WARNING PREFIX "No SDC found.\n");
1018 return hp_sdc.dev_err;
1021 init_MUTEX_LOCKED(&tq_init_sem);
1026 tq_init.seq = tq_init_seq;
1027 tq_init.act.semaphore = &tq_init_sem;
1030 HP_SDC_ACT_POSTCMD | HP_SDC_ACT_DATAIN | HP_SDC_ACT_SEMAPHORE;
1031 tq_init_seq[1] = HP_SDC_CMD_READ_KCC;
1036 hp_sdc_enqueue_transaction(&tq_init);
1041 if ((tq_init_seq[0] & HP_SDC_ACT_DEAD) == HP_SDC_ACT_DEAD) {
1042 printk(KERN_WARNING PREFIX "Error reading config byte.\n");
1046 hp_sdc.r11 = tq_init_seq[4];
1047 if (hp_sdc.r11 & HP_SDC_CFG_NEW) {
1049 printk(KERN_INFO PREFIX "New style SDC\n");
1050 tq_init_seq[1] = HP_SDC_CMD_READ_XTD;
1054 hp_sdc_enqueue_transaction(&tq_init);
1057 if ((tq_init_seq[0] & HP_SDC_ACT_DEAD) == HP_SDC_ACT_DEAD) {
1058 printk(KERN_WARNING PREFIX "Error reading extended config byte.\n");
1061 hp_sdc.r7e = tq_init_seq[4];
1062 HP_SDC_XTD_REV_STRINGS(hp_sdc.r7e & HP_SDC_XTD_REV, str)
1063 printk(KERN_INFO PREFIX "Revision: %s\n", str);
1064 if (hp_sdc.r7e & HP_SDC_XTD_BEEPER)
1065 printk(KERN_INFO PREFIX "TI SN76494 beeper present\n");
1066 if (hp_sdc.r7e & HP_SDC_XTD_BBRTC)
1067 printk(KERN_INFO PREFIX "OKI MSM-58321 BBRTC present\n");
1068 printk(KERN_INFO PREFIX "Spunking the self test register to force PUP "
1069 "on next firmware reset.\n");
1070 tq_init_seq[0] = HP_SDC_ACT_PRECMD |
1071 HP_SDC_ACT_DATAOUT | HP_SDC_ACT_SEMAPHORE;
1072 tq_init_seq[1] = HP_SDC_CMD_SET_STR;
1079 hp_sdc_enqueue_transaction(&tq_init);
1083 printk(KERN_INFO PREFIX "Old style SDC (1820-%s).\n",
1084 (hp_sdc.r11 & HP_SDC_CFG_REV) ? "3300" : "2564/3087");
1089 module_init(hp_sdc_register);
1090 module_exit(hp_sdc_exit);
1092 /* Timing notes: These measurements taken on my 64MHz 7100-LC (715/64)
1093 * cycles cycles-adj time
1094 * between two consecutive mfctl(16)'s: 4 n/a 63ns
1095 * hp_sdc_spin_ibf when idle: 119 115 1.7us
1096 * gsc_writeb status register: 83 79 1.2us
1097 * IBF to clear after sending SET_IM: 6204 6006 93us
1098 * IBF to clear after sending LOAD_RT: 4467 4352 68us
1099 * IBF to clear after sending two LOAD_RTs: 18974 18859 295us
1100 * READ_T1, read status/data, IRQ, call handler: 35564 n/a 556us
1101 * cmd to ~IBF READ_T1 2nd time right after: 5158403 n/a 81ms
1102 * between IRQ received and ~IBF for above: 2578877 n/a 40ms
1104 * Performance stats after a run of this module configuring HIL and
1105 * receiving a few mouse events:
1107 * status in8 282508 cycles 7128 calls
1108 * status out8 8404 cycles 341 calls
1109 * data out8 1734 cycles 78 calls
1110 * isr 174324 cycles 617 calls (includes take)
1111 * take 1241 cycles 2 calls
1112 * put 1411504 cycles 6937 calls
1113 * task 1655209 cycles 6937 calls (includes put)