2 * Copyright (c) 2004, 2005 Topspin Communications. All rights reserved.
3 * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved.
4 * Copyright (c) 2005, 2006 Cisco Systems. All rights reserved.
5 * Copyright (c) 2005 Mellanox Technologies. All rights reserved.
6 * Copyright (c) 2004 Voltaire, Inc. All rights reserved.
8 * This software is available to you under a choice of one of two
9 * licenses. You may choose to be licensed under the terms of the GNU
10 * General Public License (GPL) Version 2, available from the file
11 * COPYING in the main directory of this source tree, or the
12 * OpenIB.org BSD license below:
14 * Redistribution and use in source and binary forms, with or
15 * without modification, are permitted provided that the following
18 * - Redistributions of source code must retain the above
19 * copyright notice, this list of conditions and the following
22 * - Redistributions in binary form must reproduce the above
23 * copyright notice, this list of conditions and the following
24 * disclaimer in the documentation and/or other materials
25 * provided with the distribution.
27 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
28 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
29 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
30 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
31 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
32 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
33 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
36 * $Id: mthca_dev.h 1349 2004-12-16 21:09:43Z roland $
42 #include <linux/spinlock.h>
43 #include <linux/kernel.h>
44 #include <linux/pci.h>
45 #include <linux/dma-mapping.h>
46 #include <linux/timer.h>
47 #include <linux/mutex.h>
48 #include <linux/list.h>
50 #include <asm/semaphore.h>
52 #include "mthca_provider.h"
53 #include "mthca_doorbell.h"
55 #define DRV_NAME "ib_mthca"
56 #define PFX DRV_NAME ": "
57 #define DRV_VERSION "0.08"
58 #define DRV_RELDATE "February 14, 2006"
61 MTHCA_FLAG_DDR_HIDDEN = 1 << 1,
62 MTHCA_FLAG_SRQ = 1 << 2,
63 MTHCA_FLAG_MSI = 1 << 3,
64 MTHCA_FLAG_MSI_X = 1 << 4,
65 MTHCA_FLAG_NO_LAM = 1 << 5,
66 MTHCA_FLAG_FMR = 1 << 6,
67 MTHCA_FLAG_MEMFREE = 1 << 7,
68 MTHCA_FLAG_PCIE = 1 << 8,
69 MTHCA_FLAG_SINAI_OPT = 1 << 9
77 MTHCA_BOARD_ID_LEN = 64
81 MTHCA_EQ_CONTEXT_SIZE = 0x40,
82 MTHCA_CQ_CONTEXT_SIZE = 0x40,
83 MTHCA_QP_CONTEXT_SIZE = 0x200,
84 MTHCA_RDB_ENTRY_SIZE = 0x20,
86 MTHCA_MGM_ENTRY_SIZE = 0x40,
88 /* Arbel FW gives us these, but we need them for Tavor */
89 MTHCA_MPT_ENTRY_SIZE = 0x40,
90 MTHCA_MTT_SEG_SIZE = 0x40,
92 MTHCA_QP_PER_MGM = 4 * (MTHCA_MGM_ENTRY_SIZE / 16 - 2)
103 MTHCA_OPCODE_NOP = 0x00,
104 MTHCA_OPCODE_RDMA_WRITE = 0x08,
105 MTHCA_OPCODE_RDMA_WRITE_IMM = 0x09,
106 MTHCA_OPCODE_SEND = 0x0a,
107 MTHCA_OPCODE_SEND_IMM = 0x0b,
108 MTHCA_OPCODE_RDMA_READ = 0x10,
109 MTHCA_OPCODE_ATOMIC_CS = 0x11,
110 MTHCA_OPCODE_ATOMIC_FA = 0x12,
111 MTHCA_OPCODE_BIND_MW = 0x18,
112 MTHCA_OPCODE_INVALID = 0xff
116 MTHCA_CMD_USE_EVENTS = 1 << 0,
117 MTHCA_CMD_POST_DOORBELLS = 1 << 1
121 MTHCA_CMD_NUM_DBELL_DWORDS = 8
125 struct pci_pool *pool;
126 struct mutex hcr_mutex;
127 struct semaphore poll_sem;
128 struct semaphore event_sem;
130 spinlock_t context_lock;
132 struct mthca_cmd_context *context;
135 void __iomem *dbell_map;
136 u16 dbell_offsets[MTHCA_CMD_NUM_DBELL_DWORDS];
139 struct mthca_limits {
145 int local_ca_ack_delay;
151 int max_qp_init_rdma;
166 int fmr_reserved_mtts;
177 u16 stat_rate_support;
187 unsigned long *table;
197 struct mthca_uar_table {
198 struct mthca_alloc alloc;
203 struct mthca_pd_table {
204 struct mthca_alloc alloc;
208 unsigned long **bits;
213 struct mthca_mr_table {
214 struct mthca_alloc mpt_alloc;
215 struct mthca_buddy mtt_buddy;
216 struct mthca_buddy *fmr_mtt_buddy;
219 struct mthca_icm_table *mtt_table;
220 struct mthca_icm_table *mpt_table;
222 void __iomem *mpt_base;
223 void __iomem *mtt_base;
224 struct mthca_buddy mtt_buddy;
228 struct mthca_eq_table {
229 struct mthca_alloc alloc;
230 void __iomem *clr_int;
233 struct mthca_eq eq[MTHCA_NUM_EQ];
235 struct page *icm_page;
241 struct mthca_cq_table {
242 struct mthca_alloc alloc;
244 struct mthca_array cq;
245 struct mthca_icm_table *table;
248 struct mthca_srq_table {
249 struct mthca_alloc alloc;
251 struct mthca_array srq;
252 struct mthca_icm_table *table;
255 struct mthca_qp_table {
256 struct mthca_alloc alloc;
261 struct mthca_array qp;
262 struct mthca_icm_table *qp_table;
263 struct mthca_icm_table *eqp_table;
264 struct mthca_icm_table *rdb_table;
267 struct mthca_av_table {
268 struct pci_pool *pool;
271 void __iomem *av_map;
272 struct mthca_alloc alloc;
275 struct mthca_mcg_table {
277 struct mthca_alloc alloc;
278 struct mthca_icm_table *table;
281 struct mthca_catas_err {
286 struct timer_list timer;
287 struct list_head list;
290 extern struct mutex mthca_device_mutex;
293 struct ib_device ib_dev;
294 struct pci_dev *pdev;
297 unsigned long mthca_flags;
298 unsigned long device_cap_flags;
301 char board_id[MTHCA_BOARD_ID_LEN];
314 struct mthca_icm *fw_icm;
315 struct mthca_icm *aux_icm;
323 MTHCA_DECLARE_DOORBELL_LOCK(doorbell_lock)
324 struct mutex cap_mask_mutex;
328 void __iomem *clr_base;
331 void __iomem *ecr_base;
334 void __iomem *eq_arm;
335 void __iomem *eq_set_ci_base;
339 struct mthca_cmd cmd;
340 struct mthca_limits limits;
342 struct mthca_uar_table uar_table;
343 struct mthca_pd_table pd_table;
344 struct mthca_mr_table mr_table;
345 struct mthca_eq_table eq_table;
346 struct mthca_cq_table cq_table;
347 struct mthca_srq_table srq_table;
348 struct mthca_qp_table qp_table;
349 struct mthca_av_table av_table;
350 struct mthca_mcg_table mcg_table;
352 struct mthca_catas_err catas_err;
354 struct mthca_uar driver_uar;
355 struct mthca_db_table *db_tab;
356 struct mthca_pd driver_pd;
357 struct mthca_mr driver_mr;
359 struct ib_mad_agent *send_agent[MTHCA_MAX_PORTS][2];
360 struct ib_ah *sm_ah[MTHCA_MAX_PORTS];
362 u8 rate[MTHCA_MAX_PORTS];
365 #ifdef CONFIG_INFINIBAND_MTHCA_DEBUG
366 extern int mthca_debug_level;
368 #define mthca_dbg(mdev, format, arg...) \
370 if (mthca_debug_level) \
371 dev_printk(KERN_DEBUG, &mdev->pdev->dev, format, ## arg); \
374 #else /* CONFIG_INFINIBAND_MTHCA_DEBUG */
376 #define mthca_dbg(mdev, format, arg...) do { (void) mdev; } while (0)
378 #endif /* CONFIG_INFINIBAND_MTHCA_DEBUG */
380 #define mthca_err(mdev, format, arg...) \
381 dev_err(&mdev->pdev->dev, format, ## arg)
382 #define mthca_info(mdev, format, arg...) \
383 dev_info(&mdev->pdev->dev, format, ## arg)
384 #define mthca_warn(mdev, format, arg...) \
385 dev_warn(&mdev->pdev->dev, format, ## arg)
387 extern void __buggy_use_of_MTHCA_GET(void);
388 extern void __buggy_use_of_MTHCA_PUT(void);
390 #define MTHCA_GET(dest, source, offset) \
392 void *__p = (char *) (source) + (offset); \
393 switch (sizeof (dest)) { \
394 case 1: (dest) = *(u8 *) __p; break; \
395 case 2: (dest) = be16_to_cpup(__p); break; \
396 case 4: (dest) = be32_to_cpup(__p); break; \
397 case 8: (dest) = be64_to_cpup(__p); break; \
398 default: __buggy_use_of_MTHCA_GET(); \
402 #define MTHCA_PUT(dest, source, offset) \
404 void *__d = ((char *) (dest) + (offset)); \
405 switch (sizeof(source)) { \
406 case 1: *(u8 *) __d = (source); break; \
407 case 2: *(__be16 *) __d = cpu_to_be16(source); break; \
408 case 4: *(__be32 *) __d = cpu_to_be32(source); break; \
409 case 8: *(__be64 *) __d = cpu_to_be64(source); break; \
410 default: __buggy_use_of_MTHCA_PUT(); \
414 int mthca_reset(struct mthca_dev *mdev);
416 u32 mthca_alloc(struct mthca_alloc *alloc);
417 void mthca_free(struct mthca_alloc *alloc, u32 obj);
418 int mthca_alloc_init(struct mthca_alloc *alloc, u32 num, u32 mask,
420 void mthca_alloc_cleanup(struct mthca_alloc *alloc);
421 void *mthca_array_get(struct mthca_array *array, int index);
422 int mthca_array_set(struct mthca_array *array, int index, void *value);
423 void mthca_array_clear(struct mthca_array *array, int index);
424 int mthca_array_init(struct mthca_array *array, int nent);
425 void mthca_array_cleanup(struct mthca_array *array, int nent);
426 int mthca_buf_alloc(struct mthca_dev *dev, int size, int max_direct,
427 union mthca_buf *buf, int *is_direct, struct mthca_pd *pd,
428 int hca_write, struct mthca_mr *mr);
429 void mthca_buf_free(struct mthca_dev *dev, int size, union mthca_buf *buf,
430 int is_direct, struct mthca_mr *mr);
432 int mthca_init_uar_table(struct mthca_dev *dev);
433 int mthca_init_pd_table(struct mthca_dev *dev);
434 int mthca_init_mr_table(struct mthca_dev *dev);
435 int mthca_init_eq_table(struct mthca_dev *dev);
436 int mthca_init_cq_table(struct mthca_dev *dev);
437 int mthca_init_srq_table(struct mthca_dev *dev);
438 int mthca_init_qp_table(struct mthca_dev *dev);
439 int mthca_init_av_table(struct mthca_dev *dev);
440 int mthca_init_mcg_table(struct mthca_dev *dev);
442 void mthca_cleanup_uar_table(struct mthca_dev *dev);
443 void mthca_cleanup_pd_table(struct mthca_dev *dev);
444 void mthca_cleanup_mr_table(struct mthca_dev *dev);
445 void mthca_cleanup_eq_table(struct mthca_dev *dev);
446 void mthca_cleanup_cq_table(struct mthca_dev *dev);
447 void mthca_cleanup_srq_table(struct mthca_dev *dev);
448 void mthca_cleanup_qp_table(struct mthca_dev *dev);
449 void mthca_cleanup_av_table(struct mthca_dev *dev);
450 void mthca_cleanup_mcg_table(struct mthca_dev *dev);
452 int mthca_register_device(struct mthca_dev *dev);
453 void mthca_unregister_device(struct mthca_dev *dev);
455 void mthca_start_catas_poll(struct mthca_dev *dev);
456 void mthca_stop_catas_poll(struct mthca_dev *dev);
457 int __mthca_restart_one(struct pci_dev *pdev);
458 int mthca_catas_init(void);
459 void mthca_catas_cleanup(void);
461 int mthca_uar_alloc(struct mthca_dev *dev, struct mthca_uar *uar);
462 void mthca_uar_free(struct mthca_dev *dev, struct mthca_uar *uar);
464 int mthca_pd_alloc(struct mthca_dev *dev, int privileged, struct mthca_pd *pd);
465 void mthca_pd_free(struct mthca_dev *dev, struct mthca_pd *pd);
467 struct mthca_mtt *mthca_alloc_mtt(struct mthca_dev *dev, int size);
468 void mthca_free_mtt(struct mthca_dev *dev, struct mthca_mtt *mtt);
469 int mthca_write_mtt(struct mthca_dev *dev, struct mthca_mtt *mtt,
470 int start_index, u64 *buffer_list, int list_len);
471 int mthca_mr_alloc(struct mthca_dev *dev, u32 pd, int buffer_size_shift,
472 u64 iova, u64 total_size, u32 access, struct mthca_mr *mr);
473 int mthca_mr_alloc_notrans(struct mthca_dev *dev, u32 pd,
474 u32 access, struct mthca_mr *mr);
475 int mthca_mr_alloc_phys(struct mthca_dev *dev, u32 pd,
476 u64 *buffer_list, int buffer_size_shift,
477 int list_len, u64 iova, u64 total_size,
478 u32 access, struct mthca_mr *mr);
479 void mthca_free_mr(struct mthca_dev *dev, struct mthca_mr *mr);
481 int mthca_fmr_alloc(struct mthca_dev *dev, u32 pd,
482 u32 access, struct mthca_fmr *fmr);
483 int mthca_tavor_map_phys_fmr(struct ib_fmr *ibfmr, u64 *page_list,
484 int list_len, u64 iova);
485 void mthca_tavor_fmr_unmap(struct mthca_dev *dev, struct mthca_fmr *fmr);
486 int mthca_arbel_map_phys_fmr(struct ib_fmr *ibfmr, u64 *page_list,
487 int list_len, u64 iova);
488 void mthca_arbel_fmr_unmap(struct mthca_dev *dev, struct mthca_fmr *fmr);
489 int mthca_free_fmr(struct mthca_dev *dev, struct mthca_fmr *fmr);
491 int mthca_map_eq_icm(struct mthca_dev *dev, u64 icm_virt);
492 void mthca_unmap_eq_icm(struct mthca_dev *dev);
494 int mthca_poll_cq(struct ib_cq *ibcq, int num_entries,
495 struct ib_wc *entry);
496 int mthca_tavor_arm_cq(struct ib_cq *cq, enum ib_cq_notify notify);
497 int mthca_arbel_arm_cq(struct ib_cq *cq, enum ib_cq_notify notify);
498 int mthca_init_cq(struct mthca_dev *dev, int nent,
499 struct mthca_ucontext *ctx, u32 pdn,
500 struct mthca_cq *cq);
501 void mthca_free_cq(struct mthca_dev *dev,
502 struct mthca_cq *cq);
503 void mthca_cq_completion(struct mthca_dev *dev, u32 cqn);
504 void mthca_cq_event(struct mthca_dev *dev, u32 cqn,
505 enum ib_event_type event_type);
506 void mthca_cq_clean(struct mthca_dev *dev, struct mthca_cq *cq, u32 qpn,
507 struct mthca_srq *srq);
508 void mthca_cq_resize_copy_cqes(struct mthca_cq *cq);
509 int mthca_alloc_cq_buf(struct mthca_dev *dev, struct mthca_cq_buf *buf, int nent);
510 void mthca_free_cq_buf(struct mthca_dev *dev, struct mthca_cq_buf *buf, int cqe);
512 int mthca_alloc_srq(struct mthca_dev *dev, struct mthca_pd *pd,
513 struct ib_srq_attr *attr, struct mthca_srq *srq);
514 void mthca_free_srq(struct mthca_dev *dev, struct mthca_srq *srq);
515 int mthca_modify_srq(struct ib_srq *ibsrq, struct ib_srq_attr *attr,
516 enum ib_srq_attr_mask attr_mask, struct ib_udata *udata);
517 int mthca_query_srq(struct ib_srq *srq, struct ib_srq_attr *srq_attr);
518 int mthca_max_srq_sge(struct mthca_dev *dev);
519 void mthca_srq_event(struct mthca_dev *dev, u32 srqn,
520 enum ib_event_type event_type);
521 void mthca_free_srq_wqe(struct mthca_srq *srq, u32 wqe_addr);
522 int mthca_tavor_post_srq_recv(struct ib_srq *srq, struct ib_recv_wr *wr,
523 struct ib_recv_wr **bad_wr);
524 int mthca_arbel_post_srq_recv(struct ib_srq *srq, struct ib_recv_wr *wr,
525 struct ib_recv_wr **bad_wr);
527 void mthca_qp_event(struct mthca_dev *dev, u32 qpn,
528 enum ib_event_type event_type);
529 int mthca_query_qp(struct ib_qp *ibqp, struct ib_qp_attr *qp_attr, int qp_attr_mask,
530 struct ib_qp_init_attr *qp_init_attr);
531 int mthca_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, int attr_mask,
532 struct ib_udata *udata);
533 int mthca_tavor_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
534 struct ib_send_wr **bad_wr);
535 int mthca_tavor_post_receive(struct ib_qp *ibqp, struct ib_recv_wr *wr,
536 struct ib_recv_wr **bad_wr);
537 int mthca_arbel_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
538 struct ib_send_wr **bad_wr);
539 int mthca_arbel_post_receive(struct ib_qp *ibqp, struct ib_recv_wr *wr,
540 struct ib_recv_wr **bad_wr);
541 void mthca_free_err_wqe(struct mthca_dev *dev, struct mthca_qp *qp, int is_send,
542 int index, int *dbd, __be32 *new_wqe);
543 int mthca_alloc_qp(struct mthca_dev *dev,
545 struct mthca_cq *send_cq,
546 struct mthca_cq *recv_cq,
547 enum ib_qp_type type,
548 enum ib_sig_type send_policy,
549 struct ib_qp_cap *cap,
550 struct mthca_qp *qp);
551 int mthca_alloc_sqp(struct mthca_dev *dev,
553 struct mthca_cq *send_cq,
554 struct mthca_cq *recv_cq,
555 enum ib_sig_type send_policy,
556 struct ib_qp_cap *cap,
559 struct mthca_sqp *sqp);
560 void mthca_free_qp(struct mthca_dev *dev, struct mthca_qp *qp);
561 int mthca_create_ah(struct mthca_dev *dev,
563 struct ib_ah_attr *ah_attr,
564 struct mthca_ah *ah);
565 int mthca_destroy_ah(struct mthca_dev *dev, struct mthca_ah *ah);
566 int mthca_read_ah(struct mthca_dev *dev, struct mthca_ah *ah,
567 struct ib_ud_header *header);
568 int mthca_ah_query(struct ib_ah *ibah, struct ib_ah_attr *attr);
569 int mthca_ah_grh_present(struct mthca_ah *ah);
570 u8 mthca_get_rate(struct mthca_dev *dev, int static_rate, u8 port);
571 enum ib_rate mthca_rate_to_ib(struct mthca_dev *dev, u8 mthca_rate, u8 port);
573 int mthca_multicast_attach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid);
574 int mthca_multicast_detach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid);
576 int mthca_process_mad(struct ib_device *ibdev,
580 struct ib_grh *in_grh,
581 struct ib_mad *in_mad,
582 struct ib_mad *out_mad);
583 int mthca_create_agents(struct mthca_dev *dev);
584 void mthca_free_agents(struct mthca_dev *dev);
586 static inline struct mthca_dev *to_mdev(struct ib_device *ibdev)
588 return container_of(ibdev, struct mthca_dev, ib_dev);
591 static inline int mthca_is_memfree(struct mthca_dev *dev)
593 return dev->mthca_flags & MTHCA_FLAG_MEMFREE;
596 #endif /* MTHCA_DEV_H */