1 #ifndef _IPATH_KERNEL_H
2 #define _IPATH_KERNEL_H
4 * Copyright (c) 2006, 2007 QLogic Corporation. All rights reserved.
5 * Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved.
7 * This software is available to you under a choice of one of two
8 * licenses. You may choose to be licensed under the terms of the GNU
9 * General Public License (GPL) Version 2, available from the file
10 * COPYING in the main directory of this source tree, or the
11 * OpenIB.org BSD license below:
13 * Redistribution and use in source and binary forms, with or
14 * without modification, are permitted provided that the following
17 * - Redistributions of source code must retain the above
18 * copyright notice, this list of conditions and the following
21 * - Redistributions in binary form must reproduce the above
22 * copyright notice, this list of conditions and the following
23 * disclaimer in the documentation and/or other materials
24 * provided with the distribution.
26 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
27 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
28 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
29 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
30 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
31 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
32 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
37 * This header file is the base header file for infinipath kernel code
38 * ipath_user.h serves a similar purpose for user code.
41 #include <linux/interrupt.h>
42 #include <linux/pci.h>
43 #include <linux/dma-mapping.h>
46 #include "ipath_common.h"
47 #include "ipath_debug.h"
48 #include "ipath_registers.h"
50 /* only s/w major version of InfiniPath we can handle */
51 #define IPATH_CHIP_VERS_MAJ 2U
53 /* don't care about this except printing */
54 #define IPATH_CHIP_VERS_MIN 0U
56 /* temporary, maybe always */
57 extern struct infinipath_stats ipath_stats;
59 #define IPATH_CHIP_SWVERSION IPATH_CHIP_VERS_MAJ
61 * First-cut critierion for "device is active" is
62 * two thousand dwords combined Tx, Rx traffic per
63 * 5-second interval. SMA packets are 64 dwords,
64 * and occur "a few per second", presumably each way.
66 #define IPATH_TRAFFIC_ACTIVE_THRESHOLD (2000)
68 * Struct used to indicate which errors are logged in each of the
69 * error-counters that are logged to EEPROM. A counter is incremented
70 * _once_ (saturating at 255) for each event with any bits set in
71 * the error or hwerror register masks below.
73 #define IPATH_EEP_LOG_CNT (4)
74 struct ipath_eep_log_mask {
79 struct ipath_portdata {
80 void **port_rcvegrbuf;
81 dma_addr_t *port_rcvegrbuf_phys;
82 /* rcvhdrq base, needs mmap before useful */
84 /* kernel virtual address where hdrqtail is updated */
85 void *port_rcvhdrtail_kvaddr;
87 * temp buffer for expected send setup, allocated at open, instead
90 void *port_tid_pg_list;
91 /* when waiting for rcv or pioavail */
92 wait_queue_head_t port_wait;
94 * rcvegr bufs base, physical, must fit
95 * in 44 bits so 32 bit programs mmap64 44 bit works)
97 dma_addr_t port_rcvegr_phys;
98 /* mmap of hdrq, must fit in 44 bits */
99 dma_addr_t port_rcvhdrq_phys;
100 dma_addr_t port_rcvhdrqtailaddr_phys;
102 * number of opens (including slave subports) on this instance
103 * (ignoring forks, dup, etc. for now)
107 * how much space to leave at start of eager TID entries for
108 * protocol use, on each TID
110 /* instead of calculating it */
112 /* non-zero if port is being shared. */
113 u16 port_subport_cnt;
114 /* non-zero if port is being shared. */
116 /* chip offset of PIO buffers for this port */
118 /* how many alloc_pages() chunks in port_rcvegrbuf_pages */
119 u32 port_rcvegrbuf_chunks;
120 /* how many egrbufs per chunk */
121 u32 port_rcvegrbufs_perchunk;
122 /* order for port_rcvegrbuf_pages */
123 size_t port_rcvegrbuf_size;
124 /* rcvhdrq size (for freeing) */
125 size_t port_rcvhdrq_size;
126 /* next expected TID to check when looking for free */
128 /* next expected TID to check */
129 unsigned long port_flag;
131 unsigned long int_flag;
132 /* WAIT_RCV that timed out, no interrupt */
134 /* WAIT_PIO that timed out, no interrupt */
136 /* WAIT_RCV already happened, no wait */
138 /* WAIT_PIO already happened, no wait */
140 /* total number of rcvhdrqfull errors */
142 /* pid of process using this port */
144 /* same size as task_struct .comm[] */
146 /* pkeys set by this use of this port */
148 /* so file ops can get at unit */
149 struct ipath_devdata *port_dd;
150 /* A page of memory for rcvhdrhead, rcvegrhead, rcvegrtail * N */
151 void *subport_uregbase;
152 /* An array of pages for the eager receive buffers * N */
153 void *subport_rcvegrbuf;
154 /* An array of pages for the eager header queue entries * N */
155 void *subport_rcvhdr_base;
156 /* The version of the library which opened this port */
158 /* Bitmask of active slaves */
160 /* Type of packets or conditions we want to poll for */
167 * control information for layered drivers
169 struct _ipath_layer {
173 struct ipath_skbinfo {
178 struct ipath_devdata {
179 struct list_head ipath_list;
181 struct ipath_kregs const *ipath_kregs;
182 struct ipath_cregs const *ipath_cregs;
184 /* mem-mapped pointer to base of chip regs */
185 u64 __iomem *ipath_kregbase;
186 /* end of mem-mapped chip space; range checking */
187 u64 __iomem *ipath_kregend;
188 /* physical address of chip for io_remap, etc. */
189 unsigned long ipath_physaddr;
190 /* base of memory alloced for ipath_kregbase, for free */
191 u64 *ipath_kregalloc;
193 * virtual address where port0 rcvhdrqtail updated for this unit.
194 * only written to by the chip, not the driver.
196 volatile __le64 *ipath_hdrqtailptr;
197 /* ipath_cfgports pointers */
198 struct ipath_portdata **ipath_pd;
199 /* sk_buffs used by port 0 eager receive queue */
200 struct ipath_skbinfo *ipath_port0_skbinfo;
201 /* kvirt address of 1st 2k pio buffer */
202 void __iomem *ipath_pio2kbase;
203 /* kvirt address of 1st 4k pio buffer */
204 void __iomem *ipath_pio4kbase;
206 * points to area where PIOavail registers will be DMA'ed.
207 * Has to be on a page of it's own, because the page will be
208 * mapped into user program space. This copy is *ONLY* ever
209 * written by DMA, not by the driver! Need a copy per device
210 * when we get to multiple devices
212 volatile __le64 *ipath_pioavailregs_dma;
213 /* physical address where updates occur */
214 dma_addr_t ipath_pioavailregs_phys;
215 struct _ipath_layer ipath_layer;
217 int (*ipath_f_intrsetup)(struct ipath_devdata *);
218 /* setup on-chip bus config */
219 int (*ipath_f_bus)(struct ipath_devdata *, struct pci_dev *);
220 /* hard reset chip */
221 int (*ipath_f_reset)(struct ipath_devdata *);
222 int (*ipath_f_get_boardname)(struct ipath_devdata *, char *,
224 void (*ipath_f_init_hwerrors)(struct ipath_devdata *);
225 void (*ipath_f_handle_hwerrors)(struct ipath_devdata *, char *,
227 void (*ipath_f_quiet_serdes)(struct ipath_devdata *);
228 int (*ipath_f_bringup_serdes)(struct ipath_devdata *);
229 int (*ipath_f_early_init)(struct ipath_devdata *);
230 void (*ipath_f_clear_tids)(struct ipath_devdata *, unsigned);
231 void (*ipath_f_put_tid)(struct ipath_devdata *, u64 __iomem*,
233 void (*ipath_f_tidtemplate)(struct ipath_devdata *);
234 void (*ipath_f_cleanup)(struct ipath_devdata *);
235 void (*ipath_f_setextled)(struct ipath_devdata *, u64, u64);
236 /* fill out chip-specific fields */
237 int (*ipath_f_get_base_info)(struct ipath_portdata *, void *);
239 void (*ipath_f_free_irq)(struct ipath_devdata *);
240 struct ipath_ibdev *verbs_dev;
241 struct timer_list verbs_timer;
242 /* total dwords sent (summed from counter) */
244 /* total dwords rcvd (summed from counter) */
246 /* total packets sent (summed from counter) */
248 /* total packets rcvd (summed from counter) */
250 /* ipath_statusp initially points to this. */
252 /* GUID for this interface, in network order */
255 * aggregrate of error bits reported since last cleared, for
256 * limiting of error reporting
258 ipath_err_t ipath_lasterror;
260 * aggregrate of error bits reported since last cleared, for
261 * limiting of hwerror reporting
263 ipath_err_t ipath_lasthwerror;
265 * errors masked because they occur too fast, also includes errors
266 * that are always ignored (ipath_ignorederrs)
268 ipath_err_t ipath_maskederrs;
269 /* time in jiffies at which to re-enable maskederrs */
270 unsigned long ipath_unmasktime;
272 * errors always ignored (masked), at least for a given
273 * chip/device, because they are wrong or not useful
275 ipath_err_t ipath_ignorederrs;
276 /* count of egrfull errors, combined for all ports */
277 u64 ipath_last_tidfull;
278 /* for ipath_qcheck() */
279 u64 ipath_lastport0rcv_cnt;
280 /* template for writing TIDs */
281 u64 ipath_tidtemplate;
282 /* value to write to free TIDs */
283 u64 ipath_tidinvalid;
284 /* IBA6120 rcv interrupt setup */
285 u64 ipath_rhdrhead_intr_off;
287 /* size of memory at ipath_kregbase */
289 /* number of registers used for pioavail */
291 /* IPATH_POLL, etc. */
293 /* ipath_flags driver is waiting for */
294 u32 ipath_state_wanted;
295 /* last buffer for user use, first buf for kernel use is this
297 u32 ipath_lastport_piobuf;
298 /* is a stats timer active */
299 u32 ipath_stats_timer_active;
300 /* number of interrupts for this device -- saturates... */
301 u32 ipath_int_counter;
302 /* dwords sent read from counter */
304 /* dwords received read from counter */
306 /* sent packets read from counter */
308 /* received packets read from counter */
310 /* pio bufs allocated per port */
313 * number of ports configured as max; zero is set to number chip
314 * supports, less gives more pio bufs/port, etc.
317 /* port0 rcvhdrq head offset */
319 /* count of port 0 hdrqfull errors */
320 u32 ipath_p0_hdrqfull;
323 * (*cfgports) used to suppress multiple instances of same
324 * port staying stuck at same point
326 u32 *ipath_lastrcvhdrqtails;
328 * (*cfgports) used to suppress multiple instances of same
329 * port staying stuck at same point
331 u32 *ipath_lastegrheads;
333 * index of last piobuffer we used. Speeds up searching, by
334 * starting at this point. Doesn't matter if multiple cpu's use and
335 * update, last updater is only write that matters. Whenever it
336 * wraps, we update shadow copies. Need a copy per device when we
337 * get to multiple devices
339 u32 ipath_lastpioindex;
340 /* max length of freezemsg */
343 * consecutive times we wanted a PIO buffer but were unable to
346 u32 ipath_consec_nopiobuf;
348 * hint that we should update ipath_pioavailshadow before
349 * looking for a PIO buffer
351 u32 ipath_upd_pio_shadow;
352 /* so we can rewrite it after a chip reset */
354 /* so we can rewrite it after a chip reset */
357 /* interrupt number */
359 /* HT/PCI Vendor ID (here for NodeInfo) */
361 /* HT/PCI Device ID (here for NodeInfo) */
363 /* offset in HT config space of slave/primary interface block */
364 u8 ipath_ht_slave_off;
365 /* for write combining settings */
366 unsigned long ipath_wc_cookie;
367 unsigned long ipath_wc_base;
368 unsigned long ipath_wc_len;
369 /* ref count for each pkey */
370 atomic_t ipath_pkeyrefs[4];
371 /* shadow copy of all exptids physaddr; used only by funcsim */
372 u64 *ipath_tidsimshadow;
373 /* shadow copy of struct page *'s for exp tid pages */
374 struct page **ipath_pageshadow;
375 /* shadow copy of dma handles for exp tid pages */
376 dma_addr_t *ipath_physshadow;
377 /* lock to workaround chip bug 9437 */
378 spinlock_t ipath_tid_lock;
382 * this address is mapped readonly into user processes so they can
383 * get status cheaply, whenever they want.
386 /* freeze msg if hw error put chip in freeze */
387 char *ipath_freezemsg;
388 /* pci access data structure */
389 struct pci_dev *pcidev;
390 struct cdev *user_cdev;
391 struct cdev *diag_cdev;
392 struct class_device *user_class_dev;
393 struct class_device *diag_class_dev;
394 /* timer used to prevent stats overflow, error throttling, etc. */
395 struct timer_list ipath_stats_timer;
396 void *ipath_dummy_hdrq; /* used after port close */
397 dma_addr_t ipath_dummy_hdrq_phys;
400 * Shadow copies of registers; size indicates read access size.
401 * Most of them are readonly, but some are write-only register,
402 * where we manipulate the bits in the shadow copy, and then write
403 * the shadow copy to infinipath.
405 * We deliberately make most of these 32 bits, since they have
406 * restricted range. For any that we read, we won't to generate 32
407 * bit accesses, since Opteron will generate 2 separate 32 bit HT
408 * transactions for a 64 bit read, and we want to avoid unnecessary
412 /* This is the 64 bit group */
415 * shadow of pioavail, check to be sure it's large enough at
418 unsigned long ipath_pioavailshadow[8];
419 /* shadow of kr_gpio_out, for rmw ops */
421 /* shadow the gpio mask register */
423 /* shadow the gpio output enable, etc... */
425 /* kr_revision shadow */
428 * shadow of ibcctrl, for interrupt handling of link changes,
433 * last ibcstatus, to suppress "duplicate" status change messages,
436 u64 ipath_lastibcstat;
437 /* hwerrmask shadow */
438 ipath_err_t ipath_hwerrmask;
439 /* interrupt config reg shadow */
441 /* kr_sendpiobufbase value */
442 u64 ipath_piobufbase;
444 /* these are the "32 bit" regs */
447 * number of GUIDs in the flash for this interface; may need some
448 * rethinking for setting on other ifaces
452 * the following two are 32-bit bitmasks, but {test,clear,set}_bit
453 * all expect bit fields to be "unsigned long"
455 /* shadow kr_rcvctrl */
456 unsigned long ipath_rcvctrl;
457 /* shadow kr_sendctrl */
458 unsigned long ipath_sendctrl;
459 /* ports waiting for PIOavail intr */
460 unsigned long ipath_portpiowait;
461 unsigned long ipath_lastcancel; /* to not count armlaunch after cancel */
463 /* value we put in kr_rcvhdrcnt */
465 /* value we put in kr_rcvhdrsize */
466 u32 ipath_rcvhdrsize;
467 /* value we put in kr_rcvhdrentsize */
468 u32 ipath_rcvhdrentsize;
469 /* offset of last entry in rcvhdrq */
471 /* kr_portcnt value */
473 /* kr_pagealign value */
475 /* number of "2KB" PIO buffers */
477 /* size in bytes of "2KB" PIO buffers */
479 /* number of "4KB" PIO buffers */
481 /* size in bytes of "4KB" PIO buffers */
483 /* kr_rcvegrbase value */
484 u32 ipath_rcvegrbase;
485 /* kr_rcvegrcnt value */
487 /* kr_rcvtidbase value */
488 u32 ipath_rcvtidbase;
489 /* kr_rcvtidcnt value */
495 /* kr_counterregbase */
497 /* shadow the control register contents */
499 /* PCI revision register (HTC rev on FPGA) */
502 /* chip address space used by 4k pio buffers */
504 /* The MTU programmed for this unit */
507 * The max size IB packet, included IB headers that we can send.
508 * Starts same as ipath_piosize, but is affected when ibmtu is
509 * changed, or by size of eager buffers
513 * ibmaxlen at init time, limited by chip and by receive buffer
514 * size. Not changed after init.
516 u32 ipath_init_ibmaxlen;
517 /* size of each rcvegrbuffer */
518 u32 ipath_rcvegrbufsize;
519 /* width (2,4,8,16,32) from HT config reg */
521 /* HT speed (200,400,800,1000) from HT config */
524 * number of sequential ibcstatus change for polling active/quiet
525 * (i.e., link not coming up).
528 /* low and high portions of MSI capability/vector */
530 /* saved after PCIe init for restore after reset */
532 /* MSI data (vector) saved for restore */
534 /* MLID programmed for this instance */
536 /* LID programmed for this instance */
538 /* list of pkeys programmed; 0 if not set */
541 * ASCII serial number, from flash, large enough for original
542 * all digit strings, and longer QLogic serial number format
545 /* human readable board version */
546 u8 ipath_boardversion[80];
547 /* chip major rev, from ipath_revision */
549 /* chip minor rev, from ipath_revision */
551 /* board rev, from ipath_revision */
553 /* unit # of this chip, if present */
555 /* saved for restore after reset */
556 u8 ipath_pci_cacheline;
557 /* LID mask control */
559 /* Rx Polarity inversion (compensate for ~tx on partner) */
562 /* local link integrity counter */
563 u32 ipath_lli_counter;
564 /* local link integrity errors */
565 u32 ipath_lli_errors;
567 * Above counts only cases where _successive_ LocalLinkIntegrity
568 * errors were seen in the receive headers of kern-packets.
569 * Below are the three (monotonically increasing) counters
570 * maintained via GPIO interrupts on iba6120-rev2.
572 u32 ipath_rxfc_unsupvl_errs;
573 u32 ipath_overrun_thresh_errs;
576 /* status check work */
577 struct delayed_work status_work;
580 * Not all devices managed by a driver instance are the same
581 * type, so these fields must be per-device.
583 u64 ipath_i_bitsextant;
584 ipath_err_t ipath_e_bitsextant;
585 ipath_err_t ipath_hwe_bitsextant;
588 * Below should be computable from number of ports,
589 * since they are never modified.
591 u32 ipath_i_rcvavail_mask;
592 u32 ipath_i_rcvurg_mask;
595 * Register bits for selecting i2c direction and values, used for
598 u16 ipath_gpio_sda_num;
599 u16 ipath_gpio_scl_num;
603 /* lock for doing RMW of shadows/regs for ExtCtrl and GPIO */
604 spinlock_t ipath_gpio_lock;
606 /* used to override LED behavior */
607 u8 ipath_led_override; /* Substituted for normal value, if non-zero */
608 u16 ipath_led_override_timeoff; /* delta to next timer event */
609 u8 ipath_led_override_vals[2]; /* Alternates per blink-frame */
610 u8 ipath_led_override_phase; /* Just counts, LSB picks from vals[] */
611 atomic_t ipath_led_override_timer_active;
612 /* Used to flash LEDs in override mode */
613 struct timer_list ipath_led_override_timer;
615 /* Support (including locks) for EEPROM logging of errors and time */
616 /* control access to actual counters, timer */
617 spinlock_t ipath_eep_st_lock;
618 /* control high-level access to EEPROM */
619 struct semaphore ipath_eep_sem;
620 /* Below inc'd by ipath_snap_cntrs(), locked by ipath_eep_st_lock */
621 uint64_t ipath_traffic_wds;
622 /* active time is kept in seconds, but logged in hours */
623 atomic_t ipath_active_time;
624 /* Below are nominal shadow of EEPROM, new since last EEPROM update */
625 uint8_t ipath_eep_st_errs[IPATH_EEP_LOG_CNT];
626 uint8_t ipath_eep_st_new_errs[IPATH_EEP_LOG_CNT];
627 uint16_t ipath_eep_hrs;
629 * masks for which bits of errs, hwerrs that cause
630 * each of the counters to increment.
632 struct ipath_eep_log_mask ipath_eep_st_masks[IPATH_EEP_LOG_CNT];
635 /* Private data for file operations */
636 struct ipath_filedata {
637 struct ipath_portdata *pd;
641 extern struct list_head ipath_dev_list;
642 extern spinlock_t ipath_devs_lock;
643 extern struct ipath_devdata *ipath_lookup(int unit);
645 int ipath_init_chip(struct ipath_devdata *, int);
646 int ipath_enable_wc(struct ipath_devdata *dd);
647 void ipath_disable_wc(struct ipath_devdata *dd);
648 int ipath_count_units(int *npresentp, int *nupp, u32 *maxportsp);
649 void ipath_shutdown_device(struct ipath_devdata *);
650 void ipath_clear_freeze(struct ipath_devdata *);
652 struct file_operations;
653 int ipath_cdev_init(int minor, char *name, const struct file_operations *fops,
654 struct cdev **cdevp, struct class_device **class_devp);
655 void ipath_cdev_cleanup(struct cdev **cdevp,
656 struct class_device **class_devp);
658 int ipath_diag_add(struct ipath_devdata *);
659 void ipath_diag_remove(struct ipath_devdata *);
661 extern wait_queue_head_t ipath_state_wait;
663 int ipath_user_add(struct ipath_devdata *dd);
664 void ipath_user_remove(struct ipath_devdata *dd);
666 struct sk_buff *ipath_alloc_skb(struct ipath_devdata *dd, gfp_t);
668 extern int ipath_diag_inuse;
670 irqreturn_t ipath_intr(int irq, void *devid);
671 int ipath_decode_err(char *buf, size_t blen, ipath_err_t err);
672 #if __IPATH_INFO || __IPATH_DBG
673 extern const char *ipath_ibcstatus_str[];
676 /* clean up any per-chip chip-specific stuff */
677 void ipath_chip_cleanup(struct ipath_devdata *);
678 /* clean up any chip type-specific stuff */
679 void ipath_chip_done(void);
681 /* check to see if we have to force ordering for write combining */
682 int ipath_unordered_wc(void);
684 void ipath_disarm_piobufs(struct ipath_devdata *, unsigned first,
686 void ipath_cancel_sends(struct ipath_devdata *);
688 int ipath_create_rcvhdrq(struct ipath_devdata *, struct ipath_portdata *);
689 void ipath_free_pddata(struct ipath_devdata *, struct ipath_portdata *);
691 int ipath_parse_ushort(const char *str, unsigned short *valp);
693 void ipath_kreceive(struct ipath_devdata *);
694 int ipath_setrcvhdrsize(struct ipath_devdata *, unsigned);
695 int ipath_reset_device(int);
696 void ipath_get_faststats(unsigned long);
697 int ipath_set_linkstate(struct ipath_devdata *, u8);
698 int ipath_set_mtu(struct ipath_devdata *, u16);
699 int ipath_set_lid(struct ipath_devdata *, u32, u8);
700 int ipath_set_rx_pol_inv(struct ipath_devdata *dd, u8 new_pol_inv);
702 /* for use in system calls, where we want to know device type, etc. */
703 #define port_fp(fp) ((struct ipath_filedata *)(fp)->private_data)->pd
704 #define subport_fp(fp) \
705 ((struct ipath_filedata *)(fp)->private_data)->subport
706 #define tidcursor_fp(fp) \
707 ((struct ipath_filedata *)(fp)->private_data)->tidcursor
710 * values for ipath_flags
712 /* The chip is up and initted */
713 #define IPATH_INITTED 0x2
714 /* set if any user code has set kr_rcvhdrsize */
715 #define IPATH_RCVHDRSZ_SET 0x4
716 /* The chip is present and valid for accesses */
717 #define IPATH_PRESENT 0x8
718 /* HT link0 is only 8 bits wide, ignore upper byte crc
720 #define IPATH_8BIT_IN_HT0 0x10
721 /* HT link1 is only 8 bits wide, ignore upper byte crc
723 #define IPATH_8BIT_IN_HT1 0x20
724 /* The link is down */
725 #define IPATH_LINKDOWN 0x40
726 /* The link level is up (0x11) */
727 #define IPATH_LINKINIT 0x80
728 /* The link is in the armed (0x21) state */
729 #define IPATH_LINKARMED 0x100
730 /* The link is in the active (0x31) state */
731 #define IPATH_LINKACTIVE 0x200
732 /* link current state is unknown */
733 #define IPATH_LINKUNK 0x400
734 /* no IB cable, or no device on IB cable */
735 #define IPATH_NOCABLE 0x4000
736 /* Supports port zero per packet receive interrupts via
738 #define IPATH_GPIO_INTR 0x8000
739 /* uses the coded 4byte TID, not 8 byte */
740 #define IPATH_4BYTE_TID 0x10000
741 /* packet/word counters are 32 bit, else those 4 counters
743 #define IPATH_32BITCOUNTERS 0x20000
744 /* can miss port0 rx interrupts */
745 #define IPATH_DISABLED 0x80000 /* administratively disabled */
746 /* Use GPIO interrupts for new counters */
747 #define IPATH_GPIO_ERRINTRS 0x100000
749 /* Bits in GPIO for the added interrupts */
750 #define IPATH_GPIO_PORT0_BIT 2
751 #define IPATH_GPIO_RXUVL_BIT 3
752 #define IPATH_GPIO_OVRUN_BIT 4
753 #define IPATH_GPIO_LLI_BIT 5
754 #define IPATH_GPIO_ERRINTR_MASK 0x38
756 /* portdata flag bit offsets */
757 /* waiting for a packet to arrive */
758 #define IPATH_PORT_WAITING_RCV 2
759 /* waiting for a PIO buffer to be available */
760 #define IPATH_PORT_WAITING_PIO 3
761 /* master has not finished initializing */
762 #define IPATH_PORT_MASTER_UNINIT 4
763 /* waiting for an urgent packet to arrive */
764 #define IPATH_PORT_WAITING_URG 5
765 /* waiting for a header overflow */
766 #define IPATH_PORT_WAITING_OVERFLOW 6
768 /* free up any allocated data at closes */
769 void ipath_free_data(struct ipath_portdata *dd);
770 int ipath_waitfor_mdio_cmdready(struct ipath_devdata *);
771 int ipath_waitfor_complete(struct ipath_devdata *, ipath_kreg, u64, u64 *);
772 u32 __iomem *ipath_getpiobuf(struct ipath_devdata *, u32 *);
773 void ipath_init_iba6120_funcs(struct ipath_devdata *);
774 void ipath_init_iba6110_funcs(struct ipath_devdata *);
775 void ipath_get_eeprom_info(struct ipath_devdata *);
776 int ipath_update_eeprom_log(struct ipath_devdata *dd);
777 void ipath_inc_eeprom_err(struct ipath_devdata *dd, u32 eidx, u32 incr);
778 u64 ipath_snap_cntr(struct ipath_devdata *, ipath_creg);
781 * Set LED override, only the two LSBs have "public" meaning, but
782 * any non-zero value substitutes them for the Link and LinkTrain
785 #define IPATH_LED_PHYS 1 /* Physical (linktraining) GREEN LED */
786 #define IPATH_LED_LOG 2 /* Logical (link) YELLOW LED */
787 void ipath_set_led_override(struct ipath_devdata *dd, unsigned int val);
790 * number of words used for protocol header if not set by ipath_userinit();
792 #define IPATH_DFLT_RCVHDRSIZE 9
794 #define IPATH_MDIO_CMD_WRITE 1
795 #define IPATH_MDIO_CMD_READ 2
796 #define IPATH_MDIO_CLD_DIV 25 /* to get 2.5 Mhz mdio clock */
797 #define IPATH_MDIO_CMDVALID 0x40000000 /* bit 30 */
798 #define IPATH_MDIO_DATAVALID 0x80000000 /* bit 31 */
799 #define IPATH_MDIO_CTRL_STD 0x0
801 static inline u64 ipath_mdio_req(int cmd, int dev, int reg, int data)
803 return (((u64) IPATH_MDIO_CLD_DIV) << 32) |
810 /* signal and fifo status, in bank 31 */
811 #define IPATH_MDIO_CTRL_XGXS_REG_8 0x8
812 /* controls loopback, redundancy */
813 #define IPATH_MDIO_CTRL_8355_REG_1 0x10
814 /* premph, encdec, etc. */
815 #define IPATH_MDIO_CTRL_8355_REG_2 0x11
817 #define IPATH_MDIO_CTRL_8355_REG_6 0x15
818 #define IPATH_MDIO_CTRL_8355_REG_9 0x18
819 #define IPATH_MDIO_CTRL_8355_REG_10 0x1D
821 int ipath_get_user_pages(unsigned long, size_t, struct page **);
822 void ipath_release_user_pages(struct page **, size_t);
823 void ipath_release_user_pages_on_close(struct page **, size_t);
824 int ipath_eeprom_read(struct ipath_devdata *, u8, void *, int);
825 int ipath_eeprom_write(struct ipath_devdata *, u8, const void *, int);
827 /* these are used for the registers that vary with port */
828 void ipath_write_kreg_port(const struct ipath_devdata *, ipath_kreg,
832 * We could have a single register get/put routine, that takes a group type,
833 * but this is somewhat clearer and cleaner. It also gives us some error
834 * checking. 64 bit register reads should always work, but are inefficient
835 * on opteron (the northbridge always generates 2 separate HT 32 bit reads),
836 * so we use kreg32 wherever possible. User register and counter register
837 * reads are always 32 bit reads, so only one form of those routines.
841 * At the moment, none of the s-registers are writable, so no
842 * ipath_write_sreg(), and none of the c-registers are writable, so no
843 * ipath_write_creg().
847 * ipath_read_ureg32 - read 32-bit virtualized per-port register
849 * @regno: register number
852 * Return the contents of a register that is virtualized to be per port.
853 * Returns -1 on errors (not distinguishable from valid contents at
854 * runtime; we may add a separate error variable at some point).
856 static inline u32 ipath_read_ureg32(const struct ipath_devdata *dd,
857 ipath_ureg regno, int port)
859 if (!dd->ipath_kregbase || !(dd->ipath_flags & IPATH_PRESENT))
862 return readl(regno + (u64 __iomem *)
863 (dd->ipath_uregbase +
864 (char __iomem *)dd->ipath_kregbase +
865 dd->ipath_palign * port));
869 * ipath_write_ureg - write 32-bit virtualized per-port register
871 * @regno: register number
875 * Write the contents of a register that is virtualized to be per port.
877 static inline void ipath_write_ureg(const struct ipath_devdata *dd,
878 ipath_ureg regno, u64 value, int port)
880 u64 __iomem *ubase = (u64 __iomem *)
881 (dd->ipath_uregbase + (char __iomem *) dd->ipath_kregbase +
882 dd->ipath_palign * port);
883 if (dd->ipath_kregbase)
884 writeq(value, &ubase[regno]);
887 static inline u32 ipath_read_kreg32(const struct ipath_devdata *dd,
890 if (!dd->ipath_kregbase || !(dd->ipath_flags & IPATH_PRESENT))
892 return readl((u32 __iomem *) & dd->ipath_kregbase[regno]);
895 static inline u64 ipath_read_kreg64(const struct ipath_devdata *dd,
898 if (!dd->ipath_kregbase || !(dd->ipath_flags & IPATH_PRESENT))
901 return readq(&dd->ipath_kregbase[regno]);
904 static inline void ipath_write_kreg(const struct ipath_devdata *dd,
905 ipath_kreg regno, u64 value)
907 if (dd->ipath_kregbase)
908 writeq(value, &dd->ipath_kregbase[regno]);
911 static inline u64 ipath_read_creg(const struct ipath_devdata *dd,
914 if (!dd->ipath_kregbase || !(dd->ipath_flags & IPATH_PRESENT))
917 return readq(regno + (u64 __iomem *)
918 (dd->ipath_cregbase +
919 (char __iomem *)dd->ipath_kregbase));
922 static inline u32 ipath_read_creg32(const struct ipath_devdata *dd,
925 if (!dd->ipath_kregbase || !(dd->ipath_flags & IPATH_PRESENT))
927 return readl(regno + (u64 __iomem *)
928 (dd->ipath_cregbase +
929 (char __iomem *)dd->ipath_kregbase));
936 struct device_driver;
938 extern const char ib_ipath_version[];
940 int ipath_driver_create_group(struct device_driver *);
941 void ipath_driver_remove_group(struct device_driver *);
943 int ipath_device_create_group(struct device *, struct ipath_devdata *);
944 void ipath_device_remove_group(struct device *, struct ipath_devdata *);
945 int ipath_expose_reset(struct device *);
947 int ipath_init_ipathfs(void);
948 void ipath_exit_ipathfs(void);
949 int ipathfs_add_device(struct ipath_devdata *);
950 int ipathfs_remove_device(struct ipath_devdata *);
953 * dma_addr wrappers - all 0's invalid for hw
955 dma_addr_t ipath_map_page(struct pci_dev *, struct page *, unsigned long,
957 dma_addr_t ipath_map_single(struct pci_dev *, void *, size_t, int);
960 * Flush write combining store buffers (if present) and perform a write
963 #if defined(CONFIG_X86_64)
964 #define ipath_flush_wc() asm volatile("sfence" ::: "memory")
966 #define ipath_flush_wc() wmb()
969 extern unsigned ipath_debug; /* debugging bit mask */
971 #define IPATH_MAX_PARITY_ATTEMPTS 10000 /* max times to try recovery */
973 const char *ipath_get_unit_name(int unit);
975 extern struct mutex ipath_mutex;
977 #define IPATH_DRV_NAME "ib_ipath"
978 #define IPATH_MAJOR 233
979 #define IPATH_USER_MINOR_BASE 0
980 #define IPATH_DIAGPKT_MINOR 127
981 #define IPATH_DIAG_MINOR_BASE 129
982 #define IPATH_NMINORS 255
984 #define ipath_dev_err(dd,fmt,...) \
986 const struct ipath_devdata *__dd = (dd); \
988 dev_err(&__dd->pcidev->dev, "%s: " fmt, \
989 ipath_get_unit_name(__dd->ipath_unit), \
992 printk(KERN_ERR IPATH_DRV_NAME ": %s: " fmt, \
993 ipath_get_unit_name(__dd->ipath_unit), \
999 # define __IPATH_DBG_WHICH(which,fmt,...) \
1001 if(unlikely(ipath_debug&(which))) \
1002 printk(KERN_DEBUG IPATH_DRV_NAME ": %s: " fmt, \
1003 __func__,##__VA_ARGS__); \
1006 # define ipath_dbg(fmt,...) \
1007 __IPATH_DBG_WHICH(__IPATH_DBG,fmt,##__VA_ARGS__)
1008 # define ipath_cdbg(which,fmt,...) \
1009 __IPATH_DBG_WHICH(__IPATH_##which##DBG,fmt,##__VA_ARGS__)
1011 #else /* ! _IPATH_DEBUGGING */
1013 # define ipath_dbg(fmt,...)
1014 # define ipath_cdbg(which,fmt,...)
1016 #endif /* _IPATH_DEBUGGING */
1019 * this is used for formatting hw error messages...
1021 struct ipath_hwerror_msgs {
1026 #define INFINIPATH_HWE_MSG(a, b) { .mask = INFINIPATH_HWE_##a, .msg = b }
1028 /* in ipath_intr.c... */
1029 void ipath_format_hwerrors(u64 hwerrs,
1030 const struct ipath_hwerror_msgs *hwerrmsgs,
1032 char *msg, size_t lmsg);
1034 #endif /* _IPATH_KERNEL_H */