1 #ifndef _IPATH_KERNEL_H
2 #define _IPATH_KERNEL_H
4 * Copyright (c) 2006, 2007 QLogic Corporation. All rights reserved.
5 * Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved.
7 * This software is available to you under a choice of one of two
8 * licenses. You may choose to be licensed under the terms of the GNU
9 * General Public License (GPL) Version 2, available from the file
10 * COPYING in the main directory of this source tree, or the
11 * OpenIB.org BSD license below:
13 * Redistribution and use in source and binary forms, with or
14 * without modification, are permitted provided that the following
17 * - Redistributions of source code must retain the above
18 * copyright notice, this list of conditions and the following
21 * - Redistributions in binary form must reproduce the above
22 * copyright notice, this list of conditions and the following
23 * disclaimer in the documentation and/or other materials
24 * provided with the distribution.
26 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
27 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
28 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
29 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
30 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
31 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
32 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
37 * This header file is the base header file for infinipath kernel code
38 * ipath_user.h serves a similar purpose for user code.
41 #include <linux/interrupt.h>
42 #include <linux/pci.h>
43 #include <linux/dma-mapping.h>
44 #include <linux/mutex.h>
46 #include <rdma/ib_verbs.h>
48 #include "ipath_common.h"
49 #include "ipath_debug.h"
50 #include "ipath_registers.h"
52 /* only s/w major version of InfiniPath we can handle */
53 #define IPATH_CHIP_VERS_MAJ 2U
55 /* don't care about this except printing */
56 #define IPATH_CHIP_VERS_MIN 0U
58 /* temporary, maybe always */
59 extern struct infinipath_stats ipath_stats;
61 #define IPATH_CHIP_SWVERSION IPATH_CHIP_VERS_MAJ
63 * First-cut critierion for "device is active" is
64 * two thousand dwords combined Tx, Rx traffic per
65 * 5-second interval. SMA packets are 64 dwords,
66 * and occur "a few per second", presumably each way.
68 #define IPATH_TRAFFIC_ACTIVE_THRESHOLD (2000)
70 * Struct used to indicate which errors are logged in each of the
71 * error-counters that are logged to EEPROM. A counter is incremented
72 * _once_ (saturating at 255) for each event with any bits set in
73 * the error or hwerror register masks below.
75 #define IPATH_EEP_LOG_CNT (4)
76 struct ipath_eep_log_mask {
81 struct ipath_portdata {
82 void **port_rcvegrbuf;
83 dma_addr_t *port_rcvegrbuf_phys;
84 /* rcvhdrq base, needs mmap before useful */
86 /* kernel virtual address where hdrqtail is updated */
87 void *port_rcvhdrtail_kvaddr;
89 * temp buffer for expected send setup, allocated at open, instead
92 void *port_tid_pg_list;
93 /* when waiting for rcv or pioavail */
94 wait_queue_head_t port_wait;
96 * rcvegr bufs base, physical, must fit
97 * in 44 bits so 32 bit programs mmap64 44 bit works)
99 dma_addr_t port_rcvegr_phys;
100 /* mmap of hdrq, must fit in 44 bits */
101 dma_addr_t port_rcvhdrq_phys;
102 dma_addr_t port_rcvhdrqtailaddr_phys;
104 * number of opens (including slave subports) on this instance
105 * (ignoring forks, dup, etc. for now)
109 * how much space to leave at start of eager TID entries for
110 * protocol use, on each TID
112 /* instead of calculating it */
114 /* non-zero if port is being shared. */
115 u16 port_subport_cnt;
116 /* non-zero if port is being shared. */
118 /* chip offset of PIO buffers for this port */
120 /* how many alloc_pages() chunks in port_rcvegrbuf_pages */
121 u32 port_rcvegrbuf_chunks;
122 /* how many egrbufs per chunk */
123 u32 port_rcvegrbufs_perchunk;
124 /* order for port_rcvegrbuf_pages */
125 size_t port_rcvegrbuf_size;
126 /* rcvhdrq size (for freeing) */
127 size_t port_rcvhdrq_size;
128 /* next expected TID to check when looking for free */
130 /* next expected TID to check */
131 unsigned long port_flag;
133 unsigned long int_flag;
134 /* WAIT_RCV that timed out, no interrupt */
136 /* WAIT_PIO that timed out, no interrupt */
138 /* WAIT_RCV already happened, no wait */
140 /* WAIT_PIO already happened, no wait */
142 /* total number of rcvhdrqfull errors */
145 * Used to suppress multiple instances of same
146 * port staying stuck at same point.
148 u32 port_lastrcvhdrqtail;
149 /* saved total number of rcvhdrqfull errors for poll edge trigger */
150 u32 port_hdrqfull_poll;
151 /* total number of polled urgent packets */
153 /* saved total number of polled urgent packets for poll edge trigger */
154 u32 port_urgent_poll;
155 /* pid of process using this port */
157 pid_t port_subpid[INFINIPATH_MAX_SUBPORT];
158 /* same size as task_struct .comm[] */
160 /* pkeys set by this use of this port */
162 /* so file ops can get at unit */
163 struct ipath_devdata *port_dd;
164 /* A page of memory for rcvhdrhead, rcvegrhead, rcvegrtail * N */
165 void *subport_uregbase;
166 /* An array of pages for the eager receive buffers * N */
167 void *subport_rcvegrbuf;
168 /* An array of pages for the eager header queue entries * N */
169 void *subport_rcvhdr_base;
170 /* The version of the library which opened this port */
172 /* Bitmask of active slaves */
174 /* Type of packets or conditions we want to poll for */
176 /* port rcvhdrq head offset */
183 * control information for layered drivers
185 struct _ipath_layer {
189 struct ipath_skbinfo {
195 * Possible IB config parameters for ipath_f_get/set_ib_cfg()
197 #define IPATH_IB_CFG_LIDLMC 0 /* Get/set LID (LS16b) and Mask (MS16b) */
198 #define IPATH_IB_CFG_HRTBT 1 /* Get/set Heartbeat off/enable/auto */
199 #define IPATH_IB_HRTBT_ON 3 /* Heartbeat enabled, sent every 100msec */
200 #define IPATH_IB_HRTBT_OFF 0 /* Heartbeat off */
201 #define IPATH_IB_CFG_LWID_ENB 2 /* Get/set allowed Link-width */
202 #define IPATH_IB_CFG_LWID 3 /* Get currently active Link-width */
203 #define IPATH_IB_CFG_SPD_ENB 4 /* Get/set allowed Link speeds */
204 #define IPATH_IB_CFG_SPD 5 /* Get current Link spd */
205 #define IPATH_IB_CFG_RXPOL_ENB 6 /* Get/set Auto-RX-polarity enable */
206 #define IPATH_IB_CFG_LREV_ENB 7 /* Get/set Auto-Lane-reversal enable */
207 #define IPATH_IB_CFG_LINKLATENCY 8 /* Get Auto-Lane-reversal enable */
210 struct ipath_devdata {
211 struct list_head ipath_list;
213 struct ipath_kregs const *ipath_kregs;
214 struct ipath_cregs const *ipath_cregs;
216 /* mem-mapped pointer to base of chip regs */
217 u64 __iomem *ipath_kregbase;
218 /* end of mem-mapped chip space; range checking */
219 u64 __iomem *ipath_kregend;
220 /* physical address of chip for io_remap, etc. */
221 unsigned long ipath_physaddr;
222 /* base of memory alloced for ipath_kregbase, for free */
223 u64 *ipath_kregalloc;
225 * virtual address where port0 rcvhdrqtail updated for this unit.
226 * only written to by the chip, not the driver.
228 volatile __le64 *ipath_hdrqtailptr;
229 /* ipath_cfgports pointers */
230 struct ipath_portdata **ipath_pd;
231 /* sk_buffs used by port 0 eager receive queue */
232 struct ipath_skbinfo *ipath_port0_skbinfo;
233 /* kvirt address of 1st 2k pio buffer */
234 void __iomem *ipath_pio2kbase;
235 /* kvirt address of 1st 4k pio buffer */
236 void __iomem *ipath_pio4kbase;
238 * points to area where PIOavail registers will be DMA'ed.
239 * Has to be on a page of it's own, because the page will be
240 * mapped into user program space. This copy is *ONLY* ever
241 * written by DMA, not by the driver! Need a copy per device
242 * when we get to multiple devices
244 volatile __le64 *ipath_pioavailregs_dma;
245 /* physical address where updates occur */
246 dma_addr_t ipath_pioavailregs_phys;
247 struct _ipath_layer ipath_layer;
249 int (*ipath_f_intrsetup)(struct ipath_devdata *);
250 /* fallback to alternate interrupt type if possible */
251 int (*ipath_f_intr_fallback)(struct ipath_devdata *);
252 /* setup on-chip bus config */
253 int (*ipath_f_bus)(struct ipath_devdata *, struct pci_dev *);
254 /* hard reset chip */
255 int (*ipath_f_reset)(struct ipath_devdata *);
256 int (*ipath_f_get_boardname)(struct ipath_devdata *, char *,
258 void (*ipath_f_init_hwerrors)(struct ipath_devdata *);
259 void (*ipath_f_handle_hwerrors)(struct ipath_devdata *, char *,
261 void (*ipath_f_quiet_serdes)(struct ipath_devdata *);
262 int (*ipath_f_bringup_serdes)(struct ipath_devdata *);
263 int (*ipath_f_early_init)(struct ipath_devdata *);
264 void (*ipath_f_clear_tids)(struct ipath_devdata *, unsigned);
265 void (*ipath_f_put_tid)(struct ipath_devdata *, u64 __iomem*,
267 void (*ipath_f_tidtemplate)(struct ipath_devdata *);
268 void (*ipath_f_cleanup)(struct ipath_devdata *);
269 void (*ipath_f_setextled)(struct ipath_devdata *, u64, u64);
270 /* fill out chip-specific fields */
271 int (*ipath_f_get_base_info)(struct ipath_portdata *, void *);
273 void (*ipath_f_free_irq)(struct ipath_devdata *);
274 struct ipath_message_header *(*ipath_f_get_msgheader)
275 (struct ipath_devdata *, __le32 *);
276 void (*ipath_f_config_ports)(struct ipath_devdata *, ushort);
277 int (*ipath_f_get_ib_cfg)(struct ipath_devdata *, int);
278 int (*ipath_f_set_ib_cfg)(struct ipath_devdata *, int, u32);
279 void (*ipath_f_config_jint)(struct ipath_devdata *, u16 , u16);
280 void (*ipath_f_read_counters)(struct ipath_devdata *,
281 struct infinipath_counters *);
282 void (*ipath_f_xgxs_reset)(struct ipath_devdata *);
283 /* per chip actions needed for IB Link up/down changes */
284 int (*ipath_f_ib_updown)(struct ipath_devdata *, int, u64);
286 struct ipath_ibdev *verbs_dev;
287 struct timer_list verbs_timer;
288 /* total dwords sent (summed from counter) */
290 /* total dwords rcvd (summed from counter) */
292 /* total packets sent (summed from counter) */
294 /* total packets rcvd (summed from counter) */
296 /* ipath_statusp initially points to this. */
298 /* GUID for this interface, in network order */
301 * aggregrate of error bits reported since last cleared, for
302 * limiting of error reporting
304 ipath_err_t ipath_lasterror;
306 * aggregrate of error bits reported since last cleared, for
307 * limiting of hwerror reporting
309 ipath_err_t ipath_lasthwerror;
310 /* errors masked because they occur too fast */
311 ipath_err_t ipath_maskederrs;
312 u64 ipath_lastlinkrecov; /* link recoveries at last ACTIVE */
313 /* time in jiffies at which to re-enable maskederrs */
314 unsigned long ipath_unmasktime;
315 /* count of egrfull errors, combined for all ports */
316 u64 ipath_last_tidfull;
317 /* for ipath_qcheck() */
318 u64 ipath_lastport0rcv_cnt;
319 /* template for writing TIDs */
320 u64 ipath_tidtemplate;
321 /* value to write to free TIDs */
322 u64 ipath_tidinvalid;
323 /* IBA6120 rcv interrupt setup */
324 u64 ipath_rhdrhead_intr_off;
326 /* size of memory at ipath_kregbase */
328 /* number of registers used for pioavail */
330 /* IPATH_POLL, etc. */
332 /* ipath_flags driver is waiting for */
333 u32 ipath_state_wanted;
334 /* last buffer for user use, first buf for kernel use is this
336 u32 ipath_lastport_piobuf;
337 /* is a stats timer active */
338 u32 ipath_stats_timer_active;
339 /* number of interrupts for this device -- saturates... */
340 u32 ipath_int_counter;
341 /* dwords sent read from counter */
343 /* dwords received read from counter */
345 /* sent packets read from counter */
347 /* received packets read from counter */
349 /* pio bufs allocated per port */
352 * number of ports configured as max; zero is set to number chip
353 * supports, less gives more pio bufs/port, etc.
356 /* count of port 0 hdrqfull errors */
357 u32 ipath_p0_hdrqfull;
358 /* port 0 number of receive eager buffers */
359 u32 ipath_p0_rcvegrcnt;
362 * index of last piobuffer we used. Speeds up searching, by
363 * starting at this point. Doesn't matter if multiple cpu's use and
364 * update, last updater is only write that matters. Whenever it
365 * wraps, we update shadow copies. Need a copy per device when we
366 * get to multiple devices
368 u32 ipath_lastpioindex;
369 /* max length of freezemsg */
372 * consecutive times we wanted a PIO buffer but were unable to
375 u32 ipath_consec_nopiobuf;
377 * hint that we should update ipath_pioavailshadow before
378 * looking for a PIO buffer
380 u32 ipath_upd_pio_shadow;
381 /* so we can rewrite it after a chip reset */
383 /* so we can rewrite it after a chip reset */
386 /* interrupt number */
388 /* HT/PCI Vendor ID (here for NodeInfo) */
390 /* HT/PCI Device ID (here for NodeInfo) */
392 /* offset in HT config space of slave/primary interface block */
393 u8 ipath_ht_slave_off;
394 /* for write combining settings */
395 unsigned long ipath_wc_cookie;
396 unsigned long ipath_wc_base;
397 unsigned long ipath_wc_len;
398 /* ref count for each pkey */
399 atomic_t ipath_pkeyrefs[4];
400 /* shadow copy of struct page *'s for exp tid pages */
401 struct page **ipath_pageshadow;
402 /* shadow copy of dma handles for exp tid pages */
403 dma_addr_t *ipath_physshadow;
404 u64 __iomem *ipath_egrtidbase;
405 /* lock to workaround chip bug 9437 and others */
406 spinlock_t ipath_kernel_tid_lock;
407 spinlock_t ipath_tid_lock;
408 spinlock_t ipath_sendctrl_lock;
412 * this address is mapped readonly into user processes so they can
413 * get status cheaply, whenever they want.
416 /* freeze msg if hw error put chip in freeze */
417 char *ipath_freezemsg;
418 /* pci access data structure */
419 struct pci_dev *pcidev;
420 struct cdev *user_cdev;
421 struct cdev *diag_cdev;
422 struct class_device *user_class_dev;
423 struct class_device *diag_class_dev;
424 /* timer used to prevent stats overflow, error throttling, etc. */
425 struct timer_list ipath_stats_timer;
426 void *ipath_dummy_hdrq; /* used after port close */
427 dma_addr_t ipath_dummy_hdrq_phys;
429 unsigned long ipath_ureg_align; /* user register alignment */
431 /* HoL blocking / user app forward-progress state */
432 unsigned ipath_hol_state;
433 unsigned ipath_hol_next;
434 struct timer_list ipath_hol_timer;
437 * Shadow copies of registers; size indicates read access size.
438 * Most of them are readonly, but some are write-only register,
439 * where we manipulate the bits in the shadow copy, and then write
440 * the shadow copy to infinipath.
442 * We deliberately make most of these 32 bits, since they have
443 * restricted range. For any that we read, we won't to generate 32
444 * bit accesses, since Opteron will generate 2 separate 32 bit HT
445 * transactions for a 64 bit read, and we want to avoid unnecessary
449 /* This is the 64 bit group */
452 * shadow of pioavail, check to be sure it's large enough at
455 unsigned long ipath_pioavailshadow[8];
456 /* shadow of kr_gpio_out, for rmw ops */
458 /* shadow the gpio mask register */
460 /* shadow the gpio output enable, etc... */
462 /* kr_revision shadow */
465 * shadow of ibcctrl, for interrupt handling of link changes,
470 * last ibcstatus, to suppress "duplicate" status change messages,
473 u64 ipath_lastibcstat;
474 /* hwerrmask shadow */
475 ipath_err_t ipath_hwerrmask;
476 ipath_err_t ipath_errormask; /* errormask shadow */
477 /* interrupt config reg shadow */
479 /* kr_sendpiobufbase value */
480 u64 ipath_piobufbase;
482 /* these are the "32 bit" regs */
485 * number of GUIDs in the flash for this interface; may need some
486 * rethinking for setting on other ifaces
490 * the following two are 32-bit bitmasks, but {test,clear,set}_bit
491 * all expect bit fields to be "unsigned long"
493 /* shadow kr_rcvctrl */
494 unsigned long ipath_rcvctrl;
495 /* shadow kr_sendctrl */
496 unsigned long ipath_sendctrl;
497 unsigned long ipath_lastcancel; /* to not count armlaunch after cancel */
499 /* value we put in kr_rcvhdrcnt */
501 /* value we put in kr_rcvhdrsize */
502 u32 ipath_rcvhdrsize;
503 /* value we put in kr_rcvhdrentsize */
504 u32 ipath_rcvhdrentsize;
505 /* offset of last entry in rcvhdrq */
507 /* kr_portcnt value */
509 /* kr_pagealign value */
511 /* number of "2KB" PIO buffers */
513 /* size in bytes of "2KB" PIO buffers */
515 /* number of "4KB" PIO buffers */
517 /* size in bytes of "4KB" PIO buffers */
519 /* kr_rcvegrbase value */
520 u32 ipath_rcvegrbase;
521 /* kr_rcvegrcnt value */
523 /* kr_rcvtidbase value */
524 u32 ipath_rcvtidbase;
525 /* kr_rcvtidcnt value */
531 /* kr_counterregbase */
533 /* shadow the control register contents */
535 /* PCI revision register (HTC rev on FPGA) */
538 /* chip address space used by 4k pio buffers */
540 /* The MTU programmed for this unit */
543 * The max size IB packet, included IB headers that we can send.
544 * Starts same as ipath_piosize, but is affected when ibmtu is
545 * changed, or by size of eager buffers
549 * ibmaxlen at init time, limited by chip and by receive buffer
550 * size. Not changed after init.
552 u32 ipath_init_ibmaxlen;
553 /* size of each rcvegrbuffer */
554 u32 ipath_rcvegrbufsize;
555 /* localbus width (1, 2,4,8,16,32) from config space */
556 u32 ipath_lbus_width;
557 /* localbus speed (HT: 200,400,800,1000; PCIe 2500) */
558 u32 ipath_lbus_speed;
560 * number of sequential ibcstatus change for polling active/quiet
561 * (i.e., link not coming up).
564 /* low and high portions of MSI capability/vector */
566 /* saved after PCIe init for restore after reset */
568 /* MSI data (vector) saved for restore */
570 /* MLID programmed for this instance */
572 /* LID programmed for this instance */
574 /* list of pkeys programmed; 0 if not set */
577 * ASCII serial number, from flash, large enough for original
578 * all digit strings, and longer QLogic serial number format
581 /* human readable board version */
582 u8 ipath_boardversion[80];
583 u8 ipath_lbus_info[32]; /* human readable localbus info */
584 /* chip major rev, from ipath_revision */
586 /* chip minor rev, from ipath_revision */
588 /* board rev, from ipath_revision */
591 u8 ipath_r_portenable_shift;
592 u8 ipath_r_intravail_shift;
593 u8 ipath_r_tailupd_shift;
594 u8 ipath_r_portcfg_shift;
596 /* unit # of this chip, if present */
598 /* saved for restore after reset */
599 u8 ipath_pci_cacheline;
600 /* LID mask control */
602 /* link width supported */
603 u8 ipath_link_width_supported;
604 /* link speed supported */
605 u8 ipath_link_speed_supported;
606 u8 ipath_link_width_enabled;
607 u8 ipath_link_speed_enabled;
608 u8 ipath_link_width_active;
609 u8 ipath_link_speed_active;
610 /* Rx Polarity inversion (compensate for ~tx on partner) */
613 /* local link integrity counter */
614 u32 ipath_lli_counter;
615 /* local link integrity errors */
616 u32 ipath_lli_errors;
618 * Above counts only cases where _successive_ LocalLinkIntegrity
619 * errors were seen in the receive headers of kern-packets.
620 * Below are the three (monotonically increasing) counters
621 * maintained via GPIO interrupts on iba6120-rev2.
623 u32 ipath_rxfc_unsupvl_errs;
624 u32 ipath_overrun_thresh_errs;
627 /* status check work */
628 struct delayed_work status_work;
631 * Not all devices managed by a driver instance are the same
632 * type, so these fields must be per-device.
634 u64 ipath_i_bitsextant;
635 ipath_err_t ipath_e_bitsextant;
636 ipath_err_t ipath_hwe_bitsextant;
639 * Below should be computable from number of ports,
640 * since they are never modified.
642 u32 ipath_i_rcvavail_mask;
643 u32 ipath_i_rcvurg_mask;
644 u16 ipath_i_rcvurg_shift;
645 u16 ipath_i_rcvavail_shift;
648 * Register bits for selecting i2c direction and values, used for
651 u16 ipath_gpio_sda_num;
652 u16 ipath_gpio_scl_num;
656 /* lock for doing RMW of shadows/regs for ExtCtrl and GPIO */
657 spinlock_t ipath_gpio_lock;
660 * IB link and linktraining states and masks that vary per chip in
661 * some way. Set at init, to avoid each IB status change interrupt
670 u16 ipath_rhf_offset; /* offset of RHF within receive header entry */
673 * shift/mask for linkcmd, linkinitcmd, maxpktlen in ibccontol
674 * reg. Changes for IBA7220
676 u8 ibcc_lic_mask; /* LinkInitCmd */
677 u8 ibcc_lc_shift; /* LinkCmd */
678 u8 ibcc_mpl_shift; /* Maxpktlen */
682 /* used to override LED behavior */
683 u8 ipath_led_override; /* Substituted for normal value, if non-zero */
684 u16 ipath_led_override_timeoff; /* delta to next timer event */
685 u8 ipath_led_override_vals[2]; /* Alternates per blink-frame */
686 u8 ipath_led_override_phase; /* Just counts, LSB picks from vals[] */
687 atomic_t ipath_led_override_timer_active;
688 /* Used to flash LEDs in override mode */
689 struct timer_list ipath_led_override_timer;
691 /* Support (including locks) for EEPROM logging of errors and time */
692 /* control access to actual counters, timer */
693 spinlock_t ipath_eep_st_lock;
694 /* control high-level access to EEPROM */
695 struct mutex ipath_eep_lock;
696 /* Below inc'd by ipath_snap_cntrs(), locked by ipath_eep_st_lock */
697 uint64_t ipath_traffic_wds;
698 /* active time is kept in seconds, but logged in hours */
699 atomic_t ipath_active_time;
700 /* Below are nominal shadow of EEPROM, new since last EEPROM update */
701 uint8_t ipath_eep_st_errs[IPATH_EEP_LOG_CNT];
702 uint8_t ipath_eep_st_new_errs[IPATH_EEP_LOG_CNT];
703 uint16_t ipath_eep_hrs;
705 * masks for which bits of errs, hwerrs that cause
706 * each of the counters to increment.
708 struct ipath_eep_log_mask ipath_eep_st_masks[IPATH_EEP_LOG_CNT];
710 /* interrupt mitigation reload register info */
711 u16 ipath_jint_idle_ticks; /* idle clock ticks */
712 u16 ipath_jint_max_packets; /* max packets across all ports */
715 /* ipath_hol_state values (stopping/starting user proc, send flushing) */
716 #define IPATH_HOL_UP 0
717 #define IPATH_HOL_DOWN 1
718 /* ipath_hol_next toggle values, used when hol_state IPATH_HOL_DOWN */
719 #define IPATH_HOL_DOWNSTOP 0
720 #define IPATH_HOL_DOWNCONT 1
722 /* Private data for file operations */
723 struct ipath_filedata {
724 struct ipath_portdata *pd;
728 extern struct list_head ipath_dev_list;
729 extern spinlock_t ipath_devs_lock;
730 extern struct ipath_devdata *ipath_lookup(int unit);
732 int ipath_init_chip(struct ipath_devdata *, int);
733 int ipath_enable_wc(struct ipath_devdata *dd);
734 void ipath_disable_wc(struct ipath_devdata *dd);
735 int ipath_count_units(int *npresentp, int *nupp, int *maxportsp);
736 void ipath_shutdown_device(struct ipath_devdata *);
737 void ipath_clear_freeze(struct ipath_devdata *);
739 struct file_operations;
740 int ipath_cdev_init(int minor, char *name, const struct file_operations *fops,
741 struct cdev **cdevp, struct class_device **class_devp);
742 void ipath_cdev_cleanup(struct cdev **cdevp,
743 struct class_device **class_devp);
745 int ipath_diag_add(struct ipath_devdata *);
746 void ipath_diag_remove(struct ipath_devdata *);
748 extern wait_queue_head_t ipath_state_wait;
750 int ipath_user_add(struct ipath_devdata *dd);
751 void ipath_user_remove(struct ipath_devdata *dd);
753 struct sk_buff *ipath_alloc_skb(struct ipath_devdata *dd, gfp_t);
755 extern int ipath_diag_inuse;
757 irqreturn_t ipath_intr(int irq, void *devid);
758 int ipath_decode_err(char *buf, size_t blen, ipath_err_t err);
759 #if __IPATH_INFO || __IPATH_DBG
760 extern const char *ipath_ibcstatus_str[];
763 /* clean up any per-chip chip-specific stuff */
764 void ipath_chip_cleanup(struct ipath_devdata *);
765 /* clean up any chip type-specific stuff */
766 void ipath_chip_done(void);
768 /* check to see if we have to force ordering for write combining */
769 int ipath_unordered_wc(void);
771 void ipath_disarm_piobufs(struct ipath_devdata *, unsigned first,
773 void ipath_cancel_sends(struct ipath_devdata *, int);
775 int ipath_create_rcvhdrq(struct ipath_devdata *, struct ipath_portdata *);
776 void ipath_free_pddata(struct ipath_devdata *, struct ipath_portdata *);
778 int ipath_parse_ushort(const char *str, unsigned short *valp);
780 void ipath_kreceive(struct ipath_portdata *);
781 int ipath_setrcvhdrsize(struct ipath_devdata *, unsigned);
782 int ipath_reset_device(int);
783 void ipath_get_faststats(unsigned long);
784 int ipath_wait_linkstate(struct ipath_devdata *, u32, int);
785 int ipath_set_linkstate(struct ipath_devdata *, u8);
786 int ipath_set_mtu(struct ipath_devdata *, u16);
787 int ipath_set_lid(struct ipath_devdata *, u32, u8);
788 int ipath_set_rx_pol_inv(struct ipath_devdata *dd, u8 new_pol_inv);
789 void ipath_enable_armlaunch(struct ipath_devdata *);
790 void ipath_disable_armlaunch(struct ipath_devdata *);
791 void ipath_hol_down(struct ipath_devdata *);
792 void ipath_hol_up(struct ipath_devdata *);
793 void ipath_hol_event(unsigned long);
795 /* for use in system calls, where we want to know device type, etc. */
796 #define port_fp(fp) ((struct ipath_filedata *)(fp)->private_data)->pd
797 #define subport_fp(fp) \
798 ((struct ipath_filedata *)(fp)->private_data)->subport
799 #define tidcursor_fp(fp) \
800 ((struct ipath_filedata *)(fp)->private_data)->tidcursor
803 * values for ipath_flags
805 /* chip can report link latency (IB 1.2) */
806 #define IPATH_HAS_LINK_LATENCY 0x1
807 /* The chip is up and initted */
808 #define IPATH_INITTED 0x2
809 /* set if any user code has set kr_rcvhdrsize */
810 #define IPATH_RCVHDRSZ_SET 0x4
811 /* The chip is present and valid for accesses */
812 #define IPATH_PRESENT 0x8
813 /* HT link0 is only 8 bits wide, ignore upper byte crc
815 #define IPATH_8BIT_IN_HT0 0x10
816 /* HT link1 is only 8 bits wide, ignore upper byte crc
818 #define IPATH_8BIT_IN_HT1 0x20
819 /* The link is down */
820 #define IPATH_LINKDOWN 0x40
821 /* The link level is up (0x11) */
822 #define IPATH_LINKINIT 0x80
823 /* The link is in the armed (0x21) state */
824 #define IPATH_LINKARMED 0x100
825 /* The link is in the active (0x31) state */
826 #define IPATH_LINKACTIVE 0x200
827 /* link current state is unknown */
828 #define IPATH_LINKUNK 0x400
829 /* Write combining flush needed for PIO */
830 #define IPATH_PIO_FLUSH_WC 0x1000
831 /* no IB cable, or no device on IB cable */
832 #define IPATH_NOCABLE 0x4000
833 /* Supports port zero per packet receive interrupts via
835 #define IPATH_GPIO_INTR 0x8000
836 /* uses the coded 4byte TID, not 8 byte */
837 #define IPATH_4BYTE_TID 0x10000
838 /* packet/word counters are 32 bit, else those 4 counters
840 #define IPATH_32BITCOUNTERS 0x20000
841 /* can miss port0 rx interrupts */
842 /* Interrupt register is 64 bits */
843 #define IPATH_INTREG_64 0x40000
844 #define IPATH_DISABLED 0x80000 /* administratively disabled */
845 /* Use GPIO interrupts for new counters */
846 #define IPATH_GPIO_ERRINTRS 0x100000
847 #define IPATH_SWAP_PIOBUFS 0x200000
848 /* Suppress heartbeat, even if turning off loopback */
849 #define IPATH_NO_HRTBT 0x1000000
850 #define IPATH_HAS_MULT_IB_SPEED 0x8000000
851 #define IPATH_IB_FORCE_NOTIFY 0x80000000 /* force notify on next ib change */
853 /* Bits in GPIO for the added interrupts */
854 #define IPATH_GPIO_PORT0_BIT 2
855 #define IPATH_GPIO_RXUVL_BIT 3
856 #define IPATH_GPIO_OVRUN_BIT 4
857 #define IPATH_GPIO_LLI_BIT 5
858 #define IPATH_GPIO_ERRINTR_MASK 0x38
860 /* portdata flag bit offsets */
861 /* waiting for a packet to arrive */
862 #define IPATH_PORT_WAITING_RCV 2
863 /* master has not finished initializing */
864 #define IPATH_PORT_MASTER_UNINIT 4
865 /* waiting for an urgent packet to arrive */
866 #define IPATH_PORT_WAITING_URG 5
868 /* free up any allocated data at closes */
869 void ipath_free_data(struct ipath_portdata *dd);
870 u32 __iomem *ipath_getpiobuf(struct ipath_devdata *, u32 *);
871 void ipath_init_iba6120_funcs(struct ipath_devdata *);
872 void ipath_init_iba6110_funcs(struct ipath_devdata *);
873 void ipath_get_eeprom_info(struct ipath_devdata *);
874 int ipath_update_eeprom_log(struct ipath_devdata *dd);
875 void ipath_inc_eeprom_err(struct ipath_devdata *dd, u32 eidx, u32 incr);
876 u64 ipath_snap_cntr(struct ipath_devdata *, ipath_creg);
877 void signal_ib_event(struct ipath_devdata *dd, enum ib_event_type ev);
880 * Set LED override, only the two LSBs have "public" meaning, but
881 * any non-zero value substitutes them for the Link and LinkTrain
884 #define IPATH_LED_PHYS 1 /* Physical (linktraining) GREEN LED */
885 #define IPATH_LED_LOG 2 /* Logical (link) YELLOW LED */
886 void ipath_set_led_override(struct ipath_devdata *dd, unsigned int val);
889 * number of words used for protocol header if not set by ipath_userinit();
891 #define IPATH_DFLT_RCVHDRSIZE 9
893 int ipath_get_user_pages(unsigned long, size_t, struct page **);
894 void ipath_release_user_pages(struct page **, size_t);
895 void ipath_release_user_pages_on_close(struct page **, size_t);
896 int ipath_eeprom_read(struct ipath_devdata *, u8, void *, int);
897 int ipath_eeprom_write(struct ipath_devdata *, u8, const void *, int);
899 /* these are used for the registers that vary with port */
900 void ipath_write_kreg_port(const struct ipath_devdata *, ipath_kreg,
904 * We could have a single register get/put routine, that takes a group type,
905 * but this is somewhat clearer and cleaner. It also gives us some error
906 * checking. 64 bit register reads should always work, but are inefficient
907 * on opteron (the northbridge always generates 2 separate HT 32 bit reads),
908 * so we use kreg32 wherever possible. User register and counter register
909 * reads are always 32 bit reads, so only one form of those routines.
913 * At the moment, none of the s-registers are writable, so no
914 * ipath_write_sreg(), and none of the c-registers are writable, so no
915 * ipath_write_creg().
919 * ipath_read_ureg32 - read 32-bit virtualized per-port register
921 * @regno: register number
924 * Return the contents of a register that is virtualized to be per port.
925 * Returns -1 on errors (not distinguishable from valid contents at
926 * runtime; we may add a separate error variable at some point).
928 static inline u32 ipath_read_ureg32(const struct ipath_devdata *dd,
929 ipath_ureg regno, int port)
931 if (!dd->ipath_kregbase || !(dd->ipath_flags & IPATH_PRESENT))
934 return readl(regno + (u64 __iomem *)
935 (dd->ipath_uregbase +
936 (char __iomem *)dd->ipath_kregbase +
937 dd->ipath_ureg_align * port));
941 * ipath_write_ureg - write 32-bit virtualized per-port register
943 * @regno: register number
947 * Write the contents of a register that is virtualized to be per port.
949 static inline void ipath_write_ureg(const struct ipath_devdata *dd,
950 ipath_ureg regno, u64 value, int port)
952 u64 __iomem *ubase = (u64 __iomem *)
953 (dd->ipath_uregbase + (char __iomem *) dd->ipath_kregbase +
954 dd->ipath_ureg_align * port);
955 if (dd->ipath_kregbase)
956 writeq(value, &ubase[regno]);
959 static inline u32 ipath_read_kreg32(const struct ipath_devdata *dd,
962 if (!dd->ipath_kregbase || !(dd->ipath_flags & IPATH_PRESENT))
964 return readl((u32 __iomem *) & dd->ipath_kregbase[regno]);
967 static inline u64 ipath_read_kreg64(const struct ipath_devdata *dd,
970 if (!dd->ipath_kregbase || !(dd->ipath_flags & IPATH_PRESENT))
973 return readq(&dd->ipath_kregbase[regno]);
976 static inline void ipath_write_kreg(const struct ipath_devdata *dd,
977 ipath_kreg regno, u64 value)
979 if (dd->ipath_kregbase)
980 writeq(value, &dd->ipath_kregbase[regno]);
983 static inline u64 ipath_read_creg(const struct ipath_devdata *dd,
986 if (!dd->ipath_kregbase || !(dd->ipath_flags & IPATH_PRESENT))
989 return readq(regno + (u64 __iomem *)
990 (dd->ipath_cregbase +
991 (char __iomem *)dd->ipath_kregbase));
994 static inline u32 ipath_read_creg32(const struct ipath_devdata *dd,
997 if (!dd->ipath_kregbase || !(dd->ipath_flags & IPATH_PRESENT))
999 return readl(regno + (u64 __iomem *)
1000 (dd->ipath_cregbase +
1001 (char __iomem *)dd->ipath_kregbase));
1004 static inline void ipath_write_creg(const struct ipath_devdata *dd,
1005 ipath_creg regno, u64 value)
1007 if (dd->ipath_kregbase)
1008 writeq(value, regno + (u64 __iomem *)
1009 (dd->ipath_cregbase +
1010 (char __iomem *)dd->ipath_kregbase));
1013 static inline void ipath_clear_rcvhdrtail(const struct ipath_portdata *pd)
1015 *((u64 *) pd->port_rcvhdrtail_kvaddr) = 0ULL;
1018 static inline u32 ipath_get_rcvhdrtail(const struct ipath_portdata *pd)
1020 return (u32) le64_to_cpu(*((volatile __le64 *)
1021 pd->port_rcvhdrtail_kvaddr));
1024 static inline u64 ipath_read_ireg(const struct ipath_devdata *dd, ipath_kreg r)
1026 return (dd->ipath_flags & IPATH_INTREG_64) ?
1027 ipath_read_kreg64(dd, r) : ipath_read_kreg32(dd, r);
1031 * from contents of IBCStatus (or a saved copy), return linkstate
1032 * Report ACTIVE_DEFER as ACTIVE, because we treat them the same
1033 * everywhere, anyway (and should be, for almost all purposes).
1035 static inline u32 ipath_ib_linkstate(struct ipath_devdata *dd, u64 ibcs)
1037 u32 state = (u32)(ibcs >> dd->ibcs_ls_shift) &
1038 INFINIPATH_IBCS_LINKSTATE_MASK;
1039 if (state == INFINIPATH_IBCS_L_STATE_ACT_DEFER)
1040 state = INFINIPATH_IBCS_L_STATE_ACTIVE;
1044 /* from contents of IBCStatus (or a saved copy), return linktrainingstate */
1045 static inline u32 ipath_ib_linktrstate(struct ipath_devdata *dd, u64 ibcs)
1047 return (u32)(ibcs >> INFINIPATH_IBCS_LINKTRAININGSTATE_SHIFT) &
1052 * from contents of IBCStatus (or a saved copy), return logical link state
1053 * combination of link state and linktraining state (down, active, init,
1056 static inline u32 ipath_ib_state(struct ipath_devdata *dd, u64 ibcs)
1059 ibs = (u32)(ibcs >> INFINIPATH_IBCS_LINKTRAININGSTATE_SHIFT) &
1062 (INFINIPATH_IBCS_LINKSTATE_MASK << dd->ibcs_ls_shift));
1070 struct device_driver;
1072 extern const char ib_ipath_version[];
1074 extern struct attribute_group *ipath_driver_attr_groups[];
1076 int ipath_device_create_group(struct device *, struct ipath_devdata *);
1077 void ipath_device_remove_group(struct device *, struct ipath_devdata *);
1078 int ipath_expose_reset(struct device *);
1080 int ipath_init_ipathfs(void);
1081 void ipath_exit_ipathfs(void);
1082 int ipathfs_add_device(struct ipath_devdata *);
1083 int ipathfs_remove_device(struct ipath_devdata *);
1086 * dma_addr wrappers - all 0's invalid for hw
1088 dma_addr_t ipath_map_page(struct pci_dev *, struct page *, unsigned long,
1090 dma_addr_t ipath_map_single(struct pci_dev *, void *, size_t, int);
1093 * Flush write combining store buffers (if present) and perform a write
1096 #if defined(CONFIG_X86_64)
1097 #define ipath_flush_wc() asm volatile("sfence" ::: "memory")
1099 #define ipath_flush_wc() wmb()
1102 extern unsigned ipath_debug; /* debugging bit mask */
1103 extern unsigned ipath_linkrecovery;
1104 extern unsigned ipath_mtu4096;
1106 #define IPATH_MAX_PARITY_ATTEMPTS 10000 /* max times to try recovery */
1108 const char *ipath_get_unit_name(int unit);
1110 extern struct mutex ipath_mutex;
1112 #define IPATH_DRV_NAME "ib_ipath"
1113 #define IPATH_MAJOR 233
1114 #define IPATH_USER_MINOR_BASE 0
1115 #define IPATH_DIAGPKT_MINOR 127
1116 #define IPATH_DIAG_MINOR_BASE 129
1117 #define IPATH_NMINORS 255
1119 #define ipath_dev_err(dd,fmt,...) \
1121 const struct ipath_devdata *__dd = (dd); \
1123 dev_err(&__dd->pcidev->dev, "%s: " fmt, \
1124 ipath_get_unit_name(__dd->ipath_unit), \
1127 printk(KERN_ERR IPATH_DRV_NAME ": %s: " fmt, \
1128 ipath_get_unit_name(__dd->ipath_unit), \
1132 #if _IPATH_DEBUGGING
1134 # define __IPATH_DBG_WHICH(which,fmt,...) \
1136 if(unlikely(ipath_debug&(which))) \
1137 printk(KERN_DEBUG IPATH_DRV_NAME ": %s: " fmt, \
1138 __func__,##__VA_ARGS__); \
1141 # define ipath_dbg(fmt,...) \
1142 __IPATH_DBG_WHICH(__IPATH_DBG,fmt,##__VA_ARGS__)
1143 # define ipath_cdbg(which,fmt,...) \
1144 __IPATH_DBG_WHICH(__IPATH_##which##DBG,fmt,##__VA_ARGS__)
1146 #else /* ! _IPATH_DEBUGGING */
1148 # define ipath_dbg(fmt,...)
1149 # define ipath_cdbg(which,fmt,...)
1151 #endif /* _IPATH_DEBUGGING */
1154 * this is used for formatting hw error messages...
1156 struct ipath_hwerror_msgs {
1161 #define INFINIPATH_HWE_MSG(a, b) { .mask = INFINIPATH_HWE_##a, .msg = b }
1163 /* in ipath_intr.c... */
1164 void ipath_format_hwerrors(u64 hwerrs,
1165 const struct ipath_hwerror_msgs *hwerrmsgs,
1167 char *msg, size_t lmsg);
1169 #endif /* _IPATH_KERNEL_H */