2 * video1394.c - video driver for OHCI 1394 boards
3 * Copyright (C)1999,2000 Sebastien Rougeaux <sebastien.rougeaux@anu.edu.au>
4 * Peter Schlaile <udbz@rz.uni-karlsruhe.de>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software Foundation,
18 * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
22 * jds -- add private data to file to keep track of iso contexts associated
23 * with each open -- so release won't kill all iso transfers.
25 * Damien Douxchamps: Fix failure when the number of DMA pages per frame is
29 * EFAULT is only for invalid address for the argp
30 * EINVAL for out of range values
31 * EBUSY when trying to use an already used resource
32 * ESRCH when trying to free/stop a not used resource
33 * EAGAIN for resource allocation failure that could perhaps succeed later
34 * ENOTTY for unsupported ioctl request
38 /* Markus Tavenrath <speedygoo@speedygoo.de> :
39 - fixed checks for valid buffer-numbers in video1394_icotl
40 - changed the ways the dma prg's are used, now it's possible to use
41 even a single dma buffer
43 #include <linux/config.h>
44 #include <linux/kernel.h>
45 #include <linux/list.h>
46 #include <linux/slab.h>
47 #include <linux/interrupt.h>
48 #include <linux/wait.h>
49 #include <linux/errno.h>
50 #include <linux/module.h>
51 #include <linux/init.h>
52 #include <linux/pci.h>
54 #include <linux/poll.h>
55 #include <linux/smp_lock.h>
56 #include <linux/delay.h>
57 #include <linux/devfs_fs_kernel.h>
58 #include <linux/bitops.h>
59 #include <linux/types.h>
60 #include <linux/vmalloc.h>
61 #include <linux/timex.h>
63 #include <linux/ioctl32.h>
64 #include <linux/compat.h>
65 #include <linux/cdev.h>
68 #include "ieee1394_types.h"
70 #include "ieee1394_core.h"
71 #include "highlevel.h"
72 #include "video1394.h"
78 #define ISO_CHANNELS 64
84 quadlet_t pad[4]; /* FIXME: quick hack for memory alignment */
89 int type; /* OHCI_ISO_TRANSMIT or OHCI_ISO_RECEIVE */
90 struct ohci1394_iso_tasklet iso_tasklet;
94 int * next_buffer; /* For ISO Transmit of video packets
95 to write the correct SYT field
96 into the next block */
97 unsigned int num_desc;
98 unsigned int buf_size;
99 unsigned int frame_size;
100 unsigned int packet_size;
101 unsigned int left_size;
104 struct dma_region dma;
106 struct dma_prog_region *prg_reg;
108 struct dma_cmd **ir_prg;
109 struct it_dma_prg **it_prg;
111 unsigned int *buffer_status;
112 unsigned int *buffer_prg_assignment;
113 struct timeval *buffer_time; /* time when the buffer was received */
114 unsigned int *last_used_cmd; /* For ISO Transmit with
115 variable sized packets only ! */
120 wait_queue_head_t waitq;
122 unsigned int syt_offset;
125 struct list_head link;
130 struct ti_ohci *ohci;
131 struct list_head context_list;
132 struct dma_iso_ctx *current_ctx;
135 #ifdef CONFIG_IEEE1394_VERBOSEDEBUG
136 #define VIDEO1394_DEBUG
143 #ifdef VIDEO1394_DEBUG
144 #define DBGMSG(card, fmt, args...) \
145 printk(KERN_INFO "video1394_%d: " fmt "\n" , card , ## args)
147 #define DBGMSG(card, fmt, args...)
150 /* print general (card independent) information */
151 #define PRINT_G(level, fmt, args...) \
152 printk(level "video1394: " fmt "\n" , ## args)
154 /* print card specific information */
155 #define PRINT(level, card, fmt, args...) \
156 printk(level "video1394_%d: " fmt "\n" , card , ## args)
158 static void wakeup_dma_ir_ctx(unsigned long l);
159 static void wakeup_dma_it_ctx(unsigned long l);
161 static struct hpsb_highlevel video1394_highlevel;
163 static int free_dma_iso_ctx(struct dma_iso_ctx *d)
167 DBGMSG(d->ohci->host->id, "Freeing dma_iso_ctx %d", d->ctx);
169 ohci1394_stop_context(d->ohci, d->ctrlClear, NULL);
170 if (d->iso_tasklet.link.next != NULL)
171 ohci1394_unregister_iso_tasklet(d->ohci, &d->iso_tasklet);
173 dma_region_free(&d->dma);
176 for (i = 0; i < d->num_desc; i++)
177 dma_prog_region_free(&d->prg_reg[i]);
183 kfree(d->buffer_status);
184 kfree(d->buffer_prg_assignment);
185 kfree(d->buffer_time);
186 kfree(d->last_used_cmd);
187 kfree(d->next_buffer);
194 static struct dma_iso_ctx *
195 alloc_dma_iso_ctx(struct ti_ohci *ohci, int type, int num_desc,
196 int buf_size, int channel, unsigned int packet_size)
198 struct dma_iso_ctx *d;
201 d = kzalloc(sizeof(*d), GFP_KERNEL);
203 PRINT(KERN_ERR, ohci->host->id, "Failed to allocate dma_iso_ctx");
209 d->channel = channel;
210 d->num_desc = num_desc;
211 d->frame_size = buf_size;
212 d->buf_size = PAGE_ALIGN(buf_size);
214 INIT_LIST_HEAD(&d->link);
215 init_waitqueue_head(&d->waitq);
217 /* Init the regions for easy cleanup */
218 dma_region_init(&d->dma);
220 if (dma_region_alloc(&d->dma, (d->num_desc - 1) * d->buf_size, ohci->dev,
221 PCI_DMA_BIDIRECTIONAL)) {
222 PRINT(KERN_ERR, ohci->host->id, "Failed to allocate dma buffer");
227 if (type == OHCI_ISO_RECEIVE)
228 ohci1394_init_iso_tasklet(&d->iso_tasklet, type,
232 ohci1394_init_iso_tasklet(&d->iso_tasklet, type,
236 if (ohci1394_register_iso_tasklet(ohci, &d->iso_tasklet) < 0) {
237 PRINT(KERN_ERR, ohci->host->id, "no free iso %s contexts",
238 type == OHCI_ISO_RECEIVE ? "receive" : "transmit");
242 d->ctx = d->iso_tasklet.context;
244 d->prg_reg = kmalloc(d->num_desc * sizeof(*d->prg_reg), GFP_KERNEL);
246 PRINT(KERN_ERR, ohci->host->id, "Failed to allocate ir prg regs");
250 /* Makes for easier cleanup */
251 for (i = 0; i < d->num_desc; i++)
252 dma_prog_region_init(&d->prg_reg[i]);
254 if (type == OHCI_ISO_RECEIVE) {
255 d->ctrlSet = OHCI1394_IsoRcvContextControlSet+32*d->ctx;
256 d->ctrlClear = OHCI1394_IsoRcvContextControlClear+32*d->ctx;
257 d->cmdPtr = OHCI1394_IsoRcvCommandPtr+32*d->ctx;
258 d->ctxMatch = OHCI1394_IsoRcvContextMatch+32*d->ctx;
260 d->ir_prg = kzalloc(d->num_desc * sizeof(*d->ir_prg),
264 PRINT(KERN_ERR, ohci->host->id, "Failed to allocate dma ir prg");
269 d->nb_cmd = d->buf_size / PAGE_SIZE + 1;
270 d->left_size = (d->frame_size % PAGE_SIZE) ?
271 d->frame_size % PAGE_SIZE : PAGE_SIZE;
273 for (i = 0;i < d->num_desc; i++) {
274 if (dma_prog_region_alloc(&d->prg_reg[i], d->nb_cmd *
275 sizeof(struct dma_cmd), ohci->dev)) {
276 PRINT(KERN_ERR, ohci->host->id, "Failed to allocate dma ir prg");
280 d->ir_prg[i] = (struct dma_cmd *)d->prg_reg[i].kvirt;
283 } else { /* OHCI_ISO_TRANSMIT */
284 d->ctrlSet = OHCI1394_IsoXmitContextControlSet+16*d->ctx;
285 d->ctrlClear = OHCI1394_IsoXmitContextControlClear+16*d->ctx;
286 d->cmdPtr = OHCI1394_IsoXmitCommandPtr+16*d->ctx;
288 d->it_prg = kzalloc(d->num_desc * sizeof(*d->it_prg),
292 PRINT(KERN_ERR, ohci->host->id,
293 "Failed to allocate dma it prg");
298 d->packet_size = packet_size;
300 if (PAGE_SIZE % packet_size || packet_size>4096) {
301 PRINT(KERN_ERR, ohci->host->id,
302 "Packet size %d (page_size: %ld) "
303 "not yet supported\n",
304 packet_size, PAGE_SIZE);
309 d->nb_cmd = d->frame_size / d->packet_size;
310 if (d->frame_size % d->packet_size) {
312 d->left_size = d->frame_size % d->packet_size;
314 d->left_size = d->packet_size;
316 for (i = 0; i < d->num_desc; i++) {
317 if (dma_prog_region_alloc(&d->prg_reg[i], d->nb_cmd *
318 sizeof(struct it_dma_prg), ohci->dev)) {
319 PRINT(KERN_ERR, ohci->host->id, "Failed to allocate dma it prg");
323 d->it_prg[i] = (struct it_dma_prg *)d->prg_reg[i].kvirt;
328 kzalloc(d->num_desc * sizeof(*d->buffer_status), GFP_KERNEL);
329 d->buffer_prg_assignment =
330 kzalloc(d->num_desc * sizeof(*d->buffer_prg_assignment), GFP_KERNEL);
332 kzalloc(d->num_desc * sizeof(*d->buffer_time), GFP_KERNEL);
334 kzalloc(d->num_desc * sizeof(*d->last_used_cmd), GFP_KERNEL);
336 kzalloc(d->num_desc * sizeof(*d->next_buffer), GFP_KERNEL);
338 if (!d->buffer_status || !d->buffer_prg_assignment || !d->buffer_time ||
339 !d->last_used_cmd || !d->next_buffer) {
340 PRINT(KERN_ERR, ohci->host->id,
341 "Failed to allocate dma_iso_ctx member");
346 spin_lock_init(&d->lock);
348 PRINT(KERN_INFO, ohci->host->id, "Iso %s DMA: %d buffers "
349 "of size %d allocated for a frame size %d, each with %d prgs",
350 (type == OHCI_ISO_RECEIVE) ? "receive" : "transmit",
351 d->num_desc - 1, d->buf_size, d->frame_size, d->nb_cmd);
356 static void reset_ir_status(struct dma_iso_ctx *d, int n)
359 d->ir_prg[n][0].status = cpu_to_le32(4);
360 d->ir_prg[n][1].status = cpu_to_le32(PAGE_SIZE-4);
361 for (i = 2; i < d->nb_cmd - 1; i++)
362 d->ir_prg[n][i].status = cpu_to_le32(PAGE_SIZE);
363 d->ir_prg[n][i].status = cpu_to_le32(d->left_size);
366 static void reprogram_dma_ir_prg(struct dma_iso_ctx *d, int n, int buffer, int flags)
368 struct dma_cmd *ir_prg = d->ir_prg[n];
369 unsigned long buf = (unsigned long)d->dma.kvirt + buffer * d->buf_size;
372 d->buffer_prg_assignment[n] = buffer;
374 ir_prg[0].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma, buf -
375 (unsigned long)d->dma.kvirt));
376 ir_prg[1].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma,
377 (buf + 4) - (unsigned long)d->dma.kvirt));
379 for (i=2;i<d->nb_cmd-1;i++) {
380 ir_prg[i].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma,
381 (buf+(i-1)*PAGE_SIZE) -
382 (unsigned long)d->dma.kvirt));
385 ir_prg[i].control = cpu_to_le32(DMA_CTL_INPUT_MORE | DMA_CTL_UPDATE |
386 DMA_CTL_IRQ | DMA_CTL_BRANCH | d->left_size);
387 ir_prg[i].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma,
388 (buf+(i-1)*PAGE_SIZE) - (unsigned long)d->dma.kvirt));
391 static void initialize_dma_ir_prg(struct dma_iso_ctx *d, int n, int flags)
393 struct dma_cmd *ir_prg = d->ir_prg[n];
394 struct dma_prog_region *ir_reg = &d->prg_reg[n];
395 unsigned long buf = (unsigned long)d->dma.kvirt;
398 /* the first descriptor will read only 4 bytes */
399 ir_prg[0].control = cpu_to_le32(DMA_CTL_INPUT_MORE | DMA_CTL_UPDATE |
402 /* set the sync flag */
403 if (flags & VIDEO1394_SYNC_FRAMES)
404 ir_prg[0].control |= cpu_to_le32(DMA_CTL_WAIT);
406 ir_prg[0].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma, buf -
407 (unsigned long)d->dma.kvirt));
408 ir_prg[0].branchAddress = cpu_to_le32((dma_prog_region_offset_to_bus(ir_reg,
409 1 * sizeof(struct dma_cmd)) & 0xfffffff0) | 0x1);
411 /* If there is *not* only one DMA page per frame (hence, d->nb_cmd==2) */
413 /* The second descriptor will read PAGE_SIZE-4 bytes */
414 ir_prg[1].control = cpu_to_le32(DMA_CTL_INPUT_MORE | DMA_CTL_UPDATE |
415 DMA_CTL_BRANCH | (PAGE_SIZE-4));
416 ir_prg[1].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma, (buf + 4) -
417 (unsigned long)d->dma.kvirt));
418 ir_prg[1].branchAddress = cpu_to_le32((dma_prog_region_offset_to_bus(ir_reg,
419 2 * sizeof(struct dma_cmd)) & 0xfffffff0) | 0x1);
421 for (i = 2; i < d->nb_cmd - 1; i++) {
422 ir_prg[i].control = cpu_to_le32(DMA_CTL_INPUT_MORE | DMA_CTL_UPDATE |
423 DMA_CTL_BRANCH | PAGE_SIZE);
424 ir_prg[i].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma,
425 (buf+(i-1)*PAGE_SIZE) -
426 (unsigned long)d->dma.kvirt));
428 ir_prg[i].branchAddress =
429 cpu_to_le32((dma_prog_region_offset_to_bus(ir_reg,
430 (i + 1) * sizeof(struct dma_cmd)) & 0xfffffff0) | 0x1);
433 /* The last descriptor will generate an interrupt */
434 ir_prg[i].control = cpu_to_le32(DMA_CTL_INPUT_MORE | DMA_CTL_UPDATE |
435 DMA_CTL_IRQ | DMA_CTL_BRANCH | d->left_size);
436 ir_prg[i].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma,
437 (buf+(i-1)*PAGE_SIZE) -
438 (unsigned long)d->dma.kvirt));
440 /* Only one DMA page is used. Read d->left_size immediately and */
441 /* generate an interrupt as this is also the last page. */
442 ir_prg[1].control = cpu_to_le32(DMA_CTL_INPUT_MORE | DMA_CTL_UPDATE |
443 DMA_CTL_IRQ | DMA_CTL_BRANCH | (d->left_size-4));
444 ir_prg[1].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma,
445 (buf + 4) - (unsigned long)d->dma.kvirt));
449 static void initialize_dma_ir_ctx(struct dma_iso_ctx *d, int tag, int flags)
451 struct ti_ohci *ohci = (struct ti_ohci *)d->ohci;
456 ohci1394_stop_context(ohci, d->ctrlClear, NULL);
458 for (i=0;i<d->num_desc;i++) {
459 initialize_dma_ir_prg(d, i, flags);
460 reset_ir_status(d, i);
463 /* reset the ctrl register */
464 reg_write(ohci, d->ctrlClear, 0xf0000000);
467 reg_write(ohci, d->ctrlSet, 0x80000000);
469 /* Set isoch header */
470 if (flags & VIDEO1394_INCLUDE_ISO_HEADERS)
471 reg_write(ohci, d->ctrlSet, 0x40000000);
473 /* Set the context match register to match on all tags,
474 sync for sync tag, and listen to d->channel */
475 reg_write(ohci, d->ctxMatch, 0xf0000000|((tag&0xf)<<8)|d->channel);
477 /* Set up isoRecvIntMask to generate interrupts */
478 reg_write(ohci, OHCI1394_IsoRecvIntMaskSet, 1<<d->ctx);
481 /* find which context is listening to this channel */
482 static struct dma_iso_ctx *
483 find_ctx(struct list_head *list, int type, int channel)
485 struct dma_iso_ctx *ctx;
487 list_for_each_entry(ctx, list, link) {
488 if (ctx->type == type && ctx->channel == channel)
495 static void wakeup_dma_ir_ctx(unsigned long l)
497 struct dma_iso_ctx *d = (struct dma_iso_ctx *) l;
502 for (i = 0; i < d->num_desc; i++) {
503 if (d->ir_prg[i][d->nb_cmd-1].status & cpu_to_le32(0xFFFF0000)) {
504 reset_ir_status(d, i);
505 d->buffer_status[d->buffer_prg_assignment[i]] = VIDEO1394_BUFFER_READY;
506 do_gettimeofday(&d->buffer_time[i]);
510 spin_unlock(&d->lock);
512 if (waitqueue_active(&d->waitq))
513 wake_up_interruptible(&d->waitq);
516 static inline void put_timestamp(struct ti_ohci *ohci, struct dma_iso_ctx * d,
519 unsigned char* buf = d->dma.kvirt + n * d->buf_size;
527 cycleTimer = reg_read(ohci, OHCI1394_IsochronousCycleTimer);
529 timeStamp = ((cycleTimer & 0x0fff) + d->syt_offset); /* 11059 = 450 us */
530 timeStamp = (timeStamp % 3072 + ((timeStamp / 3072) << 12)
531 + (cycleTimer & 0xf000)) & 0xffff;
533 buf[6] = timeStamp >> 8;
534 buf[7] = timeStamp & 0xff;
536 /* if first packet is empty packet, then put timestamp into the next full one too */
537 if ( (le32_to_cpu(d->it_prg[n][0].data[1]) >>16) == 0x008) {
538 buf += d->packet_size;
539 buf[6] = timeStamp >> 8;
540 buf[7] = timeStamp & 0xff;
543 /* do the next buffer frame too in case of irq latency */
544 n = d->next_buffer[n];
548 buf = d->dma.kvirt + n * d->buf_size;
550 timeStamp += (d->last_used_cmd[n] << 12) & 0xffff;
552 buf[6] = timeStamp >> 8;
553 buf[7] = timeStamp & 0xff;
555 /* if first packet is empty packet, then put timestamp into the next full one too */
556 if ( (le32_to_cpu(d->it_prg[n][0].data[1]) >>16) == 0x008) {
557 buf += d->packet_size;
558 buf[6] = timeStamp >> 8;
559 buf[7] = timeStamp & 0xff;
563 printk("curr: %d, next: %d, cycleTimer: %08x timeStamp: %08x\n",
564 curr, n, cycleTimer, timeStamp);
568 static void wakeup_dma_it_ctx(unsigned long l)
570 struct dma_iso_ctx *d = (struct dma_iso_ctx *) l;
571 struct ti_ohci *ohci = d->ohci;
576 for (i = 0; i < d->num_desc; i++) {
577 if (d->it_prg[i][d->last_used_cmd[i]].end.status &
578 cpu_to_le32(0xFFFF0000)) {
579 int next = d->next_buffer[i];
580 put_timestamp(ohci, d, next);
581 d->it_prg[i][d->last_used_cmd[i]].end.status = 0;
582 d->buffer_status[d->buffer_prg_assignment[i]] = VIDEO1394_BUFFER_READY;
586 spin_unlock(&d->lock);
588 if (waitqueue_active(&d->waitq))
589 wake_up_interruptible(&d->waitq);
592 static void reprogram_dma_it_prg(struct dma_iso_ctx *d, int n, int buffer)
594 struct it_dma_prg *it_prg = d->it_prg[n];
595 unsigned long buf = (unsigned long)d->dma.kvirt + buffer * d->buf_size;
598 d->buffer_prg_assignment[n] = buffer;
599 for (i=0;i<d->nb_cmd;i++) {
600 it_prg[i].end.address =
601 cpu_to_le32(dma_region_offset_to_bus(&d->dma,
602 (buf+i*d->packet_size) - (unsigned long)d->dma.kvirt));
606 static void initialize_dma_it_prg(struct dma_iso_ctx *d, int n, int sync_tag)
608 struct it_dma_prg *it_prg = d->it_prg[n];
609 struct dma_prog_region *it_reg = &d->prg_reg[n];
610 unsigned long buf = (unsigned long)d->dma.kvirt;
612 d->last_used_cmd[n] = d->nb_cmd - 1;
613 for (i=0;i<d->nb_cmd;i++) {
615 it_prg[i].begin.control = cpu_to_le32(DMA_CTL_OUTPUT_MORE |
616 DMA_CTL_IMMEDIATE | 8) ;
617 it_prg[i].begin.address = 0;
619 it_prg[i].begin.status = 0;
621 it_prg[i].data[0] = cpu_to_le32(
622 (IEEE1394_SPEED_100 << 16)
623 | (/* tag */ 1 << 14)
625 | (TCODE_ISO_DATA << 4));
626 if (i==0) it_prg[i].data[0] |= cpu_to_le32(sync_tag);
627 it_prg[i].data[1] = cpu_to_le32(d->packet_size << 16);
628 it_prg[i].data[2] = 0;
629 it_prg[i].data[3] = 0;
631 it_prg[i].end.control = cpu_to_le32(DMA_CTL_OUTPUT_LAST |
633 it_prg[i].end.address =
634 cpu_to_le32(dma_region_offset_to_bus(&d->dma, (buf+i*d->packet_size) -
635 (unsigned long)d->dma.kvirt));
638 it_prg[i].end.control |= cpu_to_le32(d->packet_size);
639 it_prg[i].begin.branchAddress =
640 cpu_to_le32((dma_prog_region_offset_to_bus(it_reg, (i + 1) *
641 sizeof(struct it_dma_prg)) & 0xfffffff0) | 0x3);
642 it_prg[i].end.branchAddress =
643 cpu_to_le32((dma_prog_region_offset_to_bus(it_reg, (i + 1) *
644 sizeof(struct it_dma_prg)) & 0xfffffff0) | 0x3);
646 /* the last prg generates an interrupt */
647 it_prg[i].end.control |= cpu_to_le32(DMA_CTL_UPDATE |
648 DMA_CTL_IRQ | d->left_size);
649 /* the last prg doesn't branch */
650 it_prg[i].begin.branchAddress = 0;
651 it_prg[i].end.branchAddress = 0;
653 it_prg[i].end.status = 0;
657 static void initialize_dma_it_prg_var_packet_queue(
658 struct dma_iso_ctx *d, int n, unsigned int * packet_sizes,
659 struct ti_ohci *ohci)
661 struct it_dma_prg *it_prg = d->it_prg[n];
662 struct dma_prog_region *it_reg = &d->prg_reg[n];
667 put_timestamp(ohci, d, n);
670 d->last_used_cmd[n] = d->nb_cmd - 1;
672 for (i = 0; i < d->nb_cmd; i++) {
674 if (packet_sizes[i] > d->packet_size) {
675 size = d->packet_size;
677 size = packet_sizes[i];
679 it_prg[i].data[1] = cpu_to_le32(size << 16);
680 it_prg[i].end.control = cpu_to_le32(DMA_CTL_OUTPUT_LAST | DMA_CTL_BRANCH);
682 if (i < d->nb_cmd-1 && packet_sizes[i+1] != 0) {
683 it_prg[i].end.control |= cpu_to_le32(size);
684 it_prg[i].begin.branchAddress =
685 cpu_to_le32((dma_prog_region_offset_to_bus(it_reg, (i + 1) *
686 sizeof(struct it_dma_prg)) & 0xfffffff0) | 0x3);
687 it_prg[i].end.branchAddress =
688 cpu_to_le32((dma_prog_region_offset_to_bus(it_reg, (i + 1) *
689 sizeof(struct it_dma_prg)) & 0xfffffff0) | 0x3);
691 /* the last prg generates an interrupt */
692 it_prg[i].end.control |= cpu_to_le32(DMA_CTL_UPDATE |
694 /* the last prg doesn't branch */
695 it_prg[i].begin.branchAddress = 0;
696 it_prg[i].end.branchAddress = 0;
697 d->last_used_cmd[n] = i;
703 static void initialize_dma_it_ctx(struct dma_iso_ctx *d, int sync_tag,
704 unsigned int syt_offset, int flags)
706 struct ti_ohci *ohci = (struct ti_ohci *)d->ohci;
710 d->syt_offset = (syt_offset == 0 ? 11000 : syt_offset);
712 ohci1394_stop_context(ohci, d->ctrlClear, NULL);
714 for (i=0;i<d->num_desc;i++)
715 initialize_dma_it_prg(d, i, sync_tag);
717 /* Set up isoRecvIntMask to generate interrupts */
718 reg_write(ohci, OHCI1394_IsoXmitIntMaskSet, 1<<d->ctx);
721 static inline unsigned video1394_buffer_state(struct dma_iso_ctx *d,
726 spin_lock_irqsave(&d->lock, flags);
727 ret = d->buffer_status[buffer];
728 spin_unlock_irqrestore(&d->lock, flags);
732 static int __video1394_ioctl(struct file *file,
733 unsigned int cmd, unsigned long arg)
735 struct file_ctx *ctx = (struct file_ctx *)file->private_data;
736 struct ti_ohci *ohci = ctx->ohci;
738 void __user *argp = (void __user *)arg;
742 case VIDEO1394_IOC_LISTEN_CHANNEL:
743 case VIDEO1394_IOC_TALK_CHANNEL:
745 struct video1394_mmap v;
747 struct dma_iso_ctx *d;
750 if (copy_from_user(&v, argp, sizeof(v)))
753 /* if channel < 0, find lowest available one */
757 if (i == ISO_CHANNELS) {
758 PRINT(KERN_ERR, ohci->host->id,
759 "No free channel found");
762 if (!(ohci->ISO_channel_usage & mask)) {
764 PRINT(KERN_INFO, ohci->host->id, "Found free channel %d", i);
769 } else if (v.channel >= ISO_CHANNELS) {
770 PRINT(KERN_ERR, ohci->host->id,
771 "Iso channel %d out of bounds", v.channel);
774 mask = (u64)0x1<<v.channel;
776 PRINT(KERN_INFO, ohci->host->id, "mask: %08X%08X usage: %08X%08X\n",
777 (u32)(mask>>32),(u32)(mask&0xffffffff),
778 (u32)(ohci->ISO_channel_usage>>32),
779 (u32)(ohci->ISO_channel_usage&0xffffffff));
780 if (ohci->ISO_channel_usage & mask) {
781 PRINT(KERN_ERR, ohci->host->id,
782 "Channel %d is already taken", v.channel);
786 if (v.buf_size == 0 || v.buf_size > VIDEO1394_MAX_SIZE) {
787 PRINT(KERN_ERR, ohci->host->id,
788 "Invalid %d length buffer requested",v.buf_size);
792 if (v.nb_buffers == 0 || v.nb_buffers > VIDEO1394_MAX_SIZE) {
793 PRINT(KERN_ERR, ohci->host->id,
794 "Invalid %d buffers requested",v.nb_buffers);
798 if (v.nb_buffers * v.buf_size > VIDEO1394_MAX_SIZE) {
799 PRINT(KERN_ERR, ohci->host->id,
800 "%d buffers of size %d bytes is too big",
801 v.nb_buffers, v.buf_size);
805 if (cmd == VIDEO1394_IOC_LISTEN_CHANNEL) {
806 d = alloc_dma_iso_ctx(ohci, OHCI_ISO_RECEIVE,
807 v.nb_buffers + 1, v.buf_size,
811 PRINT(KERN_ERR, ohci->host->id,
812 "Couldn't allocate ir context");
815 initialize_dma_ir_ctx(d, v.sync_tag, v.flags);
817 ctx->current_ctx = d;
819 v.buf_size = d->buf_size;
820 list_add_tail(&d->link, &ctx->context_list);
822 PRINT(KERN_INFO, ohci->host->id,
823 "iso context %d listen on channel %d",
827 d = alloc_dma_iso_ctx(ohci, OHCI_ISO_TRANSMIT,
828 v.nb_buffers + 1, v.buf_size,
829 v.channel, v.packet_size);
832 PRINT(KERN_ERR, ohci->host->id,
833 "Couldn't allocate it context");
836 initialize_dma_it_ctx(d, v.sync_tag,
837 v.syt_offset, v.flags);
839 ctx->current_ctx = d;
841 v.buf_size = d->buf_size;
843 list_add_tail(&d->link, &ctx->context_list);
845 PRINT(KERN_INFO, ohci->host->id,
846 "Iso context %d talk on channel %d", d->ctx,
850 if (copy_to_user(argp, &v, sizeof(v))) {
851 /* FIXME : free allocated dma resources */
855 ohci->ISO_channel_usage |= mask;
859 case VIDEO1394_IOC_UNLISTEN_CHANNEL:
860 case VIDEO1394_IOC_UNTALK_CHANNEL:
864 struct dma_iso_ctx *d;
866 if (copy_from_user(&channel, argp, sizeof(int)))
869 if (channel < 0 || channel >= ISO_CHANNELS) {
870 PRINT(KERN_ERR, ohci->host->id,
871 "Iso channel %d out of bound", channel);
874 mask = (u64)0x1<<channel;
875 if (!(ohci->ISO_channel_usage & mask)) {
876 PRINT(KERN_ERR, ohci->host->id,
877 "Channel %d is not being used", channel);
881 /* Mark this channel as unused */
882 ohci->ISO_channel_usage &= ~mask;
884 if (cmd == VIDEO1394_IOC_UNLISTEN_CHANNEL)
885 d = find_ctx(&ctx->context_list, OHCI_ISO_RECEIVE, channel);
887 d = find_ctx(&ctx->context_list, OHCI_ISO_TRANSMIT, channel);
889 if (d == NULL) return -ESRCH;
890 PRINT(KERN_INFO, ohci->host->id, "Iso context %d "
891 "stop talking on channel %d", d->ctx, channel);
896 case VIDEO1394_IOC_LISTEN_QUEUE_BUFFER:
898 struct video1394_wait v;
899 struct dma_iso_ctx *d;
902 if (copy_from_user(&v, argp, sizeof(v)))
905 d = find_ctx(&ctx->context_list, OHCI_ISO_RECEIVE, v.channel);
906 if (d == NULL) return -EFAULT;
908 if ((v.buffer<0) || (v.buffer>=d->num_desc - 1)) {
909 PRINT(KERN_ERR, ohci->host->id,
910 "Buffer %d out of range",v.buffer);
914 spin_lock_irqsave(&d->lock,flags);
916 if (d->buffer_status[v.buffer]==VIDEO1394_BUFFER_QUEUED) {
917 PRINT(KERN_ERR, ohci->host->id,
918 "Buffer %d is already used",v.buffer);
919 spin_unlock_irqrestore(&d->lock,flags);
923 d->buffer_status[v.buffer]=VIDEO1394_BUFFER_QUEUED;
925 next_prg = (d->last_buffer + 1) % d->num_desc;
926 if (d->last_buffer>=0)
927 d->ir_prg[d->last_buffer][d->nb_cmd-1].branchAddress =
928 cpu_to_le32((dma_prog_region_offset_to_bus(&d->prg_reg[next_prg], 0)
929 & 0xfffffff0) | 0x1);
931 d->last_buffer = next_prg;
932 reprogram_dma_ir_prg(d, d->last_buffer, v.buffer, d->flags);
934 d->ir_prg[d->last_buffer][d->nb_cmd-1].branchAddress = 0;
936 spin_unlock_irqrestore(&d->lock,flags);
938 if (!(reg_read(ohci, d->ctrlSet) & 0x8000))
940 DBGMSG(ohci->host->id, "Starting iso DMA ctx=%d",d->ctx);
942 /* Tell the controller where the first program is */
943 reg_write(ohci, d->cmdPtr,
944 dma_prog_region_offset_to_bus(&d->prg_reg[d->last_buffer], 0) | 0x1);
947 reg_write(ohci, d->ctrlSet, 0x8000);
950 /* Wake up dma context if necessary */
951 if (!(reg_read(ohci, d->ctrlSet) & 0x400)) {
952 PRINT(KERN_INFO, ohci->host->id,
953 "Waking up iso dma ctx=%d", d->ctx);
954 reg_write(ohci, d->ctrlSet, 0x1000);
960 case VIDEO1394_IOC_LISTEN_WAIT_BUFFER:
961 case VIDEO1394_IOC_LISTEN_POLL_BUFFER:
963 struct video1394_wait v;
964 struct dma_iso_ctx *d;
967 if (copy_from_user(&v, argp, sizeof(v)))
970 d = find_ctx(&ctx->context_list, OHCI_ISO_RECEIVE, v.channel);
971 if (d == NULL) return -EFAULT;
973 if ((v.buffer<0) || (v.buffer>d->num_desc - 1)) {
974 PRINT(KERN_ERR, ohci->host->id,
975 "Buffer %d out of range",v.buffer);
980 * I change the way it works so that it returns
981 * the last received frame.
983 spin_lock_irqsave(&d->lock, flags);
984 switch(d->buffer_status[v.buffer]) {
985 case VIDEO1394_BUFFER_READY:
986 d->buffer_status[v.buffer]=VIDEO1394_BUFFER_FREE;
988 case VIDEO1394_BUFFER_QUEUED:
989 if (cmd == VIDEO1394_IOC_LISTEN_POLL_BUFFER) {
990 /* for polling, return error code EINTR */
991 spin_unlock_irqrestore(&d->lock, flags);
995 spin_unlock_irqrestore(&d->lock, flags);
996 wait_event_interruptible(d->waitq,
997 video1394_buffer_state(d, v.buffer) ==
998 VIDEO1394_BUFFER_READY);
999 if (signal_pending(current))
1001 spin_lock_irqsave(&d->lock, flags);
1002 d->buffer_status[v.buffer]=VIDEO1394_BUFFER_FREE;
1005 PRINT(KERN_ERR, ohci->host->id,
1006 "Buffer %d is not queued",v.buffer);
1007 spin_unlock_irqrestore(&d->lock, flags);
1011 /* set time of buffer */
1012 v.filltime = d->buffer_time[v.buffer];
1013 // printk("Buffer %d time %d\n", v.buffer, (d->buffer_time[v.buffer]).tv_usec);
1016 * Look ahead to see how many more buffers have been received
1019 while (d->buffer_status[(v.buffer+1)%(d->num_desc - 1)]==
1020 VIDEO1394_BUFFER_READY) {
1021 v.buffer=(v.buffer+1)%(d->num_desc - 1);
1024 spin_unlock_irqrestore(&d->lock, flags);
1027 if (copy_to_user(argp, &v, sizeof(v)))
1032 case VIDEO1394_IOC_TALK_QUEUE_BUFFER:
1034 struct video1394_wait v;
1035 unsigned int *psizes = NULL;
1036 struct dma_iso_ctx *d;
1039 if (copy_from_user(&v, argp, sizeof(v)))
1042 d = find_ctx(&ctx->context_list, OHCI_ISO_TRANSMIT, v.channel);
1043 if (d == NULL) return -EFAULT;
1045 if ((v.buffer<0) || (v.buffer>=d->num_desc - 1)) {
1046 PRINT(KERN_ERR, ohci->host->id,
1047 "Buffer %d out of range",v.buffer);
1051 if (d->flags & VIDEO1394_VARIABLE_PACKET_SIZE) {
1052 int buf_size = d->nb_cmd * sizeof(*psizes);
1053 struct video1394_queue_variable __user *p = argp;
1054 unsigned int __user *qv;
1056 if (get_user(qv, &p->packet_sizes))
1059 psizes = kmalloc(buf_size, GFP_KERNEL);
1063 if (copy_from_user(psizes, qv, buf_size)) {
1069 spin_lock_irqsave(&d->lock,flags);
1071 // last_buffer is last_prg
1072 next_prg = (d->last_buffer + 1) % d->num_desc;
1073 if (d->buffer_status[v.buffer]!=VIDEO1394_BUFFER_FREE) {
1074 PRINT(KERN_ERR, ohci->host->id,
1075 "Buffer %d is already used",v.buffer);
1076 spin_unlock_irqrestore(&d->lock,flags);
1081 if (d->flags & VIDEO1394_VARIABLE_PACKET_SIZE) {
1082 initialize_dma_it_prg_var_packet_queue(
1083 d, next_prg, psizes, ohci);
1086 d->buffer_status[v.buffer]=VIDEO1394_BUFFER_QUEUED;
1088 if (d->last_buffer >= 0) {
1089 d->it_prg[d->last_buffer]
1090 [ d->last_used_cmd[d->last_buffer] ].end.branchAddress =
1091 cpu_to_le32((dma_prog_region_offset_to_bus(&d->prg_reg[next_prg],
1092 0) & 0xfffffff0) | 0x3);
1094 d->it_prg[d->last_buffer]
1095 [ d->last_used_cmd[d->last_buffer] ].begin.branchAddress =
1096 cpu_to_le32((dma_prog_region_offset_to_bus(&d->prg_reg[next_prg],
1097 0) & 0xfffffff0) | 0x3);
1098 d->next_buffer[d->last_buffer] = (v.buffer + 1) % (d->num_desc - 1);
1100 d->last_buffer = next_prg;
1101 reprogram_dma_it_prg(d, d->last_buffer, v.buffer);
1102 d->next_buffer[d->last_buffer] = -1;
1104 d->it_prg[d->last_buffer][d->last_used_cmd[d->last_buffer]].end.branchAddress = 0;
1106 spin_unlock_irqrestore(&d->lock,flags);
1108 if (!(reg_read(ohci, d->ctrlSet) & 0x8000))
1110 DBGMSG(ohci->host->id, "Starting iso transmit DMA ctx=%d",
1112 put_timestamp(ohci, d, d->last_buffer);
1114 /* Tell the controller where the first program is */
1115 reg_write(ohci, d->cmdPtr,
1116 dma_prog_region_offset_to_bus(&d->prg_reg[next_prg], 0) | 0x3);
1118 /* Run IT context */
1119 reg_write(ohci, d->ctrlSet, 0x8000);
1122 /* Wake up dma context if necessary */
1123 if (!(reg_read(ohci, d->ctrlSet) & 0x400)) {
1124 PRINT(KERN_INFO, ohci->host->id,
1125 "Waking up iso transmit dma ctx=%d",
1127 put_timestamp(ohci, d, d->last_buffer);
1128 reg_write(ohci, d->ctrlSet, 0x1000);
1136 case VIDEO1394_IOC_TALK_WAIT_BUFFER:
1138 struct video1394_wait v;
1139 struct dma_iso_ctx *d;
1141 if (copy_from_user(&v, argp, sizeof(v)))
1144 d = find_ctx(&ctx->context_list, OHCI_ISO_TRANSMIT, v.channel);
1145 if (d == NULL) return -EFAULT;
1147 if ((v.buffer<0) || (v.buffer>=d->num_desc-1)) {
1148 PRINT(KERN_ERR, ohci->host->id,
1149 "Buffer %d out of range",v.buffer);
1153 switch(d->buffer_status[v.buffer]) {
1154 case VIDEO1394_BUFFER_READY:
1155 d->buffer_status[v.buffer]=VIDEO1394_BUFFER_FREE;
1157 case VIDEO1394_BUFFER_QUEUED:
1158 wait_event_interruptible(d->waitq,
1159 (d->buffer_status[v.buffer] == VIDEO1394_BUFFER_READY));
1160 if (signal_pending(current))
1162 d->buffer_status[v.buffer]=VIDEO1394_BUFFER_FREE;
1165 PRINT(KERN_ERR, ohci->host->id,
1166 "Buffer %d is not queued",v.buffer);
1175 static long video1394_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
1179 err = __video1394_ioctl(file, cmd, arg);
1185 * This maps the vmalloced and reserved buffer to user space.
1188 * - PAGE_READONLY should suffice!?
1189 * - remap_pfn_range is kind of inefficient for page by page remapping.
1190 * But e.g. pte_alloc() does not work in modules ... :-(
1193 static int video1394_mmap(struct file *file, struct vm_area_struct *vma)
1195 struct file_ctx *ctx = (struct file_ctx *)file->private_data;
1199 if (ctx->current_ctx == NULL) {
1200 PRINT(KERN_ERR, ctx->ohci->host->id, "Current iso context not set");
1202 res = dma_region_mmap(&ctx->current_ctx->dma, file, vma);
1208 static int video1394_open(struct inode *inode, struct file *file)
1210 int i = ieee1394_file_to_instance(file);
1211 struct ti_ohci *ohci;
1212 struct file_ctx *ctx;
1214 ohci = hpsb_get_hostinfo_bykey(&video1394_highlevel, i);
1218 ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
1220 PRINT(KERN_ERR, ohci->host->id, "Cannot malloc file_ctx");
1225 INIT_LIST_HEAD(&ctx->context_list);
1226 ctx->current_ctx = NULL;
1227 file->private_data = ctx;
1232 static int video1394_release(struct inode *inode, struct file *file)
1234 struct file_ctx *ctx = (struct file_ctx *)file->private_data;
1235 struct ti_ohci *ohci = ctx->ohci;
1236 struct list_head *lh, *next;
1240 list_for_each_safe(lh, next, &ctx->context_list) {
1241 struct dma_iso_ctx *d;
1242 d = list_entry(lh, struct dma_iso_ctx, link);
1243 mask = (u64) 1 << d->channel;
1245 if (!(ohci->ISO_channel_usage & mask))
1246 PRINT(KERN_ERR, ohci->host->id, "On release: Channel %d "
1247 "is not being used", d->channel);
1249 ohci->ISO_channel_usage &= ~mask;
1250 PRINT(KERN_INFO, ohci->host->id, "On release: Iso %s context "
1251 "%d stop listening on channel %d",
1252 d->type == OHCI_ISO_RECEIVE ? "receive" : "transmit",
1253 d->ctx, d->channel);
1254 free_dma_iso_ctx(d);
1258 file->private_data = NULL;
1264 #ifdef CONFIG_COMPAT
1265 static long video1394_compat_ioctl(struct file *f, unsigned cmd, unsigned long arg);
1268 static struct cdev video1394_cdev;
1269 static struct file_operations video1394_fops=
1271 .owner = THIS_MODULE,
1272 .unlocked_ioctl = video1394_ioctl,
1273 #ifdef CONFIG_COMPAT
1274 .compat_ioctl = video1394_compat_ioctl,
1276 .mmap = video1394_mmap,
1277 .open = video1394_open,
1278 .release = video1394_release
1281 /*** HOTPLUG STUFF **********************************************************/
1283 * Export information about protocols/devices supported by this driver.
1285 static struct ieee1394_device_id video1394_id_table[] = {
1287 .match_flags = IEEE1394_MATCH_SPECIFIER_ID | IEEE1394_MATCH_VERSION,
1288 .specifier_id = CAMERA_UNIT_SPEC_ID_ENTRY & 0xffffff,
1289 .version = CAMERA_SW_VERSION_ENTRY & 0xffffff
1292 .match_flags = IEEE1394_MATCH_SPECIFIER_ID | IEEE1394_MATCH_VERSION,
1293 .specifier_id = CAMERA_UNIT_SPEC_ID_ENTRY & 0xffffff,
1294 .version = (CAMERA_SW_VERSION_ENTRY + 1) & 0xffffff
1297 .match_flags = IEEE1394_MATCH_SPECIFIER_ID | IEEE1394_MATCH_VERSION,
1298 .specifier_id = CAMERA_UNIT_SPEC_ID_ENTRY & 0xffffff,
1299 .version = (CAMERA_SW_VERSION_ENTRY + 2) & 0xffffff
1304 MODULE_DEVICE_TABLE(ieee1394, video1394_id_table);
1306 static struct hpsb_protocol_driver video1394_driver = {
1307 .name = "1394 Digital Camera Driver",
1308 .id_table = video1394_id_table,
1310 .name = VIDEO1394_DRIVER_NAME,
1311 .bus = &ieee1394_bus_type,
1316 static void video1394_add_host (struct hpsb_host *host)
1318 struct ti_ohci *ohci;
1321 /* We only work with the OHCI-1394 driver */
1322 if (strcmp(host->driver->name, OHCI1394_DRIVER_NAME))
1325 ohci = (struct ti_ohci *)host->hostdata;
1327 if (!hpsb_create_hostinfo(&video1394_highlevel, host, 0)) {
1328 PRINT(KERN_ERR, ohci->host->id, "Cannot allocate hostinfo");
1332 hpsb_set_hostinfo(&video1394_highlevel, host, ohci);
1333 hpsb_set_hostinfo_key(&video1394_highlevel, host, ohci->host->id);
1335 minor = IEEE1394_MINOR_BLOCK_VIDEO1394 * 16 + ohci->host->id;
1336 class_device_create(hpsb_protocol_class, NULL, MKDEV(
1337 IEEE1394_MAJOR, minor),
1338 NULL, "%s-%d", VIDEO1394_DRIVER_NAME, ohci->host->id);
1339 devfs_mk_cdev(MKDEV(IEEE1394_MAJOR, minor),
1340 S_IFCHR | S_IRUSR | S_IWUSR,
1341 "%s/%d", VIDEO1394_DRIVER_NAME, ohci->host->id);
1345 static void video1394_remove_host (struct hpsb_host *host)
1347 struct ti_ohci *ohci = hpsb_get_hostinfo(&video1394_highlevel, host);
1350 class_device_destroy(hpsb_protocol_class, MKDEV(IEEE1394_MAJOR,
1351 IEEE1394_MINOR_BLOCK_VIDEO1394 * 16 + ohci->host->id));
1352 devfs_remove("%s/%d", VIDEO1394_DRIVER_NAME, ohci->host->id);
1359 static struct hpsb_highlevel video1394_highlevel = {
1360 .name = VIDEO1394_DRIVER_NAME,
1361 .add_host = video1394_add_host,
1362 .remove_host = video1394_remove_host,
1365 MODULE_AUTHOR("Sebastien Rougeaux <sebastien.rougeaux@anu.edu.au>");
1366 MODULE_DESCRIPTION("driver for digital video on OHCI board");
1367 MODULE_SUPPORTED_DEVICE(VIDEO1394_DRIVER_NAME);
1368 MODULE_LICENSE("GPL");
1370 #ifdef CONFIG_COMPAT
1372 #define VIDEO1394_IOC32_LISTEN_QUEUE_BUFFER \
1373 _IOW ('#', 0x12, struct video1394_wait32)
1374 #define VIDEO1394_IOC32_LISTEN_WAIT_BUFFER \
1375 _IOWR('#', 0x13, struct video1394_wait32)
1376 #define VIDEO1394_IOC32_TALK_WAIT_BUFFER \
1377 _IOW ('#', 0x17, struct video1394_wait32)
1378 #define VIDEO1394_IOC32_LISTEN_POLL_BUFFER \
1379 _IOWR('#', 0x18, struct video1394_wait32)
1381 struct video1394_wait32 {
1384 struct compat_timeval filltime;
1387 static int video1394_wr_wait32(struct file *file, unsigned int cmd, unsigned long arg)
1389 struct video1394_wait32 __user *argp = (void __user *)arg;
1390 struct video1394_wait32 wait32;
1391 struct video1394_wait wait;
1392 mm_segment_t old_fs;
1395 if (copy_from_user(&wait32, argp, sizeof(wait32)))
1398 wait.channel = wait32.channel;
1399 wait.buffer = wait32.buffer;
1400 wait.filltime.tv_sec = (time_t)wait32.filltime.tv_sec;
1401 wait.filltime.tv_usec = (suseconds_t)wait32.filltime.tv_usec;
1405 if (cmd == VIDEO1394_IOC32_LISTEN_WAIT_BUFFER)
1406 ret = video1394_ioctl(file,
1407 VIDEO1394_IOC_LISTEN_WAIT_BUFFER,
1408 (unsigned long) &wait);
1410 ret = video1394_ioctl(file,
1411 VIDEO1394_IOC_LISTEN_POLL_BUFFER,
1412 (unsigned long) &wait);
1416 wait32.channel = wait.channel;
1417 wait32.buffer = wait.buffer;
1418 wait32.filltime.tv_sec = (int)wait.filltime.tv_sec;
1419 wait32.filltime.tv_usec = (int)wait.filltime.tv_usec;
1421 if (copy_to_user(argp, &wait32, sizeof(wait32)))
1428 static int video1394_w_wait32(struct file *file, unsigned int cmd, unsigned long arg)
1430 struct video1394_wait32 wait32;
1431 struct video1394_wait wait;
1432 mm_segment_t old_fs;
1435 if (copy_from_user(&wait32, (void __user *)arg, sizeof(wait32)))
1438 wait.channel = wait32.channel;
1439 wait.buffer = wait32.buffer;
1440 wait.filltime.tv_sec = (time_t)wait32.filltime.tv_sec;
1441 wait.filltime.tv_usec = (suseconds_t)wait32.filltime.tv_usec;
1445 if (cmd == VIDEO1394_IOC32_LISTEN_QUEUE_BUFFER)
1446 ret = video1394_ioctl(file,
1447 VIDEO1394_IOC_LISTEN_QUEUE_BUFFER,
1448 (unsigned long) &wait);
1450 ret = video1394_ioctl(file,
1451 VIDEO1394_IOC_TALK_WAIT_BUFFER,
1452 (unsigned long) &wait);
1458 static int video1394_queue_buf32(struct file *file, unsigned int cmd, unsigned long arg)
1460 return -EFAULT; /* ??? was there before. */
1462 return video1394_ioctl(file,
1463 VIDEO1394_IOC_TALK_QUEUE_BUFFER, arg);
1466 static long video1394_compat_ioctl(struct file *f, unsigned cmd, unsigned long arg)
1469 case VIDEO1394_IOC_LISTEN_CHANNEL:
1470 case VIDEO1394_IOC_UNLISTEN_CHANNEL:
1471 case VIDEO1394_IOC_TALK_CHANNEL:
1472 case VIDEO1394_IOC_UNTALK_CHANNEL:
1473 return video1394_ioctl(f, cmd, arg);
1475 case VIDEO1394_IOC32_LISTEN_QUEUE_BUFFER:
1476 return video1394_w_wait32(f, cmd, arg);
1477 case VIDEO1394_IOC32_LISTEN_WAIT_BUFFER:
1478 return video1394_wr_wait32(f, cmd, arg);
1479 case VIDEO1394_IOC_TALK_QUEUE_BUFFER:
1480 return video1394_queue_buf32(f, cmd, arg);
1481 case VIDEO1394_IOC32_TALK_WAIT_BUFFER:
1482 return video1394_w_wait32(f, cmd, arg);
1483 case VIDEO1394_IOC32_LISTEN_POLL_BUFFER:
1484 return video1394_wr_wait32(f, cmd, arg);
1486 return -ENOIOCTLCMD;
1490 #endif /* CONFIG_COMPAT */
1492 static void __exit video1394_exit_module (void)
1494 hpsb_unregister_protocol(&video1394_driver);
1496 hpsb_unregister_highlevel(&video1394_highlevel);
1498 devfs_remove(VIDEO1394_DRIVER_NAME);
1499 cdev_del(&video1394_cdev);
1501 PRINT_G(KERN_INFO, "Removed " VIDEO1394_DRIVER_NAME " module");
1504 static int __init video1394_init_module (void)
1508 cdev_init(&video1394_cdev, &video1394_fops);
1509 video1394_cdev.owner = THIS_MODULE;
1510 kobject_set_name(&video1394_cdev.kobj, VIDEO1394_DRIVER_NAME);
1511 ret = cdev_add(&video1394_cdev, IEEE1394_VIDEO1394_DEV, 16);
1513 PRINT_G(KERN_ERR, "video1394: unable to get minor device block");
1517 devfs_mk_dir(VIDEO1394_DRIVER_NAME);
1519 hpsb_register_highlevel(&video1394_highlevel);
1521 ret = hpsb_register_protocol(&video1394_driver);
1523 PRINT_G(KERN_ERR, "video1394: failed to register protocol");
1524 hpsb_unregister_highlevel(&video1394_highlevel);
1525 devfs_remove(VIDEO1394_DRIVER_NAME);
1526 cdev_del(&video1394_cdev);
1530 PRINT_G(KERN_INFO, "Installed " VIDEO1394_DRIVER_NAME " module");
1535 module_init(video1394_init_module);
1536 module_exit(video1394_exit_module);