2 * Copyright (C) 1998-2000 Andre Hedrick <andre@linux-ide.org>
3 * Copyright (C) 1995-1998 Mark Lord
4 * Copyright (C) 2007 Bartlomiej Zolnierkiewicz
6 * May be copied or modified under the terms of the GNU General Public License
9 #include <linux/types.h>
10 #include <linux/kernel.h>
11 #include <linux/pci.h>
12 #include <linux/init.h>
13 #include <linux/interrupt.h>
14 #include <linux/ide.h>
15 #include <linux/dma-mapping.h>
20 * ide_setup_pci_baseregs - place a PCI IDE controller native
21 * @dev: PCI device of interface to switch native
22 * @name: Name of interface
24 * We attempt to place the PCI interface into PCI native mode. If
25 * we succeed the BARs are ok and the controller is in PCI mode.
26 * Returns 0 on success or an errno code.
28 * FIXME: if we program the interface and then fail to set the BARS
29 * we don't switch it back to legacy mode. Do we actually care ??
32 static int ide_setup_pci_baseregs(struct pci_dev *dev, const char *name)
37 * Place both IDE interfaces into PCI "native" mode:
39 if (pci_read_config_byte(dev, PCI_CLASS_PROG, &progif) ||
41 if ((progif & 0xa) != 0xa) {
42 printk(KERN_INFO "%s: device not capable of full "
43 "native PCI mode\n", name);
46 printk("%s: placing both ports into native PCI mode\n", name);
47 (void) pci_write_config_byte(dev, PCI_CLASS_PROG, progif|5);
48 if (pci_read_config_byte(dev, PCI_CLASS_PROG, &progif) ||
50 printk(KERN_ERR "%s: rewrite of PROGIF failed, wanted "
51 "0x%04x, got 0x%04x\n",
52 name, progif|5, progif);
59 #ifdef CONFIG_BLK_DEV_IDEDMA_PCI
60 static void ide_pci_clear_simplex(unsigned long dma_base, const char *name)
62 u8 dma_stat = inb(dma_base + 2);
64 outb(dma_stat & 0x60, dma_base + 2);
65 dma_stat = inb(dma_base + 2);
67 printk(KERN_INFO "%s: simplex device: DMA forced\n", name);
71 * ide_pci_dma_base - setup BMIBA
72 * @hwif: IDE interface
75 * Fetch the DMA Bus-Master-I/O-Base-Address (BMIBA) from PCI space.
78 unsigned long ide_pci_dma_base(ide_hwif_t *hwif, const struct ide_port_info *d)
80 struct pci_dev *dev = to_pci_dev(hwif->dev);
81 unsigned long dma_base = 0;
83 if (hwif->host_flags & IDE_HFLAG_MMIO)
84 return hwif->dma_base;
86 if (hwif->mate && hwif->mate->dma_base) {
87 dma_base = hwif->mate->dma_base - (hwif->channel ? 0 : 8);
89 u8 baridx = (d->host_flags & IDE_HFLAG_CS5520) ? 2 : 4;
91 dma_base = pci_resource_start(dev, baridx);
94 printk(KERN_ERR "%s: DMA base is invalid\n", d->name);
104 EXPORT_SYMBOL_GPL(ide_pci_dma_base);
106 int ide_pci_check_simplex(ide_hwif_t *hwif, const struct ide_port_info *d)
110 if (d->host_flags & (IDE_HFLAG_MMIO | IDE_HFLAG_CS5520))
113 if (d->host_flags & IDE_HFLAG_CLEAR_SIMPLEX) {
114 ide_pci_clear_simplex(hwif->dma_base, d->name);
119 * If the device claims "simplex" DMA, this means that only one of
120 * the two interfaces can be trusted with DMA at any point in time
121 * (so we should enable DMA only on one of the two interfaces).
123 * FIXME: At this point we haven't probed the drives so we can't make
124 * the appropriate decision. Really we should defer this problem until
125 * we tune the drive then try to grab DMA ownership if we want to be
126 * the DMA end. This has to be become dynamic to handle hot-plug.
128 dma_stat = hwif->read_sff_dma_status(hwif);
129 if ((dma_stat & 0x80) && hwif->mate && hwif->mate->dma_base) {
130 printk(KERN_INFO "%s: simplex device: DMA disabled\n", d->name);
136 EXPORT_SYMBOL_GPL(ide_pci_check_simplex);
139 * Set up BM-DMA capability (PnP BIOS should have done this)
141 int ide_pci_set_master(struct pci_dev *dev, const char *name)
145 pci_read_config_word(dev, PCI_COMMAND, &pcicmd);
147 if ((pcicmd & PCI_COMMAND_MASTER) == 0) {
150 if (pci_read_config_word(dev, PCI_COMMAND, &pcicmd) ||
151 (pcicmd & PCI_COMMAND_MASTER) == 0) {
152 printk(KERN_ERR "%s: error updating PCICMD on %s\n",
153 name, pci_name(dev));
160 EXPORT_SYMBOL_GPL(ide_pci_set_master);
161 #endif /* CONFIG_BLK_DEV_IDEDMA_PCI */
163 void ide_setup_pci_noise(struct pci_dev *dev, const struct ide_port_info *d)
165 printk(KERN_INFO "%s: IDE controller (0x%04x:0x%04x rev 0x%02x) at "
166 " PCI slot %s\n", d->name, dev->vendor, dev->device,
167 dev->revision, pci_name(dev));
169 EXPORT_SYMBOL_GPL(ide_setup_pci_noise);
173 * ide_pci_enable - do PCI enables
177 * Enable the IDE PCI device. We attempt to enable the device in full
178 * but if that fails then we only need IO space. The PCI code should
179 * have setup the proper resources for us already for controllers in
182 * Returns zero on success or an error code
185 static int ide_pci_enable(struct pci_dev *dev, const struct ide_port_info *d)
189 if (pci_enable_device(dev)) {
190 ret = pci_enable_device_io(dev);
192 printk(KERN_WARNING "%s: (ide_setup_pci_device:) "
193 "Could not enable device.\n", d->name);
196 printk(KERN_WARNING "%s: BIOS configuration fixed.\n", d->name);
200 * assume all devices can do 32-bit DMA for now, we can add
201 * a DMA mask field to the struct ide_port_info if we need it
202 * (or let lower level driver set the DMA mask)
204 ret = pci_set_dma_mask(dev, DMA_32BIT_MASK);
206 printk(KERN_ERR "%s: can't set dma mask\n", d->name);
210 if (d->host_flags & IDE_HFLAG_SINGLE)
215 if ((d->host_flags & IDE_HFLAG_NO_DMA) == 0) {
216 if (d->host_flags & IDE_HFLAG_CS5520)
222 ret = pci_request_selected_regions(dev, bars, d->name);
224 printk(KERN_ERR "%s: can't reserve resources\n", d->name);
230 * ide_pci_configure - configure an unconfigured device
234 * Enable and configure the PCI device we have been passed.
235 * Returns zero on success or an error code.
238 static int ide_pci_configure(struct pci_dev *dev, const struct ide_port_info *d)
242 * PnP BIOS was *supposed* to have setup this device, but we
243 * can do it ourselves, so long as the BIOS has assigned an IRQ
244 * (or possibly the device is using a "legacy header" for IRQs).
245 * Maybe the user deliberately *disabled* the device,
246 * but we'll eventually ignore it again if no drives respond.
248 if (ide_setup_pci_baseregs(dev, d->name) ||
249 pci_write_config_word(dev, PCI_COMMAND, pcicmd | PCI_COMMAND_IO)) {
250 printk(KERN_INFO "%s: device disabled (BIOS)\n", d->name);
253 if (pci_read_config_word(dev, PCI_COMMAND, &pcicmd)) {
254 printk(KERN_ERR "%s: error accessing PCI regs\n", d->name);
257 if (!(pcicmd & PCI_COMMAND_IO)) {
258 printk(KERN_ERR "%s: unable to enable IDE controller\n", d->name);
265 * ide_pci_check_iomem - check a register is I/O
270 * Checks if a BAR is configured and points to MMIO space. If so,
271 * return an error code. Otherwise return 0
274 static int ide_pci_check_iomem(struct pci_dev *dev, const struct ide_port_info *d,
277 ulong flags = pci_resource_flags(dev, bar);
280 if (!flags || pci_resource_len(dev, bar) == 0)
284 if (flags & IORESOURCE_IO)
292 * ide_hwif_configure - configure an IDE interface
293 * @dev: PCI device holding interface
297 * @hw: hw_regs_t instance corresponding to this port
299 * Perform the initial set up for the hardware interface structure. This
300 * is done per interface port rather than per PCI device. There may be
301 * more than one port per device.
303 * Returns the new hardware interface structure, or NULL on a failure
306 static ide_hwif_t *ide_hwif_configure(struct pci_dev *dev,
307 const struct ide_port_info *d,
308 unsigned int port, int irq,
311 unsigned long ctl = 0, base = 0;
314 if ((d->host_flags & IDE_HFLAG_ISA_PORTS) == 0) {
315 if (ide_pci_check_iomem(dev, d, 2 * port) ||
316 ide_pci_check_iomem(dev, d, 2 * port + 1)) {
317 printk(KERN_ERR "%s: I/O baseregs (BIOS) are reported "
318 "as MEM for port %d!\n", d->name, port);
322 ctl = pci_resource_start(dev, 2*port+1);
323 base = pci_resource_start(dev, 2*port);
325 /* Use default values */
326 ctl = port ? 0x374 : 0x3f4;
327 base = port ? 0x170 : 0x1f0;
331 printk(KERN_ERR "%s: bad PCI BARs for port %d, skipping\n",
336 memset(hw, 0, sizeof(*hw));
339 hw->chipset = d->chipset ? d->chipset : ide_pci;
340 ide_std_init_ports(hw, base, ctl | 2);
342 hwif = ide_find_port_slot(d);
346 hwif->chipset = hw->chipset;
351 #ifdef CONFIG_BLK_DEV_IDEDMA_PCI
353 * ide_hwif_setup_dma - configure DMA interface
354 * @hwif: IDE interface
357 * Set up the DMA base for the interface. Enable the master bits as
358 * necessary and attempt to bring the device DMA into a ready to use
362 int ide_hwif_setup_dma(ide_hwif_t *hwif, const struct ide_port_info *d)
364 struct pci_dev *dev = to_pci_dev(hwif->dev);
366 if ((d->host_flags & IDE_HFLAG_NO_AUTODMA) == 0 ||
367 ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE &&
368 (dev->class & 0x80))) {
369 unsigned long base = ide_pci_dma_base(hwif, d);
374 hwif->dma_base = base;
376 if (ide_pci_check_simplex(hwif, d) < 0)
379 if (ide_pci_set_master(dev, d->name) < 0)
382 if (hwif->host_flags & IDE_HFLAG_MMIO)
383 printk(KERN_INFO " %s: MMIO-DMA\n", hwif->name);
385 printk(KERN_INFO " %s: BM-DMA at 0x%04lx-0x%04lx\n",
386 hwif->name, base, base + 7);
388 hwif->extra_base = base + (hwif->channel ? 8 : 16);
390 if (ide_allocate_dma_engine(hwif))
393 hwif->dma_ops = &sff_dma_ops;
398 #endif /* CONFIG_BLK_DEV_IDEDMA_PCI */
401 * ide_setup_pci_controller - set up IDE PCI
404 * @noisy: verbose flag
405 * @config: returned as 1 if we configured the hardware
407 * Set up the PCI and controller side of the IDE interface. This brings
408 * up the PCI side of the device, checks that the device is enabled
409 * and enables it if need be
412 static int ide_setup_pci_controller(struct pci_dev *dev, const struct ide_port_info *d, int noisy, int *config)
418 ide_setup_pci_noise(dev, d);
420 ret = ide_pci_enable(dev, d);
424 ret = pci_read_config_word(dev, PCI_COMMAND, &pcicmd);
426 printk(KERN_ERR "%s: error accessing PCI regs\n", d->name);
429 if (!(pcicmd & PCI_COMMAND_IO)) { /* is device disabled? */
430 ret = ide_pci_configure(dev, d);
434 printk(KERN_INFO "%s: device enabled (Linux)\n", d->name);
442 * ide_pci_setup_ports - configure ports/devices on PCI IDE
446 * @idx: ATA index table to update
447 * @hw: hw_regs_t instances corresponding to this PCI IDE device
448 * @hws: hw_regs_t pointers table to update
450 * Scan the interfaces attached to this device and do any
451 * necessary per port setup. Attach the devices and ask the
452 * generic DMA layer to do its work for us.
454 * Normally called automaticall from do_ide_pci_setup_device,
455 * but is also used directly as a helper function by some controllers
456 * where the chipset setup is not the default PCI IDE one.
459 void ide_pci_setup_ports(struct pci_dev *dev, const struct ide_port_info *d,
460 int pciirq, u8 *idx, hw_regs_t *hw, hw_regs_t **hws)
462 int channels = (d->host_flags & IDE_HFLAG_SINGLE) ? 1 : 2, port;
467 * Set up the IDE ports
470 for (port = 0; port < channels; ++port) {
471 const ide_pci_enablebit_t *e = &(d->enablebits[port]);
473 if (e->reg && (pci_read_config_byte(dev, e->reg, &tmp) ||
474 (tmp & e->mask) != e->val)) {
475 printk(KERN_INFO "%s: IDE port disabled\n", d->name);
476 continue; /* port not enabled */
479 hwif = ide_hwif_configure(dev, d, port, pciirq, hw + port);
483 *(hws + port) = hw + port;
484 *(idx + port) = hwif->index;
487 EXPORT_SYMBOL_GPL(ide_pci_setup_ports);
490 * ide_setup_pci_device() looks at the primary/secondary interfaces
491 * on a PCI IDE device and, if they are enabled, prepares the IDE driver
492 * for use with them. This generic code works for most PCI chipsets.
494 * One thing that is not standardized is the location of the
495 * primary/secondary interface "enable/disable" bits. For chipsets that
496 * we "know" about, this information is in the struct ide_port_info;
497 * for all other chipsets, we just assume both interfaces are enabled.
499 static int do_ide_setup_pci_device(struct pci_dev *dev,
500 const struct ide_port_info *d,
503 int tried_config = 0;
506 ret = ide_setup_pci_controller(dev, d, noisy, &tried_config);
511 * Can we trust the reported IRQ?
515 /* Is it an "IDE storage" device in non-PCI mode? */
516 if ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE && (dev->class & 5) != 5) {
518 printk(KERN_INFO "%s: not 100%% native mode: "
519 "will probe irqs later\n", d->name);
521 * This allows offboard ide-pci cards the enable a BIOS,
522 * verify interrupt settings of split-mirror pci-config
523 * space, place chipset into init-mode, and/or preserve
524 * an interrupt if the card is not native ide support.
526 ret = d->init_chipset ? d->init_chipset(dev, d->name) : 0;
530 } else if (tried_config) {
532 printk(KERN_INFO "%s: will probe irqs later\n", d->name);
534 } else if (!pciirq) {
536 printk(KERN_WARNING "%s: bad irq (%d): will probe later\n",
540 if (d->init_chipset) {
541 ret = d->init_chipset(dev, d->name);
546 printk(KERN_INFO "%s: 100%% native mode on irq %d\n",
555 int ide_setup_pci_device(struct pci_dev *dev, const struct ide_port_info *d)
557 u8 idx[4] = { 0xff, 0xff, 0xff, 0xff };
558 hw_regs_t hw[4], *hws[] = { NULL, NULL, NULL, NULL };
561 ret = do_ide_setup_pci_device(dev, d, 1);
564 /* FIXME: silent failure can happen */
565 ide_pci_setup_ports(dev, d, ret, &idx[0], &hw[0], &hws[0]);
567 ide_device_add(idx, d, hws);
572 EXPORT_SYMBOL_GPL(ide_setup_pci_device);
574 int ide_setup_pci_devices(struct pci_dev *dev1, struct pci_dev *dev2,
575 const struct ide_port_info *d)
577 struct pci_dev *pdev[] = { dev1, dev2 };
579 hw_regs_t hw[4], *hws[] = { NULL, NULL, NULL, NULL };
580 u8 idx[4] = { 0xff, 0xff, 0xff, 0xff };
582 for (i = 0; i < 2; i++) {
583 ret = do_ide_setup_pci_device(pdev[i], d, !i);
586 * FIXME: Mom, mom, they stole me the helper function to undo
587 * do_ide_setup_pci_device() on the first device!
592 /* FIXME: silent failure can happen */
593 ide_pci_setup_ports(pdev[i], d, ret, &idx[i*2], &hw[i*2],
597 ide_device_add(idx, d, hws);
601 EXPORT_SYMBOL_GPL(ide_setup_pci_devices);