2 * Copyright (C) 1997-1998 Mark Lord <mlord@pobox.com>
3 * Copyright (C) 1998 Eddie C. Dost <ecd@skynet.be>
4 * Copyright (C) 1999-2000 Andre Hedrick <andre@linux-ide.org>
5 * Copyright (C) 2004 Grant Grundler <grundler at parisc-linux.org>
7 * Inspired by an earlier effort from David S. Miller <davem@redhat.com>
10 #include <linux/module.h>
11 #include <linux/types.h>
12 #include <linux/kernel.h>
13 #include <linux/interrupt.h>
14 #include <linux/hdreg.h>
15 #include <linux/pci.h>
16 #include <linux/delay.h>
17 #include <linux/ide.h>
18 #include <linux/init.h>
23 /* SUPERIO 87560 is a PoS chip that NatSem denies exists.
24 * Unfortunately, it's built-in on all Astro-based PA-RISC workstations
25 * which use the integrated NS87514 cell for CD-ROM support.
26 * i.e we have to support for CD-ROM installs.
27 * See drivers/parisc/superio.c for more gory details.
29 #include <asm/superio.h>
31 static unsigned long superio_ide_status[2];
32 static unsigned long superio_ide_select[2];
33 static unsigned long superio_ide_dma_status[2];
35 #define SUPERIO_IDE_MAX_RETRIES 25
37 /* Because of a defect in Super I/O, all reads of the PCI DMA status
38 * registers, IDE status register and the IDE select register need to be
41 static u8 superio_ide_inb (unsigned long port)
43 if (port == superio_ide_status[0] ||
44 port == superio_ide_status[1] ||
45 port == superio_ide_select[0] ||
46 port == superio_ide_select[1] ||
47 port == superio_ide_dma_status[0] ||
48 port == superio_ide_dma_status[1]) {
50 int retries = SUPERIO_IDE_MAX_RETRIES;
52 /* printk(" [ reading port 0x%x with retry ] ", port); */
58 } while (tmp == 0 && retries-- > 0);
66 static u8 superio_read_sff_dma_status(ide_hwif_t *hwif)
68 return superio_ide_inb(hwif->dma_status);
71 static void superio_tf_read(ide_drive_t *drive, ide_task_t *task)
73 struct ide_io_ports *io_ports = &drive->hwif->io_ports;
74 struct ide_taskfile *tf = &task->tf;
76 if (task->tf_flags & IDE_TFLAG_IN_DATA) {
77 u16 data = inw(io_ports->data_addr);
79 tf->data = data & 0xff;
80 tf->hob_data = (data >> 8) & 0xff;
83 /* be sure we're looking at the low order bits */
84 outb(ATA_DEVCTL_OBS & ~0x80, io_ports->ctl_addr);
86 if (task->tf_flags & IDE_TFLAG_IN_NSECT)
87 tf->nsect = inb(io_ports->nsect_addr);
88 if (task->tf_flags & IDE_TFLAG_IN_LBAL)
89 tf->lbal = inb(io_ports->lbal_addr);
90 if (task->tf_flags & IDE_TFLAG_IN_LBAM)
91 tf->lbam = inb(io_ports->lbam_addr);
92 if (task->tf_flags & IDE_TFLAG_IN_LBAH)
93 tf->lbah = inb(io_ports->lbah_addr);
94 if (task->tf_flags & IDE_TFLAG_IN_DEVICE)
95 tf->device = superio_ide_inb(io_ports->device_addr);
97 if (task->tf_flags & IDE_TFLAG_LBA48) {
98 outb(ATA_DEVCTL_OBS | 0x80, io_ports->ctl_addr);
100 if (task->tf_flags & IDE_TFLAG_IN_HOB_FEATURE)
101 tf->hob_feature = inb(io_ports->feature_addr);
102 if (task->tf_flags & IDE_TFLAG_IN_HOB_NSECT)
103 tf->hob_nsect = inb(io_ports->nsect_addr);
104 if (task->tf_flags & IDE_TFLAG_IN_HOB_LBAL)
105 tf->hob_lbal = inb(io_ports->lbal_addr);
106 if (task->tf_flags & IDE_TFLAG_IN_HOB_LBAM)
107 tf->hob_lbam = inb(io_ports->lbam_addr);
108 if (task->tf_flags & IDE_TFLAG_IN_HOB_LBAH)
109 tf->hob_lbah = inb(io_ports->lbah_addr);
113 static void __devinit superio_ide_init_iops (struct hwif_s *hwif)
115 struct pci_dev *pdev = to_pci_dev(hwif->dev);
117 u8 port = hwif->channel, tmp;
119 base = pci_resource_start(pdev, port * 2) & ~3;
120 dmabase = pci_resource_start(pdev, 4) & ~3;
122 superio_ide_status[port] = base + 7;
123 superio_ide_select[port] = base + 6;
124 superio_ide_dma_status[port] = dmabase + (!port ? 2 : 0xa);
126 /* Clear error/interrupt, enable dma */
127 tmp = superio_ide_inb(superio_ide_dma_status[port]);
128 outb(tmp | 0x66, superio_ide_dma_status[port]);
130 hwif->read_sff_dma_status = superio_read_sff_dma_status;
132 hwif->tf_read = superio_tf_read;
134 /* We need to override inb to workaround a SuperIO errata */
135 hwif->INB = superio_ide_inb;
138 static void __devinit init_iops_ns87415(ide_hwif_t *hwif)
140 struct pci_dev *dev = to_pci_dev(hwif->dev);
142 if (PCI_SLOT(dev->devfn) == 0xE)
143 /* Built-in - assume it's under superio. */
144 superio_ide_init_iops(hwif);
148 static unsigned int ns87415_count = 0, ns87415_control[MAX_HWIFS] = { 0 };
151 * This routine either enables/disables (according to drive->present)
152 * the IRQ associated with the port (HWIF(drive)),
153 * and selects either PIO or DMA handshaking for the next I/O operation.
155 static void ns87415_prepare_drive (ide_drive_t *drive, unsigned int use_dma)
157 ide_hwif_t *hwif = HWIF(drive);
158 struct pci_dev *dev = to_pci_dev(hwif->dev);
159 unsigned int bit, other, new, *old = (unsigned int *) hwif->select_data;
162 local_irq_save(flags);
165 /* Adjust IRQ enable bit */
166 bit = 1 << (8 + hwif->channel);
167 new = drive->present ? (new & ~bit) : (new | bit);
169 /* Select PIO or DMA, DMA may only be selected for one drive/channel. */
170 bit = 1 << (20 + drive->select.b.unit + (hwif->channel << 1));
171 other = 1 << (20 + (1 - drive->select.b.unit) + (hwif->channel << 1));
172 new = use_dma ? ((new & ~other) | bit) : (new & ~bit);
178 * Don't change DMA engine settings while Write Buffers
181 (void) pci_read_config_byte(dev, 0x43, &stat);
182 while (stat & 0x03) {
184 (void) pci_read_config_byte(dev, 0x43, &stat);
188 (void) pci_write_config_dword(dev, 0x40, new);
191 * And let things settle...
196 local_irq_restore(flags);
199 static void ns87415_selectproc (ide_drive_t *drive)
201 ns87415_prepare_drive (drive, drive->using_dma);
204 static int ns87415_dma_end(ide_drive_t *drive)
206 ide_hwif_t *hwif = HWIF(drive);
207 u8 dma_stat = 0, dma_cmd = 0;
209 drive->waiting_for_dma = 0;
210 dma_stat = hwif->read_sff_dma_status(hwif);
211 /* get dma command mode */
212 dma_cmd = inb(hwif->dma_command);
214 outb(dma_cmd & ~1, hwif->dma_command);
215 /* from ERRATA: clear the INTR & ERROR bits */
216 dma_cmd = inb(hwif->dma_command);
217 outb(dma_cmd | 6, hwif->dma_command);
218 /* and free any DMA resources */
219 ide_destroy_dmatable(drive);
220 /* verify good DMA status */
221 return (dma_stat & 7) != 4;
224 static int ns87415_dma_setup(ide_drive_t *drive)
226 /* select DMA xfer */
227 ns87415_prepare_drive(drive, 1);
228 if (!ide_dma_setup(drive))
230 /* DMA failed: select PIO xfer */
231 ns87415_prepare_drive(drive, 0);
235 static void __devinit init_hwif_ns87415 (ide_hwif_t *hwif)
237 struct pci_dev *dev = to_pci_dev(hwif->dev);
238 unsigned int ctrl, using_inta;
246 * We cannot probe for IRQ: both ports share common IRQ on INTA.
247 * Also, leave IRQ masked during drive probing, to prevent infinite
248 * interrupts from a potentially floating INTA..
250 * IRQs get unmasked in selectproc when drive is first used.
252 (void) pci_read_config_dword(dev, 0x40, &ctrl);
253 (void) pci_read_config_byte(dev, 0x09, &progif);
254 /* is irq in "native" mode? */
255 using_inta = progif & (1 << (hwif->channel << 1));
257 using_inta = ctrl & (1 << (4 + hwif->channel));
259 hwif->select_data = hwif->mate->select_data;
261 hwif->select_data = (unsigned long)
262 &ns87415_control[ns87415_count++];
263 ctrl |= (1 << 8) | (1 << 9); /* mask both IRQs */
265 ctrl &= ~(1 << 6); /* unmask INTA */
266 *((unsigned int *)hwif->select_data) = ctrl;
267 (void) pci_write_config_dword(dev, 0x40, ctrl);
270 * Set prefetch size to 512 bytes for both ports,
271 * but don't turn on/off prefetching here.
273 pci_write_config_byte(dev, 0x55, 0xee);
277 * XXX: Reset the device, if we don't it will not respond to
278 * SELECT_DRIVE() properly during first ide_probe_port().
281 outb(12, hwif->io_ports.ctl_addr);
283 outb(8, hwif->io_ports.ctl_addr);
286 stat = hwif->INB(hwif->io_ports.status_addr);
289 } while ((stat & BUSY_STAT) && --timeout);
294 hwif->irq = __ide_default_irq(hwif->io_ports.data_addr);
295 else if (!hwif->irq && hwif->mate && hwif->mate->irq)
296 hwif->irq = hwif->mate->irq; /* share IRQ with mate */
301 outb(0x60, hwif->dma_status);
304 static const struct ide_port_ops ns87415_port_ops = {
305 .selectproc = ns87415_selectproc,
308 static const struct ide_dma_ops ns87415_dma_ops = {
309 .dma_host_set = ide_dma_host_set,
310 .dma_setup = ns87415_dma_setup,
311 .dma_exec_cmd = ide_dma_exec_cmd,
312 .dma_start = ide_dma_start,
313 .dma_end = ns87415_dma_end,
314 .dma_test_irq = ide_dma_test_irq,
315 .dma_lost_irq = ide_dma_lost_irq,
316 .dma_timeout = ide_dma_timeout,
319 static const struct ide_port_info ns87415_chipset __devinitdata = {
321 #ifdef CONFIG_SUPERIO
322 .init_iops = init_iops_ns87415,
324 .init_hwif = init_hwif_ns87415,
325 .port_ops = &ns87415_port_ops,
326 .dma_ops = &ns87415_dma_ops,
327 .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA |
328 IDE_HFLAG_NO_ATAPI_DMA,
331 static int __devinit ns87415_init_one(struct pci_dev *dev, const struct pci_device_id *id)
333 return ide_setup_pci_device(dev, &ns87415_chipset);
336 static const struct pci_device_id ns87415_pci_tbl[] = {
337 { PCI_VDEVICE(NS, PCI_DEVICE_ID_NS_87415), 0 },
340 MODULE_DEVICE_TABLE(pci, ns87415_pci_tbl);
342 static struct pci_driver driver = {
343 .name = "NS87415_IDE",
344 .id_table = ns87415_pci_tbl,
345 .probe = ns87415_init_one,
348 static int __init ns87415_ide_init(void)
350 return ide_pci_register_driver(&driver);
353 module_init(ns87415_ide_init);
355 MODULE_AUTHOR("Mark Lord, Eddie Dost, Andre Hedrick");
356 MODULE_DESCRIPTION("PCI driver module for NS87415 IDE");
357 MODULE_LICENSE("GPL");