err.no Git - linux-2.6/blob - drivers/i2c/chips/w83781d.c

   1 /*
   2     w83781d.c - Part of lm_sensors, Linux kernel modules for hardware
   3                 monitoring
   4     Copyright (c) 1998 - 2001  Frodo Looijaard <frodol@dds.nl>,
   5     Philip Edelbrock <phil@netroedge.com>,
   6     and Mark Studebaker <mdsxyz123@yahoo.com>
   7
   8     This program is free software; you can redistribute it and/or modify
   9     it under the terms of the GNU General Public License as published by
  10     the Free Software Foundation; either version 2 of the License, or
  11     (at your option) any later version.
  12
  13     This program is distributed in the hope that it will be useful,
  14     but WITHOUT ANY WARRANTY; without even the implied warranty of
  15     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16     GNU General Public License for more details.
  17
  18     You should have received a copy of the GNU General Public License
  19     along with this program; if not, write to the Free Software
  20     Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21 */
  22
  23 /*
  24     Supports following chips:
  25
  26     Chip        #vin    #fanin  #pwm    #temp   wchipid vendid  i2c     ISA
  27     as99127f    7       3       0       3       0x31    0x12c3  yes     no
  28     as99127f rev.2 (type_name = as99127f)       0x31    0x5ca3  yes     no
  29     w83781d     7       3       0       3       0x10-1  0x5ca3  yes     yes
  30     w83627hf    9       3       2       3       0x21    0x5ca3  yes     yes(LPC)
  31     w83627thf   9       3       2       3       0x90    0x5ca3  no      yes(LPC)
  32     w83782d     9       3       2-4     3       0x30    0x5ca3  yes     yes
  33     w83783s     5-6     3       2       1-2     0x40    0x5ca3  yes     no
  34     w83697hf    8       2       2       2       0x60    0x5ca3  no      yes(LPC)
  35
  36 */
  37
  38 #include <linux/module.h>
  39 #include <linux/init.h>
  40 #include <linux/slab.h>
  41 #include <linux/jiffies.h>
  42 #include <linux/i2c.h>
  43 #include <linux/i2c-sensor.h>
  44 #include <linux/i2c-vid.h>
  45 #include <asm/io.h>
  46 #include "lm75.h"
  47
  48 /* Addresses to scan */
  49 static unsigned short normal_i2c[] = { 0x20, 0x21, 0x22, 0x23, 0x24, 0x25,
  50                                         0x26, 0x27, 0x28, 0x29, 0x2a, 0x2b,
  51                                         0x2c, 0x2d, 0x2e, 0x2f, I2C_CLIENT_END };
  52 static unsigned int normal_isa[] = { 0x0290, I2C_CLIENT_ISA_END };
  53
  54 /* Insmod parameters */
  55 SENSORS_INSMOD_6(w83781d, w83782d, w83783s, w83627hf, as99127f, w83697hf);
  56 I2C_CLIENT_MODULE_PARM(force_subclients, "List of subclient addresses: "
  57                     "{bus, clientaddr, subclientaddr1, subclientaddr2}");
  58
  59 static int init = 1;
  60 module_param(init, bool, 0);
  61 MODULE_PARM_DESC(init, "Set to zero to bypass chip initialization");
  62
  63 /* Constants specified below */
  64
  65 /* Length of ISA address segment */
  66 #define W83781D_EXTENT                  8
  67
  68 /* Where are the ISA address/data registers relative to the base address */
  69 #define W83781D_ADDR_REG_OFFSET         5
  70 #define W83781D_DATA_REG_OFFSET         6
  71
  72 /* The W83781D registers */
  73 /* The W83782D registers for nr=7,8 are in bank 5 */
  74 #define W83781D_REG_IN_MAX(nr)          ((nr < 7) ? (0x2b + (nr) * 2) : \
  75                                                     (0x554 + (((nr) - 7) * 2)))
  76 #define W83781D_REG_IN_MIN(nr)          ((nr < 7) ? (0x2c + (nr) * 2) : \
  77                                                     (0x555 + (((nr) - 7) * 2)))
  78 #define W83781D_REG_IN(nr)              ((nr < 7) ? (0x20 + (nr)) : \
  79                                                     (0x550 + (nr) - 7))
  80
  81 #define W83781D_REG_FAN_MIN(nr)         (0x3a + (nr))
  82 #define W83781D_REG_FAN(nr)             (0x27 + (nr))
  83
  84 #define W83781D_REG_BANK                0x4E
  85 #define W83781D_REG_TEMP2_CONFIG        0x152
  86 #define W83781D_REG_TEMP3_CONFIG        0x252
  87 #define W83781D_REG_TEMP(nr)            ((nr == 3) ? (0x0250) : \
  88                                         ((nr == 2) ? (0x0150) : \
  89                                                      (0x27)))
  90 #define W83781D_REG_TEMP_HYST(nr)       ((nr == 3) ? (0x253) : \
  91                                         ((nr == 2) ? (0x153) : \
  92                                                      (0x3A)))
  93 #define W83781D_REG_TEMP_OVER(nr)       ((nr == 3) ? (0x255) : \
  94                                         ((nr == 2) ? (0x155) : \
  95                                                      (0x39)))
  96
  97 #define W83781D_REG_CONFIG              0x40
  98 #define W83781D_REG_ALARM1              0x41
  99 #define W83781D_REG_ALARM2              0x42
 100 #define W83781D_REG_ALARM3              0x450   /* not on W83781D */
 101
 102 #define W83781D_REG_IRQ                 0x4C
 103 #define W83781D_REG_BEEP_CONFIG         0x4D
 104 #define W83781D_REG_BEEP_INTS1          0x56
 105 #define W83781D_REG_BEEP_INTS2          0x57
 106 #define W83781D_REG_BEEP_INTS3          0x453   /* not on W83781D */
 107
 108 #define W83781D_REG_VID_FANDIV          0x47
 109
 110 #define W83781D_REG_CHIPID              0x49
 111 #define W83781D_REG_WCHIPID             0x58
 112 #define W83781D_REG_CHIPMAN             0x4F
 113 #define W83781D_REG_PIN                 0x4B
 114
 115 /* 782D/783S only */
 116 #define W83781D_REG_VBAT                0x5D
 117
 118 /* PWM 782D (1-4) and 783S (1-2) only */
 119 #define W83781D_REG_PWM1                0x5B    /* 782d and 783s/627hf datasheets disagree */
 120                                                 /* on which is which; */
 121 #define W83781D_REG_PWM2                0x5A    /* We follow the 782d convention here, */
 122                                                 /* However 782d is probably wrong. */
 123 #define W83781D_REG_PWM3                0x5E
 124 #define W83781D_REG_PWM4                0x5F
 125 #define W83781D_REG_PWMCLK12            0x5C
 126 #define W83781D_REG_PWMCLK34            0x45C
 127 static const u8 regpwm[] = { W83781D_REG_PWM1, W83781D_REG_PWM2,
 128         W83781D_REG_PWM3, W83781D_REG_PWM4
 129 };
 130
 131 #define W83781D_REG_PWM(nr)             (regpwm[(nr) - 1])
 132
 133 #define W83781D_REG_I2C_ADDR            0x48
 134 #define W83781D_REG_I2C_SUBADDR         0x4A
 135
 136 /* The following are undocumented in the data sheets however we
 137    received the information in an email from Winbond tech support */
 138 /* Sensor selection - not on 781d */
 139 #define W83781D_REG_SCFG1               0x5D
 140 static const u8 BIT_SCFG1[] = { 0x02, 0x04, 0x08 };
 141
 142 #define W83781D_REG_SCFG2               0x59
 143 static const u8 BIT_SCFG2[] = { 0x10, 0x20, 0x40 };
 144
 145 #define W83781D_DEFAULT_BETA            3435
 146
 147 /* RT Table registers */
 148 #define W83781D_REG_RT_IDX              0x50
 149 #define W83781D_REG_RT_VAL              0x51
 150
 151 /* Conversions. Rounding and limit checking is only done on the TO_REG
 152    variants. Note that you should be a bit careful with which arguments
 153    these macros are called: arguments may be evaluated more than once.
 154    Fixing this is just not worth it. */
 155 #define IN_TO_REG(val)                  (SENSORS_LIMIT((((val) * 10 + 8)/16),0,255))
 156 #define IN_FROM_REG(val)                (((val) * 16) / 10)
 157
 158 static inline u8
 159 FAN_TO_REG(long rpm, int div)
 160 {
 161         if (rpm == 0)
 162                 return 255;
 163         rpm = SENSORS_LIMIT(rpm, 1, 1000000);
 164         return SENSORS_LIMIT((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
 165 }
 166
 167 #define FAN_FROM_REG(val,div)           ((val) == 0   ? -1 : \
 168                                         ((val) == 255 ? 0 : \
 169                                                         1350000 / ((val) * (div))))
 170
 171 #define TEMP_TO_REG(val)                (SENSORS_LIMIT(((val) < 0 ? (val)+0x100*1000 \
 172                                                 : (val)) / 1000, 0, 0xff))
 173 #define TEMP_FROM_REG(val)              (((val) & 0x80 ? (val)-0x100 : (val)) * 1000)
 174
 175 #define PWM_FROM_REG(val)               (val)
 176 #define PWM_TO_REG(val)                 (SENSORS_LIMIT((val),0,255))
 177 #define BEEP_MASK_FROM_REG(val,type)    ((type) == as99127f ? \
 178                                          (val) ^ 0x7fff : (val))
 179 #define BEEP_MASK_TO_REG(val,type)      ((type) == as99127f ? \
 180                                          (~(val)) & 0x7fff : (val) & 0xffffff)
 181
 182 #define BEEP_ENABLE_TO_REG(val)         ((val) ? 1 : 0)
 183 #define BEEP_ENABLE_FROM_REG(val)       ((val) ? 1 : 0)
 184
 185 #define DIV_FROM_REG(val)               (1 << (val))
 186
 187 static inline u8
 188 DIV_TO_REG(long val, enum chips type)
 189 {
 190         int i;
 191         val = SENSORS_LIMIT(val, 1,
 192                             ((type == w83781d
 193                               || type == as99127f) ? 8 : 128)) >> 1;
 194         for (i = 0; i < 7; i++) {
 195                 if (val == 0)
 196                         break;
 197                 val >>= 1;
 198         }
 199         return ((u8) i);
 200 }
 201
 202 /* There are some complications in a module like this. First off, W83781D chips
 203    may be both present on the SMBus and the ISA bus, and we have to handle
 204    those cases separately at some places. Second, there might be several
 205    W83781D chips available (well, actually, that is probably never done; but
 206    it is a clean illustration of how to handle a case like that). Finally,
 207    a specific chip may be attached to *both* ISA and SMBus, and we would
 208    not like to detect it double. Fortunately, in the case of the W83781D at
 209    least, a register tells us what SMBus address we are on, so that helps
 210    a bit - except if there could be more than one SMBus. Groan. No solution
 211    for this yet. */
 212
 213 /* This module may seem overly long and complicated. In fact, it is not so
 214    bad. Quite a lot of bookkeeping is done. A real driver can often cut
 215    some corners. */
 216
 217 /* For each registered W83781D, we need to keep some data in memory. That
 218    data is pointed to by w83781d_list[NR]->data. The structure itself is
 219    dynamically allocated, at the same time when a new w83781d client is
 220    allocated. */
 221 struct w83781d_data {
 222         struct i2c_client client;
 223         struct semaphore lock;
 224         enum chips type;
 225
 226         struct semaphore update_lock;
 227         char valid;             /* !=0 if following fields are valid */
 228         unsigned long last_updated;     /* In jiffies */
 229
 230         struct i2c_client *lm75[2];     /* for secondary I2C addresses */
 231         /* array of 2 pointers to subclients */
 232
 233         u8 in[9];               /* Register value - 8 & 9 for 782D only */
 234         u8 in_max[9];           /* Register value - 8 & 9 for 782D only */
 235         u8 in_min[9];           /* Register value - 8 & 9 for 782D only */
 236         u8 fan[3];              /* Register value */
 237         u8 fan_min[3];          /* Register value */
 238         u8 temp;
 239         u8 temp_max;            /* Register value */
 240         u8 temp_max_hyst;       /* Register value */
 241         u16 temp_add[2];        /* Register value */
 242         u16 temp_max_add[2];    /* Register value */
 243         u16 temp_max_hyst_add[2];       /* Register value */
 244         u8 fan_div[3];          /* Register encoding, shifted right */
 245         u8 vid;                 /* Register encoding, combined */
 246         u32 alarms;             /* Register encoding, combined */
 247         u32 beep_mask;          /* Register encoding, combined */
 248         u8 beep_enable;         /* Boolean */
 249         u8 pwm[4];              /* Register value */
 250         u8 pwmenable[4];        /* Boolean */
 251         u16 sens[3];            /* 782D/783S only.
 252                                    1 = pentium diode; 2 = 3904 diode;
 253                                    3000-5000 = thermistor beta.
 254                                    Default = 3435.
 255                                    Other Betas unimplemented */
 256         u8 vrm;
 257 };
 258
 259 static int w83781d_attach_adapter(struct i2c_adapter *adapter);
 260 static int w83781d_detect(struct i2c_adapter *adapter, int address, int kind);
 261 static int w83781d_detach_client(struct i2c_client *client);
 262
 263 static int w83781d_read_value(struct i2c_client *client, u16 register);
 264 static int w83781d_write_value(struct i2c_client *client, u16 register,
 265                                u16 value);
 266 static struct w83781d_data *w83781d_update_device(struct device *dev);
 267 static void w83781d_init_client(struct i2c_client *client);
 268
 269 static struct i2c_driver w83781d_driver = {
 270         .owner = THIS_MODULE,
 271         .name = "w83781d",
 272         .id = I2C_DRIVERID_W83781D,
 273         .flags = I2C_DF_NOTIFY,
 274         .attach_adapter = w83781d_attach_adapter,
 275         .detach_client = w83781d_detach_client,
 276 };
 277
 278 /* following are the sysfs callback functions */
 279 #define show_in_reg(reg) \
 280 static ssize_t show_##reg (struct device *dev, char *buf, int nr) \
 281 { \
 282         struct w83781d_data *data = w83781d_update_device(dev); \
 283         return sprintf(buf,"%ld\n", (long)IN_FROM_REG(data->reg[nr] * 10)); \
 284 }
 285 show_in_reg(in);
 286 show_in_reg(in_min);
 287 show_in_reg(in_max);
 288
 289 #define store_in_reg(REG, reg) \
 290 static ssize_t store_in_##reg (struct device *dev, const char *buf, size_t count, int nr) \
 291 { \
 292         struct i2c_client *client = to_i2c_client(dev); \
 293         struct w83781d_data *data = i2c_get_clientdata(client); \
 294         u32 val; \
 295          \
 296         val = simple_strtoul(buf, NULL, 10) / 10; \
 297          \
 298         down(&data->update_lock); \
 299         data->in_##reg[nr] = IN_TO_REG(val); \
 300         w83781d_write_value(client, W83781D_REG_IN_##REG(nr), data->in_##reg[nr]); \
 301          \
 302         up(&data->update_lock); \
 303         return count; \
 304 }
 305 store_in_reg(MIN, min);
 306 store_in_reg(MAX, max);
 307
 308 #define sysfs_in_offset(offset) \
 309 static ssize_t \
 310 show_regs_in_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
 311 { \
 312         return show_in(dev, buf, offset); \
 313 } \
 314 static DEVICE_ATTR(in##offset##_input, S_IRUGO, show_regs_in_##offset, NULL);
 315
 316 #define sysfs_in_reg_offset(reg, offset) \
 317 static ssize_t show_regs_in_##reg##offset (struct device *dev, struct device_attribute *attr, char *buf) \
 318 { \
 319         return show_in_##reg (dev, buf, offset); \
 320 } \
 321 static ssize_t store_regs_in_##reg##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
 322 { \
 323         return store_in_##reg (dev, buf, count, offset); \
 324 } \
 325 static DEVICE_ATTR(in##offset##_##reg, S_IRUGO| S_IWUSR, show_regs_in_##reg##offset, store_regs_in_##reg##offset);
 326
 327 #define sysfs_in_offsets(offset) \
 328 sysfs_in_offset(offset); \
 329 sysfs_in_reg_offset(min, offset); \
 330 sysfs_in_reg_offset(max, offset);
 331
 332 sysfs_in_offsets(0);
 333 sysfs_in_offsets(1);
 334 sysfs_in_offsets(2);
 335 sysfs_in_offsets(3);
 336 sysfs_in_offsets(4);
 337 sysfs_in_offsets(5);
 338 sysfs_in_offsets(6);
 339 sysfs_in_offsets(7);
 340 sysfs_in_offsets(8);
 341
 342 #define device_create_file_in(client, offset) \
 343 do { \
 344 device_create_file(&client->dev, &dev_attr_in##offset##_input); \
 345 device_create_file(&client->dev, &dev_attr_in##offset##_min); \
 346 device_create_file(&client->dev, &dev_attr_in##offset##_max); \
 347 } while (0)
 348
 349 #define show_fan_reg(reg) \
 350 static ssize_t show_##reg (struct device *dev, char *buf, int nr) \
 351 { \
 352         struct w83781d_data *data = w83781d_update_device(dev); \
 353         return sprintf(buf,"%ld\n", \
 354                 FAN_FROM_REG(data->reg[nr-1], (long)DIV_FROM_REG(data->fan_div[nr-1]))); \
 355 }
 356 show_fan_reg(fan);
 357 show_fan_reg(fan_min);
 358
 359 static ssize_t
 360 store_fan_min(struct device *dev, const char *buf, size_t count, int nr)
 361 {
 362         struct i2c_client *client = to_i2c_client(dev);
 363         struct w83781d_data *data = i2c_get_clientdata(client);
 364         u32 val;
 365
 366         val = simple_strtoul(buf, NULL, 10);
 367
 368         down(&data->update_lock);
 369         data->fan_min[nr - 1] =
 370             FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr - 1]));
 371         w83781d_write_value(client, W83781D_REG_FAN_MIN(nr),
 372                             data->fan_min[nr - 1]);
 373
 374         up(&data->update_lock);
 375         return count;
 376 }
 377
 378 #define sysfs_fan_offset(offset) \
 379 static ssize_t show_regs_fan_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
 380 { \
 381         return show_fan(dev, buf, offset); \
 382 } \
 383 static DEVICE_ATTR(fan##offset##_input, S_IRUGO, show_regs_fan_##offset, NULL);
 384
 385 #define sysfs_fan_min_offset(offset) \
 386 static ssize_t show_regs_fan_min##offset (struct device *dev, struct device_attribute *attr, char *buf) \
 387 { \
 388         return show_fan_min(dev, buf, offset); \
 389 } \
 390 static ssize_t store_regs_fan_min##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
 391 { \
 392         return store_fan_min(dev, buf, count, offset); \
 393 } \
 394 static DEVICE_ATTR(fan##offset##_min, S_IRUGO | S_IWUSR, show_regs_fan_min##offset, store_regs_fan_min##offset);
 395
 396 sysfs_fan_offset(1);
 397 sysfs_fan_min_offset(1);
 398 sysfs_fan_offset(2);
 399 sysfs_fan_min_offset(2);
 400 sysfs_fan_offset(3);
 401 sysfs_fan_min_offset(3);
 402
 403 #define device_create_file_fan(client, offset) \
 404 do { \
 405 device_create_file(&client->dev, &dev_attr_fan##offset##_input); \
 406 device_create_file(&client->dev, &dev_attr_fan##offset##_min); \
 407 } while (0)
 408
 409 #define show_temp_reg(reg) \
 410 static ssize_t show_##reg (struct device *dev, char *buf, int nr) \
 411 { \
 412         struct w83781d_data *data = w83781d_update_device(dev); \
 413         if (nr >= 2) {  /* TEMP2 and TEMP3 */ \
 414                 return sprintf(buf,"%d\n", \
 415                         LM75_TEMP_FROM_REG(data->reg##_add[nr-2])); \
 416         } else {        /* TEMP1 */ \
 417                 return sprintf(buf,"%ld\n", (long)TEMP_FROM_REG(data->reg)); \
 418         } \
 419 }
 420 show_temp_reg(temp);
 421 show_temp_reg(temp_max);
 422 show_temp_reg(temp_max_hyst);
 423
 424 #define store_temp_reg(REG, reg) \
 425 static ssize_t store_temp_##reg (struct device *dev, const char *buf, size_t count, int nr) \
 426 { \
 427         struct i2c_client *client = to_i2c_client(dev); \
 428         struct w83781d_data *data = i2c_get_clientdata(client); \
 429         s32 val; \
 430          \
 431         val = simple_strtol(buf, NULL, 10); \
 432          \
 433         down(&data->update_lock); \
 434          \
 435         if (nr >= 2) {  /* TEMP2 and TEMP3 */ \
 436                 data->temp_##reg##_add[nr-2] = LM75_TEMP_TO_REG(val); \
 437                 w83781d_write_value(client, W83781D_REG_TEMP_##REG(nr), \
 438                                 data->temp_##reg##_add[nr-2]); \
 439         } else {        /* TEMP1 */ \
 440                 data->temp_##reg = TEMP_TO_REG(val); \
 441                 w83781d_write_value(client, W83781D_REG_TEMP_##REG(nr), \
 442                         data->temp_##reg); \
 443         } \
 444          \
 445         up(&data->update_lock); \
 446         return count; \
 447 }
 448 store_temp_reg(OVER, max);
 449 store_temp_reg(HYST, max_hyst);
 450
 451 #define sysfs_temp_offset(offset) \
 452 static ssize_t \
 453 show_regs_temp_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
 454 { \
 455         return show_temp(dev, buf, offset); \
 456 } \
 457 static DEVICE_ATTR(temp##offset##_input, S_IRUGO, show_regs_temp_##offset, NULL);
 458
 459 #define sysfs_temp_reg_offset(reg, offset) \
 460 static ssize_t show_regs_temp_##reg##offset (struct device *dev, struct device_attribute *attr, char *buf) \
 461 { \
 462         return show_temp_##reg (dev, buf, offset); \
 463 } \
 464 static ssize_t store_regs_temp_##reg##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
 465 { \
 466         return store_temp_##reg (dev, buf, count, offset); \
 467 } \
 468 static DEVICE_ATTR(temp##offset##_##reg, S_IRUGO| S_IWUSR, show_regs_temp_##reg##offset, store_regs_temp_##reg##offset);
 469
 470 #define sysfs_temp_offsets(offset) \
 471 sysfs_temp_offset(offset); \
 472 sysfs_temp_reg_offset(max, offset); \
 473 sysfs_temp_reg_offset(max_hyst, offset);
 474
 475 sysfs_temp_offsets(1);
 476 sysfs_temp_offsets(2);
 477 sysfs_temp_offsets(3);
 478
 479 #define device_create_file_temp(client, offset) \
 480 do { \
 481 device_create_file(&client->dev, &dev_attr_temp##offset##_input); \
 482 device_create_file(&client->dev, &dev_attr_temp##offset##_max); \
 483 device_create_file(&client->dev, &dev_attr_temp##offset##_max_hyst); \
 484 } while (0)
 485
 486 static ssize_t
 487 show_vid_reg(struct device *dev, struct device_attribute *attr, char *buf)
 488 {
 489         struct w83781d_data *data = w83781d_update_device(dev);
 490         return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm));
 491 }
 492
 493 static
 494 DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
 495 #define device_create_file_vid(client) \
 496 device_create_file(&client->dev, &dev_attr_cpu0_vid);
 497 static ssize_t
 498 show_vrm_reg(struct device *dev, struct device_attribute *attr, char *buf)
 499 {
 500         struct w83781d_data *data = w83781d_update_device(dev);
 501         return sprintf(buf, "%ld\n", (long) data->vrm);
 502 }
 503
 504 static ssize_t
 505 store_vrm_reg(struct device *dev, struct device_attribute *attr, const char *buf, size_t count)
 506 {
 507         struct i2c_client *client = to_i2c_client(dev);
 508         struct w83781d_data *data = i2c_get_clientdata(client);
 509         u32 val;
 510
 511         val = simple_strtoul(buf, NULL, 10);
 512         data->vrm = val;
 513
 514         return count;
 515 }
 516
 517 static
 518 DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
 519 #define device_create_file_vrm(client) \
 520 device_create_file(&client->dev, &dev_attr_vrm);
 521 static ssize_t
 522 show_alarms_reg(struct device *dev, struct device_attribute *attr, char *buf)
 523 {
 524         struct w83781d_data *data = w83781d_update_device(dev);
 525         return sprintf(buf, "%u\n", data->alarms);
 526 }
 527
 528 static
 529 DEVICE_ATTR(alarms, S_IRUGO, show_alarms_reg, NULL);
 530 #define device_create_file_alarms(client) \
 531 device_create_file(&client->dev, &dev_attr_alarms);
 532 static ssize_t show_beep_mask (struct device *dev, struct device_attribute *attr, char *buf)
 533 {
 534         struct w83781d_data *data = w83781d_update_device(dev);
 535         return sprintf(buf, "%ld\n",
 536                        (long)BEEP_MASK_FROM_REG(data->beep_mask, data->type));
 537 }
 538 static ssize_t show_beep_enable (struct device *dev, struct device_attribute *attr, char *buf)
 539 {
 540         struct w83781d_data *data = w83781d_update_device(dev);
 541         return sprintf(buf, "%ld\n",
 542                        (long)BEEP_ENABLE_FROM_REG(data->beep_enable));
 543 }
 544
 545 #define BEEP_ENABLE                     0       /* Store beep_enable */
 546 #define BEEP_MASK                       1       /* Store beep_mask */
 547
 548 static ssize_t
 549 store_beep_reg(struct device *dev, const char *buf, size_t count,
 550                int update_mask)
 551 {
 552         struct i2c_client *client = to_i2c_client(dev);
 553         struct w83781d_data *data = i2c_get_clientdata(client);
 554         u32 val, val2;
 555
 556         val = simple_strtoul(buf, NULL, 10);
 557
 558         down(&data->update_lock);
 559
 560         if (update_mask == BEEP_MASK) { /* We are storing beep_mask */
 561                 data->beep_mask = BEEP_MASK_TO_REG(val, data->type);
 562                 w83781d_write_value(client, W83781D_REG_BEEP_INTS1,
 563                                     data->beep_mask & 0xff);
 564
 565                 if ((data->type != w83781d) && (data->type != as99127f)) {
 566                         w83781d_write_value(client, W83781D_REG_BEEP_INTS3,
 567                                             ((data->beep_mask) >> 16) & 0xff);
 568                 }
 569
 570                 val2 = (data->beep_mask >> 8) & 0x7f;
 571         } else {                /* We are storing beep_enable */
 572                 val2 = w83781d_read_value(client, W83781D_REG_BEEP_INTS2) & 0x7f;
 573                 data->beep_enable = BEEP_ENABLE_TO_REG(val);
 574         }
 575
 576         w83781d_write_value(client, W83781D_REG_BEEP_INTS2,
 577                             val2 | data->beep_enable << 7);
 578
 579         up(&data->update_lock);
 580         return count;
 581 }
 582
 583 #define sysfs_beep(REG, reg) \
 584 static ssize_t show_regs_beep_##reg (struct device *dev, struct device_attribute *attr, char *buf) \
 585 { \
 586         return show_beep_##reg(dev, attr, buf); \
 587 } \
 588 static ssize_t store_regs_beep_##reg (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
 589 { \
 590         return store_beep_reg(dev, buf, count, BEEP_##REG); \
 591 } \
 592 static DEVICE_ATTR(beep_##reg, S_IRUGO | S_IWUSR, show_regs_beep_##reg, store_regs_beep_##reg);
 593
 594 sysfs_beep(ENABLE, enable);
 595 sysfs_beep(MASK, mask);
 596
 597 #define device_create_file_beep(client) \
 598 do { \
 599 device_create_file(&client->dev, &dev_attr_beep_enable); \
 600 device_create_file(&client->dev, &dev_attr_beep_mask); \
 601 } while (0)
 602
 603 static ssize_t
 604 show_fan_div_reg(struct device *dev, char *buf, int nr)
 605 {
 606         struct w83781d_data *data = w83781d_update_device(dev);
 607         return sprintf(buf, "%ld\n",
 608                        (long) DIV_FROM_REG(data->fan_div[nr - 1]));
 609 }
 610
 611 /* Note: we save and restore the fan minimum here, because its value is
 612    determined in part by the fan divisor.  This follows the principle of
 613    least suprise; the user doesn't expect the fan minimum to change just
 614    because the divisor changed. */
 615 static ssize_t
 616 store_fan_div_reg(struct device *dev, const char *buf, size_t count, int nr)
 617 {
 618         struct i2c_client *client = to_i2c_client(dev);
 619         struct w83781d_data *data = i2c_get_clientdata(client);
 620         unsigned long min;
 621         u8 reg;
 622         unsigned long val = simple_strtoul(buf, NULL, 10);
 623
 624         down(&data->update_lock);
 625
 626         /* Save fan_min */
 627         min = FAN_FROM_REG(data->fan_min[nr],
 628                            DIV_FROM_REG(data->fan_div[nr]));
 629
 630         data->fan_div[nr] = DIV_TO_REG(val, data->type);
 631
 632         reg = (w83781d_read_value(client, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV)
 633                & (nr==0 ? 0xcf : 0x3f))
 634             | ((data->fan_div[nr] & 0x03) << (nr==0 ? 4 : 6));
 635         w83781d_write_value(client, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV, reg);
 636
 637         /* w83781d and as99127f don't have extended divisor bits */
 638         if (data->type != w83781d && data->type != as99127f) {
 639                 reg = (w83781d_read_value(client, W83781D_REG_VBAT)
 640                        & ~(1 << (5 + nr)))
 641                     | ((data->fan_div[nr] & 0x04) << (3 + nr));
 642                 w83781d_write_value(client, W83781D_REG_VBAT, reg);
 643         }
 644
 645         /* Restore fan_min */
 646         data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
 647         w83781d_write_value(client, W83781D_REG_FAN_MIN(nr+1), data->fan_min[nr]);
 648
 649         up(&data->update_lock);
 650         return count;
 651 }
 652
 653 #define sysfs_fan_div(offset) \
 654 static ssize_t show_regs_fan_div_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
 655 { \
 656         return show_fan_div_reg(dev, buf, offset); \
 657 } \
 658 static ssize_t store_regs_fan_div_##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
 659 { \
 660         return store_fan_div_reg(dev, buf, count, offset - 1); \
 661 } \
 662 static DEVICE_ATTR(fan##offset##_div, S_IRUGO | S_IWUSR, show_regs_fan_div_##offset, store_regs_fan_div_##offset);
 663
 664 sysfs_fan_div(1);
 665 sysfs_fan_div(2);
 666 sysfs_fan_div(3);
 667
 668 #define device_create_file_fan_div(client, offset) \
 669 do { \
 670 device_create_file(&client->dev, &dev_attr_fan##offset##_div); \
 671 } while (0)
 672
 673 static ssize_t
 674 show_pwm_reg(struct device *dev, char *buf, int nr)
 675 {
 676         struct w83781d_data *data = w83781d_update_device(dev);
 677         return sprintf(buf, "%ld\n", (long) PWM_FROM_REG(data->pwm[nr - 1]));
 678 }
 679
 680 static ssize_t
 681 show_pwmenable_reg(struct device *dev, char *buf, int nr)
 682 {
 683         struct w83781d_data *data = w83781d_update_device(dev);
 684         return sprintf(buf, "%ld\n", (long) data->pwmenable[nr - 1]);
 685 }
 686
 687 static ssize_t
 688 store_pwm_reg(struct device *dev, const char *buf, size_t count, int nr)
 689 {
 690         struct i2c_client *client = to_i2c_client(dev);
 691         struct w83781d_data *data = i2c_get_clientdata(client);
 692         u32 val;
 693
 694         val = simple_strtoul(buf, NULL, 10);
 695
 696         down(&data->update_lock);
 697         data->pwm[nr - 1] = PWM_TO_REG(val);
 698         w83781d_write_value(client, W83781D_REG_PWM(nr), data->pwm[nr - 1]);
 699         up(&data->update_lock);
 700         return count;
 701 }
 702
 703 static ssize_t
 704 store_pwmenable_reg(struct device *dev, const char *buf, size_t count, int nr)
 705 {
 706         struct i2c_client *client = to_i2c_client(dev);
 707         struct w83781d_data *data = i2c_get_clientdata(client);
 708         u32 val, reg;
 709
 710         val = simple_strtoul(buf, NULL, 10);
 711
 712         down(&data->update_lock);
 713
 714         switch (val) {
 715         case 0:
 716         case 1:
 717                 reg = w83781d_read_value(client, W83781D_REG_PWMCLK12);
 718                 w83781d_write_value(client, W83781D_REG_PWMCLK12,
 719                                     (reg & 0xf7) | (val << 3));
 720
 721                 reg = w83781d_read_value(client, W83781D_REG_BEEP_CONFIG);
 722                 w83781d_write_value(client, W83781D_REG_BEEP_CONFIG,
 723                                     (reg & 0xef) | (!val << 4));
 724
 725                 data->pwmenable[nr - 1] = val;
 726                 break;
 727
 728         default:
 729                 up(&data->update_lock);
 730                 return -EINVAL;
 731         }
 732
 733         up(&data->update_lock);
 734         return count;
 735 }
 736
 737 #define sysfs_pwm(offset) \
 738 static ssize_t show_regs_pwm_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
 739 { \
 740         return show_pwm_reg(dev, buf, offset); \
 741 } \
 742 static ssize_t store_regs_pwm_##offset (struct device *dev, struct device_attribute *attr, \
 743                 const char *buf, size_t count) \
 744 { \
 745         return store_pwm_reg(dev, buf, count, offset); \
 746 } \
 747 static DEVICE_ATTR(pwm##offset, S_IRUGO | S_IWUSR, \
 748                 show_regs_pwm_##offset, store_regs_pwm_##offset);
 749
 750 #define sysfs_pwmenable(offset) \
 751 static ssize_t show_regs_pwmenable_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
 752 { \
 753         return show_pwmenable_reg(dev, buf, offset); \
 754 } \
 755 static ssize_t store_regs_pwmenable_##offset (struct device *dev, struct device_attribute *attr, \
 756                 const char *buf, size_t count) \
 757 { \
 758         return store_pwmenable_reg(dev, buf, count, offset); \
 759 } \
 760 static DEVICE_ATTR(pwm##offset##_enable, S_IRUGO | S_IWUSR, \
 761                 show_regs_pwmenable_##offset, store_regs_pwmenable_##offset);
 762
 763 sysfs_pwm(1);
 764 sysfs_pwm(2);
 765 sysfs_pwmenable(2);             /* only PWM2 can be enabled/disabled */
 766 sysfs_pwm(3);
 767 sysfs_pwm(4);
 768
 769 #define device_create_file_pwm(client, offset) \
 770 do { \
 771 device_create_file(&client->dev, &dev_attr_pwm##offset); \
 772 } while (0)
 773
 774 #define device_create_file_pwmenable(client, offset) \
 775 do { \
 776 device_create_file(&client->dev, &dev_attr_pwm##offset##_enable); \
 777 } while (0)
 778
 779 static ssize_t
 780 show_sensor_reg(struct device *dev, char *buf, int nr)
 781 {
 782         struct w83781d_data *data = w83781d_update_device(dev);
 783         return sprintf(buf, "%ld\n", (long) data->sens[nr - 1]);
 784 }
 785
 786 static ssize_t
 787 store_sensor_reg(struct device *dev, const char *buf, size_t count, int nr)
 788 {
 789         struct i2c_client *client = to_i2c_client(dev);
 790         struct w83781d_data *data = i2c_get_clientdata(client);
 791         u32 val, tmp;
 792
 793         val = simple_strtoul(buf, NULL, 10);
 794
 795         down(&data->update_lock);
 796
 797         switch (val) {
 798         case 1:         /* PII/Celeron diode */
 799                 tmp = w83781d_read_value(client, W83781D_REG_SCFG1);
 800                 w83781d_write_value(client, W83781D_REG_SCFG1,
 801                                     tmp | BIT_SCFG1[nr - 1]);
 802                 tmp = w83781d_read_value(client, W83781D_REG_SCFG2);
 803                 w83781d_write_value(client, W83781D_REG_SCFG2,
 804                                     tmp | BIT_SCFG2[nr - 1]);
 805                 data->sens[nr - 1] = val;
 806                 break;
 807         case 2:         /* 3904 */
 808                 tmp = w83781d_read_value(client, W83781D_REG_SCFG1);
 809                 w83781d_write_value(client, W83781D_REG_SCFG1,
 810                                     tmp | BIT_SCFG1[nr - 1]);
 811                 tmp = w83781d_read_value(client, W83781D_REG_SCFG2);
 812                 w83781d_write_value(client, W83781D_REG_SCFG2,
 813                                     tmp & ~BIT_SCFG2[nr - 1]);
 814                 data->sens[nr - 1] = val;
 815                 break;
 816         case W83781D_DEFAULT_BETA:      /* thermistor */
 817                 tmp = w83781d_read_value(client, W83781D_REG_SCFG1);
 818                 w83781d_write_value(client, W83781D_REG_SCFG1,
 819                                     tmp & ~BIT_SCFG1[nr - 1]);
 820                 data->sens[nr - 1] = val;
 821                 break;
 822         default:
 823                 dev_err(dev, "Invalid sensor type %ld; must be 1, 2, or %d\n",
 824                        (long) val, W83781D_DEFAULT_BETA);
 825                 break;
 826         }
 827
 828         up(&data->update_lock);
 829         return count;
 830 }
 831
 832 #define sysfs_sensor(offset) \
 833 static ssize_t show_regs_sensor_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
 834 { \
 835     return show_sensor_reg(dev, buf, offset); \
 836 } \
 837 static ssize_t store_regs_sensor_##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
 838 { \
 839     return store_sensor_reg(dev, buf, count, offset); \
 840 } \
 841 static DEVICE_ATTR(temp##offset##_type, S_IRUGO | S_IWUSR, show_regs_sensor_##offset, store_regs_sensor_##offset);
 842
 843 sysfs_sensor(1);
 844 sysfs_sensor(2);
 845 sysfs_sensor(3);
 846
 847 #define device_create_file_sensor(client, offset) \
 848 do { \
 849 device_create_file(&client->dev, &dev_attr_temp##offset##_type); \
 850 } while (0)
 851
 852 /* This function is called when:
 853      * w83781d_driver is inserted (when this module is loaded), for each
 854        available adapter
 855      * when a new adapter is inserted (and w83781d_driver is still present) */
 856 static int
 857 w83781d_attach_adapter(struct i2c_adapter *adapter)
 858 {
 859         if (!(adapter->class & I2C_CLASS_HWMON))
 860                 return 0;
 861         return i2c_detect(adapter, &addr_data, w83781d_detect);
 862 }
 863
 864 /* Assumes that adapter is of I2C, not ISA variety.
 865  * OTHERWISE DON'T CALL THIS
 866  */
 867 static int
 868 w83781d_detect_subclients(struct i2c_adapter *adapter, int address, int kind,
 869                 struct i2c_client *new_client)
 870 {
 871         int i, val1 = 0, id;
 872         int err;
 873         const char *client_name = "";
 874         struct w83781d_data *data = i2c_get_clientdata(new_client);
 875
 876         data->lm75[0] = kmalloc(sizeof(struct i2c_client), GFP_KERNEL);
 877         if (!(data->lm75[0])) {
 878                 err = -ENOMEM;
 879                 goto ERROR_SC_0;
 880         }
 881         memset(data->lm75[0], 0x00, sizeof (struct i2c_client));
 882
 883         id = i2c_adapter_id(adapter);
 884
 885         if (force_subclients[0] == id && force_subclients[1] == address) {
 886                 for (i = 2; i <= 3; i++) {
 887                         if (force_subclients[i] < 0x48 ||
 888                             force_subclients[i] > 0x4f) {
 889                                 dev_err(&new_client->dev, "Invalid subclient "
 890                                         "address %d; must be 0x48-0x4f\n",
 891                                         force_subclients[i]);
 892                                 err = -EINVAL;
 893                                 goto ERROR_SC_1;
 894                         }
 895                 }
 896                 w83781d_write_value(new_client, W83781D_REG_I2C_SUBADDR,
 897                                 (force_subclients[2] & 0x07) |
 898                                 ((force_subclients[3] & 0x07) << 4));
 899                 data->lm75[0]->addr = force_subclients[2];
 900         } else {
 901                 val1 = w83781d_read_value(new_client, W83781D_REG_I2C_SUBADDR);
 902                 data->lm75[0]->addr = 0x48 + (val1 & 0x07);
 903         }
 904
 905         if (kind != w83783s) {
 906
 907                 data->lm75[1] = kmalloc(sizeof(struct i2c_client), GFP_KERNEL);
 908                 if (!(data->lm75[1])) {
 909                         err = -ENOMEM;
 910                         goto ERROR_SC_1;
 911                 }
 912                 memset(data->lm75[1], 0x0, sizeof(struct i2c_client));
 913
 914                 if (force_subclients[0] == id &&
 915                     force_subclients[1] == address) {
 916                         data->lm75[1]->addr = force_subclients[3];
 917                 } else {
 918                         data->lm75[1]->addr = 0x48 + ((val1 >> 4) & 0x07);
 919                 }
 920                 if (data->lm75[0]->addr == data->lm75[1]->addr) {
 921                         dev_err(&new_client->dev,
 922                                "Duplicate addresses 0x%x for subclients.\n",
 923                                data->lm75[0]->addr);
 924                         err = -EBUSY;
 925                         goto ERROR_SC_2;
 926                 }
 927         }
 928
 929         if (kind == w83781d)
 930                 client_name = "w83781d subclient";
 931         else if (kind == w83782d)
 932                 client_name = "w83782d subclient";
 933         else if (kind == w83783s)
 934                 client_name = "w83783s subclient";
 935         else if (kind == w83627hf)
 936                 client_name = "w83627hf subclient";
 937         else if (kind == as99127f)
 938                 client_name = "as99127f subclient";
 939
 940         for (i = 0; i <= 1; i++) {
 941                 /* store all data in w83781d */
 942                 i2c_set_clientdata(data->lm75[i], NULL);
 943                 data->lm75[i]->adapter = adapter;
 944                 data->lm75[i]->driver = &w83781d_driver;
 945                 data->lm75[i]->flags = 0;
 946                 strlcpy(data->lm75[i]->name, client_name,
 947                         I2C_NAME_SIZE);
 948                 if ((err = i2c_attach_client(data->lm75[i]))) {
 949                         dev_err(&new_client->dev, "Subclient %d "
 950                                 "registration at address 0x%x "
 951                                 "failed.\n", i, data->lm75[i]->addr);
 952                         if (i == 1)
 953                                 goto ERROR_SC_3;
 954                         goto ERROR_SC_2;
 955                 }
 956                 if (kind == w83783s)
 957                         break;
 958         }
 959
 960         return 0;
 961
 962 /* Undo inits in case of errors */
 963 ERROR_SC_3:
 964         i2c_detach_client(data->lm75[0]);
 965 ERROR_SC_2:
 966         if (NULL != data->lm75[1])
 967                 kfree(data->lm75[1]);
 968 ERROR_SC_1:
 969         if (NULL != data->lm75[0])
 970                 kfree(data->lm75[0]);
 971 ERROR_SC_0:
 972         return err;
 973 }
 974
 975 static int
 976 w83781d_detect(struct i2c_adapter *adapter, int address, int kind)
 977 {
 978         int i = 0, val1 = 0, val2;
 979         struct i2c_client *new_client;
 980         struct w83781d_data *data;
 981         int err;
 982         const char *client_name = "";
 983         int is_isa = i2c_is_isa_adapter(adapter);
 984         enum vendor { winbond, asus } vendid;
 985
 986         if (!is_isa
 987             && !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
 988                 err = -EINVAL;
 989                 goto ERROR0;
 990         }
 991
 992         /* Prevent users from forcing a kind for a bus it isn't supposed
 993            to possibly be on */
 994         if (is_isa && (kind == as99127f || kind == w83783s)) {
 995                 dev_err(&adapter->dev,
 996                         "Cannot force I2C-only chip for ISA address 0x%02x.\n",
 997                         address);
 998                 err = -EINVAL;
 999                 goto ERROR0;
1000         }
1001         if (!is_isa && kind == w83697hf) {
1002                 dev_err(&adapter->dev,
1003                         "Cannot force ISA-only chip for I2C address 0x%02x.\n",
1004                         address);
1005                 err = -EINVAL;
1006                 goto ERROR0;
1007         }
1008
1009         if (is_isa)
1010                 if (!request_region(address, W83781D_EXTENT,
1011                                     w83781d_driver.name)) {
1012                         dev_dbg(&adapter->dev, "Request of region "
1013                                 "0x%x-0x%x for w83781d failed\n", address,
1014                                 address + W83781D_EXTENT - 1);
1015                         err = -EBUSY;
1016                         goto ERROR0;
1017                 }
1018
1019         /* Probe whether there is anything available on this address. Already
1020            done for SMBus clients */
1021         if (kind < 0) {
1022                 if (is_isa) {
1023
1024 #define REALLY_SLOW_IO
1025                         /* We need the timeouts for at least some LM78-like
1026                            chips. But only if we read 'undefined' registers. */
1027                         i = inb_p(address + 1);
1028                         if (inb_p(address + 2) != i
1029                          || inb_p(address + 3) != i
1030                          || inb_p(address + 7) != i) {
1031                                 dev_dbg(&adapter->dev, "Detection of w83781d "
1032                                         "chip failed at step 1\n");
1033                                 err = -ENODEV;
1034                                 goto ERROR1;
1035                         }
1036 #undef REALLY_SLOW_IO
1037
1038                         /* Let's just hope nothing breaks here */
1039                         i = inb_p(address + 5) & 0x7f;
1040                         outb_p(~i & 0x7f, address + 5);
1041                         val2 = inb_p(address + 5) & 0x7f;
1042                         if (val2 != (~i & 0x7f)) {
1043                                 outb_p(i, address + 5);
1044                                 dev_dbg(&adapter->dev, "Detection of w83781d "
1045                                         "chip failed at step 2 (0x%x != "
1046                                         "0x%x at 0x%x)\n", val2, ~i & 0x7f,
1047                                         address + 5);
1048                                 err = -ENODEV;
1049                                 goto ERROR1;
1050                         }
1051                 }
1052         }
1053
1054         /* OK. For now, we presume we have a valid client. We now create the
1055            client structure, even though we cannot fill it completely yet.
1056            But it allows us to access w83781d_{read,write}_value. */
1057
1058         if (!(data = kmalloc(sizeof(struct w83781d_data), GFP_KERNEL))) {
1059                 err = -ENOMEM;
1060                 goto ERROR1;
1061         }
1062         memset(data, 0, sizeof(struct w83781d_data));
1063
1064         new_client = &data->client;
1065         i2c_set_clientdata(new_client, data);
1066         new_client->addr = address;
1067         init_MUTEX(&data->lock);
1068         new_client->adapter = adapter;
1069         new_client->driver = &w83781d_driver;
1070         new_client->flags = 0;
1071
1072         /* Now, we do the remaining detection. */
1073
1074         /* The w8378?d may be stuck in some other bank than bank 0. This may
1075            make reading other information impossible. Specify a force=... or
1076            force_*=... parameter, and the Winbond will be reset to the right
1077            bank. */
1078         if (kind < 0) {
1079                 if (w83781d_read_value(new_client, W83781D_REG_CONFIG) & 0x80) {
1080                         dev_dbg(&new_client->dev, "Detection failed at step "
1081                                 "3\n");
1082                         err = -ENODEV;
1083                         goto ERROR2;
1084                 }
1085                 val1 = w83781d_read_value(new_client, W83781D_REG_BANK);
1086                 val2 = w83781d_read_value(new_client, W83781D_REG_CHIPMAN);
1087                 /* Check for Winbond or Asus ID if in bank 0 */
1088                 if ((!(val1 & 0x07)) &&
1089                     (((!(val1 & 0x80)) && (val2 != 0xa3) && (val2 != 0xc3))
1090                      || ((val1 & 0x80) && (val2 != 0x5c) && (val2 != 0x12)))) {
1091                         dev_dbg(&new_client->dev, "Detection failed at step "
1092                                 "4\n");
1093                         err = -ENODEV;
1094                         goto ERROR2;
1095                 }
1096                 /* If Winbond SMBus, check address at 0x48.
1097                    Asus doesn't support, except for as99127f rev.2 */
1098                 if ((!is_isa) && (((!(val1 & 0x80)) && (val2 == 0xa3)) ||
1099                                   ((val1 & 0x80) && (val2 == 0x5c)))) {
1100                         if (w83781d_read_value
1101                             (new_client, W83781D_REG_I2C_ADDR) != address) {
1102                                 dev_dbg(&new_client->dev, "Detection failed "
1103                                         "at step 5\n");
1104                                 err = -ENODEV;
1105                                 goto ERROR2;
1106                         }
1107                 }
1108         }
1109
1110         /* We have either had a force parameter, or we have already detected the
1111            Winbond. Put it now into bank 0 and Vendor ID High Byte */
1112         w83781d_write_value(new_client, W83781D_REG_BANK,
1113                             (w83781d_read_value(new_client,
1114                                                 W83781D_REG_BANK) & 0x78) |
1115                             0x80);
1116
1117         /* Determine the chip type. */
1118         if (kind <= 0) {
1119                 /* get vendor ID */
1120                 val2 = w83781d_read_value(new_client, W83781D_REG_CHIPMAN);
1121                 if (val2 == 0x5c)
1122                         vendid = winbond;
1123                 else if (val2 == 0x12)
1124                         vendid = asus;
1125                 else {
1126                         dev_dbg(&new_client->dev, "Chip was made by neither "
1127                                 "Winbond nor Asus?\n");
1128                         err = -ENODEV;
1129                         goto ERROR2;
1130                 }
1131
1132                 val1 = w83781d_read_value(new_client, W83781D_REG_WCHIPID);
1133                 if ((val1 == 0x10 || val1 == 0x11) && vendid == winbond)
1134                         kind = w83781d;
1135                 else if (val1 == 0x30 && vendid == winbond)
1136                         kind = w83782d;
1137                 else if (val1 == 0x40 && vendid == winbond && !is_isa
1138                                 && address == 0x2d)
1139                         kind = w83783s;
1140                 else if ((val1 == 0x21 || val1 == 0x90) && vendid == winbond)
1141                         kind = w83627hf;
1142                 else if (val1 == 0x31 && !is_isa && address >= 0x28)
1143                         kind = as99127f;
1144                 else if (val1 == 0x60 && vendid == winbond && is_isa)
1145                         kind = w83697hf;
1146                 else {
1147                         if (kind == 0)
1148                                 dev_warn(&new_client->dev, "Ignoring 'force' "
1149                                          "parameter for unknown chip at "
1150                                          "adapter %d, address 0x%02x\n",
1151                                          i2c_adapter_id(adapter), address);
1152                         err = -EINVAL;
1153                         goto ERROR2;
1154                 }
1155         }
1156
1157         if (kind == w83781d) {
1158                 client_name = "w83781d";
1159         } else if (kind == w83782d) {
1160                 client_name = "w83782d";
1161         } else if (kind == w83783s) {
1162                 client_name = "w83783s";
1163         } else if (kind == w83627hf) {
1164                 if (val1 == 0x90)
1165                         client_name = "w83627thf";
1166                 else
1167                         client_name = "w83627hf";
1168         } else if (kind == as99127f) {
1169                 client_name = "as99127f";
1170         } else if (kind == w83697hf) {
1171                 client_name = "w83697hf";
1172         }
1173
1174         /* Fill in the remaining client fields and put into the global list */
1175         strlcpy(new_client->name, client_name, I2C_NAME_SIZE);
1176         data->type = kind;
1177
1178         data->valid = 0;
1179         init_MUTEX(&data->update_lock);
1180
1181         /* Tell the I2C layer a new client has arrived */
1182         if ((err = i2c_attach_client(new_client)))
1183                 goto ERROR2;
1184
1185         /* attach secondary i2c lm75-like clients */
1186         if (!is_isa) {
1187                 if ((err = w83781d_detect_subclients(adapter, address,
1188                                 kind, new_client)))
1189                         goto ERROR3;
1190         } else {
1191                 data->lm75[0] = NULL;
1192                 data->lm75[1] = NULL;
1193         }
1194
1195         /* Initialize the chip */
1196         w83781d_init_client(new_client);
1197
1198         /* A few vars need to be filled upon startup */
1199         for (i = 1; i <= 3; i++) {
1200                 data->fan_min[i - 1] = w83781d_read_value(new_client,
1201                                         W83781D_REG_FAN_MIN(i));
1202         }
1203         if (kind != w83781d && kind != as99127f)
1204                 for (i = 0; i < 4; i++)
1205                         data->pwmenable[i] = 1;
1206
1207         /* Register sysfs hooks */
1208         device_create_file_in(new_client, 0);
1209         if (kind != w83783s && kind != w83697hf)
1210                 device_create_file_in(new_client, 1);
1211         device_create_file_in(new_client, 2);
1212         device_create_file_in(new_client, 3);
1213         device_create_file_in(new_client, 4);
1214         device_create_file_in(new_client, 5);
1215         device_create_file_in(new_client, 6);
1216         if (kind != as99127f && kind != w83781d && kind != w83783s) {
1217                 device_create_file_in(new_client, 7);
1218                 device_create_file_in(new_client, 8);
1219         }
1220
1221         device_create_file_fan(new_client, 1);
1222         device_create_file_fan(new_client, 2);
1223         if (kind != w83697hf)
1224                 device_create_file_fan(new_client, 3);
1225
1226         device_create_file_temp(new_client, 1);
1227         device_create_file_temp(new_client, 2);
1228         if (kind != w83783s && kind != w83697hf)
1229                 device_create_file_temp(new_client, 3);
1230
1231         if (kind != w83697hf)
1232                 device_create_file_vid(new_client);
1233
1234         if (kind != w83697hf)
1235                 device_create_file_vrm(new_client);
1236
1237         device_create_file_fan_div(new_client, 1);
1238         device_create_file_fan_div(new_client, 2);
1239         if (kind != w83697hf)
1240                 device_create_file_fan_div(new_client, 3);
1241
1242         device_create_file_alarms(new_client);
1243
1244         device_create_file_beep(new_client);
1245
1246         if (kind != w83781d && kind != as99127f) {
1247                 device_create_file_pwm(new_client, 1);
1248                 device_create_file_pwm(new_client, 2);
1249                 device_create_file_pwmenable(new_client, 2);
1250         }
1251         if (kind == w83782d && !is_isa) {
1252                 device_create_file_pwm(new_client, 3);
1253                 device_create_file_pwm(new_client, 4);
1254         }
1255
1256         if (kind != as99127f && kind != w83781d) {
1257                 device_create_file_sensor(new_client, 1);
1258                 device_create_file_sensor(new_client, 2);
1259                 if (kind != w83783s && kind != w83697hf)
1260                         device_create_file_sensor(new_client, 3);
1261         }
1262
1263         return 0;
1264
1265 ERROR3:
1266         i2c_detach_client(new_client);
1267 ERROR2:
1268         kfree(data);
1269 ERROR1:
1270         if (is_isa)
1271                 release_region(address, W83781D_EXTENT);
1272 ERROR0:
1273         return err;
1274 }
1275
1276 static int
1277 w83781d_detach_client(struct i2c_client *client)
1278 {
1279         int err;
1280
1281         if (i2c_is_isa_client(client))
1282                 release_region(client->addr, W83781D_EXTENT);
1283
1284         if ((err = i2c_detach_client(client))) {
1285                 dev_err(&client->dev,
1286                        "Client deregistration failed, client not detached.\n");
1287                 return err;
1288         }
1289
1290         if (i2c_get_clientdata(client)==NULL) {
1291                 /* subclients */
1292                 kfree(client);
1293         } else {
1294                 /* main client */
1295                 kfree(i2c_get_clientdata(client));
1296         }
1297
1298         return 0;
1299 }
1300
1301 /* The SMBus locks itself, usually, but nothing may access the Winbond between
1302    bank switches. ISA access must always be locked explicitly!
1303    We ignore the W83781D BUSY flag at this moment - it could lead to deadlocks,
1304    would slow down the W83781D access and should not be necessary.
1305    There are some ugly typecasts here, but the good news is - they should
1306    nowhere else be necessary! */
1307 static int
1308 w83781d_read_value(struct i2c_client *client, u16 reg)
1309 {
1310         struct w83781d_data *data = i2c_get_clientdata(client);
1311         int res, word_sized, bank;
1312         struct i2c_client *cl;
1313
1314         down(&data->lock);
1315         if (i2c_is_isa_client(client)) {
1316                 word_sized = (((reg & 0xff00) == 0x100)
1317                               || ((reg & 0xff00) == 0x200))
1318                     && (((reg & 0x00ff) == 0x50)
1319                         || ((reg & 0x00ff) == 0x53)
1320                         || ((reg & 0x00ff) == 0x55));
1321                 if (reg & 0xff00) {
1322                         outb_p(W83781D_REG_BANK,
1323                                client->addr + W83781D_ADDR_REG_OFFSET);
1324                         outb_p(reg >> 8,
1325                                client->addr + W83781D_DATA_REG_OFFSET);
1326                 }
1327                 outb_p(reg & 0xff, client->addr + W83781D_ADDR_REG_OFFSET);
1328                 res = inb_p(client->addr + W83781D_DATA_REG_OFFSET);
1329                 if (word_sized) {
1330                         outb_p((reg & 0xff) + 1,
1331                                client->addr + W83781D_ADDR_REG_OFFSET);
1332                         res =
1333                             (res << 8) + inb_p(client->addr +
1334                                                W83781D_DATA_REG_OFFSET);
1335                 }
1336                 if (reg & 0xff00) {
1337                         outb_p(W83781D_REG_BANK,
1338                                client->addr + W83781D_ADDR_REG_OFFSET);
1339                         outb_p(0, client->addr + W83781D_DATA_REG_OFFSET);
1340                 }
1341         } else {
1342                 bank = (reg >> 8) & 0x0f;
1343                 if (bank > 2)
1344                         /* switch banks */
1345                         i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
1346                                                   bank);
1347                 if (bank == 0 || bank > 2) {
1348                         res = i2c_smbus_read_byte_data(client, reg & 0xff);
1349                 } else {
1350                         /* switch to subclient */
1351                         cl = data->lm75[bank - 1];
1352                         /* convert from ISA to LM75 I2C addresses */
1353                         switch (reg & 0xff) {
1354                         case 0x50:      /* TEMP */
1355                                 res = swab16(i2c_smbus_read_word_data(cl, 0));
1356                                 break;
1357                         case 0x52:      /* CONFIG */
1358                                 res = i2c_smbus_read_byte_data(cl, 1);
1359                                 break;
1360                         case 0x53:      /* HYST */
1361                                 res = swab16(i2c_smbus_read_word_data(cl, 2));
1362                                 break;
1363                         case 0x55:      /* OVER */
1364                         default:
1365                                 res = swab16(i2c_smbus_read_word_data(cl, 3));
1366                                 break;
1367                         }
1368                 }
1369                 if (bank > 2)
1370                         i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0);
1371         }
1372         up(&data->lock);
1373         return res;
1374 }
1375
1376 static int
1377 w83781d_write_value(struct i2c_client *client, u16 reg, u16 value)
1378 {
1379         struct w83781d_data *data = i2c_get_clientdata(client);
1380         int word_sized, bank;
1381         struct i2c_client *cl;
1382
1383         down(&data->lock);
1384         if (i2c_is_isa_client(client)) {
1385                 word_sized = (((reg & 0xff00) == 0x100)
1386                               || ((reg & 0xff00) == 0x200))
1387                     && (((reg & 0x00ff) == 0x53)
1388                         || ((reg & 0x00ff) == 0x55));
1389                 if (reg & 0xff00) {
1390                         outb_p(W83781D_REG_BANK,
1391                                client->addr + W83781D_ADDR_REG_OFFSET);
1392                         outb_p(reg >> 8,
1393                                client->addr + W83781D_DATA_REG_OFFSET);
1394                 }
1395                 outb_p(reg & 0xff, client->addr + W83781D_ADDR_REG_OFFSET);
1396                 if (word_sized) {
1397                         outb_p(value >> 8,
1398                                client->addr + W83781D_DATA_REG_OFFSET);
1399                         outb_p((reg & 0xff) + 1,
1400                                client->addr + W83781D_ADDR_REG_OFFSET);
1401                 }
1402                 outb_p(value & 0xff, client->addr + W83781D_DATA_REG_OFFSET);
1403                 if (reg & 0xff00) {
1404                         outb_p(W83781D_REG_BANK,
1405                                client->addr + W83781D_ADDR_REG_OFFSET);
1406                         outb_p(0, client->addr + W83781D_DATA_REG_OFFSET);
1407                 }
1408         } else {
1409                 bank = (reg >> 8) & 0x0f;
1410                 if (bank > 2)
1411                         /* switch banks */
1412                         i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
1413                                                   bank);
1414                 if (bank == 0 || bank > 2) {
1415                         i2c_smbus_write_byte_data(client, reg & 0xff,
1416                                                   value & 0xff);
1417                 } else {
1418                         /* switch to subclient */
1419                         cl = data->lm75[bank - 1];
1420                         /* convert from ISA to LM75 I2C addresses */
1421                         switch (reg & 0xff) {
1422                         case 0x52:      /* CONFIG */
1423                                 i2c_smbus_write_byte_data(cl, 1, value & 0xff);
1424                                 break;
1425                         case 0x53:      /* HYST */
1426                                 i2c_smbus_write_word_data(cl, 2, swab16(value));
1427                                 break;
1428                         case 0x55:      /* OVER */
1429                                 i2c_smbus_write_word_data(cl, 3, swab16(value));
1430                                 break;
1431                         }
1432                 }
1433                 if (bank > 2)
1434                         i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0);
1435         }
1436         up(&data->lock);
1437         return 0;
1438 }
1439
1440 /* Called when we have found a new W83781D. It should set limits, etc. */
1441 static void
1442 w83781d_init_client(struct i2c_client *client)
1443 {
1444         struct w83781d_data *data = i2c_get_clientdata(client);
1445         int i, p;
1446         int type = data->type;
1447         u8 tmp;
1448
1449         if (init && type != as99127f) { /* this resets registers we don't have
1450                                            documentation for on the as99127f */
1451                 /* save these registers */
1452                 i = w83781d_read_value(client, W83781D_REG_BEEP_CONFIG);
1453                 p = w83781d_read_value(client, W83781D_REG_PWMCLK12);
1454                 /* Reset all except Watchdog values and last conversion values
1455                    This sets fan-divs to 2, among others */
1456                 w83781d_write_value(client, W83781D_REG_CONFIG, 0x80);
1457                 /* Restore the registers and disable power-on abnormal beep.
1458                    This saves FAN 1/2/3 input/output values set by BIOS. */
1459                 w83781d_write_value(client, W83781D_REG_BEEP_CONFIG, i | 0x80);
1460                 w83781d_write_value(client, W83781D_REG_PWMCLK12, p);
1461                 /* Disable master beep-enable (reset turns it on).
1462                    Individual beep_mask should be reset to off but for some reason
1463                    disabling this bit helps some people not get beeped */
1464                 w83781d_write_value(client, W83781D_REG_BEEP_INTS2, 0);
1465         }
1466
1467         data->vrm = i2c_which_vrm();
1468
1469         if ((type != w83781d) && (type != as99127f)) {
1470                 tmp = w83781d_read_value(client, W83781D_REG_SCFG1);
1471                 for (i = 1; i <= 3; i++) {
1472                         if (!(tmp & BIT_SCFG1[i - 1])) {
1473                                 data->sens[i - 1] = W83781D_DEFAULT_BETA;
1474                         } else {
1475                                 if (w83781d_read_value
1476                                     (client,
1477                                      W83781D_REG_SCFG2) & BIT_SCFG2[i - 1])
1478                                         data->sens[i - 1] = 1;
1479                                 else
1480                                         data->sens[i - 1] = 2;
1481                         }
1482                         if ((type == w83783s || type == w83697hf) && (i == 2))
1483                                 break;
1484                 }
1485         }
1486
1487         if (init && type != as99127f) {
1488                 /* Enable temp2 */
1489                 tmp = w83781d_read_value(client, W83781D_REG_TEMP2_CONFIG);
1490                 if (tmp & 0x01) {
1491                         dev_warn(&client->dev, "Enabling temp2, readings "
1492                                  "might not make sense\n");
1493                         w83781d_write_value(client, W83781D_REG_TEMP2_CONFIG,
1494                                 tmp & 0xfe);
1495                 }
1496
1497                 /* Enable temp3 */
1498                 if (type != w83783s && type != w83697hf) {
1499                         tmp = w83781d_read_value(client,
1500                                 W83781D_REG_TEMP3_CONFIG);
1501                         if (tmp & 0x01) {
1502                                 dev_warn(&client->dev, "Enabling temp3, "
1503                                          "readings might not make sense\n");
1504                                 w83781d_write_value(client,
1505                                         W83781D_REG_TEMP3_CONFIG, tmp & 0xfe);
1506                         }
1507                 }
1508
1509                 if (type != w83781d) {
1510                         /* enable comparator mode for temp2 and temp3 so
1511                            alarm indication will work correctly */
1512                         i = w83781d_read_value(client, W83781D_REG_IRQ);
1513                         if (!(i & 0x40))
1514                                 w83781d_write_value(client, W83781D_REG_IRQ,
1515                                                     i | 0x40);
1516                 }
1517         }
1518
1519         /* Start monitoring */
1520         w83781d_write_value(client, W83781D_REG_CONFIG,
1521                             (w83781d_read_value(client,
1522                                                 W83781D_REG_CONFIG) & 0xf7)
1523                             | 0x01);
1524 }
1525
1526 static struct w83781d_data *w83781d_update_device(struct device *dev)
1527 {
1528         struct i2c_client *client = to_i2c_client(dev);
1529         struct w83781d_data *data = i2c_get_clientdata(client);
1530         int i;
1531
1532         down(&data->update_lock);
1533
1534         if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
1535             || !data->valid) {
1536                 dev_dbg(dev, "Starting device update\n");
1537
1538                 for (i = 0; i <= 8; i++) {
1539                         if ((data->type == w83783s || data->type == w83697hf)
1540                             && (i == 1))
1541                                 continue;       /* 783S has no in1 */
1542                         data->in[i] =
1543                             w83781d_read_value(client, W83781D_REG_IN(i));
1544                         data->in_min[i] =
1545                             w83781d_read_value(client, W83781D_REG_IN_MIN(i));
1546                         data->in_max[i] =
1547                             w83781d_read_value(client, W83781D_REG_IN_MAX(i));
1548                         if ((data->type != w83782d) && (data->type != w83697hf)
1549                             && (data->type != w83627hf) && (i == 6))
1550                                 break;
1551                 }
1552                 for (i = 1; i <= 3; i++) {
1553                         data->fan[i - 1] =
1554                             w83781d_read_value(client, W83781D_REG_FAN(i));
1555                         data->fan_min[i - 1] =
1556                             w83781d_read_value(client, W83781D_REG_FAN_MIN(i));
1557                 }
1558                 if (data->type != w83781d && data->type != as99127f) {
1559                         for (i = 1; i <= 4; i++) {
1560                                 data->pwm[i - 1] =
1561                                     w83781d_read_value(client,
1562                                                        W83781D_REG_PWM(i));
1563                                 if ((data->type != w83782d
1564                                      || i2c_is_isa_client(client))
1565                                     && i == 2)
1566                                         break;
1567                         }
1568                         /* Only PWM2 can be disabled */
1569                         data->pwmenable[1] = (w83781d_read_value(client,
1570                                               W83781D_REG_PWMCLK12) & 0x08) >> 3;
1571                 }
1572
1573                 data->temp = w83781d_read_value(client, W83781D_REG_TEMP(1));
1574                 data->temp_max =
1575                     w83781d_read_value(client, W83781D_REG_TEMP_OVER(1));
1576                 data->temp_max_hyst =
1577                     w83781d_read_value(client, W83781D_REG_TEMP_HYST(1));
1578                 data->temp_add[0] =
1579                     w83781d_read_value(client, W83781D_REG_TEMP(2));
1580                 data->temp_max_add[0] =
1581                     w83781d_read_value(client, W83781D_REG_TEMP_OVER(2));
1582                 data->temp_max_hyst_add[0] =
1583                     w83781d_read_value(client, W83781D_REG_TEMP_HYST(2));
1584                 if (data->type != w83783s && data->type != w83697hf) {
1585                         data->temp_add[1] =
1586                             w83781d_read_value(client, W83781D_REG_TEMP(3));
1587                         data->temp_max_add[1] =
1588                             w83781d_read_value(client,
1589                                                W83781D_REG_TEMP_OVER(3));
1590                         data->temp_max_hyst_add[1] =
1591                             w83781d_read_value(client,
1592                                                W83781D_REG_TEMP_HYST(3));
1593                 }
1594                 i = w83781d_read_value(client, W83781D_REG_VID_FANDIV);
1595                 if (data->type != w83697hf) {
1596                         data->vid = i & 0x0f;
1597                         data->vid |=
1598                             (w83781d_read_value(client, W83781D_REG_CHIPID) &
1599                              0x01)
1600                             << 4;
1601                 }
1602                 data->fan_div[0] = (i >> 4) & 0x03;
1603                 data->fan_div[1] = (i >> 6) & 0x03;
1604                 if (data->type != w83697hf) {
1605                         data->fan_div[2] = (w83781d_read_value(client,
1606                                                                W83781D_REG_PIN)
1607                                             >> 6) & 0x03;
1608                 }
1609                 if ((data->type != w83781d) && (data->type != as99127f)) {
1610                         i = w83781d_read_value(client, W83781D_REG_VBAT);
1611                         data->fan_div[0] |= (i >> 3) & 0x04;
1612                         data->fan_div[1] |= (i >> 4) & 0x04;
1613                         if (data->type != w83697hf)
1614                                 data->fan_div[2] |= (i >> 5) & 0x04;
1615                 }
1616                 data->alarms =
1617                     w83781d_read_value(client,
1618                                        W83781D_REG_ALARM1) +
1619                     (w83781d_read_value(client, W83781D_REG_ALARM2) << 8);
1620                 if ((data->type == w83782d) || (data->type == w83627hf)) {
1621                         data->alarms |=
1622                             w83781d_read_value(client,
1623                                                W83781D_REG_ALARM3) << 16;
1624                 }
1625                 i = w83781d_read_value(client, W83781D_REG_BEEP_INTS2);
1626                 data->beep_enable = i >> 7;
1627                 data->beep_mask = ((i & 0x7f) << 8) +
1628                     w83781d_read_value(client, W83781D_REG_BEEP_INTS1);
1629                 if ((data->type != w83781d) && (data->type != as99127f)) {
1630                         data->beep_mask |=
1631                             w83781d_read_value(client,
1632                                                W83781D_REG_BEEP_INTS3) << 16;
1633                 }
1634                 data->last_updated = jiffies;
1635                 data->valid = 1;
1636         }
1637
1638         up(&data->update_lock);
1639
1640         return data;
1641 }
1642
1643 static int __init
1644 sensors_w83781d_init(void)
1645 {
1646         return i2c_add_driver(&w83781d_driver);
1647 }
1648
1649 static void __exit
1650 sensors_w83781d_exit(void)
1651 {
1652         i2c_del_driver(&w83781d_driver);
1653 }
1654
1655 MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>, "
1656               "Philip Edelbrock <phil@netroedge.com>, "
1657               "and Mark Studebaker <mdsxyz123@yahoo.com>");
1658 MODULE_DESCRIPTION("W83781D driver");
1659 MODULE_LICENSE("GPL");
1660
1661 module_init(sensors_w83781d_init);
1662 module_exit(sensors_w83781d_exit);