2 Copyright (c) 2001,2002 Christer Weinigel <wingel@nano-system.com>
4 National Semiconductor SCx200 ACCESS.bus support
5 Also supports the AMD CS5535 and AMD CS5536
7 Based on i2c-keywest.c which is:
8 Copyright (c) 2001 Benjamin Herrenschmidt <benh@kernel.crashing.org>
9 Copyright (c) 2000 Philip Edelbrock <phil@stimpy.netroedge.com>
11 This program is free software; you can redistribute it and/or
12 modify it under the terms of the GNU General Public License as
13 published by the Free Software Foundation; either version 2 of the
14 License, or (at your option) any later version.
16 This program is distributed in the hope that it will be useful,
17 but WITHOUT ANY WARRANTY; without even the implied warranty of
18 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 General Public License for more details.
21 You should have received a copy of the GNU General Public License
22 along with this program; if not, write to the Free Software
23 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
26 #include <linux/module.h>
27 #include <linux/errno.h>
28 #include <linux/kernel.h>
29 #include <linux/init.h>
30 #include <linux/i2c.h>
31 #include <linux/smp_lock.h>
32 #include <linux/pci.h>
33 #include <linux/delay.h>
37 #include <linux/scx200.h>
39 #define NAME "scx200_acb"
41 MODULE_AUTHOR("Christer Weinigel <wingel@nano-system.com>");
42 MODULE_DESCRIPTION("NatSemi SCx200 ACCESS.bus Driver");
43 MODULE_LICENSE("GPL");
46 static int base[MAX_DEVICES] = { 0x820, 0x840 };
47 module_param_array(base, int, NULL, 0);
48 MODULE_PARM_DESC(base, "Base addresses for the ACCESS.bus controllers");
50 /* The hardware supports interrupt driven mode too, but I haven't
53 #define POLL_TIMEOUT (HZ)
55 enum scx200_acb_state {
65 static const char *scx200_acb_state_name[] = {
75 /* Physical interface */
76 struct scx200_acb_iface {
77 struct scx200_acb_iface *next;
78 struct i2c_adapter adapter;
82 /* State machine data */
83 enum scx200_acb_state state;
92 /* Register Definitions */
93 #define ACBSDA (iface->base + 0)
94 #define ACBST (iface->base + 1)
95 #define ACBST_SDAST 0x40 /* SDA Status */
96 #define ACBST_BER 0x20
97 #define ACBST_NEGACK 0x10 /* Negative Acknowledge */
98 #define ACBST_STASTR 0x08 /* Stall After Start */
99 #define ACBST_MASTER 0x02
100 #define ACBCST (iface->base + 2)
101 #define ACBCST_BB 0x02
102 #define ACBCTL1 (iface->base + 3)
103 #define ACBCTL1_STASTRE 0x80
104 #define ACBCTL1_NMINTE 0x40
105 #define ACBCTL1_ACK 0x10
106 #define ACBCTL1_STOP 0x02
107 #define ACBCTL1_START 0x01
108 #define ACBADDR (iface->base + 4)
109 #define ACBCTL2 (iface->base + 5)
110 #define ACBCTL2_ENABLE 0x01
112 /************************************************************************/
114 static void scx200_acb_machine(struct scx200_acb_iface *iface, u8 status)
118 dev_dbg(&iface->adapter.dev, "state %s, status = 0x%02x\n",
119 scx200_acb_state_name[iface->state], status);
121 if (status & ACBST_BER) {
122 errmsg = "bus error";
125 if (!(status & ACBST_MASTER)) {
126 errmsg = "not master";
129 if (status & ACBST_NEGACK) {
130 dev_dbg(&iface->adapter.dev, "negative ack in state %s\n",
131 scx200_acb_state_name[iface->state]);
133 iface->state = state_idle;
134 iface->result = -ENXIO;
136 outb(inb(ACBCTL1) | ACBCTL1_STOP, ACBCTL1);
137 outb(ACBST_STASTR | ACBST_NEGACK, ACBST);
141 switch (iface->state) {
143 dev_warn(&iface->adapter.dev, "interrupt in idle state\n");
147 /* Do a pointer write first */
148 outb(iface->address_byte & ~1, ACBSDA);
150 iface->state = state_command;
154 outb(iface->command, ACBSDA);
156 if (iface->address_byte & 1)
157 iface->state = state_repeat_start;
159 iface->state = state_write;
162 case state_repeat_start:
163 outb(inb(ACBCTL1) | ACBCTL1_START, ACBCTL1);
167 if (iface->address_byte & 1) {
169 outb(inb(ACBCTL1) | ACBCTL1_ACK, ACBCTL1);
171 outb(inb(ACBCTL1) & ~ACBCTL1_ACK, ACBCTL1);
172 outb(iface->address_byte, ACBSDA);
174 iface->state = state_read;
176 outb(iface->address_byte, ACBSDA);
178 iface->state = state_write;
183 /* Set ACK if receiving the last byte */
185 outb(inb(ACBCTL1) | ACBCTL1_ACK, ACBCTL1);
187 outb(inb(ACBCTL1) & ~ACBCTL1_ACK, ACBCTL1);
189 *iface->ptr++ = inb(ACBSDA);
192 if (iface->len == 0) {
194 iface->state = state_idle;
195 outb(inb(ACBCTL1) | ACBCTL1_STOP, ACBCTL1);
201 if (iface->len == 0) {
203 iface->state = state_idle;
204 outb(inb(ACBCTL1) | ACBCTL1_STOP, ACBCTL1);
208 outb(*iface->ptr++, ACBSDA);
217 dev_err(&iface->adapter.dev, "%s in state %s\n", errmsg,
218 scx200_acb_state_name[iface->state]);
220 iface->state = state_idle;
221 iface->result = -EIO;
222 iface->needs_reset = 1;
226 static void scx200_acb_poll(struct scx200_acb_iface *iface)
229 unsigned long timeout;
231 timeout = jiffies + POLL_TIMEOUT;
232 while (time_before(jiffies, timeout)) {
234 if ((status & (ACBST_SDAST|ACBST_BER|ACBST_NEGACK)) != 0) {
235 scx200_acb_machine(iface, status);
241 dev_err(&iface->adapter.dev, "timeout in state %s\n",
242 scx200_acb_state_name[iface->state]);
244 iface->state = state_idle;
245 iface->result = -EIO;
246 iface->needs_reset = 1;
248 #endif /* POLLED_MODE */
250 static void scx200_acb_reset(struct scx200_acb_iface *iface)
252 /* Disable the ACCESS.bus device and Configure the SCL
253 frequency: 16 clock cycles */
257 /* Disable slave address */
259 /* Enable the ACCESS.bus device */
260 outb(inb(ACBCTL2) | ACBCTL2_ENABLE, ACBCTL2);
261 /* Free STALL after START */
262 outb(inb(ACBCTL1) & ~(ACBCTL1_STASTRE | ACBCTL1_NMINTE), ACBCTL1);
264 outb(inb(ACBCTL1) | ACBCTL1_STOP, ACBCTL1);
265 /* Clear BER, NEGACK and STASTR bits */
266 outb(ACBST_BER | ACBST_NEGACK | ACBST_STASTR, ACBST);
268 outb(inb(ACBCST) | ACBCST_BB, ACBCST);
271 static s32 scx200_acb_smbus_xfer(struct i2c_adapter *adapter,
272 u16 address, unsigned short flags,
273 char rw, u8 command, int size,
274 union i2c_smbus_data *data)
276 struct scx200_acb_iface *iface = i2c_get_adapdata(adapter);
283 case I2C_SMBUS_QUICK:
290 buffer = rw ? &data->byte : &command;
293 case I2C_SMBUS_BYTE_DATA:
295 buffer = &data->byte;
298 case I2C_SMBUS_WORD_DATA:
300 cur_word = cpu_to_le16(data->word);
301 buffer = (u8 *)&cur_word;
304 case I2C_SMBUS_BLOCK_DATA:
305 len = data->block[0];
306 buffer = &data->block[1];
313 dev_dbg(&adapter->dev,
314 "size=%d, address=0x%x, command=0x%x, len=%d, read=%d\n",
315 size, address, command, len, rw);
317 if (!len && rw == I2C_SMBUS_READ) {
318 dev_dbg(&adapter->dev, "zero length read\n");
324 iface->address_byte = (address << 1) | rw;
325 iface->command = command;
328 iface->result = -EINVAL;
329 iface->needs_reset = 0;
331 outb(inb(ACBCTL1) | ACBCTL1_START, ACBCTL1);
333 if (size == I2C_SMBUS_QUICK || size == I2C_SMBUS_BYTE)
334 iface->state = state_quick;
336 iface->state = state_address;
339 while (iface->state != state_idle)
340 scx200_acb_poll(iface);
341 #else /* POLLED_MODE */
342 #error Interrupt driven mode not implemented
343 #endif /* POLLED_MODE */
345 if (iface->needs_reset)
346 scx200_acb_reset(iface);
352 if (rc == 0 && size == I2C_SMBUS_WORD_DATA && rw == I2C_SMBUS_READ)
353 data->word = le16_to_cpu(cur_word);
356 dev_dbg(&adapter->dev, "transfer done, result: %d", rc);
360 for (i = 0; i < len; ++i)
361 printk(" %02x", buffer[i]);
369 static u32 scx200_acb_func(struct i2c_adapter *adapter)
371 return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
372 I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
373 I2C_FUNC_SMBUS_BLOCK_DATA;
376 /* For now, we only handle combined mode (smbus) */
377 static struct i2c_algorithm scx200_acb_algorithm = {
378 .smbus_xfer = scx200_acb_smbus_xfer,
379 .functionality = scx200_acb_func,
382 static struct scx200_acb_iface *scx200_acb_list;
383 static DECLARE_MUTEX(scx200_acb_list_mutex);
385 static int scx200_acb_probe(struct scx200_acb_iface *iface)
389 /* Disable the ACCESS.bus device and Configure the SCL
390 frequency: 16 clock cycles */
393 if (inb(ACBCTL2) != 0x70) {
394 pr_debug(NAME ": ACBCTL2 readback failed\n");
398 outb(inb(ACBCTL1) | ACBCTL1_NMINTE, ACBCTL1);
402 pr_debug(NAME ": disabled, but ACBCTL1=0x%02x\n",
407 outb(inb(ACBCTL2) | ACBCTL2_ENABLE, ACBCTL2);
409 outb(inb(ACBCTL1) | ACBCTL1_NMINTE, ACBCTL1);
412 if ((val & ACBCTL1_NMINTE) != ACBCTL1_NMINTE) {
413 pr_debug(NAME ": enabled, but NMINTE won't be set, "
414 "ACBCTL1=0x%02x\n", val);
421 static int __init scx200_acb_create(const char *text, int base, int index)
423 struct scx200_acb_iface *iface;
424 struct i2c_adapter *adapter;
426 char description[64];
428 iface = kzalloc(sizeof(*iface), GFP_KERNEL);
430 printk(KERN_ERR NAME ": can't allocate memory\n");
435 adapter = &iface->adapter;
436 i2c_set_adapdata(adapter, iface);
437 snprintf(adapter->name, I2C_NAME_SIZE, "%s ACB%d", text, index);
438 adapter->owner = THIS_MODULE;
439 adapter->id = I2C_HW_SMBUS_SCX200;
440 adapter->algo = &scx200_acb_algorithm;
441 adapter->class = I2C_CLASS_HWMON;
443 init_MUTEX(&iface->sem);
445 snprintf(description, sizeof(description), "%s ACCESS.bus [%s]",
446 text, adapter->name);
448 if (request_region(base, 8, description) == 0) {
449 printk(KERN_ERR NAME ": can't allocate io 0x%x-0x%x\n",
456 rc = scx200_acb_probe(iface);
458 printk(KERN_WARNING NAME ": probe failed\n");
462 scx200_acb_reset(iface);
464 if (i2c_add_adapter(adapter) < 0) {
465 printk(KERN_ERR NAME ": failed to register\n");
470 down(&scx200_acb_list_mutex);
471 iface->next = scx200_acb_list;
472 scx200_acb_list = iface;
473 up(&scx200_acb_list_mutex);
478 release_region(iface->base, 8);
485 static struct pci_device_id scx200[] = {
486 { PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_SCx200_BRIDGE) },
487 { PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_SC1100_BRIDGE) },
491 static struct pci_device_id divil_pci[] = {
492 { PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_CS5535_ISA) },
493 { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CS5536_ISA) },
497 #define MSR_LBAR_SMB 0x5140000B
499 static int scx200_add_cs553x(void)
504 /* Grab & reserve the SMB I/O range */
505 rdmsr(MSR_LBAR_SMB, low, hi);
507 /* Check the IO mask and whether SMB is enabled */
508 if (hi != 0x0000F001) {
509 printk(KERN_WARNING NAME ": SMBus not enabled\n");
513 /* SMBus IO size is 8 bytes */
514 smb_base = low & 0x0000FFF8;
516 return scx200_acb_create("CS5535", smb_base, 0);
519 static int __init scx200_acb_init(void)
524 pr_debug(NAME ": NatSemi SCx200 ACCESS.bus Driver\n");
526 /* Verify that this really is a SCx200 processor */
527 if (pci_dev_present(scx200)) {
528 for (i = 0; i < MAX_DEVICES; ++i) {
530 rc = scx200_acb_create("SCx200", base[i], i);
532 } else if (pci_dev_present(divil_pci))
533 rc = scx200_add_cs553x();
538 static void __exit scx200_acb_cleanup(void)
540 struct scx200_acb_iface *iface;
542 down(&scx200_acb_list_mutex);
543 while ((iface = scx200_acb_list) != NULL) {
544 scx200_acb_list = iface->next;
545 up(&scx200_acb_list_mutex);
547 i2c_del_adapter(&iface->adapter);
548 release_region(iface->base, 8);
550 down(&scx200_acb_list_mutex);
552 up(&scx200_acb_list_mutex);
555 module_init(scx200_acb_init);
556 module_exit(scx200_acb_cleanup);