err.no Git - linux-2.6/blob - drivers/char/pcmcia/synclink_cs.c

   1 /*
   2  * linux/drivers/char/pcmcia/synclink_cs.c
   3  *
   4  * $Id: synclink_cs.c,v 4.34 2005/09/08 13:20:54 paulkf Exp $
   5  *
   6  * Device driver for Microgate SyncLink PC Card
   7  * multiprotocol serial adapter.
   8  *
   9  * written by Paul Fulghum for Microgate Corporation
  10  * paulkf@microgate.com
  11  *
  12  * Microgate and SyncLink are trademarks of Microgate Corporation
  13  *
  14  * This code is released under the GNU General Public License (GPL)
  15  *
  16  * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
  17  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  18  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  19  * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
  20  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  21  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  22  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
  24  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  25  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
  26  * OF THE POSSIBILITY OF SUCH DAMAGE.
  27  */
  28
  29 #define VERSION(ver,rel,seq) (((ver)<<16) | ((rel)<<8) | (seq))
  30 #if defined(__i386__)
  31 #  define BREAKPOINT() asm("   int $3");
  32 #else
  33 #  define BREAKPOINT() { }
  34 #endif
  35
  36 #define MAX_DEVICE_COUNT 4
  37
  38 #include <linux/module.h>
  39 #include <linux/errno.h>
  40 #include <linux/signal.h>
  41 #include <linux/sched.h>
  42 #include <linux/timer.h>
  43 #include <linux/time.h>
  44 #include <linux/interrupt.h>
  45 #include <linux/tty.h>
  46 #include <linux/tty_flip.h>
  47 #include <linux/serial.h>
  48 #include <linux/major.h>
  49 #include <linux/string.h>
  50 #include <linux/fcntl.h>
  51 #include <linux/ptrace.h>
  52 #include <linux/ioport.h>
  53 #include <linux/mm.h>
  54 #include <linux/slab.h>
  55 #include <linux/netdevice.h>
  56 #include <linux/vmalloc.h>
  57 #include <linux/init.h>
  58 #include <linux/delay.h>
  59 #include <linux/ioctl.h>
  60 #include <linux/synclink.h>
  61
  62 #include <asm/system.h>
  63 #include <asm/io.h>
  64 #include <asm/irq.h>
  65 #include <asm/dma.h>
  66 #include <linux/bitops.h>
  67 #include <asm/types.h>
  68 #include <linux/termios.h>
  69 #include <linux/workqueue.h>
  70 #include <linux/hdlc.h>
  71
  72 #include <pcmcia/cs_types.h>
  73 #include <pcmcia/cs.h>
  74 #include <pcmcia/cistpl.h>
  75 #include <pcmcia/cisreg.h>
  76 #include <pcmcia/ds.h>
  77
  78 #if defined(CONFIG_HDLC) || (defined(CONFIG_HDLC_MODULE) && defined(CONFIG_SYNCLINK_CS_MODULE))
  79 #define SYNCLINK_GENERIC_HDLC 1
  80 #else
  81 #define SYNCLINK_GENERIC_HDLC 0
  82 #endif
  83
  84 #define GET_USER(error,value,addr) error = get_user(value,addr)
  85 #define COPY_FROM_USER(error,dest,src,size) error = copy_from_user(dest,src,size) ? -EFAULT : 0
  86 #define PUT_USER(error,value,addr) error = put_user(value,addr)
  87 #define COPY_TO_USER(error,dest,src,size) error = copy_to_user(dest,src,size) ? -EFAULT : 0
  88
  89 #include <asm/uaccess.h>
  90
  91 static MGSL_PARAMS default_params = {
  92         MGSL_MODE_HDLC,                 /* unsigned long mode */
  93         0,                              /* unsigned char loopback; */
  94         HDLC_FLAG_UNDERRUN_ABORT15,     /* unsigned short flags; */
  95         HDLC_ENCODING_NRZI_SPACE,       /* unsigned char encoding; */
  96         0,                              /* unsigned long clock_speed; */
  97         0xff,                           /* unsigned char addr_filter; */
  98         HDLC_CRC_16_CCITT,              /* unsigned short crc_type; */
  99         HDLC_PREAMBLE_LENGTH_8BITS,     /* unsigned char preamble_length; */
 100         HDLC_PREAMBLE_PATTERN_NONE,     /* unsigned char preamble; */
 101         9600,                           /* unsigned long data_rate; */
 102         8,                              /* unsigned char data_bits; */
 103         1,                              /* unsigned char stop_bits; */
 104         ASYNC_PARITY_NONE               /* unsigned char parity; */
 105 };
 106
 107 typedef struct
 108 {
 109         int count;
 110         unsigned char status;
 111         char data[1];
 112 } RXBUF;
 113
 114 /* The queue of BH actions to be performed */
 115
 116 #define BH_RECEIVE  1
 117 #define BH_TRANSMIT 2
 118 #define BH_STATUS   4
 119
 120 #define IO_PIN_SHUTDOWN_LIMIT 100
 121
 122 #define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK))
 123
 124 struct _input_signal_events {
 125         int     ri_up;
 126         int     ri_down;
 127         int     dsr_up;
 128         int     dsr_down;
 129         int     dcd_up;
 130         int     dcd_down;
 131         int     cts_up;
 132         int     cts_down;
 133 };
 134
 135
 136 /*
 137  * Device instance data structure
 138  */
 139
 140 typedef struct _mgslpc_info {
 141         void *if_ptr;   /* General purpose pointer (used by SPPP) */
 142         int                     magic;
 143         int                     flags;
 144         int                     count;          /* count of opens */
 145         int                     line;
 146         unsigned short          close_delay;
 147         unsigned short          closing_wait;   /* time to wait before closing */
 148
 149         struct mgsl_icount      icount;
 150
 151         struct tty_struct       *tty;
 152         int                     timeout;
 153         int                     x_char;         /* xon/xoff character */
 154         int                     blocked_open;   /* # of blocked opens */
 155         unsigned char           read_status_mask;
 156         unsigned char           ignore_status_mask;
 157
 158         unsigned char *tx_buf;
 159         int            tx_put;
 160         int            tx_get;
 161         int            tx_count;
 162
 163         /* circular list of fixed length rx buffers */
 164
 165         unsigned char  *rx_buf;        /* memory allocated for all rx buffers */
 166         int            rx_buf_total_size; /* size of memory allocated for rx buffers */
 167         int            rx_put;         /* index of next empty rx buffer */
 168         int            rx_get;         /* index of next full rx buffer */
 169         int            rx_buf_size;    /* size in bytes of single rx buffer */
 170         int            rx_buf_count;   /* total number of rx buffers */
 171         int            rx_frame_count; /* number of full rx buffers */
 172
 173         wait_queue_head_t       open_wait;
 174         wait_queue_head_t       close_wait;
 175
 176         wait_queue_head_t       status_event_wait_q;
 177         wait_queue_head_t       event_wait_q;
 178         struct timer_list       tx_timer;       /* HDLC transmit timeout timer */
 179         struct _mgslpc_info     *next_device;   /* device list link */
 180
 181         unsigned short imra_value;
 182         unsigned short imrb_value;
 183         unsigned char  pim_value;
 184
 185         spinlock_t lock;
 186         struct work_struct task;                /* task structure for scheduling bh */
 187
 188         u32 max_frame_size;
 189
 190         u32 pending_bh;
 191
 192         bool bh_running;
 193         bool bh_requested;
 194
 195         int dcd_chkcount; /* check counts to prevent */
 196         int cts_chkcount; /* too many IRQs if a signal */
 197         int dsr_chkcount; /* is floating */
 198         int ri_chkcount;
 199
 200         bool rx_enabled;
 201         bool rx_overflow;
 202
 203         bool tx_enabled;
 204         bool tx_active;
 205         bool tx_aborting;
 206         u32 idle_mode;
 207
 208         int if_mode; /* serial interface selection (RS-232, v.35 etc) */
 209
 210         char device_name[25];           /* device instance name */
 211
 212         unsigned int io_base;   /* base I/O address of adapter */
 213         unsigned int irq_level;
 214
 215         MGSL_PARAMS params;             /* communications parameters */
 216
 217         unsigned char serial_signals;   /* current serial signal states */
 218
 219         bool irq_occurred;              /* for diagnostics use */
 220         char testing_irq;
 221         unsigned int init_error;        /* startup error (DIAGS)        */
 222
 223         char flag_buf[MAX_ASYNC_BUFFER_SIZE];
 224         bool drop_rts_on_tx_done;
 225
 226         struct  _input_signal_events    input_signal_events;
 227
 228         /* PCMCIA support */
 229         struct pcmcia_device    *p_dev;
 230         dev_node_t            node;
 231         int                   stop;
 232
 233         /* SPPP/Cisco HDLC device parts */
 234         int netcount;
 235         spinlock_t netlock;
 236
 237 #if SYNCLINK_GENERIC_HDLC
 238         struct net_device *netdev;
 239 #endif
 240
 241 } MGSLPC_INFO;
 242
 243 #define MGSLPC_MAGIC 0x5402
 244
 245 /*
 246  * The size of the serial xmit buffer is 1 page, or 4096 bytes
 247  */
 248 #define TXBUFSIZE 4096
 249
 250
 251 #define CHA     0x00   /* channel A offset */
 252 #define CHB     0x40   /* channel B offset */
 253
 254 /*
 255  *  FIXME: PPC has PVR defined in asm/reg.h.  For now we just undef it.
 256  */
 257 #undef PVR
 258
 259 #define RXFIFO  0
 260 #define TXFIFO  0
 261 #define STAR    0x20
 262 #define CMDR    0x20
 263 #define RSTA    0x21
 264 #define PRE     0x21
 265 #define MODE    0x22
 266 #define TIMR    0x23
 267 #define XAD1    0x24
 268 #define XAD2    0x25
 269 #define RAH1    0x26
 270 #define RAH2    0x27
 271 #define DAFO    0x27
 272 #define RAL1    0x28
 273 #define RFC     0x28
 274 #define RHCR    0x29
 275 #define RAL2    0x29
 276 #define RBCL    0x2a
 277 #define XBCL    0x2a
 278 #define RBCH    0x2b
 279 #define XBCH    0x2b
 280 #define CCR0    0x2c
 281 #define CCR1    0x2d
 282 #define CCR2    0x2e
 283 #define CCR3    0x2f
 284 #define VSTR    0x34
 285 #define BGR     0x34
 286 #define RLCR    0x35
 287 #define AML     0x36
 288 #define AMH     0x37
 289 #define GIS     0x38
 290 #define IVA     0x38
 291 #define IPC     0x39
 292 #define ISR     0x3a
 293 #define IMR     0x3a
 294 #define PVR     0x3c
 295 #define PIS     0x3d
 296 #define PIM     0x3d
 297 #define PCR     0x3e
 298 #define CCR4    0x3f
 299
 300 // IMR/ISR
 301
 302 #define IRQ_BREAK_ON    BIT15   // rx break detected
 303 #define IRQ_DATAOVERRUN BIT14   // receive data overflow
 304 #define IRQ_ALLSENT     BIT13   // all sent
 305 #define IRQ_UNDERRUN    BIT12   // transmit data underrun
 306 #define IRQ_TIMER       BIT11   // timer interrupt
 307 #define IRQ_CTS         BIT10   // CTS status change
 308 #define IRQ_TXREPEAT    BIT9    // tx message repeat
 309 #define IRQ_TXFIFO      BIT8    // transmit pool ready
 310 #define IRQ_RXEOM       BIT7    // receive message end
 311 #define IRQ_EXITHUNT    BIT6    // receive frame start
 312 #define IRQ_RXTIME      BIT6    // rx char timeout
 313 #define IRQ_DCD         BIT2    // carrier detect status change
 314 #define IRQ_OVERRUN     BIT1    // receive frame overflow
 315 #define IRQ_RXFIFO      BIT0    // receive pool full
 316
 317 // STAR
 318
 319 #define XFW   BIT6              // transmit FIFO write enable
 320 #define CEC   BIT2              // command executing
 321 #define CTS   BIT1              // CTS state
 322
 323 #define PVR_DTR      BIT0
 324 #define PVR_DSR      BIT1
 325 #define PVR_RI       BIT2
 326 #define PVR_AUTOCTS  BIT3
 327 #define PVR_RS232    0x20   /* 0010b */
 328 #define PVR_V35      0xe0   /* 1110b */
 329 #define PVR_RS422    0x40   /* 0100b */
 330
 331 /* Register access functions */
 332
 333 #define write_reg(info, reg, val) outb((val),(info)->io_base + (reg))
 334 #define read_reg(info, reg) inb((info)->io_base + (reg))
 335
 336 #define read_reg16(info, reg) inw((info)->io_base + (reg))
 337 #define write_reg16(info, reg, val) outw((val), (info)->io_base + (reg))
 338
 339 #define set_reg_bits(info, reg, mask) \
 340     write_reg(info, (reg), \
 341                  (unsigned char) (read_reg(info, (reg)) | (mask)))
 342 #define clear_reg_bits(info, reg, mask) \
 343     write_reg(info, (reg), \
 344                  (unsigned char) (read_reg(info, (reg)) & ~(mask)))
 345 /*
 346  * interrupt enable/disable routines
 347  */
 348 static void irq_disable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask)
 349 {
 350         if (channel == CHA) {
 351                 info->imra_value |= mask;
 352                 write_reg16(info, CHA + IMR, info->imra_value);
 353         } else {
 354                 info->imrb_value |= mask;
 355                 write_reg16(info, CHB + IMR, info->imrb_value);
 356         }
 357 }
 358 static void irq_enable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask)
 359 {
 360         if (channel == CHA) {
 361                 info->imra_value &= ~mask;
 362                 write_reg16(info, CHA + IMR, info->imra_value);
 363         } else {
 364                 info->imrb_value &= ~mask;
 365                 write_reg16(info, CHB + IMR, info->imrb_value);
 366         }
 367 }
 368
 369 #define port_irq_disable(info, mask) \
 370   { info->pim_value |= (mask); write_reg(info, PIM, info->pim_value); }
 371
 372 #define port_irq_enable(info, mask) \
 373   { info->pim_value &= ~(mask); write_reg(info, PIM, info->pim_value); }
 374
 375 static void rx_start(MGSLPC_INFO *info);
 376 static void rx_stop(MGSLPC_INFO *info);
 377
 378 static void tx_start(MGSLPC_INFO *info);
 379 static void tx_stop(MGSLPC_INFO *info);
 380 static void tx_set_idle(MGSLPC_INFO *info);
 381
 382 static void get_signals(MGSLPC_INFO *info);
 383 static void set_signals(MGSLPC_INFO *info);
 384
 385 static void reset_device(MGSLPC_INFO *info);
 386
 387 static void hdlc_mode(MGSLPC_INFO *info);
 388 static void async_mode(MGSLPC_INFO *info);
 389
 390 static void tx_timeout(unsigned long context);
 391
 392 static int ioctl_common(MGSLPC_INFO *info, unsigned int cmd, unsigned long arg);
 393
 394 #if SYNCLINK_GENERIC_HDLC
 395 #define dev_to_port(D) (dev_to_hdlc(D)->priv)
 396 static void hdlcdev_tx_done(MGSLPC_INFO *info);
 397 static void hdlcdev_rx(MGSLPC_INFO *info, char *buf, int size);
 398 static int  hdlcdev_init(MGSLPC_INFO *info);
 399 static void hdlcdev_exit(MGSLPC_INFO *info);
 400 #endif
 401
 402 static void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit);
 403
 404 static bool register_test(MGSLPC_INFO *info);
 405 static bool irq_test(MGSLPC_INFO *info);
 406 static int adapter_test(MGSLPC_INFO *info);
 407
 408 static int claim_resources(MGSLPC_INFO *info);
 409 static void release_resources(MGSLPC_INFO *info);
 410 static void mgslpc_add_device(MGSLPC_INFO *info);
 411 static void mgslpc_remove_device(MGSLPC_INFO *info);
 412
 413 static bool rx_get_frame(MGSLPC_INFO *info);
 414 static void rx_reset_buffers(MGSLPC_INFO *info);
 415 static int  rx_alloc_buffers(MGSLPC_INFO *info);
 416 static void rx_free_buffers(MGSLPC_INFO *info);
 417
 418 static irqreturn_t mgslpc_isr(int irq, void *dev_id);
 419
 420 /*
 421  * Bottom half interrupt handlers
 422  */
 423 static void bh_handler(struct work_struct *work);
 424 static void bh_transmit(MGSLPC_INFO *info);
 425 static void bh_status(MGSLPC_INFO *info);
 426
 427 /*
 428  * ioctl handlers
 429  */
 430 static int tiocmget(struct tty_struct *tty, struct file *file);
 431 static int tiocmset(struct tty_struct *tty, struct file *file,
 432                     unsigned int set, unsigned int clear);
 433 static int get_stats(MGSLPC_INFO *info, struct mgsl_icount __user *user_icount);
 434 static int get_params(MGSLPC_INFO *info, MGSL_PARAMS __user *user_params);
 435 static int set_params(MGSLPC_INFO *info, MGSL_PARAMS __user *new_params);
 436 static int get_txidle(MGSLPC_INFO *info, int __user *idle_mode);
 437 static int set_txidle(MGSLPC_INFO *info, int idle_mode);
 438 static int set_txenable(MGSLPC_INFO *info, int enable);
 439 static int tx_abort(MGSLPC_INFO *info);
 440 static int set_rxenable(MGSLPC_INFO *info, int enable);
 441 static int wait_events(MGSLPC_INFO *info, int __user *mask);
 442
 443 static MGSLPC_INFO *mgslpc_device_list = NULL;
 444 static int mgslpc_device_count = 0;
 445
 446 /*
 447  * Set this param to non-zero to load eax with the
 448  * .text section address and breakpoint on module load.
 449  * This is useful for use with gdb and add-symbol-file command.
 450  */
 451 static int break_on_load=0;
 452
 453 /*
 454  * Driver major number, defaults to zero to get auto
 455  * assigned major number. May be forced as module parameter.
 456  */
 457 static int ttymajor=0;
 458
 459 static int debug_level = 0;
 460 static int maxframe[MAX_DEVICE_COUNT] = {0,};
 461
 462 module_param(break_on_load, bool, 0);
 463 module_param(ttymajor, int, 0);
 464 module_param(debug_level, int, 0);
 465 module_param_array(maxframe, int, NULL, 0);
 466
 467 MODULE_LICENSE("GPL");
 468
 469 static char *driver_name = "SyncLink PC Card driver";
 470 static char *driver_version = "$Revision: 4.34 $";
 471
 472 static struct tty_driver *serial_driver;
 473
 474 /* number of characters left in xmit buffer before we ask for more */
 475 #define WAKEUP_CHARS 256
 476
 477 static void mgslpc_change_params(MGSLPC_INFO *info);
 478 static void mgslpc_wait_until_sent(struct tty_struct *tty, int timeout);
 479
 480 /* PCMCIA prototypes */
 481
 482 static int mgslpc_config(struct pcmcia_device *link);
 483 static void mgslpc_release(u_long arg);
 484 static void mgslpc_detach(struct pcmcia_device *p_dev);
 485
 486 /*
 487  * 1st function defined in .text section. Calling this function in
 488  * init_module() followed by a breakpoint allows a remote debugger
 489  * (gdb) to get the .text address for the add-symbol-file command.
 490  * This allows remote debugging of dynamically loadable modules.
 491  */
 492 static void* mgslpc_get_text_ptr(void)
 493 {
 494         return mgslpc_get_text_ptr;
 495 }
 496
 497 /**
 498  * line discipline callback wrappers
 499  *
 500  * The wrappers maintain line discipline references
 501  * while calling into the line discipline.
 502  *
 503  * ldisc_receive_buf  - pass receive data to line discipline
 504  */
 505
 506 static void ldisc_receive_buf(struct tty_struct *tty,
 507                               const __u8 *data, char *flags, int count)
 508 {
 509         struct tty_ldisc *ld;
 510         if (!tty)
 511                 return;
 512         ld = tty_ldisc_ref(tty);
 513         if (ld) {
 514                 if (ld->ops->receive_buf)
 515                         ld->ops->receive_buf(tty, data, flags, count);
 516                 tty_ldisc_deref(ld);
 517         }
 518 }
 519
 520 static int mgslpc_probe(struct pcmcia_device *link)
 521 {
 522     MGSLPC_INFO *info;
 523     int ret;
 524
 525     if (debug_level >= DEBUG_LEVEL_INFO)
 526             printk("mgslpc_attach\n");
 527
 528     info = kzalloc(sizeof(MGSLPC_INFO), GFP_KERNEL);
 529     if (!info) {
 530             printk("Error can't allocate device instance data\n");
 531             return -ENOMEM;
 532     }
 533
 534     info->magic = MGSLPC_MAGIC;
 535     INIT_WORK(&info->task, bh_handler);
 536     info->max_frame_size = 4096;
 537     info->close_delay = 5*HZ/10;
 538     info->closing_wait = 30*HZ;
 539     init_waitqueue_head(&info->open_wait);
 540     init_waitqueue_head(&info->close_wait);
 541     init_waitqueue_head(&info->status_event_wait_q);
 542     init_waitqueue_head(&info->event_wait_q);
 543     spin_lock_init(&info->lock);
 544     spin_lock_init(&info->netlock);
 545     memcpy(&info->params,&default_params,sizeof(MGSL_PARAMS));
 546     info->idle_mode = HDLC_TXIDLE_FLAGS;
 547     info->imra_value = 0xffff;
 548     info->imrb_value = 0xffff;
 549     info->pim_value = 0xff;
 550
 551     info->p_dev = link;
 552     link->priv = info;
 553
 554     /* Initialize the struct pcmcia_device structure */
 555
 556     /* Interrupt setup */
 557     link->irq.Attributes = IRQ_TYPE_EXCLUSIVE;
 558     link->irq.IRQInfo1   = IRQ_LEVEL_ID;
 559     link->irq.Handler = NULL;
 560
 561     link->conf.Attributes = 0;
 562     link->conf.IntType = INT_MEMORY_AND_IO;
 563
 564     ret = mgslpc_config(link);
 565     if (ret)
 566             return ret;
 567
 568     mgslpc_add_device(info);
 569
 570     return 0;
 571 }
 572
 573 /* Card has been inserted.
 574  */
 575
 576 #define CS_CHECK(fn, ret) \
 577 do { last_fn = (fn); if ((last_ret = (ret)) != 0) goto cs_failed; } while (0)
 578
 579 static int mgslpc_config(struct pcmcia_device *link)
 580 {
 581     MGSLPC_INFO *info = link->priv;
 582     tuple_t tuple;
 583     cisparse_t parse;
 584     int last_fn, last_ret;
 585     u_char buf[64];
 586     cistpl_cftable_entry_t dflt = { 0 };
 587     cistpl_cftable_entry_t *cfg;
 588
 589     if (debug_level >= DEBUG_LEVEL_INFO)
 590             printk("mgslpc_config(0x%p)\n", link);
 591
 592     tuple.Attributes = 0;
 593     tuple.TupleData = buf;
 594     tuple.TupleDataMax = sizeof(buf);
 595     tuple.TupleOffset = 0;
 596
 597     /* get CIS configuration entry */
 598
 599     tuple.DesiredTuple = CISTPL_CFTABLE_ENTRY;
 600     CS_CHECK(GetFirstTuple, pcmcia_get_first_tuple(link, &tuple));
 601
 602     cfg = &(parse.cftable_entry);
 603     CS_CHECK(GetTupleData, pcmcia_get_tuple_data(link, &tuple));
 604     CS_CHECK(ParseTuple, pcmcia_parse_tuple(link, &tuple, &parse));
 605
 606     if (cfg->flags & CISTPL_CFTABLE_DEFAULT) dflt = *cfg;
 607     if (cfg->index == 0)
 608             goto cs_failed;
 609
 610     link->conf.ConfigIndex = cfg->index;
 611     link->conf.Attributes |= CONF_ENABLE_IRQ;
 612
 613     /* IO window settings */
 614     link->io.NumPorts1 = 0;
 615     if ((cfg->io.nwin > 0) || (dflt.io.nwin > 0)) {
 616             cistpl_io_t *io = (cfg->io.nwin) ? &cfg->io : &dflt.io;
 617             link->io.Attributes1 = IO_DATA_PATH_WIDTH_AUTO;
 618             if (!(io->flags & CISTPL_IO_8BIT))
 619                     link->io.Attributes1 = IO_DATA_PATH_WIDTH_16;
 620             if (!(io->flags & CISTPL_IO_16BIT))
 621                     link->io.Attributes1 = IO_DATA_PATH_WIDTH_8;
 622             link->io.IOAddrLines = io->flags & CISTPL_IO_LINES_MASK;
 623             link->io.BasePort1 = io->win[0].base;
 624             link->io.NumPorts1 = io->win[0].len;
 625             CS_CHECK(RequestIO, pcmcia_request_io(link, &link->io));
 626     }
 627
 628     link->conf.Attributes = CONF_ENABLE_IRQ;
 629     link->conf.IntType = INT_MEMORY_AND_IO;
 630     link->conf.ConfigIndex = 8;
 631     link->conf.Present = PRESENT_OPTION;
 632
 633     link->irq.Attributes |= IRQ_HANDLE_PRESENT;
 634     link->irq.Handler     = mgslpc_isr;
 635     link->irq.Instance    = info;
 636     CS_CHECK(RequestIRQ, pcmcia_request_irq(link, &link->irq));
 637
 638     CS_CHECK(RequestConfiguration, pcmcia_request_configuration(link, &link->conf));
 639
 640     info->io_base = link->io.BasePort1;
 641     info->irq_level = link->irq.AssignedIRQ;
 642
 643     /* add to linked list of devices */
 644     sprintf(info->node.dev_name, "mgslpc0");
 645     info->node.major = info->node.minor = 0;
 646     link->dev_node = &info->node;
 647
 648     printk(KERN_INFO "%s: index 0x%02x:",
 649            info->node.dev_name, link->conf.ConfigIndex);
 650     if (link->conf.Attributes & CONF_ENABLE_IRQ)
 651             printk(", irq %d", link->irq.AssignedIRQ);
 652     if (link->io.NumPorts1)
 653             printk(", io 0x%04x-0x%04x", link->io.BasePort1,
 654                    link->io.BasePort1+link->io.NumPorts1-1);
 655     printk("\n");
 656     return 0;
 657
 658 cs_failed:
 659     cs_error(link, last_fn, last_ret);
 660     mgslpc_release((u_long)link);
 661     return -ENODEV;
 662 }
 663
 664 /* Card has been removed.
 665  * Unregister device and release PCMCIA configuration.
 666  * If device is open, postpone until it is closed.
 667  */
 668 static void mgslpc_release(u_long arg)
 669 {
 670         struct pcmcia_device *link = (struct pcmcia_device *)arg;
 671
 672         if (debug_level >= DEBUG_LEVEL_INFO)
 673                 printk("mgslpc_release(0x%p)\n", link);
 674
 675         pcmcia_disable_device(link);
 676 }
 677
 678 static void mgslpc_detach(struct pcmcia_device *link)
 679 {
 680         if (debug_level >= DEBUG_LEVEL_INFO)
 681                 printk("mgslpc_detach(0x%p)\n", link);
 682
 683         ((MGSLPC_INFO *)link->priv)->stop = 1;
 684         mgslpc_release((u_long)link);
 685
 686         mgslpc_remove_device((MGSLPC_INFO *)link->priv);
 687 }
 688
 689 static int mgslpc_suspend(struct pcmcia_device *link)
 690 {
 691         MGSLPC_INFO *info = link->priv;
 692
 693         info->stop = 1;
 694
 695         return 0;
 696 }
 697
 698 static int mgslpc_resume(struct pcmcia_device *link)
 699 {
 700         MGSLPC_INFO *info = link->priv;
 701
 702         info->stop = 0;
 703
 704         return 0;
 705 }
 706
 707
 708 static inline bool mgslpc_paranoia_check(MGSLPC_INFO *info,
 709                                         char *name, const char *routine)
 710 {
 711 #ifdef MGSLPC_PARANOIA_CHECK
 712         static const char *badmagic =
 713                 "Warning: bad magic number for mgsl struct (%s) in %s\n";
 714         static const char *badinfo =
 715                 "Warning: null mgslpc_info for (%s) in %s\n";
 716
 717         if (!info) {
 718                 printk(badinfo, name, routine);
 719                 return true;
 720         }
 721         if (info->magic != MGSLPC_MAGIC) {
 722                 printk(badmagic, name, routine);
 723                 return true;
 724         }
 725 #else
 726         if (!info)
 727                 return true;
 728 #endif
 729         return false;
 730 }
 731
 732
 733 #define CMD_RXFIFO      BIT7    // release current rx FIFO
 734 #define CMD_RXRESET     BIT6    // receiver reset
 735 #define CMD_RXFIFO_READ BIT5
 736 #define CMD_START_TIMER BIT4
 737 #define CMD_TXFIFO      BIT3    // release current tx FIFO
 738 #define CMD_TXEOM       BIT1    // transmit end message
 739 #define CMD_TXRESET     BIT0    // transmit reset
 740
 741 static bool wait_command_complete(MGSLPC_INFO *info, unsigned char channel)
 742 {
 743         int i = 0;
 744         /* wait for command completion */
 745         while (read_reg(info, (unsigned char)(channel+STAR)) & BIT2) {
 746                 udelay(1);
 747                 if (i++ == 1000)
 748                         return false;
 749         }
 750         return true;
 751 }
 752
 753 static void issue_command(MGSLPC_INFO *info, unsigned char channel, unsigned char cmd)
 754 {
 755         wait_command_complete(info, channel);
 756         write_reg(info, (unsigned char) (channel + CMDR), cmd);
 757 }
 758
 759 static void tx_pause(struct tty_struct *tty)
 760 {
 761         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
 762         unsigned long flags;
 763
 764         if (mgslpc_paranoia_check(info, tty->name, "tx_pause"))
 765                 return;
 766         if (debug_level >= DEBUG_LEVEL_INFO)
 767                 printk("tx_pause(%s)\n",info->device_name);
 768
 769         spin_lock_irqsave(&info->lock,flags);
 770         if (info->tx_enabled)
 771                 tx_stop(info);
 772         spin_unlock_irqrestore(&info->lock,flags);
 773 }
 774
 775 static void tx_release(struct tty_struct *tty)
 776 {
 777         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
 778         unsigned long flags;
 779
 780         if (mgslpc_paranoia_check(info, tty->name, "tx_release"))
 781                 return;
 782         if (debug_level >= DEBUG_LEVEL_INFO)
 783                 printk("tx_release(%s)\n",info->device_name);
 784
 785         spin_lock_irqsave(&info->lock,flags);
 786         if (!info->tx_enabled)
 787                 tx_start(info);
 788         spin_unlock_irqrestore(&info->lock,flags);
 789 }
 790
 791 /* Return next bottom half action to perform.
 792  * or 0 if nothing to do.
 793  */
 794 static int bh_action(MGSLPC_INFO *info)
 795 {
 796         unsigned long flags;
 797         int rc = 0;
 798
 799         spin_lock_irqsave(&info->lock,flags);
 800
 801         if (info->pending_bh & BH_RECEIVE) {
 802                 info->pending_bh &= ~BH_RECEIVE;
 803                 rc = BH_RECEIVE;
 804         } else if (info->pending_bh & BH_TRANSMIT) {
 805                 info->pending_bh &= ~BH_TRANSMIT;
 806                 rc = BH_TRANSMIT;
 807         } else if (info->pending_bh & BH_STATUS) {
 808                 info->pending_bh &= ~BH_STATUS;
 809                 rc = BH_STATUS;
 810         }
 811
 812         if (!rc) {
 813                 /* Mark BH routine as complete */
 814                 info->bh_running = false;
 815                 info->bh_requested = false;
 816         }
 817
 818         spin_unlock_irqrestore(&info->lock,flags);
 819
 820         return rc;
 821 }
 822
 823 static void bh_handler(struct work_struct *work)
 824 {
 825         MGSLPC_INFO *info = container_of(work, MGSLPC_INFO, task);
 826         int action;
 827
 828         if (!info)
 829                 return;
 830
 831         if (debug_level >= DEBUG_LEVEL_BH)
 832                 printk( "%s(%d):bh_handler(%s) entry\n",
 833                         __FILE__,__LINE__,info->device_name);
 834
 835         info->bh_running = true;
 836
 837         while((action = bh_action(info)) != 0) {
 838
 839                 /* Process work item */
 840                 if ( debug_level >= DEBUG_LEVEL_BH )
 841                         printk( "%s(%d):bh_handler() work item action=%d\n",
 842                                 __FILE__,__LINE__,action);
 843
 844                 switch (action) {
 845
 846                 case BH_RECEIVE:
 847                         while(rx_get_frame(info));
 848                         break;
 849                 case BH_TRANSMIT:
 850                         bh_transmit(info);
 851                         break;
 852                 case BH_STATUS:
 853                         bh_status(info);
 854                         break;
 855                 default:
 856                         /* unknown work item ID */
 857                         printk("Unknown work item ID=%08X!\n", action);
 858                         break;
 859                 }
 860         }
 861
 862         if (debug_level >= DEBUG_LEVEL_BH)
 863                 printk( "%s(%d):bh_handler(%s) exit\n",
 864                         __FILE__,__LINE__,info->device_name);
 865 }
 866
 867 static void bh_transmit(MGSLPC_INFO *info)
 868 {
 869         struct tty_struct *tty = info->tty;
 870         if (debug_level >= DEBUG_LEVEL_BH)
 871                 printk("bh_transmit() entry on %s\n", info->device_name);
 872
 873         if (tty)
 874                 tty_wakeup(tty);
 875 }
 876
 877 static void bh_status(MGSLPC_INFO *info)
 878 {
 879         info->ri_chkcount = 0;
 880         info->dsr_chkcount = 0;
 881         info->dcd_chkcount = 0;
 882         info->cts_chkcount = 0;
 883 }
 884
 885 /* eom: non-zero = end of frame */
 886 static void rx_ready_hdlc(MGSLPC_INFO *info, int eom)
 887 {
 888         unsigned char data[2];
 889         unsigned char fifo_count, read_count, i;
 890         RXBUF *buf = (RXBUF*)(info->rx_buf + (info->rx_put * info->rx_buf_size));
 891
 892         if (debug_level >= DEBUG_LEVEL_ISR)
 893                 printk("%s(%d):rx_ready_hdlc(eom=%d)\n",__FILE__,__LINE__,eom);
 894
 895         if (!info->rx_enabled)
 896                 return;
 897
 898         if (info->rx_frame_count >= info->rx_buf_count) {
 899                 /* no more free buffers */
 900                 issue_command(info, CHA, CMD_RXRESET);
 901                 info->pending_bh |= BH_RECEIVE;
 902                 info->rx_overflow = true;
 903                 info->icount.buf_overrun++;
 904                 return;
 905         }
 906
 907         if (eom) {
 908                 /* end of frame, get FIFO count from RBCL register */
 909                 if (!(fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f)))
 910                         fifo_count = 32;
 911         } else
 912                 fifo_count = 32;
 913
 914         do {
 915                 if (fifo_count == 1) {
 916                         read_count = 1;
 917                         data[0] = read_reg(info, CHA + RXFIFO);
 918                 } else {
 919                         read_count = 2;
 920                         *((unsigned short *) data) = read_reg16(info, CHA + RXFIFO);
 921                 }
 922                 fifo_count -= read_count;
 923                 if (!fifo_count && eom)
 924                         buf->status = data[--read_count];
 925
 926                 for (i = 0; i < read_count; i++) {
 927                         if (buf->count >= info->max_frame_size) {
 928                                 /* frame too large, reset receiver and reset current buffer */
 929                                 issue_command(info, CHA, CMD_RXRESET);
 930                                 buf->count = 0;
 931                                 return;
 932                         }
 933                         *(buf->data + buf->count) = data[i];
 934                         buf->count++;
 935                 }
 936         } while (fifo_count);
 937
 938         if (eom) {
 939                 info->pending_bh |= BH_RECEIVE;
 940                 info->rx_frame_count++;
 941                 info->rx_put++;
 942                 if (info->rx_put >= info->rx_buf_count)
 943                         info->rx_put = 0;
 944         }
 945         issue_command(info, CHA, CMD_RXFIFO);
 946 }
 947
 948 static void rx_ready_async(MGSLPC_INFO *info, int tcd)
 949 {
 950         unsigned char data, status, flag;
 951         int fifo_count;
 952         int work = 0;
 953         struct tty_struct *tty = info->tty;
 954         struct mgsl_icount *icount = &info->icount;
 955
 956         if (tcd) {
 957                 /* early termination, get FIFO count from RBCL register */
 958                 fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f);
 959
 960                 /* Zero fifo count could mean 0 or 32 bytes available.
 961                  * If BIT5 of STAR is set then at least 1 byte is available.
 962                  */
 963                 if (!fifo_count && (read_reg(info,CHA+STAR) & BIT5))
 964                         fifo_count = 32;
 965         } else
 966                 fifo_count = 32;
 967
 968         tty_buffer_request_room(tty, fifo_count);
 969         /* Flush received async data to receive data buffer. */
 970         while (fifo_count) {
 971                 data   = read_reg(info, CHA + RXFIFO);
 972                 status = read_reg(info, CHA + RXFIFO);
 973                 fifo_count -= 2;
 974
 975                 icount->rx++;
 976                 flag = TTY_NORMAL;
 977
 978                 // if no frameing/crc error then save data
 979                 // BIT7:parity error
 980                 // BIT6:framing error
 981
 982                 if (status & (BIT7 + BIT6)) {
 983                         if (status & BIT7)
 984                                 icount->parity++;
 985                         else
 986                                 icount->frame++;
 987
 988                         /* discard char if tty control flags say so */
 989                         if (status & info->ignore_status_mask)
 990                                 continue;
 991
 992                         status &= info->read_status_mask;
 993
 994                         if (status & BIT7)
 995                                 flag = TTY_PARITY;
 996                         else if (status & BIT6)
 997                                 flag = TTY_FRAME;
 998                 }
 999                 work += tty_insert_flip_char(tty, data, flag);
1000         }
1001         issue_command(info, CHA, CMD_RXFIFO);
1002
1003         if (debug_level >= DEBUG_LEVEL_ISR) {
1004                 printk("%s(%d):rx_ready_async",
1005                         __FILE__,__LINE__);
1006                 printk("%s(%d):rx=%d brk=%d parity=%d frame=%d overrun=%d\n",
1007                         __FILE__,__LINE__,icount->rx,icount->brk,
1008                         icount->parity,icount->frame,icount->overrun);
1009         }
1010
1011         if (work)
1012                 tty_flip_buffer_push(tty);
1013 }
1014
1015
1016 static void tx_done(MGSLPC_INFO *info)
1017 {
1018         if (!info->tx_active)
1019                 return;
1020
1021         info->tx_active = false;
1022         info->tx_aborting = false;
1023
1024         if (info->params.mode == MGSL_MODE_ASYNC)
1025                 return;
1026
1027         info->tx_count = info->tx_put = info->tx_get = 0;
1028         del_timer(&info->tx_timer);
1029
1030         if (info->drop_rts_on_tx_done) {
1031                 get_signals(info);
1032                 if (info->serial_signals & SerialSignal_RTS) {
1033                         info->serial_signals &= ~SerialSignal_RTS;
1034                         set_signals(info);
1035                 }
1036                 info->drop_rts_on_tx_done = false;
1037         }
1038
1039 #if SYNCLINK_GENERIC_HDLC
1040         if (info->netcount)
1041                 hdlcdev_tx_done(info);
1042         else
1043 #endif
1044         {
1045                 if (info->tty->stopped || info->tty->hw_stopped) {
1046                         tx_stop(info);
1047                         return;
1048                 }
1049                 info->pending_bh |= BH_TRANSMIT;
1050         }
1051 }
1052
1053 static void tx_ready(MGSLPC_INFO *info)
1054 {
1055         unsigned char fifo_count = 32;
1056         int c;
1057
1058         if (debug_level >= DEBUG_LEVEL_ISR)
1059                 printk("%s(%d):tx_ready(%s)\n", __FILE__,__LINE__,info->device_name);
1060
1061         if (info->params.mode == MGSL_MODE_HDLC) {
1062                 if (!info->tx_active)
1063                         return;
1064         } else {
1065                 if (info->tty->stopped || info->tty->hw_stopped) {
1066                         tx_stop(info);
1067                         return;
1068                 }
1069                 if (!info->tx_count)
1070                         info->tx_active = false;
1071         }
1072
1073         if (!info->tx_count)
1074                 return;
1075
1076         while (info->tx_count && fifo_count) {
1077                 c = min(2, min_t(int, fifo_count, min(info->tx_count, TXBUFSIZE - info->tx_get)));
1078
1079                 if (c == 1) {
1080                         write_reg(info, CHA + TXFIFO, *(info->tx_buf + info->tx_get));
1081                 } else {
1082                         write_reg16(info, CHA + TXFIFO,
1083                                           *((unsigned short*)(info->tx_buf + info->tx_get)));
1084                 }
1085                 info->tx_count -= c;
1086                 info->tx_get = (info->tx_get + c) & (TXBUFSIZE - 1);
1087                 fifo_count -= c;
1088         }
1089
1090         if (info->params.mode == MGSL_MODE_ASYNC) {
1091                 if (info->tx_count < WAKEUP_CHARS)
1092                         info->pending_bh |= BH_TRANSMIT;
1093                 issue_command(info, CHA, CMD_TXFIFO);
1094         } else {
1095                 if (info->tx_count)
1096                         issue_command(info, CHA, CMD_TXFIFO);
1097                 else
1098                         issue_command(info, CHA, CMD_TXFIFO + CMD_TXEOM);
1099         }
1100 }
1101
1102 static void cts_change(MGSLPC_INFO *info)
1103 {
1104         get_signals(info);
1105         if ((info->cts_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1106                 irq_disable(info, CHB, IRQ_CTS);
1107         info->icount.cts++;
1108         if (info->serial_signals & SerialSignal_CTS)
1109                 info->input_signal_events.cts_up++;
1110         else
1111                 info->input_signal_events.cts_down++;
1112         wake_up_interruptible(&info->status_event_wait_q);
1113         wake_up_interruptible(&info->event_wait_q);
1114
1115         if (info->flags & ASYNC_CTS_FLOW) {
1116                 if (info->tty->hw_stopped) {
1117                         if (info->serial_signals & SerialSignal_CTS) {
1118                                 if (debug_level >= DEBUG_LEVEL_ISR)
1119                                         printk("CTS tx start...");
1120                                 if (info->tty)
1121                                         info->tty->hw_stopped = 0;
1122                                 tx_start(info);
1123                                 info->pending_bh |= BH_TRANSMIT;
1124                                 return;
1125                         }
1126                 } else {
1127                         if (!(info->serial_signals & SerialSignal_CTS)) {
1128                                 if (debug_level >= DEBUG_LEVEL_ISR)
1129                                         printk("CTS tx stop...");
1130                                 if (info->tty)
1131                                         info->tty->hw_stopped = 1;
1132                                 tx_stop(info);
1133                         }
1134                 }
1135         }
1136         info->pending_bh |= BH_STATUS;
1137 }
1138
1139 static void dcd_change(MGSLPC_INFO *info)
1140 {
1141         get_signals(info);
1142         if ((info->dcd_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1143                 irq_disable(info, CHB, IRQ_DCD);
1144         info->icount.dcd++;
1145         if (info->serial_signals & SerialSignal_DCD) {
1146                 info->input_signal_events.dcd_up++;
1147         }
1148         else
1149                 info->input_signal_events.dcd_down++;
1150 #if SYNCLINK_GENERIC_HDLC
1151         if (info->netcount) {
1152                 if (info->serial_signals & SerialSignal_DCD)
1153                         netif_carrier_on(info->netdev);
1154                 else
1155                         netif_carrier_off(info->netdev);
1156         }
1157 #endif
1158         wake_up_interruptible(&info->status_event_wait_q);
1159         wake_up_interruptible(&info->event_wait_q);
1160
1161         if (info->flags & ASYNC_CHECK_CD) {
1162                 if (debug_level >= DEBUG_LEVEL_ISR)
1163                         printk("%s CD now %s...", info->device_name,
1164                                (info->serial_signals & SerialSignal_DCD) ? "on" : "off");
1165                 if (info->serial_signals & SerialSignal_DCD)
1166                         wake_up_interruptible(&info->open_wait);
1167                 else {
1168                         if (debug_level >= DEBUG_LEVEL_ISR)
1169                                 printk("doing serial hangup...");
1170                         if (info->tty)
1171                                 tty_hangup(info->tty);
1172                 }
1173         }
1174         info->pending_bh |= BH_STATUS;
1175 }
1176
1177 static void dsr_change(MGSLPC_INFO *info)
1178 {
1179         get_signals(info);
1180         if ((info->dsr_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1181                 port_irq_disable(info, PVR_DSR);
1182         info->icount.dsr++;
1183         if (info->serial_signals & SerialSignal_DSR)
1184                 info->input_signal_events.dsr_up++;
1185         else
1186                 info->input_signal_events.dsr_down++;
1187         wake_up_interruptible(&info->status_event_wait_q);
1188         wake_up_interruptible(&info->event_wait_q);
1189         info->pending_bh |= BH_STATUS;
1190 }
1191
1192 static void ri_change(MGSLPC_INFO *info)
1193 {
1194         get_signals(info);
1195         if ((info->ri_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1196                 port_irq_disable(info, PVR_RI);
1197         info->icount.rng++;
1198         if (info->serial_signals & SerialSignal_RI)
1199                 info->input_signal_events.ri_up++;
1200         else
1201                 info->input_signal_events.ri_down++;
1202         wake_up_interruptible(&info->status_event_wait_q);
1203         wake_up_interruptible(&info->event_wait_q);
1204         info->pending_bh |= BH_STATUS;
1205 }
1206
1207 /* Interrupt service routine entry point.
1208  *
1209  * Arguments:
1210  *
1211  * irq     interrupt number that caused interrupt
1212  * dev_id  device ID supplied during interrupt registration
1213  */
1214 static irqreturn_t mgslpc_isr(int dummy, void *dev_id)
1215 {
1216         MGSLPC_INFO *info = dev_id;
1217         unsigned short isr;
1218         unsigned char gis, pis;
1219         int count=0;
1220
1221         if (debug_level >= DEBUG_LEVEL_ISR)
1222                 printk("mgslpc_isr(%d) entry.\n", info->irq_level);
1223
1224         if (!(info->p_dev->_locked))
1225                 return IRQ_HANDLED;
1226
1227         spin_lock(&info->lock);
1228
1229         while ((gis = read_reg(info, CHA + GIS))) {
1230                 if (debug_level >= DEBUG_LEVEL_ISR)
1231                         printk("mgslpc_isr %s gis=%04X\n", info->device_name,gis);
1232
1233                 if ((gis & 0x70) || count > 1000) {
1234                         printk("synclink_cs:hardware failed or ejected\n");
1235                         break;
1236                 }
1237                 count++;
1238
1239                 if (gis & (BIT1 + BIT0)) {
1240                         isr = read_reg16(info, CHB + ISR);
1241                         if (isr & IRQ_DCD)
1242                                 dcd_change(info);
1243                         if (isr & IRQ_CTS)
1244                                 cts_change(info);
1245                 }
1246                 if (gis & (BIT3 + BIT2))
1247                 {
1248                         isr = read_reg16(info, CHA + ISR);
1249                         if (isr & IRQ_TIMER) {
1250                                 info->irq_occurred = true;
1251                                 irq_disable(info, CHA, IRQ_TIMER);
1252                         }
1253
1254                         /* receive IRQs */
1255                         if (isr & IRQ_EXITHUNT) {
1256                                 info->icount.exithunt++;
1257                                 wake_up_interruptible(&info->event_wait_q);
1258                         }
1259                         if (isr & IRQ_BREAK_ON) {
1260                                 info->icount.brk++;
1261                                 if (info->flags & ASYNC_SAK)
1262                                         do_SAK(info->tty);
1263                         }
1264                         if (isr & IRQ_RXTIME) {
1265                                 issue_command(info, CHA, CMD_RXFIFO_READ);
1266                         }
1267                         if (isr & (IRQ_RXEOM + IRQ_RXFIFO)) {
1268                                 if (info->params.mode == MGSL_MODE_HDLC)
1269                                         rx_ready_hdlc(info, isr & IRQ_RXEOM);
1270                                 else
1271                                         rx_ready_async(info, isr & IRQ_RXEOM);
1272                         }
1273
1274                         /* transmit IRQs */
1275                         if (isr & IRQ_UNDERRUN) {
1276                                 if (info->tx_aborting)
1277                                         info->icount.txabort++;
1278                                 else
1279                                         info->icount.txunder++;
1280                                 tx_done(info);
1281                         }
1282                         else if (isr & IRQ_ALLSENT) {
1283                                 info->icount.txok++;
1284                                 tx_done(info);
1285                         }
1286                         else if (isr & IRQ_TXFIFO)
1287                                 tx_ready(info);
1288                 }
1289                 if (gis & BIT7) {
1290                         pis = read_reg(info, CHA + PIS);
1291                         if (pis & BIT1)
1292                                 dsr_change(info);
1293                         if (pis & BIT2)
1294                                 ri_change(info);
1295                 }
1296         }
1297
1298         /* Request bottom half processing if there's something
1299          * for it to do and the bh is not already running
1300          */
1301
1302         if (info->pending_bh && !info->bh_running && !info->bh_requested) {
1303                 if ( debug_level >= DEBUG_LEVEL_ISR )
1304                         printk("%s(%d):%s queueing bh task.\n",
1305                                 __FILE__,__LINE__,info->device_name);
1306                 schedule_work(&info->task);
1307                 info->bh_requested = true;
1308         }
1309
1310         spin_unlock(&info->lock);
1311
1312         if (debug_level >= DEBUG_LEVEL_ISR)
1313                 printk("%s(%d):mgslpc_isr(%d)exit.\n",
1314                        __FILE__, __LINE__, info->irq_level);
1315
1316         return IRQ_HANDLED;
1317 }
1318
1319 /* Initialize and start device.
1320  */
1321 static int startup(MGSLPC_INFO * info)
1322 {
1323         int retval = 0;
1324
1325         if (debug_level >= DEBUG_LEVEL_INFO)
1326                 printk("%s(%d):startup(%s)\n",__FILE__,__LINE__,info->device_name);
1327
1328         if (info->flags & ASYNC_INITIALIZED)
1329                 return 0;
1330
1331         if (!info->tx_buf) {
1332                 /* allocate a page of memory for a transmit buffer */
1333                 info->tx_buf = (unsigned char *)get_zeroed_page(GFP_KERNEL);
1334                 if (!info->tx_buf) {
1335                         printk(KERN_ERR"%s(%d):%s can't allocate transmit buffer\n",
1336                                 __FILE__,__LINE__,info->device_name);
1337                         return -ENOMEM;
1338                 }
1339         }
1340
1341         info->pending_bh = 0;
1342
1343         memset(&info->icount, 0, sizeof(info->icount));
1344
1345         setup_timer(&info->tx_timer, tx_timeout, (unsigned long)info);
1346
1347         /* Allocate and claim adapter resources */
1348         retval = claim_resources(info);
1349
1350         /* perform existance check and diagnostics */
1351         if ( !retval )
1352                 retval = adapter_test(info);
1353
1354         if ( retval ) {
1355                 if (capable(CAP_SYS_ADMIN) && info->tty)
1356                         set_bit(TTY_IO_ERROR, &info->tty->flags);
1357                 release_resources(info);
1358                 return retval;
1359         }
1360
1361         /* program hardware for current parameters */
1362         mgslpc_change_params(info);
1363
1364         if (info->tty)
1365                 clear_bit(TTY_IO_ERROR, &info->tty->flags);
1366
1367         info->flags |= ASYNC_INITIALIZED;
1368
1369         return 0;
1370 }
1371
1372 /* Called by mgslpc_close() and mgslpc_hangup() to shutdown hardware
1373  */
1374 static void shutdown(MGSLPC_INFO * info)
1375 {
1376         unsigned long flags;
1377
1378         if (!(info->flags & ASYNC_INITIALIZED))
1379                 return;
1380
1381         if (debug_level >= DEBUG_LEVEL_INFO)
1382                 printk("%s(%d):mgslpc_shutdown(%s)\n",
1383                          __FILE__,__LINE__, info->device_name );
1384
1385         /* clear status wait queue because status changes */
1386         /* can't happen after shutting down the hardware */
1387         wake_up_interruptible(&info->status_event_wait_q);
1388         wake_up_interruptible(&info->event_wait_q);
1389
1390         del_timer_sync(&info->tx_timer);
1391
1392         if (info->tx_buf) {
1393                 free_page((unsigned long) info->tx_buf);
1394                 info->tx_buf = NULL;
1395         }
1396
1397         spin_lock_irqsave(&info->lock,flags);
1398
1399         rx_stop(info);
1400         tx_stop(info);
1401
1402         /* TODO:disable interrupts instead of reset to preserve signal states */
1403         reset_device(info);
1404
1405         if (!info->tty || info->tty->termios->c_cflag & HUPCL) {
1406                 info->serial_signals &= ~(SerialSignal_DTR + SerialSignal_RTS);
1407                 set_signals(info);
1408         }
1409
1410         spin_unlock_irqrestore(&info->lock,flags);
1411
1412         release_resources(info);
1413
1414         if (info->tty)
1415                 set_bit(TTY_IO_ERROR, &info->tty->flags);
1416
1417         info->flags &= ~ASYNC_INITIALIZED;
1418 }
1419
1420 static void mgslpc_program_hw(MGSLPC_INFO *info)
1421 {
1422         unsigned long flags;
1423
1424         spin_lock_irqsave(&info->lock,flags);
1425
1426         rx_stop(info);
1427         tx_stop(info);
1428         info->tx_count = info->tx_put = info->tx_get = 0;
1429
1430         if (info->params.mode == MGSL_MODE_HDLC || info->netcount)
1431                 hdlc_mode(info);
1432         else
1433                 async_mode(info);
1434
1435         set_signals(info);
1436
1437         info->dcd_chkcount = 0;
1438         info->cts_chkcount = 0;
1439         info->ri_chkcount = 0;
1440         info->dsr_chkcount = 0;
1441
1442         irq_enable(info, CHB, IRQ_DCD | IRQ_CTS);
1443         port_irq_enable(info, (unsigned char) PVR_DSR | PVR_RI);
1444         get_signals(info);
1445
1446         if (info->netcount || info->tty->termios->c_cflag & CREAD)
1447                 rx_start(info);
1448
1449         spin_unlock_irqrestore(&info->lock,flags);
1450 }
1451
1452 /* Reconfigure adapter based on new parameters
1453  */
1454 static void mgslpc_change_params(MGSLPC_INFO *info)
1455 {
1456         unsigned cflag;
1457         int bits_per_char;
1458
1459         if (!info->tty || !info->tty->termios)
1460                 return;
1461
1462         if (debug_level >= DEBUG_LEVEL_INFO)
1463                 printk("%s(%d):mgslpc_change_params(%s)\n",
1464                          __FILE__,__LINE__, info->device_name );
1465
1466         cflag = info->tty->termios->c_cflag;
1467
1468         /* if B0 rate (hangup) specified then negate DTR and RTS */
1469         /* otherwise assert DTR and RTS */
1470         if (cflag & CBAUD)
1471                 info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
1472         else
1473                 info->serial_signals &= ~(SerialSignal_RTS + SerialSignal_DTR);
1474
1475         /* byte size and parity */
1476
1477         switch (cflag & CSIZE) {
1478         case CS5: info->params.data_bits = 5; break;
1479         case CS6: info->params.data_bits = 6; break;
1480         case CS7: info->params.data_bits = 7; break;
1481         case CS8: info->params.data_bits = 8; break;
1482         default:  info->params.data_bits = 7; break;
1483         }
1484
1485         if (cflag & CSTOPB)
1486                 info->params.stop_bits = 2;
1487         else
1488                 info->params.stop_bits = 1;
1489
1490         info->params.parity = ASYNC_PARITY_NONE;
1491         if (cflag & PARENB) {
1492                 if (cflag & PARODD)
1493                         info->params.parity = ASYNC_PARITY_ODD;
1494                 else
1495                         info->params.parity = ASYNC_PARITY_EVEN;
1496 #ifdef CMSPAR
1497                 if (cflag & CMSPAR)
1498                         info->params.parity = ASYNC_PARITY_SPACE;
1499 #endif
1500         }
1501
1502         /* calculate number of jiffies to transmit a full
1503          * FIFO (32 bytes) at specified data rate
1504          */
1505         bits_per_char = info->params.data_bits +
1506                         info->params.stop_bits + 1;
1507
1508         /* if port data rate is set to 460800 or less then
1509          * allow tty settings to override, otherwise keep the
1510          * current data rate.
1511          */
1512         if (info->params.data_rate <= 460800) {
1513                 info->params.data_rate = tty_get_baud_rate(info->tty);
1514         }
1515
1516         if ( info->params.data_rate ) {
1517                 info->timeout = (32*HZ*bits_per_char) /
1518                                 info->params.data_rate;
1519         }
1520         info->timeout += HZ/50;         /* Add .02 seconds of slop */
1521
1522         if (cflag & CRTSCTS)
1523                 info->flags |= ASYNC_CTS_FLOW;
1524         else
1525                 info->flags &= ~ASYNC_CTS_FLOW;
1526
1527         if (cflag & CLOCAL)
1528                 info->flags &= ~ASYNC_CHECK_CD;
1529         else
1530                 info->flags |= ASYNC_CHECK_CD;
1531
1532         /* process tty input control flags */
1533
1534         info->read_status_mask = 0;
1535         if (I_INPCK(info->tty))
1536                 info->read_status_mask |= BIT7 | BIT6;
1537         if (I_IGNPAR(info->tty))
1538                 info->ignore_status_mask |= BIT7 | BIT6;
1539
1540         mgslpc_program_hw(info);
1541 }
1542
1543 /* Add a character to the transmit buffer
1544  */
1545 static int mgslpc_put_char(struct tty_struct *tty, unsigned char ch)
1546 {
1547         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1548         unsigned long flags;
1549
1550         if (debug_level >= DEBUG_LEVEL_INFO) {
1551                 printk( "%s(%d):mgslpc_put_char(%d) on %s\n",
1552                         __FILE__,__LINE__,ch,info->device_name);
1553         }
1554
1555         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_put_char"))
1556                 return 0;
1557
1558         if (!info->tx_buf)
1559                 return 0;
1560
1561         spin_lock_irqsave(&info->lock,flags);
1562
1563         if (info->params.mode == MGSL_MODE_ASYNC || !info->tx_active) {
1564                 if (info->tx_count < TXBUFSIZE - 1) {
1565                         info->tx_buf[info->tx_put++] = ch;
1566                         info->tx_put &= TXBUFSIZE-1;
1567                         info->tx_count++;
1568                 }
1569         }
1570
1571         spin_unlock_irqrestore(&info->lock,flags);
1572         return 1;
1573 }
1574
1575 /* Enable transmitter so remaining characters in the
1576  * transmit buffer are sent.
1577  */
1578 static void mgslpc_flush_chars(struct tty_struct *tty)
1579 {
1580         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1581         unsigned long flags;
1582
1583         if (debug_level >= DEBUG_LEVEL_INFO)
1584                 printk( "%s(%d):mgslpc_flush_chars() entry on %s tx_count=%d\n",
1585                         __FILE__,__LINE__,info->device_name,info->tx_count);
1586
1587         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_chars"))
1588                 return;
1589
1590         if (info->tx_count <= 0 || tty->stopped ||
1591             tty->hw_stopped || !info->tx_buf)
1592                 return;
1593
1594         if (debug_level >= DEBUG_LEVEL_INFO)
1595                 printk( "%s(%d):mgslpc_flush_chars() entry on %s starting transmitter\n",
1596                         __FILE__,__LINE__,info->device_name);
1597
1598         spin_lock_irqsave(&info->lock,flags);
1599         if (!info->tx_active)
1600                 tx_start(info);
1601         spin_unlock_irqrestore(&info->lock,flags);
1602 }
1603
1604 /* Send a block of data
1605  *
1606  * Arguments:
1607  *
1608  * tty        pointer to tty information structure
1609  * buf        pointer to buffer containing send data
1610  * count      size of send data in bytes
1611  *
1612  * Returns: number of characters written
1613  */
1614 static int mgslpc_write(struct tty_struct * tty,
1615                         const unsigned char *buf, int count)
1616 {
1617         int c, ret = 0;
1618         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1619         unsigned long flags;
1620
1621         if (debug_level >= DEBUG_LEVEL_INFO)
1622                 printk( "%s(%d):mgslpc_write(%s) count=%d\n",
1623                         __FILE__,__LINE__,info->device_name,count);
1624
1625         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write") ||
1626                 !info->tx_buf)
1627                 goto cleanup;
1628
1629         if (info->params.mode == MGSL_MODE_HDLC) {
1630                 if (count > TXBUFSIZE) {
1631                         ret = -EIO;
1632                         goto cleanup;
1633                 }
1634                 if (info->tx_active)
1635                         goto cleanup;
1636                 else if (info->tx_count)
1637                         goto start;
1638         }
1639
1640         for (;;) {
1641                 c = min(count,
1642                         min(TXBUFSIZE - info->tx_count - 1,
1643                             TXBUFSIZE - info->tx_put));
1644                 if (c <= 0)
1645                         break;
1646
1647                 memcpy(info->tx_buf + info->tx_put, buf, c);
1648
1649                 spin_lock_irqsave(&info->lock,flags);
1650                 info->tx_put = (info->tx_put + c) & (TXBUFSIZE-1);
1651                 info->tx_count += c;
1652                 spin_unlock_irqrestore(&info->lock,flags);
1653
1654                 buf += c;
1655                 count -= c;
1656                 ret += c;
1657         }
1658 start:
1659         if (info->tx_count && !tty->stopped && !tty->hw_stopped) {
1660                 spin_lock_irqsave(&info->lock,flags);
1661                 if (!info->tx_active)
1662                         tx_start(info);
1663                 spin_unlock_irqrestore(&info->lock,flags);
1664         }
1665 cleanup:
1666         if (debug_level >= DEBUG_LEVEL_INFO)
1667                 printk( "%s(%d):mgslpc_write(%s) returning=%d\n",
1668                         __FILE__,__LINE__,info->device_name,ret);
1669         return ret;
1670 }
1671
1672 /* Return the count of free bytes in transmit buffer
1673  */
1674 static int mgslpc_write_room(struct tty_struct *tty)
1675 {
1676         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1677         int ret;
1678
1679         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write_room"))
1680                 return 0;
1681
1682         if (info->params.mode == MGSL_MODE_HDLC) {
1683                 /* HDLC (frame oriented) mode */
1684                 if (info->tx_active)
1685                         return 0;
1686                 else
1687                         return HDLC_MAX_FRAME_SIZE;
1688         } else {
1689                 ret = TXBUFSIZE - info->tx_count - 1;
1690                 if (ret < 0)
1691                         ret = 0;
1692         }
1693
1694         if (debug_level >= DEBUG_LEVEL_INFO)
1695                 printk("%s(%d):mgslpc_write_room(%s)=%d\n",
1696                          __FILE__,__LINE__, info->device_name, ret);
1697         return ret;
1698 }
1699
1700 /* Return the count of bytes in transmit buffer
1701  */
1702 static int mgslpc_chars_in_buffer(struct tty_struct *tty)
1703 {
1704         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1705         int rc;
1706
1707         if (debug_level >= DEBUG_LEVEL_INFO)
1708                 printk("%s(%d):mgslpc_chars_in_buffer(%s)\n",
1709                          __FILE__,__LINE__, info->device_name );
1710
1711         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_chars_in_buffer"))
1712                 return 0;
1713
1714         if (info->params.mode == MGSL_MODE_HDLC)
1715                 rc = info->tx_active ? info->max_frame_size : 0;
1716         else
1717                 rc = info->tx_count;
1718
1719         if (debug_level >= DEBUG_LEVEL_INFO)
1720                 printk("%s(%d):mgslpc_chars_in_buffer(%s)=%d\n",
1721                          __FILE__,__LINE__, info->device_name, rc);
1722
1723         return rc;
1724 }
1725
1726 /* Discard all data in the send buffer
1727  */
1728 static void mgslpc_flush_buffer(struct tty_struct *tty)
1729 {
1730         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1731         unsigned long flags;
1732
1733         if (debug_level >= DEBUG_LEVEL_INFO)
1734                 printk("%s(%d):mgslpc_flush_buffer(%s) entry\n",
1735                          __FILE__,__LINE__, info->device_name );
1736
1737         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_buffer"))
1738                 return;
1739
1740         spin_lock_irqsave(&info->lock,flags);
1741         info->tx_count = info->tx_put = info->tx_get = 0;
1742         del_timer(&info->tx_timer);
1743         spin_unlock_irqrestore(&info->lock,flags);
1744
1745         wake_up_interruptible(&tty->write_wait);
1746         tty_wakeup(tty);
1747 }
1748
1749 /* Send a high-priority XON/XOFF character
1750  */
1751 static void mgslpc_send_xchar(struct tty_struct *tty, char ch)
1752 {
1753         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1754         unsigned long flags;
1755
1756         if (debug_level >= DEBUG_LEVEL_INFO)
1757                 printk("%s(%d):mgslpc_send_xchar(%s,%d)\n",
1758                          __FILE__,__LINE__, info->device_name, ch );
1759
1760         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_send_xchar"))
1761                 return;
1762
1763         info->x_char = ch;
1764         if (ch) {
1765                 spin_lock_irqsave(&info->lock,flags);
1766                 if (!info->tx_enabled)
1767                         tx_start(info);
1768                 spin_unlock_irqrestore(&info->lock,flags);
1769         }
1770 }
1771
1772 /* Signal remote device to throttle send data (our receive data)
1773  */
1774 static void mgslpc_throttle(struct tty_struct * tty)
1775 {
1776         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1777         unsigned long flags;
1778
1779         if (debug_level >= DEBUG_LEVEL_INFO)
1780                 printk("%s(%d):mgslpc_throttle(%s) entry\n",
1781                          __FILE__,__LINE__, info->device_name );
1782
1783         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_throttle"))
1784                 return;
1785
1786         if (I_IXOFF(tty))
1787                 mgslpc_send_xchar(tty, STOP_CHAR(tty));
1788
1789         if (tty->termios->c_cflag & CRTSCTS) {
1790                 spin_lock_irqsave(&info->lock,flags);
1791                 info->serial_signals &= ~SerialSignal_RTS;
1792                 set_signals(info);
1793                 spin_unlock_irqrestore(&info->lock,flags);
1794         }
1795 }
1796
1797 /* Signal remote device to stop throttling send data (our receive data)
1798  */
1799 static void mgslpc_unthrottle(struct tty_struct * tty)
1800 {
1801         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1802         unsigned long flags;
1803
1804         if (debug_level >= DEBUG_LEVEL_INFO)
1805                 printk("%s(%d):mgslpc_unthrottle(%s) entry\n",
1806                          __FILE__,__LINE__, info->device_name );
1807
1808         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_unthrottle"))
1809                 return;
1810
1811         if (I_IXOFF(tty)) {
1812                 if (info->x_char)
1813                         info->x_char = 0;
1814                 else
1815                         mgslpc_send_xchar(tty, START_CHAR(tty));
1816         }
1817
1818         if (tty->termios->c_cflag & CRTSCTS) {
1819                 spin_lock_irqsave(&info->lock,flags);
1820                 info->serial_signals |= SerialSignal_RTS;
1821                 set_signals(info);
1822                 spin_unlock_irqrestore(&info->lock,flags);
1823         }
1824 }
1825
1826 /* get the current serial statistics
1827  */
1828 static int get_stats(MGSLPC_INFO * info, struct mgsl_icount __user *user_icount)
1829 {
1830         int err;
1831         if (debug_level >= DEBUG_LEVEL_INFO)
1832                 printk("get_params(%s)\n", info->device_name);
1833         if (!user_icount) {
1834                 memset(&info->icount, 0, sizeof(info->icount));
1835         } else {
1836                 COPY_TO_USER(err, user_icount, &info->icount, sizeof(struct mgsl_icount));
1837                 if (err)
1838                         return -EFAULT;
1839         }
1840         return 0;
1841 }
1842
1843 /* get the current serial parameters
1844  */
1845 static int get_params(MGSLPC_INFO * info, MGSL_PARAMS __user *user_params)
1846 {
1847         int err;
1848         if (debug_level >= DEBUG_LEVEL_INFO)
1849                 printk("get_params(%s)\n", info->device_name);
1850         COPY_TO_USER(err,user_params, &info->params, sizeof(MGSL_PARAMS));
1851         if (err)
1852                 return -EFAULT;
1853         return 0;
1854 }
1855
1856 /* set the serial parameters
1857  *
1858  * Arguments:
1859  *
1860  *      info            pointer to device instance data
1861  *      new_params      user buffer containing new serial params
1862  *
1863  * Returns:     0 if success, otherwise error code
1864  */
1865 static int set_params(MGSLPC_INFO * info, MGSL_PARAMS __user *new_params)
1866 {
1867         unsigned long flags;
1868         MGSL_PARAMS tmp_params;
1869         int err;
1870
1871         if (debug_level >= DEBUG_LEVEL_INFO)
1872                 printk("%s(%d):set_params %s\n", __FILE__,__LINE__,
1873                         info->device_name );
1874         COPY_FROM_USER(err,&tmp_params, new_params, sizeof(MGSL_PARAMS));
1875         if (err) {
1876                 if ( debug_level >= DEBUG_LEVEL_INFO )
1877                         printk( "%s(%d):set_params(%s) user buffer copy failed\n",
1878                                 __FILE__,__LINE__,info->device_name);
1879                 return -EFAULT;
1880         }
1881
1882         spin_lock_irqsave(&info->lock,flags);
1883         memcpy(&info->params,&tmp_params,sizeof(MGSL_PARAMS));
1884         spin_unlock_irqrestore(&info->lock,flags);
1885
1886         mgslpc_change_params(info);
1887
1888         return 0;
1889 }
1890
1891 static int get_txidle(MGSLPC_INFO * info, int __user *idle_mode)
1892 {
1893         int err;
1894         if (debug_level >= DEBUG_LEVEL_INFO)
1895                 printk("get_txidle(%s)=%d\n", info->device_name, info->idle_mode);
1896         COPY_TO_USER(err,idle_mode, &info->idle_mode, sizeof(int));
1897         if (err)
1898                 return -EFAULT;
1899         return 0;
1900 }
1901
1902 static int set_txidle(MGSLPC_INFO * info, int idle_mode)
1903 {
1904         unsigned long flags;
1905         if (debug_level >= DEBUG_LEVEL_INFO)
1906                 printk("set_txidle(%s,%d)\n", info->device_name, idle_mode);
1907         spin_lock_irqsave(&info->lock,flags);
1908         info->idle_mode = idle_mode;
1909         tx_set_idle(info);
1910         spin_unlock_irqrestore(&info->lock,flags);
1911         return 0;
1912 }
1913
1914 static int get_interface(MGSLPC_INFO * info, int __user *if_mode)
1915 {
1916         int err;
1917         if (debug_level >= DEBUG_LEVEL_INFO)
1918                 printk("get_interface(%s)=%d\n", info->device_name, info->if_mode);
1919         COPY_TO_USER(err,if_mode, &info->if_mode, sizeof(int));
1920         if (err)
1921                 return -EFAULT;
1922         return 0;
1923 }
1924
1925 static int set_interface(MGSLPC_INFO * info, int if_mode)
1926 {
1927         unsigned long flags;
1928         unsigned char val;
1929         if (debug_level >= DEBUG_LEVEL_INFO)
1930                 printk("set_interface(%s,%d)\n", info->device_name, if_mode);
1931         spin_lock_irqsave(&info->lock,flags);
1932         info->if_mode = if_mode;
1933
1934         val = read_reg(info, PVR) & 0x0f;
1935         switch (info->if_mode)
1936         {
1937         case MGSL_INTERFACE_RS232: val |= PVR_RS232; break;
1938         case MGSL_INTERFACE_V35:   val |= PVR_V35;   break;
1939         case MGSL_INTERFACE_RS422: val |= PVR_RS422; break;
1940         }
1941         write_reg(info, PVR, val);
1942
1943         spin_unlock_irqrestore(&info->lock,flags);
1944         return 0;
1945 }
1946
1947 static int set_txenable(MGSLPC_INFO * info, int enable)
1948 {
1949         unsigned long flags;
1950
1951         if (debug_level >= DEBUG_LEVEL_INFO)
1952                 printk("set_txenable(%s,%d)\n", info->device_name, enable);
1953
1954         spin_lock_irqsave(&info->lock,flags);
1955         if (enable) {
1956                 if (!info->tx_enabled)
1957                         tx_start(info);
1958         } else {
1959                 if (info->tx_enabled)
1960                         tx_stop(info);
1961         }
1962         spin_unlock_irqrestore(&info->lock,flags);
1963         return 0;
1964 }
1965
1966 static int tx_abort(MGSLPC_INFO * info)
1967 {
1968         unsigned long flags;
1969
1970         if (debug_level >= DEBUG_LEVEL_INFO)
1971                 printk("tx_abort(%s)\n", info->device_name);
1972
1973         spin_lock_irqsave(&info->lock,flags);
1974         if (info->tx_active && info->tx_count &&
1975             info->params.mode == MGSL_MODE_HDLC) {
1976                 /* clear data count so FIFO is not filled on next IRQ.
1977                  * This results in underrun and abort transmission.
1978                  */
1979                 info->tx_count = info->tx_put = info->tx_get = 0;
1980                 info->tx_aborting = true;
1981         }
1982         spin_unlock_irqrestore(&info->lock,flags);
1983         return 0;
1984 }
1985
1986 static int set_rxenable(MGSLPC_INFO * info, int enable)
1987 {
1988         unsigned long flags;
1989
1990         if (debug_level >= DEBUG_LEVEL_INFO)
1991                 printk("set_rxenable(%s,%d)\n", info->device_name, enable);
1992
1993         spin_lock_irqsave(&info->lock,flags);
1994         if (enable) {
1995                 if (!info->rx_enabled)
1996                         rx_start(info);
1997         } else {
1998                 if (info->rx_enabled)
1999                         rx_stop(info);
2000         }
2001         spin_unlock_irqrestore(&info->lock,flags);
2002         return 0;
2003 }
2004
2005 /* wait for specified event to occur
2006  *
2007  * Arguments:           info    pointer to device instance data
2008  *                      mask    pointer to bitmask of events to wait for
2009  * Return Value:        0       if successful and bit mask updated with
2010  *                              of events triggerred,
2011  *                      otherwise error code
2012  */
2013 static int wait_events(MGSLPC_INFO * info, int __user *mask_ptr)
2014 {
2015         unsigned long flags;
2016         int s;
2017         int rc=0;
2018         struct mgsl_icount cprev, cnow;
2019         int events;
2020         int mask;
2021         struct  _input_signal_events oldsigs, newsigs;
2022         DECLARE_WAITQUEUE(wait, current);
2023
2024         COPY_FROM_USER(rc,&mask, mask_ptr, sizeof(int));
2025         if (rc)
2026                 return  -EFAULT;
2027
2028         if (debug_level >= DEBUG_LEVEL_INFO)
2029                 printk("wait_events(%s,%d)\n", info->device_name, mask);
2030
2031         spin_lock_irqsave(&info->lock,flags);
2032
2033         /* return immediately if state matches requested events */
2034         get_signals(info);
2035         s = info->serial_signals;
2036         events = mask &
2037                 ( ((s & SerialSignal_DSR) ? MgslEvent_DsrActive:MgslEvent_DsrInactive) +
2038                   ((s & SerialSignal_DCD) ? MgslEvent_DcdActive:MgslEvent_DcdInactive) +
2039                   ((s & SerialSignal_CTS) ? MgslEvent_CtsActive:MgslEvent_CtsInactive) +
2040                   ((s & SerialSignal_RI)  ? MgslEvent_RiActive :MgslEvent_RiInactive) );
2041         if (events) {
2042                 spin_unlock_irqrestore(&info->lock,flags);
2043                 goto exit;
2044         }
2045
2046         /* save current irq counts */
2047         cprev = info->icount;
2048         oldsigs = info->input_signal_events;
2049
2050         if ((info->params.mode == MGSL_MODE_HDLC) &&
2051             (mask & MgslEvent_ExitHuntMode))
2052                 irq_enable(info, CHA, IRQ_EXITHUNT);
2053
2054         set_current_state(TASK_INTERRUPTIBLE);
2055         add_wait_queue(&info->event_wait_q, &wait);
2056
2057         spin_unlock_irqrestore(&info->lock,flags);
2058
2059
2060         for(;;) {
2061                 schedule();
2062                 if (signal_pending(current)) {
2063                         rc = -ERESTARTSYS;
2064                         break;
2065                 }
2066
2067                 /* get current irq counts */
2068                 spin_lock_irqsave(&info->lock,flags);
2069                 cnow = info->icount;
2070                 newsigs = info->input_signal_events;
2071                 set_current_state(TASK_INTERRUPTIBLE);
2072                 spin_unlock_irqrestore(&info->lock,flags);
2073
2074                 /* if no change, wait aborted for some reason */
2075                 if (newsigs.dsr_up   == oldsigs.dsr_up   &&
2076                     newsigs.dsr_down == oldsigs.dsr_down &&
2077                     newsigs.dcd_up   == oldsigs.dcd_up   &&
2078                     newsigs.dcd_down == oldsigs.dcd_down &&
2079                     newsigs.cts_up   == oldsigs.cts_up   &&
2080                     newsigs.cts_down == oldsigs.cts_down &&
2081                     newsigs.ri_up    == oldsigs.ri_up    &&
2082                     newsigs.ri_down  == oldsigs.ri_down  &&
2083                     cnow.exithunt    == cprev.exithunt   &&
2084                     cnow.rxidle      == cprev.rxidle) {
2085                         rc = -EIO;
2086                         break;
2087                 }
2088
2089                 events = mask &
2090                         ( (newsigs.dsr_up   != oldsigs.dsr_up   ? MgslEvent_DsrActive:0)   +
2091                           (newsigs.dsr_down != oldsigs.dsr_down ? MgslEvent_DsrInactive:0) +
2092                           (newsigs.dcd_up   != oldsigs.dcd_up   ? MgslEvent_DcdActive:0)   +
2093                           (newsigs.dcd_down != oldsigs.dcd_down ? MgslEvent_DcdInactive:0) +
2094                           (newsigs.cts_up   != oldsigs.cts_up   ? MgslEvent_CtsActive:0)   +
2095                           (newsigs.cts_down != oldsigs.cts_down ? MgslEvent_CtsInactive:0) +
2096                           (newsigs.ri_up    != oldsigs.ri_up    ? MgslEvent_RiActive:0)    +
2097                           (newsigs.ri_down  != oldsigs.ri_down  ? MgslEvent_RiInactive:0)  +
2098                           (cnow.exithunt    != cprev.exithunt   ? MgslEvent_ExitHuntMode:0) +
2099                           (cnow.rxidle      != cprev.rxidle     ? MgslEvent_IdleReceived:0) );
2100                 if (events)
2101                         break;
2102
2103                 cprev = cnow;
2104                 oldsigs = newsigs;
2105         }
2106
2107         remove_wait_queue(&info->event_wait_q, &wait);
2108         set_current_state(TASK_RUNNING);
2109
2110         if (mask & MgslEvent_ExitHuntMode) {
2111                 spin_lock_irqsave(&info->lock,flags);
2112                 if (!waitqueue_active(&info->event_wait_q))
2113                         irq_disable(info, CHA, IRQ_EXITHUNT);
2114                 spin_unlock_irqrestore(&info->lock,flags);
2115         }
2116 exit:
2117         if (rc == 0)
2118                 PUT_USER(rc, events, mask_ptr);
2119         return rc;
2120 }
2121
2122 static int modem_input_wait(MGSLPC_INFO *info,int arg)
2123 {
2124         unsigned long flags;
2125         int rc;
2126         struct mgsl_icount cprev, cnow;
2127         DECLARE_WAITQUEUE(wait, current);
2128
2129         /* save current irq counts */
2130         spin_lock_irqsave(&info->lock,flags);
2131         cprev = info->icount;
2132         add_wait_queue(&info->status_event_wait_q, &wait);
2133         set_current_state(TASK_INTERRUPTIBLE);
2134         spin_unlock_irqrestore(&info->lock,flags);
2135
2136         for(;;) {
2137                 schedule();
2138                 if (signal_pending(current)) {
2139                         rc = -ERESTARTSYS;
2140                         break;
2141                 }
2142
2143                 /* get new irq counts */
2144                 spin_lock_irqsave(&info->lock,flags);
2145                 cnow = info->icount;
2146                 set_current_state(TASK_INTERRUPTIBLE);
2147                 spin_unlock_irqrestore(&info->lock,flags);
2148
2149                 /* if no change, wait aborted for some reason */
2150                 if (cnow.rng == cprev.rng && cnow.dsr == cprev.dsr &&
2151                     cnow.dcd == cprev.dcd && cnow.cts == cprev.cts) {
2152                         rc = -EIO;
2153                         break;
2154                 }
2155
2156                 /* check for change in caller specified modem input */
2157                 if ((arg & TIOCM_RNG && cnow.rng != cprev.rng) ||
2158                     (arg & TIOCM_DSR && cnow.dsr != cprev.dsr) ||
2159                     (arg & TIOCM_CD  && cnow.dcd != cprev.dcd) ||
2160                     (arg & TIOCM_CTS && cnow.cts != cprev.cts)) {
2161                         rc = 0;
2162                         break;
2163                 }
2164
2165                 cprev = cnow;
2166         }
2167         remove_wait_queue(&info->status_event_wait_q, &wait);
2168         set_current_state(TASK_RUNNING);
2169         return rc;
2170 }
2171
2172 /* return the state of the serial control and status signals
2173  */
2174 static int tiocmget(struct tty_struct *tty, struct file *file)
2175 {
2176         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
2177         unsigned int result;
2178         unsigned long flags;
2179
2180         spin_lock_irqsave(&info->lock,flags);
2181         get_signals(info);
2182         spin_unlock_irqrestore(&info->lock,flags);
2183
2184         result = ((info->serial_signals & SerialSignal_RTS) ? TIOCM_RTS:0) +
2185                 ((info->serial_signals & SerialSignal_DTR) ? TIOCM_DTR:0) +
2186                 ((info->serial_signals & SerialSignal_DCD) ? TIOCM_CAR:0) +
2187                 ((info->serial_signals & SerialSignal_RI)  ? TIOCM_RNG:0) +
2188                 ((info->serial_signals & SerialSignal_DSR) ? TIOCM_DSR:0) +
2189                 ((info->serial_signals & SerialSignal_CTS) ? TIOCM_CTS:0);
2190
2191         if (debug_level >= DEBUG_LEVEL_INFO)
2192                 printk("%s(%d):%s tiocmget() value=%08X\n",
2193                          __FILE__,__LINE__, info->device_name, result );
2194         return result;
2195 }
2196
2197 /* set modem control signals (DTR/RTS)
2198  */
2199 static int tiocmset(struct tty_struct *tty, struct file *file,
2200                     unsigned int set, unsigned int clear)
2201 {
2202         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
2203         unsigned long flags;
2204
2205         if (debug_level >= DEBUG_LEVEL_INFO)
2206                 printk("%s(%d):%s tiocmset(%x,%x)\n",
2207                         __FILE__,__LINE__,info->device_name, set, clear);
2208
2209         if (set & TIOCM_RTS)
2210                 info->serial_signals |= SerialSignal_RTS;
2211         if (set & TIOCM_DTR)
2212                 info->serial_signals |= SerialSignal_DTR;
2213         if (clear & TIOCM_RTS)
2214                 info->serial_signals &= ~SerialSignal_RTS;
2215         if (clear & TIOCM_DTR)
2216                 info->serial_signals &= ~SerialSignal_DTR;
2217
2218         spin_lock_irqsave(&info->lock,flags);
2219         set_signals(info);
2220         spin_unlock_irqrestore(&info->lock,flags);
2221
2222         return 0;
2223 }
2224
2225 /* Set or clear transmit break condition
2226  *
2227  * Arguments:           tty             pointer to tty instance data
2228  *                      break_state     -1=set break condition, 0=clear
2229  */
2230 static void mgslpc_break(struct tty_struct *tty, int break_state)
2231 {
2232         MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2233         unsigned long flags;
2234
2235         if (debug_level >= DEBUG_LEVEL_INFO)
2236                 printk("%s(%d):mgslpc_break(%s,%d)\n",
2237                          __FILE__,__LINE__, info->device_name, break_state);
2238
2239         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_break"))
2240                 return;
2241
2242         spin_lock_irqsave(&info->lock,flags);
2243         if (break_state == -1)
2244                 set_reg_bits(info, CHA+DAFO, BIT6);
2245         else
2246                 clear_reg_bits(info, CHA+DAFO, BIT6);
2247         spin_unlock_irqrestore(&info->lock,flags);
2248 }
2249
2250 /* Service an IOCTL request
2251  *
2252  * Arguments:
2253  *
2254  *      tty     pointer to tty instance data
2255  *      file    pointer to associated file object for device
2256  *      cmd     IOCTL command code
2257  *      arg     command argument/context
2258  *
2259  * Return Value:        0 if success, otherwise error code
2260  */
2261 static int mgslpc_ioctl(struct tty_struct *tty, struct file * file,
2262                         unsigned int cmd, unsigned long arg)
2263 {
2264         MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2265
2266         if (debug_level >= DEBUG_LEVEL_INFO)
2267                 printk("%s(%d):mgslpc_ioctl %s cmd=%08X\n", __FILE__,__LINE__,
2268                         info->device_name, cmd );
2269
2270         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_ioctl"))
2271                 return -ENODEV;
2272
2273         if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) &&
2274             (cmd != TIOCMIWAIT) && (cmd != TIOCGICOUNT)) {
2275                 if (tty->flags & (1 << TTY_IO_ERROR))
2276                     return -EIO;
2277         }
2278
2279         return ioctl_common(info, cmd, arg);
2280 }
2281
2282 static int ioctl_common(MGSLPC_INFO *info, unsigned int cmd, unsigned long arg)
2283 {
2284         int error;
2285         struct mgsl_icount cnow;        /* kernel counter temps */
2286         struct serial_icounter_struct __user *p_cuser;  /* user space */
2287         void __user *argp = (void __user *)arg;
2288         unsigned long flags;
2289
2290         switch (cmd) {
2291         case MGSL_IOCGPARAMS:
2292                 return get_params(info, argp);
2293         case MGSL_IOCSPARAMS:
2294                 return set_params(info, argp);
2295         case MGSL_IOCGTXIDLE:
2296                 return get_txidle(info, argp);
2297         case MGSL_IOCSTXIDLE:
2298                 return set_txidle(info, (int)arg);
2299         case MGSL_IOCGIF:
2300                 return get_interface(info, argp);
2301         case MGSL_IOCSIF:
2302                 return set_interface(info,(int)arg);
2303         case MGSL_IOCTXENABLE:
2304                 return set_txenable(info,(int)arg);
2305         case MGSL_IOCRXENABLE:
2306                 return set_rxenable(info,(int)arg);
2307         case MGSL_IOCTXABORT:
2308                 return tx_abort(info);
2309         case MGSL_IOCGSTATS:
2310                 return get_stats(info, argp);
2311         case MGSL_IOCWAITEVENT:
2312                 return wait_events(info, argp);
2313         case TIOCMIWAIT:
2314                 return modem_input_wait(info,(int)arg);
2315         case TIOCGICOUNT:
2316                 spin_lock_irqsave(&info->lock,flags);
2317                 cnow = info->icount;
2318                 spin_unlock_irqrestore(&info->lock,flags);
2319                 p_cuser = argp;
2320                 PUT_USER(error,cnow.cts, &p_cuser->cts);
2321                 if (error) return error;
2322                 PUT_USER(error,cnow.dsr, &p_cuser->dsr);
2323                 if (error) return error;
2324                 PUT_USER(error,cnow.rng, &p_cuser->rng);
2325                 if (error) return error;
2326                 PUT_USER(error,cnow.dcd, &p_cuser->dcd);
2327                 if (error) return error;
2328                 PUT_USER(error,cnow.rx, &p_cuser->rx);
2329                 if (error) return error;
2330                 PUT_USER(error,cnow.tx, &p_cuser->tx);
2331                 if (error) return error;
2332                 PUT_USER(error,cnow.frame, &p_cuser->frame);
2333                 if (error) return error;
2334                 PUT_USER(error,cnow.overrun, &p_cuser->overrun);
2335                 if (error) return error;
2336                 PUT_USER(error,cnow.parity, &p_cuser->parity);
2337                 if (error) return error;
2338                 PUT_USER(error,cnow.brk, &p_cuser->brk);
2339                 if (error) return error;
2340                 PUT_USER(error,cnow.buf_overrun, &p_cuser->buf_overrun);
2341                 if (error) return error;
2342                 return 0;
2343         default:
2344                 return -ENOIOCTLCMD;
2345         }
2346         return 0;
2347 }
2348
2349 /* Set new termios settings
2350  *
2351  * Arguments:
2352  *
2353  *      tty             pointer to tty structure
2354  *      termios         pointer to buffer to hold returned old termios
2355  */
2356 static void mgslpc_set_termios(struct tty_struct *tty, struct ktermios *old_termios)
2357 {
2358         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
2359         unsigned long flags;
2360
2361         if (debug_level >= DEBUG_LEVEL_INFO)
2362                 printk("%s(%d):mgslpc_set_termios %s\n", __FILE__,__LINE__,
2363                         tty->driver->name );
2364
2365         /* just return if nothing has changed */
2366         if ((tty->termios->c_cflag == old_termios->c_cflag)
2367             && (RELEVANT_IFLAG(tty->termios->c_iflag)
2368                 == RELEVANT_IFLAG(old_termios->c_iflag)))
2369           return;
2370
2371         mgslpc_change_params(info);
2372
2373         /* Handle transition to B0 status */
2374         if (old_termios->c_cflag & CBAUD &&
2375             !(tty->termios->c_cflag & CBAUD)) {
2376                 info->serial_signals &= ~(SerialSignal_RTS + SerialSignal_DTR);
2377                 spin_lock_irqsave(&info->lock,flags);
2378                 set_signals(info);
2379                 spin_unlock_irqrestore(&info->lock,flags);
2380         }
2381
2382         /* Handle transition away from B0 status */
2383         if (!(old_termios->c_cflag & CBAUD) &&
2384             tty->termios->c_cflag & CBAUD) {
2385                 info->serial_signals |= SerialSignal_DTR;
2386                 if (!(tty->termios->c_cflag & CRTSCTS) ||
2387                     !test_bit(TTY_THROTTLED, &tty->flags)) {
2388                         info->serial_signals |= SerialSignal_RTS;
2389                 }
2390                 spin_lock_irqsave(&info->lock,flags);
2391                 set_signals(info);
2392                 spin_unlock_irqrestore(&info->lock,flags);
2393         }
2394
2395         /* Handle turning off CRTSCTS */
2396         if (old_termios->c_cflag & CRTSCTS &&
2397             !(tty->termios->c_cflag & CRTSCTS)) {
2398                 tty->hw_stopped = 0;
2399                 tx_release(tty);
2400         }
2401 }
2402
2403 static void mgslpc_close(struct tty_struct *tty, struct file * filp)
2404 {
2405         MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2406
2407         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_close"))
2408                 return;
2409
2410         if (debug_level >= DEBUG_LEVEL_INFO)
2411                 printk("%s(%d):mgslpc_close(%s) entry, count=%d\n",
2412                          __FILE__,__LINE__, info->device_name, info->count);
2413
2414         if (!info->count)
2415                 return;
2416
2417         if (tty_hung_up_p(filp))
2418                 goto cleanup;
2419
2420         if ((tty->count == 1) && (info->count != 1)) {
2421                 /*
2422                  * tty->count is 1 and the tty structure will be freed.
2423                  * info->count should be one in this case.
2424                  * if it's not, correct it so that the port is shutdown.
2425                  */
2426                 printk("mgslpc_close: bad refcount; tty->count is 1, "
2427                        "info->count is %d\n", info->count);
2428                 info->count = 1;
2429         }
2430
2431         info->count--;
2432
2433         /* if at least one open remaining, leave hardware active */
2434         if (info->count)
2435                 goto cleanup;
2436
2437         info->flags |= ASYNC_CLOSING;
2438
2439         /* set tty->closing to notify line discipline to
2440          * only process XON/XOFF characters. Only the N_TTY
2441          * discipline appears to use this (ppp does not).
2442          */
2443         tty->closing = 1;
2444
2445         /* wait for transmit data to clear all layers */
2446
2447         if (info->closing_wait != ASYNC_CLOSING_WAIT_NONE) {
2448                 if (debug_level >= DEBUG_LEVEL_INFO)
2449                         printk("%s(%d):mgslpc_close(%s) calling tty_wait_until_sent\n",
2450                                  __FILE__,__LINE__, info->device_name );
2451                 tty_wait_until_sent(tty, info->closing_wait);
2452         }
2453
2454         if (info->flags & ASYNC_INITIALIZED)
2455                 mgslpc_wait_until_sent(tty, info->timeout);
2456
2457         mgslpc_flush_buffer(tty);
2458
2459         tty_ldisc_flush(tty);
2460
2461         shutdown(info);
2462
2463         tty->closing = 0;
2464         info->tty = NULL;
2465
2466         if (info->blocked_open) {
2467                 if (info->close_delay) {
2468                         msleep_interruptible(jiffies_to_msecs(info->close_delay));
2469                 }
2470                 wake_up_interruptible(&info->open_wait);
2471         }
2472
2473         info->flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CLOSING);
2474
2475         wake_up_interruptible(&info->close_wait);
2476
2477 cleanup:
2478         if (debug_level >= DEBUG_LEVEL_INFO)
2479                 printk("%s(%d):mgslpc_close(%s) exit, count=%d\n", __FILE__,__LINE__,
2480                         tty->driver->name, info->count);
2481 }
2482
2483 /* Wait until the transmitter is empty.
2484  */
2485 static void mgslpc_wait_until_sent(struct tty_struct *tty, int timeout)
2486 {
2487         MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2488         unsigned long orig_jiffies, char_time;
2489
2490         if (!info )
2491                 return;
2492
2493         if (debug_level >= DEBUG_LEVEL_INFO)
2494                 printk("%s(%d):mgslpc_wait_until_sent(%s) entry\n",
2495                          __FILE__,__LINE__, info->device_name );
2496
2497         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_wait_until_sent"))
2498                 return;
2499
2500         if (!(info->flags & ASYNC_INITIALIZED))
2501                 goto exit;
2502
2503         orig_jiffies = jiffies;
2504
2505         /* Set check interval to 1/5 of estimated time to
2506          * send a character, and make it at least 1. The check
2507          * interval should also be less than the timeout.
2508          * Note: use tight timings here to satisfy the NIST-PCTS.
2509          */
2510
2511         if ( info->params.data_rate ) {
2512                 char_time = info->timeout/(32 * 5);
2513                 if (!char_time)
2514                         char_time++;
2515         } else
2516                 char_time = 1;
2517
2518         if (timeout)
2519                 char_time = min_t(unsigned long, char_time, timeout);
2520
2521         if (info->params.mode == MGSL_MODE_HDLC) {
2522                 while (info->tx_active) {
2523                         msleep_interruptible(jiffies_to_msecs(char_time));
2524                         if (signal_pending(current))
2525                                 break;
2526                         if (timeout && time_after(jiffies, orig_jiffies + timeout))
2527                                 break;
2528                 }
2529         } else {
2530                 while ((info->tx_count || info->tx_active) &&
2531                         info->tx_enabled) {
2532                         msleep_interruptible(jiffies_to_msecs(char_time));
2533                         if (signal_pending(current))
2534                                 break;
2535                         if (timeout && time_after(jiffies, orig_jiffies + timeout))
2536                                 break;
2537                 }
2538         }
2539
2540 exit:
2541         if (debug_level >= DEBUG_LEVEL_INFO)
2542                 printk("%s(%d):mgslpc_wait_until_sent(%s) exit\n",
2543                          __FILE__,__LINE__, info->device_name );
2544 }
2545
2546 /* Called by tty_hangup() when a hangup is signaled.
2547  * This is the same as closing all open files for the port.
2548  */
2549 static void mgslpc_hangup(struct tty_struct *tty)
2550 {
2551         MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2552
2553         if (debug_level >= DEBUG_LEVEL_INFO)
2554                 printk("%s(%d):mgslpc_hangup(%s)\n",
2555                          __FILE__,__LINE__, info->device_name );
2556
2557         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_hangup"))
2558                 return;
2559
2560         mgslpc_flush_buffer(tty);
2561         shutdown(info);
2562
2563         info->count = 0;
2564         info->flags &= ~ASYNC_NORMAL_ACTIVE;
2565         info->tty = NULL;
2566
2567         wake_up_interruptible(&info->open_wait);
2568 }
2569
2570 /* Block the current process until the specified port
2571  * is ready to be opened.
2572  */
2573 static int block_til_ready(struct tty_struct *tty, struct file *filp,
2574                            MGSLPC_INFO *info)
2575 {
2576         DECLARE_WAITQUEUE(wait, current);
2577         int             retval;
2578         bool            do_clocal = false;
2579         bool            extra_count = false;
2580         unsigned long   flags;
2581
2582         if (debug_level >= DEBUG_LEVEL_INFO)
2583                 printk("%s(%d):block_til_ready on %s\n",
2584                          __FILE__,__LINE__, tty->driver->name );
2585
2586         if (filp->f_flags & O_NONBLOCK || tty->flags & (1 << TTY_IO_ERROR)){
2587                 /* nonblock mode is set or port is not enabled */
2588                 /* just verify that callout device is not active */
2589                 info->flags |= ASYNC_NORMAL_ACTIVE;
2590                 return 0;
2591         }
2592
2593         if (tty->termios->c_cflag & CLOCAL)
2594                 do_clocal = true;
2595
2596         /* Wait for carrier detect and the line to become
2597          * free (i.e., not in use by the callout).  While we are in
2598          * this loop, info->count is dropped by one, so that
2599          * mgslpc_close() knows when to free things.  We restore it upon
2600          * exit, either normal or abnormal.
2601          */
2602
2603         retval = 0;
2604         add_wait_queue(&info->open_wait, &wait);
2605
2606         if (debug_level >= DEBUG_LEVEL_INFO)
2607                 printk("%s(%d):block_til_ready before block on %s count=%d\n",
2608                          __FILE__,__LINE__, tty->driver->name, info->count );
2609
2610         spin_lock_irqsave(&info->lock, flags);
2611         if (!tty_hung_up_p(filp)) {
2612                 extra_count = true;
2613                 info->count--;
2614         }
2615         spin_unlock_irqrestore(&info->lock, flags);
2616         info->blocked_open++;
2617
2618         while (1) {
2619                 if ((tty->termios->c_cflag & CBAUD)) {
2620                         spin_lock_irqsave(&info->lock,flags);
2621                         info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
2622                         set_signals(info);
2623                         spin_unlock_irqrestore(&info->lock,flags);
2624                 }
2625
2626                 set_current_state(TASK_INTERRUPTIBLE);
2627
2628                 if (tty_hung_up_p(filp) || !(info->flags & ASYNC_INITIALIZED)){
2629                         retval = (info->flags & ASYNC_HUP_NOTIFY) ?
2630                                         -EAGAIN : -ERESTARTSYS;
2631                         break;
2632                 }
2633
2634                 spin_lock_irqsave(&info->lock,flags);
2635                 get_signals(info);
2636                 spin_unlock_irqrestore(&info->lock,flags);
2637
2638                 if (!(info->flags & ASYNC_CLOSING) &&
2639                     (do_clocal || (info->serial_signals & SerialSignal_DCD)) ) {
2640                         break;
2641                 }
2642
2643                 if (signal_pending(current)) {
2644                         retval = -ERESTARTSYS;
2645                         break;
2646                 }
2647
2648                 if (debug_level >= DEBUG_LEVEL_INFO)
2649                         printk("%s(%d):block_til_ready blocking on %s count=%d\n",
2650                                  __FILE__,__LINE__, tty->driver->name, info->count );
2651
2652                 schedule();
2653         }
2654
2655         set_current_state(TASK_RUNNING);
2656         remove_wait_queue(&info->open_wait, &wait);
2657
2658         if (extra_count)
2659                 info->count++;
2660         info->blocked_open--;
2661
2662         if (debug_level >= DEBUG_LEVEL_INFO)
2663                 printk("%s(%d):block_til_ready after blocking on %s count=%d\n",
2664                          __FILE__,__LINE__, tty->driver->name, info->count );
2665
2666         if (!retval)
2667                 info->flags |= ASYNC_NORMAL_ACTIVE;
2668
2669         return retval;
2670 }
2671
2672 static int mgslpc_open(struct tty_struct *tty, struct file * filp)
2673 {
2674         MGSLPC_INFO     *info;
2675         int                     retval, line;
2676         unsigned long flags;
2677
2678         /* verify range of specified line number */
2679         line = tty->index;
2680         if ((line < 0) || (line >= mgslpc_device_count)) {
2681                 printk("%s(%d):mgslpc_open with invalid line #%d.\n",
2682                         __FILE__,__LINE__,line);
2683                 return -ENODEV;
2684         }
2685
2686         /* find the info structure for the specified line */
2687         info = mgslpc_device_list;
2688         while(info && info->line != line)
2689                 info = info->next_device;
2690         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_open"))
2691                 return -ENODEV;
2692
2693         tty->driver_data = info;
2694         info->tty = tty;
2695
2696         if (debug_level >= DEBUG_LEVEL_INFO)
2697                 printk("%s(%d):mgslpc_open(%s), old ref count = %d\n",
2698                          __FILE__,__LINE__,tty->driver->name, info->count);
2699
2700         /* If port is closing, signal caller to try again */
2701         if (tty_hung_up_p(filp) || info->flags & ASYNC_CLOSING){
2702                 if (info->flags & ASYNC_CLOSING)
2703                         interruptible_sleep_on(&info->close_wait);
2704                 retval = ((info->flags & ASYNC_HUP_NOTIFY) ?
2705                         -EAGAIN : -ERESTARTSYS);
2706                 goto cleanup;
2707         }
2708
2709         info->tty->low_latency = (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
2710
2711         spin_lock_irqsave(&info->netlock, flags);
2712         if (info->netcount) {
2713                 retval = -EBUSY;
2714                 spin_unlock_irqrestore(&info->netlock, flags);
2715                 goto cleanup;
2716         }
2717         info->count++;
2718         spin_unlock_irqrestore(&info->netlock, flags);
2719
2720         if (info->count == 1) {
2721                 /* 1st open on this device, init hardware */
2722                 retval = startup(info);
2723                 if (retval < 0)
2724                         goto cleanup;
2725         }
2726
2727         retval = block_til_ready(tty, filp, info);
2728         if (retval) {
2729                 if (debug_level >= DEBUG_LEVEL_INFO)
2730                         printk("%s(%d):block_til_ready(%s) returned %d\n",
2731                                  __FILE__,__LINE__, info->device_name, retval);
2732                 goto cleanup;
2733         }
2734
2735         if (debug_level >= DEBUG_LEVEL_INFO)
2736                 printk("%s(%d):mgslpc_open(%s) success\n",
2737                          __FILE__,__LINE__, info->device_name);
2738         retval = 0;
2739
2740 cleanup:
2741         if (retval) {
2742                 if (tty->count == 1)
2743                         info->tty = NULL; /* tty layer will release tty struct */
2744                 if(info->count)
2745                         info->count--;
2746         }
2747
2748         return retval;
2749 }
2750
2751 /*
2752  * /proc fs routines....
2753  */
2754
2755 static inline int line_info(char *buf, MGSLPC_INFO *info)
2756 {
2757         char    stat_buf[30];
2758         int     ret;
2759         unsigned long flags;
2760
2761         ret = sprintf(buf, "%s:io:%04X irq:%d",
2762                       info->device_name, info->io_base, info->irq_level);
2763
2764         /* output current serial signal states */
2765         spin_lock_irqsave(&info->lock,flags);
2766         get_signals(info);
2767         spin_unlock_irqrestore(&info->lock,flags);
2768
2769         stat_buf[0] = 0;
2770         stat_buf[1] = 0;
2771         if (info->serial_signals & SerialSignal_RTS)
2772                 strcat(stat_buf, "|RTS");
2773         if (info->serial_signals & SerialSignal_CTS)
2774                 strcat(stat_buf, "|CTS");
2775         if (info->serial_signals & SerialSignal_DTR)
2776                 strcat(stat_buf, "|DTR");
2777         if (info->serial_signals & SerialSignal_DSR)
2778                 strcat(stat_buf, "|DSR");
2779         if (info->serial_signals & SerialSignal_DCD)
2780                 strcat(stat_buf, "|CD");
2781         if (info->serial_signals & SerialSignal_RI)
2782                 strcat(stat_buf, "|RI");
2783
2784         if (info->params.mode == MGSL_MODE_HDLC) {
2785                 ret += sprintf(buf+ret, " HDLC txok:%d rxok:%d",
2786                               info->icount.txok, info->icount.rxok);
2787                 if (info->icount.txunder)
2788                         ret += sprintf(buf+ret, " txunder:%d", info->icount.txunder);
2789                 if (info->icount.txabort)
2790                         ret += sprintf(buf+ret, " txabort:%d", info->icount.txabort);
2791                 if (info->icount.rxshort)
2792                         ret += sprintf(buf+ret, " rxshort:%d", info->icount.rxshort);
2793                 if (info->icount.rxlong)
2794                         ret += sprintf(buf+ret, " rxlong:%d", info->icount.rxlong);
2795                 if (info->icount.rxover)
2796                         ret += sprintf(buf+ret, " rxover:%d", info->icount.rxover);
2797                 if (info->icount.rxcrc)
2798                         ret += sprintf(buf+ret, " rxcrc:%d", info->icount.rxcrc);
2799         } else {
2800                 ret += sprintf(buf+ret, " ASYNC tx:%d rx:%d",
2801                               info->icount.tx, info->icount.rx);
2802                 if (info->icount.frame)
2803                         ret += sprintf(buf+ret, " fe:%d", info->icount.frame);
2804                 if (info->icount.parity)
2805                         ret += sprintf(buf+ret, " pe:%d", info->icount.parity);
2806                 if (info->icount.brk)
2807                         ret += sprintf(buf+ret, " brk:%d", info->icount.brk);
2808                 if (info->icount.overrun)
2809                         ret += sprintf(buf+ret, " oe:%d", info->icount.overrun);
2810         }
2811
2812         /* Append serial signal status to end */
2813         ret += sprintf(buf+ret, " %s\n", stat_buf+1);
2814
2815         ret += sprintf(buf+ret, "txactive=%d bh_req=%d bh_run=%d pending_bh=%x\n",
2816                        info->tx_active,info->bh_requested,info->bh_running,
2817                        info->pending_bh);
2818
2819         return ret;
2820 }
2821
2822 /* Called to print information about devices
2823  */
2824 static int mgslpc_read_proc(char *page, char **start, off_t off, int count,
2825                  int *eof, void *data)
2826 {
2827         int len = 0, l;
2828         off_t   begin = 0;
2829         MGSLPC_INFO *info;
2830
2831         len += sprintf(page, "synclink driver:%s\n", driver_version);
2832
2833         info = mgslpc_device_list;
2834         while( info ) {
2835                 l = line_info(page + len, info);
2836                 len += l;
2837                 if (len+begin > off+count)
2838                         goto done;
2839                 if (len+begin < off) {
2840                         begin += len;
2841                         len = 0;
2842                 }
2843                 info = info->next_device;
2844         }
2845
2846         *eof = 1;
2847 done:
2848         if (off >= len+begin)
2849                 return 0;
2850         *start = page + (off-begin);
2851         return ((count < begin+len-off) ? count : begin+len-off);
2852 }
2853
2854 static int rx_alloc_buffers(MGSLPC_INFO *info)
2855 {
2856         /* each buffer has header and data */
2857         info->rx_buf_size = sizeof(RXBUF) + info->max_frame_size;
2858
2859         /* calculate total allocation size for 8 buffers */
2860         info->rx_buf_total_size = info->rx_buf_size * 8;
2861
2862         /* limit total allocated memory */
2863         if (info->rx_buf_total_size > 0x10000)
2864                 info->rx_buf_total_size = 0x10000;
2865
2866         /* calculate number of buffers */
2867         info->rx_buf_count = info->rx_buf_total_size / info->rx_buf_size;
2868
2869         info->rx_buf = kmalloc(info->rx_buf_total_size, GFP_KERNEL);
2870         if (info->rx_buf == NULL)
2871                 return -ENOMEM;
2872
2873         rx_reset_buffers(info);
2874         return 0;
2875 }
2876
2877 static void rx_free_buffers(MGSLPC_INFO *info)
2878 {
2879         kfree(info->rx_buf);
2880         info->rx_buf = NULL;
2881 }
2882
2883 static int claim_resources(MGSLPC_INFO *info)
2884 {
2885         if (rx_alloc_buffers(info) < 0 ) {
2886                 printk( "Cant allocate rx buffer %s\n", info->device_name);
2887                 release_resources(info);
2888                 return -ENODEV;
2889         }
2890         return 0;
2891 }
2892
2893 static void release_resources(MGSLPC_INFO *info)
2894 {
2895         if (debug_level >= DEBUG_LEVEL_INFO)
2896                 printk("release_resources(%s)\n", info->device_name);
2897         rx_free_buffers(info);
2898 }
2899
2900 /* Add the specified device instance data structure to the
2901  * global linked list of devices and increment the device count.
2902  *
2903  * Arguments:           info    pointer to device instance data
2904  */
2905 static void mgslpc_add_device(MGSLPC_INFO *info)
2906 {
2907         info->next_device = NULL;
2908         info->line = mgslpc_device_count;
2909         sprintf(info->device_name,"ttySLP%d",info->line);
2910
2911         if (info->line < MAX_DEVICE_COUNT) {
2912                 if (maxframe[info->line])
2913                         info->max_frame_size = maxframe[info->line];
2914         }
2915
2916         mgslpc_device_count++;
2917
2918         if (!mgslpc_device_list)
2919                 mgslpc_device_list = info;
2920         else {
2921                 MGSLPC_INFO *current_dev = mgslpc_device_list;
2922                 while( current_dev->next_device )
2923                         current_dev = current_dev->next_device;
2924                 current_dev->next_device = info;
2925         }
2926
2927         if (info->max_frame_size < 4096)
2928                 info->max_frame_size = 4096;
2929         else if (info->max_frame_size > 65535)
2930                 info->max_frame_size = 65535;
2931
2932         printk( "SyncLink PC Card %s:IO=%04X IRQ=%d\n",
2933                 info->device_name, info->io_base, info->irq_level);
2934
2935 #if SYNCLINK_GENERIC_HDLC
2936         hdlcdev_init(info);
2937 #endif
2938 }
2939
2940 static void mgslpc_remove_device(MGSLPC_INFO *remove_info)
2941 {
2942         MGSLPC_INFO *info = mgslpc_device_list;
2943         MGSLPC_INFO *last = NULL;
2944
2945         while(info) {
2946                 if (info == remove_info) {
2947                         if (last)
2948                                 last->next_device = info->next_device;
2949                         else
2950                                 mgslpc_device_list = info->next_device;
2951 #if SYNCLINK_GENERIC_HDLC
2952                         hdlcdev_exit(info);
2953 #endif
2954                         release_resources(info);
2955                         kfree(info);
2956                         mgslpc_device_count--;
2957                         return;
2958                 }
2959                 last = info;
2960                 info = info->next_device;
2961         }
2962 }
2963
2964 static struct pcmcia_device_id mgslpc_ids[] = {
2965         PCMCIA_DEVICE_MANF_CARD(0x02c5, 0x0050),
2966         PCMCIA_DEVICE_NULL
2967 };
2968 MODULE_DEVICE_TABLE(pcmcia, mgslpc_ids);
2969
2970 static struct pcmcia_driver mgslpc_driver = {
2971         .owner          = THIS_MODULE,
2972         .drv            = {
2973                 .name   = "synclink_cs",
2974         },
2975         .probe          = mgslpc_probe,
2976         .remove         = mgslpc_detach,
2977         .id_table       = mgslpc_ids,
2978         .suspend        = mgslpc_suspend,
2979         .resume         = mgslpc_resume,
2980 };
2981
2982 static const struct tty_operations mgslpc_ops = {
2983         .open = mgslpc_open,
2984         .close = mgslpc_close,
2985         .write = mgslpc_write,
2986         .put_char = mgslpc_put_char,
2987         .flush_chars = mgslpc_flush_chars,
2988         .write_room = mgslpc_write_room,
2989         .chars_in_buffer = mgslpc_chars_in_buffer,
2990         .flush_buffer = mgslpc_flush_buffer,
2991         .ioctl = mgslpc_ioctl,
2992         .throttle = mgslpc_throttle,
2993         .unthrottle = mgslpc_unthrottle,
2994         .send_xchar = mgslpc_send_xchar,
2995         .break_ctl = mgslpc_break,
2996         .wait_until_sent = mgslpc_wait_until_sent,
2997         .read_proc = mgslpc_read_proc,
2998         .set_termios = mgslpc_set_termios,
2999         .stop = tx_pause,
3000         .start = tx_release,
3001         .hangup = mgslpc_hangup,
3002         .tiocmget = tiocmget,
3003         .tiocmset = tiocmset,
3004 };
3005
3006 static void synclink_cs_cleanup(void)
3007 {
3008         int rc;
3009
3010         printk("Unloading %s: version %s\n", driver_name, driver_version);
3011
3012         while(mgslpc_device_list)
3013                 mgslpc_remove_device(mgslpc_device_list);
3014
3015         if (serial_driver) {
3016                 if ((rc = tty_unregister_driver(serial_driver)))
3017                         printk("%s(%d) failed to unregister tty driver err=%d\n",
3018                                __FILE__,__LINE__,rc);
3019                 put_tty_driver(serial_driver);
3020         }
3021
3022         pcmcia_unregister_driver(&mgslpc_driver);
3023 }
3024
3025 static int __init synclink_cs_init(void)
3026 {
3027     int rc;
3028
3029     if (break_on_load) {
3030             mgslpc_get_text_ptr();
3031             BREAKPOINT();
3032     }
3033
3034     printk("%s %s\n", driver_name, driver_version);
3035
3036     if ((rc = pcmcia_register_driver(&mgslpc_driver)) < 0)
3037             return rc;
3038
3039     serial_driver = alloc_tty_driver(MAX_DEVICE_COUNT);
3040     if (!serial_driver) {
3041             rc = -ENOMEM;
3042             goto error;
3043     }
3044
3045     /* Initialize the tty_driver structure */
3046
3047     serial_driver->owner = THIS_MODULE;
3048     serial_driver->driver_name = "synclink_cs";
3049     serial_driver->name = "ttySLP";
3050     serial_driver->major = ttymajor;
3051     serial_driver->minor_start = 64;
3052     serial_driver->type = TTY_DRIVER_TYPE_SERIAL;
3053     serial_driver->subtype = SERIAL_TYPE_NORMAL;
3054     serial_driver->init_termios = tty_std_termios;
3055     serial_driver->init_termios.c_cflag =
3056             B9600 | CS8 | CREAD | HUPCL | CLOCAL;
3057     serial_driver->flags = TTY_DRIVER_REAL_RAW;
3058     tty_set_operations(serial_driver, &mgslpc_ops);
3059
3060     if ((rc = tty_register_driver(serial_driver)) < 0) {
3061             printk("%s(%d):Couldn't register serial driver\n",
3062                    __FILE__,__LINE__);
3063             put_tty_driver(serial_driver);
3064             serial_driver = NULL;
3065             goto error;
3066     }
3067
3068     printk("%s %s, tty major#%d\n",
3069            driver_name, driver_version,
3070            serial_driver->major);
3071
3072     return 0;
3073
3074 error:
3075     synclink_cs_cleanup();
3076     return rc;
3077 }
3078
3079 static void __exit synclink_cs_exit(void)
3080 {
3081         synclink_cs_cleanup();
3082 }
3083
3084 module_init(synclink_cs_init);
3085 module_exit(synclink_cs_exit);
3086
3087 static void mgslpc_set_rate(MGSLPC_INFO *info, unsigned char channel, unsigned int rate)
3088 {
3089         unsigned int M, N;
3090         unsigned char val;
3091
3092         /* note:standard BRG mode is broken in V3.2 chip
3093          * so enhanced mode is always used
3094          */
3095
3096         if (rate) {
3097                 N = 3686400 / rate;
3098                 if (!N)
3099                         N = 1;
3100                 N >>= 1;
3101                 for (M = 1; N > 64 && M < 16; M++)
3102                         N >>= 1;
3103                 N--;
3104
3105                 /* BGR[5..0] = N
3106                  * BGR[9..6] = M
3107                  * BGR[7..0] contained in BGR register
3108                  * BGR[9..8] contained in CCR2[7..6]
3109                  * divisor = (N+1)*2^M
3110                  *
3111                  * Note: M *must* not be zero (causes asymetric duty cycle)
3112                  */
3113                 write_reg(info, (unsigned char) (channel + BGR),
3114                                   (unsigned char) ((M << 6) + N));
3115                 val = read_reg(info, (unsigned char) (channel + CCR2)) & 0x3f;
3116                 val |= ((M << 4) & 0xc0);
3117                 write_reg(info, (unsigned char) (channel + CCR2), val);
3118         }
3119 }
3120
3121 /* Enabled the AUX clock output at the specified frequency.
3122  */
3123 static void enable_auxclk(MGSLPC_INFO *info)
3124 {
3125         unsigned char val;
3126
3127         /* MODE
3128          *
3129          * 07..06  MDS[1..0] 10 = transparent HDLC mode
3130          * 05      ADM Address Mode, 0 = no addr recognition
3131          * 04      TMD Timer Mode, 0 = external
3132          * 03      RAC Receiver Active, 0 = inactive
3133          * 02      RTS 0=RTS active during xmit, 1=RTS always active
3134          * 01      TRS Timer Resolution, 1=512
3135          * 00      TLP Test Loop, 0 = no loop
3136          *
3137          * 1000 0010
3138          */
3139         val = 0x82;
3140
3141         /* channel B RTS is used to enable AUXCLK driver on SP505 */
3142         if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
3143                 val |= BIT2;
3144         write_reg(info, CHB + MODE, val);
3145
3146         /* CCR0
3147          *
3148          * 07      PU Power Up, 1=active, 0=power down
3149          * 06      MCE Master Clock Enable, 1=enabled
3150          * 05      Reserved, 0
3151          * 04..02  SC[2..0] Encoding
3152          * 01..00  SM[1..0] Serial Mode, 00=HDLC
3153          *
3154          * 11000000
3155          */
3156         write_reg(info, CHB + CCR0, 0xc0);
3157
3158         /* CCR1
3159          *
3160          * 07      SFLG Shared Flag, 0 = disable shared flags
3161          * 06      GALP Go Active On Loop, 0 = not used
3162          * 05      GLP Go On Loop, 0 = not used
3163          * 04      ODS Output Driver Select, 1=TxD is push-pull output
3164          * 03      ITF Interframe Time Fill, 0=mark, 1=flag
3165          * 02..00  CM[2..0] Clock Mode
3166          *
3167          * 0001 0111
3168          */
3169         write_reg(info, CHB + CCR1, 0x17);
3170
3171         /* CCR2 (Channel B)
3172          *
3173          * 07..06  BGR[9..8] Baud rate bits 9..8
3174          * 05      BDF Baud rate divisor factor, 0=1, 1=BGR value
3175          * 04      SSEL Clock source select, 1=submode b
3176          * 03      TOE 0=TxCLK is input, 1=TxCLK is output
3177          * 02      RWX Read/Write Exchange 0=disabled
3178          * 01      C32, CRC select, 0=CRC-16, 1=CRC-32
3179          * 00      DIV, data inversion 0=disabled, 1=enabled
3180          *
3181          * 0011 1000
3182          */
3183         if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
3184                 write_reg(info, CHB + CCR2, 0x38);
3185         else
3186                 write_reg(info, CHB + CCR2, 0x30);
3187
3188         /* CCR4
3189          *
3190          * 07      MCK4 Master Clock Divide by 4, 1=enabled
3191          * 06      EBRG Enhanced Baud Rate Generator Mode, 1=enabled
3192          * 05      TST1 Test Pin, 0=normal operation
3193          * 04      ICD Ivert Carrier Detect, 1=enabled (active low)
3194          * 03..02  Reserved, must be 0
3195          * 01..00  RFT[1..0] RxFIFO Threshold 00=32 bytes
3196          *
3197          * 0101 0000
3198          */
3199         write_reg(info, CHB + CCR4, 0x50);
3200
3201         /* if auxclk not enabled, set internal BRG so
3202          * CTS transitions can be detected (requires TxC)
3203          */
3204         if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
3205                 mgslpc_set_rate(info, CHB, info->params.clock_speed);
3206         else
3207                 mgslpc_set_rate(info, CHB, 921600);
3208 }
3209
3210 static void loopback_enable(MGSLPC_INFO *info)
3211 {
3212         unsigned char val;
3213
3214         /* CCR1:02..00  CM[2..0] Clock Mode = 111 (clock mode 7) */
3215         val = read_reg(info, CHA + CCR1) | (BIT2 + BIT1 + BIT0);
3216         write_reg(info, CHA + CCR1, val);
3217
3218         /* CCR2:04 SSEL Clock source select, 1=submode b */
3219         val = read_reg(info, CHA + CCR2) | (BIT4 + BIT5);
3220         write_reg(info, CHA + CCR2, val);
3221
3222         /* set LinkSpeed if available, otherwise default to 2Mbps */
3223         if (info->params.clock_speed)
3224                 mgslpc_set_rate(info, CHA, info->params.clock_speed);
3225         else
3226                 mgslpc_set_rate(info, CHA, 1843200);
3227
3228         /* MODE:00 TLP Test Loop, 1=loopback enabled */
3229         val = read_reg(info, CHA + MODE) | BIT0;
3230         write_reg(info, CHA + MODE, val);
3231 }
3232
3233 static void hdlc_mode(MGSLPC_INFO *info)
3234 {
3235         unsigned char val;
3236         unsigned char clkmode, clksubmode;
3237
3238         /* disable all interrupts */
3239         irq_disable(info, CHA, 0xffff);
3240         irq_disable(info, CHB, 0xffff);
3241         port_irq_disable(info, 0xff);
3242
3243         /* assume clock mode 0a, rcv=RxC xmt=TxC */
3244         clkmode = clksubmode = 0;
3245         if (info->params.flags & HDLC_FLAG_RXC_DPLL
3246             && info->params.flags & HDLC_FLAG_TXC_DPLL) {
3247                 /* clock mode 7a, rcv = DPLL, xmt = DPLL */
3248                 clkmode = 7;
3249         } else if (info->params.flags & HDLC_FLAG_RXC_BRG
3250                  && info->params.flags & HDLC_FLAG_TXC_BRG) {
3251                 /* clock mode 7b, rcv = BRG, xmt = BRG */
3252                 clkmode = 7;
3253                 clksubmode = 1;
3254         } else if (info->params.flags & HDLC_FLAG_RXC_DPLL) {
3255                 if (info->params.flags & HDLC_FLAG_TXC_BRG) {
3256                         /* clock mode 6b, rcv = DPLL, xmt = BRG/16 */
3257                         clkmode = 6;
3258                         clksubmode = 1;
3259                 } else {
3260                         /* clock mode 6a, rcv = DPLL, xmt = TxC */
3261                         clkmode = 6;
3262                 }
3263         } else if (info->params.flags & HDLC_FLAG_TXC_BRG) {
3264                 /* clock mode 0b, rcv = RxC, xmt = BRG */
3265                 clksubmode = 1;
3266         }
3267
3268         /* MODE
3269          *
3270          * 07..06  MDS[1..0] 10 = transparent HDLC mode
3271          * 05      ADM Address Mode, 0 = no addr recognition
3272          * 04      TMD Timer Mode, 0 = external
3273          * 03      RAC Receiver Active, 0 = inactive
3274          * 02      RTS 0=RTS active during xmit, 1=RTS always active
3275          * 01      TRS Timer Resolution, 1=512
3276          * 00      TLP Test Loop, 0 = no loop
3277          *
3278          * 1000 0010
3279          */
3280         val = 0x82;
3281         if (info->params.loopback)
3282                 val |= BIT0;
3283
3284         /* preserve RTS state */
3285         if (info->serial_signals & SerialSignal_RTS)
3286                 val |= BIT2;
3287         write_reg(info, CHA + MODE, val);
3288
3289         /* CCR0
3290          *
3291          * 07      PU Power Up, 1=active, 0=power down
3292          * 06      MCE Master Clock Enable, 1=enabled
3293          * 05      Reserved, 0
3294          * 04..02  SC[2..0] Encoding
3295          * 01..00  SM[1..0] Serial Mode, 00=HDLC
3296          *
3297          * 11000000
3298          */
3299         val = 0xc0;
3300         switch (info->params.encoding)
3301         {
3302         case HDLC_ENCODING_NRZI:
3303                 val |= BIT3;
3304                 break;
3305         case HDLC_ENCODING_BIPHASE_SPACE:
3306                 val |= BIT4;
3307                 break;          // FM0
3308         case HDLC_ENCODING_BIPHASE_MARK:
3309                 val |= BIT4 + BIT2;
3310                 break;          // FM1
3311         case HDLC_ENCODING_BIPHASE_LEVEL:
3312                 val |= BIT4 + BIT3;
3313                 break;          // Manchester
3314         }
3315         write_reg(info, CHA + CCR0, val);
3316
3317         /* CCR1
3318          *
3319          * 07      SFLG Shared Flag, 0 = disable shared flags
3320          * 06      GALP Go Active On Loop, 0 = not used
3321          * 05      GLP Go On Loop, 0 = not used
3322          * 04      ODS Output Driver Select, 1=TxD is push-pull output
3323          * 03      ITF Interframe Time Fill, 0=mark, 1=flag
3324          * 02..00  CM[2..0] Clock Mode
3325          *
3326          * 0001 0000
3327          */
3328         val = 0x10 + clkmode;
3329         write_reg(info, CHA + CCR1, val);
3330
3331         /* CCR2
3332          *
3333          * 07..06  BGR[9..8] Baud rate bits 9..8
3334          * 05      BDF Baud rate divisor factor, 0=1, 1=BGR value
3335          * 04      SSEL Clock source select, 1=submode b
3336          * 03      TOE 0=TxCLK is input, 0=TxCLK is input
3337          * 02      RWX Read/Write Exchange 0=disabled
3338          * 01      C32, CRC select, 0=CRC-16, 1=CRC-32
3339          * 00      DIV, data inversion 0=disabled, 1=enabled
3340          *
3341          * 0000 0000
3342          */
3343         val = 0x00;
3344         if (clkmode == 2 || clkmode == 3 || clkmode == 6
3345             || clkmode == 7 || (clkmode == 0 && clksubmode == 1))
3346                 val |= BIT5;
3347         if (clksubmode)
3348                 val |= BIT4;
3349         if (info->params.crc_type == HDLC_CRC_32_CCITT)
3350                 val |= BIT1;
3351         if (info->params.encoding == HDLC_ENCODING_NRZB)
3352                 val |= BIT0;
3353         write_reg(info, CHA + CCR2, val);
3354
3355         /* CCR3
3356          *
3357          * 07..06  PRE[1..0] Preamble count 00=1, 01=2, 10=4, 11=8
3358          * 05      EPT Enable preamble transmission, 1=enabled
3359          * 04      RADD Receive address pushed to FIFO, 0=disabled
3360          * 03      CRL CRC Reset Level, 0=FFFF
3361          * 02      RCRC Rx CRC 0=On 1=Off
3362          * 01      TCRC Tx CRC 0=On 1=Off
3363          * 00      PSD DPLL Phase Shift Disable
3364          *
3365          * 0000 0000
3366          */
3367         val = 0x00;
3368         if (info->params.crc_type == HDLC_CRC_NONE)
3369                 val |= BIT2 + BIT1;
3370         if (info->params.preamble != HDLC_PREAMBLE_PATTERN_NONE)
3371                 val |= BIT5;
3372         switch (info->params.preamble_length)
3373         {
3374         case HDLC_PREAMBLE_LENGTH_16BITS:
3375                 val |= BIT6;
3376                 break;
3377         case HDLC_PREAMBLE_LENGTH_32BITS:
3378                 val |= BIT6;
3379                 break;
3380         case HDLC_PREAMBLE_LENGTH_64BITS:
3381                 val |= BIT7 + BIT6;
3382                 break;
3383         }
3384         write_reg(info, CHA + CCR3, val);
3385
3386         /* PRE - Preamble pattern */
3387         val = 0;
3388         switch (info->params.preamble)
3389         {
3390         case HDLC_PREAMBLE_PATTERN_FLAGS: val = 0x7e; break;
3391         case HDLC_PREAMBLE_PATTERN_10:    val = 0xaa; break;
3392         case HDLC_PREAMBLE_PATTERN_01:    val = 0x55; break;
3393         case HDLC_PREAMBLE_PATTERN_ONES:  val = 0xff; break;
3394         }
3395         write_reg(info, CHA + PRE, val);
3396
3397         /* CCR4
3398          *
3399          * 07      MCK4 Master Clock Divide by 4, 1=enabled
3400          * 06      EBRG Enhanced Baud Rate Generator Mode, 1=enabled
3401          * 05      TST1 Test Pin, 0=normal operation
3402          * 04      ICD Ivert Carrier Detect, 1=enabled (active low)
3403          * 03..02  Reserved, must be 0
3404          * 01..00  RFT[1..0] RxFIFO Threshold 00=32 bytes
3405          *
3406          * 0101 0000
3407          */
3408         val = 0x50;
3409         write_reg(info, CHA + CCR4, val);
3410         if (info->params.flags & HDLC_FLAG_RXC_DPLL)
3411                 mgslpc_set_rate(info, CHA, info->params.clock_speed * 16);
3412         else
3413                 mgslpc_set_rate(info, CHA, info->params.clock_speed);
3414
3415         /* RLCR Receive length check register
3416          *
3417          * 7     1=enable receive length check
3418          * 6..0  Max frame length = (RL + 1) * 32
3419          */
3420         write_reg(info, CHA + RLCR, 0);
3421
3422         /* XBCH Transmit Byte Count High
3423          *
3424          * 07      DMA mode, 0 = interrupt driven
3425          * 06      NRM, 0=ABM (ignored)
3426          * 05      CAS Carrier Auto Start
3427          * 04      XC Transmit Continuously (ignored)
3428          * 03..00  XBC[10..8] Transmit byte count bits 10..8
3429          *
3430          * 0000 0000
3431          */
3432         val = 0x00;
3433         if (info->params.flags & HDLC_FLAG_AUTO_DCD)
3434                 val |= BIT5;
3435         write_reg(info, CHA + XBCH, val);
3436         enable_auxclk(info);
3437         if (info->params.loopback || info->testing_irq)
3438                 loopback_enable(info);
3439         if (info->params.flags & HDLC_FLAG_AUTO_CTS)
3440         {
3441                 irq_enable(info, CHB, IRQ_CTS);
3442                 /* PVR[3] 1=AUTO CTS active */
3443                 set_reg_bits(info, CHA + PVR, BIT3);
3444         } else
3445                 clear_reg_bits(info, CHA + PVR, BIT3);
3446
3447         irq_enable(info, CHA,
3448                          IRQ_RXEOM + IRQ_RXFIFO + IRQ_ALLSENT +
3449                          IRQ_UNDERRUN + IRQ_TXFIFO);
3450         issue_command(info, CHA, CMD_TXRESET + CMD_RXRESET);
3451         wait_command_complete(info, CHA);
3452         read_reg16(info, CHA + ISR);    /* clear pending IRQs */
3453
3454         /* Master clock mode enabled above to allow reset commands
3455          * to complete even if no data clocks are present.
3456          *
3457          * Disable master clock mode for normal communications because
3458          * V3.2 of the ESCC2 has a bug that prevents the transmit all sent
3459          * IRQ when in master clock mode.
3460          *
3461          * Leave master clock mode enabled for IRQ test because the
3462          * timer IRQ used by the test can only happen in master clock mode.
3463          */
3464         if (!info->testing_irq)
3465                 clear_reg_bits(info, CHA + CCR0, BIT6);
3466
3467         tx_set_idle(info);
3468
3469         tx_stop(info);
3470         rx_stop(info);
3471 }
3472
3473 static void rx_stop(MGSLPC_INFO *info)
3474 {
3475         if (debug_level >= DEBUG_LEVEL_ISR)
3476                 printk("%s(%d):rx_stop(%s)\n",
3477                          __FILE__,__LINE__, info->device_name );
3478
3479         /* MODE:03 RAC Receiver Active, 0=inactive */
3480         clear_reg_bits(info, CHA + MODE, BIT3);
3481
3482         info->rx_enabled = false;
3483         info->rx_overflow = false;
3484 }
3485
3486 static void rx_start(MGSLPC_INFO *info)
3487 {
3488         if (debug_level >= DEBUG_LEVEL_ISR)
3489                 printk("%s(%d):rx_start(%s)\n",
3490                          __FILE__,__LINE__, info->device_name );
3491
3492         rx_reset_buffers(info);
3493         info->rx_enabled = false;
3494         info->rx_overflow = false;
3495
3496         /* MODE:03 RAC Receiver Active, 1=active */
3497         set_reg_bits(info, CHA + MODE, BIT3);
3498
3499         info->rx_enabled = true;
3500 }
3501
3502 static void tx_start(MGSLPC_INFO *info)
3503 {
3504         if (debug_level >= DEBUG_LEVEL_ISR)
3505                 printk("%s(%d):tx_start(%s)\n",
3506                          __FILE__,__LINE__, info->device_name );
3507
3508         if (info->tx_count) {
3509                 /* If auto RTS enabled and RTS is inactive, then assert */
3510                 /* RTS and set a flag indicating that the driver should */
3511                 /* negate RTS when the transmission completes. */
3512                 info->drop_rts_on_tx_done = false;
3513
3514                 if (info->params.flags & HDLC_FLAG_AUTO_RTS) {
3515                         get_signals(info);
3516                         if (!(info->serial_signals & SerialSignal_RTS)) {
3517                                 info->serial_signals |= SerialSignal_RTS;
3518                                 set_signals(info);
3519                                 info->drop_rts_on_tx_done = true;
3520                         }
3521                 }
3522
3523                 if (info->params.mode == MGSL_MODE_ASYNC) {
3524                         if (!info->tx_active) {
3525                                 info->tx_active = true;
3526                                 tx_ready(info);
3527                         }
3528                 } else {
3529                         info->tx_active = true;
3530                         tx_ready(info);
3531                         mod_timer(&info->tx_timer, jiffies +
3532                                         msecs_to_jiffies(5000));
3533                 }
3534         }
3535
3536         if (!info->tx_enabled)
3537                 info->tx_enabled = true;
3538 }
3539
3540 static void tx_stop(MGSLPC_INFO *info)
3541 {
3542         if (debug_level >= DEBUG_LEVEL_ISR)
3543                 printk("%s(%d):tx_stop(%s)\n",
3544                          __FILE__,__LINE__, info->device_name );
3545
3546         del_timer(&info->tx_timer);
3547
3548         info->tx_enabled = false;
3549         info->tx_active = false;
3550 }
3551
3552 /* Reset the adapter to a known state and prepare it for further use.
3553  */
3554 static void reset_device(MGSLPC_INFO *info)
3555 {
3556         /* power up both channels (set BIT7) */
3557         write_reg(info, CHA + CCR0, 0x80);
3558         write_reg(info, CHB + CCR0, 0x80);
3559         write_reg(info, CHA + MODE, 0);
3560         write_reg(info, CHB + MODE, 0);
3561
3562         /* disable all interrupts */
3563         irq_disable(info, CHA, 0xffff);
3564         irq_disable(info, CHB, 0xffff);
3565         port_irq_disable(info, 0xff);
3566
3567         /* PCR Port Configuration Register
3568          *
3569          * 07..04  DEC[3..0] Serial I/F select outputs
3570          * 03      output, 1=AUTO CTS control enabled
3571          * 02      RI Ring Indicator input 0=active
3572          * 01      DSR input 0=active
3573          * 00      DTR output 0=active
3574          *
3575          * 0000 0110
3576          */
3577         write_reg(info, PCR, 0x06);
3578
3579         /* PVR Port Value Register
3580          *
3581          * 07..04  DEC[3..0] Serial I/F select (0000=disabled)
3582          * 03      AUTO CTS output 1=enabled
3583          * 02      RI Ring Indicator input
3584          * 01      DSR input
3585          * 00      DTR output (1=inactive)
3586          *
3587          * 0000 0001
3588          */
3589 //      write_reg(info, PVR, PVR_DTR);
3590
3591         /* IPC Interrupt Port Configuration
3592          *
3593          * 07      VIS 1=Masked interrupts visible
3594          * 06..05  Reserved, 0
3595          * 04..03  SLA Slave address, 00 ignored
3596          * 02      CASM Cascading Mode, 1=daisy chain
3597          * 01..00  IC[1..0] Interrupt Config, 01=push-pull output, active low
3598          *
3599          * 0000 0101
3600          */
3601         write_reg(info, IPC, 0x05);
3602 }
3603
3604 static void async_mode(MGSLPC_INFO *info)
3605 {
3606         unsigned char val;
3607
3608         /* disable all interrupts */
3609         irq_disable(info, CHA, 0xffff);
3610         irq_disable(info, CHB, 0xffff);
3611         port_irq_disable(info, 0xff);
3612
3613         /* MODE
3614          *
3615          * 07      Reserved, 0
3616          * 06      FRTS RTS State, 0=active
3617          * 05      FCTS Flow Control on CTS
3618          * 04      FLON Flow Control Enable
3619          * 03      RAC Receiver Active, 0 = inactive
3620          * 02      RTS 0=Auto RTS, 1=manual RTS
3621          * 01      TRS Timer Resolution, 1=512
3622          * 00      TLP Test Loop, 0 = no loop
3623          *
3624          * 0000 0110
3625          */
3626         val = 0x06;
3627         if (info->params.loopback)
3628                 val |= BIT0;
3629
3630         /* preserve RTS state */
3631         if (!(info->serial_signals & SerialSignal_RTS))
3632                 val |= BIT6;
3633         write_reg(info, CHA + MODE, val);
3634
3635         /* CCR0
3636          *
3637          * 07      PU Power Up, 1=active, 0=power down
3638          * 06      MCE Master Clock Enable, 1=enabled
3639          * 05      Reserved, 0
3640          * 04..02  SC[2..0] Encoding, 000=NRZ
3641          * 01..00  SM[1..0] Serial Mode, 11=Async
3642          *
3643          * 1000 0011
3644          */
3645         write_reg(info, CHA + CCR0, 0x83);
3646
3647         /* CCR1
3648          *
3649          * 07..05  Reserved, 0
3650          * 04      ODS Output Driver Select, 1=TxD is push-pull output
3651          * 03      BCR Bit Clock Rate, 1=16x
3652          * 02..00  CM[2..0] Clock Mode, 111=BRG
3653          *
3654          * 0001 1111
3655          */
3656         write_reg(info, CHA + CCR1, 0x1f);
3657
3658         /* CCR2 (channel A)
3659          *
3660          * 07..06  BGR[9..8] Baud rate bits 9..8
3661          * 05      BDF Baud rate divisor factor, 0=1, 1=BGR value
3662          * 04      SSEL Clock source select, 1=submode b
3663          * 03      TOE 0=TxCLK is input, 0=TxCLK is input
3664          * 02      RWX Read/Write Exchange 0=disabled
3665          * 01      Reserved, 0
3666          * 00      DIV, data inversion 0=disabled, 1=enabled
3667          *
3668          * 0001 0000
3669          */
3670         write_reg(info, CHA + CCR2, 0x10);
3671
3672         /* CCR3
3673          *
3674          * 07..01  Reserved, 0
3675          * 00      PSD DPLL Phase Shift Disable
3676          *
3677          * 0000 0000
3678          */
3679         write_reg(info, CHA + CCR3, 0);
3680
3681         /* CCR4
3682          *
3683          * 07      MCK4 Master Clock Divide by 4, 1=enabled
3684          * 06      EBRG Enhanced Baud Rate Generator Mode, 1=enabled
3685          * 05      TST1 Test Pin, 0=normal operation
3686          * 04      ICD Ivert Carrier Detect, 1=enabled (active low)
3687          * 03..00  Reserved, must be 0
3688          *
3689          * 0101 0000
3690          */
3691         write_reg(info, CHA + CCR4, 0x50);
3692         mgslpc_set_rate(info, CHA, info->params.data_rate * 16);
3693
3694         /* DAFO Data Format
3695          *
3696          * 07      Reserved, 0
3697          * 06      XBRK transmit break, 0=normal operation
3698          * 05      Stop bits (0=1, 1=2)
3699          * 04..03  PAR[1..0] Parity (01=odd, 10=even)
3700          * 02      PAREN Parity Enable
3701          * 01..00  CHL[1..0] Character Length (00=8, 01=7)
3702          *
3703          */
3704         val = 0x00;
3705         if (info->params.data_bits != 8)
3706                 val |= BIT0;    /* 7 bits */
3707         if (info->params.stop_bits != 1)
3708                 val |= BIT5;
3709         if (info->params.parity != ASYNC_PARITY_NONE)
3710         {
3711                 val |= BIT2;    /* Parity enable */
3712                 if (info->params.parity == ASYNC_PARITY_ODD)
3713                         val |= BIT3;
3714                 else
3715                         val |= BIT4;
3716         }
3717         write_reg(info, CHA + DAFO, val);
3718
3719         /* RFC Rx FIFO Control
3720          *
3721          * 07      Reserved, 0
3722          * 06      DPS, 1=parity bit not stored in data byte
3723          * 05      DXS, 0=all data stored in FIFO (including XON/XOFF)
3724          * 04      RFDF Rx FIFO Data Format, 1=status byte stored in FIFO
3725          * 03..02  RFTH[1..0], rx threshold, 11=16 status + 16 data byte
3726          * 01      Reserved, 0
3727          * 00      TCDE Terminate Char Detect Enable, 0=disabled
3728          *
3729          * 0101 1100
3730          */
3731         write_reg(info, CHA + RFC, 0x5c);
3732
3733         /* RLCR Receive length check register
3734          *
3735          * Max frame length = (RL + 1) * 32
3736          */
3737         write_reg(info, CHA + RLCR, 0);
3738
3739         /* XBCH Transmit Byte Count High
3740          *
3741          * 07      DMA mode, 0 = interrupt driven
3742          * 06      NRM, 0=ABM (ignored)
3743          * 05      CAS Carrier Auto Start
3744          * 04      XC Transmit Continuously (ignored)
3745          * 03..00  XBC[10..8] Transmit byte count bits 10..8
3746          *
3747          * 0000 0000
3748          */
3749         val = 0x00;
3750         if (info->params.flags & HDLC_FLAG_AUTO_DCD)
3751                 val |= BIT5;
3752         write_reg(info, CHA + XBCH, val);
3753         if (info->params.flags & HDLC_FLAG_AUTO_CTS)
3754                 irq_enable(info, CHA, IRQ_CTS);
3755
3756         /* MODE:03 RAC Receiver Active, 1=active */
3757         set_reg_bits(info, CHA + MODE, BIT3);
3758         enable_auxclk(info);
3759         if (info->params.flags & HDLC_FLAG_AUTO_CTS) {
3760                 irq_enable(info, CHB, IRQ_CTS);
3761                 /* PVR[3] 1=AUTO CTS active */
3762                 set_reg_bits(info, CHA + PVR, BIT3);
3763         } else
3764                 clear_reg_bits(info, CHA + PVR, BIT3);
3765         irq_enable(info, CHA,
3766                           IRQ_RXEOM + IRQ_RXFIFO + IRQ_BREAK_ON + IRQ_RXTIME +
3767                           IRQ_ALLSENT + IRQ_TXFIFO);
3768         issue_command(info, CHA, CMD_TXRESET + CMD_RXRESET);
3769         wait_command_complete(info, CHA);
3770         read_reg16(info, CHA + ISR);    /* clear pending IRQs */
3771 }
3772
3773 /* Set the HDLC idle mode for the transmitter.
3774  */
3775 static void tx_set_idle(MGSLPC_INFO *info)
3776 {
3777         /* Note: ESCC2 only supports flags and one idle modes */
3778         if (info->idle_mode == HDLC_TXIDLE_FLAGS)
3779                 set_reg_bits(info, CHA + CCR1, BIT3);
3780         else
3781                 clear_reg_bits(info, CHA + CCR1, BIT3);
3782 }
3783
3784 /* get state of the V24 status (input) signals.
3785  */
3786 static void get_signals(MGSLPC_INFO *info)
3787 {
3788         unsigned char status = 0;
3789
3790         /* preserve DTR and RTS */
3791         info->serial_signals &= SerialSignal_DTR + SerialSignal_RTS;
3792
3793         if (read_reg(info, CHB + VSTR) & BIT7)
3794                 info->serial_signals |= SerialSignal_DCD;
3795         if (read_reg(info, CHB + STAR) & BIT1)
3796                 info->serial_signals |= SerialSignal_CTS;
3797
3798         status = read_reg(info, CHA + PVR);
3799         if (!(status & PVR_RI))
3800                 info->serial_signals |= SerialSignal_RI;
3801         if (!(status & PVR_DSR))
3802                 info->serial_signals |= SerialSignal_DSR;
3803 }
3804
3805 /* Set the state of DTR and RTS based on contents of
3806  * serial_signals member of device extension.
3807  */
3808 static void set_signals(MGSLPC_INFO *info)
3809 {
3810         unsigned char val;
3811
3812         val = read_reg(info, CHA + MODE);
3813         if (info->params.mode == MGSL_MODE_ASYNC) {
3814                 if (info->serial_signals & SerialSignal_RTS)
3815                         val &= ~BIT6;
3816                 else
3817                         val |= BIT6;
3818         } else {
3819                 if (info->serial_signals & SerialSignal_RTS)
3820                         val |= BIT2;
3821                 else
3822                         val &= ~BIT2;
3823         }
3824         write_reg(info, CHA + MODE, val);
3825
3826         if (info->serial_signals & SerialSignal_DTR)
3827                 clear_reg_bits(info, CHA + PVR, PVR_DTR);
3828         else
3829                 set_reg_bits(info, CHA + PVR, PVR_DTR);
3830 }
3831
3832 static void rx_reset_buffers(MGSLPC_INFO *info)
3833 {
3834         RXBUF *buf;
3835         int i;
3836
3837         info->rx_put = 0;
3838         info->rx_get = 0;
3839         info->rx_frame_count = 0;
3840         for (i=0 ; i < info->rx_buf_count ; i++) {
3841                 buf = (RXBUF*)(info->rx_buf + (i * info->rx_buf_size));
3842                 buf->status = buf->count = 0;
3843         }
3844 }
3845
3846 /* Attempt to return a received HDLC frame
3847  * Only frames received without errors are returned.
3848  *
3849  * Returns true if frame returned, otherwise false
3850  */
3851 static bool rx_get_frame(MGSLPC_INFO *info)
3852 {
3853         unsigned short status;
3854         RXBUF *buf;
3855         unsigned int framesize = 0;
3856         unsigned long flags;
3857         struct tty_struct *tty = info->tty;
3858         bool return_frame = false;
3859
3860         if (info->rx_frame_count == 0)
3861                 return false;
3862
3863         buf = (RXBUF*)(info->rx_buf + (info->rx_get * info->rx_buf_size));
3864
3865         status = buf->status;
3866
3867         /* 07  VFR  1=valid frame
3868          * 06  RDO  1=data overrun
3869          * 05  CRC  1=OK, 0=error
3870          * 04  RAB  1=frame aborted
3871          */
3872         if ((status & 0xf0) != 0xA0) {
3873                 if (!(status & BIT7) || (status & BIT4))
3874                         info->icount.rxabort++;
3875                 else if (status & BIT6)
3876                         info->icount.rxover++;
3877                 else if (!(status & BIT5)) {
3878                         info->icount.rxcrc++;
3879                         if (info->params.crc_type & HDLC_CRC_RETURN_EX)
3880                                 return_frame = true;
3881                 }
3882                 framesize = 0;
3883 #if SYNCLINK_GENERIC_HDLC
3884                 {
3885                         info->netdev->stats.rx_errors++;
3886                         info->netdev->stats.rx_frame_errors++;
3887                 }
3888 #endif
3889         } else
3890                 return_frame = true;
3891
3892         if (return_frame)
3893                 framesize = buf->count;
3894
3895         if (debug_level >= DEBUG_LEVEL_BH)
3896                 printk("%s(%d):rx_get_frame(%s) status=%04X size=%d\n",
3897                         __FILE__,__LINE__,info->device_name,status,framesize);
3898
3899         if (debug_level >= DEBUG_LEVEL_DATA)
3900                 trace_block(info, buf->data, framesize, 0);
3901
3902         if (framesize) {
3903                 if ((info->params.crc_type & HDLC_CRC_RETURN_EX &&
3904                       framesize+1 > info->max_frame_size) ||
3905                     framesize > info->max_frame_size)
3906                         info->icount.rxlong++;
3907                 else {
3908                         if (status & BIT5)
3909                                 info->icount.rxok++;
3910
3911                         if (info->params.crc_type & HDLC_CRC_RETURN_EX) {
3912                                 *(buf->data + framesize) = status & BIT5 ? RX_OK:RX_CRC_ERROR;
3913                                 ++framesize;
3914                         }
3915
3916 #if SYNCLINK_GENERIC_HDLC
3917                         if (info->netcount)
3918                                 hdlcdev_rx(info, buf->data, framesize);
3919                         else
3920 #endif
3921                                 ldisc_receive_buf(tty, buf->data, info->flag_buf, framesize);
3922                 }
3923         }
3924
3925         spin_lock_irqsave(&info->lock,flags);
3926         buf->status = buf->count = 0;
3927         info->rx_frame_count--;
3928         info->rx_get++;
3929         if (info->rx_get >= info->rx_buf_count)
3930                 info->rx_get = 0;
3931         spin_unlock_irqrestore(&info->lock,flags);
3932
3933         return true;
3934 }
3935
3936 static bool register_test(MGSLPC_INFO *info)
3937 {
3938         static unsigned char patterns[] =
3939             { 0x00, 0xff, 0xaa, 0x55, 0x69, 0x96, 0x0f };
3940         static unsigned int count = ARRAY_SIZE(patterns);
3941         unsigned int i;
3942         bool rc = true;
3943         unsigned long flags;
3944
3945         spin_lock_irqsave(&info->lock,flags);
3946         reset_device(info);
3947
3948         for (i = 0; i < count; i++) {
3949                 write_reg(info, XAD1, patterns[i]);
3950                 write_reg(info, XAD2, patterns[(i + 1) % count]);
3951                 if ((read_reg(info, XAD1) != patterns[i]) ||
3952                     (read_reg(info, XAD2) != patterns[(i + 1) % count])) {
3953                         rc = false;
3954                         break;
3955                 }
3956         }
3957
3958         spin_unlock_irqrestore(&info->lock,flags);
3959         return rc;
3960 }
3961
3962 static bool irq_test(MGSLPC_INFO *info)
3963 {
3964         unsigned long end_time;
3965         unsigned long flags;
3966
3967         spin_lock_irqsave(&info->lock,flags);
3968         reset_device(info);
3969
3970         info->testing_irq = true;
3971         hdlc_mode(info);
3972
3973         info->irq_occurred = false;
3974
3975         /* init hdlc mode */
3976
3977         irq_enable(info, CHA, IRQ_TIMER);
3978         write_reg(info, CHA + TIMR, 0); /* 512 cycles */
3979         issue_command(info, CHA, CMD_START_TIMER);
3980
3981         spin_unlock_irqrestore(&info->lock,flags);
3982
3983         end_time=100;
3984         while(end_time-- && !info->irq_occurred) {
3985                 msleep_interruptible(10);
3986         }
3987
3988         info->testing_irq = false;
3989
3990         spin_lock_irqsave(&info->lock,flags);
3991         reset_device(info);
3992         spin_unlock_irqrestore(&info->lock,flags);
3993
3994         return info->irq_occurred;
3995 }
3996
3997 static int adapter_test(MGSLPC_INFO *info)
3998 {
3999         if (!register_test(info)) {
4000                 info->init_error = DiagStatus_AddressFailure;
4001                 printk( "%s(%d):Register test failure for device %s Addr=%04X\n",
4002                         __FILE__,__LINE__,info->device_name, (unsigned short)(info->io_base) );
4003                 return -ENODEV;
4004         }
4005
4006         if (!irq_test(info)) {
4007                 info->init_error = DiagStatus_IrqFailure;
4008                 printk( "%s(%d):Interrupt test failure for device %s IRQ=%d\n",
4009                         __FILE__,__LINE__,info->device_name, (unsigned short)(info->irq_level) );
4010                 return -ENODEV;
4011         }
4012
4013         if (debug_level >= DEBUG_LEVEL_INFO)
4014                 printk("%s(%d):device %s passed diagnostics\n",
4015                         __FILE__,__LINE__,info->device_name);
4016         return 0;
4017 }
4018
4019 static void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit)
4020 {
4021         int i;
4022         int linecount;
4023         if (xmit)
4024                 printk("%s tx data:\n",info->device_name);
4025         else
4026                 printk("%s rx data:\n",info->device_name);
4027
4028         while(count) {
4029                 if (count > 16)
4030                         linecount = 16;
4031                 else
4032                         linecount = count;
4033
4034                 for(i=0;i<linecount;i++)
4035                         printk("%02X ",(unsigned char)data[i]);
4036                 for(;i<17;i++)
4037                         printk("   ");
4038                 for(i=0;i<linecount;i++) {
4039                         if (data[i]>=040 && data[i]<=0176)
4040                                 printk("%c",data[i]);
4041                         else
4042                                 printk(".");
4043                 }
4044                 printk("\n");
4045
4046                 data  += linecount;
4047                 count -= linecount;
4048         }
4049 }
4050
4051 /* HDLC frame time out
4052  * update stats and do tx completion processing
4053  */
4054 static void tx_timeout(unsigned long context)
4055 {
4056         MGSLPC_INFO *info = (MGSLPC_INFO*)context;
4057         unsigned long flags;
4058
4059         if ( debug_level >= DEBUG_LEVEL_INFO )
4060                 printk( "%s(%d):tx_timeout(%s)\n",
4061                         __FILE__,__LINE__,info->device_name);
4062         if(info->tx_active &&
4063            info->params.mode == MGSL_MODE_HDLC) {
4064                 info->icount.txtimeout++;
4065         }
4066         spin_lock_irqsave(&info->lock,flags);
4067         info->tx_active = false;
4068         info->tx_count = info->tx_put = info->tx_get = 0;
4069
4070         spin_unlock_irqrestore(&info->lock,flags);
4071
4072 #if SYNCLINK_GENERIC_HDLC
4073         if (info->netcount)
4074                 hdlcdev_tx_done(info);
4075         else
4076 #endif
4077                 bh_transmit(info);
4078 }
4079
4080 #if SYNCLINK_GENERIC_HDLC
4081
4082 /**
4083  * called by generic HDLC layer when protocol selected (PPP, frame relay, etc.)
4084  * set encoding and frame check sequence (FCS) options
4085  *
4086  * dev       pointer to network device structure
4087  * encoding  serial encoding setting
4088  * parity    FCS setting
4089  *
4090  * returns 0 if success, otherwise error code
4091  */
4092 static int hdlcdev_attach(struct net_device *dev, unsigned short encoding,
4093                           unsigned short parity)
4094 {
4095         MGSLPC_INFO *info = dev_to_port(dev);
4096         unsigned char  new_encoding;
4097         unsigned short new_crctype;
4098
4099         /* return error if TTY interface open */
4100         if (info->count)
4101                 return -EBUSY;
4102
4103         switch (encoding)
4104         {
4105         case ENCODING_NRZ:        new_encoding = HDLC_ENCODING_NRZ; break;
4106         case ENCODING_NRZI:       new_encoding = HDLC_ENCODING_NRZI_SPACE; break;
4107         case ENCODING_FM_MARK:    new_encoding = HDLC_ENCODING_BIPHASE_MARK; break;
4108         case ENCODING_FM_SPACE:   new_encoding = HDLC_ENCODING_BIPHASE_SPACE; break;
4109         case ENCODING_MANCHESTER: new_encoding = HDLC_ENCODING_BIPHASE_LEVEL; break;
4110         default: return -EINVAL;
4111         }
4112
4113         switch (parity)
4114         {
4115         case PARITY_NONE:            new_crctype = HDLC_CRC_NONE; break;
4116         case PARITY_CRC16_PR1_CCITT: new_crctype = HDLC_CRC_16_CCITT; break;
4117         case PARITY_CRC32_PR1_CCITT: new_crctype = HDLC_CRC_32_CCITT; break;
4118         default: return -EINVAL;
4119         }
4120
4121         info->params.encoding = new_encoding;
4122         info->params.crc_type = new_crctype;
4123
4124         /* if network interface up, reprogram hardware */
4125         if (info->netcount)
4126                 mgslpc_program_hw(info);
4127
4128         return 0;
4129 }
4130
4131 /**
4132  * called by generic HDLC layer to send frame
4133  *
4134  * skb  socket buffer containing HDLC frame
4135  * dev  pointer to network device structure
4136  *
4137  * returns 0 if success, otherwise error code
4138  */
4139 static int hdlcdev_xmit(struct sk_buff *skb, struct net_device *dev)
4140 {
4141         MGSLPC_INFO *info = dev_to_port(dev);
4142         unsigned long flags;
4143
4144         if (debug_level >= DEBUG_LEVEL_INFO)
4145                 printk(KERN_INFO "%s:hdlc_xmit(%s)\n",__FILE__,dev->name);
4146
4147         /* stop sending until this frame completes */
4148         netif_stop_queue(dev);
4149
4150         /* copy data to device buffers */
4151         skb_copy_from_linear_data(skb, info->tx_buf, skb->len);
4152         info->tx_get = 0;
4153         info->tx_put = info->tx_count = skb->len;
4154
4155         /* update network statistics */
4156         dev->stats.tx_packets++;
4157         dev->stats.tx_bytes += skb->len;
4158
4159         /* done with socket buffer, so free it */
4160         dev_kfree_skb(skb);
4161
4162         /* save start time for transmit timeout detection */
4163         dev->trans_start = jiffies;
4164
4165         /* start hardware transmitter if necessary */
4166         spin_lock_irqsave(&info->lock,flags);
4167         if (!info->tx_active)
4168                 tx_start(info);
4169         spin_unlock_irqrestore(&info->lock,flags);
4170
4171         return 0;
4172 }
4173
4174 /**
4175  * called by network layer when interface enabled
4176  * claim resources and initialize hardware
4177  *
4178  * dev  pointer to network device structure
4179  *
4180  * returns 0 if success, otherwise error code
4181  */
4182 static int hdlcdev_open(struct net_device *dev)
4183 {
4184         MGSLPC_INFO *info = dev_to_port(dev);
4185         int rc;
4186         unsigned long flags;
4187
4188         if (debug_level >= DEBUG_LEVEL_INFO)
4189                 printk("%s:hdlcdev_open(%s)\n",__FILE__,dev->name);
4190
4191         /* generic HDLC layer open processing */
4192         if ((rc = hdlc_open(dev)))
4193                 return rc;
4194
4195         /* arbitrate between network and tty opens */
4196         spin_lock_irqsave(&info->netlock, flags);
4197         if (info->count != 0 || info->netcount != 0) {
4198                 printk(KERN_WARNING "%s: hdlc_open returning busy\n", dev->name);
4199                 spin_unlock_irqrestore(&info->netlock, flags);
4200                 return -EBUSY;
4201         }
4202         info->netcount=1;
4203         spin_unlock_irqrestore(&info->netlock, flags);
4204
4205         /* claim resources and init adapter */
4206         if ((rc = startup(info)) != 0) {
4207                 spin_lock_irqsave(&info->netlock, flags);
4208                 info->netcount=0;
4209                 spin_unlock_irqrestore(&info->netlock, flags);
4210                 return rc;
4211         }
4212
4213         /* assert DTR and RTS, apply hardware settings */
4214         info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
4215         mgslpc_program_hw(info);
4216
4217         /* enable network layer transmit */
4218         dev->trans_start = jiffies;
4219         netif_start_queue(dev);
4220
4221         /* inform generic HDLC layer of current DCD status */
4222         spin_lock_irqsave(&info->lock, flags);
4223         get_signals(info);
4224         spin_unlock_irqrestore(&info->lock, flags);
4225         if (info->serial_signals & SerialSignal_DCD)
4226                 netif_carrier_on(dev);
4227         else
4228                 netif_carrier_off(dev);
4229         return 0;
4230 }
4231
4232 /**
4233  * called by network layer when interface is disabled
4234  * shutdown hardware and release resources
4235  *
4236  * dev  pointer to network device structure
4237  *
4238  * returns 0 if success, otherwise error code
4239  */
4240 static int hdlcdev_close(struct net_device *dev)
4241 {
4242         MGSLPC_INFO *info = dev_to_port(dev);
4243         unsigned long flags;
4244
4245         if (debug_level >= DEBUG_LEVEL_INFO)
4246                 printk("%s:hdlcdev_close(%s)\n",__FILE__,dev->name);
4247
4248         netif_stop_queue(dev);
4249
4250         /* shutdown adapter and release resources */
4251         shutdown(info);
4252
4253         hdlc_close(dev);
4254
4255         spin_lock_irqsave(&info->netlock, flags);
4256         info->netcount=0;
4257         spin_unlock_irqrestore(&info->netlock, flags);
4258
4259         return 0;
4260 }
4261
4262 /**
4263  * called by network layer to process IOCTL call to network device
4264  *
4265  * dev  pointer to network device structure
4266  * ifr  pointer to network interface request structure
4267  * cmd  IOCTL command code
4268  *
4269  * returns 0 if success, otherwise error code
4270  */
4271 static int hdlcdev_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
4272 {
4273         const size_t size = sizeof(sync_serial_settings);
4274         sync_serial_settings new_line;
4275         sync_serial_settings __user *line = ifr->ifr_settings.ifs_ifsu.sync;
4276         MGSLPC_INFO *info = dev_to_port(dev);
4277         unsigned int flags;
4278
4279         if (debug_level >= DEBUG_LEVEL_INFO)
4280                 printk("%s:hdlcdev_ioctl(%s)\n",__FILE__,dev->name);
4281
4282         /* return error if TTY interface open */
4283         if (info->count)
4284                 return -EBUSY;
4285
4286         if (cmd != SIOCWANDEV)
4287                 return hdlc_ioctl(dev, ifr, cmd);
4288
4289         switch(ifr->ifr_settings.type) {
4290         case IF_GET_IFACE: /* return current sync_serial_settings */
4291
4292                 ifr->ifr_settings.type = IF_IFACE_SYNC_SERIAL;
4293                 if (ifr->ifr_settings.size < size) {
4294                         ifr->ifr_settings.size = size; /* data size wanted */
4295                         return -ENOBUFS;
4296                 }
4297
4298                 flags = info->params.flags & (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
4299                                               HDLC_FLAG_RXC_BRG    | HDLC_FLAG_RXC_TXCPIN |
4300                                               HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
4301                                               HDLC_FLAG_TXC_BRG    | HDLC_FLAG_TXC_RXCPIN);
4302
4303                 switch (flags){
4304                 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN): new_line.clock_type = CLOCK_EXT; break;
4305                 case (HDLC_FLAG_RXC_BRG    | HDLC_FLAG_TXC_BRG):    new_line.clock_type = CLOCK_INT; break;
4306                 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG):    new_line.clock_type = CLOCK_TXINT; break;
4307                 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN): new_line.clock_type = CLOCK_TXFROMRX; break;
4308                 default: new_line.clock_type = CLOCK_DEFAULT;
4309                 }
4310
4311                 new_line.clock_rate = info->params.clock_speed;
4312                 new_line.loopback   = info->params.loopback ? 1:0;
4313
4314                 if (copy_to_user(line, &new_line, size))
4315                         return -EFAULT;
4316                 return 0;
4317
4318         case IF_IFACE_SYNC_SERIAL: /* set sync_serial_settings */
4319
4320                 if(!capable(CAP_NET_ADMIN))
4321                         return -EPERM;
4322                 if (copy_from_user(&new_line, line, size))
4323                         return -EFAULT;
4324
4325                 switch (new_line.clock_type)
4326                 {
4327                 case CLOCK_EXT:      flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN; break;
4328                 case CLOCK_TXFROMRX: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN; break;
4329                 case CLOCK_INT:      flags = HDLC_FLAG_RXC_BRG    | HDLC_FLAG_TXC_BRG;    break;
4330                 case CLOCK_TXINT:    flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG;    break;
4331                 case CLOCK_DEFAULT:  flags = info->params.flags &
4332                                              (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
4333                                               HDLC_FLAG_RXC_BRG    | HDLC_FLAG_RXC_TXCPIN |
4334                                               HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
4335                                               HDLC_FLAG_TXC_BRG    | HDLC_FLAG_TXC_RXCPIN); break;
4336                 default: return -EINVAL;
4337                 }
4338
4339                 if (new_line.loopback != 0 && new_line.loopback != 1)
4340                         return -EINVAL;
4341
4342                 info->params.flags &= ~(HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
4343                                         HDLC_FLAG_RXC_BRG    | HDLC_FLAG_RXC_TXCPIN |
4344                                         HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
4345                                         HDLC_FLAG_TXC_BRG    | HDLC_FLAG_TXC_RXCPIN);
4346                 info->params.flags |= flags;
4347
4348                 info->params.loopback = new_line.loopback;
4349
4350                 if (flags & (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG))
4351                         info->params.clock_speed = new_line.clock_rate;
4352                 else
4353                         info->params.clock_speed = 0;
4354
4355                 /* if network interface up, reprogram hardware */
4356                 if (info->netcount)
4357                         mgslpc_program_hw(info);
4358                 return 0;
4359
4360         default:
4361                 return hdlc_ioctl(dev, ifr, cmd);
4362         }
4363 }
4364
4365 /**
4366  * called by network layer when transmit timeout is detected
4367  *
4368  * dev  pointer to network device structure
4369  */
4370 static void hdlcdev_tx_timeout(struct net_device *dev)
4371 {
4372         MGSLPC_INFO *info = dev_to_port(dev);
4373         unsigned long flags;
4374
4375         if (debug_level >= DEBUG_LEVEL_INFO)
4376                 printk("hdlcdev_tx_timeout(%s)\n",dev->name);
4377
4378         dev->stats.tx_errors++;
4379         dev->stats.tx_aborted_errors++;
4380
4381         spin_lock_irqsave(&info->lock,flags);
4382         tx_stop(info);
4383         spin_unlock_irqrestore(&info->lock,flags);
4384
4385         netif_wake_queue(dev);
4386 }
4387
4388 /**
4389  * called by device driver when transmit completes
4390  * reenable network layer transmit if stopped
4391  *
4392  * info  pointer to device instance information
4393  */
4394 static void hdlcdev_tx_done(MGSLPC_INFO *info)
4395 {
4396         if (netif_queue_stopped(info->netdev))
4397                 netif_wake_queue(info->netdev);
4398 }
4399
4400 /**
4401  * called by device driver when frame received
4402  * pass frame to network layer
4403  *
4404  * info  pointer to device instance information
4405  * buf   pointer to buffer contianing frame data
4406  * size  count of data bytes in buf
4407  */
4408 static void hdlcdev_rx(MGSLPC_INFO *info, char *buf, int size)
4409 {
4410         struct sk_buff *skb = dev_alloc_skb(size);
4411         struct net_device *dev = info->netdev;
4412
4413         if (debug_level >= DEBUG_LEVEL_INFO)
4414                 printk("hdlcdev_rx(%s)\n",dev->name);
4415
4416         if (skb == NULL) {
4417                 printk(KERN_NOTICE "%s: can't alloc skb, dropping packet\n", dev->name);
4418                 dev->stats.rx_dropped++;
4419                 return;
4420         }
4421
4422         memcpy(skb_put(skb, size), buf, size);
4423
4424         skb->protocol = hdlc_type_trans(skb, dev);
4425
4426         dev->stats.rx_packets++;
4427         dev->stats.rx_bytes += size;
4428
4429         netif_rx(skb);
4430
4431         dev->last_rx = jiffies;
4432 }
4433
4434 /**
4435  * called by device driver when adding device instance
4436  * do generic HDLC initialization
4437  *
4438  * info  pointer to device instance information
4439  *
4440  * returns 0 if success, otherwise error code
4441  */
4442 static int hdlcdev_init(MGSLPC_INFO *info)
4443 {
4444         int rc;
4445         struct net_device *dev;
4446         hdlc_device *hdlc;
4447
4448         /* allocate and initialize network and HDLC layer objects */
4449
4450         if (!(dev = alloc_hdlcdev(info))) {
4451                 printk(KERN_ERR "%s:hdlc device allocation failure\n",__FILE__);
4452                 return -ENOMEM;
4453         }
4454
4455         /* for network layer reporting purposes only */
4456         dev->base_addr = info->io_base;
4457         dev->irq       = info->irq_level;
4458
4459         /* network layer callbacks and settings */
4460         dev->do_ioctl       = hdlcdev_ioctl;
4461         dev->open           = hdlcdev_open;
4462         dev->stop           = hdlcdev_close;
4463         dev->tx_timeout     = hdlcdev_tx_timeout;
4464         dev->watchdog_timeo = 10*HZ;
4465         dev->tx_queue_len   = 50;
4466
4467         /* generic HDLC layer callbacks and settings */
4468         hdlc         = dev_to_hdlc(dev);
4469         hdlc->attach = hdlcdev_attach;
4470         hdlc->xmit   = hdlcdev_xmit;
4471
4472         /* register objects with HDLC layer */
4473         if ((rc = register_hdlc_device(dev))) {
4474                 printk(KERN_WARNING "%s:unable to register hdlc device\n",__FILE__);
4475                 free_netdev(dev);
4476                 return rc;
4477         }
4478
4479         info->netdev = dev;
4480         return 0;
4481 }
4482
4483 /**
4484  * called by device driver when removing device instance
4485  * do generic HDLC cleanup
4486  *
4487  * info  pointer to device instance information
4488  */
4489 static void hdlcdev_exit(MGSLPC_INFO *info)
4490 {
4491         unregister_hdlc_device(info->netdev);
4492         free_netdev(info->netdev);
4493         info->netdev = NULL;
4494 }
4495
4496 #endif /* CONFIG_HDLC */
4497