2 * libata-core.c - helper library for ATA
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
8 * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2004 Jeff Garzik
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
35 #include <linux/kernel.h>
36 #include <linux/module.h>
37 #include <linux/pci.h>
38 #include <linux/init.h>
39 #include <linux/list.h>
41 #include <linux/highmem.h>
42 #include <linux/spinlock.h>
43 #include <linux/blkdev.h>
44 #include <linux/delay.h>
45 #include <linux/timer.h>
46 #include <linux/interrupt.h>
47 #include <linux/completion.h>
48 #include <linux/suspend.h>
49 #include <linux/workqueue.h>
50 #include <linux/jiffies.h>
51 #include <linux/scatterlist.h>
52 #include <scsi/scsi.h>
53 #include <scsi/scsi_cmnd.h>
54 #include <scsi/scsi_host.h>
55 #include <linux/libata.h>
57 #include <asm/semaphore.h>
58 #include <asm/byteorder.h>
62 /* debounce timing parameters in msecs { interval, duration, timeout } */
63 const unsigned long sata_deb_timing_normal[] = { 5, 100, 2000 };
64 const unsigned long sata_deb_timing_hotplug[] = { 25, 500, 2000 };
65 const unsigned long sata_deb_timing_long[] = { 100, 2000, 5000 };
67 static unsigned int ata_dev_init_params(struct ata_device *dev,
68 u16 heads, u16 sectors);
69 static unsigned int ata_dev_set_xfermode(struct ata_device *dev);
70 static void ata_dev_xfermask(struct ata_device *dev);
72 static unsigned int ata_unique_id = 1;
73 static struct workqueue_struct *ata_wq;
75 struct workqueue_struct *ata_aux_wq;
77 int atapi_enabled = 1;
78 module_param(atapi_enabled, int, 0444);
79 MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)");
82 module_param(atapi_dmadir, int, 0444);
83 MODULE_PARM_DESC(atapi_dmadir, "Enable ATAPI DMADIR bridge support (0=off, 1=on)");
86 module_param_named(fua, libata_fua, int, 0444);
87 MODULE_PARM_DESC(fua, "FUA support (0=off, 1=on)");
89 static int ata_probe_timeout = ATA_TMOUT_INTERNAL / HZ;
90 module_param(ata_probe_timeout, int, 0444);
91 MODULE_PARM_DESC(ata_probe_timeout, "Set ATA probing timeout (seconds)");
93 MODULE_AUTHOR("Jeff Garzik");
94 MODULE_DESCRIPTION("Library module for ATA devices");
95 MODULE_LICENSE("GPL");
96 MODULE_VERSION(DRV_VERSION);
100 * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure
101 * @tf: Taskfile to convert
102 * @fis: Buffer into which data will output
103 * @pmp: Port multiplier port
105 * Converts a standard ATA taskfile to a Serial ATA
106 * FIS structure (Register - Host to Device).
109 * Inherited from caller.
112 void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp)
114 fis[0] = 0x27; /* Register - Host to Device FIS */
115 fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number,
116 bit 7 indicates Command FIS */
117 fis[2] = tf->command;
118 fis[3] = tf->feature;
125 fis[8] = tf->hob_lbal;
126 fis[9] = tf->hob_lbam;
127 fis[10] = tf->hob_lbah;
128 fis[11] = tf->hob_feature;
131 fis[13] = tf->hob_nsect;
142 * ata_tf_from_fis - Convert SATA FIS to ATA taskfile
143 * @fis: Buffer from which data will be input
144 * @tf: Taskfile to output
146 * Converts a serial ATA FIS structure to a standard ATA taskfile.
149 * Inherited from caller.
152 void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf)
154 tf->command = fis[2]; /* status */
155 tf->feature = fis[3]; /* error */
162 tf->hob_lbal = fis[8];
163 tf->hob_lbam = fis[9];
164 tf->hob_lbah = fis[10];
167 tf->hob_nsect = fis[13];
170 static const u8 ata_rw_cmds[] = {
174 ATA_CMD_READ_MULTI_EXT,
175 ATA_CMD_WRITE_MULTI_EXT,
179 ATA_CMD_WRITE_MULTI_FUA_EXT,
183 ATA_CMD_PIO_READ_EXT,
184 ATA_CMD_PIO_WRITE_EXT,
197 ATA_CMD_WRITE_FUA_EXT
201 * ata_rwcmd_protocol - set taskfile r/w commands and protocol
202 * @qc: command to examine and configure
204 * Examine the device configuration and tf->flags to calculate
205 * the proper read/write commands and protocol to use.
210 int ata_rwcmd_protocol(struct ata_queued_cmd *qc)
212 struct ata_taskfile *tf = &qc->tf;
213 struct ata_device *dev = qc->dev;
216 int index, fua, lba48, write;
218 fua = (tf->flags & ATA_TFLAG_FUA) ? 4 : 0;
219 lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0;
220 write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0;
222 if (dev->flags & ATA_DFLAG_PIO) {
223 tf->protocol = ATA_PROT_PIO;
224 index = dev->multi_count ? 0 : 8;
225 } else if (lba48 && (qc->ap->flags & ATA_FLAG_PIO_LBA48)) {
226 /* Unable to use DMA due to host limitation */
227 tf->protocol = ATA_PROT_PIO;
228 index = dev->multi_count ? 0 : 8;
230 tf->protocol = ATA_PROT_DMA;
234 cmd = ata_rw_cmds[index + fua + lba48 + write];
243 * ata_pack_xfermask - Pack pio, mwdma and udma masks into xfer_mask
244 * @pio_mask: pio_mask
245 * @mwdma_mask: mwdma_mask
246 * @udma_mask: udma_mask
248 * Pack @pio_mask, @mwdma_mask and @udma_mask into a single
249 * unsigned int xfer_mask.
257 static unsigned int ata_pack_xfermask(unsigned int pio_mask,
258 unsigned int mwdma_mask,
259 unsigned int udma_mask)
261 return ((pio_mask << ATA_SHIFT_PIO) & ATA_MASK_PIO) |
262 ((mwdma_mask << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA) |
263 ((udma_mask << ATA_SHIFT_UDMA) & ATA_MASK_UDMA);
267 * ata_unpack_xfermask - Unpack xfer_mask into pio, mwdma and udma masks
268 * @xfer_mask: xfer_mask to unpack
269 * @pio_mask: resulting pio_mask
270 * @mwdma_mask: resulting mwdma_mask
271 * @udma_mask: resulting udma_mask
273 * Unpack @xfer_mask into @pio_mask, @mwdma_mask and @udma_mask.
274 * Any NULL distination masks will be ignored.
276 static void ata_unpack_xfermask(unsigned int xfer_mask,
277 unsigned int *pio_mask,
278 unsigned int *mwdma_mask,
279 unsigned int *udma_mask)
282 *pio_mask = (xfer_mask & ATA_MASK_PIO) >> ATA_SHIFT_PIO;
284 *mwdma_mask = (xfer_mask & ATA_MASK_MWDMA) >> ATA_SHIFT_MWDMA;
286 *udma_mask = (xfer_mask & ATA_MASK_UDMA) >> ATA_SHIFT_UDMA;
289 static const struct ata_xfer_ent {
293 { ATA_SHIFT_PIO, ATA_BITS_PIO, XFER_PIO_0 },
294 { ATA_SHIFT_MWDMA, ATA_BITS_MWDMA, XFER_MW_DMA_0 },
295 { ATA_SHIFT_UDMA, ATA_BITS_UDMA, XFER_UDMA_0 },
300 * ata_xfer_mask2mode - Find matching XFER_* for the given xfer_mask
301 * @xfer_mask: xfer_mask of interest
303 * Return matching XFER_* value for @xfer_mask. Only the highest
304 * bit of @xfer_mask is considered.
310 * Matching XFER_* value, 0 if no match found.
312 static u8 ata_xfer_mask2mode(unsigned int xfer_mask)
314 int highbit = fls(xfer_mask) - 1;
315 const struct ata_xfer_ent *ent;
317 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
318 if (highbit >= ent->shift && highbit < ent->shift + ent->bits)
319 return ent->base + highbit - ent->shift;
324 * ata_xfer_mode2mask - Find matching xfer_mask for XFER_*
325 * @xfer_mode: XFER_* of interest
327 * Return matching xfer_mask for @xfer_mode.
333 * Matching xfer_mask, 0 if no match found.
335 static unsigned int ata_xfer_mode2mask(u8 xfer_mode)
337 const struct ata_xfer_ent *ent;
339 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
340 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
341 return 1 << (ent->shift + xfer_mode - ent->base);
346 * ata_xfer_mode2shift - Find matching xfer_shift for XFER_*
347 * @xfer_mode: XFER_* of interest
349 * Return matching xfer_shift for @xfer_mode.
355 * Matching xfer_shift, -1 if no match found.
357 static int ata_xfer_mode2shift(unsigned int xfer_mode)
359 const struct ata_xfer_ent *ent;
361 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
362 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
368 * ata_mode_string - convert xfer_mask to string
369 * @xfer_mask: mask of bits supported; only highest bit counts.
371 * Determine string which represents the highest speed
372 * (highest bit in @modemask).
378 * Constant C string representing highest speed listed in
379 * @mode_mask, or the constant C string "<n/a>".
381 static const char *ata_mode_string(unsigned int xfer_mask)
383 static const char * const xfer_mode_str[] = {
407 highbit = fls(xfer_mask) - 1;
408 if (highbit >= 0 && highbit < ARRAY_SIZE(xfer_mode_str))
409 return xfer_mode_str[highbit];
413 static const char *sata_spd_string(unsigned int spd)
415 static const char * const spd_str[] = {
420 if (spd == 0 || (spd - 1) >= ARRAY_SIZE(spd_str))
422 return spd_str[spd - 1];
425 void ata_dev_disable(struct ata_device *dev)
427 if (ata_dev_enabled(dev) && ata_msg_drv(dev->ap)) {
428 ata_dev_printk(dev, KERN_WARNING, "disabled\n");
434 * ata_pio_devchk - PATA device presence detection
435 * @ap: ATA channel to examine
436 * @device: Device to examine (starting at zero)
438 * This technique was originally described in
439 * Hale Landis's ATADRVR (www.ata-atapi.com), and
440 * later found its way into the ATA/ATAPI spec.
442 * Write a pattern to the ATA shadow registers,
443 * and if a device is present, it will respond by
444 * correctly storing and echoing back the
445 * ATA shadow register contents.
451 static unsigned int ata_pio_devchk(struct ata_port *ap,
454 struct ata_ioports *ioaddr = &ap->ioaddr;
457 ap->ops->dev_select(ap, device);
459 outb(0x55, ioaddr->nsect_addr);
460 outb(0xaa, ioaddr->lbal_addr);
462 outb(0xaa, ioaddr->nsect_addr);
463 outb(0x55, ioaddr->lbal_addr);
465 outb(0x55, ioaddr->nsect_addr);
466 outb(0xaa, ioaddr->lbal_addr);
468 nsect = inb(ioaddr->nsect_addr);
469 lbal = inb(ioaddr->lbal_addr);
471 if ((nsect == 0x55) && (lbal == 0xaa))
472 return 1; /* we found a device */
474 return 0; /* nothing found */
478 * ata_mmio_devchk - PATA device presence detection
479 * @ap: ATA channel to examine
480 * @device: Device to examine (starting at zero)
482 * This technique was originally described in
483 * Hale Landis's ATADRVR (www.ata-atapi.com), and
484 * later found its way into the ATA/ATAPI spec.
486 * Write a pattern to the ATA shadow registers,
487 * and if a device is present, it will respond by
488 * correctly storing and echoing back the
489 * ATA shadow register contents.
495 static unsigned int ata_mmio_devchk(struct ata_port *ap,
498 struct ata_ioports *ioaddr = &ap->ioaddr;
501 ap->ops->dev_select(ap, device);
503 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
504 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
506 writeb(0xaa, (void __iomem *) ioaddr->nsect_addr);
507 writeb(0x55, (void __iomem *) ioaddr->lbal_addr);
509 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
510 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
512 nsect = readb((void __iomem *) ioaddr->nsect_addr);
513 lbal = readb((void __iomem *) ioaddr->lbal_addr);
515 if ((nsect == 0x55) && (lbal == 0xaa))
516 return 1; /* we found a device */
518 return 0; /* nothing found */
522 * ata_devchk - PATA device presence detection
523 * @ap: ATA channel to examine
524 * @device: Device to examine (starting at zero)
526 * Dispatch ATA device presence detection, depending
527 * on whether we are using PIO or MMIO to talk to the
528 * ATA shadow registers.
534 static unsigned int ata_devchk(struct ata_port *ap,
537 if (ap->flags & ATA_FLAG_MMIO)
538 return ata_mmio_devchk(ap, device);
539 return ata_pio_devchk(ap, device);
543 * ata_dev_classify - determine device type based on ATA-spec signature
544 * @tf: ATA taskfile register set for device to be identified
546 * Determine from taskfile register contents whether a device is
547 * ATA or ATAPI, as per "Signature and persistence" section
548 * of ATA/PI spec (volume 1, sect 5.14).
554 * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, or %ATA_DEV_UNKNOWN
555 * the event of failure.
558 unsigned int ata_dev_classify(const struct ata_taskfile *tf)
560 /* Apple's open source Darwin code hints that some devices only
561 * put a proper signature into the LBA mid/high registers,
562 * So, we only check those. It's sufficient for uniqueness.
565 if (((tf->lbam == 0) && (tf->lbah == 0)) ||
566 ((tf->lbam == 0x3c) && (tf->lbah == 0xc3))) {
567 DPRINTK("found ATA device by sig\n");
571 if (((tf->lbam == 0x14) && (tf->lbah == 0xeb)) ||
572 ((tf->lbam == 0x69) && (tf->lbah == 0x96))) {
573 DPRINTK("found ATAPI device by sig\n");
574 return ATA_DEV_ATAPI;
577 DPRINTK("unknown device\n");
578 return ATA_DEV_UNKNOWN;
582 * ata_dev_try_classify - Parse returned ATA device signature
583 * @ap: ATA channel to examine
584 * @device: Device to examine (starting at zero)
585 * @r_err: Value of error register on completion
587 * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
588 * an ATA/ATAPI-defined set of values is placed in the ATA
589 * shadow registers, indicating the results of device detection
592 * Select the ATA device, and read the values from the ATA shadow
593 * registers. Then parse according to the Error register value,
594 * and the spec-defined values examined by ata_dev_classify().
600 * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE.
604 ata_dev_try_classify(struct ata_port *ap, unsigned int device, u8 *r_err)
606 struct ata_taskfile tf;
610 ap->ops->dev_select(ap, device);
612 memset(&tf, 0, sizeof(tf));
614 ap->ops->tf_read(ap, &tf);
619 /* see if device passed diags: if master then continue and warn later */
620 if (err == 0 && device == 0)
621 /* diagnostic fail : do nothing _YET_ */
622 ap->device[device].horkage |= ATA_HORKAGE_DIAGNOSTIC;
625 else if ((device == 0) && (err == 0x81))
630 /* determine if device is ATA or ATAPI */
631 class = ata_dev_classify(&tf);
633 if (class == ATA_DEV_UNKNOWN)
635 if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0))
641 * ata_id_string - Convert IDENTIFY DEVICE page into string
642 * @id: IDENTIFY DEVICE results we will examine
643 * @s: string into which data is output
644 * @ofs: offset into identify device page
645 * @len: length of string to return. must be an even number.
647 * The strings in the IDENTIFY DEVICE page are broken up into
648 * 16-bit chunks. Run through the string, and output each
649 * 8-bit chunk linearly, regardless of platform.
655 void ata_id_string(const u16 *id, unsigned char *s,
656 unsigned int ofs, unsigned int len)
675 * ata_id_c_string - Convert IDENTIFY DEVICE page into C string
676 * @id: IDENTIFY DEVICE results we will examine
677 * @s: string into which data is output
678 * @ofs: offset into identify device page
679 * @len: length of string to return. must be an odd number.
681 * This function is identical to ata_id_string except that it
682 * trims trailing spaces and terminates the resulting string with
683 * null. @len must be actual maximum length (even number) + 1.
688 void ata_id_c_string(const u16 *id, unsigned char *s,
689 unsigned int ofs, unsigned int len)
695 ata_id_string(id, s, ofs, len - 1);
697 p = s + strnlen(s, len - 1);
698 while (p > s && p[-1] == ' ')
703 static u64 ata_id_n_sectors(const u16 *id)
705 if (ata_id_has_lba(id)) {
706 if (ata_id_has_lba48(id))
707 return ata_id_u64(id, 100);
709 return ata_id_u32(id, 60);
711 if (ata_id_current_chs_valid(id))
712 return ata_id_u32(id, 57);
714 return id[1] * id[3] * id[6];
719 * ata_noop_dev_select - Select device 0/1 on ATA bus
720 * @ap: ATA channel to manipulate
721 * @device: ATA device (numbered from zero) to select
723 * This function performs no actual function.
725 * May be used as the dev_select() entry in ata_port_operations.
730 void ata_noop_dev_select (struct ata_port *ap, unsigned int device)
736 * ata_std_dev_select - Select device 0/1 on ATA bus
737 * @ap: ATA channel to manipulate
738 * @device: ATA device (numbered from zero) to select
740 * Use the method defined in the ATA specification to
741 * make either device 0, or device 1, active on the
742 * ATA channel. Works with both PIO and MMIO.
744 * May be used as the dev_select() entry in ata_port_operations.
750 void ata_std_dev_select (struct ata_port *ap, unsigned int device)
755 tmp = ATA_DEVICE_OBS;
757 tmp = ATA_DEVICE_OBS | ATA_DEV1;
759 if (ap->flags & ATA_FLAG_MMIO) {
760 writeb(tmp, (void __iomem *) ap->ioaddr.device_addr);
762 outb(tmp, ap->ioaddr.device_addr);
764 ata_pause(ap); /* needed; also flushes, for mmio */
768 * ata_dev_select - Select device 0/1 on ATA bus
769 * @ap: ATA channel to manipulate
770 * @device: ATA device (numbered from zero) to select
771 * @wait: non-zero to wait for Status register BSY bit to clear
772 * @can_sleep: non-zero if context allows sleeping
774 * Use the method defined in the ATA specification to
775 * make either device 0, or device 1, active on the
778 * This is a high-level version of ata_std_dev_select(),
779 * which additionally provides the services of inserting
780 * the proper pauses and status polling, where needed.
786 void ata_dev_select(struct ata_port *ap, unsigned int device,
787 unsigned int wait, unsigned int can_sleep)
789 if (ata_msg_probe(ap))
790 ata_port_printk(ap, KERN_INFO, "ata_dev_select: ENTER, ata%u: "
791 "device %u, wait %u\n", ap->id, device, wait);
796 ap->ops->dev_select(ap, device);
799 if (can_sleep && ap->device[device].class == ATA_DEV_ATAPI)
806 * ata_dump_id - IDENTIFY DEVICE info debugging output
807 * @id: IDENTIFY DEVICE page to dump
809 * Dump selected 16-bit words from the given IDENTIFY DEVICE
816 static inline void ata_dump_id(const u16 *id)
818 DPRINTK("49==0x%04x "
828 DPRINTK("80==0x%04x "
838 DPRINTK("88==0x%04x "
845 * ata_id_xfermask - Compute xfermask from the given IDENTIFY data
846 * @id: IDENTIFY data to compute xfer mask from
848 * Compute the xfermask for this device. This is not as trivial
849 * as it seems if we must consider early devices correctly.
851 * FIXME: pre IDE drive timing (do we care ?).
859 static unsigned int ata_id_xfermask(const u16 *id)
861 unsigned int pio_mask, mwdma_mask, udma_mask;
863 /* Usual case. Word 53 indicates word 64 is valid */
864 if (id[ATA_ID_FIELD_VALID] & (1 << 1)) {
865 pio_mask = id[ATA_ID_PIO_MODES] & 0x03;
869 /* If word 64 isn't valid then Word 51 high byte holds
870 * the PIO timing number for the maximum. Turn it into
873 u8 mode = id[ATA_ID_OLD_PIO_MODES] & 0xFF;
874 if (mode < 5) /* Valid PIO range */
875 pio_mask = (2 << mode) - 1;
879 /* But wait.. there's more. Design your standards by
880 * committee and you too can get a free iordy field to
881 * process. However its the speeds not the modes that
882 * are supported... Note drivers using the timing API
883 * will get this right anyway
887 mwdma_mask = id[ATA_ID_MWDMA_MODES] & 0x07;
889 if (ata_id_is_cfa(id)) {
891 * Process compact flash extended modes
893 int pio = id[163] & 0x7;
894 int dma = (id[163] >> 3) & 7;
897 pio_mask |= (1 << 5);
899 pio_mask |= (1 << 6);
901 mwdma_mask |= (1 << 3);
903 mwdma_mask |= (1 << 4);
907 if (id[ATA_ID_FIELD_VALID] & (1 << 2))
908 udma_mask = id[ATA_ID_UDMA_MODES] & 0xff;
910 return ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask);
914 * ata_port_queue_task - Queue port_task
915 * @ap: The ata_port to queue port_task for
916 * @fn: workqueue function to be scheduled
917 * @data: data value to pass to workqueue function
918 * @delay: delay time for workqueue function
920 * Schedule @fn(@data) for execution after @delay jiffies using
921 * port_task. There is one port_task per port and it's the
922 * user(low level driver)'s responsibility to make sure that only
923 * one task is active at any given time.
925 * libata core layer takes care of synchronization between
926 * port_task and EH. ata_port_queue_task() may be ignored for EH
930 * Inherited from caller.
932 void ata_port_queue_task(struct ata_port *ap, void (*fn)(void *), void *data,
937 if (ap->pflags & ATA_PFLAG_FLUSH_PORT_TASK)
940 PREPARE_WORK(&ap->port_task, fn, data);
943 rc = queue_work(ata_wq, &ap->port_task);
945 rc = queue_delayed_work(ata_wq, &ap->port_task, delay);
947 /* rc == 0 means that another user is using port task */
952 * ata_port_flush_task - Flush port_task
953 * @ap: The ata_port to flush port_task for
955 * After this function completes, port_task is guranteed not to
956 * be running or scheduled.
959 * Kernel thread context (may sleep)
961 void ata_port_flush_task(struct ata_port *ap)
967 spin_lock_irqsave(ap->lock, flags);
968 ap->pflags |= ATA_PFLAG_FLUSH_PORT_TASK;
969 spin_unlock_irqrestore(ap->lock, flags);
971 DPRINTK("flush #1\n");
972 flush_workqueue(ata_wq);
975 * At this point, if a task is running, it's guaranteed to see
976 * the FLUSH flag; thus, it will never queue pio tasks again.
979 if (!cancel_delayed_work(&ap->port_task)) {
981 ata_port_printk(ap, KERN_DEBUG, "%s: flush #2\n",
983 flush_workqueue(ata_wq);
986 spin_lock_irqsave(ap->lock, flags);
987 ap->pflags &= ~ATA_PFLAG_FLUSH_PORT_TASK;
988 spin_unlock_irqrestore(ap->lock, flags);
991 ata_port_printk(ap, KERN_DEBUG, "%s: EXIT\n", __FUNCTION__);
994 void ata_qc_complete_internal(struct ata_queued_cmd *qc)
996 struct completion *waiting = qc->private_data;
1002 * ata_exec_internal - execute libata internal command
1003 * @dev: Device to which the command is sent
1004 * @tf: Taskfile registers for the command and the result
1005 * @cdb: CDB for packet command
1006 * @dma_dir: Data tranfer direction of the command
1007 * @buf: Data buffer of the command
1008 * @buflen: Length of data buffer
1010 * Executes libata internal command with timeout. @tf contains
1011 * command on entry and result on return. Timeout and error
1012 * conditions are reported via return value. No recovery action
1013 * is taken after a command times out. It's caller's duty to
1014 * clean up after timeout.
1017 * None. Should be called with kernel context, might sleep.
1020 * Zero on success, AC_ERR_* mask on failure
1022 unsigned ata_exec_internal(struct ata_device *dev,
1023 struct ata_taskfile *tf, const u8 *cdb,
1024 int dma_dir, void *buf, unsigned int buflen)
1026 struct ata_port *ap = dev->ap;
1027 u8 command = tf->command;
1028 struct ata_queued_cmd *qc;
1029 unsigned int tag, preempted_tag;
1030 u32 preempted_sactive, preempted_qc_active;
1031 DECLARE_COMPLETION_ONSTACK(wait);
1032 unsigned long flags;
1033 unsigned int err_mask;
1036 spin_lock_irqsave(ap->lock, flags);
1038 /* no internal command while frozen */
1039 if (ap->pflags & ATA_PFLAG_FROZEN) {
1040 spin_unlock_irqrestore(ap->lock, flags);
1041 return AC_ERR_SYSTEM;
1044 /* initialize internal qc */
1046 /* XXX: Tag 0 is used for drivers with legacy EH as some
1047 * drivers choke if any other tag is given. This breaks
1048 * ata_tag_internal() test for those drivers. Don't use new
1049 * EH stuff without converting to it.
1051 if (ap->ops->error_handler)
1052 tag = ATA_TAG_INTERNAL;
1056 if (test_and_set_bit(tag, &ap->qc_allocated))
1058 qc = __ata_qc_from_tag(ap, tag);
1066 preempted_tag = ap->active_tag;
1067 preempted_sactive = ap->sactive;
1068 preempted_qc_active = ap->qc_active;
1069 ap->active_tag = ATA_TAG_POISON;
1073 /* prepare & issue qc */
1076 memcpy(qc->cdb, cdb, ATAPI_CDB_LEN);
1077 qc->flags |= ATA_QCFLAG_RESULT_TF;
1078 qc->dma_dir = dma_dir;
1079 if (dma_dir != DMA_NONE) {
1080 ata_sg_init_one(qc, buf, buflen);
1081 qc->nsect = buflen / ATA_SECT_SIZE;
1084 qc->private_data = &wait;
1085 qc->complete_fn = ata_qc_complete_internal;
1089 spin_unlock_irqrestore(ap->lock, flags);
1091 rc = wait_for_completion_timeout(&wait, ata_probe_timeout);
1093 ata_port_flush_task(ap);
1096 spin_lock_irqsave(ap->lock, flags);
1098 /* We're racing with irq here. If we lose, the
1099 * following test prevents us from completing the qc
1100 * twice. If we win, the port is frozen and will be
1101 * cleaned up by ->post_internal_cmd().
1103 if (qc->flags & ATA_QCFLAG_ACTIVE) {
1104 qc->err_mask |= AC_ERR_TIMEOUT;
1106 if (ap->ops->error_handler)
1107 ata_port_freeze(ap);
1109 ata_qc_complete(qc);
1111 if (ata_msg_warn(ap))
1112 ata_dev_printk(dev, KERN_WARNING,
1113 "qc timeout (cmd 0x%x)\n", command);
1116 spin_unlock_irqrestore(ap->lock, flags);
1119 /* do post_internal_cmd */
1120 if (ap->ops->post_internal_cmd)
1121 ap->ops->post_internal_cmd(qc);
1123 if (qc->flags & ATA_QCFLAG_FAILED && !qc->err_mask) {
1124 if (ata_msg_warn(ap))
1125 ata_dev_printk(dev, KERN_WARNING,
1126 "zero err_mask for failed "
1127 "internal command, assuming AC_ERR_OTHER\n");
1128 qc->err_mask |= AC_ERR_OTHER;
1132 spin_lock_irqsave(ap->lock, flags);
1134 *tf = qc->result_tf;
1135 err_mask = qc->err_mask;
1138 ap->active_tag = preempted_tag;
1139 ap->sactive = preempted_sactive;
1140 ap->qc_active = preempted_qc_active;
1142 /* XXX - Some LLDDs (sata_mv) disable port on command failure.
1143 * Until those drivers are fixed, we detect the condition
1144 * here, fail the command with AC_ERR_SYSTEM and reenable the
1147 * Note that this doesn't change any behavior as internal
1148 * command failure results in disabling the device in the
1149 * higher layer for LLDDs without new reset/EH callbacks.
1151 * Kill the following code as soon as those drivers are fixed.
1153 if (ap->flags & ATA_FLAG_DISABLED) {
1154 err_mask |= AC_ERR_SYSTEM;
1158 spin_unlock_irqrestore(ap->lock, flags);
1164 * ata_do_simple_cmd - execute simple internal command
1165 * @dev: Device to which the command is sent
1166 * @cmd: Opcode to execute
1168 * Execute a 'simple' command, that only consists of the opcode
1169 * 'cmd' itself, without filling any other registers
1172 * Kernel thread context (may sleep).
1175 * Zero on success, AC_ERR_* mask on failure
1177 unsigned int ata_do_simple_cmd(struct ata_device *dev, u8 cmd)
1179 struct ata_taskfile tf;
1181 ata_tf_init(dev, &tf);
1184 tf.flags |= ATA_TFLAG_DEVICE;
1185 tf.protocol = ATA_PROT_NODATA;
1187 return ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
1191 * ata_pio_need_iordy - check if iordy needed
1194 * Check if the current speed of the device requires IORDY. Used
1195 * by various controllers for chip configuration.
1198 unsigned int ata_pio_need_iordy(const struct ata_device *adev)
1201 int speed = adev->pio_mode - XFER_PIO_0;
1208 /* If we have no drive specific rule, then PIO 2 is non IORDY */
1210 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE */
1211 pio = adev->id[ATA_ID_EIDE_PIO];
1212 /* Is the speed faster than the drive allows non IORDY ? */
1214 /* This is cycle times not frequency - watch the logic! */
1215 if (pio > 240) /* PIO2 is 240nS per cycle */
1224 * ata_dev_read_id - Read ID data from the specified device
1225 * @dev: target device
1226 * @p_class: pointer to class of the target device (may be changed)
1227 * @post_reset: is this read ID post-reset?
1228 * @id: buffer to read IDENTIFY data into
1230 * Read ID data from the specified device. ATA_CMD_ID_ATA is
1231 * performed on ATA devices and ATA_CMD_ID_ATAPI on ATAPI
1232 * devices. This function also issues ATA_CMD_INIT_DEV_PARAMS
1233 * for pre-ATA4 drives.
1236 * Kernel thread context (may sleep)
1239 * 0 on success, -errno otherwise.
1241 int ata_dev_read_id(struct ata_device *dev, unsigned int *p_class,
1242 int post_reset, u16 *id)
1244 struct ata_port *ap = dev->ap;
1245 unsigned int class = *p_class;
1246 struct ata_taskfile tf;
1247 unsigned int err_mask = 0;
1251 if (ata_msg_ctl(ap))
1252 ata_dev_printk(dev, KERN_DEBUG, "%s: ENTER, host %u, dev %u\n",
1253 __FUNCTION__, ap->id, dev->devno);
1255 ata_dev_select(ap, dev->devno, 1, 1); /* select device 0/1 */
1258 ata_tf_init(dev, &tf);
1262 tf.command = ATA_CMD_ID_ATA;
1265 tf.command = ATA_CMD_ID_ATAPI;
1269 reason = "unsupported class";
1273 tf.protocol = ATA_PROT_PIO;
1275 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_FROM_DEVICE,
1276 id, sizeof(id[0]) * ATA_ID_WORDS);
1279 reason = "I/O error";
1283 swap_buf_le16(id, ATA_ID_WORDS);
1287 reason = "device reports illegal type";
1289 if (class == ATA_DEV_ATA) {
1290 if (!ata_id_is_ata(id) && !ata_id_is_cfa(id))
1293 if (ata_id_is_ata(id))
1297 if (post_reset && class == ATA_DEV_ATA) {
1299 * The exact sequence expected by certain pre-ATA4 drives is:
1302 * INITIALIZE DEVICE PARAMETERS
1304 * Some drives were very specific about that exact sequence.
1306 if (ata_id_major_version(id) < 4 || !ata_id_has_lba(id)) {
1307 err_mask = ata_dev_init_params(dev, id[3], id[6]);
1310 reason = "INIT_DEV_PARAMS failed";
1314 /* current CHS translation info (id[53-58]) might be
1315 * changed. reread the identify device info.
1327 if (ata_msg_warn(ap))
1328 ata_dev_printk(dev, KERN_WARNING, "failed to IDENTIFY "
1329 "(%s, err_mask=0x%x)\n", reason, err_mask);
1333 static inline u8 ata_dev_knobble(struct ata_device *dev)
1335 return ((dev->ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(dev->id)));
1338 static void ata_dev_config_ncq(struct ata_device *dev,
1339 char *desc, size_t desc_sz)
1341 struct ata_port *ap = dev->ap;
1342 int hdepth = 0, ddepth = ata_id_queue_depth(dev->id);
1344 if (!ata_id_has_ncq(dev->id)) {
1349 if (ap->flags & ATA_FLAG_NCQ) {
1350 hdepth = min(ap->scsi_host->can_queue, ATA_MAX_QUEUE - 1);
1351 dev->flags |= ATA_DFLAG_NCQ;
1354 if (hdepth >= ddepth)
1355 snprintf(desc, desc_sz, "NCQ (depth %d)", ddepth);
1357 snprintf(desc, desc_sz, "NCQ (depth %d/%d)", hdepth, ddepth);
1360 static void ata_set_port_max_cmd_len(struct ata_port *ap)
1364 if (ap->scsi_host) {
1365 unsigned int len = 0;
1367 for (i = 0; i < ATA_MAX_DEVICES; i++)
1368 len = max(len, ap->device[i].cdb_len);
1370 ap->scsi_host->max_cmd_len = len;
1375 * ata_dev_configure - Configure the specified ATA/ATAPI device
1376 * @dev: Target device to configure
1377 * @print_info: Enable device info printout
1379 * Configure @dev according to @dev->id. Generic and low-level
1380 * driver specific fixups are also applied.
1383 * Kernel thread context (may sleep)
1386 * 0 on success, -errno otherwise
1388 int ata_dev_configure(struct ata_device *dev, int print_info)
1390 struct ata_port *ap = dev->ap;
1391 const u16 *id = dev->id;
1392 unsigned int xfer_mask;
1393 char revbuf[7]; /* XYZ-99\0 */
1396 if (!ata_dev_enabled(dev) && ata_msg_info(ap)) {
1397 ata_dev_printk(dev, KERN_INFO,
1398 "%s: ENTER/EXIT (host %u, dev %u) -- nodev\n",
1399 __FUNCTION__, ap->id, dev->devno);
1403 if (ata_msg_probe(ap))
1404 ata_dev_printk(dev, KERN_DEBUG, "%s: ENTER, host %u, dev %u\n",
1405 __FUNCTION__, ap->id, dev->devno);
1407 /* print device capabilities */
1408 if (ata_msg_probe(ap))
1409 ata_dev_printk(dev, KERN_DEBUG,
1410 "%s: cfg 49:%04x 82:%04x 83:%04x 84:%04x "
1411 "85:%04x 86:%04x 87:%04x 88:%04x\n",
1413 id[49], id[82], id[83], id[84],
1414 id[85], id[86], id[87], id[88]);
1416 /* initialize to-be-configured parameters */
1417 dev->flags &= ~ATA_DFLAG_CFG_MASK;
1418 dev->max_sectors = 0;
1426 * common ATA, ATAPI feature tests
1429 /* find max transfer mode; for printk only */
1430 xfer_mask = ata_id_xfermask(id);
1432 if (ata_msg_probe(ap))
1435 /* ATA-specific feature tests */
1436 if (dev->class == ATA_DEV_ATA) {
1437 if (ata_id_is_cfa(id)) {
1438 if (id[162] & 1) /* CPRM may make this media unusable */
1439 ata_dev_printk(dev, KERN_WARNING, "ata%u: device %u supports DRM functions and may not be fully accessable.\n",
1440 ap->id, dev->devno);
1441 snprintf(revbuf, 7, "CFA");
1444 snprintf(revbuf, 7, "ATA-%d", ata_id_major_version(id));
1446 dev->n_sectors = ata_id_n_sectors(id);
1448 if (ata_id_has_lba(id)) {
1449 const char *lba_desc;
1453 dev->flags |= ATA_DFLAG_LBA;
1454 if (ata_id_has_lba48(id)) {
1455 dev->flags |= ATA_DFLAG_LBA48;
1460 ata_dev_config_ncq(dev, ncq_desc, sizeof(ncq_desc));
1462 /* print device info to dmesg */
1463 if (ata_msg_drv(ap) && print_info)
1464 ata_dev_printk(dev, KERN_INFO, "%s, "
1465 "max %s, %Lu sectors: %s %s\n",
1467 ata_mode_string(xfer_mask),
1468 (unsigned long long)dev->n_sectors,
1469 lba_desc, ncq_desc);
1473 /* Default translation */
1474 dev->cylinders = id[1];
1476 dev->sectors = id[6];
1478 if (ata_id_current_chs_valid(id)) {
1479 /* Current CHS translation is valid. */
1480 dev->cylinders = id[54];
1481 dev->heads = id[55];
1482 dev->sectors = id[56];
1485 /* print device info to dmesg */
1486 if (ata_msg_drv(ap) && print_info)
1487 ata_dev_printk(dev, KERN_INFO, "%s, "
1488 "max %s, %Lu sectors: CHS %u/%u/%u\n",
1490 ata_mode_string(xfer_mask),
1491 (unsigned long long)dev->n_sectors,
1492 dev->cylinders, dev->heads,
1496 if (dev->id[59] & 0x100) {
1497 dev->multi_count = dev->id[59] & 0xff;
1498 if (ata_msg_drv(ap) && print_info)
1499 ata_dev_printk(dev, KERN_INFO,
1500 "ata%u: dev %u multi count %u\n",
1501 ap->id, dev->devno, dev->multi_count);
1507 /* ATAPI-specific feature tests */
1508 else if (dev->class == ATA_DEV_ATAPI) {
1509 char *cdb_intr_string = "";
1511 rc = atapi_cdb_len(id);
1512 if ((rc < 12) || (rc > ATAPI_CDB_LEN)) {
1513 if (ata_msg_warn(ap))
1514 ata_dev_printk(dev, KERN_WARNING,
1515 "unsupported CDB len\n");
1519 dev->cdb_len = (unsigned int) rc;
1521 if (ata_id_cdb_intr(dev->id)) {
1522 dev->flags |= ATA_DFLAG_CDB_INTR;
1523 cdb_intr_string = ", CDB intr";
1526 /* print device info to dmesg */
1527 if (ata_msg_drv(ap) && print_info)
1528 ata_dev_printk(dev, KERN_INFO, "ATAPI, max %s%s\n",
1529 ata_mode_string(xfer_mask),
1533 if (dev->horkage & ATA_HORKAGE_DIAGNOSTIC) {
1534 /* Let the user know. We don't want to disallow opens for
1535 rescue purposes, or in case the vendor is just a blithering
1538 ata_dev_printk(dev, KERN_WARNING,
1539 "Drive reports diagnostics failure. This may indicate a drive\n");
1540 ata_dev_printk(dev, KERN_WARNING,
1541 "fault or invalid emulation. Contact drive vendor for information.\n");
1545 ata_set_port_max_cmd_len(ap);
1547 /* limit bridge transfers to udma5, 200 sectors */
1548 if (ata_dev_knobble(dev)) {
1549 if (ata_msg_drv(ap) && print_info)
1550 ata_dev_printk(dev, KERN_INFO,
1551 "applying bridge limits\n");
1552 dev->udma_mask &= ATA_UDMA5;
1553 dev->max_sectors = ATA_MAX_SECTORS;
1556 if (ap->ops->dev_config)
1557 ap->ops->dev_config(ap, dev);
1559 if (ata_msg_probe(ap))
1560 ata_dev_printk(dev, KERN_DEBUG, "%s: EXIT, drv_stat = 0x%x\n",
1561 __FUNCTION__, ata_chk_status(ap));
1565 if (ata_msg_probe(ap))
1566 ata_dev_printk(dev, KERN_DEBUG,
1567 "%s: EXIT, err\n", __FUNCTION__);
1572 * ata_bus_probe - Reset and probe ATA bus
1575 * Master ATA bus probing function. Initiates a hardware-dependent
1576 * bus reset, then attempts to identify any devices found on
1580 * PCI/etc. bus probe sem.
1583 * Zero on success, negative errno otherwise.
1586 int ata_bus_probe(struct ata_port *ap)
1588 unsigned int classes[ATA_MAX_DEVICES];
1589 int tries[ATA_MAX_DEVICES];
1590 int i, rc, down_xfermask;
1591 struct ata_device *dev;
1595 for (i = 0; i < ATA_MAX_DEVICES; i++)
1596 tries[i] = ATA_PROBE_MAX_TRIES;
1601 /* reset and determine device classes */
1602 ap->ops->phy_reset(ap);
1604 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1605 dev = &ap->device[i];
1607 if (!(ap->flags & ATA_FLAG_DISABLED) &&
1608 dev->class != ATA_DEV_UNKNOWN)
1609 classes[dev->devno] = dev->class;
1611 classes[dev->devno] = ATA_DEV_NONE;
1613 dev->class = ATA_DEV_UNKNOWN;
1618 /* after the reset the device state is PIO 0 and the controller
1619 state is undefined. Record the mode */
1621 for (i = 0; i < ATA_MAX_DEVICES; i++)
1622 ap->device[i].pio_mode = XFER_PIO_0;
1624 /* read IDENTIFY page and configure devices */
1625 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1626 dev = &ap->device[i];
1629 dev->class = classes[i];
1631 if (!ata_dev_enabled(dev))
1634 rc = ata_dev_read_id(dev, &dev->class, 1, dev->id);
1638 rc = ata_dev_configure(dev, 1);
1643 /* configure transfer mode */
1644 rc = ata_set_mode(ap, &dev);
1650 for (i = 0; i < ATA_MAX_DEVICES; i++)
1651 if (ata_dev_enabled(&ap->device[i]))
1654 /* no device present, disable port */
1655 ata_port_disable(ap);
1656 ap->ops->port_disable(ap);
1663 tries[dev->devno] = 0;
1666 sata_down_spd_limit(ap);
1669 tries[dev->devno]--;
1670 if (down_xfermask &&
1671 ata_down_xfermask_limit(dev, tries[dev->devno] == 1))
1672 tries[dev->devno] = 0;
1675 if (!tries[dev->devno]) {
1676 ata_down_xfermask_limit(dev, 1);
1677 ata_dev_disable(dev);
1684 * ata_port_probe - Mark port as enabled
1685 * @ap: Port for which we indicate enablement
1687 * Modify @ap data structure such that the system
1688 * thinks that the entire port is enabled.
1690 * LOCKING: host lock, or some other form of
1694 void ata_port_probe(struct ata_port *ap)
1696 ap->flags &= ~ATA_FLAG_DISABLED;
1700 * sata_print_link_status - Print SATA link status
1701 * @ap: SATA port to printk link status about
1703 * This function prints link speed and status of a SATA link.
1708 static void sata_print_link_status(struct ata_port *ap)
1710 u32 sstatus, scontrol, tmp;
1712 if (sata_scr_read(ap, SCR_STATUS, &sstatus))
1714 sata_scr_read(ap, SCR_CONTROL, &scontrol);
1716 if (ata_port_online(ap)) {
1717 tmp = (sstatus >> 4) & 0xf;
1718 ata_port_printk(ap, KERN_INFO,
1719 "SATA link up %s (SStatus %X SControl %X)\n",
1720 sata_spd_string(tmp), sstatus, scontrol);
1722 ata_port_printk(ap, KERN_INFO,
1723 "SATA link down (SStatus %X SControl %X)\n",
1729 * __sata_phy_reset - Wake/reset a low-level SATA PHY
1730 * @ap: SATA port associated with target SATA PHY.
1732 * This function issues commands to standard SATA Sxxx
1733 * PHY registers, to wake up the phy (and device), and
1734 * clear any reset condition.
1737 * PCI/etc. bus probe sem.
1740 void __sata_phy_reset(struct ata_port *ap)
1743 unsigned long timeout = jiffies + (HZ * 5);
1745 if (ap->flags & ATA_FLAG_SATA_RESET) {
1746 /* issue phy wake/reset */
1747 sata_scr_write_flush(ap, SCR_CONTROL, 0x301);
1748 /* Couldn't find anything in SATA I/II specs, but
1749 * AHCI-1.1 10.4.2 says at least 1 ms. */
1752 /* phy wake/clear reset */
1753 sata_scr_write_flush(ap, SCR_CONTROL, 0x300);
1755 /* wait for phy to become ready, if necessary */
1758 sata_scr_read(ap, SCR_STATUS, &sstatus);
1759 if ((sstatus & 0xf) != 1)
1761 } while (time_before(jiffies, timeout));
1763 /* print link status */
1764 sata_print_link_status(ap);
1766 /* TODO: phy layer with polling, timeouts, etc. */
1767 if (!ata_port_offline(ap))
1770 ata_port_disable(ap);
1772 if (ap->flags & ATA_FLAG_DISABLED)
1775 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
1776 ata_port_disable(ap);
1780 ap->cbl = ATA_CBL_SATA;
1784 * sata_phy_reset - Reset SATA bus.
1785 * @ap: SATA port associated with target SATA PHY.
1787 * This function resets the SATA bus, and then probes
1788 * the bus for devices.
1791 * PCI/etc. bus probe sem.
1794 void sata_phy_reset(struct ata_port *ap)
1796 __sata_phy_reset(ap);
1797 if (ap->flags & ATA_FLAG_DISABLED)
1803 * ata_dev_pair - return other device on cable
1806 * Obtain the other device on the same cable, or if none is
1807 * present NULL is returned
1810 struct ata_device *ata_dev_pair(struct ata_device *adev)
1812 struct ata_port *ap = adev->ap;
1813 struct ata_device *pair = &ap->device[1 - adev->devno];
1814 if (!ata_dev_enabled(pair))
1820 * ata_port_disable - Disable port.
1821 * @ap: Port to be disabled.
1823 * Modify @ap data structure such that the system
1824 * thinks that the entire port is disabled, and should
1825 * never attempt to probe or communicate with devices
1828 * LOCKING: host lock, or some other form of
1832 void ata_port_disable(struct ata_port *ap)
1834 ap->device[0].class = ATA_DEV_NONE;
1835 ap->device[1].class = ATA_DEV_NONE;
1836 ap->flags |= ATA_FLAG_DISABLED;
1840 * sata_down_spd_limit - adjust SATA spd limit downward
1841 * @ap: Port to adjust SATA spd limit for
1843 * Adjust SATA spd limit of @ap downward. Note that this
1844 * function only adjusts the limit. The change must be applied
1845 * using sata_set_spd().
1848 * Inherited from caller.
1851 * 0 on success, negative errno on failure
1853 int sata_down_spd_limit(struct ata_port *ap)
1855 u32 sstatus, spd, mask;
1858 rc = sata_scr_read(ap, SCR_STATUS, &sstatus);
1862 mask = ap->sata_spd_limit;
1865 highbit = fls(mask) - 1;
1866 mask &= ~(1 << highbit);
1868 spd = (sstatus >> 4) & 0xf;
1872 mask &= (1 << spd) - 1;
1876 ap->sata_spd_limit = mask;
1878 ata_port_printk(ap, KERN_WARNING, "limiting SATA link speed to %s\n",
1879 sata_spd_string(fls(mask)));
1884 static int __sata_set_spd_needed(struct ata_port *ap, u32 *scontrol)
1888 if (ap->sata_spd_limit == UINT_MAX)
1891 limit = fls(ap->sata_spd_limit);
1893 spd = (*scontrol >> 4) & 0xf;
1894 *scontrol = (*scontrol & ~0xf0) | ((limit & 0xf) << 4);
1896 return spd != limit;
1900 * sata_set_spd_needed - is SATA spd configuration needed
1901 * @ap: Port in question
1903 * Test whether the spd limit in SControl matches
1904 * @ap->sata_spd_limit. This function is used to determine
1905 * whether hardreset is necessary to apply SATA spd
1909 * Inherited from caller.
1912 * 1 if SATA spd configuration is needed, 0 otherwise.
1914 int sata_set_spd_needed(struct ata_port *ap)
1918 if (sata_scr_read(ap, SCR_CONTROL, &scontrol))
1921 return __sata_set_spd_needed(ap, &scontrol);
1925 * sata_set_spd - set SATA spd according to spd limit
1926 * @ap: Port to set SATA spd for
1928 * Set SATA spd of @ap according to sata_spd_limit.
1931 * Inherited from caller.
1934 * 0 if spd doesn't need to be changed, 1 if spd has been
1935 * changed. Negative errno if SCR registers are inaccessible.
1937 int sata_set_spd(struct ata_port *ap)
1942 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
1945 if (!__sata_set_spd_needed(ap, &scontrol))
1948 if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol)))
1955 * This mode timing computation functionality is ported over from
1956 * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik
1959 * PIO 0-4, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
1960 * These were taken from ATA/ATAPI-6 standard, rev 0a, except
1961 * for UDMA6, which is currently supported only by Maxtor drives.
1963 * For PIO 5/6 MWDMA 3/4 see the CFA specification 3.0.
1966 static const struct ata_timing ata_timing[] = {
1968 { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 },
1969 { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 },
1970 { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 },
1971 { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 },
1973 { XFER_MW_DMA_4, 25, 0, 0, 0, 55, 20, 80, 0 },
1974 { XFER_MW_DMA_3, 25, 0, 0, 0, 65, 25, 100, 0 },
1975 { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 },
1976 { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 },
1977 { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 },
1979 /* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */
1981 { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 },
1982 { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 },
1983 { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 },
1985 { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 },
1986 { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 },
1987 { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 },
1989 { XFER_PIO_6, 10, 55, 20, 80, 55, 20, 80, 0 },
1990 { XFER_PIO_5, 15, 65, 25, 100, 65, 25, 100, 0 },
1991 { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 },
1992 { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 },
1994 { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 },
1995 { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 },
1996 { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 },
1998 /* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */
2003 #define ENOUGH(v,unit) (((v)-1)/(unit)+1)
2004 #define EZ(v,unit) ((v)?ENOUGH(v,unit):0)
2006 static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT)
2008 q->setup = EZ(t->setup * 1000, T);
2009 q->act8b = EZ(t->act8b * 1000, T);
2010 q->rec8b = EZ(t->rec8b * 1000, T);
2011 q->cyc8b = EZ(t->cyc8b * 1000, T);
2012 q->active = EZ(t->active * 1000, T);
2013 q->recover = EZ(t->recover * 1000, T);
2014 q->cycle = EZ(t->cycle * 1000, T);
2015 q->udma = EZ(t->udma * 1000, UT);
2018 void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b,
2019 struct ata_timing *m, unsigned int what)
2021 if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup);
2022 if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b);
2023 if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b);
2024 if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b);
2025 if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active);
2026 if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover);
2027 if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle);
2028 if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma);
2031 static const struct ata_timing* ata_timing_find_mode(unsigned short speed)
2033 const struct ata_timing *t;
2035 for (t = ata_timing; t->mode != speed; t++)
2036 if (t->mode == 0xFF)
2041 int ata_timing_compute(struct ata_device *adev, unsigned short speed,
2042 struct ata_timing *t, int T, int UT)
2044 const struct ata_timing *s;
2045 struct ata_timing p;
2051 if (!(s = ata_timing_find_mode(speed)))
2054 memcpy(t, s, sizeof(*s));
2057 * If the drive is an EIDE drive, it can tell us it needs extended
2058 * PIO/MW_DMA cycle timing.
2061 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
2062 memset(&p, 0, sizeof(p));
2063 if(speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) {
2064 if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO];
2065 else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY];
2066 } else if(speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) {
2067 p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN];
2069 ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B);
2073 * Convert the timing to bus clock counts.
2076 ata_timing_quantize(t, t, T, UT);
2079 * Even in DMA/UDMA modes we still use PIO access for IDENTIFY,
2080 * S.M.A.R.T * and some other commands. We have to ensure that the
2081 * DMA cycle timing is slower/equal than the fastest PIO timing.
2084 if (speed > XFER_PIO_4) {
2085 ata_timing_compute(adev, adev->pio_mode, &p, T, UT);
2086 ata_timing_merge(&p, t, t, ATA_TIMING_ALL);
2090 * Lengthen active & recovery time so that cycle time is correct.
2093 if (t->act8b + t->rec8b < t->cyc8b) {
2094 t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2;
2095 t->rec8b = t->cyc8b - t->act8b;
2098 if (t->active + t->recover < t->cycle) {
2099 t->active += (t->cycle - (t->active + t->recover)) / 2;
2100 t->recover = t->cycle - t->active;
2107 * ata_down_xfermask_limit - adjust dev xfer masks downward
2108 * @dev: Device to adjust xfer masks
2109 * @force_pio0: Force PIO0
2111 * Adjust xfer masks of @dev downward. Note that this function
2112 * does not apply the change. Invoking ata_set_mode() afterwards
2113 * will apply the limit.
2116 * Inherited from caller.
2119 * 0 on success, negative errno on failure
2121 int ata_down_xfermask_limit(struct ata_device *dev, int force_pio0)
2123 unsigned long xfer_mask;
2126 xfer_mask = ata_pack_xfermask(dev->pio_mask, dev->mwdma_mask,
2131 /* don't gear down to MWDMA from UDMA, go directly to PIO */
2132 if (xfer_mask & ATA_MASK_UDMA)
2133 xfer_mask &= ~ATA_MASK_MWDMA;
2135 highbit = fls(xfer_mask) - 1;
2136 xfer_mask &= ~(1 << highbit);
2138 xfer_mask &= 1 << ATA_SHIFT_PIO;
2142 ata_unpack_xfermask(xfer_mask, &dev->pio_mask, &dev->mwdma_mask,
2145 ata_dev_printk(dev, KERN_WARNING, "limiting speed to %s\n",
2146 ata_mode_string(xfer_mask));
2154 static int ata_dev_set_mode(struct ata_device *dev)
2156 unsigned int err_mask;
2159 dev->flags &= ~ATA_DFLAG_PIO;
2160 if (dev->xfer_shift == ATA_SHIFT_PIO)
2161 dev->flags |= ATA_DFLAG_PIO;
2163 err_mask = ata_dev_set_xfermode(dev);
2165 ata_dev_printk(dev, KERN_ERR, "failed to set xfermode "
2166 "(err_mask=0x%x)\n", err_mask);
2170 rc = ata_dev_revalidate(dev, 0);
2174 DPRINTK("xfer_shift=%u, xfer_mode=0x%x\n",
2175 dev->xfer_shift, (int)dev->xfer_mode);
2177 ata_dev_printk(dev, KERN_INFO, "configured for %s\n",
2178 ata_mode_string(ata_xfer_mode2mask(dev->xfer_mode)));
2183 * ata_set_mode - Program timings and issue SET FEATURES - XFER
2184 * @ap: port on which timings will be programmed
2185 * @r_failed_dev: out paramter for failed device
2187 * Set ATA device disk transfer mode (PIO3, UDMA6, etc.). If
2188 * ata_set_mode() fails, pointer to the failing device is
2189 * returned in @r_failed_dev.
2192 * PCI/etc. bus probe sem.
2195 * 0 on success, negative errno otherwise
2197 int ata_set_mode(struct ata_port *ap, struct ata_device **r_failed_dev)
2199 struct ata_device *dev;
2200 int i, rc = 0, used_dma = 0, found = 0;
2202 /* has private set_mode? */
2203 if (ap->ops->set_mode) {
2204 /* FIXME: make ->set_mode handle no device case and
2205 * return error code and failing device on failure.
2207 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2208 if (ata_dev_ready(&ap->device[i])) {
2209 ap->ops->set_mode(ap);
2216 /* step 1: calculate xfer_mask */
2217 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2218 unsigned int pio_mask, dma_mask;
2220 dev = &ap->device[i];
2222 if (!ata_dev_enabled(dev))
2225 ata_dev_xfermask(dev);
2227 pio_mask = ata_pack_xfermask(dev->pio_mask, 0, 0);
2228 dma_mask = ata_pack_xfermask(0, dev->mwdma_mask, dev->udma_mask);
2229 dev->pio_mode = ata_xfer_mask2mode(pio_mask);
2230 dev->dma_mode = ata_xfer_mask2mode(dma_mask);
2239 /* step 2: always set host PIO timings */
2240 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2241 dev = &ap->device[i];
2242 if (!ata_dev_enabled(dev))
2245 if (!dev->pio_mode) {
2246 ata_dev_printk(dev, KERN_WARNING, "no PIO support\n");
2251 dev->xfer_mode = dev->pio_mode;
2252 dev->xfer_shift = ATA_SHIFT_PIO;
2253 if (ap->ops->set_piomode)
2254 ap->ops->set_piomode(ap, dev);
2257 /* step 3: set host DMA timings */
2258 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2259 dev = &ap->device[i];
2261 if (!ata_dev_enabled(dev) || !dev->dma_mode)
2264 dev->xfer_mode = dev->dma_mode;
2265 dev->xfer_shift = ata_xfer_mode2shift(dev->dma_mode);
2266 if (ap->ops->set_dmamode)
2267 ap->ops->set_dmamode(ap, dev);
2270 /* step 4: update devices' xfer mode */
2271 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2272 dev = &ap->device[i];
2274 /* don't udpate suspended devices' xfer mode */
2275 if (!ata_dev_ready(dev))
2278 rc = ata_dev_set_mode(dev);
2283 /* Record simplex status. If we selected DMA then the other
2284 * host channels are not permitted to do so.
2286 if (used_dma && (ap->host->flags & ATA_HOST_SIMPLEX))
2287 ap->host->simplex_claimed = 1;
2289 /* step5: chip specific finalisation */
2290 if (ap->ops->post_set_mode)
2291 ap->ops->post_set_mode(ap);
2295 *r_failed_dev = dev;
2300 * ata_tf_to_host - issue ATA taskfile to host controller
2301 * @ap: port to which command is being issued
2302 * @tf: ATA taskfile register set
2304 * Issues ATA taskfile register set to ATA host controller,
2305 * with proper synchronization with interrupt handler and
2309 * spin_lock_irqsave(host lock)
2312 static inline void ata_tf_to_host(struct ata_port *ap,
2313 const struct ata_taskfile *tf)
2315 ap->ops->tf_load(ap, tf);
2316 ap->ops->exec_command(ap, tf);
2320 * ata_busy_sleep - sleep until BSY clears, or timeout
2321 * @ap: port containing status register to be polled
2322 * @tmout_pat: impatience timeout
2323 * @tmout: overall timeout
2325 * Sleep until ATA Status register bit BSY clears,
2326 * or a timeout occurs.
2331 unsigned int ata_busy_sleep (struct ata_port *ap,
2332 unsigned long tmout_pat, unsigned long tmout)
2334 unsigned long timer_start, timeout;
2337 status = ata_busy_wait(ap, ATA_BUSY, 300);
2338 timer_start = jiffies;
2339 timeout = timer_start + tmout_pat;
2340 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
2342 status = ata_busy_wait(ap, ATA_BUSY, 3);
2345 if (status & ATA_BUSY)
2346 ata_port_printk(ap, KERN_WARNING,
2347 "port is slow to respond, please be patient "
2348 "(Status 0x%x)\n", status);
2350 timeout = timer_start + tmout;
2351 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
2353 status = ata_chk_status(ap);
2356 if (status & ATA_BUSY) {
2357 ata_port_printk(ap, KERN_ERR, "port failed to respond "
2358 "(%lu secs, Status 0x%x)\n",
2359 tmout / HZ, status);
2366 static void ata_bus_post_reset(struct ata_port *ap, unsigned int devmask)
2368 struct ata_ioports *ioaddr = &ap->ioaddr;
2369 unsigned int dev0 = devmask & (1 << 0);
2370 unsigned int dev1 = devmask & (1 << 1);
2371 unsigned long timeout;
2373 /* if device 0 was found in ata_devchk, wait for its
2377 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2379 /* if device 1 was found in ata_devchk, wait for
2380 * register access, then wait for BSY to clear
2382 timeout = jiffies + ATA_TMOUT_BOOT;
2386 ap->ops->dev_select(ap, 1);
2387 if (ap->flags & ATA_FLAG_MMIO) {
2388 nsect = readb((void __iomem *) ioaddr->nsect_addr);
2389 lbal = readb((void __iomem *) ioaddr->lbal_addr);
2391 nsect = inb(ioaddr->nsect_addr);
2392 lbal = inb(ioaddr->lbal_addr);
2394 if ((nsect == 1) && (lbal == 1))
2396 if (time_after(jiffies, timeout)) {
2400 msleep(50); /* give drive a breather */
2403 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2405 /* is all this really necessary? */
2406 ap->ops->dev_select(ap, 0);
2408 ap->ops->dev_select(ap, 1);
2410 ap->ops->dev_select(ap, 0);
2413 static unsigned int ata_bus_softreset(struct ata_port *ap,
2414 unsigned int devmask)
2416 struct ata_ioports *ioaddr = &ap->ioaddr;
2418 DPRINTK("ata%u: bus reset via SRST\n", ap->id);
2420 /* software reset. causes dev0 to be selected */
2421 if (ap->flags & ATA_FLAG_MMIO) {
2422 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2423 udelay(20); /* FIXME: flush */
2424 writeb(ap->ctl | ATA_SRST, (void __iomem *) ioaddr->ctl_addr);
2425 udelay(20); /* FIXME: flush */
2426 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2428 outb(ap->ctl, ioaddr->ctl_addr);
2430 outb(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
2432 outb(ap->ctl, ioaddr->ctl_addr);
2435 /* spec mandates ">= 2ms" before checking status.
2436 * We wait 150ms, because that was the magic delay used for
2437 * ATAPI devices in Hale Landis's ATADRVR, for the period of time
2438 * between when the ATA command register is written, and then
2439 * status is checked. Because waiting for "a while" before
2440 * checking status is fine, post SRST, we perform this magic
2441 * delay here as well.
2443 * Old drivers/ide uses the 2mS rule and then waits for ready
2447 /* Before we perform post reset processing we want to see if
2448 * the bus shows 0xFF because the odd clown forgets the D7
2449 * pulldown resistor.
2451 if (ata_check_status(ap) == 0xFF) {
2452 ata_port_printk(ap, KERN_ERR, "SRST failed (status 0xFF)\n");
2453 return AC_ERR_OTHER;
2456 ata_bus_post_reset(ap, devmask);
2462 * ata_bus_reset - reset host port and associated ATA channel
2463 * @ap: port to reset
2465 * This is typically the first time we actually start issuing
2466 * commands to the ATA channel. We wait for BSY to clear, then
2467 * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its
2468 * result. Determine what devices, if any, are on the channel
2469 * by looking at the device 0/1 error register. Look at the signature
2470 * stored in each device's taskfile registers, to determine if
2471 * the device is ATA or ATAPI.
2474 * PCI/etc. bus probe sem.
2475 * Obtains host lock.
2478 * Sets ATA_FLAG_DISABLED if bus reset fails.
2481 void ata_bus_reset(struct ata_port *ap)
2483 struct ata_ioports *ioaddr = &ap->ioaddr;
2484 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2486 unsigned int dev0, dev1 = 0, devmask = 0;
2488 DPRINTK("ENTER, host %u, port %u\n", ap->id, ap->port_no);
2490 /* determine if device 0/1 are present */
2491 if (ap->flags & ATA_FLAG_SATA_RESET)
2494 dev0 = ata_devchk(ap, 0);
2496 dev1 = ata_devchk(ap, 1);
2500 devmask |= (1 << 0);
2502 devmask |= (1 << 1);
2504 /* select device 0 again */
2505 ap->ops->dev_select(ap, 0);
2507 /* issue bus reset */
2508 if (ap->flags & ATA_FLAG_SRST)
2509 if (ata_bus_softreset(ap, devmask))
2513 * determine by signature whether we have ATA or ATAPI devices
2515 ap->device[0].class = ata_dev_try_classify(ap, 0, &err);
2516 if ((slave_possible) && (err != 0x81))
2517 ap->device[1].class = ata_dev_try_classify(ap, 1, &err);
2519 /* re-enable interrupts */
2520 if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
2523 /* is double-select really necessary? */
2524 if (ap->device[1].class != ATA_DEV_NONE)
2525 ap->ops->dev_select(ap, 1);
2526 if (ap->device[0].class != ATA_DEV_NONE)
2527 ap->ops->dev_select(ap, 0);
2529 /* if no devices were detected, disable this port */
2530 if ((ap->device[0].class == ATA_DEV_NONE) &&
2531 (ap->device[1].class == ATA_DEV_NONE))
2534 if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) {
2535 /* set up device control for ATA_FLAG_SATA_RESET */
2536 if (ap->flags & ATA_FLAG_MMIO)
2537 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2539 outb(ap->ctl, ioaddr->ctl_addr);
2546 ata_port_printk(ap, KERN_ERR, "disabling port\n");
2547 ap->ops->port_disable(ap);
2553 * sata_phy_debounce - debounce SATA phy status
2554 * @ap: ATA port to debounce SATA phy status for
2555 * @params: timing parameters { interval, duratinon, timeout } in msec
2557 * Make sure SStatus of @ap reaches stable state, determined by
2558 * holding the same value where DET is not 1 for @duration polled
2559 * every @interval, before @timeout. Timeout constraints the
2560 * beginning of the stable state. Because, after hot unplugging,
2561 * DET gets stuck at 1 on some controllers, this functions waits
2562 * until timeout then returns 0 if DET is stable at 1.
2565 * Kernel thread context (may sleep)
2568 * 0 on success, -errno on failure.
2570 int sata_phy_debounce(struct ata_port *ap, const unsigned long *params)
2572 unsigned long interval_msec = params[0];
2573 unsigned long duration = params[1] * HZ / 1000;
2574 unsigned long timeout = jiffies + params[2] * HZ / 1000;
2575 unsigned long last_jiffies;
2579 if ((rc = sata_scr_read(ap, SCR_STATUS, &cur)))
2584 last_jiffies = jiffies;
2587 msleep(interval_msec);
2588 if ((rc = sata_scr_read(ap, SCR_STATUS, &cur)))
2594 if (cur == 1 && time_before(jiffies, timeout))
2596 if (time_after(jiffies, last_jiffies + duration))
2601 /* unstable, start over */
2603 last_jiffies = jiffies;
2606 if (time_after(jiffies, timeout))
2612 * sata_phy_resume - resume SATA phy
2613 * @ap: ATA port to resume SATA phy for
2614 * @params: timing parameters { interval, duratinon, timeout } in msec
2616 * Resume SATA phy of @ap and debounce it.
2619 * Kernel thread context (may sleep)
2622 * 0 on success, -errno on failure.
2624 int sata_phy_resume(struct ata_port *ap, const unsigned long *params)
2629 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
2632 scontrol = (scontrol & 0x0f0) | 0x300;
2634 if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol)))
2637 /* Some PHYs react badly if SStatus is pounded immediately
2638 * after resuming. Delay 200ms before debouncing.
2642 return sata_phy_debounce(ap, params);
2645 static void ata_wait_spinup(struct ata_port *ap)
2647 struct ata_eh_context *ehc = &ap->eh_context;
2648 unsigned long end, secs;
2651 /* first, debounce phy if SATA */
2652 if (ap->cbl == ATA_CBL_SATA) {
2653 rc = sata_phy_debounce(ap, sata_deb_timing_hotplug);
2655 /* if debounced successfully and offline, no need to wait */
2656 if ((rc == 0 || rc == -EOPNOTSUPP) && ata_port_offline(ap))
2660 /* okay, let's give the drive time to spin up */
2661 end = ehc->i.hotplug_timestamp + ATA_SPINUP_WAIT * HZ / 1000;
2662 secs = ((end - jiffies) + HZ - 1) / HZ;
2664 if (time_after(jiffies, end))
2668 ata_port_printk(ap, KERN_INFO, "waiting for device to spin up "
2669 "(%lu secs)\n", secs);
2671 schedule_timeout_uninterruptible(end - jiffies);
2675 * ata_std_prereset - prepare for reset
2676 * @ap: ATA port to be reset
2678 * @ap is about to be reset. Initialize it.
2681 * Kernel thread context (may sleep)
2684 * 0 on success, -errno otherwise.
2686 int ata_std_prereset(struct ata_port *ap)
2688 struct ata_eh_context *ehc = &ap->eh_context;
2689 const unsigned long *timing = sata_ehc_deb_timing(ehc);
2692 /* handle link resume & hotplug spinup */
2693 if ((ehc->i.flags & ATA_EHI_RESUME_LINK) &&
2694 (ap->flags & ATA_FLAG_HRST_TO_RESUME))
2695 ehc->i.action |= ATA_EH_HARDRESET;
2697 if ((ehc->i.flags & ATA_EHI_HOTPLUGGED) &&
2698 (ap->flags & ATA_FLAG_SKIP_D2H_BSY))
2699 ata_wait_spinup(ap);
2701 /* if we're about to do hardreset, nothing more to do */
2702 if (ehc->i.action & ATA_EH_HARDRESET)
2705 /* if SATA, resume phy */
2706 if (ap->cbl == ATA_CBL_SATA) {
2707 rc = sata_phy_resume(ap, timing);
2708 if (rc && rc != -EOPNOTSUPP) {
2709 /* phy resume failed */
2710 ata_port_printk(ap, KERN_WARNING, "failed to resume "
2711 "link for reset (errno=%d)\n", rc);
2716 /* Wait for !BSY if the controller can wait for the first D2H
2717 * Reg FIS and we don't know that no device is attached.
2719 if (!(ap->flags & ATA_FLAG_SKIP_D2H_BSY) && !ata_port_offline(ap))
2720 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2726 * ata_std_softreset - reset host port via ATA SRST
2727 * @ap: port to reset
2728 * @classes: resulting classes of attached devices
2730 * Reset host port using ATA SRST.
2733 * Kernel thread context (may sleep)
2736 * 0 on success, -errno otherwise.
2738 int ata_std_softreset(struct ata_port *ap, unsigned int *classes)
2740 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2741 unsigned int devmask = 0, err_mask;
2746 if (ata_port_offline(ap)) {
2747 classes[0] = ATA_DEV_NONE;
2751 /* determine if device 0/1 are present */
2752 if (ata_devchk(ap, 0))
2753 devmask |= (1 << 0);
2754 if (slave_possible && ata_devchk(ap, 1))
2755 devmask |= (1 << 1);
2757 /* select device 0 again */
2758 ap->ops->dev_select(ap, 0);
2760 /* issue bus reset */
2761 DPRINTK("about to softreset, devmask=%x\n", devmask);
2762 err_mask = ata_bus_softreset(ap, devmask);
2764 ata_port_printk(ap, KERN_ERR, "SRST failed (err_mask=0x%x)\n",
2769 /* determine by signature whether we have ATA or ATAPI devices */
2770 classes[0] = ata_dev_try_classify(ap, 0, &err);
2771 if (slave_possible && err != 0x81)
2772 classes[1] = ata_dev_try_classify(ap, 1, &err);
2775 DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]);
2780 * sata_std_hardreset - reset host port via SATA phy reset
2781 * @ap: port to reset
2782 * @class: resulting class of attached device
2784 * SATA phy-reset host port using DET bits of SControl register.
2787 * Kernel thread context (may sleep)
2790 * 0 on success, -errno otherwise.
2792 int sata_std_hardreset(struct ata_port *ap, unsigned int *class)
2794 struct ata_eh_context *ehc = &ap->eh_context;
2795 const unsigned long *timing = sata_ehc_deb_timing(ehc);
2801 if (sata_set_spd_needed(ap)) {
2802 /* SATA spec says nothing about how to reconfigure
2803 * spd. To be on the safe side, turn off phy during
2804 * reconfiguration. This works for at least ICH7 AHCI
2807 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
2810 scontrol = (scontrol & 0x0f0) | 0x304;
2812 if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol)))
2818 /* issue phy wake/reset */
2819 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
2822 scontrol = (scontrol & 0x0f0) | 0x301;
2824 if ((rc = sata_scr_write_flush(ap, SCR_CONTROL, scontrol)))
2827 /* Couldn't find anything in SATA I/II specs, but AHCI-1.1
2828 * 10.4.2 says at least 1 ms.
2832 /* bring phy back */
2833 sata_phy_resume(ap, timing);
2835 /* TODO: phy layer with polling, timeouts, etc. */
2836 if (ata_port_offline(ap)) {
2837 *class = ATA_DEV_NONE;
2838 DPRINTK("EXIT, link offline\n");
2842 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
2843 ata_port_printk(ap, KERN_ERR,
2844 "COMRESET failed (device not ready)\n");
2848 ap->ops->dev_select(ap, 0); /* probably unnecessary */
2850 *class = ata_dev_try_classify(ap, 0, NULL);
2852 DPRINTK("EXIT, class=%u\n", *class);
2857 * ata_std_postreset - standard postreset callback
2858 * @ap: the target ata_port
2859 * @classes: classes of attached devices
2861 * This function is invoked after a successful reset. Note that
2862 * the device might have been reset more than once using
2863 * different reset methods before postreset is invoked.
2866 * Kernel thread context (may sleep)
2868 void ata_std_postreset(struct ata_port *ap, unsigned int *classes)
2874 /* print link status */
2875 sata_print_link_status(ap);
2878 if (sata_scr_read(ap, SCR_ERROR, &serror) == 0)
2879 sata_scr_write(ap, SCR_ERROR, serror);
2881 /* re-enable interrupts */
2882 if (!ap->ops->error_handler) {
2883 /* FIXME: hack. create a hook instead */
2884 if (ap->ioaddr.ctl_addr)
2888 /* is double-select really necessary? */
2889 if (classes[0] != ATA_DEV_NONE)
2890 ap->ops->dev_select(ap, 1);
2891 if (classes[1] != ATA_DEV_NONE)
2892 ap->ops->dev_select(ap, 0);
2894 /* bail out if no device is present */
2895 if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) {
2896 DPRINTK("EXIT, no device\n");
2900 /* set up device control */
2901 if (ap->ioaddr.ctl_addr) {
2902 if (ap->flags & ATA_FLAG_MMIO)
2903 writeb(ap->ctl, (void __iomem *) ap->ioaddr.ctl_addr);
2905 outb(ap->ctl, ap->ioaddr.ctl_addr);
2912 * ata_dev_same_device - Determine whether new ID matches configured device
2913 * @dev: device to compare against
2914 * @new_class: class of the new device
2915 * @new_id: IDENTIFY page of the new device
2917 * Compare @new_class and @new_id against @dev and determine
2918 * whether @dev is the device indicated by @new_class and
2925 * 1 if @dev matches @new_class and @new_id, 0 otherwise.
2927 static int ata_dev_same_device(struct ata_device *dev, unsigned int new_class,
2930 const u16 *old_id = dev->id;
2931 unsigned char model[2][41], serial[2][21];
2934 if (dev->class != new_class) {
2935 ata_dev_printk(dev, KERN_INFO, "class mismatch %d != %d\n",
2936 dev->class, new_class);
2940 ata_id_c_string(old_id, model[0], ATA_ID_PROD_OFS, sizeof(model[0]));
2941 ata_id_c_string(new_id, model[1], ATA_ID_PROD_OFS, sizeof(model[1]));
2942 ata_id_c_string(old_id, serial[0], ATA_ID_SERNO_OFS, sizeof(serial[0]));
2943 ata_id_c_string(new_id, serial[1], ATA_ID_SERNO_OFS, sizeof(serial[1]));
2944 new_n_sectors = ata_id_n_sectors(new_id);
2946 if (strcmp(model[0], model[1])) {
2947 ata_dev_printk(dev, KERN_INFO, "model number mismatch "
2948 "'%s' != '%s'\n", model[0], model[1]);
2952 if (strcmp(serial[0], serial[1])) {
2953 ata_dev_printk(dev, KERN_INFO, "serial number mismatch "
2954 "'%s' != '%s'\n", serial[0], serial[1]);
2958 if (dev->class == ATA_DEV_ATA && dev->n_sectors != new_n_sectors) {
2959 ata_dev_printk(dev, KERN_INFO, "n_sectors mismatch "
2961 (unsigned long long)dev->n_sectors,
2962 (unsigned long long)new_n_sectors);
2970 * ata_dev_revalidate - Revalidate ATA device
2971 * @dev: device to revalidate
2972 * @post_reset: is this revalidation after reset?
2974 * Re-read IDENTIFY page and make sure @dev is still attached to
2978 * Kernel thread context (may sleep)
2981 * 0 on success, negative errno otherwise
2983 int ata_dev_revalidate(struct ata_device *dev, int post_reset)
2985 unsigned int class = dev->class;
2986 u16 *id = (void *)dev->ap->sector_buf;
2989 if (!ata_dev_enabled(dev)) {
2995 rc = ata_dev_read_id(dev, &class, post_reset, id);
2999 /* is the device still there? */
3000 if (!ata_dev_same_device(dev, class, id)) {
3005 memcpy(dev->id, id, sizeof(id[0]) * ATA_ID_WORDS);
3007 /* configure device according to the new ID */
3008 rc = ata_dev_configure(dev, 0);
3013 ata_dev_printk(dev, KERN_ERR, "revalidation failed (errno=%d)\n", rc);
3017 static const char * const ata_dma_blacklist [] = {
3018 "WDC AC11000H", NULL,
3019 "WDC AC22100H", NULL,
3020 "WDC AC32500H", NULL,
3021 "WDC AC33100H", NULL,
3022 "WDC AC31600H", NULL,
3023 "WDC AC32100H", "24.09P07",
3024 "WDC AC23200L", "21.10N21",
3025 "Compaq CRD-8241B", NULL,
3030 "SanDisk SDP3B", NULL,
3031 "SanDisk SDP3B-64", NULL,
3032 "SANYO CD-ROM CRD", NULL,
3033 "HITACHI CDR-8", NULL,
3034 "HITACHI CDR-8335", NULL,
3035 "HITACHI CDR-8435", NULL,
3036 "Toshiba CD-ROM XM-6202B", NULL,
3037 "TOSHIBA CD-ROM XM-1702BC", NULL,
3039 "E-IDE CD-ROM CR-840", NULL,
3040 "CD-ROM Drive/F5A", NULL,
3041 "WPI CDD-820", NULL,
3042 "SAMSUNG CD-ROM SC-148C", NULL,
3043 "SAMSUNG CD-ROM SC", NULL,
3044 "SanDisk SDP3B-64", NULL,
3045 "ATAPI CD-ROM DRIVE 40X MAXIMUM",NULL,
3046 "_NEC DV5800A", NULL,
3047 "SAMSUNG CD-ROM SN-124", "N001"
3050 static int ata_strim(char *s, size_t len)
3052 len = strnlen(s, len);
3054 /* ATAPI specifies that empty space is blank-filled; remove blanks */
3055 while ((len > 0) && (s[len - 1] == ' ')) {
3062 static int ata_dma_blacklisted(const struct ata_device *dev)
3064 unsigned char model_num[40];
3065 unsigned char model_rev[16];
3066 unsigned int nlen, rlen;
3069 /* We don't support polling DMA.
3070 * DMA blacklist those ATAPI devices with CDB-intr (and use PIO)
3071 * if the LLDD handles only interrupts in the HSM_ST_LAST state.
3073 if ((dev->ap->flags & ATA_FLAG_PIO_POLLING) &&
3074 (dev->flags & ATA_DFLAG_CDB_INTR))
3077 ata_id_string(dev->id, model_num, ATA_ID_PROD_OFS,
3079 ata_id_string(dev->id, model_rev, ATA_ID_FW_REV_OFS,
3081 nlen = ata_strim(model_num, sizeof(model_num));
3082 rlen = ata_strim(model_rev, sizeof(model_rev));
3084 for (i = 0; i < ARRAY_SIZE(ata_dma_blacklist); i += 2) {
3085 if (!strncmp(ata_dma_blacklist[i], model_num, nlen)) {
3086 if (ata_dma_blacklist[i+1] == NULL)
3088 if (!strncmp(ata_dma_blacklist[i], model_rev, rlen))
3096 * ata_dev_xfermask - Compute supported xfermask of the given device
3097 * @dev: Device to compute xfermask for
3099 * Compute supported xfermask of @dev and store it in
3100 * dev->*_mask. This function is responsible for applying all
3101 * known limits including host controller limits, device
3107 static void ata_dev_xfermask(struct ata_device *dev)
3109 struct ata_port *ap = dev->ap;
3110 struct ata_host *host = ap->host;
3111 unsigned long xfer_mask;
3113 /* controller modes available */
3114 xfer_mask = ata_pack_xfermask(ap->pio_mask,
3115 ap->mwdma_mask, ap->udma_mask);
3117 /* Apply cable rule here. Don't apply it early because when
3118 * we handle hot plug the cable type can itself change.
3120 if (ap->cbl == ATA_CBL_PATA40)
3121 xfer_mask &= ~(0xF8 << ATA_SHIFT_UDMA);
3122 /* Apply drive side cable rule. Unknown or 80 pin cables reported
3123 * host side are checked drive side as well. Cases where we know a
3124 * 40wire cable is used safely for 80 are not checked here.
3126 if (ata_drive_40wire(dev->id) && (ap->cbl == ATA_CBL_PATA_UNK || ap->cbl == ATA_CBL_PATA80))
3127 xfer_mask &= ~(0xF8 << ATA_SHIFT_UDMA);
3130 xfer_mask &= ata_pack_xfermask(dev->pio_mask,
3131 dev->mwdma_mask, dev->udma_mask);
3132 xfer_mask &= ata_id_xfermask(dev->id);
3135 * CFA Advanced TrueIDE timings are not allowed on a shared
3138 if (ata_dev_pair(dev)) {
3139 /* No PIO5 or PIO6 */
3140 xfer_mask &= ~(0x03 << (ATA_SHIFT_PIO + 5));
3141 /* No MWDMA3 or MWDMA 4 */
3142 xfer_mask &= ~(0x03 << (ATA_SHIFT_MWDMA + 3));
3145 if (ata_dma_blacklisted(dev)) {
3146 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
3147 ata_dev_printk(dev, KERN_WARNING,
3148 "device is on DMA blacklist, disabling DMA\n");
3151 if ((host->flags & ATA_HOST_SIMPLEX) && host->simplex_claimed) {
3152 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
3153 ata_dev_printk(dev, KERN_WARNING, "simplex DMA is claimed by "
3154 "other device, disabling DMA\n");
3157 if (ap->ops->mode_filter)
3158 xfer_mask = ap->ops->mode_filter(ap, dev, xfer_mask);
3160 ata_unpack_xfermask(xfer_mask, &dev->pio_mask,
3161 &dev->mwdma_mask, &dev->udma_mask);
3165 * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command
3166 * @dev: Device to which command will be sent
3168 * Issue SET FEATURES - XFER MODE command to device @dev
3172 * PCI/etc. bus probe sem.
3175 * 0 on success, AC_ERR_* mask otherwise.
3178 static unsigned int ata_dev_set_xfermode(struct ata_device *dev)
3180 struct ata_taskfile tf;
3181 unsigned int err_mask;
3183 /* set up set-features taskfile */
3184 DPRINTK("set features - xfer mode\n");
3186 ata_tf_init(dev, &tf);
3187 tf.command = ATA_CMD_SET_FEATURES;
3188 tf.feature = SETFEATURES_XFER;
3189 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
3190 tf.protocol = ATA_PROT_NODATA;
3191 tf.nsect = dev->xfer_mode;
3193 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
3195 DPRINTK("EXIT, err_mask=%x\n", err_mask);
3200 * ata_dev_init_params - Issue INIT DEV PARAMS command
3201 * @dev: Device to which command will be sent
3202 * @heads: Number of heads (taskfile parameter)
3203 * @sectors: Number of sectors (taskfile parameter)
3206 * Kernel thread context (may sleep)
3209 * 0 on success, AC_ERR_* mask otherwise.
3211 static unsigned int ata_dev_init_params(struct ata_device *dev,
3212 u16 heads, u16 sectors)
3214 struct ata_taskfile tf;
3215 unsigned int err_mask;
3217 /* Number of sectors per track 1-255. Number of heads 1-16 */
3218 if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16)
3219 return AC_ERR_INVALID;
3221 /* set up init dev params taskfile */
3222 DPRINTK("init dev params \n");
3224 ata_tf_init(dev, &tf);
3225 tf.command = ATA_CMD_INIT_DEV_PARAMS;
3226 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
3227 tf.protocol = ATA_PROT_NODATA;
3229 tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */
3231 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
3233 DPRINTK("EXIT, err_mask=%x\n", err_mask);
3238 * ata_sg_clean - Unmap DMA memory associated with command
3239 * @qc: Command containing DMA memory to be released
3241 * Unmap all mapped DMA memory associated with this command.
3244 * spin_lock_irqsave(host lock)
3247 static void ata_sg_clean(struct ata_queued_cmd *qc)
3249 struct ata_port *ap = qc->ap;
3250 struct scatterlist *sg = qc->__sg;
3251 int dir = qc->dma_dir;
3252 void *pad_buf = NULL;
3254 WARN_ON(!(qc->flags & ATA_QCFLAG_DMAMAP));
3255 WARN_ON(sg == NULL);
3257 if (qc->flags & ATA_QCFLAG_SINGLE)
3258 WARN_ON(qc->n_elem > 1);
3260 VPRINTK("unmapping %u sg elements\n", qc->n_elem);
3262 /* if we padded the buffer out to 32-bit bound, and data
3263 * xfer direction is from-device, we must copy from the
3264 * pad buffer back into the supplied buffer
3266 if (qc->pad_len && !(qc->tf.flags & ATA_TFLAG_WRITE))
3267 pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3269 if (qc->flags & ATA_QCFLAG_SG) {
3271 dma_unmap_sg(ap->dev, sg, qc->n_elem, dir);
3272 /* restore last sg */
3273 sg[qc->orig_n_elem - 1].length += qc->pad_len;
3275 struct scatterlist *psg = &qc->pad_sgent;
3276 void *addr = kmap_atomic(psg->page, KM_IRQ0);
3277 memcpy(addr + psg->offset, pad_buf, qc->pad_len);
3278 kunmap_atomic(addr, KM_IRQ0);
3282 dma_unmap_single(ap->dev,
3283 sg_dma_address(&sg[0]), sg_dma_len(&sg[0]),
3286 sg->length += qc->pad_len;
3288 memcpy(qc->buf_virt + sg->length - qc->pad_len,
3289 pad_buf, qc->pad_len);
3292 qc->flags &= ~ATA_QCFLAG_DMAMAP;
3297 * ata_fill_sg - Fill PCI IDE PRD table
3298 * @qc: Metadata associated with taskfile to be transferred
3300 * Fill PCI IDE PRD (scatter-gather) table with segments
3301 * associated with the current disk command.
3304 * spin_lock_irqsave(host lock)
3307 static void ata_fill_sg(struct ata_queued_cmd *qc)
3309 struct ata_port *ap = qc->ap;
3310 struct scatterlist *sg;
3313 WARN_ON(qc->__sg == NULL);
3314 WARN_ON(qc->n_elem == 0 && qc->pad_len == 0);
3317 ata_for_each_sg(sg, qc) {
3321 /* determine if physical DMA addr spans 64K boundary.
3322 * Note h/w doesn't support 64-bit, so we unconditionally
3323 * truncate dma_addr_t to u32.
3325 addr = (u32) sg_dma_address(sg);
3326 sg_len = sg_dma_len(sg);
3329 offset = addr & 0xffff;
3331 if ((offset + sg_len) > 0x10000)
3332 len = 0x10000 - offset;
3334 ap->prd[idx].addr = cpu_to_le32(addr);
3335 ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff);
3336 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
3345 ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
3348 * ata_check_atapi_dma - Check whether ATAPI DMA can be supported
3349 * @qc: Metadata associated with taskfile to check
3351 * Allow low-level driver to filter ATA PACKET commands, returning
3352 * a status indicating whether or not it is OK to use DMA for the
3353 * supplied PACKET command.
3356 * spin_lock_irqsave(host lock)
3358 * RETURNS: 0 when ATAPI DMA can be used
3361 int ata_check_atapi_dma(struct ata_queued_cmd *qc)
3363 struct ata_port *ap = qc->ap;
3364 int rc = 0; /* Assume ATAPI DMA is OK by default */
3366 if (ap->ops->check_atapi_dma)
3367 rc = ap->ops->check_atapi_dma(qc);
3372 * ata_qc_prep - Prepare taskfile for submission
3373 * @qc: Metadata associated with taskfile to be prepared
3375 * Prepare ATA taskfile for submission.
3378 * spin_lock_irqsave(host lock)
3380 void ata_qc_prep(struct ata_queued_cmd *qc)
3382 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
3388 void ata_noop_qc_prep(struct ata_queued_cmd *qc) { }
3391 * ata_sg_init_one - Associate command with memory buffer
3392 * @qc: Command to be associated
3393 * @buf: Memory buffer
3394 * @buflen: Length of memory buffer, in bytes.
3396 * Initialize the data-related elements of queued_cmd @qc
3397 * to point to a single memory buffer, @buf of byte length @buflen.
3400 * spin_lock_irqsave(host lock)
3403 void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen)
3405 struct scatterlist *sg;
3407 qc->flags |= ATA_QCFLAG_SINGLE;
3409 memset(&qc->sgent, 0, sizeof(qc->sgent));
3410 qc->__sg = &qc->sgent;
3412 qc->orig_n_elem = 1;
3414 qc->nbytes = buflen;
3417 sg_init_one(sg, buf, buflen);
3421 * ata_sg_init - Associate command with scatter-gather table.
3422 * @qc: Command to be associated
3423 * @sg: Scatter-gather table.
3424 * @n_elem: Number of elements in s/g table.
3426 * Initialize the data-related elements of queued_cmd @qc
3427 * to point to a scatter-gather table @sg, containing @n_elem
3431 * spin_lock_irqsave(host lock)
3434 void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
3435 unsigned int n_elem)
3437 qc->flags |= ATA_QCFLAG_SG;
3439 qc->n_elem = n_elem;
3440 qc->orig_n_elem = n_elem;
3444 * ata_sg_setup_one - DMA-map the memory buffer associated with a command.
3445 * @qc: Command with memory buffer to be mapped.
3447 * DMA-map the memory buffer associated with queued_cmd @qc.
3450 * spin_lock_irqsave(host lock)
3453 * Zero on success, negative on error.
3456 static int ata_sg_setup_one(struct ata_queued_cmd *qc)
3458 struct ata_port *ap = qc->ap;
3459 int dir = qc->dma_dir;
3460 struct scatterlist *sg = qc->__sg;
3461 dma_addr_t dma_address;
3464 /* we must lengthen transfers to end on a 32-bit boundary */
3465 qc->pad_len = sg->length & 3;
3467 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3468 struct scatterlist *psg = &qc->pad_sgent;
3470 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
3472 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
3474 if (qc->tf.flags & ATA_TFLAG_WRITE)
3475 memcpy(pad_buf, qc->buf_virt + sg->length - qc->pad_len,
3478 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
3479 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
3481 sg->length -= qc->pad_len;
3482 if (sg->length == 0)
3485 DPRINTK("padding done, sg->length=%u pad_len=%u\n",
3486 sg->length, qc->pad_len);
3494 dma_address = dma_map_single(ap->dev, qc->buf_virt,
3496 if (dma_mapping_error(dma_address)) {
3498 sg->length += qc->pad_len;
3502 sg_dma_address(sg) = dma_address;
3503 sg_dma_len(sg) = sg->length;
3506 DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg),
3507 qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3513 * ata_sg_setup - DMA-map the scatter-gather table associated with a command.
3514 * @qc: Command with scatter-gather table to be mapped.
3516 * DMA-map the scatter-gather table associated with queued_cmd @qc.
3519 * spin_lock_irqsave(host lock)
3522 * Zero on success, negative on error.
3526 static int ata_sg_setup(struct ata_queued_cmd *qc)
3528 struct ata_port *ap = qc->ap;
3529 struct scatterlist *sg = qc->__sg;
3530 struct scatterlist *lsg = &sg[qc->n_elem - 1];
3531 int n_elem, pre_n_elem, dir, trim_sg = 0;
3533 VPRINTK("ENTER, ata%u\n", ap->id);
3534 WARN_ON(!(qc->flags & ATA_QCFLAG_SG));
3536 /* we must lengthen transfers to end on a 32-bit boundary */
3537 qc->pad_len = lsg->length & 3;
3539 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3540 struct scatterlist *psg = &qc->pad_sgent;
3541 unsigned int offset;
3543 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
3545 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
3548 * psg->page/offset are used to copy to-be-written
3549 * data in this function or read data in ata_sg_clean.
3551 offset = lsg->offset + lsg->length - qc->pad_len;
3552 psg->page = nth_page(lsg->page, offset >> PAGE_SHIFT);
3553 psg->offset = offset_in_page(offset);
3555 if (qc->tf.flags & ATA_TFLAG_WRITE) {
3556 void *addr = kmap_atomic(psg->page, KM_IRQ0);
3557 memcpy(pad_buf, addr + psg->offset, qc->pad_len);
3558 kunmap_atomic(addr, KM_IRQ0);
3561 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
3562 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
3564 lsg->length -= qc->pad_len;
3565 if (lsg->length == 0)
3568 DPRINTK("padding done, sg[%d].length=%u pad_len=%u\n",
3569 qc->n_elem - 1, lsg->length, qc->pad_len);
3572 pre_n_elem = qc->n_elem;
3573 if (trim_sg && pre_n_elem)
3582 n_elem = dma_map_sg(ap->dev, sg, pre_n_elem, dir);
3584 /* restore last sg */
3585 lsg->length += qc->pad_len;
3589 DPRINTK("%d sg elements mapped\n", n_elem);
3592 qc->n_elem = n_elem;
3598 * swap_buf_le16 - swap halves of 16-bit words in place
3599 * @buf: Buffer to swap
3600 * @buf_words: Number of 16-bit words in buffer.
3602 * Swap halves of 16-bit words if needed to convert from
3603 * little-endian byte order to native cpu byte order, or
3607 * Inherited from caller.
3609 void swap_buf_le16(u16 *buf, unsigned int buf_words)
3614 for (i = 0; i < buf_words; i++)
3615 buf[i] = le16_to_cpu(buf[i]);
3616 #endif /* __BIG_ENDIAN */
3620 * ata_mmio_data_xfer - Transfer data by MMIO
3621 * @adev: device for this I/O
3623 * @buflen: buffer length
3624 * @write_data: read/write
3626 * Transfer data from/to the device data register by MMIO.
3629 * Inherited from caller.
3632 void ata_mmio_data_xfer(struct ata_device *adev, unsigned char *buf,
3633 unsigned int buflen, int write_data)
3635 struct ata_port *ap = adev->ap;
3637 unsigned int words = buflen >> 1;
3638 u16 *buf16 = (u16 *) buf;
3639 void __iomem *mmio = (void __iomem *)ap->ioaddr.data_addr;
3641 /* Transfer multiple of 2 bytes */
3643 for (i = 0; i < words; i++)
3644 writew(le16_to_cpu(buf16[i]), mmio);
3646 for (i = 0; i < words; i++)
3647 buf16[i] = cpu_to_le16(readw(mmio));
3650 /* Transfer trailing 1 byte, if any. */
3651 if (unlikely(buflen & 0x01)) {
3652 u16 align_buf[1] = { 0 };
3653 unsigned char *trailing_buf = buf + buflen - 1;
3656 memcpy(align_buf, trailing_buf, 1);
3657 writew(le16_to_cpu(align_buf[0]), mmio);
3659 align_buf[0] = cpu_to_le16(readw(mmio));
3660 memcpy(trailing_buf, align_buf, 1);
3666 * ata_pio_data_xfer - Transfer data by PIO
3667 * @adev: device to target
3669 * @buflen: buffer length
3670 * @write_data: read/write
3672 * Transfer data from/to the device data register by PIO.
3675 * Inherited from caller.
3678 void ata_pio_data_xfer(struct ata_device *adev, unsigned char *buf,
3679 unsigned int buflen, int write_data)
3681 struct ata_port *ap = adev->ap;
3682 unsigned int words = buflen >> 1;
3684 /* Transfer multiple of 2 bytes */
3686 outsw(ap->ioaddr.data_addr, buf, words);
3688 insw(ap->ioaddr.data_addr, buf, words);
3690 /* Transfer trailing 1 byte, if any. */
3691 if (unlikely(buflen & 0x01)) {
3692 u16 align_buf[1] = { 0 };
3693 unsigned char *trailing_buf = buf + buflen - 1;
3696 memcpy(align_buf, trailing_buf, 1);
3697 outw(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr);
3699 align_buf[0] = cpu_to_le16(inw(ap->ioaddr.data_addr));
3700 memcpy(trailing_buf, align_buf, 1);
3706 * ata_pio_data_xfer_noirq - Transfer data by PIO
3707 * @adev: device to target
3709 * @buflen: buffer length
3710 * @write_data: read/write
3712 * Transfer data from/to the device data register by PIO. Do the
3713 * transfer with interrupts disabled.
3716 * Inherited from caller.
3719 void ata_pio_data_xfer_noirq(struct ata_device *adev, unsigned char *buf,
3720 unsigned int buflen, int write_data)
3722 unsigned long flags;
3723 local_irq_save(flags);
3724 ata_pio_data_xfer(adev, buf, buflen, write_data);
3725 local_irq_restore(flags);
3730 * ata_pio_sector - Transfer ATA_SECT_SIZE (512 bytes) of data.
3731 * @qc: Command on going
3733 * Transfer ATA_SECT_SIZE of data from/to the ATA device.
3736 * Inherited from caller.
3739 static void ata_pio_sector(struct ata_queued_cmd *qc)
3741 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
3742 struct scatterlist *sg = qc->__sg;
3743 struct ata_port *ap = qc->ap;
3745 unsigned int offset;
3748 if (qc->cursect == (qc->nsect - 1))
3749 ap->hsm_task_state = HSM_ST_LAST;
3751 page = sg[qc->cursg].page;
3752 offset = sg[qc->cursg].offset + qc->cursg_ofs * ATA_SECT_SIZE;
3754 /* get the current page and offset */
3755 page = nth_page(page, (offset >> PAGE_SHIFT));
3756 offset %= PAGE_SIZE;
3758 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3760 if (PageHighMem(page)) {
3761 unsigned long flags;
3763 /* FIXME: use a bounce buffer */
3764 local_irq_save(flags);
3765 buf = kmap_atomic(page, KM_IRQ0);
3767 /* do the actual data transfer */
3768 ap->ops->data_xfer(qc->dev, buf + offset, ATA_SECT_SIZE, do_write);
3770 kunmap_atomic(buf, KM_IRQ0);
3771 local_irq_restore(flags);
3773 buf = page_address(page);
3774 ap->ops->data_xfer(qc->dev, buf + offset, ATA_SECT_SIZE, do_write);
3780 if ((qc->cursg_ofs * ATA_SECT_SIZE) == (&sg[qc->cursg])->length) {
3787 * ata_pio_sectors - Transfer one or many 512-byte sectors.
3788 * @qc: Command on going
3790 * Transfer one or many ATA_SECT_SIZE of data from/to the
3791 * ATA device for the DRQ request.
3794 * Inherited from caller.
3797 static void ata_pio_sectors(struct ata_queued_cmd *qc)
3799 if (is_multi_taskfile(&qc->tf)) {
3800 /* READ/WRITE MULTIPLE */
3803 WARN_ON(qc->dev->multi_count == 0);
3805 nsect = min(qc->nsect - qc->cursect, qc->dev->multi_count);
3813 * atapi_send_cdb - Write CDB bytes to hardware
3814 * @ap: Port to which ATAPI device is attached.
3815 * @qc: Taskfile currently active
3817 * When device has indicated its readiness to accept
3818 * a CDB, this function is called. Send the CDB.
3824 static void atapi_send_cdb(struct ata_port *ap, struct ata_queued_cmd *qc)
3827 DPRINTK("send cdb\n");
3828 WARN_ON(qc->dev->cdb_len < 12);
3830 ap->ops->data_xfer(qc->dev, qc->cdb, qc->dev->cdb_len, 1);
3831 ata_altstatus(ap); /* flush */
3833 switch (qc->tf.protocol) {
3834 case ATA_PROT_ATAPI:
3835 ap->hsm_task_state = HSM_ST;
3837 case ATA_PROT_ATAPI_NODATA:
3838 ap->hsm_task_state = HSM_ST_LAST;
3840 case ATA_PROT_ATAPI_DMA:
3841 ap->hsm_task_state = HSM_ST_LAST;
3842 /* initiate bmdma */
3843 ap->ops->bmdma_start(qc);
3849 * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
3850 * @qc: Command on going
3851 * @bytes: number of bytes
3853 * Transfer Transfer data from/to the ATAPI device.
3856 * Inherited from caller.
3860 static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
3862 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
3863 struct scatterlist *sg = qc->__sg;
3864 struct ata_port *ap = qc->ap;
3867 unsigned int offset, count;
3869 if (qc->curbytes + bytes >= qc->nbytes)
3870 ap->hsm_task_state = HSM_ST_LAST;
3873 if (unlikely(qc->cursg >= qc->n_elem)) {
3875 * The end of qc->sg is reached and the device expects
3876 * more data to transfer. In order not to overrun qc->sg
3877 * and fulfill length specified in the byte count register,
3878 * - for read case, discard trailing data from the device
3879 * - for write case, padding zero data to the device
3881 u16 pad_buf[1] = { 0 };
3882 unsigned int words = bytes >> 1;
3885 if (words) /* warning if bytes > 1 */
3886 ata_dev_printk(qc->dev, KERN_WARNING,
3887 "%u bytes trailing data\n", bytes);
3889 for (i = 0; i < words; i++)
3890 ap->ops->data_xfer(qc->dev, (unsigned char*)pad_buf, 2, do_write);
3892 ap->hsm_task_state = HSM_ST_LAST;
3896 sg = &qc->__sg[qc->cursg];
3899 offset = sg->offset + qc->cursg_ofs;
3901 /* get the current page and offset */
3902 page = nth_page(page, (offset >> PAGE_SHIFT));
3903 offset %= PAGE_SIZE;
3905 /* don't overrun current sg */
3906 count = min(sg->length - qc->cursg_ofs, bytes);
3908 /* don't cross page boundaries */
3909 count = min(count, (unsigned int)PAGE_SIZE - offset);
3911 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3913 if (PageHighMem(page)) {
3914 unsigned long flags;
3916 /* FIXME: use bounce buffer */
3917 local_irq_save(flags);
3918 buf = kmap_atomic(page, KM_IRQ0);
3920 /* do the actual data transfer */
3921 ap->ops->data_xfer(qc->dev, buf + offset, count, do_write);
3923 kunmap_atomic(buf, KM_IRQ0);
3924 local_irq_restore(flags);
3926 buf = page_address(page);
3927 ap->ops->data_xfer(qc->dev, buf + offset, count, do_write);
3931 qc->curbytes += count;
3932 qc->cursg_ofs += count;
3934 if (qc->cursg_ofs == sg->length) {
3944 * atapi_pio_bytes - Transfer data from/to the ATAPI device.
3945 * @qc: Command on going
3947 * Transfer Transfer data from/to the ATAPI device.
3950 * Inherited from caller.
3953 static void atapi_pio_bytes(struct ata_queued_cmd *qc)
3955 struct ata_port *ap = qc->ap;
3956 struct ata_device *dev = qc->dev;
3957 unsigned int ireason, bc_lo, bc_hi, bytes;
3958 int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0;
3960 /* Abuse qc->result_tf for temp storage of intermediate TF
3961 * here to save some kernel stack usage.
3962 * For normal completion, qc->result_tf is not relevant. For
3963 * error, qc->result_tf is later overwritten by ata_qc_complete().
3964 * So, the correctness of qc->result_tf is not affected.
3966 ap->ops->tf_read(ap, &qc->result_tf);
3967 ireason = qc->result_tf.nsect;
3968 bc_lo = qc->result_tf.lbam;
3969 bc_hi = qc->result_tf.lbah;
3970 bytes = (bc_hi << 8) | bc_lo;
3972 /* shall be cleared to zero, indicating xfer of data */
3973 if (ireason & (1 << 0))
3976 /* make sure transfer direction matches expected */
3977 i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0;
3978 if (do_write != i_write)
3981 VPRINTK("ata%u: xfering %d bytes\n", ap->id, bytes);
3983 __atapi_pio_bytes(qc, bytes);
3988 ata_dev_printk(dev, KERN_INFO, "ATAPI check failed\n");
3989 qc->err_mask |= AC_ERR_HSM;
3990 ap->hsm_task_state = HSM_ST_ERR;
3994 * ata_hsm_ok_in_wq - Check if the qc can be handled in the workqueue.
3995 * @ap: the target ata_port
3999 * 1 if ok in workqueue, 0 otherwise.
4002 static inline int ata_hsm_ok_in_wq(struct ata_port *ap, struct ata_queued_cmd *qc)
4004 if (qc->tf.flags & ATA_TFLAG_POLLING)
4007 if (ap->hsm_task_state == HSM_ST_FIRST) {
4008 if (qc->tf.protocol == ATA_PROT_PIO &&
4009 (qc->tf.flags & ATA_TFLAG_WRITE))
4012 if (is_atapi_taskfile(&qc->tf) &&
4013 !(qc->dev->flags & ATA_DFLAG_CDB_INTR))
4021 * ata_hsm_qc_complete - finish a qc running on standard HSM
4022 * @qc: Command to complete
4023 * @in_wq: 1 if called from workqueue, 0 otherwise
4025 * Finish @qc which is running on standard HSM.
4028 * If @in_wq is zero, spin_lock_irqsave(host lock).
4029 * Otherwise, none on entry and grabs host lock.
4031 static void ata_hsm_qc_complete(struct ata_queued_cmd *qc, int in_wq)
4033 struct ata_port *ap = qc->ap;
4034 unsigned long flags;
4036 if (ap->ops->error_handler) {
4038 spin_lock_irqsave(ap->lock, flags);
4040 /* EH might have kicked in while host lock is
4043 qc = ata_qc_from_tag(ap, qc->tag);
4045 if (likely(!(qc->err_mask & AC_ERR_HSM))) {
4047 ata_qc_complete(qc);
4049 ata_port_freeze(ap);
4052 spin_unlock_irqrestore(ap->lock, flags);
4054 if (likely(!(qc->err_mask & AC_ERR_HSM)))
4055 ata_qc_complete(qc);
4057 ata_port_freeze(ap);
4061 spin_lock_irqsave(ap->lock, flags);
4063 ata_qc_complete(qc);
4064 spin_unlock_irqrestore(ap->lock, flags);
4066 ata_qc_complete(qc);
4069 ata_altstatus(ap); /* flush */
4073 * ata_hsm_move - move the HSM to the next state.
4074 * @ap: the target ata_port
4076 * @status: current device status
4077 * @in_wq: 1 if called from workqueue, 0 otherwise
4080 * 1 when poll next status needed, 0 otherwise.
4082 int ata_hsm_move(struct ata_port *ap, struct ata_queued_cmd *qc,
4083 u8 status, int in_wq)
4085 unsigned long flags = 0;
4088 WARN_ON((qc->flags & ATA_QCFLAG_ACTIVE) == 0);
4090 /* Make sure ata_qc_issue_prot() does not throw things
4091 * like DMA polling into the workqueue. Notice that
4092 * in_wq is not equivalent to (qc->tf.flags & ATA_TFLAG_POLLING).
4094 WARN_ON(in_wq != ata_hsm_ok_in_wq(ap, qc));
4097 DPRINTK("ata%u: protocol %d task_state %d (dev_stat 0x%X)\n",
4098 ap->id, qc->tf.protocol, ap->hsm_task_state, status);
4100 switch (ap->hsm_task_state) {
4102 /* Send first data block or PACKET CDB */
4104 /* If polling, we will stay in the work queue after
4105 * sending the data. Otherwise, interrupt handler
4106 * takes over after sending the data.
4108 poll_next = (qc->tf.flags & ATA_TFLAG_POLLING);
4110 /* check device status */
4111 if (unlikely((status & ATA_DRQ) == 0)) {
4112 /* handle BSY=0, DRQ=0 as error */
4113 if (likely(status & (ATA_ERR | ATA_DF)))
4114 /* device stops HSM for abort/error */
4115 qc->err_mask |= AC_ERR_DEV;
4117 /* HSM violation. Let EH handle this */
4118 qc->err_mask |= AC_ERR_HSM;
4120 ap->hsm_task_state = HSM_ST_ERR;
4124 /* Device should not ask for data transfer (DRQ=1)
4125 * when it finds something wrong.
4126 * We ignore DRQ here and stop the HSM by
4127 * changing hsm_task_state to HSM_ST_ERR and
4128 * let the EH abort the command or reset the device.
4130 if (unlikely(status & (ATA_ERR | ATA_DF))) {
4131 printk(KERN_WARNING "ata%d: DRQ=1 with device error, dev_stat 0x%X\n",
4133 qc->err_mask |= AC_ERR_HSM;
4134 ap->hsm_task_state = HSM_ST_ERR;
4138 /* Send the CDB (atapi) or the first data block (ata pio out).
4139 * During the state transition, interrupt handler shouldn't
4140 * be invoked before the data transfer is complete and
4141 * hsm_task_state is changed. Hence, the following locking.
4144 spin_lock_irqsave(ap->lock, flags);
4146 if (qc->tf.protocol == ATA_PROT_PIO) {
4147 /* PIO data out protocol.
4148 * send first data block.
4151 /* ata_pio_sectors() might change the state
4152 * to HSM_ST_LAST. so, the state is changed here
4153 * before ata_pio_sectors().
4155 ap->hsm_task_state = HSM_ST;
4156 ata_pio_sectors(qc);
4157 ata_altstatus(ap); /* flush */
4160 atapi_send_cdb(ap, qc);
4163 spin_unlock_irqrestore(ap->lock, flags);
4165 /* if polling, ata_pio_task() handles the rest.
4166 * otherwise, interrupt handler takes over from here.
4171 /* complete command or read/write the data register */
4172 if (qc->tf.protocol == ATA_PROT_ATAPI) {
4173 /* ATAPI PIO protocol */
4174 if ((status & ATA_DRQ) == 0) {
4175 /* No more data to transfer or device error.
4176 * Device error will be tagged in HSM_ST_LAST.
4178 ap->hsm_task_state = HSM_ST_LAST;
4182 /* Device should not ask for data transfer (DRQ=1)
4183 * when it finds something wrong.
4184 * We ignore DRQ here and stop the HSM by
4185 * changing hsm_task_state to HSM_ST_ERR and
4186 * let the EH abort the command or reset the device.
4188 if (unlikely(status & (ATA_ERR | ATA_DF))) {
4189 printk(KERN_WARNING "ata%d: DRQ=1 with device error, dev_stat 0x%X\n",
4191 qc->err_mask |= AC_ERR_HSM;
4192 ap->hsm_task_state = HSM_ST_ERR;
4196 atapi_pio_bytes(qc);
4198 if (unlikely(ap->hsm_task_state == HSM_ST_ERR))
4199 /* bad ireason reported by device */
4203 /* ATA PIO protocol */
4204 if (unlikely((status & ATA_DRQ) == 0)) {
4205 /* handle BSY=0, DRQ=0 as error */
4206 if (likely(status & (ATA_ERR | ATA_DF)))
4207 /* device stops HSM for abort/error */
4208 qc->err_mask |= AC_ERR_DEV;
4210 /* HSM violation. Let EH handle this */
4211 qc->err_mask |= AC_ERR_HSM;
4213 ap->hsm_task_state = HSM_ST_ERR;
4217 /* For PIO reads, some devices may ask for
4218 * data transfer (DRQ=1) alone with ERR=1.
4219 * We respect DRQ here and transfer one
4220 * block of junk data before changing the
4221 * hsm_task_state to HSM_ST_ERR.
4223 * For PIO writes, ERR=1 DRQ=1 doesn't make
4224 * sense since the data block has been
4225 * transferred to the device.
4227 if (unlikely(status & (ATA_ERR | ATA_DF))) {
4228 /* data might be corrputed */
4229 qc->err_mask |= AC_ERR_DEV;
4231 if (!(qc->tf.flags & ATA_TFLAG_WRITE)) {
4232 ata_pio_sectors(qc);
4234 status = ata_wait_idle(ap);
4237 if (status & (ATA_BUSY | ATA_DRQ))
4238 qc->err_mask |= AC_ERR_HSM;
4240 /* ata_pio_sectors() might change the
4241 * state to HSM_ST_LAST. so, the state
4242 * is changed after ata_pio_sectors().
4244 ap->hsm_task_state = HSM_ST_ERR;
4248 ata_pio_sectors(qc);
4250 if (ap->hsm_task_state == HSM_ST_LAST &&
4251 (!(qc->tf.flags & ATA_TFLAG_WRITE))) {
4254 status = ata_wait_idle(ap);
4259 ata_altstatus(ap); /* flush */
4264 if (unlikely(!ata_ok(status))) {
4265 qc->err_mask |= __ac_err_mask(status);
4266 ap->hsm_task_state = HSM_ST_ERR;
4270 /* no more data to transfer */
4271 DPRINTK("ata%u: dev %u command complete, drv_stat 0x%x\n",
4272 ap->id, qc->dev->devno, status);
4274 WARN_ON(qc->err_mask);
4276 ap->hsm_task_state = HSM_ST_IDLE;
4278 /* complete taskfile transaction */
4279 ata_hsm_qc_complete(qc, in_wq);
4285 /* make sure qc->err_mask is available to
4286 * know what's wrong and recover
4288 WARN_ON(qc->err_mask == 0);
4290 ap->hsm_task_state = HSM_ST_IDLE;
4292 /* complete taskfile transaction */
4293 ata_hsm_qc_complete(qc, in_wq);
4305 static void ata_pio_task(void *_data)
4307 struct ata_queued_cmd *qc = _data;
4308 struct ata_port *ap = qc->ap;
4313 WARN_ON(ap->hsm_task_state == HSM_ST_IDLE);
4316 * This is purely heuristic. This is a fast path.
4317 * Sometimes when we enter, BSY will be cleared in
4318 * a chk-status or two. If not, the drive is probably seeking
4319 * or something. Snooze for a couple msecs, then
4320 * chk-status again. If still busy, queue delayed work.
4322 status = ata_busy_wait(ap, ATA_BUSY, 5);
4323 if (status & ATA_BUSY) {
4325 status = ata_busy_wait(ap, ATA_BUSY, 10);
4326 if (status & ATA_BUSY) {
4327 ata_port_queue_task(ap, ata_pio_task, qc, ATA_SHORT_PAUSE);
4333 poll_next = ata_hsm_move(ap, qc, status, 1);
4335 /* another command or interrupt handler
4336 * may be running at this point.
4343 * ata_qc_new - Request an available ATA command, for queueing
4344 * @ap: Port associated with device @dev
4345 * @dev: Device from whom we request an available command structure
4351 static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap)
4353 struct ata_queued_cmd *qc = NULL;
4356 /* no command while frozen */
4357 if (unlikely(ap->pflags & ATA_PFLAG_FROZEN))
4360 /* the last tag is reserved for internal command. */
4361 for (i = 0; i < ATA_MAX_QUEUE - 1; i++)
4362 if (!test_and_set_bit(i, &ap->qc_allocated)) {
4363 qc = __ata_qc_from_tag(ap, i);
4374 * ata_qc_new_init - Request an available ATA command, and initialize it
4375 * @dev: Device from whom we request an available command structure
4381 struct ata_queued_cmd *ata_qc_new_init(struct ata_device *dev)
4383 struct ata_port *ap = dev->ap;
4384 struct ata_queued_cmd *qc;
4386 qc = ata_qc_new(ap);
4399 * ata_qc_free - free unused ata_queued_cmd
4400 * @qc: Command to complete
4402 * Designed to free unused ata_queued_cmd object
4403 * in case something prevents using it.
4406 * spin_lock_irqsave(host lock)
4408 void ata_qc_free(struct ata_queued_cmd *qc)
4410 struct ata_port *ap = qc->ap;
4413 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
4417 if (likely(ata_tag_valid(tag))) {
4418 qc->tag = ATA_TAG_POISON;
4419 clear_bit(tag, &ap->qc_allocated);
4423 void __ata_qc_complete(struct ata_queued_cmd *qc)
4425 struct ata_port *ap = qc->ap;
4427 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
4428 WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE));
4430 if (likely(qc->flags & ATA_QCFLAG_DMAMAP))
4433 /* command should be marked inactive atomically with qc completion */
4434 if (qc->tf.protocol == ATA_PROT_NCQ)
4435 ap->sactive &= ~(1 << qc->tag);
4437 ap->active_tag = ATA_TAG_POISON;
4439 /* atapi: mark qc as inactive to prevent the interrupt handler
4440 * from completing the command twice later, before the error handler
4441 * is called. (when rc != 0 and atapi request sense is needed)
4443 qc->flags &= ~ATA_QCFLAG_ACTIVE;
4444 ap->qc_active &= ~(1 << qc->tag);
4446 /* call completion callback */
4447 qc->complete_fn(qc);
4451 * ata_qc_complete - Complete an active ATA command
4452 * @qc: Command to complete
4453 * @err_mask: ATA Status register contents
4455 * Indicate to the mid and upper layers that an ATA
4456 * command has completed, with either an ok or not-ok status.
4459 * spin_lock_irqsave(host lock)
4461 void ata_qc_complete(struct ata_queued_cmd *qc)
4463 struct ata_port *ap = qc->ap;
4465 /* XXX: New EH and old EH use different mechanisms to
4466 * synchronize EH with regular execution path.
4468 * In new EH, a failed qc is marked with ATA_QCFLAG_FAILED.
4469 * Normal execution path is responsible for not accessing a
4470 * failed qc. libata core enforces the rule by returning NULL
4471 * from ata_qc_from_tag() for failed qcs.
4473 * Old EH depends on ata_qc_complete() nullifying completion
4474 * requests if ATA_QCFLAG_EH_SCHEDULED is set. Old EH does
4475 * not synchronize with interrupt handler. Only PIO task is
4478 if (ap->ops->error_handler) {
4479 WARN_ON(ap->pflags & ATA_PFLAG_FROZEN);
4481 if (unlikely(qc->err_mask))
4482 qc->flags |= ATA_QCFLAG_FAILED;
4484 if (unlikely(qc->flags & ATA_QCFLAG_FAILED)) {
4485 if (!ata_tag_internal(qc->tag)) {
4486 /* always fill result TF for failed qc */
4487 ap->ops->tf_read(ap, &qc->result_tf);
4488 ata_qc_schedule_eh(qc);
4493 /* read result TF if requested */
4494 if (qc->flags & ATA_QCFLAG_RESULT_TF)
4495 ap->ops->tf_read(ap, &qc->result_tf);
4497 __ata_qc_complete(qc);
4499 if (qc->flags & ATA_QCFLAG_EH_SCHEDULED)
4502 /* read result TF if failed or requested */
4503 if (qc->err_mask || qc->flags & ATA_QCFLAG_RESULT_TF)
4504 ap->ops->tf_read(ap, &qc->result_tf);
4506 __ata_qc_complete(qc);
4511 * ata_qc_complete_multiple - Complete multiple qcs successfully
4512 * @ap: port in question
4513 * @qc_active: new qc_active mask
4514 * @finish_qc: LLDD callback invoked before completing a qc
4516 * Complete in-flight commands. This functions is meant to be
4517 * called from low-level driver's interrupt routine to complete
4518 * requests normally. ap->qc_active and @qc_active is compared
4519 * and commands are completed accordingly.
4522 * spin_lock_irqsave(host lock)
4525 * Number of completed commands on success, -errno otherwise.
4527 int ata_qc_complete_multiple(struct ata_port *ap, u32 qc_active,
4528 void (*finish_qc)(struct ata_queued_cmd *))
4534 done_mask = ap->qc_active ^ qc_active;
4536 if (unlikely(done_mask & qc_active)) {
4537 ata_port_printk(ap, KERN_ERR, "illegal qc_active transition "
4538 "(%08x->%08x)\n", ap->qc_active, qc_active);
4542 for (i = 0; i < ATA_MAX_QUEUE; i++) {
4543 struct ata_queued_cmd *qc;
4545 if (!(done_mask & (1 << i)))
4548 if ((qc = ata_qc_from_tag(ap, i))) {
4551 ata_qc_complete(qc);
4559 static inline int ata_should_dma_map(struct ata_queued_cmd *qc)
4561 struct ata_port *ap = qc->ap;
4563 switch (qc->tf.protocol) {
4566 case ATA_PROT_ATAPI_DMA:
4569 case ATA_PROT_ATAPI:
4571 if (ap->flags & ATA_FLAG_PIO_DMA)
4584 * ata_qc_issue - issue taskfile to device
4585 * @qc: command to issue to device
4587 * Prepare an ATA command to submission to device.
4588 * This includes mapping the data into a DMA-able
4589 * area, filling in the S/G table, and finally
4590 * writing the taskfile to hardware, starting the command.
4593 * spin_lock_irqsave(host lock)
4595 void ata_qc_issue(struct ata_queued_cmd *qc)
4597 struct ata_port *ap = qc->ap;
4599 /* Make sure only one non-NCQ command is outstanding. The
4600 * check is skipped for old EH because it reuses active qc to
4601 * request ATAPI sense.
4603 WARN_ON(ap->ops->error_handler && ata_tag_valid(ap->active_tag));
4605 if (qc->tf.protocol == ATA_PROT_NCQ) {
4606 WARN_ON(ap->sactive & (1 << qc->tag));
4607 ap->sactive |= 1 << qc->tag;
4609 WARN_ON(ap->sactive);
4610 ap->active_tag = qc->tag;
4613 qc->flags |= ATA_QCFLAG_ACTIVE;
4614 ap->qc_active |= 1 << qc->tag;
4616 if (ata_should_dma_map(qc)) {
4617 if (qc->flags & ATA_QCFLAG_SG) {
4618 if (ata_sg_setup(qc))
4620 } else if (qc->flags & ATA_QCFLAG_SINGLE) {
4621 if (ata_sg_setup_one(qc))
4625 qc->flags &= ~ATA_QCFLAG_DMAMAP;
4628 ap->ops->qc_prep(qc);
4630 qc->err_mask |= ap->ops->qc_issue(qc);
4631 if (unlikely(qc->err_mask))
4636 qc->flags &= ~ATA_QCFLAG_DMAMAP;
4637 qc->err_mask |= AC_ERR_SYSTEM;
4639 ata_qc_complete(qc);
4643 * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner
4644 * @qc: command to issue to device
4646 * Using various libata functions and hooks, this function
4647 * starts an ATA command. ATA commands are grouped into
4648 * classes called "protocols", and issuing each type of protocol
4649 * is slightly different.
4651 * May be used as the qc_issue() entry in ata_port_operations.
4654 * spin_lock_irqsave(host lock)
4657 * Zero on success, AC_ERR_* mask on failure
4660 unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc)
4662 struct ata_port *ap = qc->ap;
4664 /* Use polling pio if the LLD doesn't handle
4665 * interrupt driven pio and atapi CDB interrupt.
4667 if (ap->flags & ATA_FLAG_PIO_POLLING) {
4668 switch (qc->tf.protocol) {
4670 case ATA_PROT_ATAPI:
4671 case ATA_PROT_ATAPI_NODATA:
4672 qc->tf.flags |= ATA_TFLAG_POLLING;
4674 case ATA_PROT_ATAPI_DMA:
4675 if (qc->dev->flags & ATA_DFLAG_CDB_INTR)
4676 /* see ata_dma_blacklisted() */
4684 /* select the device */
4685 ata_dev_select(ap, qc->dev->devno, 1, 0);
4687 /* start the command */
4688 switch (qc->tf.protocol) {
4689 case ATA_PROT_NODATA:
4690 if (qc->tf.flags & ATA_TFLAG_POLLING)
4691 ata_qc_set_polling(qc);
4693 ata_tf_to_host(ap, &qc->tf);
4694 ap->hsm_task_state = HSM_ST_LAST;
4696 if (qc->tf.flags & ATA_TFLAG_POLLING)
4697 ata_port_queue_task(ap, ata_pio_task, qc, 0);
4702 WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING);
4704 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
4705 ap->ops->bmdma_setup(qc); /* set up bmdma */
4706 ap->ops->bmdma_start(qc); /* initiate bmdma */
4707 ap->hsm_task_state = HSM_ST_LAST;
4711 if (qc->tf.flags & ATA_TFLAG_POLLING)
4712 ata_qc_set_polling(qc);
4714 ata_tf_to_host(ap, &qc->tf);
4716 if (qc->tf.flags & ATA_TFLAG_WRITE) {
4717 /* PIO data out protocol */
4718 ap->hsm_task_state = HSM_ST_FIRST;
4719 ata_port_queue_task(ap, ata_pio_task, qc, 0);
4721 /* always send first data block using
4722 * the ata_pio_task() codepath.
4725 /* PIO data in protocol */
4726 ap->hsm_task_state = HSM_ST;
4728 if (qc->tf.flags & ATA_TFLAG_POLLING)
4729 ata_port_queue_task(ap, ata_pio_task, qc, 0);
4731 /* if polling, ata_pio_task() handles the rest.
4732 * otherwise, interrupt handler takes over from here.
4738 case ATA_PROT_ATAPI:
4739 case ATA_PROT_ATAPI_NODATA:
4740 if (qc->tf.flags & ATA_TFLAG_POLLING)
4741 ata_qc_set_polling(qc);
4743 ata_tf_to_host(ap, &qc->tf);
4745 ap->hsm_task_state = HSM_ST_FIRST;
4747 /* send cdb by polling if no cdb interrupt */
4748 if ((!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) ||
4749 (qc->tf.flags & ATA_TFLAG_POLLING))
4750 ata_port_queue_task(ap, ata_pio_task, qc, 0);
4753 case ATA_PROT_ATAPI_DMA:
4754 WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING);
4756 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
4757 ap->ops->bmdma_setup(qc); /* set up bmdma */
4758 ap->hsm_task_state = HSM_ST_FIRST;
4760 /* send cdb by polling if no cdb interrupt */
4761 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
4762 ata_port_queue_task(ap, ata_pio_task, qc, 0);
4767 return AC_ERR_SYSTEM;
4774 * ata_host_intr - Handle host interrupt for given (port, task)
4775 * @ap: Port on which interrupt arrived (possibly...)
4776 * @qc: Taskfile currently active in engine
4778 * Handle host interrupt for given queued command. Currently,
4779 * only DMA interrupts are handled. All other commands are
4780 * handled via polling with interrupts disabled (nIEN bit).
4783 * spin_lock_irqsave(host lock)
4786 * One if interrupt was handled, zero if not (shared irq).
4789 inline unsigned int ata_host_intr (struct ata_port *ap,
4790 struct ata_queued_cmd *qc)
4792 u8 status, host_stat = 0;
4794 VPRINTK("ata%u: protocol %d task_state %d\n",
4795 ap->id, qc->tf.protocol, ap->hsm_task_state);
4797 /* Check whether we are expecting interrupt in this state */
4798 switch (ap->hsm_task_state) {
4800 /* Some pre-ATAPI-4 devices assert INTRQ
4801 * at this state when ready to receive CDB.
4804 /* Check the ATA_DFLAG_CDB_INTR flag is enough here.
4805 * The flag was turned on only for atapi devices.
4806 * No need to check is_atapi_taskfile(&qc->tf) again.
4808 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
4812 if (qc->tf.protocol == ATA_PROT_DMA ||
4813 qc->tf.protocol == ATA_PROT_ATAPI_DMA) {
4814 /* check status of DMA engine */
4815 host_stat = ap->ops->bmdma_status(ap);
4816 VPRINTK("ata%u: host_stat 0x%X\n", ap->id, host_stat);
4818 /* if it's not our irq... */
4819 if (!(host_stat & ATA_DMA_INTR))
4822 /* before we do anything else, clear DMA-Start bit */
4823 ap->ops->bmdma_stop(qc);
4825 if (unlikely(host_stat & ATA_DMA_ERR)) {
4826 /* error when transfering data to/from memory */
4827 qc->err_mask |= AC_ERR_HOST_BUS;
4828 ap->hsm_task_state = HSM_ST_ERR;
4838 /* check altstatus */
4839 status = ata_altstatus(ap);
4840 if (status & ATA_BUSY)
4843 /* check main status, clearing INTRQ */
4844 status = ata_chk_status(ap);
4845 if (unlikely(status & ATA_BUSY))
4848 /* ack bmdma irq events */
4849 ap->ops->irq_clear(ap);
4851 ata_hsm_move(ap, qc, status, 0);
4852 return 1; /* irq handled */
4855 ap->stats.idle_irq++;
4858 if ((ap->stats.idle_irq % 1000) == 0) {
4859 ata_irq_ack(ap, 0); /* debug trap */
4860 ata_port_printk(ap, KERN_WARNING, "irq trap\n");
4864 return 0; /* irq not handled */
4868 * ata_interrupt - Default ATA host interrupt handler
4869 * @irq: irq line (unused)
4870 * @dev_instance: pointer to our ata_host information structure
4872 * Default interrupt handler for PCI IDE devices. Calls
4873 * ata_host_intr() for each port that is not disabled.
4876 * Obtains host lock during operation.
4879 * IRQ_NONE or IRQ_HANDLED.
4882 irqreturn_t ata_interrupt (int irq, void *dev_instance)
4884 struct ata_host *host = dev_instance;
4886 unsigned int handled = 0;
4887 unsigned long flags;
4889 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
4890 spin_lock_irqsave(&host->lock, flags);
4892 for (i = 0; i < host->n_ports; i++) {
4893 struct ata_port *ap;
4895 ap = host->ports[i];
4897 !(ap->flags & ATA_FLAG_DISABLED)) {
4898 struct ata_queued_cmd *qc;
4900 qc = ata_qc_from_tag(ap, ap->active_tag);
4901 if (qc && (!(qc->tf.flags & ATA_TFLAG_POLLING)) &&
4902 (qc->flags & ATA_QCFLAG_ACTIVE))
4903 handled |= ata_host_intr(ap, qc);
4907 spin_unlock_irqrestore(&host->lock, flags);
4909 return IRQ_RETVAL(handled);
4913 * sata_scr_valid - test whether SCRs are accessible
4914 * @ap: ATA port to test SCR accessibility for
4916 * Test whether SCRs are accessible for @ap.
4922 * 1 if SCRs are accessible, 0 otherwise.
4924 int sata_scr_valid(struct ata_port *ap)
4926 return ap->cbl == ATA_CBL_SATA && ap->ops->scr_read;
4930 * sata_scr_read - read SCR register of the specified port
4931 * @ap: ATA port to read SCR for
4933 * @val: Place to store read value
4935 * Read SCR register @reg of @ap into *@val. This function is
4936 * guaranteed to succeed if the cable type of the port is SATA
4937 * and the port implements ->scr_read.
4943 * 0 on success, negative errno on failure.
4945 int sata_scr_read(struct ata_port *ap, int reg, u32 *val)
4947 if (sata_scr_valid(ap)) {
4948 *val = ap->ops->scr_read(ap, reg);
4955 * sata_scr_write - write SCR register of the specified port
4956 * @ap: ATA port to write SCR for
4957 * @reg: SCR to write
4958 * @val: value to write
4960 * Write @val to SCR register @reg of @ap. This function is
4961 * guaranteed to succeed if the cable type of the port is SATA
4962 * and the port implements ->scr_read.
4968 * 0 on success, negative errno on failure.
4970 int sata_scr_write(struct ata_port *ap, int reg, u32 val)
4972 if (sata_scr_valid(ap)) {
4973 ap->ops->scr_write(ap, reg, val);
4980 * sata_scr_write_flush - write SCR register of the specified port and flush
4981 * @ap: ATA port to write SCR for
4982 * @reg: SCR to write
4983 * @val: value to write
4985 * This function is identical to sata_scr_write() except that this
4986 * function performs flush after writing to the register.
4992 * 0 on success, negative errno on failure.
4994 int sata_scr_write_flush(struct ata_port *ap, int reg, u32 val)
4996 if (sata_scr_valid(ap)) {
4997 ap->ops->scr_write(ap, reg, val);
4998 ap->ops->scr_read(ap, reg);
5005 * ata_port_online - test whether the given port is online
5006 * @ap: ATA port to test
5008 * Test whether @ap is online. Note that this function returns 0
5009 * if online status of @ap cannot be obtained, so
5010 * ata_port_online(ap) != !ata_port_offline(ap).
5016 * 1 if the port online status is available and online.
5018 int ata_port_online(struct ata_port *ap)
5022 if (!sata_scr_read(ap, SCR_STATUS, &sstatus) && (sstatus & 0xf) == 0x3)
5028 * ata_port_offline - test whether the given port is offline
5029 * @ap: ATA port to test
5031 * Test whether @ap is offline. Note that this function returns
5032 * 0 if offline status of @ap cannot be obtained, so
5033 * ata_port_online(ap) != !ata_port_offline(ap).
5039 * 1 if the port offline status is available and offline.
5041 int ata_port_offline(struct ata_port *ap)
5045 if (!sata_scr_read(ap, SCR_STATUS, &sstatus) && (sstatus & 0xf) != 0x3)
5050 int ata_flush_cache(struct ata_device *dev)
5052 unsigned int err_mask;
5055 if (!ata_try_flush_cache(dev))
5058 if (ata_id_has_flush_ext(dev->id))
5059 cmd = ATA_CMD_FLUSH_EXT;
5061 cmd = ATA_CMD_FLUSH;
5063 err_mask = ata_do_simple_cmd(dev, cmd);
5065 ata_dev_printk(dev, KERN_ERR, "failed to flush cache\n");
5072 static int ata_host_request_pm(struct ata_host *host, pm_message_t mesg,
5073 unsigned int action, unsigned int ehi_flags,
5076 unsigned long flags;
5079 for (i = 0; i < host->n_ports; i++) {
5080 struct ata_port *ap = host->ports[i];
5082 /* Previous resume operation might still be in
5083 * progress. Wait for PM_PENDING to clear.
5085 if (ap->pflags & ATA_PFLAG_PM_PENDING) {
5086 ata_port_wait_eh(ap);
5087 WARN_ON(ap->pflags & ATA_PFLAG_PM_PENDING);
5090 /* request PM ops to EH */
5091 spin_lock_irqsave(ap->lock, flags);
5096 ap->pm_result = &rc;
5099 ap->pflags |= ATA_PFLAG_PM_PENDING;
5100 ap->eh_info.action |= action;
5101 ap->eh_info.flags |= ehi_flags;
5103 ata_port_schedule_eh(ap);
5105 spin_unlock_irqrestore(ap->lock, flags);
5107 /* wait and check result */
5109 ata_port_wait_eh(ap);
5110 WARN_ON(ap->pflags & ATA_PFLAG_PM_PENDING);
5120 * ata_host_suspend - suspend host
5121 * @host: host to suspend
5124 * Suspend @host. Actual operation is performed by EH. This
5125 * function requests EH to perform PM operations and waits for EH
5129 * Kernel thread context (may sleep).
5132 * 0 on success, -errno on failure.
5134 int ata_host_suspend(struct ata_host *host, pm_message_t mesg)
5138 rc = ata_host_request_pm(host, mesg, 0, ATA_EHI_QUIET, 1);
5142 /* EH is quiescent now. Fail if we have any ready device.
5143 * This happens if hotplug occurs between completion of device
5144 * suspension and here.
5146 for (i = 0; i < host->n_ports; i++) {
5147 struct ata_port *ap = host->ports[i];
5149 for (j = 0; j < ATA_MAX_DEVICES; j++) {
5150 struct ata_device *dev = &ap->device[j];
5152 if (ata_dev_ready(dev)) {
5153 ata_port_printk(ap, KERN_WARNING,
5154 "suspend failed, device %d "
5155 "still active\n", dev->devno);
5162 host->dev->power.power_state = mesg;
5166 ata_host_resume(host);
5171 * ata_host_resume - resume host
5172 * @host: host to resume
5174 * Resume @host. Actual operation is performed by EH. This
5175 * function requests EH to perform PM operations and returns.
5176 * Note that all resume operations are performed parallely.
5179 * Kernel thread context (may sleep).
5181 void ata_host_resume(struct ata_host *host)
5183 ata_host_request_pm(host, PMSG_ON, ATA_EH_SOFTRESET,
5184 ATA_EHI_NO_AUTOPSY | ATA_EHI_QUIET, 0);
5185 host->dev->power.power_state = PMSG_ON;
5189 * ata_port_start - Set port up for dma.
5190 * @ap: Port to initialize
5192 * Called just after data structures for each port are
5193 * initialized. Allocates space for PRD table.
5195 * May be used as the port_start() entry in ata_port_operations.
5198 * Inherited from caller.
5201 int ata_port_start (struct ata_port *ap)
5203 struct device *dev = ap->dev;
5206 ap->prd = dma_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma, GFP_KERNEL);
5210 rc = ata_pad_alloc(ap, dev);
5212 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
5216 DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd, (unsigned long long) ap->prd_dma);
5223 * ata_port_stop - Undo ata_port_start()
5224 * @ap: Port to shut down
5226 * Frees the PRD table.
5228 * May be used as the port_stop() entry in ata_port_operations.
5231 * Inherited from caller.
5234 void ata_port_stop (struct ata_port *ap)
5236 struct device *dev = ap->dev;
5238 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
5239 ata_pad_free(ap, dev);
5242 void ata_host_stop (struct ata_host *host)
5244 if (host->mmio_base)
5245 iounmap(host->mmio_base);
5249 * ata_dev_init - Initialize an ata_device structure
5250 * @dev: Device structure to initialize
5252 * Initialize @dev in preparation for probing.
5255 * Inherited from caller.
5257 void ata_dev_init(struct ata_device *dev)
5259 struct ata_port *ap = dev->ap;
5260 unsigned long flags;
5262 /* SATA spd limit is bound to the first device */
5263 ap->sata_spd_limit = ap->hw_sata_spd_limit;
5265 /* High bits of dev->flags are used to record warm plug
5266 * requests which occur asynchronously. Synchronize using
5269 spin_lock_irqsave(ap->lock, flags);
5270 dev->flags &= ~ATA_DFLAG_INIT_MASK;
5271 spin_unlock_irqrestore(ap->lock, flags);
5273 memset((void *)dev + ATA_DEVICE_CLEAR_OFFSET, 0,
5274 sizeof(*dev) - ATA_DEVICE_CLEAR_OFFSET);
5275 dev->pio_mask = UINT_MAX;
5276 dev->mwdma_mask = UINT_MAX;
5277 dev->udma_mask = UINT_MAX;
5281 * ata_port_init - Initialize an ata_port structure
5282 * @ap: Structure to initialize
5283 * @host: Collection of hosts to which @ap belongs
5284 * @ent: Probe information provided by low-level driver
5285 * @port_no: Port number associated with this ata_port
5287 * Initialize a new ata_port structure.
5290 * Inherited from caller.
5292 void ata_port_init(struct ata_port *ap, struct ata_host *host,
5293 const struct ata_probe_ent *ent, unsigned int port_no)
5297 ap->lock = &host->lock;
5298 ap->flags = ATA_FLAG_DISABLED;
5299 ap->id = ata_unique_id++;
5300 ap->ctl = ATA_DEVCTL_OBS;
5303 ap->port_no = port_no;
5304 if (port_no == 1 && ent->pinfo2) {
5305 ap->pio_mask = ent->pinfo2->pio_mask;
5306 ap->mwdma_mask = ent->pinfo2->mwdma_mask;
5307 ap->udma_mask = ent->pinfo2->udma_mask;
5308 ap->flags |= ent->pinfo2->flags;
5309 ap->ops = ent->pinfo2->port_ops;
5311 ap->pio_mask = ent->pio_mask;
5312 ap->mwdma_mask = ent->mwdma_mask;
5313 ap->udma_mask = ent->udma_mask;
5314 ap->flags |= ent->port_flags;
5315 ap->ops = ent->port_ops;
5317 ap->hw_sata_spd_limit = UINT_MAX;
5318 ap->active_tag = ATA_TAG_POISON;
5319 ap->last_ctl = 0xFF;
5321 #if defined(ATA_VERBOSE_DEBUG)
5322 /* turn on all debugging levels */
5323 ap->msg_enable = 0x00FF;
5324 #elif defined(ATA_DEBUG)
5325 ap->msg_enable = ATA_MSG_DRV | ATA_MSG_INFO | ATA_MSG_CTL | ATA_MSG_WARN | ATA_MSG_ERR;
5327 ap->msg_enable = ATA_MSG_DRV | ATA_MSG_ERR | ATA_MSG_WARN;
5330 INIT_WORK(&ap->port_task, NULL, NULL);
5331 INIT_WORK(&ap->hotplug_task, ata_scsi_hotplug, ap);
5332 INIT_WORK(&ap->scsi_rescan_task, ata_scsi_dev_rescan, ap);
5333 INIT_LIST_HEAD(&ap->eh_done_q);
5334 init_waitqueue_head(&ap->eh_wait_q);
5336 /* set cable type */
5337 ap->cbl = ATA_CBL_NONE;
5338 if (ap->flags & ATA_FLAG_SATA)
5339 ap->cbl = ATA_CBL_SATA;
5341 for (i = 0; i < ATA_MAX_DEVICES; i++) {
5342 struct ata_device *dev = &ap->device[i];
5349 ap->stats.unhandled_irq = 1;
5350 ap->stats.idle_irq = 1;
5353 memcpy(&ap->ioaddr, &ent->port[port_no], sizeof(struct ata_ioports));
5357 * ata_port_init_shost - Initialize SCSI host associated with ATA port
5358 * @ap: ATA port to initialize SCSI host for
5359 * @shost: SCSI host associated with @ap
5361 * Initialize SCSI host @shost associated with ATA port @ap.
5364 * Inherited from caller.
5366 static void ata_port_init_shost(struct ata_port *ap, struct Scsi_Host *shost)
5368 ap->scsi_host = shost;
5370 shost->unique_id = ap->id;
5373 shost->max_channel = 1;
5374 shost->max_cmd_len = 12;
5378 * ata_port_add - Attach low-level ATA driver to system
5379 * @ent: Information provided by low-level driver
5380 * @host: Collections of ports to which we add
5381 * @port_no: Port number associated with this host
5383 * Attach low-level ATA driver to system.
5386 * PCI/etc. bus probe sem.
5389 * New ata_port on success, for NULL on error.
5391 static struct ata_port * ata_port_add(const struct ata_probe_ent *ent,
5392 struct ata_host *host,
5393 unsigned int port_no)
5395 struct Scsi_Host *shost;
5396 struct ata_port *ap;
5400 if (!ent->port_ops->error_handler &&
5401 !(ent->port_flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST))) {
5402 printk(KERN_ERR "ata%u: no reset mechanism available\n",
5407 shost = scsi_host_alloc(ent->sht, sizeof(struct ata_port));
5411 shost->transportt = &ata_scsi_transport_template;
5413 ap = ata_shost_to_port(shost);
5415 ata_port_init(ap, host, ent, port_no);
5416 ata_port_init_shost(ap, shost);
5422 * ata_sas_host_init - Initialize a host struct
5423 * @host: host to initialize
5424 * @dev: device host is attached to
5425 * @flags: host flags
5429 * PCI/etc. bus probe sem.
5433 void ata_host_init(struct ata_host *host, struct device *dev,
5434 unsigned long flags, const struct ata_port_operations *ops)
5436 spin_lock_init(&host->lock);
5438 host->flags = flags;
5443 * ata_device_add - Register hardware device with ATA and SCSI layers
5444 * @ent: Probe information describing hardware device to be registered
5446 * This function processes the information provided in the probe
5447 * information struct @ent, allocates the necessary ATA and SCSI
5448 * host information structures, initializes them, and registers
5449 * everything with requisite kernel subsystems.
5451 * This function requests irqs, probes the ATA bus, and probes
5455 * PCI/etc. bus probe sem.
5458 * Number of ports registered. Zero on error (no ports registered).
5460 int ata_device_add(const struct ata_probe_ent *ent)
5463 struct device *dev = ent->dev;
5464 struct ata_host *host;
5469 if (ent->irq == 0) {
5470 dev_printk(KERN_ERR, dev, "is not available: No interrupt assigned.\n");
5473 /* alloc a container for our list of ATA ports (buses) */
5474 host = kzalloc(sizeof(struct ata_host) +
5475 (ent->n_ports * sizeof(void *)), GFP_KERNEL);
5479 ata_host_init(host, dev, ent->_host_flags, ent->port_ops);
5480 host->n_ports = ent->n_ports;
5481 host->irq = ent->irq;
5482 host->irq2 = ent->irq2;
5483 host->mmio_base = ent->mmio_base;
5484 host->private_data = ent->private_data;
5486 /* register each port bound to this device */
5487 for (i = 0; i < host->n_ports; i++) {
5488 struct ata_port *ap;
5489 unsigned long xfer_mode_mask;
5490 int irq_line = ent->irq;
5492 ap = ata_port_add(ent, host, i);
5493 host->ports[i] = ap;
5498 if (ent->dummy_port_mask & (1 << i)) {
5499 ata_port_printk(ap, KERN_INFO, "DUMMY\n");
5500 ap->ops = &ata_dummy_port_ops;
5505 rc = ap->ops->port_start(ap);
5507 host->ports[i] = NULL;
5508 scsi_host_put(ap->scsi_host);
5512 /* Report the secondary IRQ for second channel legacy */
5513 if (i == 1 && ent->irq2)
5514 irq_line = ent->irq2;
5516 xfer_mode_mask =(ap->udma_mask << ATA_SHIFT_UDMA) |
5517 (ap->mwdma_mask << ATA_SHIFT_MWDMA) |
5518 (ap->pio_mask << ATA_SHIFT_PIO);
5520 /* print per-port info to dmesg */
5521 ata_port_printk(ap, KERN_INFO, "%cATA max %s cmd 0x%lX "
5522 "ctl 0x%lX bmdma 0x%lX irq %d\n",
5523 ap->flags & ATA_FLAG_SATA ? 'S' : 'P',
5524 ata_mode_string(xfer_mode_mask),
5525 ap->ioaddr.cmd_addr,
5526 ap->ioaddr.ctl_addr,
5527 ap->ioaddr.bmdma_addr,
5531 host->ops->irq_clear(ap);
5532 ata_eh_freeze_port(ap); /* freeze port before requesting IRQ */
5535 /* obtain irq, that may be shared between channels */
5536 rc = request_irq(ent->irq, ent->port_ops->irq_handler, ent->irq_flags,
5539 dev_printk(KERN_ERR, dev, "irq %lu request failed: %d\n",
5544 /* do we have a second IRQ for the other channel, eg legacy mode */
5546 /* We will get weird core code crashes later if this is true
5548 BUG_ON(ent->irq == ent->irq2);
5550 rc = request_irq(ent->irq2, ent->port_ops->irq_handler, ent->irq_flags,
5553 dev_printk(KERN_ERR, dev, "irq %lu request failed: %d\n",
5555 goto err_out_free_irq;
5559 /* perform each probe synchronously */
5560 DPRINTK("probe begin\n");
5561 for (i = 0; i < host->n_ports; i++) {
5562 struct ata_port *ap = host->ports[i];
5566 /* init sata_spd_limit to the current value */
5567 if (sata_scr_read(ap, SCR_CONTROL, &scontrol) == 0) {
5568 int spd = (scontrol >> 4) & 0xf;
5569 ap->hw_sata_spd_limit &= (1 << spd) - 1;
5571 ap->sata_spd_limit = ap->hw_sata_spd_limit;
5573 rc = scsi_add_host(ap->scsi_host, dev);
5575 ata_port_printk(ap, KERN_ERR, "scsi_add_host failed\n");
5576 /* FIXME: do something useful here */
5577 /* FIXME: handle unconditional calls to
5578 * scsi_scan_host and ata_host_remove, below,
5583 if (ap->ops->error_handler) {
5584 struct ata_eh_info *ehi = &ap->eh_info;
5585 unsigned long flags;
5589 /* kick EH for boot probing */
5590 spin_lock_irqsave(ap->lock, flags);
5592 ehi->probe_mask = (1 << ATA_MAX_DEVICES) - 1;
5593 ehi->action |= ATA_EH_SOFTRESET;
5594 ehi->flags |= ATA_EHI_NO_AUTOPSY | ATA_EHI_QUIET;
5596 ap->pflags |= ATA_PFLAG_LOADING;
5597 ata_port_schedule_eh(ap);
5599 spin_unlock_irqrestore(ap->lock, flags);
5601 /* wait for EH to finish */
5602 ata_port_wait_eh(ap);
5604 DPRINTK("ata%u: bus probe begin\n", ap->id);
5605 rc = ata_bus_probe(ap);
5606 DPRINTK("ata%u: bus probe end\n", ap->id);
5609 /* FIXME: do something useful here?
5610 * Current libata behavior will
5611 * tear down everything when
5612 * the module is removed
5613 * or the h/w is unplugged.
5619 /* probes are done, now scan each port's disk(s) */
5620 DPRINTK("host probe begin\n");
5621 for (i = 0; i < host->n_ports; i++) {
5622 struct ata_port *ap = host->ports[i];
5624 ata_scsi_scan_host(ap);
5627 dev_set_drvdata(dev, host);
5629 VPRINTK("EXIT, returning %u\n", ent->n_ports);
5630 return ent->n_ports; /* success */
5633 free_irq(ent->irq, host);
5635 for (i = 0; i < host->n_ports; i++) {
5636 struct ata_port *ap = host->ports[i];
5638 ap->ops->port_stop(ap);
5639 scsi_host_put(ap->scsi_host);
5644 VPRINTK("EXIT, returning 0\n");
5649 * ata_port_detach - Detach ATA port in prepration of device removal
5650 * @ap: ATA port to be detached
5652 * Detach all ATA devices and the associated SCSI devices of @ap;
5653 * then, remove the associated SCSI host. @ap is guaranteed to
5654 * be quiescent on return from this function.
5657 * Kernel thread context (may sleep).
5659 void ata_port_detach(struct ata_port *ap)
5661 unsigned long flags;
5664 if (!ap->ops->error_handler)
5667 /* tell EH we're leaving & flush EH */
5668 spin_lock_irqsave(ap->lock, flags);
5669 ap->pflags |= ATA_PFLAG_UNLOADING;
5670 spin_unlock_irqrestore(ap->lock, flags);
5672 ata_port_wait_eh(ap);
5674 /* EH is now guaranteed to see UNLOADING, so no new device
5675 * will be attached. Disable all existing devices.
5677 spin_lock_irqsave(ap->lock, flags);
5679 for (i = 0; i < ATA_MAX_DEVICES; i++)
5680 ata_dev_disable(&ap->device[i]);
5682 spin_unlock_irqrestore(ap->lock, flags);
5684 /* Final freeze & EH. All in-flight commands are aborted. EH
5685 * will be skipped and retrials will be terminated with bad
5688 spin_lock_irqsave(ap->lock, flags);
5689 ata_port_freeze(ap); /* won't be thawed */
5690 spin_unlock_irqrestore(ap->lock, flags);
5692 ata_port_wait_eh(ap);
5694 /* Flush hotplug task. The sequence is similar to
5695 * ata_port_flush_task().
5697 flush_workqueue(ata_aux_wq);
5698 cancel_delayed_work(&ap->hotplug_task);
5699 flush_workqueue(ata_aux_wq);
5702 /* remove the associated SCSI host */
5703 scsi_remove_host(ap->scsi_host);
5707 * ata_host_remove - PCI layer callback for device removal
5708 * @host: ATA host set that was removed
5710 * Unregister all objects associated with this host set. Free those
5714 * Inherited from calling layer (may sleep).
5717 void ata_host_remove(struct ata_host *host)
5721 for (i = 0; i < host->n_ports; i++)
5722 ata_port_detach(host->ports[i]);
5724 free_irq(host->irq, host);
5726 free_irq(host->irq2, host);
5728 for (i = 0; i < host->n_ports; i++) {
5729 struct ata_port *ap = host->ports[i];
5731 ata_scsi_release(ap->scsi_host);
5733 if ((ap->flags & ATA_FLAG_NO_LEGACY) == 0) {
5734 struct ata_ioports *ioaddr = &ap->ioaddr;
5736 /* FIXME: Add -ac IDE pci mods to remove these special cases */
5737 if (ioaddr->cmd_addr == ATA_PRIMARY_CMD)
5738 release_region(ATA_PRIMARY_CMD, 8);
5739 else if (ioaddr->cmd_addr == ATA_SECONDARY_CMD)
5740 release_region(ATA_SECONDARY_CMD, 8);
5743 scsi_host_put(ap->scsi_host);
5746 if (host->ops->host_stop)
5747 host->ops->host_stop(host);
5753 * ata_scsi_release - SCSI layer callback hook for host unload
5754 * @shost: libata host to be unloaded
5756 * Performs all duties necessary to shut down a libata port...
5757 * Kill port kthread, disable port, and release resources.
5760 * Inherited from SCSI layer.
5766 int ata_scsi_release(struct Scsi_Host *shost)
5768 struct ata_port *ap = ata_shost_to_port(shost);
5772 ap->ops->port_disable(ap);
5773 ap->ops->port_stop(ap);
5779 struct ata_probe_ent *
5780 ata_probe_ent_alloc(struct device *dev, const struct ata_port_info *port)
5782 struct ata_probe_ent *probe_ent;
5784 probe_ent = kzalloc(sizeof(*probe_ent), GFP_KERNEL);
5786 printk(KERN_ERR DRV_NAME "(%s): out of memory\n",
5787 kobject_name(&(dev->kobj)));
5791 INIT_LIST_HEAD(&probe_ent->node);
5792 probe_ent->dev = dev;
5794 probe_ent->sht = port->sht;
5795 probe_ent->port_flags = port->flags;
5796 probe_ent->pio_mask = port->pio_mask;
5797 probe_ent->mwdma_mask = port->mwdma_mask;
5798 probe_ent->udma_mask = port->udma_mask;
5799 probe_ent->port_ops = port->port_ops;
5800 probe_ent->private_data = port->private_data;
5806 * ata_std_ports - initialize ioaddr with standard port offsets.
5807 * @ioaddr: IO address structure to be initialized
5809 * Utility function which initializes data_addr, error_addr,
5810 * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
5811 * device_addr, status_addr, and command_addr to standard offsets
5812 * relative to cmd_addr.
5814 * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
5817 void ata_std_ports(struct ata_ioports *ioaddr)
5819 ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA;
5820 ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR;
5821 ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE;
5822 ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT;
5823 ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL;
5824 ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM;
5825 ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH;
5826 ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE;
5827 ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS;
5828 ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD;
5834 void ata_pci_host_stop (struct ata_host *host)
5836 struct pci_dev *pdev = to_pci_dev(host->dev);
5838 pci_iounmap(pdev, host->mmio_base);
5842 * ata_pci_remove_one - PCI layer callback for device removal
5843 * @pdev: PCI device that was removed
5845 * PCI layer indicates to libata via this hook that
5846 * hot-unplug or module unload event has occurred.
5847 * Handle this by unregistering all objects associated
5848 * with this PCI device. Free those objects. Then finally
5849 * release PCI resources and disable device.
5852 * Inherited from PCI layer (may sleep).
5855 void ata_pci_remove_one (struct pci_dev *pdev)
5857 struct device *dev = pci_dev_to_dev(pdev);
5858 struct ata_host *host = dev_get_drvdata(dev);
5860 ata_host_remove(host);
5862 pci_release_regions(pdev);
5863 pci_disable_device(pdev);
5864 dev_set_drvdata(dev, NULL);
5867 /* move to PCI subsystem */
5868 int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits)
5870 unsigned long tmp = 0;
5872 switch (bits->width) {
5875 pci_read_config_byte(pdev, bits->reg, &tmp8);
5881 pci_read_config_word(pdev, bits->reg, &tmp16);
5887 pci_read_config_dword(pdev, bits->reg, &tmp32);
5898 return (tmp == bits->val) ? 1 : 0;
5901 void ata_pci_device_do_suspend(struct pci_dev *pdev, pm_message_t mesg)
5903 pci_save_state(pdev);
5905 if (mesg.event == PM_EVENT_SUSPEND) {
5906 pci_disable_device(pdev);
5907 pci_set_power_state(pdev, PCI_D3hot);
5911 void ata_pci_device_do_resume(struct pci_dev *pdev)
5913 pci_set_power_state(pdev, PCI_D0);
5914 pci_restore_state(pdev);
5915 pci_enable_device(pdev);
5916 pci_set_master(pdev);
5919 int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg)
5921 struct ata_host *host = dev_get_drvdata(&pdev->dev);
5924 rc = ata_host_suspend(host, mesg);
5928 ata_pci_device_do_suspend(pdev, mesg);
5933 int ata_pci_device_resume(struct pci_dev *pdev)
5935 struct ata_host *host = dev_get_drvdata(&pdev->dev);
5937 ata_pci_device_do_resume(pdev);
5938 ata_host_resume(host);
5941 #endif /* CONFIG_PCI */
5944 static int __init ata_init(void)
5946 ata_probe_timeout *= HZ;
5947 ata_wq = create_workqueue("ata");
5951 ata_aux_wq = create_singlethread_workqueue("ata_aux");
5953 destroy_workqueue(ata_wq);
5957 printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n");
5961 static void __exit ata_exit(void)
5963 destroy_workqueue(ata_wq);
5964 destroy_workqueue(ata_aux_wq);
5967 subsys_initcall(ata_init);
5968 module_exit(ata_exit);
5970 static unsigned long ratelimit_time;
5971 static DEFINE_SPINLOCK(ata_ratelimit_lock);
5973 int ata_ratelimit(void)
5976 unsigned long flags;
5978 spin_lock_irqsave(&ata_ratelimit_lock, flags);
5980 if (time_after(jiffies, ratelimit_time)) {
5982 ratelimit_time = jiffies + (HZ/5);
5986 spin_unlock_irqrestore(&ata_ratelimit_lock, flags);
5992 * ata_wait_register - wait until register value changes
5993 * @reg: IO-mapped register
5994 * @mask: Mask to apply to read register value
5995 * @val: Wait condition
5996 * @interval_msec: polling interval in milliseconds
5997 * @timeout_msec: timeout in milliseconds
5999 * Waiting for some bits of register to change is a common
6000 * operation for ATA controllers. This function reads 32bit LE
6001 * IO-mapped register @reg and tests for the following condition.
6003 * (*@reg & mask) != val
6005 * If the condition is met, it returns; otherwise, the process is
6006 * repeated after @interval_msec until timeout.
6009 * Kernel thread context (may sleep)
6012 * The final register value.
6014 u32 ata_wait_register(void __iomem *reg, u32 mask, u32 val,
6015 unsigned long interval_msec,
6016 unsigned long timeout_msec)
6018 unsigned long timeout;
6021 tmp = ioread32(reg);
6023 /* Calculate timeout _after_ the first read to make sure
6024 * preceding writes reach the controller before starting to
6025 * eat away the timeout.
6027 timeout = jiffies + (timeout_msec * HZ) / 1000;
6029 while ((tmp & mask) == val && time_before(jiffies, timeout)) {
6030 msleep(interval_msec);
6031 tmp = ioread32(reg);
6040 static void ata_dummy_noret(struct ata_port *ap) { }
6041 static int ata_dummy_ret0(struct ata_port *ap) { return 0; }
6042 static void ata_dummy_qc_noret(struct ata_queued_cmd *qc) { }
6044 static u8 ata_dummy_check_status(struct ata_port *ap)
6049 static unsigned int ata_dummy_qc_issue(struct ata_queued_cmd *qc)
6051 return AC_ERR_SYSTEM;
6054 const struct ata_port_operations ata_dummy_port_ops = {
6055 .port_disable = ata_port_disable,
6056 .check_status = ata_dummy_check_status,
6057 .check_altstatus = ata_dummy_check_status,
6058 .dev_select = ata_noop_dev_select,
6059 .qc_prep = ata_noop_qc_prep,
6060 .qc_issue = ata_dummy_qc_issue,
6061 .freeze = ata_dummy_noret,
6062 .thaw = ata_dummy_noret,
6063 .error_handler = ata_dummy_noret,
6064 .post_internal_cmd = ata_dummy_qc_noret,
6065 .irq_clear = ata_dummy_noret,
6066 .port_start = ata_dummy_ret0,
6067 .port_stop = ata_dummy_noret,
6071 * libata is essentially a library of internal helper functions for
6072 * low-level ATA host controller drivers. As such, the API/ABI is
6073 * likely to change as new drivers are added and updated.
6074 * Do not depend on ABI/API stability.
6077 EXPORT_SYMBOL_GPL(sata_deb_timing_normal);
6078 EXPORT_SYMBOL_GPL(sata_deb_timing_hotplug);
6079 EXPORT_SYMBOL_GPL(sata_deb_timing_long);
6080 EXPORT_SYMBOL_GPL(ata_dummy_port_ops);
6081 EXPORT_SYMBOL_GPL(ata_std_bios_param);
6082 EXPORT_SYMBOL_GPL(ata_std_ports);
6083 EXPORT_SYMBOL_GPL(ata_host_init);
6084 EXPORT_SYMBOL_GPL(ata_device_add);
6085 EXPORT_SYMBOL_GPL(ata_port_detach);
6086 EXPORT_SYMBOL_GPL(ata_host_remove);
6087 EXPORT_SYMBOL_GPL(ata_sg_init);
6088 EXPORT_SYMBOL_GPL(ata_sg_init_one);
6089 EXPORT_SYMBOL_GPL(ata_hsm_move);
6090 EXPORT_SYMBOL_GPL(ata_qc_complete);
6091 EXPORT_SYMBOL_GPL(ata_qc_complete_multiple);
6092 EXPORT_SYMBOL_GPL(ata_qc_issue_prot);
6093 EXPORT_SYMBOL_GPL(ata_tf_load);
6094 EXPORT_SYMBOL_GPL(ata_tf_read);
6095 EXPORT_SYMBOL_GPL(ata_noop_dev_select);
6096 EXPORT_SYMBOL_GPL(ata_std_dev_select);
6097 EXPORT_SYMBOL_GPL(ata_tf_to_fis);
6098 EXPORT_SYMBOL_GPL(ata_tf_from_fis);
6099 EXPORT_SYMBOL_GPL(ata_check_status);
6100 EXPORT_SYMBOL_GPL(ata_altstatus);
6101 EXPORT_SYMBOL_GPL(ata_exec_command);
6102 EXPORT_SYMBOL_GPL(ata_port_start);
6103 EXPORT_SYMBOL_GPL(ata_port_stop);
6104 EXPORT_SYMBOL_GPL(ata_host_stop);
6105 EXPORT_SYMBOL_GPL(ata_interrupt);
6106 EXPORT_SYMBOL_GPL(ata_mmio_data_xfer);
6107 EXPORT_SYMBOL_GPL(ata_pio_data_xfer);
6108 EXPORT_SYMBOL_GPL(ata_pio_data_xfer_noirq);
6109 EXPORT_SYMBOL_GPL(ata_qc_prep);
6110 EXPORT_SYMBOL_GPL(ata_noop_qc_prep);
6111 EXPORT_SYMBOL_GPL(ata_bmdma_setup);
6112 EXPORT_SYMBOL_GPL(ata_bmdma_start);
6113 EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear);
6114 EXPORT_SYMBOL_GPL(ata_bmdma_status);
6115 EXPORT_SYMBOL_GPL(ata_bmdma_stop);
6116 EXPORT_SYMBOL_GPL(ata_bmdma_freeze);
6117 EXPORT_SYMBOL_GPL(ata_bmdma_thaw);
6118 EXPORT_SYMBOL_GPL(ata_bmdma_drive_eh);
6119 EXPORT_SYMBOL_GPL(ata_bmdma_error_handler);
6120 EXPORT_SYMBOL_GPL(ata_bmdma_post_internal_cmd);
6121 EXPORT_SYMBOL_GPL(ata_port_probe);
6122 EXPORT_SYMBOL_GPL(sata_set_spd);
6123 EXPORT_SYMBOL_GPL(sata_phy_debounce);
6124 EXPORT_SYMBOL_GPL(sata_phy_resume);
6125 EXPORT_SYMBOL_GPL(sata_phy_reset);
6126 EXPORT_SYMBOL_GPL(__sata_phy_reset);
6127 EXPORT_SYMBOL_GPL(ata_bus_reset);
6128 EXPORT_SYMBOL_GPL(ata_std_prereset);
6129 EXPORT_SYMBOL_GPL(ata_std_softreset);
6130 EXPORT_SYMBOL_GPL(sata_std_hardreset);
6131 EXPORT_SYMBOL_GPL(ata_std_postreset);
6132 EXPORT_SYMBOL_GPL(ata_dev_classify);
6133 EXPORT_SYMBOL_GPL(ata_dev_pair);
6134 EXPORT_SYMBOL_GPL(ata_port_disable);
6135 EXPORT_SYMBOL_GPL(ata_ratelimit);
6136 EXPORT_SYMBOL_GPL(ata_wait_register);
6137 EXPORT_SYMBOL_GPL(ata_busy_sleep);
6138 EXPORT_SYMBOL_GPL(ata_port_queue_task);
6139 EXPORT_SYMBOL_GPL(ata_scsi_ioctl);
6140 EXPORT_SYMBOL_GPL(ata_scsi_queuecmd);
6141 EXPORT_SYMBOL_GPL(ata_scsi_slave_config);
6142 EXPORT_SYMBOL_GPL(ata_scsi_slave_destroy);
6143 EXPORT_SYMBOL_GPL(ata_scsi_change_queue_depth);
6144 EXPORT_SYMBOL_GPL(ata_scsi_release);
6145 EXPORT_SYMBOL_GPL(ata_host_intr);
6146 EXPORT_SYMBOL_GPL(sata_scr_valid);
6147 EXPORT_SYMBOL_GPL(sata_scr_read);
6148 EXPORT_SYMBOL_GPL(sata_scr_write);
6149 EXPORT_SYMBOL_GPL(sata_scr_write_flush);
6150 EXPORT_SYMBOL_GPL(ata_port_online);
6151 EXPORT_SYMBOL_GPL(ata_port_offline);
6152 EXPORT_SYMBOL_GPL(ata_host_suspend);
6153 EXPORT_SYMBOL_GPL(ata_host_resume);
6154 EXPORT_SYMBOL_GPL(ata_id_string);
6155 EXPORT_SYMBOL_GPL(ata_id_c_string);
6156 EXPORT_SYMBOL_GPL(ata_scsi_simulate);
6158 EXPORT_SYMBOL_GPL(ata_pio_need_iordy);
6159 EXPORT_SYMBOL_GPL(ata_timing_compute);
6160 EXPORT_SYMBOL_GPL(ata_timing_merge);
6163 EXPORT_SYMBOL_GPL(pci_test_config_bits);
6164 EXPORT_SYMBOL_GPL(ata_pci_host_stop);
6165 EXPORT_SYMBOL_GPL(ata_pci_init_native_mode);
6166 EXPORT_SYMBOL_GPL(ata_pci_init_one);
6167 EXPORT_SYMBOL_GPL(ata_pci_remove_one);
6168 EXPORT_SYMBOL_GPL(ata_pci_device_do_suspend);
6169 EXPORT_SYMBOL_GPL(ata_pci_device_do_resume);
6170 EXPORT_SYMBOL_GPL(ata_pci_device_suspend);
6171 EXPORT_SYMBOL_GPL(ata_pci_device_resume);
6172 EXPORT_SYMBOL_GPL(ata_pci_default_filter);
6173 EXPORT_SYMBOL_GPL(ata_pci_clear_simplex);
6174 #endif /* CONFIG_PCI */
6176 EXPORT_SYMBOL_GPL(ata_scsi_device_suspend);
6177 EXPORT_SYMBOL_GPL(ata_scsi_device_resume);
6179 EXPORT_SYMBOL_GPL(ata_eng_timeout);
6180 EXPORT_SYMBOL_GPL(ata_port_schedule_eh);
6181 EXPORT_SYMBOL_GPL(ata_port_abort);
6182 EXPORT_SYMBOL_GPL(ata_port_freeze);
6183 EXPORT_SYMBOL_GPL(ata_eh_freeze_port);
6184 EXPORT_SYMBOL_GPL(ata_eh_thaw_port);
6185 EXPORT_SYMBOL_GPL(ata_eh_qc_complete);
6186 EXPORT_SYMBOL_GPL(ata_eh_qc_retry);
6187 EXPORT_SYMBOL_GPL(ata_do_eh);