2 * libata-core.c - helper library for ATA
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
8 * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2004 Jeff Garzik
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
35 #include <linux/kernel.h>
36 #include <linux/module.h>
37 #include <linux/pci.h>
38 #include <linux/init.h>
39 #include <linux/list.h>
41 #include <linux/highmem.h>
42 #include <linux/spinlock.h>
43 #include <linux/blkdev.h>
44 #include <linux/delay.h>
45 #include <linux/timer.h>
46 #include <linux/interrupt.h>
47 #include <linux/completion.h>
48 #include <linux/suspend.h>
49 #include <linux/workqueue.h>
50 #include <linux/jiffies.h>
51 #include <linux/scatterlist.h>
52 #include <scsi/scsi.h>
53 #include <scsi/scsi_cmnd.h>
54 #include <scsi/scsi_host.h>
55 #include <linux/libata.h>
57 #include <asm/semaphore.h>
58 #include <asm/byteorder.h>
62 /* debounce timing parameters in msecs { interval, duration, timeout } */
63 const unsigned long sata_deb_timing_normal[] = { 5, 100, 2000 };
64 const unsigned long sata_deb_timing_hotplug[] = { 25, 500, 2000 };
65 const unsigned long sata_deb_timing_long[] = { 100, 2000, 5000 };
67 static unsigned int ata_dev_init_params(struct ata_device *dev,
68 u16 heads, u16 sectors);
69 static unsigned int ata_dev_set_xfermode(struct ata_device *dev);
70 static void ata_dev_xfermask(struct ata_device *dev);
72 static unsigned int ata_unique_id = 1;
73 static struct workqueue_struct *ata_wq;
75 struct workqueue_struct *ata_aux_wq;
77 int atapi_enabled = 1;
78 module_param(atapi_enabled, int, 0444);
79 MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)");
82 module_param(atapi_dmadir, int, 0444);
83 MODULE_PARM_DESC(atapi_dmadir, "Enable ATAPI DMADIR bridge support (0=off, 1=on)");
86 module_param_named(fua, libata_fua, int, 0444);
87 MODULE_PARM_DESC(fua, "FUA support (0=off, 1=on)");
89 static int ata_probe_timeout = ATA_TMOUT_INTERNAL / HZ;
90 module_param(ata_probe_timeout, int, 0444);
91 MODULE_PARM_DESC(ata_probe_timeout, "Set ATA probing timeout (seconds)");
93 MODULE_AUTHOR("Jeff Garzik");
94 MODULE_DESCRIPTION("Library module for ATA devices");
95 MODULE_LICENSE("GPL");
96 MODULE_VERSION(DRV_VERSION);
100 * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure
101 * @tf: Taskfile to convert
102 * @fis: Buffer into which data will output
103 * @pmp: Port multiplier port
105 * Converts a standard ATA taskfile to a Serial ATA
106 * FIS structure (Register - Host to Device).
109 * Inherited from caller.
112 void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp)
114 fis[0] = 0x27; /* Register - Host to Device FIS */
115 fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number,
116 bit 7 indicates Command FIS */
117 fis[2] = tf->command;
118 fis[3] = tf->feature;
125 fis[8] = tf->hob_lbal;
126 fis[9] = tf->hob_lbam;
127 fis[10] = tf->hob_lbah;
128 fis[11] = tf->hob_feature;
131 fis[13] = tf->hob_nsect;
142 * ata_tf_from_fis - Convert SATA FIS to ATA taskfile
143 * @fis: Buffer from which data will be input
144 * @tf: Taskfile to output
146 * Converts a serial ATA FIS structure to a standard ATA taskfile.
149 * Inherited from caller.
152 void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf)
154 tf->command = fis[2]; /* status */
155 tf->feature = fis[3]; /* error */
162 tf->hob_lbal = fis[8];
163 tf->hob_lbam = fis[9];
164 tf->hob_lbah = fis[10];
167 tf->hob_nsect = fis[13];
170 static const u8 ata_rw_cmds[] = {
174 ATA_CMD_READ_MULTI_EXT,
175 ATA_CMD_WRITE_MULTI_EXT,
179 ATA_CMD_WRITE_MULTI_FUA_EXT,
183 ATA_CMD_PIO_READ_EXT,
184 ATA_CMD_PIO_WRITE_EXT,
197 ATA_CMD_WRITE_FUA_EXT
201 * ata_rwcmd_protocol - set taskfile r/w commands and protocol
202 * @qc: command to examine and configure
204 * Examine the device configuration and tf->flags to calculate
205 * the proper read/write commands and protocol to use.
210 int ata_rwcmd_protocol(struct ata_queued_cmd *qc)
212 struct ata_taskfile *tf = &qc->tf;
213 struct ata_device *dev = qc->dev;
216 int index, fua, lba48, write;
218 fua = (tf->flags & ATA_TFLAG_FUA) ? 4 : 0;
219 lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0;
220 write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0;
222 if (dev->flags & ATA_DFLAG_PIO) {
223 tf->protocol = ATA_PROT_PIO;
224 index = dev->multi_count ? 0 : 8;
225 } else if (lba48 && (qc->ap->flags & ATA_FLAG_PIO_LBA48)) {
226 /* Unable to use DMA due to host limitation */
227 tf->protocol = ATA_PROT_PIO;
228 index = dev->multi_count ? 0 : 8;
230 tf->protocol = ATA_PROT_DMA;
234 cmd = ata_rw_cmds[index + fua + lba48 + write];
243 * ata_pack_xfermask - Pack pio, mwdma and udma masks into xfer_mask
244 * @pio_mask: pio_mask
245 * @mwdma_mask: mwdma_mask
246 * @udma_mask: udma_mask
248 * Pack @pio_mask, @mwdma_mask and @udma_mask into a single
249 * unsigned int xfer_mask.
257 static unsigned int ata_pack_xfermask(unsigned int pio_mask,
258 unsigned int mwdma_mask,
259 unsigned int udma_mask)
261 return ((pio_mask << ATA_SHIFT_PIO) & ATA_MASK_PIO) |
262 ((mwdma_mask << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA) |
263 ((udma_mask << ATA_SHIFT_UDMA) & ATA_MASK_UDMA);
267 * ata_unpack_xfermask - Unpack xfer_mask into pio, mwdma and udma masks
268 * @xfer_mask: xfer_mask to unpack
269 * @pio_mask: resulting pio_mask
270 * @mwdma_mask: resulting mwdma_mask
271 * @udma_mask: resulting udma_mask
273 * Unpack @xfer_mask into @pio_mask, @mwdma_mask and @udma_mask.
274 * Any NULL distination masks will be ignored.
276 static void ata_unpack_xfermask(unsigned int xfer_mask,
277 unsigned int *pio_mask,
278 unsigned int *mwdma_mask,
279 unsigned int *udma_mask)
282 *pio_mask = (xfer_mask & ATA_MASK_PIO) >> ATA_SHIFT_PIO;
284 *mwdma_mask = (xfer_mask & ATA_MASK_MWDMA) >> ATA_SHIFT_MWDMA;
286 *udma_mask = (xfer_mask & ATA_MASK_UDMA) >> ATA_SHIFT_UDMA;
289 static const struct ata_xfer_ent {
293 { ATA_SHIFT_PIO, ATA_BITS_PIO, XFER_PIO_0 },
294 { ATA_SHIFT_MWDMA, ATA_BITS_MWDMA, XFER_MW_DMA_0 },
295 { ATA_SHIFT_UDMA, ATA_BITS_UDMA, XFER_UDMA_0 },
300 * ata_xfer_mask2mode - Find matching XFER_* for the given xfer_mask
301 * @xfer_mask: xfer_mask of interest
303 * Return matching XFER_* value for @xfer_mask. Only the highest
304 * bit of @xfer_mask is considered.
310 * Matching XFER_* value, 0 if no match found.
312 static u8 ata_xfer_mask2mode(unsigned int xfer_mask)
314 int highbit = fls(xfer_mask) - 1;
315 const struct ata_xfer_ent *ent;
317 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
318 if (highbit >= ent->shift && highbit < ent->shift + ent->bits)
319 return ent->base + highbit - ent->shift;
324 * ata_xfer_mode2mask - Find matching xfer_mask for XFER_*
325 * @xfer_mode: XFER_* of interest
327 * Return matching xfer_mask for @xfer_mode.
333 * Matching xfer_mask, 0 if no match found.
335 static unsigned int ata_xfer_mode2mask(u8 xfer_mode)
337 const struct ata_xfer_ent *ent;
339 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
340 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
341 return 1 << (ent->shift + xfer_mode - ent->base);
346 * ata_xfer_mode2shift - Find matching xfer_shift for XFER_*
347 * @xfer_mode: XFER_* of interest
349 * Return matching xfer_shift for @xfer_mode.
355 * Matching xfer_shift, -1 if no match found.
357 static int ata_xfer_mode2shift(unsigned int xfer_mode)
359 const struct ata_xfer_ent *ent;
361 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
362 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
368 * ata_mode_string - convert xfer_mask to string
369 * @xfer_mask: mask of bits supported; only highest bit counts.
371 * Determine string which represents the highest speed
372 * (highest bit in @modemask).
378 * Constant C string representing highest speed listed in
379 * @mode_mask, or the constant C string "<n/a>".
381 static const char *ata_mode_string(unsigned int xfer_mask)
383 static const char * const xfer_mode_str[] = {
407 highbit = fls(xfer_mask) - 1;
408 if (highbit >= 0 && highbit < ARRAY_SIZE(xfer_mode_str))
409 return xfer_mode_str[highbit];
413 static const char *sata_spd_string(unsigned int spd)
415 static const char * const spd_str[] = {
420 if (spd == 0 || (spd - 1) >= ARRAY_SIZE(spd_str))
422 return spd_str[spd - 1];
425 void ata_dev_disable(struct ata_device *dev)
427 if (ata_dev_enabled(dev) && ata_msg_drv(dev->ap)) {
428 ata_dev_printk(dev, KERN_WARNING, "disabled\n");
434 * ata_pio_devchk - PATA device presence detection
435 * @ap: ATA channel to examine
436 * @device: Device to examine (starting at zero)
438 * This technique was originally described in
439 * Hale Landis's ATADRVR (www.ata-atapi.com), and
440 * later found its way into the ATA/ATAPI spec.
442 * Write a pattern to the ATA shadow registers,
443 * and if a device is present, it will respond by
444 * correctly storing and echoing back the
445 * ATA shadow register contents.
451 static unsigned int ata_pio_devchk(struct ata_port *ap,
454 struct ata_ioports *ioaddr = &ap->ioaddr;
457 ap->ops->dev_select(ap, device);
459 outb(0x55, ioaddr->nsect_addr);
460 outb(0xaa, ioaddr->lbal_addr);
462 outb(0xaa, ioaddr->nsect_addr);
463 outb(0x55, ioaddr->lbal_addr);
465 outb(0x55, ioaddr->nsect_addr);
466 outb(0xaa, ioaddr->lbal_addr);
468 nsect = inb(ioaddr->nsect_addr);
469 lbal = inb(ioaddr->lbal_addr);
471 if ((nsect == 0x55) && (lbal == 0xaa))
472 return 1; /* we found a device */
474 return 0; /* nothing found */
478 * ata_mmio_devchk - PATA device presence detection
479 * @ap: ATA channel to examine
480 * @device: Device to examine (starting at zero)
482 * This technique was originally described in
483 * Hale Landis's ATADRVR (www.ata-atapi.com), and
484 * later found its way into the ATA/ATAPI spec.
486 * Write a pattern to the ATA shadow registers,
487 * and if a device is present, it will respond by
488 * correctly storing and echoing back the
489 * ATA shadow register contents.
495 static unsigned int ata_mmio_devchk(struct ata_port *ap,
498 struct ata_ioports *ioaddr = &ap->ioaddr;
501 ap->ops->dev_select(ap, device);
503 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
504 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
506 writeb(0xaa, (void __iomem *) ioaddr->nsect_addr);
507 writeb(0x55, (void __iomem *) ioaddr->lbal_addr);
509 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
510 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
512 nsect = readb((void __iomem *) ioaddr->nsect_addr);
513 lbal = readb((void __iomem *) ioaddr->lbal_addr);
515 if ((nsect == 0x55) && (lbal == 0xaa))
516 return 1; /* we found a device */
518 return 0; /* nothing found */
522 * ata_devchk - PATA device presence detection
523 * @ap: ATA channel to examine
524 * @device: Device to examine (starting at zero)
526 * Dispatch ATA device presence detection, depending
527 * on whether we are using PIO or MMIO to talk to the
528 * ATA shadow registers.
534 static unsigned int ata_devchk(struct ata_port *ap,
537 if (ap->flags & ATA_FLAG_MMIO)
538 return ata_mmio_devchk(ap, device);
539 return ata_pio_devchk(ap, device);
543 * ata_dev_classify - determine device type based on ATA-spec signature
544 * @tf: ATA taskfile register set for device to be identified
546 * Determine from taskfile register contents whether a device is
547 * ATA or ATAPI, as per "Signature and persistence" section
548 * of ATA/PI spec (volume 1, sect 5.14).
554 * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, or %ATA_DEV_UNKNOWN
555 * the event of failure.
558 unsigned int ata_dev_classify(const struct ata_taskfile *tf)
560 /* Apple's open source Darwin code hints that some devices only
561 * put a proper signature into the LBA mid/high registers,
562 * So, we only check those. It's sufficient for uniqueness.
565 if (((tf->lbam == 0) && (tf->lbah == 0)) ||
566 ((tf->lbam == 0x3c) && (tf->lbah == 0xc3))) {
567 DPRINTK("found ATA device by sig\n");
571 if (((tf->lbam == 0x14) && (tf->lbah == 0xeb)) ||
572 ((tf->lbam == 0x69) && (tf->lbah == 0x96))) {
573 DPRINTK("found ATAPI device by sig\n");
574 return ATA_DEV_ATAPI;
577 DPRINTK("unknown device\n");
578 return ATA_DEV_UNKNOWN;
582 * ata_dev_try_classify - Parse returned ATA device signature
583 * @ap: ATA channel to examine
584 * @device: Device to examine (starting at zero)
585 * @r_err: Value of error register on completion
587 * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
588 * an ATA/ATAPI-defined set of values is placed in the ATA
589 * shadow registers, indicating the results of device detection
592 * Select the ATA device, and read the values from the ATA shadow
593 * registers. Then parse according to the Error register value,
594 * and the spec-defined values examined by ata_dev_classify().
600 * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE.
604 ata_dev_try_classify(struct ata_port *ap, unsigned int device, u8 *r_err)
606 struct ata_taskfile tf;
610 ap->ops->dev_select(ap, device);
612 memset(&tf, 0, sizeof(tf));
614 ap->ops->tf_read(ap, &tf);
619 /* see if device passed diags: if master then continue and warn later */
620 if (err == 0 && device == 0)
621 /* diagnostic fail : do nothing _YET_ */
622 ap->device[device].horkage |= ATA_HORKAGE_DIAGNOSTIC;
625 else if ((device == 0) && (err == 0x81))
630 /* determine if device is ATA or ATAPI */
631 class = ata_dev_classify(&tf);
633 if (class == ATA_DEV_UNKNOWN)
635 if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0))
641 * ata_id_string - Convert IDENTIFY DEVICE page into string
642 * @id: IDENTIFY DEVICE results we will examine
643 * @s: string into which data is output
644 * @ofs: offset into identify device page
645 * @len: length of string to return. must be an even number.
647 * The strings in the IDENTIFY DEVICE page are broken up into
648 * 16-bit chunks. Run through the string, and output each
649 * 8-bit chunk linearly, regardless of platform.
655 void ata_id_string(const u16 *id, unsigned char *s,
656 unsigned int ofs, unsigned int len)
675 * ata_id_c_string - Convert IDENTIFY DEVICE page into C string
676 * @id: IDENTIFY DEVICE results we will examine
677 * @s: string into which data is output
678 * @ofs: offset into identify device page
679 * @len: length of string to return. must be an odd number.
681 * This function is identical to ata_id_string except that it
682 * trims trailing spaces and terminates the resulting string with
683 * null. @len must be actual maximum length (even number) + 1.
688 void ata_id_c_string(const u16 *id, unsigned char *s,
689 unsigned int ofs, unsigned int len)
695 ata_id_string(id, s, ofs, len - 1);
697 p = s + strnlen(s, len - 1);
698 while (p > s && p[-1] == ' ')
703 static u64 ata_id_n_sectors(const u16 *id)
705 if (ata_id_has_lba(id)) {
706 if (ata_id_has_lba48(id))
707 return ata_id_u64(id, 100);
709 return ata_id_u32(id, 60);
711 if (ata_id_current_chs_valid(id))
712 return ata_id_u32(id, 57);
714 return id[1] * id[3] * id[6];
719 * ata_noop_dev_select - Select device 0/1 on ATA bus
720 * @ap: ATA channel to manipulate
721 * @device: ATA device (numbered from zero) to select
723 * This function performs no actual function.
725 * May be used as the dev_select() entry in ata_port_operations.
730 void ata_noop_dev_select (struct ata_port *ap, unsigned int device)
736 * ata_std_dev_select - Select device 0/1 on ATA bus
737 * @ap: ATA channel to manipulate
738 * @device: ATA device (numbered from zero) to select
740 * Use the method defined in the ATA specification to
741 * make either device 0, or device 1, active on the
742 * ATA channel. Works with both PIO and MMIO.
744 * May be used as the dev_select() entry in ata_port_operations.
750 void ata_std_dev_select (struct ata_port *ap, unsigned int device)
755 tmp = ATA_DEVICE_OBS;
757 tmp = ATA_DEVICE_OBS | ATA_DEV1;
759 if (ap->flags & ATA_FLAG_MMIO) {
760 writeb(tmp, (void __iomem *) ap->ioaddr.device_addr);
762 outb(tmp, ap->ioaddr.device_addr);
764 ata_pause(ap); /* needed; also flushes, for mmio */
768 * ata_dev_select - Select device 0/1 on ATA bus
769 * @ap: ATA channel to manipulate
770 * @device: ATA device (numbered from zero) to select
771 * @wait: non-zero to wait for Status register BSY bit to clear
772 * @can_sleep: non-zero if context allows sleeping
774 * Use the method defined in the ATA specification to
775 * make either device 0, or device 1, active on the
778 * This is a high-level version of ata_std_dev_select(),
779 * which additionally provides the services of inserting
780 * the proper pauses and status polling, where needed.
786 void ata_dev_select(struct ata_port *ap, unsigned int device,
787 unsigned int wait, unsigned int can_sleep)
789 if (ata_msg_probe(ap))
790 ata_port_printk(ap, KERN_INFO, "ata_dev_select: ENTER, ata%u: "
791 "device %u, wait %u\n", ap->id, device, wait);
796 ap->ops->dev_select(ap, device);
799 if (can_sleep && ap->device[device].class == ATA_DEV_ATAPI)
806 * ata_dump_id - IDENTIFY DEVICE info debugging output
807 * @id: IDENTIFY DEVICE page to dump
809 * Dump selected 16-bit words from the given IDENTIFY DEVICE
816 static inline void ata_dump_id(const u16 *id)
818 DPRINTK("49==0x%04x "
828 DPRINTK("80==0x%04x "
838 DPRINTK("88==0x%04x "
845 * ata_id_xfermask - Compute xfermask from the given IDENTIFY data
846 * @id: IDENTIFY data to compute xfer mask from
848 * Compute the xfermask for this device. This is not as trivial
849 * as it seems if we must consider early devices correctly.
851 * FIXME: pre IDE drive timing (do we care ?).
859 static unsigned int ata_id_xfermask(const u16 *id)
861 unsigned int pio_mask, mwdma_mask, udma_mask;
863 /* Usual case. Word 53 indicates word 64 is valid */
864 if (id[ATA_ID_FIELD_VALID] & (1 << 1)) {
865 pio_mask = id[ATA_ID_PIO_MODES] & 0x03;
869 /* If word 64 isn't valid then Word 51 high byte holds
870 * the PIO timing number for the maximum. Turn it into
873 u8 mode = id[ATA_ID_OLD_PIO_MODES] & 0xFF;
874 if (mode < 5) /* Valid PIO range */
875 pio_mask = (2 << mode) - 1;
879 /* But wait.. there's more. Design your standards by
880 * committee and you too can get a free iordy field to
881 * process. However its the speeds not the modes that
882 * are supported... Note drivers using the timing API
883 * will get this right anyway
887 mwdma_mask = id[ATA_ID_MWDMA_MODES] & 0x07;
889 if (ata_id_is_cfa(id)) {
891 * Process compact flash extended modes
893 int pio = id[163] & 0x7;
894 int dma = (id[163] >> 3) & 7;
897 pio_mask |= (1 << 5);
899 pio_mask |= (1 << 6);
901 mwdma_mask |= (1 << 3);
903 mwdma_mask |= (1 << 4);
907 if (id[ATA_ID_FIELD_VALID] & (1 << 2))
908 udma_mask = id[ATA_ID_UDMA_MODES] & 0xff;
910 return ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask);
914 * ata_port_queue_task - Queue port_task
915 * @ap: The ata_port to queue port_task for
916 * @fn: workqueue function to be scheduled
917 * @data: data value to pass to workqueue function
918 * @delay: delay time for workqueue function
920 * Schedule @fn(@data) for execution after @delay jiffies using
921 * port_task. There is one port_task per port and it's the
922 * user(low level driver)'s responsibility to make sure that only
923 * one task is active at any given time.
925 * libata core layer takes care of synchronization between
926 * port_task and EH. ata_port_queue_task() may be ignored for EH
930 * Inherited from caller.
932 void ata_port_queue_task(struct ata_port *ap, void (*fn)(void *), void *data,
937 if (ap->pflags & ATA_PFLAG_FLUSH_PORT_TASK)
940 PREPARE_WORK(&ap->port_task, fn, data);
943 rc = queue_work(ata_wq, &ap->port_task);
945 rc = queue_delayed_work(ata_wq, &ap->port_task, delay);
947 /* rc == 0 means that another user is using port task */
952 * ata_port_flush_task - Flush port_task
953 * @ap: The ata_port to flush port_task for
955 * After this function completes, port_task is guranteed not to
956 * be running or scheduled.
959 * Kernel thread context (may sleep)
961 void ata_port_flush_task(struct ata_port *ap)
967 spin_lock_irqsave(ap->lock, flags);
968 ap->pflags |= ATA_PFLAG_FLUSH_PORT_TASK;
969 spin_unlock_irqrestore(ap->lock, flags);
971 DPRINTK("flush #1\n");
972 flush_workqueue(ata_wq);
975 * At this point, if a task is running, it's guaranteed to see
976 * the FLUSH flag; thus, it will never queue pio tasks again.
979 if (!cancel_delayed_work(&ap->port_task)) {
981 ata_port_printk(ap, KERN_DEBUG, "%s: flush #2\n",
983 flush_workqueue(ata_wq);
986 spin_lock_irqsave(ap->lock, flags);
987 ap->pflags &= ~ATA_PFLAG_FLUSH_PORT_TASK;
988 spin_unlock_irqrestore(ap->lock, flags);
991 ata_port_printk(ap, KERN_DEBUG, "%s: EXIT\n", __FUNCTION__);
994 void ata_qc_complete_internal(struct ata_queued_cmd *qc)
996 struct completion *waiting = qc->private_data;
1002 * ata_exec_internal - execute libata internal command
1003 * @dev: Device to which the command is sent
1004 * @tf: Taskfile registers for the command and the result
1005 * @cdb: CDB for packet command
1006 * @dma_dir: Data tranfer direction of the command
1007 * @buf: Data buffer of the command
1008 * @buflen: Length of data buffer
1010 * Executes libata internal command with timeout. @tf contains
1011 * command on entry and result on return. Timeout and error
1012 * conditions are reported via return value. No recovery action
1013 * is taken after a command times out. It's caller's duty to
1014 * clean up after timeout.
1017 * None. Should be called with kernel context, might sleep.
1020 * Zero on success, AC_ERR_* mask on failure
1022 unsigned ata_exec_internal(struct ata_device *dev,
1023 struct ata_taskfile *tf, const u8 *cdb,
1024 int dma_dir, void *buf, unsigned int buflen)
1026 struct ata_port *ap = dev->ap;
1027 u8 command = tf->command;
1028 struct ata_queued_cmd *qc;
1029 unsigned int tag, preempted_tag;
1030 u32 preempted_sactive, preempted_qc_active;
1031 DECLARE_COMPLETION_ONSTACK(wait);
1032 unsigned long flags;
1033 unsigned int err_mask;
1036 spin_lock_irqsave(ap->lock, flags);
1038 /* no internal command while frozen */
1039 if (ap->pflags & ATA_PFLAG_FROZEN) {
1040 spin_unlock_irqrestore(ap->lock, flags);
1041 return AC_ERR_SYSTEM;
1044 /* initialize internal qc */
1046 /* XXX: Tag 0 is used for drivers with legacy EH as some
1047 * drivers choke if any other tag is given. This breaks
1048 * ata_tag_internal() test for those drivers. Don't use new
1049 * EH stuff without converting to it.
1051 if (ap->ops->error_handler)
1052 tag = ATA_TAG_INTERNAL;
1056 if (test_and_set_bit(tag, &ap->qc_allocated))
1058 qc = __ata_qc_from_tag(ap, tag);
1066 preempted_tag = ap->active_tag;
1067 preempted_sactive = ap->sactive;
1068 preempted_qc_active = ap->qc_active;
1069 ap->active_tag = ATA_TAG_POISON;
1073 /* prepare & issue qc */
1076 memcpy(qc->cdb, cdb, ATAPI_CDB_LEN);
1077 qc->flags |= ATA_QCFLAG_RESULT_TF;
1078 qc->dma_dir = dma_dir;
1079 if (dma_dir != DMA_NONE) {
1080 ata_sg_init_one(qc, buf, buflen);
1081 qc->nsect = buflen / ATA_SECT_SIZE;
1084 qc->private_data = &wait;
1085 qc->complete_fn = ata_qc_complete_internal;
1089 spin_unlock_irqrestore(ap->lock, flags);
1091 rc = wait_for_completion_timeout(&wait, ata_probe_timeout);
1093 ata_port_flush_task(ap);
1096 spin_lock_irqsave(ap->lock, flags);
1098 /* We're racing with irq here. If we lose, the
1099 * following test prevents us from completing the qc
1100 * twice. If we win, the port is frozen and will be
1101 * cleaned up by ->post_internal_cmd().
1103 if (qc->flags & ATA_QCFLAG_ACTIVE) {
1104 qc->err_mask |= AC_ERR_TIMEOUT;
1106 if (ap->ops->error_handler)
1107 ata_port_freeze(ap);
1109 ata_qc_complete(qc);
1111 if (ata_msg_warn(ap))
1112 ata_dev_printk(dev, KERN_WARNING,
1113 "qc timeout (cmd 0x%x)\n", command);
1116 spin_unlock_irqrestore(ap->lock, flags);
1119 /* do post_internal_cmd */
1120 if (ap->ops->post_internal_cmd)
1121 ap->ops->post_internal_cmd(qc);
1123 if (qc->flags & ATA_QCFLAG_FAILED && !qc->err_mask) {
1124 if (ata_msg_warn(ap))
1125 ata_dev_printk(dev, KERN_WARNING,
1126 "zero err_mask for failed "
1127 "internal command, assuming AC_ERR_OTHER\n");
1128 qc->err_mask |= AC_ERR_OTHER;
1132 spin_lock_irqsave(ap->lock, flags);
1134 *tf = qc->result_tf;
1135 err_mask = qc->err_mask;
1138 ap->active_tag = preempted_tag;
1139 ap->sactive = preempted_sactive;
1140 ap->qc_active = preempted_qc_active;
1142 /* XXX - Some LLDDs (sata_mv) disable port on command failure.
1143 * Until those drivers are fixed, we detect the condition
1144 * here, fail the command with AC_ERR_SYSTEM and reenable the
1147 * Note that this doesn't change any behavior as internal
1148 * command failure results in disabling the device in the
1149 * higher layer for LLDDs without new reset/EH callbacks.
1151 * Kill the following code as soon as those drivers are fixed.
1153 if (ap->flags & ATA_FLAG_DISABLED) {
1154 err_mask |= AC_ERR_SYSTEM;
1158 spin_unlock_irqrestore(ap->lock, flags);
1164 * ata_do_simple_cmd - execute simple internal command
1165 * @dev: Device to which the command is sent
1166 * @cmd: Opcode to execute
1168 * Execute a 'simple' command, that only consists of the opcode
1169 * 'cmd' itself, without filling any other registers
1172 * Kernel thread context (may sleep).
1175 * Zero on success, AC_ERR_* mask on failure
1177 unsigned int ata_do_simple_cmd(struct ata_device *dev, u8 cmd)
1179 struct ata_taskfile tf;
1181 ata_tf_init(dev, &tf);
1184 tf.flags |= ATA_TFLAG_DEVICE;
1185 tf.protocol = ATA_PROT_NODATA;
1187 return ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
1191 * ata_pio_need_iordy - check if iordy needed
1194 * Check if the current speed of the device requires IORDY. Used
1195 * by various controllers for chip configuration.
1198 unsigned int ata_pio_need_iordy(const struct ata_device *adev)
1201 int speed = adev->pio_mode - XFER_PIO_0;
1208 /* If we have no drive specific rule, then PIO 2 is non IORDY */
1210 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE */
1211 pio = adev->id[ATA_ID_EIDE_PIO];
1212 /* Is the speed faster than the drive allows non IORDY ? */
1214 /* This is cycle times not frequency - watch the logic! */
1215 if (pio > 240) /* PIO2 is 240nS per cycle */
1224 * ata_dev_read_id - Read ID data from the specified device
1225 * @dev: target device
1226 * @p_class: pointer to class of the target device (may be changed)
1227 * @flags: ATA_READID_* flags
1228 * @id: buffer to read IDENTIFY data into
1230 * Read ID data from the specified device. ATA_CMD_ID_ATA is
1231 * performed on ATA devices and ATA_CMD_ID_ATAPI on ATAPI
1232 * devices. This function also issues ATA_CMD_INIT_DEV_PARAMS
1233 * for pre-ATA4 drives.
1236 * Kernel thread context (may sleep)
1239 * 0 on success, -errno otherwise.
1241 int ata_dev_read_id(struct ata_device *dev, unsigned int *p_class,
1242 unsigned int flags, u16 *id)
1244 struct ata_port *ap = dev->ap;
1245 unsigned int class = *p_class;
1246 struct ata_taskfile tf;
1247 unsigned int err_mask = 0;
1251 if (ata_msg_ctl(ap))
1252 ata_dev_printk(dev, KERN_DEBUG, "%s: ENTER, host %u, dev %u\n",
1253 __FUNCTION__, ap->id, dev->devno);
1255 ata_dev_select(ap, dev->devno, 1, 1); /* select device 0/1 */
1258 ata_tf_init(dev, &tf);
1262 tf.command = ATA_CMD_ID_ATA;
1265 tf.command = ATA_CMD_ID_ATAPI;
1269 reason = "unsupported class";
1273 tf.protocol = ATA_PROT_PIO;
1275 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_FROM_DEVICE,
1276 id, sizeof(id[0]) * ATA_ID_WORDS);
1279 reason = "I/O error";
1283 swap_buf_le16(id, ATA_ID_WORDS);
1287 reason = "device reports illegal type";
1289 if (class == ATA_DEV_ATA) {
1290 if (!ata_id_is_ata(id) && !ata_id_is_cfa(id))
1293 if (ata_id_is_ata(id))
1297 if ((flags & ATA_READID_POSTRESET) && class == ATA_DEV_ATA) {
1299 * The exact sequence expected by certain pre-ATA4 drives is:
1302 * INITIALIZE DEVICE PARAMETERS
1304 * Some drives were very specific about that exact sequence.
1306 if (ata_id_major_version(id) < 4 || !ata_id_has_lba(id)) {
1307 err_mask = ata_dev_init_params(dev, id[3], id[6]);
1310 reason = "INIT_DEV_PARAMS failed";
1314 /* current CHS translation info (id[53-58]) might be
1315 * changed. reread the identify device info.
1317 flags &= ~ATA_READID_POSTRESET;
1327 if (ata_msg_warn(ap))
1328 ata_dev_printk(dev, KERN_WARNING, "failed to IDENTIFY "
1329 "(%s, err_mask=0x%x)\n", reason, err_mask);
1333 static inline u8 ata_dev_knobble(struct ata_device *dev)
1335 return ((dev->ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(dev->id)));
1338 static void ata_dev_config_ncq(struct ata_device *dev,
1339 char *desc, size_t desc_sz)
1341 struct ata_port *ap = dev->ap;
1342 int hdepth = 0, ddepth = ata_id_queue_depth(dev->id);
1344 if (!ata_id_has_ncq(dev->id)) {
1348 if (ata_device_blacklisted(dev) & ATA_HORKAGE_NONCQ) {
1349 snprintf(desc, desc_sz, "NCQ (not used)");
1352 if (ap->flags & ATA_FLAG_NCQ) {
1353 hdepth = min(ap->scsi_host->can_queue, ATA_MAX_QUEUE - 1);
1354 dev->flags |= ATA_DFLAG_NCQ;
1357 if (hdepth >= ddepth)
1358 snprintf(desc, desc_sz, "NCQ (depth %d)", ddepth);
1360 snprintf(desc, desc_sz, "NCQ (depth %d/%d)", hdepth, ddepth);
1363 static void ata_set_port_max_cmd_len(struct ata_port *ap)
1367 if (ap->scsi_host) {
1368 unsigned int len = 0;
1370 for (i = 0; i < ATA_MAX_DEVICES; i++)
1371 len = max(len, ap->device[i].cdb_len);
1373 ap->scsi_host->max_cmd_len = len;
1378 * ata_dev_configure - Configure the specified ATA/ATAPI device
1379 * @dev: Target device to configure
1381 * Configure @dev according to @dev->id. Generic and low-level
1382 * driver specific fixups are also applied.
1385 * Kernel thread context (may sleep)
1388 * 0 on success, -errno otherwise
1390 int ata_dev_configure(struct ata_device *dev)
1392 struct ata_port *ap = dev->ap;
1393 int print_info = ap->eh_context.i.flags & ATA_EHI_PRINTINFO;
1394 const u16 *id = dev->id;
1395 unsigned int xfer_mask;
1396 char revbuf[7]; /* XYZ-99\0 */
1399 if (!ata_dev_enabled(dev) && ata_msg_info(ap)) {
1400 ata_dev_printk(dev, KERN_INFO,
1401 "%s: ENTER/EXIT (host %u, dev %u) -- nodev\n",
1402 __FUNCTION__, ap->id, dev->devno);
1406 if (ata_msg_probe(ap))
1407 ata_dev_printk(dev, KERN_DEBUG, "%s: ENTER, host %u, dev %u\n",
1408 __FUNCTION__, ap->id, dev->devno);
1410 /* print device capabilities */
1411 if (ata_msg_probe(ap))
1412 ata_dev_printk(dev, KERN_DEBUG,
1413 "%s: cfg 49:%04x 82:%04x 83:%04x 84:%04x "
1414 "85:%04x 86:%04x 87:%04x 88:%04x\n",
1416 id[49], id[82], id[83], id[84],
1417 id[85], id[86], id[87], id[88]);
1419 /* initialize to-be-configured parameters */
1420 dev->flags &= ~ATA_DFLAG_CFG_MASK;
1421 dev->max_sectors = 0;
1429 * common ATA, ATAPI feature tests
1432 /* find max transfer mode; for printk only */
1433 xfer_mask = ata_id_xfermask(id);
1435 if (ata_msg_probe(ap))
1438 /* ATA-specific feature tests */
1439 if (dev->class == ATA_DEV_ATA) {
1440 if (ata_id_is_cfa(id)) {
1441 if (id[162] & 1) /* CPRM may make this media unusable */
1442 ata_dev_printk(dev, KERN_WARNING, "ata%u: device %u supports DRM functions and may not be fully accessable.\n",
1443 ap->id, dev->devno);
1444 snprintf(revbuf, 7, "CFA");
1447 snprintf(revbuf, 7, "ATA-%d", ata_id_major_version(id));
1449 dev->n_sectors = ata_id_n_sectors(id);
1451 if (ata_id_has_lba(id)) {
1452 const char *lba_desc;
1456 dev->flags |= ATA_DFLAG_LBA;
1457 if (ata_id_has_lba48(id)) {
1458 dev->flags |= ATA_DFLAG_LBA48;
1461 if (dev->n_sectors >= (1UL << 28) &&
1462 ata_id_has_flush_ext(id))
1463 dev->flags |= ATA_DFLAG_FLUSH_EXT;
1467 ata_dev_config_ncq(dev, ncq_desc, sizeof(ncq_desc));
1469 /* print device info to dmesg */
1470 if (ata_msg_drv(ap) && print_info)
1471 ata_dev_printk(dev, KERN_INFO, "%s, "
1472 "max %s, %Lu sectors: %s %s\n",
1474 ata_mode_string(xfer_mask),
1475 (unsigned long long)dev->n_sectors,
1476 lba_desc, ncq_desc);
1480 /* Default translation */
1481 dev->cylinders = id[1];
1483 dev->sectors = id[6];
1485 if (ata_id_current_chs_valid(id)) {
1486 /* Current CHS translation is valid. */
1487 dev->cylinders = id[54];
1488 dev->heads = id[55];
1489 dev->sectors = id[56];
1492 /* print device info to dmesg */
1493 if (ata_msg_drv(ap) && print_info)
1494 ata_dev_printk(dev, KERN_INFO, "%s, "
1495 "max %s, %Lu sectors: CHS %u/%u/%u\n",
1497 ata_mode_string(xfer_mask),
1498 (unsigned long long)dev->n_sectors,
1499 dev->cylinders, dev->heads,
1503 if (dev->id[59] & 0x100) {
1504 dev->multi_count = dev->id[59] & 0xff;
1505 if (ata_msg_drv(ap) && print_info)
1506 ata_dev_printk(dev, KERN_INFO,
1507 "ata%u: dev %u multi count %u\n",
1508 ap->id, dev->devno, dev->multi_count);
1514 /* ATAPI-specific feature tests */
1515 else if (dev->class == ATA_DEV_ATAPI) {
1516 char *cdb_intr_string = "";
1518 rc = atapi_cdb_len(id);
1519 if ((rc < 12) || (rc > ATAPI_CDB_LEN)) {
1520 if (ata_msg_warn(ap))
1521 ata_dev_printk(dev, KERN_WARNING,
1522 "unsupported CDB len\n");
1526 dev->cdb_len = (unsigned int) rc;
1528 if (ata_id_cdb_intr(dev->id)) {
1529 dev->flags |= ATA_DFLAG_CDB_INTR;
1530 cdb_intr_string = ", CDB intr";
1533 /* print device info to dmesg */
1534 if (ata_msg_drv(ap) && print_info)
1535 ata_dev_printk(dev, KERN_INFO, "ATAPI, max %s%s\n",
1536 ata_mode_string(xfer_mask),
1540 /* determine max_sectors */
1541 dev->max_sectors = ATA_MAX_SECTORS;
1542 if (dev->flags & ATA_DFLAG_LBA48)
1543 dev->max_sectors = ATA_MAX_SECTORS_LBA48;
1545 if (dev->horkage & ATA_HORKAGE_DIAGNOSTIC) {
1546 /* Let the user know. We don't want to disallow opens for
1547 rescue purposes, or in case the vendor is just a blithering
1550 ata_dev_printk(dev, KERN_WARNING,
1551 "Drive reports diagnostics failure. This may indicate a drive\n");
1552 ata_dev_printk(dev, KERN_WARNING,
1553 "fault or invalid emulation. Contact drive vendor for information.\n");
1557 ata_set_port_max_cmd_len(ap);
1559 /* limit bridge transfers to udma5, 200 sectors */
1560 if (ata_dev_knobble(dev)) {
1561 if (ata_msg_drv(ap) && print_info)
1562 ata_dev_printk(dev, KERN_INFO,
1563 "applying bridge limits\n");
1564 dev->udma_mask &= ATA_UDMA5;
1565 dev->max_sectors = ATA_MAX_SECTORS;
1568 if (ap->ops->dev_config)
1569 ap->ops->dev_config(ap, dev);
1571 if (ata_msg_probe(ap))
1572 ata_dev_printk(dev, KERN_DEBUG, "%s: EXIT, drv_stat = 0x%x\n",
1573 __FUNCTION__, ata_chk_status(ap));
1577 if (ata_msg_probe(ap))
1578 ata_dev_printk(dev, KERN_DEBUG,
1579 "%s: EXIT, err\n", __FUNCTION__);
1584 * ata_bus_probe - Reset and probe ATA bus
1587 * Master ATA bus probing function. Initiates a hardware-dependent
1588 * bus reset, then attempts to identify any devices found on
1592 * PCI/etc. bus probe sem.
1595 * Zero on success, negative errno otherwise.
1598 int ata_bus_probe(struct ata_port *ap)
1600 unsigned int classes[ATA_MAX_DEVICES];
1601 int tries[ATA_MAX_DEVICES];
1602 int i, rc, down_xfermask;
1603 struct ata_device *dev;
1607 for (i = 0; i < ATA_MAX_DEVICES; i++)
1608 tries[i] = ATA_PROBE_MAX_TRIES;
1613 /* reset and determine device classes */
1614 ap->ops->phy_reset(ap);
1616 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1617 dev = &ap->device[i];
1619 if (!(ap->flags & ATA_FLAG_DISABLED) &&
1620 dev->class != ATA_DEV_UNKNOWN)
1621 classes[dev->devno] = dev->class;
1623 classes[dev->devno] = ATA_DEV_NONE;
1625 dev->class = ATA_DEV_UNKNOWN;
1630 /* after the reset the device state is PIO 0 and the controller
1631 state is undefined. Record the mode */
1633 for (i = 0; i < ATA_MAX_DEVICES; i++)
1634 ap->device[i].pio_mode = XFER_PIO_0;
1636 /* read IDENTIFY page and configure devices */
1637 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1638 dev = &ap->device[i];
1641 dev->class = classes[i];
1643 if (!ata_dev_enabled(dev))
1646 rc = ata_dev_read_id(dev, &dev->class, ATA_READID_POSTRESET,
1651 ap->eh_context.i.flags |= ATA_EHI_PRINTINFO;
1652 rc = ata_dev_configure(dev);
1653 ap->eh_context.i.flags &= ~ATA_EHI_PRINTINFO;
1658 /* configure transfer mode */
1659 rc = ata_set_mode(ap, &dev);
1665 for (i = 0; i < ATA_MAX_DEVICES; i++)
1666 if (ata_dev_enabled(&ap->device[i]))
1669 /* no device present, disable port */
1670 ata_port_disable(ap);
1671 ap->ops->port_disable(ap);
1678 tries[dev->devno] = 0;
1681 sata_down_spd_limit(ap);
1684 tries[dev->devno]--;
1685 if (down_xfermask &&
1686 ata_down_xfermask_limit(dev, tries[dev->devno] == 1))
1687 tries[dev->devno] = 0;
1690 if (!tries[dev->devno]) {
1691 ata_down_xfermask_limit(dev, 1);
1692 ata_dev_disable(dev);
1699 * ata_port_probe - Mark port as enabled
1700 * @ap: Port for which we indicate enablement
1702 * Modify @ap data structure such that the system
1703 * thinks that the entire port is enabled.
1705 * LOCKING: host lock, or some other form of
1709 void ata_port_probe(struct ata_port *ap)
1711 ap->flags &= ~ATA_FLAG_DISABLED;
1715 * sata_print_link_status - Print SATA link status
1716 * @ap: SATA port to printk link status about
1718 * This function prints link speed and status of a SATA link.
1723 static void sata_print_link_status(struct ata_port *ap)
1725 u32 sstatus, scontrol, tmp;
1727 if (sata_scr_read(ap, SCR_STATUS, &sstatus))
1729 sata_scr_read(ap, SCR_CONTROL, &scontrol);
1731 if (ata_port_online(ap)) {
1732 tmp = (sstatus >> 4) & 0xf;
1733 ata_port_printk(ap, KERN_INFO,
1734 "SATA link up %s (SStatus %X SControl %X)\n",
1735 sata_spd_string(tmp), sstatus, scontrol);
1737 ata_port_printk(ap, KERN_INFO,
1738 "SATA link down (SStatus %X SControl %X)\n",
1744 * __sata_phy_reset - Wake/reset a low-level SATA PHY
1745 * @ap: SATA port associated with target SATA PHY.
1747 * This function issues commands to standard SATA Sxxx
1748 * PHY registers, to wake up the phy (and device), and
1749 * clear any reset condition.
1752 * PCI/etc. bus probe sem.
1755 void __sata_phy_reset(struct ata_port *ap)
1758 unsigned long timeout = jiffies + (HZ * 5);
1760 if (ap->flags & ATA_FLAG_SATA_RESET) {
1761 /* issue phy wake/reset */
1762 sata_scr_write_flush(ap, SCR_CONTROL, 0x301);
1763 /* Couldn't find anything in SATA I/II specs, but
1764 * AHCI-1.1 10.4.2 says at least 1 ms. */
1767 /* phy wake/clear reset */
1768 sata_scr_write_flush(ap, SCR_CONTROL, 0x300);
1770 /* wait for phy to become ready, if necessary */
1773 sata_scr_read(ap, SCR_STATUS, &sstatus);
1774 if ((sstatus & 0xf) != 1)
1776 } while (time_before(jiffies, timeout));
1778 /* print link status */
1779 sata_print_link_status(ap);
1781 /* TODO: phy layer with polling, timeouts, etc. */
1782 if (!ata_port_offline(ap))
1785 ata_port_disable(ap);
1787 if (ap->flags & ATA_FLAG_DISABLED)
1790 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
1791 ata_port_disable(ap);
1795 ap->cbl = ATA_CBL_SATA;
1799 * sata_phy_reset - Reset SATA bus.
1800 * @ap: SATA port associated with target SATA PHY.
1802 * This function resets the SATA bus, and then probes
1803 * the bus for devices.
1806 * PCI/etc. bus probe sem.
1809 void sata_phy_reset(struct ata_port *ap)
1811 __sata_phy_reset(ap);
1812 if (ap->flags & ATA_FLAG_DISABLED)
1818 * ata_dev_pair - return other device on cable
1821 * Obtain the other device on the same cable, or if none is
1822 * present NULL is returned
1825 struct ata_device *ata_dev_pair(struct ata_device *adev)
1827 struct ata_port *ap = adev->ap;
1828 struct ata_device *pair = &ap->device[1 - adev->devno];
1829 if (!ata_dev_enabled(pair))
1835 * ata_port_disable - Disable port.
1836 * @ap: Port to be disabled.
1838 * Modify @ap data structure such that the system
1839 * thinks that the entire port is disabled, and should
1840 * never attempt to probe or communicate with devices
1843 * LOCKING: host lock, or some other form of
1847 void ata_port_disable(struct ata_port *ap)
1849 ap->device[0].class = ATA_DEV_NONE;
1850 ap->device[1].class = ATA_DEV_NONE;
1851 ap->flags |= ATA_FLAG_DISABLED;
1855 * sata_down_spd_limit - adjust SATA spd limit downward
1856 * @ap: Port to adjust SATA spd limit for
1858 * Adjust SATA spd limit of @ap downward. Note that this
1859 * function only adjusts the limit. The change must be applied
1860 * using sata_set_spd().
1863 * Inherited from caller.
1866 * 0 on success, negative errno on failure
1868 int sata_down_spd_limit(struct ata_port *ap)
1870 u32 sstatus, spd, mask;
1873 rc = sata_scr_read(ap, SCR_STATUS, &sstatus);
1877 mask = ap->sata_spd_limit;
1880 highbit = fls(mask) - 1;
1881 mask &= ~(1 << highbit);
1883 spd = (sstatus >> 4) & 0xf;
1887 mask &= (1 << spd) - 1;
1891 ap->sata_spd_limit = mask;
1893 ata_port_printk(ap, KERN_WARNING, "limiting SATA link speed to %s\n",
1894 sata_spd_string(fls(mask)));
1899 static int __sata_set_spd_needed(struct ata_port *ap, u32 *scontrol)
1903 if (ap->sata_spd_limit == UINT_MAX)
1906 limit = fls(ap->sata_spd_limit);
1908 spd = (*scontrol >> 4) & 0xf;
1909 *scontrol = (*scontrol & ~0xf0) | ((limit & 0xf) << 4);
1911 return spd != limit;
1915 * sata_set_spd_needed - is SATA spd configuration needed
1916 * @ap: Port in question
1918 * Test whether the spd limit in SControl matches
1919 * @ap->sata_spd_limit. This function is used to determine
1920 * whether hardreset is necessary to apply SATA spd
1924 * Inherited from caller.
1927 * 1 if SATA spd configuration is needed, 0 otherwise.
1929 int sata_set_spd_needed(struct ata_port *ap)
1933 if (sata_scr_read(ap, SCR_CONTROL, &scontrol))
1936 return __sata_set_spd_needed(ap, &scontrol);
1940 * sata_set_spd - set SATA spd according to spd limit
1941 * @ap: Port to set SATA spd for
1943 * Set SATA spd of @ap according to sata_spd_limit.
1946 * Inherited from caller.
1949 * 0 if spd doesn't need to be changed, 1 if spd has been
1950 * changed. Negative errno if SCR registers are inaccessible.
1952 int sata_set_spd(struct ata_port *ap)
1957 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
1960 if (!__sata_set_spd_needed(ap, &scontrol))
1963 if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol)))
1970 * This mode timing computation functionality is ported over from
1971 * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik
1974 * PIO 0-4, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
1975 * These were taken from ATA/ATAPI-6 standard, rev 0a, except
1976 * for UDMA6, which is currently supported only by Maxtor drives.
1978 * For PIO 5/6 MWDMA 3/4 see the CFA specification 3.0.
1981 static const struct ata_timing ata_timing[] = {
1983 { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 },
1984 { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 },
1985 { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 },
1986 { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 },
1988 { XFER_MW_DMA_4, 25, 0, 0, 0, 55, 20, 80, 0 },
1989 { XFER_MW_DMA_3, 25, 0, 0, 0, 65, 25, 100, 0 },
1990 { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 },
1991 { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 },
1992 { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 },
1994 /* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */
1996 { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 },
1997 { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 },
1998 { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 },
2000 { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 },
2001 { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 },
2002 { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 },
2004 { XFER_PIO_6, 10, 55, 20, 80, 55, 20, 80, 0 },
2005 { XFER_PIO_5, 15, 65, 25, 100, 65, 25, 100, 0 },
2006 { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 },
2007 { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 },
2009 { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 },
2010 { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 },
2011 { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 },
2013 /* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */
2018 #define ENOUGH(v,unit) (((v)-1)/(unit)+1)
2019 #define EZ(v,unit) ((v)?ENOUGH(v,unit):0)
2021 static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT)
2023 q->setup = EZ(t->setup * 1000, T);
2024 q->act8b = EZ(t->act8b * 1000, T);
2025 q->rec8b = EZ(t->rec8b * 1000, T);
2026 q->cyc8b = EZ(t->cyc8b * 1000, T);
2027 q->active = EZ(t->active * 1000, T);
2028 q->recover = EZ(t->recover * 1000, T);
2029 q->cycle = EZ(t->cycle * 1000, T);
2030 q->udma = EZ(t->udma * 1000, UT);
2033 void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b,
2034 struct ata_timing *m, unsigned int what)
2036 if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup);
2037 if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b);
2038 if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b);
2039 if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b);
2040 if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active);
2041 if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover);
2042 if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle);
2043 if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma);
2046 static const struct ata_timing* ata_timing_find_mode(unsigned short speed)
2048 const struct ata_timing *t;
2050 for (t = ata_timing; t->mode != speed; t++)
2051 if (t->mode == 0xFF)
2056 int ata_timing_compute(struct ata_device *adev, unsigned short speed,
2057 struct ata_timing *t, int T, int UT)
2059 const struct ata_timing *s;
2060 struct ata_timing p;
2066 if (!(s = ata_timing_find_mode(speed)))
2069 memcpy(t, s, sizeof(*s));
2072 * If the drive is an EIDE drive, it can tell us it needs extended
2073 * PIO/MW_DMA cycle timing.
2076 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
2077 memset(&p, 0, sizeof(p));
2078 if(speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) {
2079 if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO];
2080 else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY];
2081 } else if(speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) {
2082 p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN];
2084 ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B);
2088 * Convert the timing to bus clock counts.
2091 ata_timing_quantize(t, t, T, UT);
2094 * Even in DMA/UDMA modes we still use PIO access for IDENTIFY,
2095 * S.M.A.R.T * and some other commands. We have to ensure that the
2096 * DMA cycle timing is slower/equal than the fastest PIO timing.
2099 if (speed > XFER_PIO_4) {
2100 ata_timing_compute(adev, adev->pio_mode, &p, T, UT);
2101 ata_timing_merge(&p, t, t, ATA_TIMING_ALL);
2105 * Lengthen active & recovery time so that cycle time is correct.
2108 if (t->act8b + t->rec8b < t->cyc8b) {
2109 t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2;
2110 t->rec8b = t->cyc8b - t->act8b;
2113 if (t->active + t->recover < t->cycle) {
2114 t->active += (t->cycle - (t->active + t->recover)) / 2;
2115 t->recover = t->cycle - t->active;
2122 * ata_down_xfermask_limit - adjust dev xfer masks downward
2123 * @dev: Device to adjust xfer masks
2124 * @force_pio0: Force PIO0
2126 * Adjust xfer masks of @dev downward. Note that this function
2127 * does not apply the change. Invoking ata_set_mode() afterwards
2128 * will apply the limit.
2131 * Inherited from caller.
2134 * 0 on success, negative errno on failure
2136 int ata_down_xfermask_limit(struct ata_device *dev, int force_pio0)
2138 unsigned long xfer_mask;
2141 xfer_mask = ata_pack_xfermask(dev->pio_mask, dev->mwdma_mask,
2146 /* don't gear down to MWDMA from UDMA, go directly to PIO */
2147 if (xfer_mask & ATA_MASK_UDMA)
2148 xfer_mask &= ~ATA_MASK_MWDMA;
2150 highbit = fls(xfer_mask) - 1;
2151 xfer_mask &= ~(1 << highbit);
2153 xfer_mask &= 1 << ATA_SHIFT_PIO;
2157 ata_unpack_xfermask(xfer_mask, &dev->pio_mask, &dev->mwdma_mask,
2160 ata_dev_printk(dev, KERN_WARNING, "limiting speed to %s\n",
2161 ata_mode_string(xfer_mask));
2169 static int ata_dev_set_mode(struct ata_device *dev)
2171 struct ata_eh_context *ehc = &dev->ap->eh_context;
2172 unsigned int err_mask;
2175 dev->flags &= ~ATA_DFLAG_PIO;
2176 if (dev->xfer_shift == ATA_SHIFT_PIO)
2177 dev->flags |= ATA_DFLAG_PIO;
2179 err_mask = ata_dev_set_xfermode(dev);
2181 ata_dev_printk(dev, KERN_ERR, "failed to set xfermode "
2182 "(err_mask=0x%x)\n", err_mask);
2186 ehc->i.flags |= ATA_EHI_POST_SETMODE;
2187 rc = ata_dev_revalidate(dev, 0);
2188 ehc->i.flags &= ~ATA_EHI_POST_SETMODE;
2192 DPRINTK("xfer_shift=%u, xfer_mode=0x%x\n",
2193 dev->xfer_shift, (int)dev->xfer_mode);
2195 ata_dev_printk(dev, KERN_INFO, "configured for %s\n",
2196 ata_mode_string(ata_xfer_mode2mask(dev->xfer_mode)));
2201 * ata_set_mode - Program timings and issue SET FEATURES - XFER
2202 * @ap: port on which timings will be programmed
2203 * @r_failed_dev: out paramter for failed device
2205 * Set ATA device disk transfer mode (PIO3, UDMA6, etc.). If
2206 * ata_set_mode() fails, pointer to the failing device is
2207 * returned in @r_failed_dev.
2210 * PCI/etc. bus probe sem.
2213 * 0 on success, negative errno otherwise
2215 int ata_set_mode(struct ata_port *ap, struct ata_device **r_failed_dev)
2217 struct ata_device *dev;
2218 int i, rc = 0, used_dma = 0, found = 0;
2220 /* has private set_mode? */
2221 if (ap->ops->set_mode) {
2222 /* FIXME: make ->set_mode handle no device case and
2223 * return error code and failing device on failure.
2225 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2226 if (ata_dev_ready(&ap->device[i])) {
2227 ap->ops->set_mode(ap);
2234 /* step 1: calculate xfer_mask */
2235 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2236 unsigned int pio_mask, dma_mask;
2238 dev = &ap->device[i];
2240 if (!ata_dev_enabled(dev))
2243 ata_dev_xfermask(dev);
2245 pio_mask = ata_pack_xfermask(dev->pio_mask, 0, 0);
2246 dma_mask = ata_pack_xfermask(0, dev->mwdma_mask, dev->udma_mask);
2247 dev->pio_mode = ata_xfer_mask2mode(pio_mask);
2248 dev->dma_mode = ata_xfer_mask2mode(dma_mask);
2257 /* step 2: always set host PIO timings */
2258 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2259 dev = &ap->device[i];
2260 if (!ata_dev_enabled(dev))
2263 if (!dev->pio_mode) {
2264 ata_dev_printk(dev, KERN_WARNING, "no PIO support\n");
2269 dev->xfer_mode = dev->pio_mode;
2270 dev->xfer_shift = ATA_SHIFT_PIO;
2271 if (ap->ops->set_piomode)
2272 ap->ops->set_piomode(ap, dev);
2275 /* step 3: set host DMA timings */
2276 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2277 dev = &ap->device[i];
2279 if (!ata_dev_enabled(dev) || !dev->dma_mode)
2282 dev->xfer_mode = dev->dma_mode;
2283 dev->xfer_shift = ata_xfer_mode2shift(dev->dma_mode);
2284 if (ap->ops->set_dmamode)
2285 ap->ops->set_dmamode(ap, dev);
2288 /* step 4: update devices' xfer mode */
2289 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2290 dev = &ap->device[i];
2292 /* don't udpate suspended devices' xfer mode */
2293 if (!ata_dev_ready(dev))
2296 rc = ata_dev_set_mode(dev);
2301 /* Record simplex status. If we selected DMA then the other
2302 * host channels are not permitted to do so.
2304 if (used_dma && (ap->host->flags & ATA_HOST_SIMPLEX))
2305 ap->host->simplex_claimed = 1;
2307 /* step5: chip specific finalisation */
2308 if (ap->ops->post_set_mode)
2309 ap->ops->post_set_mode(ap);
2313 *r_failed_dev = dev;
2318 * ata_tf_to_host - issue ATA taskfile to host controller
2319 * @ap: port to which command is being issued
2320 * @tf: ATA taskfile register set
2322 * Issues ATA taskfile register set to ATA host controller,
2323 * with proper synchronization with interrupt handler and
2327 * spin_lock_irqsave(host lock)
2330 static inline void ata_tf_to_host(struct ata_port *ap,
2331 const struct ata_taskfile *tf)
2333 ap->ops->tf_load(ap, tf);
2334 ap->ops->exec_command(ap, tf);
2338 * ata_busy_sleep - sleep until BSY clears, or timeout
2339 * @ap: port containing status register to be polled
2340 * @tmout_pat: impatience timeout
2341 * @tmout: overall timeout
2343 * Sleep until ATA Status register bit BSY clears,
2344 * or a timeout occurs.
2347 * Kernel thread context (may sleep).
2350 * 0 on success, -errno otherwise.
2352 int ata_busy_sleep(struct ata_port *ap,
2353 unsigned long tmout_pat, unsigned long tmout)
2355 unsigned long timer_start, timeout;
2358 status = ata_busy_wait(ap, ATA_BUSY, 300);
2359 timer_start = jiffies;
2360 timeout = timer_start + tmout_pat;
2361 while (status != 0xff && (status & ATA_BUSY) &&
2362 time_before(jiffies, timeout)) {
2364 status = ata_busy_wait(ap, ATA_BUSY, 3);
2367 if (status != 0xff && (status & ATA_BUSY))
2368 ata_port_printk(ap, KERN_WARNING,
2369 "port is slow to respond, please be patient "
2370 "(Status 0x%x)\n", status);
2372 timeout = timer_start + tmout;
2373 while (status != 0xff && (status & ATA_BUSY) &&
2374 time_before(jiffies, timeout)) {
2376 status = ata_chk_status(ap);
2382 if (status & ATA_BUSY) {
2383 ata_port_printk(ap, KERN_ERR, "port failed to respond "
2384 "(%lu secs, Status 0x%x)\n",
2385 tmout / HZ, status);
2392 static void ata_bus_post_reset(struct ata_port *ap, unsigned int devmask)
2394 struct ata_ioports *ioaddr = &ap->ioaddr;
2395 unsigned int dev0 = devmask & (1 << 0);
2396 unsigned int dev1 = devmask & (1 << 1);
2397 unsigned long timeout;
2399 /* if device 0 was found in ata_devchk, wait for its
2403 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2405 /* if device 1 was found in ata_devchk, wait for
2406 * register access, then wait for BSY to clear
2408 timeout = jiffies + ATA_TMOUT_BOOT;
2412 ap->ops->dev_select(ap, 1);
2413 if (ap->flags & ATA_FLAG_MMIO) {
2414 nsect = readb((void __iomem *) ioaddr->nsect_addr);
2415 lbal = readb((void __iomem *) ioaddr->lbal_addr);
2417 nsect = inb(ioaddr->nsect_addr);
2418 lbal = inb(ioaddr->lbal_addr);
2420 if ((nsect == 1) && (lbal == 1))
2422 if (time_after(jiffies, timeout)) {
2426 msleep(50); /* give drive a breather */
2429 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2431 /* is all this really necessary? */
2432 ap->ops->dev_select(ap, 0);
2434 ap->ops->dev_select(ap, 1);
2436 ap->ops->dev_select(ap, 0);
2439 static unsigned int ata_bus_softreset(struct ata_port *ap,
2440 unsigned int devmask)
2442 struct ata_ioports *ioaddr = &ap->ioaddr;
2444 DPRINTK("ata%u: bus reset via SRST\n", ap->id);
2446 /* software reset. causes dev0 to be selected */
2447 if (ap->flags & ATA_FLAG_MMIO) {
2448 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2449 udelay(20); /* FIXME: flush */
2450 writeb(ap->ctl | ATA_SRST, (void __iomem *) ioaddr->ctl_addr);
2451 udelay(20); /* FIXME: flush */
2452 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2454 outb(ap->ctl, ioaddr->ctl_addr);
2456 outb(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
2458 outb(ap->ctl, ioaddr->ctl_addr);
2461 /* spec mandates ">= 2ms" before checking status.
2462 * We wait 150ms, because that was the magic delay used for
2463 * ATAPI devices in Hale Landis's ATADRVR, for the period of time
2464 * between when the ATA command register is written, and then
2465 * status is checked. Because waiting for "a while" before
2466 * checking status is fine, post SRST, we perform this magic
2467 * delay here as well.
2469 * Old drivers/ide uses the 2mS rule and then waits for ready
2473 /* Before we perform post reset processing we want to see if
2474 * the bus shows 0xFF because the odd clown forgets the D7
2475 * pulldown resistor.
2477 if (ata_check_status(ap) == 0xFF)
2480 ata_bus_post_reset(ap, devmask);
2486 * ata_bus_reset - reset host port and associated ATA channel
2487 * @ap: port to reset
2489 * This is typically the first time we actually start issuing
2490 * commands to the ATA channel. We wait for BSY to clear, then
2491 * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its
2492 * result. Determine what devices, if any, are on the channel
2493 * by looking at the device 0/1 error register. Look at the signature
2494 * stored in each device's taskfile registers, to determine if
2495 * the device is ATA or ATAPI.
2498 * PCI/etc. bus probe sem.
2499 * Obtains host lock.
2502 * Sets ATA_FLAG_DISABLED if bus reset fails.
2505 void ata_bus_reset(struct ata_port *ap)
2507 struct ata_ioports *ioaddr = &ap->ioaddr;
2508 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2510 unsigned int dev0, dev1 = 0, devmask = 0;
2512 DPRINTK("ENTER, host %u, port %u\n", ap->id, ap->port_no);
2514 /* determine if device 0/1 are present */
2515 if (ap->flags & ATA_FLAG_SATA_RESET)
2518 dev0 = ata_devchk(ap, 0);
2520 dev1 = ata_devchk(ap, 1);
2524 devmask |= (1 << 0);
2526 devmask |= (1 << 1);
2528 /* select device 0 again */
2529 ap->ops->dev_select(ap, 0);
2531 /* issue bus reset */
2532 if (ap->flags & ATA_FLAG_SRST)
2533 if (ata_bus_softreset(ap, devmask))
2537 * determine by signature whether we have ATA or ATAPI devices
2539 ap->device[0].class = ata_dev_try_classify(ap, 0, &err);
2540 if ((slave_possible) && (err != 0x81))
2541 ap->device[1].class = ata_dev_try_classify(ap, 1, &err);
2543 /* re-enable interrupts */
2544 if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
2547 /* is double-select really necessary? */
2548 if (ap->device[1].class != ATA_DEV_NONE)
2549 ap->ops->dev_select(ap, 1);
2550 if (ap->device[0].class != ATA_DEV_NONE)
2551 ap->ops->dev_select(ap, 0);
2553 /* if no devices were detected, disable this port */
2554 if ((ap->device[0].class == ATA_DEV_NONE) &&
2555 (ap->device[1].class == ATA_DEV_NONE))
2558 if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) {
2559 /* set up device control for ATA_FLAG_SATA_RESET */
2560 if (ap->flags & ATA_FLAG_MMIO)
2561 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2563 outb(ap->ctl, ioaddr->ctl_addr);
2570 ata_port_printk(ap, KERN_ERR, "disabling port\n");
2571 ap->ops->port_disable(ap);
2577 * sata_phy_debounce - debounce SATA phy status
2578 * @ap: ATA port to debounce SATA phy status for
2579 * @params: timing parameters { interval, duratinon, timeout } in msec
2581 * Make sure SStatus of @ap reaches stable state, determined by
2582 * holding the same value where DET is not 1 for @duration polled
2583 * every @interval, before @timeout. Timeout constraints the
2584 * beginning of the stable state. Because, after hot unplugging,
2585 * DET gets stuck at 1 on some controllers, this functions waits
2586 * until timeout then returns 0 if DET is stable at 1.
2589 * Kernel thread context (may sleep)
2592 * 0 on success, -errno on failure.
2594 int sata_phy_debounce(struct ata_port *ap, const unsigned long *params)
2596 unsigned long interval_msec = params[0];
2597 unsigned long duration = params[1] * HZ / 1000;
2598 unsigned long timeout = jiffies + params[2] * HZ / 1000;
2599 unsigned long last_jiffies;
2603 if ((rc = sata_scr_read(ap, SCR_STATUS, &cur)))
2608 last_jiffies = jiffies;
2611 msleep(interval_msec);
2612 if ((rc = sata_scr_read(ap, SCR_STATUS, &cur)))
2618 if (cur == 1 && time_before(jiffies, timeout))
2620 if (time_after(jiffies, last_jiffies + duration))
2625 /* unstable, start over */
2627 last_jiffies = jiffies;
2630 if (time_after(jiffies, timeout))
2636 * sata_phy_resume - resume SATA phy
2637 * @ap: ATA port to resume SATA phy for
2638 * @params: timing parameters { interval, duratinon, timeout } in msec
2640 * Resume SATA phy of @ap and debounce it.
2643 * Kernel thread context (may sleep)
2646 * 0 on success, -errno on failure.
2648 int sata_phy_resume(struct ata_port *ap, const unsigned long *params)
2653 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
2656 scontrol = (scontrol & 0x0f0) | 0x300;
2658 if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol)))
2661 /* Some PHYs react badly if SStatus is pounded immediately
2662 * after resuming. Delay 200ms before debouncing.
2666 return sata_phy_debounce(ap, params);
2669 static void ata_wait_spinup(struct ata_port *ap)
2671 struct ata_eh_context *ehc = &ap->eh_context;
2672 unsigned long end, secs;
2675 /* first, debounce phy if SATA */
2676 if (ap->cbl == ATA_CBL_SATA) {
2677 rc = sata_phy_debounce(ap, sata_deb_timing_hotplug);
2679 /* if debounced successfully and offline, no need to wait */
2680 if ((rc == 0 || rc == -EOPNOTSUPP) && ata_port_offline(ap))
2684 /* okay, let's give the drive time to spin up */
2685 end = ehc->i.hotplug_timestamp + ATA_SPINUP_WAIT * HZ / 1000;
2686 secs = ((end - jiffies) + HZ - 1) / HZ;
2688 if (time_after(jiffies, end))
2692 ata_port_printk(ap, KERN_INFO, "waiting for device to spin up "
2693 "(%lu secs)\n", secs);
2695 schedule_timeout_uninterruptible(end - jiffies);
2699 * ata_std_prereset - prepare for reset
2700 * @ap: ATA port to be reset
2702 * @ap is about to be reset. Initialize it.
2705 * Kernel thread context (may sleep)
2708 * 0 on success, -errno otherwise.
2710 int ata_std_prereset(struct ata_port *ap)
2712 struct ata_eh_context *ehc = &ap->eh_context;
2713 const unsigned long *timing = sata_ehc_deb_timing(ehc);
2716 /* handle link resume & hotplug spinup */
2717 if ((ehc->i.flags & ATA_EHI_RESUME_LINK) &&
2718 (ap->flags & ATA_FLAG_HRST_TO_RESUME))
2719 ehc->i.action |= ATA_EH_HARDRESET;
2721 if ((ehc->i.flags & ATA_EHI_HOTPLUGGED) &&
2722 (ap->flags & ATA_FLAG_SKIP_D2H_BSY))
2723 ata_wait_spinup(ap);
2725 /* if we're about to do hardreset, nothing more to do */
2726 if (ehc->i.action & ATA_EH_HARDRESET)
2729 /* if SATA, resume phy */
2730 if (ap->cbl == ATA_CBL_SATA) {
2731 rc = sata_phy_resume(ap, timing);
2732 if (rc && rc != -EOPNOTSUPP) {
2733 /* phy resume failed */
2734 ata_port_printk(ap, KERN_WARNING, "failed to resume "
2735 "link for reset (errno=%d)\n", rc);
2740 /* Wait for !BSY if the controller can wait for the first D2H
2741 * Reg FIS and we don't know that no device is attached.
2743 if (!(ap->flags & ATA_FLAG_SKIP_D2H_BSY) && !ata_port_offline(ap))
2744 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2750 * ata_std_softreset - reset host port via ATA SRST
2751 * @ap: port to reset
2752 * @classes: resulting classes of attached devices
2754 * Reset host port using ATA SRST.
2757 * Kernel thread context (may sleep)
2760 * 0 on success, -errno otherwise.
2762 int ata_std_softreset(struct ata_port *ap, unsigned int *classes)
2764 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2765 unsigned int devmask = 0, err_mask;
2770 if (ata_port_offline(ap)) {
2771 classes[0] = ATA_DEV_NONE;
2775 /* determine if device 0/1 are present */
2776 if (ata_devchk(ap, 0))
2777 devmask |= (1 << 0);
2778 if (slave_possible && ata_devchk(ap, 1))
2779 devmask |= (1 << 1);
2781 /* select device 0 again */
2782 ap->ops->dev_select(ap, 0);
2784 /* issue bus reset */
2785 DPRINTK("about to softreset, devmask=%x\n", devmask);
2786 err_mask = ata_bus_softreset(ap, devmask);
2788 ata_port_printk(ap, KERN_ERR, "SRST failed (err_mask=0x%x)\n",
2793 /* determine by signature whether we have ATA or ATAPI devices */
2794 classes[0] = ata_dev_try_classify(ap, 0, &err);
2795 if (slave_possible && err != 0x81)
2796 classes[1] = ata_dev_try_classify(ap, 1, &err);
2799 DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]);
2804 * sata_port_hardreset - reset port via SATA phy reset
2805 * @ap: port to reset
2806 * @timing: timing parameters { interval, duratinon, timeout } in msec
2808 * SATA phy-reset host port using DET bits of SControl register.
2811 * Kernel thread context (may sleep)
2814 * 0 on success, -errno otherwise.
2816 int sata_port_hardreset(struct ata_port *ap, const unsigned long *timing)
2823 if (sata_set_spd_needed(ap)) {
2824 /* SATA spec says nothing about how to reconfigure
2825 * spd. To be on the safe side, turn off phy during
2826 * reconfiguration. This works for at least ICH7 AHCI
2829 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
2832 scontrol = (scontrol & 0x0f0) | 0x304;
2834 if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol)))
2840 /* issue phy wake/reset */
2841 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
2844 scontrol = (scontrol & 0x0f0) | 0x301;
2846 if ((rc = sata_scr_write_flush(ap, SCR_CONTROL, scontrol)))
2849 /* Couldn't find anything in SATA I/II specs, but AHCI-1.1
2850 * 10.4.2 says at least 1 ms.
2854 /* bring phy back */
2855 rc = sata_phy_resume(ap, timing);
2857 DPRINTK("EXIT, rc=%d\n", rc);
2862 * sata_std_hardreset - reset host port via SATA phy reset
2863 * @ap: port to reset
2864 * @class: resulting class of attached device
2866 * SATA phy-reset host port using DET bits of SControl register,
2867 * wait for !BSY and classify the attached device.
2870 * Kernel thread context (may sleep)
2873 * 0 on success, -errno otherwise.
2875 int sata_std_hardreset(struct ata_port *ap, unsigned int *class)
2877 const unsigned long *timing = sata_ehc_deb_timing(&ap->eh_context);
2883 rc = sata_port_hardreset(ap, timing);
2885 ata_port_printk(ap, KERN_ERR,
2886 "COMRESET failed (errno=%d)\n", rc);
2890 /* TODO: phy layer with polling, timeouts, etc. */
2891 if (ata_port_offline(ap)) {
2892 *class = ATA_DEV_NONE;
2893 DPRINTK("EXIT, link offline\n");
2897 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
2898 ata_port_printk(ap, KERN_ERR,
2899 "COMRESET failed (device not ready)\n");
2903 ap->ops->dev_select(ap, 0); /* probably unnecessary */
2905 *class = ata_dev_try_classify(ap, 0, NULL);
2907 DPRINTK("EXIT, class=%u\n", *class);
2912 * ata_std_postreset - standard postreset callback
2913 * @ap: the target ata_port
2914 * @classes: classes of attached devices
2916 * This function is invoked after a successful reset. Note that
2917 * the device might have been reset more than once using
2918 * different reset methods before postreset is invoked.
2921 * Kernel thread context (may sleep)
2923 void ata_std_postreset(struct ata_port *ap, unsigned int *classes)
2929 /* print link status */
2930 sata_print_link_status(ap);
2933 if (sata_scr_read(ap, SCR_ERROR, &serror) == 0)
2934 sata_scr_write(ap, SCR_ERROR, serror);
2936 /* re-enable interrupts */
2937 if (!ap->ops->error_handler) {
2938 /* FIXME: hack. create a hook instead */
2939 if (ap->ioaddr.ctl_addr)
2943 /* is double-select really necessary? */
2944 if (classes[0] != ATA_DEV_NONE)
2945 ap->ops->dev_select(ap, 1);
2946 if (classes[1] != ATA_DEV_NONE)
2947 ap->ops->dev_select(ap, 0);
2949 /* bail out if no device is present */
2950 if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) {
2951 DPRINTK("EXIT, no device\n");
2955 /* set up device control */
2956 if (ap->ioaddr.ctl_addr) {
2957 if (ap->flags & ATA_FLAG_MMIO)
2958 writeb(ap->ctl, (void __iomem *) ap->ioaddr.ctl_addr);
2960 outb(ap->ctl, ap->ioaddr.ctl_addr);
2967 * ata_dev_same_device - Determine whether new ID matches configured device
2968 * @dev: device to compare against
2969 * @new_class: class of the new device
2970 * @new_id: IDENTIFY page of the new device
2972 * Compare @new_class and @new_id against @dev and determine
2973 * whether @dev is the device indicated by @new_class and
2980 * 1 if @dev matches @new_class and @new_id, 0 otherwise.
2982 static int ata_dev_same_device(struct ata_device *dev, unsigned int new_class,
2985 const u16 *old_id = dev->id;
2986 unsigned char model[2][41], serial[2][21];
2989 if (dev->class != new_class) {
2990 ata_dev_printk(dev, KERN_INFO, "class mismatch %d != %d\n",
2991 dev->class, new_class);
2995 ata_id_c_string(old_id, model[0], ATA_ID_PROD_OFS, sizeof(model[0]));
2996 ata_id_c_string(new_id, model[1], ATA_ID_PROD_OFS, sizeof(model[1]));
2997 ata_id_c_string(old_id, serial[0], ATA_ID_SERNO_OFS, sizeof(serial[0]));
2998 ata_id_c_string(new_id, serial[1], ATA_ID_SERNO_OFS, sizeof(serial[1]));
2999 new_n_sectors = ata_id_n_sectors(new_id);
3001 if (strcmp(model[0], model[1])) {
3002 ata_dev_printk(dev, KERN_INFO, "model number mismatch "
3003 "'%s' != '%s'\n", model[0], model[1]);
3007 if (strcmp(serial[0], serial[1])) {
3008 ata_dev_printk(dev, KERN_INFO, "serial number mismatch "
3009 "'%s' != '%s'\n", serial[0], serial[1]);
3013 if (dev->class == ATA_DEV_ATA && dev->n_sectors != new_n_sectors) {
3014 ata_dev_printk(dev, KERN_INFO, "n_sectors mismatch "
3016 (unsigned long long)dev->n_sectors,
3017 (unsigned long long)new_n_sectors);
3025 * ata_dev_revalidate - Revalidate ATA device
3026 * @dev: device to revalidate
3027 * @readid_flags: read ID flags
3029 * Re-read IDENTIFY page and make sure @dev is still attached to
3033 * Kernel thread context (may sleep)
3036 * 0 on success, negative errno otherwise
3038 int ata_dev_revalidate(struct ata_device *dev, unsigned int readid_flags)
3040 unsigned int class = dev->class;
3041 u16 *id = (void *)dev->ap->sector_buf;
3044 if (!ata_dev_enabled(dev)) {
3050 rc = ata_dev_read_id(dev, &class, readid_flags, id);
3054 /* is the device still there? */
3055 if (!ata_dev_same_device(dev, class, id)) {
3060 memcpy(dev->id, id, sizeof(id[0]) * ATA_ID_WORDS);
3062 /* configure device according to the new ID */
3063 rc = ata_dev_configure(dev);
3068 ata_dev_printk(dev, KERN_ERR, "revalidation failed (errno=%d)\n", rc);
3072 struct ata_blacklist_entry {
3073 const char *model_num;
3074 const char *model_rev;
3075 unsigned long horkage;
3078 static const struct ata_blacklist_entry ata_device_blacklist [] = {
3079 /* Devices with DMA related problems under Linux */
3080 { "WDC AC11000H", NULL, ATA_HORKAGE_NODMA },
3081 { "WDC AC22100H", NULL, ATA_HORKAGE_NODMA },
3082 { "WDC AC32500H", NULL, ATA_HORKAGE_NODMA },
3083 { "WDC AC33100H", NULL, ATA_HORKAGE_NODMA },
3084 { "WDC AC31600H", NULL, ATA_HORKAGE_NODMA },
3085 { "WDC AC32100H", "24.09P07", ATA_HORKAGE_NODMA },
3086 { "WDC AC23200L", "21.10N21", ATA_HORKAGE_NODMA },
3087 { "Compaq CRD-8241B", NULL, ATA_HORKAGE_NODMA },
3088 { "CRD-8400B", NULL, ATA_HORKAGE_NODMA },
3089 { "CRD-8480B", NULL, ATA_HORKAGE_NODMA },
3090 { "CRD-8482B", NULL, ATA_HORKAGE_NODMA },
3091 { "CRD-84", NULL, ATA_HORKAGE_NODMA },
3092 { "SanDisk SDP3B", NULL, ATA_HORKAGE_NODMA },
3093 { "SanDisk SDP3B-64", NULL, ATA_HORKAGE_NODMA },
3094 { "SANYO CD-ROM CRD", NULL, ATA_HORKAGE_NODMA },
3095 { "HITACHI CDR-8", NULL, ATA_HORKAGE_NODMA },
3096 { "HITACHI CDR-8335", NULL, ATA_HORKAGE_NODMA },
3097 { "HITACHI CDR-8435", NULL, ATA_HORKAGE_NODMA },
3098 { "Toshiba CD-ROM XM-6202B", NULL, ATA_HORKAGE_NODMA },
3099 { "TOSHIBA CD-ROM XM-1702BC", NULL, ATA_HORKAGE_NODMA },
3100 { "CD-532E-A", NULL, ATA_HORKAGE_NODMA },
3101 { "E-IDE CD-ROM CR-840",NULL, ATA_HORKAGE_NODMA },
3102 { "CD-ROM Drive/F5A", NULL, ATA_HORKAGE_NODMA },
3103 { "WPI CDD-820", NULL, ATA_HORKAGE_NODMA },
3104 { "SAMSUNG CD-ROM SC-148C", NULL, ATA_HORKAGE_NODMA },
3105 { "SAMSUNG CD-ROM SC", NULL, ATA_HORKAGE_NODMA },
3106 { "SanDisk SDP3B-64", NULL, ATA_HORKAGE_NODMA },
3107 { "ATAPI CD-ROM DRIVE 40X MAXIMUM",NULL,ATA_HORKAGE_NODMA },
3108 { "_NEC DV5800A", NULL, ATA_HORKAGE_NODMA },
3109 { "SAMSUNG CD-ROM SN-124","N001", ATA_HORKAGE_NODMA },
3111 /* Devices we expect to fail diagnostics */
3113 /* Devices where NCQ should be avoided */
3115 { "WDC WD740ADFD-00", NULL, ATA_HORKAGE_NONCQ },
3117 /* Devices with NCQ limits */
3123 static int ata_strim(char *s, size_t len)
3125 len = strnlen(s, len);
3127 /* ATAPI specifies that empty space is blank-filled; remove blanks */
3128 while ((len > 0) && (s[len - 1] == ' ')) {
3135 unsigned long ata_device_blacklisted(const struct ata_device *dev)
3137 unsigned char model_num[40];
3138 unsigned char model_rev[16];
3139 unsigned int nlen, rlen;
3140 const struct ata_blacklist_entry *ad = ata_device_blacklist;
3142 ata_id_string(dev->id, model_num, ATA_ID_PROD_OFS,
3144 ata_id_string(dev->id, model_rev, ATA_ID_FW_REV_OFS,
3146 nlen = ata_strim(model_num, sizeof(model_num));
3147 rlen = ata_strim(model_rev, sizeof(model_rev));
3149 while (ad->model_num) {
3150 if (!strncmp(ad->model_num, model_num, nlen)) {
3151 if (ad->model_rev == NULL)
3153 if (!strncmp(ad->model_rev, model_rev, rlen))
3161 static int ata_dma_blacklisted(const struct ata_device *dev)
3163 /* We don't support polling DMA.
3164 * DMA blacklist those ATAPI devices with CDB-intr (and use PIO)
3165 * if the LLDD handles only interrupts in the HSM_ST_LAST state.
3167 if ((dev->ap->flags & ATA_FLAG_PIO_POLLING) &&
3168 (dev->flags & ATA_DFLAG_CDB_INTR))
3170 return (ata_device_blacklisted(dev) & ATA_HORKAGE_NODMA) ? 1 : 0;
3174 * ata_dev_xfermask - Compute supported xfermask of the given device
3175 * @dev: Device to compute xfermask for
3177 * Compute supported xfermask of @dev and store it in
3178 * dev->*_mask. This function is responsible for applying all
3179 * known limits including host controller limits, device
3185 static void ata_dev_xfermask(struct ata_device *dev)
3187 struct ata_port *ap = dev->ap;
3188 struct ata_host *host = ap->host;
3189 unsigned long xfer_mask;
3191 /* controller modes available */
3192 xfer_mask = ata_pack_xfermask(ap->pio_mask,
3193 ap->mwdma_mask, ap->udma_mask);
3195 /* Apply cable rule here. Don't apply it early because when
3196 * we handle hot plug the cable type can itself change.
3198 if (ap->cbl == ATA_CBL_PATA40)
3199 xfer_mask &= ~(0xF8 << ATA_SHIFT_UDMA);
3200 /* Apply drive side cable rule. Unknown or 80 pin cables reported
3201 * host side are checked drive side as well. Cases where we know a
3202 * 40wire cable is used safely for 80 are not checked here.
3204 if (ata_drive_40wire(dev->id) && (ap->cbl == ATA_CBL_PATA_UNK || ap->cbl == ATA_CBL_PATA80))
3205 xfer_mask &= ~(0xF8 << ATA_SHIFT_UDMA);
3208 xfer_mask &= ata_pack_xfermask(dev->pio_mask,
3209 dev->mwdma_mask, dev->udma_mask);
3210 xfer_mask &= ata_id_xfermask(dev->id);
3213 * CFA Advanced TrueIDE timings are not allowed on a shared
3216 if (ata_dev_pair(dev)) {
3217 /* No PIO5 or PIO6 */
3218 xfer_mask &= ~(0x03 << (ATA_SHIFT_PIO + 5));
3219 /* No MWDMA3 or MWDMA 4 */
3220 xfer_mask &= ~(0x03 << (ATA_SHIFT_MWDMA + 3));
3223 if (ata_dma_blacklisted(dev)) {
3224 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
3225 ata_dev_printk(dev, KERN_WARNING,
3226 "device is on DMA blacklist, disabling DMA\n");
3229 if ((host->flags & ATA_HOST_SIMPLEX) && host->simplex_claimed) {
3230 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
3231 ata_dev_printk(dev, KERN_WARNING, "simplex DMA is claimed by "
3232 "other device, disabling DMA\n");
3235 if (ap->ops->mode_filter)
3236 xfer_mask = ap->ops->mode_filter(ap, dev, xfer_mask);
3238 ata_unpack_xfermask(xfer_mask, &dev->pio_mask,
3239 &dev->mwdma_mask, &dev->udma_mask);
3243 * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command
3244 * @dev: Device to which command will be sent
3246 * Issue SET FEATURES - XFER MODE command to device @dev
3250 * PCI/etc. bus probe sem.
3253 * 0 on success, AC_ERR_* mask otherwise.
3256 static unsigned int ata_dev_set_xfermode(struct ata_device *dev)
3258 struct ata_taskfile tf;
3259 unsigned int err_mask;
3261 /* set up set-features taskfile */
3262 DPRINTK("set features - xfer mode\n");
3264 ata_tf_init(dev, &tf);
3265 tf.command = ATA_CMD_SET_FEATURES;
3266 tf.feature = SETFEATURES_XFER;
3267 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
3268 tf.protocol = ATA_PROT_NODATA;
3269 tf.nsect = dev->xfer_mode;
3271 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
3273 DPRINTK("EXIT, err_mask=%x\n", err_mask);
3278 * ata_dev_init_params - Issue INIT DEV PARAMS command
3279 * @dev: Device to which command will be sent
3280 * @heads: Number of heads (taskfile parameter)
3281 * @sectors: Number of sectors (taskfile parameter)
3284 * Kernel thread context (may sleep)
3287 * 0 on success, AC_ERR_* mask otherwise.
3289 static unsigned int ata_dev_init_params(struct ata_device *dev,
3290 u16 heads, u16 sectors)
3292 struct ata_taskfile tf;
3293 unsigned int err_mask;
3295 /* Number of sectors per track 1-255. Number of heads 1-16 */
3296 if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16)
3297 return AC_ERR_INVALID;
3299 /* set up init dev params taskfile */
3300 DPRINTK("init dev params \n");
3302 ata_tf_init(dev, &tf);
3303 tf.command = ATA_CMD_INIT_DEV_PARAMS;
3304 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
3305 tf.protocol = ATA_PROT_NODATA;
3307 tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */
3309 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
3311 DPRINTK("EXIT, err_mask=%x\n", err_mask);
3316 * ata_sg_clean - Unmap DMA memory associated with command
3317 * @qc: Command containing DMA memory to be released
3319 * Unmap all mapped DMA memory associated with this command.
3322 * spin_lock_irqsave(host lock)
3325 static void ata_sg_clean(struct ata_queued_cmd *qc)
3327 struct ata_port *ap = qc->ap;
3328 struct scatterlist *sg = qc->__sg;
3329 int dir = qc->dma_dir;
3330 void *pad_buf = NULL;
3332 WARN_ON(!(qc->flags & ATA_QCFLAG_DMAMAP));
3333 WARN_ON(sg == NULL);
3335 if (qc->flags & ATA_QCFLAG_SINGLE)
3336 WARN_ON(qc->n_elem > 1);
3338 VPRINTK("unmapping %u sg elements\n", qc->n_elem);
3340 /* if we padded the buffer out to 32-bit bound, and data
3341 * xfer direction is from-device, we must copy from the
3342 * pad buffer back into the supplied buffer
3344 if (qc->pad_len && !(qc->tf.flags & ATA_TFLAG_WRITE))
3345 pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3347 if (qc->flags & ATA_QCFLAG_SG) {
3349 dma_unmap_sg(ap->dev, sg, qc->n_elem, dir);
3350 /* restore last sg */
3351 sg[qc->orig_n_elem - 1].length += qc->pad_len;
3353 struct scatterlist *psg = &qc->pad_sgent;
3354 void *addr = kmap_atomic(psg->page, KM_IRQ0);
3355 memcpy(addr + psg->offset, pad_buf, qc->pad_len);
3356 kunmap_atomic(addr, KM_IRQ0);
3360 dma_unmap_single(ap->dev,
3361 sg_dma_address(&sg[0]), sg_dma_len(&sg[0]),
3364 sg->length += qc->pad_len;
3366 memcpy(qc->buf_virt + sg->length - qc->pad_len,
3367 pad_buf, qc->pad_len);
3370 qc->flags &= ~ATA_QCFLAG_DMAMAP;
3375 * ata_fill_sg - Fill PCI IDE PRD table
3376 * @qc: Metadata associated with taskfile to be transferred
3378 * Fill PCI IDE PRD (scatter-gather) table with segments
3379 * associated with the current disk command.
3382 * spin_lock_irqsave(host lock)
3385 static void ata_fill_sg(struct ata_queued_cmd *qc)
3387 struct ata_port *ap = qc->ap;
3388 struct scatterlist *sg;
3391 WARN_ON(qc->__sg == NULL);
3392 WARN_ON(qc->n_elem == 0 && qc->pad_len == 0);
3395 ata_for_each_sg(sg, qc) {
3399 /* determine if physical DMA addr spans 64K boundary.
3400 * Note h/w doesn't support 64-bit, so we unconditionally
3401 * truncate dma_addr_t to u32.
3403 addr = (u32) sg_dma_address(sg);
3404 sg_len = sg_dma_len(sg);
3407 offset = addr & 0xffff;
3409 if ((offset + sg_len) > 0x10000)
3410 len = 0x10000 - offset;
3412 ap->prd[idx].addr = cpu_to_le32(addr);
3413 ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff);
3414 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
3423 ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
3426 * ata_check_atapi_dma - Check whether ATAPI DMA can be supported
3427 * @qc: Metadata associated with taskfile to check
3429 * Allow low-level driver to filter ATA PACKET commands, returning
3430 * a status indicating whether or not it is OK to use DMA for the
3431 * supplied PACKET command.
3434 * spin_lock_irqsave(host lock)
3436 * RETURNS: 0 when ATAPI DMA can be used
3439 int ata_check_atapi_dma(struct ata_queued_cmd *qc)
3441 struct ata_port *ap = qc->ap;
3442 int rc = 0; /* Assume ATAPI DMA is OK by default */
3444 if (ap->ops->check_atapi_dma)
3445 rc = ap->ops->check_atapi_dma(qc);
3450 * ata_qc_prep - Prepare taskfile for submission
3451 * @qc: Metadata associated with taskfile to be prepared
3453 * Prepare ATA taskfile for submission.
3456 * spin_lock_irqsave(host lock)
3458 void ata_qc_prep(struct ata_queued_cmd *qc)
3460 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
3466 void ata_noop_qc_prep(struct ata_queued_cmd *qc) { }
3469 * ata_sg_init_one - Associate command with memory buffer
3470 * @qc: Command to be associated
3471 * @buf: Memory buffer
3472 * @buflen: Length of memory buffer, in bytes.
3474 * Initialize the data-related elements of queued_cmd @qc
3475 * to point to a single memory buffer, @buf of byte length @buflen.
3478 * spin_lock_irqsave(host lock)
3481 void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen)
3483 struct scatterlist *sg;
3485 qc->flags |= ATA_QCFLAG_SINGLE;
3487 memset(&qc->sgent, 0, sizeof(qc->sgent));
3488 qc->__sg = &qc->sgent;
3490 qc->orig_n_elem = 1;
3492 qc->nbytes = buflen;
3495 sg_init_one(sg, buf, buflen);
3499 * ata_sg_init - Associate command with scatter-gather table.
3500 * @qc: Command to be associated
3501 * @sg: Scatter-gather table.
3502 * @n_elem: Number of elements in s/g table.
3504 * Initialize the data-related elements of queued_cmd @qc
3505 * to point to a scatter-gather table @sg, containing @n_elem
3509 * spin_lock_irqsave(host lock)
3512 void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
3513 unsigned int n_elem)
3515 qc->flags |= ATA_QCFLAG_SG;
3517 qc->n_elem = n_elem;
3518 qc->orig_n_elem = n_elem;
3522 * ata_sg_setup_one - DMA-map the memory buffer associated with a command.
3523 * @qc: Command with memory buffer to be mapped.
3525 * DMA-map the memory buffer associated with queued_cmd @qc.
3528 * spin_lock_irqsave(host lock)
3531 * Zero on success, negative on error.
3534 static int ata_sg_setup_one(struct ata_queued_cmd *qc)
3536 struct ata_port *ap = qc->ap;
3537 int dir = qc->dma_dir;
3538 struct scatterlist *sg = qc->__sg;
3539 dma_addr_t dma_address;
3542 /* we must lengthen transfers to end on a 32-bit boundary */
3543 qc->pad_len = sg->length & 3;
3545 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3546 struct scatterlist *psg = &qc->pad_sgent;
3548 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
3550 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
3552 if (qc->tf.flags & ATA_TFLAG_WRITE)
3553 memcpy(pad_buf, qc->buf_virt + sg->length - qc->pad_len,
3556 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
3557 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
3559 sg->length -= qc->pad_len;
3560 if (sg->length == 0)
3563 DPRINTK("padding done, sg->length=%u pad_len=%u\n",
3564 sg->length, qc->pad_len);
3572 dma_address = dma_map_single(ap->dev, qc->buf_virt,
3574 if (dma_mapping_error(dma_address)) {
3576 sg->length += qc->pad_len;
3580 sg_dma_address(sg) = dma_address;
3581 sg_dma_len(sg) = sg->length;
3584 DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg),
3585 qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3591 * ata_sg_setup - DMA-map the scatter-gather table associated with a command.
3592 * @qc: Command with scatter-gather table to be mapped.
3594 * DMA-map the scatter-gather table associated with queued_cmd @qc.
3597 * spin_lock_irqsave(host lock)
3600 * Zero on success, negative on error.
3604 static int ata_sg_setup(struct ata_queued_cmd *qc)
3606 struct ata_port *ap = qc->ap;
3607 struct scatterlist *sg = qc->__sg;
3608 struct scatterlist *lsg = &sg[qc->n_elem - 1];
3609 int n_elem, pre_n_elem, dir, trim_sg = 0;
3611 VPRINTK("ENTER, ata%u\n", ap->id);
3612 WARN_ON(!(qc->flags & ATA_QCFLAG_SG));
3614 /* we must lengthen transfers to end on a 32-bit boundary */
3615 qc->pad_len = lsg->length & 3;
3617 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3618 struct scatterlist *psg = &qc->pad_sgent;
3619 unsigned int offset;
3621 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
3623 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
3626 * psg->page/offset are used to copy to-be-written
3627 * data in this function or read data in ata_sg_clean.
3629 offset = lsg->offset + lsg->length - qc->pad_len;
3630 psg->page = nth_page(lsg->page, offset >> PAGE_SHIFT);
3631 psg->offset = offset_in_page(offset);
3633 if (qc->tf.flags & ATA_TFLAG_WRITE) {
3634 void *addr = kmap_atomic(psg->page, KM_IRQ0);
3635 memcpy(pad_buf, addr + psg->offset, qc->pad_len);
3636 kunmap_atomic(addr, KM_IRQ0);
3639 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
3640 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
3642 lsg->length -= qc->pad_len;
3643 if (lsg->length == 0)
3646 DPRINTK("padding done, sg[%d].length=%u pad_len=%u\n",
3647 qc->n_elem - 1, lsg->length, qc->pad_len);
3650 pre_n_elem = qc->n_elem;
3651 if (trim_sg && pre_n_elem)
3660 n_elem = dma_map_sg(ap->dev, sg, pre_n_elem, dir);
3662 /* restore last sg */
3663 lsg->length += qc->pad_len;
3667 DPRINTK("%d sg elements mapped\n", n_elem);
3670 qc->n_elem = n_elem;
3676 * swap_buf_le16 - swap halves of 16-bit words in place
3677 * @buf: Buffer to swap
3678 * @buf_words: Number of 16-bit words in buffer.
3680 * Swap halves of 16-bit words if needed to convert from
3681 * little-endian byte order to native cpu byte order, or
3685 * Inherited from caller.
3687 void swap_buf_le16(u16 *buf, unsigned int buf_words)
3692 for (i = 0; i < buf_words; i++)
3693 buf[i] = le16_to_cpu(buf[i]);
3694 #endif /* __BIG_ENDIAN */
3698 * ata_mmio_data_xfer - Transfer data by MMIO
3699 * @adev: device for this I/O
3701 * @buflen: buffer length
3702 * @write_data: read/write
3704 * Transfer data from/to the device data register by MMIO.
3707 * Inherited from caller.
3710 void ata_mmio_data_xfer(struct ata_device *adev, unsigned char *buf,
3711 unsigned int buflen, int write_data)
3713 struct ata_port *ap = adev->ap;
3715 unsigned int words = buflen >> 1;
3716 u16 *buf16 = (u16 *) buf;
3717 void __iomem *mmio = (void __iomem *)ap->ioaddr.data_addr;
3719 /* Transfer multiple of 2 bytes */
3721 for (i = 0; i < words; i++)
3722 writew(le16_to_cpu(buf16[i]), mmio);
3724 for (i = 0; i < words; i++)
3725 buf16[i] = cpu_to_le16(readw(mmio));
3728 /* Transfer trailing 1 byte, if any. */
3729 if (unlikely(buflen & 0x01)) {
3730 u16 align_buf[1] = { 0 };
3731 unsigned char *trailing_buf = buf + buflen - 1;
3734 memcpy(align_buf, trailing_buf, 1);
3735 writew(le16_to_cpu(align_buf[0]), mmio);
3737 align_buf[0] = cpu_to_le16(readw(mmio));
3738 memcpy(trailing_buf, align_buf, 1);
3744 * ata_pio_data_xfer - Transfer data by PIO
3745 * @adev: device to target
3747 * @buflen: buffer length
3748 * @write_data: read/write
3750 * Transfer data from/to the device data register by PIO.
3753 * Inherited from caller.
3756 void ata_pio_data_xfer(struct ata_device *adev, unsigned char *buf,
3757 unsigned int buflen, int write_data)
3759 struct ata_port *ap = adev->ap;
3760 unsigned int words = buflen >> 1;
3762 /* Transfer multiple of 2 bytes */
3764 outsw(ap->ioaddr.data_addr, buf, words);
3766 insw(ap->ioaddr.data_addr, buf, words);
3768 /* Transfer trailing 1 byte, if any. */
3769 if (unlikely(buflen & 0x01)) {
3770 u16 align_buf[1] = { 0 };
3771 unsigned char *trailing_buf = buf + buflen - 1;
3774 memcpy(align_buf, trailing_buf, 1);
3775 outw(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr);
3777 align_buf[0] = cpu_to_le16(inw(ap->ioaddr.data_addr));
3778 memcpy(trailing_buf, align_buf, 1);
3784 * ata_pio_data_xfer_noirq - Transfer data by PIO
3785 * @adev: device to target
3787 * @buflen: buffer length
3788 * @write_data: read/write
3790 * Transfer data from/to the device data register by PIO. Do the
3791 * transfer with interrupts disabled.
3794 * Inherited from caller.
3797 void ata_pio_data_xfer_noirq(struct ata_device *adev, unsigned char *buf,
3798 unsigned int buflen, int write_data)
3800 unsigned long flags;
3801 local_irq_save(flags);
3802 ata_pio_data_xfer(adev, buf, buflen, write_data);
3803 local_irq_restore(flags);
3808 * ata_pio_sector - Transfer ATA_SECT_SIZE (512 bytes) of data.
3809 * @qc: Command on going
3811 * Transfer ATA_SECT_SIZE of data from/to the ATA device.
3814 * Inherited from caller.
3817 static void ata_pio_sector(struct ata_queued_cmd *qc)
3819 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
3820 struct scatterlist *sg = qc->__sg;
3821 struct ata_port *ap = qc->ap;
3823 unsigned int offset;
3826 if (qc->cursect == (qc->nsect - 1))
3827 ap->hsm_task_state = HSM_ST_LAST;
3829 page = sg[qc->cursg].page;
3830 offset = sg[qc->cursg].offset + qc->cursg_ofs * ATA_SECT_SIZE;
3832 /* get the current page and offset */
3833 page = nth_page(page, (offset >> PAGE_SHIFT));
3834 offset %= PAGE_SIZE;
3836 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3838 if (PageHighMem(page)) {
3839 unsigned long flags;
3841 /* FIXME: use a bounce buffer */
3842 local_irq_save(flags);
3843 buf = kmap_atomic(page, KM_IRQ0);
3845 /* do the actual data transfer */
3846 ap->ops->data_xfer(qc->dev, buf + offset, ATA_SECT_SIZE, do_write);
3848 kunmap_atomic(buf, KM_IRQ0);
3849 local_irq_restore(flags);
3851 buf = page_address(page);
3852 ap->ops->data_xfer(qc->dev, buf + offset, ATA_SECT_SIZE, do_write);
3858 if ((qc->cursg_ofs * ATA_SECT_SIZE) == (&sg[qc->cursg])->length) {
3865 * ata_pio_sectors - Transfer one or many 512-byte sectors.
3866 * @qc: Command on going
3868 * Transfer one or many ATA_SECT_SIZE of data from/to the
3869 * ATA device for the DRQ request.
3872 * Inherited from caller.
3875 static void ata_pio_sectors(struct ata_queued_cmd *qc)
3877 if (is_multi_taskfile(&qc->tf)) {
3878 /* READ/WRITE MULTIPLE */
3881 WARN_ON(qc->dev->multi_count == 0);
3883 nsect = min(qc->nsect - qc->cursect, qc->dev->multi_count);
3891 * atapi_send_cdb - Write CDB bytes to hardware
3892 * @ap: Port to which ATAPI device is attached.
3893 * @qc: Taskfile currently active
3895 * When device has indicated its readiness to accept
3896 * a CDB, this function is called. Send the CDB.
3902 static void atapi_send_cdb(struct ata_port *ap, struct ata_queued_cmd *qc)
3905 DPRINTK("send cdb\n");
3906 WARN_ON(qc->dev->cdb_len < 12);
3908 ap->ops->data_xfer(qc->dev, qc->cdb, qc->dev->cdb_len, 1);
3909 ata_altstatus(ap); /* flush */
3911 switch (qc->tf.protocol) {
3912 case ATA_PROT_ATAPI:
3913 ap->hsm_task_state = HSM_ST;
3915 case ATA_PROT_ATAPI_NODATA:
3916 ap->hsm_task_state = HSM_ST_LAST;
3918 case ATA_PROT_ATAPI_DMA:
3919 ap->hsm_task_state = HSM_ST_LAST;
3920 /* initiate bmdma */
3921 ap->ops->bmdma_start(qc);
3927 * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
3928 * @qc: Command on going
3929 * @bytes: number of bytes
3931 * Transfer Transfer data from/to the ATAPI device.
3934 * Inherited from caller.
3938 static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
3940 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
3941 struct scatterlist *sg = qc->__sg;
3942 struct ata_port *ap = qc->ap;
3945 unsigned int offset, count;
3947 if (qc->curbytes + bytes >= qc->nbytes)
3948 ap->hsm_task_state = HSM_ST_LAST;
3951 if (unlikely(qc->cursg >= qc->n_elem)) {
3953 * The end of qc->sg is reached and the device expects
3954 * more data to transfer. In order not to overrun qc->sg
3955 * and fulfill length specified in the byte count register,
3956 * - for read case, discard trailing data from the device
3957 * - for write case, padding zero data to the device
3959 u16 pad_buf[1] = { 0 };
3960 unsigned int words = bytes >> 1;
3963 if (words) /* warning if bytes > 1 */
3964 ata_dev_printk(qc->dev, KERN_WARNING,
3965 "%u bytes trailing data\n", bytes);
3967 for (i = 0; i < words; i++)
3968 ap->ops->data_xfer(qc->dev, (unsigned char*)pad_buf, 2, do_write);
3970 ap->hsm_task_state = HSM_ST_LAST;
3974 sg = &qc->__sg[qc->cursg];
3977 offset = sg->offset + qc->cursg_ofs;
3979 /* get the current page and offset */
3980 page = nth_page(page, (offset >> PAGE_SHIFT));
3981 offset %= PAGE_SIZE;
3983 /* don't overrun current sg */
3984 count = min(sg->length - qc->cursg_ofs, bytes);
3986 /* don't cross page boundaries */
3987 count = min(count, (unsigned int)PAGE_SIZE - offset);
3989 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3991 if (PageHighMem(page)) {
3992 unsigned long flags;
3994 /* FIXME: use bounce buffer */
3995 local_irq_save(flags);
3996 buf = kmap_atomic(page, KM_IRQ0);
3998 /* do the actual data transfer */
3999 ap->ops->data_xfer(qc->dev, buf + offset, count, do_write);
4001 kunmap_atomic(buf, KM_IRQ0);
4002 local_irq_restore(flags);
4004 buf = page_address(page);
4005 ap->ops->data_xfer(qc->dev, buf + offset, count, do_write);
4009 qc->curbytes += count;
4010 qc->cursg_ofs += count;
4012 if (qc->cursg_ofs == sg->length) {
4022 * atapi_pio_bytes - Transfer data from/to the ATAPI device.
4023 * @qc: Command on going
4025 * Transfer Transfer data from/to the ATAPI device.
4028 * Inherited from caller.
4031 static void atapi_pio_bytes(struct ata_queued_cmd *qc)
4033 struct ata_port *ap = qc->ap;
4034 struct ata_device *dev = qc->dev;
4035 unsigned int ireason, bc_lo, bc_hi, bytes;
4036 int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0;
4038 /* Abuse qc->result_tf for temp storage of intermediate TF
4039 * here to save some kernel stack usage.
4040 * For normal completion, qc->result_tf is not relevant. For
4041 * error, qc->result_tf is later overwritten by ata_qc_complete().
4042 * So, the correctness of qc->result_tf is not affected.
4044 ap->ops->tf_read(ap, &qc->result_tf);
4045 ireason = qc->result_tf.nsect;
4046 bc_lo = qc->result_tf.lbam;
4047 bc_hi = qc->result_tf.lbah;
4048 bytes = (bc_hi << 8) | bc_lo;
4050 /* shall be cleared to zero, indicating xfer of data */
4051 if (ireason & (1 << 0))
4054 /* make sure transfer direction matches expected */
4055 i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0;
4056 if (do_write != i_write)
4059 VPRINTK("ata%u: xfering %d bytes\n", ap->id, bytes);
4061 __atapi_pio_bytes(qc, bytes);
4066 ata_dev_printk(dev, KERN_INFO, "ATAPI check failed\n");
4067 qc->err_mask |= AC_ERR_HSM;
4068 ap->hsm_task_state = HSM_ST_ERR;
4072 * ata_hsm_ok_in_wq - Check if the qc can be handled in the workqueue.
4073 * @ap: the target ata_port
4077 * 1 if ok in workqueue, 0 otherwise.
4080 static inline int ata_hsm_ok_in_wq(struct ata_port *ap, struct ata_queued_cmd *qc)
4082 if (qc->tf.flags & ATA_TFLAG_POLLING)
4085 if (ap->hsm_task_state == HSM_ST_FIRST) {
4086 if (qc->tf.protocol == ATA_PROT_PIO &&
4087 (qc->tf.flags & ATA_TFLAG_WRITE))
4090 if (is_atapi_taskfile(&qc->tf) &&
4091 !(qc->dev->flags & ATA_DFLAG_CDB_INTR))
4099 * ata_hsm_qc_complete - finish a qc running on standard HSM
4100 * @qc: Command to complete
4101 * @in_wq: 1 if called from workqueue, 0 otherwise
4103 * Finish @qc which is running on standard HSM.
4106 * If @in_wq is zero, spin_lock_irqsave(host lock).
4107 * Otherwise, none on entry and grabs host lock.
4109 static void ata_hsm_qc_complete(struct ata_queued_cmd *qc, int in_wq)
4111 struct ata_port *ap = qc->ap;
4112 unsigned long flags;
4114 if (ap->ops->error_handler) {
4116 spin_lock_irqsave(ap->lock, flags);
4118 /* EH might have kicked in while host lock is
4121 qc = ata_qc_from_tag(ap, qc->tag);
4123 if (likely(!(qc->err_mask & AC_ERR_HSM))) {
4125 ata_qc_complete(qc);
4127 ata_port_freeze(ap);
4130 spin_unlock_irqrestore(ap->lock, flags);
4132 if (likely(!(qc->err_mask & AC_ERR_HSM)))
4133 ata_qc_complete(qc);
4135 ata_port_freeze(ap);
4139 spin_lock_irqsave(ap->lock, flags);
4141 ata_qc_complete(qc);
4142 spin_unlock_irqrestore(ap->lock, flags);
4144 ata_qc_complete(qc);
4147 ata_altstatus(ap); /* flush */
4151 * ata_hsm_move - move the HSM to the next state.
4152 * @ap: the target ata_port
4154 * @status: current device status
4155 * @in_wq: 1 if called from workqueue, 0 otherwise
4158 * 1 when poll next status needed, 0 otherwise.
4160 int ata_hsm_move(struct ata_port *ap, struct ata_queued_cmd *qc,
4161 u8 status, int in_wq)
4163 unsigned long flags = 0;
4166 WARN_ON((qc->flags & ATA_QCFLAG_ACTIVE) == 0);
4168 /* Make sure ata_qc_issue_prot() does not throw things
4169 * like DMA polling into the workqueue. Notice that
4170 * in_wq is not equivalent to (qc->tf.flags & ATA_TFLAG_POLLING).
4172 WARN_ON(in_wq != ata_hsm_ok_in_wq(ap, qc));
4175 DPRINTK("ata%u: protocol %d task_state %d (dev_stat 0x%X)\n",
4176 ap->id, qc->tf.protocol, ap->hsm_task_state, status);
4178 switch (ap->hsm_task_state) {
4180 /* Send first data block or PACKET CDB */
4182 /* If polling, we will stay in the work queue after
4183 * sending the data. Otherwise, interrupt handler
4184 * takes over after sending the data.
4186 poll_next = (qc->tf.flags & ATA_TFLAG_POLLING);
4188 /* check device status */
4189 if (unlikely((status & ATA_DRQ) == 0)) {
4190 /* handle BSY=0, DRQ=0 as error */
4191 if (likely(status & (ATA_ERR | ATA_DF)))
4192 /* device stops HSM for abort/error */
4193 qc->err_mask |= AC_ERR_DEV;
4195 /* HSM violation. Let EH handle this */
4196 qc->err_mask |= AC_ERR_HSM;
4198 ap->hsm_task_state = HSM_ST_ERR;
4202 /* Device should not ask for data transfer (DRQ=1)
4203 * when it finds something wrong.
4204 * We ignore DRQ here and stop the HSM by
4205 * changing hsm_task_state to HSM_ST_ERR and
4206 * let the EH abort the command or reset the device.
4208 if (unlikely(status & (ATA_ERR | ATA_DF))) {
4209 printk(KERN_WARNING "ata%d: DRQ=1 with device error, dev_stat 0x%X\n",
4211 qc->err_mask |= AC_ERR_HSM;
4212 ap->hsm_task_state = HSM_ST_ERR;
4216 /* Send the CDB (atapi) or the first data block (ata pio out).
4217 * During the state transition, interrupt handler shouldn't
4218 * be invoked before the data transfer is complete and
4219 * hsm_task_state is changed. Hence, the following locking.
4222 spin_lock_irqsave(ap->lock, flags);
4224 if (qc->tf.protocol == ATA_PROT_PIO) {
4225 /* PIO data out protocol.
4226 * send first data block.
4229 /* ata_pio_sectors() might change the state
4230 * to HSM_ST_LAST. so, the state is changed here
4231 * before ata_pio_sectors().
4233 ap->hsm_task_state = HSM_ST;
4234 ata_pio_sectors(qc);
4235 ata_altstatus(ap); /* flush */
4238 atapi_send_cdb(ap, qc);
4241 spin_unlock_irqrestore(ap->lock, flags);
4243 /* if polling, ata_pio_task() handles the rest.
4244 * otherwise, interrupt handler takes over from here.
4249 /* complete command or read/write the data register */
4250 if (qc->tf.protocol == ATA_PROT_ATAPI) {
4251 /* ATAPI PIO protocol */
4252 if ((status & ATA_DRQ) == 0) {
4253 /* No more data to transfer or device error.
4254 * Device error will be tagged in HSM_ST_LAST.
4256 ap->hsm_task_state = HSM_ST_LAST;
4260 /* Device should not ask for data transfer (DRQ=1)
4261 * when it finds something wrong.
4262 * We ignore DRQ here and stop the HSM by
4263 * changing hsm_task_state to HSM_ST_ERR and
4264 * let the EH abort the command or reset the device.
4266 if (unlikely(status & (ATA_ERR | ATA_DF))) {
4267 printk(KERN_WARNING "ata%d: DRQ=1 with device error, dev_stat 0x%X\n",
4269 qc->err_mask |= AC_ERR_HSM;
4270 ap->hsm_task_state = HSM_ST_ERR;
4274 atapi_pio_bytes(qc);
4276 if (unlikely(ap->hsm_task_state == HSM_ST_ERR))
4277 /* bad ireason reported by device */
4281 /* ATA PIO protocol */
4282 if (unlikely((status & ATA_DRQ) == 0)) {
4283 /* handle BSY=0, DRQ=0 as error */
4284 if (likely(status & (ATA_ERR | ATA_DF)))
4285 /* device stops HSM for abort/error */
4286 qc->err_mask |= AC_ERR_DEV;
4288 /* HSM violation. Let EH handle this */
4289 qc->err_mask |= AC_ERR_HSM;
4291 ap->hsm_task_state = HSM_ST_ERR;
4295 /* For PIO reads, some devices may ask for
4296 * data transfer (DRQ=1) alone with ERR=1.
4297 * We respect DRQ here and transfer one
4298 * block of junk data before changing the
4299 * hsm_task_state to HSM_ST_ERR.
4301 * For PIO writes, ERR=1 DRQ=1 doesn't make
4302 * sense since the data block has been
4303 * transferred to the device.
4305 if (unlikely(status & (ATA_ERR | ATA_DF))) {
4306 /* data might be corrputed */
4307 qc->err_mask |= AC_ERR_DEV;
4309 if (!(qc->tf.flags & ATA_TFLAG_WRITE)) {
4310 ata_pio_sectors(qc);
4312 status = ata_wait_idle(ap);
4315 if (status & (ATA_BUSY | ATA_DRQ))
4316 qc->err_mask |= AC_ERR_HSM;
4318 /* ata_pio_sectors() might change the
4319 * state to HSM_ST_LAST. so, the state
4320 * is changed after ata_pio_sectors().
4322 ap->hsm_task_state = HSM_ST_ERR;
4326 ata_pio_sectors(qc);
4328 if (ap->hsm_task_state == HSM_ST_LAST &&
4329 (!(qc->tf.flags & ATA_TFLAG_WRITE))) {
4332 status = ata_wait_idle(ap);
4337 ata_altstatus(ap); /* flush */
4342 if (unlikely(!ata_ok(status))) {
4343 qc->err_mask |= __ac_err_mask(status);
4344 ap->hsm_task_state = HSM_ST_ERR;
4348 /* no more data to transfer */
4349 DPRINTK("ata%u: dev %u command complete, drv_stat 0x%x\n",
4350 ap->id, qc->dev->devno, status);
4352 WARN_ON(qc->err_mask);
4354 ap->hsm_task_state = HSM_ST_IDLE;
4356 /* complete taskfile transaction */
4357 ata_hsm_qc_complete(qc, in_wq);
4363 /* make sure qc->err_mask is available to
4364 * know what's wrong and recover
4366 WARN_ON(qc->err_mask == 0);
4368 ap->hsm_task_state = HSM_ST_IDLE;
4370 /* complete taskfile transaction */
4371 ata_hsm_qc_complete(qc, in_wq);
4383 static void ata_pio_task(void *_data)
4385 struct ata_queued_cmd *qc = _data;
4386 struct ata_port *ap = qc->ap;
4391 WARN_ON(ap->hsm_task_state == HSM_ST_IDLE);
4394 * This is purely heuristic. This is a fast path.
4395 * Sometimes when we enter, BSY will be cleared in
4396 * a chk-status or two. If not, the drive is probably seeking
4397 * or something. Snooze for a couple msecs, then
4398 * chk-status again. If still busy, queue delayed work.
4400 status = ata_busy_wait(ap, ATA_BUSY, 5);
4401 if (status & ATA_BUSY) {
4403 status = ata_busy_wait(ap, ATA_BUSY, 10);
4404 if (status & ATA_BUSY) {
4405 ata_port_queue_task(ap, ata_pio_task, qc, ATA_SHORT_PAUSE);
4411 poll_next = ata_hsm_move(ap, qc, status, 1);
4413 /* another command or interrupt handler
4414 * may be running at this point.
4421 * ata_qc_new - Request an available ATA command, for queueing
4422 * @ap: Port associated with device @dev
4423 * @dev: Device from whom we request an available command structure
4429 static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap)
4431 struct ata_queued_cmd *qc = NULL;
4434 /* no command while frozen */
4435 if (unlikely(ap->pflags & ATA_PFLAG_FROZEN))
4438 /* the last tag is reserved for internal command. */
4439 for (i = 0; i < ATA_MAX_QUEUE - 1; i++)
4440 if (!test_and_set_bit(i, &ap->qc_allocated)) {
4441 qc = __ata_qc_from_tag(ap, i);
4452 * ata_qc_new_init - Request an available ATA command, and initialize it
4453 * @dev: Device from whom we request an available command structure
4459 struct ata_queued_cmd *ata_qc_new_init(struct ata_device *dev)
4461 struct ata_port *ap = dev->ap;
4462 struct ata_queued_cmd *qc;
4464 qc = ata_qc_new(ap);
4477 * ata_qc_free - free unused ata_queued_cmd
4478 * @qc: Command to complete
4480 * Designed to free unused ata_queued_cmd object
4481 * in case something prevents using it.
4484 * spin_lock_irqsave(host lock)
4486 void ata_qc_free(struct ata_queued_cmd *qc)
4488 struct ata_port *ap = qc->ap;
4491 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
4495 if (likely(ata_tag_valid(tag))) {
4496 qc->tag = ATA_TAG_POISON;
4497 clear_bit(tag, &ap->qc_allocated);
4501 void __ata_qc_complete(struct ata_queued_cmd *qc)
4503 struct ata_port *ap = qc->ap;
4505 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
4506 WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE));
4508 if (likely(qc->flags & ATA_QCFLAG_DMAMAP))
4511 /* command should be marked inactive atomically with qc completion */
4512 if (qc->tf.protocol == ATA_PROT_NCQ)
4513 ap->sactive &= ~(1 << qc->tag);
4515 ap->active_tag = ATA_TAG_POISON;
4517 /* atapi: mark qc as inactive to prevent the interrupt handler
4518 * from completing the command twice later, before the error handler
4519 * is called. (when rc != 0 and atapi request sense is needed)
4521 qc->flags &= ~ATA_QCFLAG_ACTIVE;
4522 ap->qc_active &= ~(1 << qc->tag);
4524 /* call completion callback */
4525 qc->complete_fn(qc);
4529 * ata_qc_complete - Complete an active ATA command
4530 * @qc: Command to complete
4531 * @err_mask: ATA Status register contents
4533 * Indicate to the mid and upper layers that an ATA
4534 * command has completed, with either an ok or not-ok status.
4537 * spin_lock_irqsave(host lock)
4539 void ata_qc_complete(struct ata_queued_cmd *qc)
4541 struct ata_port *ap = qc->ap;
4543 /* XXX: New EH and old EH use different mechanisms to
4544 * synchronize EH with regular execution path.
4546 * In new EH, a failed qc is marked with ATA_QCFLAG_FAILED.
4547 * Normal execution path is responsible for not accessing a
4548 * failed qc. libata core enforces the rule by returning NULL
4549 * from ata_qc_from_tag() for failed qcs.
4551 * Old EH depends on ata_qc_complete() nullifying completion
4552 * requests if ATA_QCFLAG_EH_SCHEDULED is set. Old EH does
4553 * not synchronize with interrupt handler. Only PIO task is
4556 if (ap->ops->error_handler) {
4557 WARN_ON(ap->pflags & ATA_PFLAG_FROZEN);
4559 if (unlikely(qc->err_mask))
4560 qc->flags |= ATA_QCFLAG_FAILED;
4562 if (unlikely(qc->flags & ATA_QCFLAG_FAILED)) {
4563 if (!ata_tag_internal(qc->tag)) {
4564 /* always fill result TF for failed qc */
4565 ap->ops->tf_read(ap, &qc->result_tf);
4566 ata_qc_schedule_eh(qc);
4571 /* read result TF if requested */
4572 if (qc->flags & ATA_QCFLAG_RESULT_TF)
4573 ap->ops->tf_read(ap, &qc->result_tf);
4575 __ata_qc_complete(qc);
4577 if (qc->flags & ATA_QCFLAG_EH_SCHEDULED)
4580 /* read result TF if failed or requested */
4581 if (qc->err_mask || qc->flags & ATA_QCFLAG_RESULT_TF)
4582 ap->ops->tf_read(ap, &qc->result_tf);
4584 __ata_qc_complete(qc);
4589 * ata_qc_complete_multiple - Complete multiple qcs successfully
4590 * @ap: port in question
4591 * @qc_active: new qc_active mask
4592 * @finish_qc: LLDD callback invoked before completing a qc
4594 * Complete in-flight commands. This functions is meant to be
4595 * called from low-level driver's interrupt routine to complete
4596 * requests normally. ap->qc_active and @qc_active is compared
4597 * and commands are completed accordingly.
4600 * spin_lock_irqsave(host lock)
4603 * Number of completed commands on success, -errno otherwise.
4605 int ata_qc_complete_multiple(struct ata_port *ap, u32 qc_active,
4606 void (*finish_qc)(struct ata_queued_cmd *))
4612 done_mask = ap->qc_active ^ qc_active;
4614 if (unlikely(done_mask & qc_active)) {
4615 ata_port_printk(ap, KERN_ERR, "illegal qc_active transition "
4616 "(%08x->%08x)\n", ap->qc_active, qc_active);
4620 for (i = 0; i < ATA_MAX_QUEUE; i++) {
4621 struct ata_queued_cmd *qc;
4623 if (!(done_mask & (1 << i)))
4626 if ((qc = ata_qc_from_tag(ap, i))) {
4629 ata_qc_complete(qc);
4637 static inline int ata_should_dma_map(struct ata_queued_cmd *qc)
4639 struct ata_port *ap = qc->ap;
4641 switch (qc->tf.protocol) {
4644 case ATA_PROT_ATAPI_DMA:
4647 case ATA_PROT_ATAPI:
4649 if (ap->flags & ATA_FLAG_PIO_DMA)
4662 * ata_qc_issue - issue taskfile to device
4663 * @qc: command to issue to device
4665 * Prepare an ATA command to submission to device.
4666 * This includes mapping the data into a DMA-able
4667 * area, filling in the S/G table, and finally
4668 * writing the taskfile to hardware, starting the command.
4671 * spin_lock_irqsave(host lock)
4673 void ata_qc_issue(struct ata_queued_cmd *qc)
4675 struct ata_port *ap = qc->ap;
4677 /* Make sure only one non-NCQ command is outstanding. The
4678 * check is skipped for old EH because it reuses active qc to
4679 * request ATAPI sense.
4681 WARN_ON(ap->ops->error_handler && ata_tag_valid(ap->active_tag));
4683 if (qc->tf.protocol == ATA_PROT_NCQ) {
4684 WARN_ON(ap->sactive & (1 << qc->tag));
4685 ap->sactive |= 1 << qc->tag;
4687 WARN_ON(ap->sactive);
4688 ap->active_tag = qc->tag;
4691 qc->flags |= ATA_QCFLAG_ACTIVE;
4692 ap->qc_active |= 1 << qc->tag;
4694 if (ata_should_dma_map(qc)) {
4695 if (qc->flags & ATA_QCFLAG_SG) {
4696 if (ata_sg_setup(qc))
4698 } else if (qc->flags & ATA_QCFLAG_SINGLE) {
4699 if (ata_sg_setup_one(qc))
4703 qc->flags &= ~ATA_QCFLAG_DMAMAP;
4706 ap->ops->qc_prep(qc);
4708 qc->err_mask |= ap->ops->qc_issue(qc);
4709 if (unlikely(qc->err_mask))
4714 qc->flags &= ~ATA_QCFLAG_DMAMAP;
4715 qc->err_mask |= AC_ERR_SYSTEM;
4717 ata_qc_complete(qc);
4721 * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner
4722 * @qc: command to issue to device
4724 * Using various libata functions and hooks, this function
4725 * starts an ATA command. ATA commands are grouped into
4726 * classes called "protocols", and issuing each type of protocol
4727 * is slightly different.
4729 * May be used as the qc_issue() entry in ata_port_operations.
4732 * spin_lock_irqsave(host lock)
4735 * Zero on success, AC_ERR_* mask on failure
4738 unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc)
4740 struct ata_port *ap = qc->ap;
4742 /* Use polling pio if the LLD doesn't handle
4743 * interrupt driven pio and atapi CDB interrupt.
4745 if (ap->flags & ATA_FLAG_PIO_POLLING) {
4746 switch (qc->tf.protocol) {
4748 case ATA_PROT_ATAPI:
4749 case ATA_PROT_ATAPI_NODATA:
4750 qc->tf.flags |= ATA_TFLAG_POLLING;
4752 case ATA_PROT_ATAPI_DMA:
4753 if (qc->dev->flags & ATA_DFLAG_CDB_INTR)
4754 /* see ata_dma_blacklisted() */
4762 /* select the device */
4763 ata_dev_select(ap, qc->dev->devno, 1, 0);
4765 /* start the command */
4766 switch (qc->tf.protocol) {
4767 case ATA_PROT_NODATA:
4768 if (qc->tf.flags & ATA_TFLAG_POLLING)
4769 ata_qc_set_polling(qc);
4771 ata_tf_to_host(ap, &qc->tf);
4772 ap->hsm_task_state = HSM_ST_LAST;
4774 if (qc->tf.flags & ATA_TFLAG_POLLING)
4775 ata_port_queue_task(ap, ata_pio_task, qc, 0);
4780 WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING);
4782 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
4783 ap->ops->bmdma_setup(qc); /* set up bmdma */
4784 ap->ops->bmdma_start(qc); /* initiate bmdma */
4785 ap->hsm_task_state = HSM_ST_LAST;
4789 if (qc->tf.flags & ATA_TFLAG_POLLING)
4790 ata_qc_set_polling(qc);
4792 ata_tf_to_host(ap, &qc->tf);
4794 if (qc->tf.flags & ATA_TFLAG_WRITE) {
4795 /* PIO data out protocol */
4796 ap->hsm_task_state = HSM_ST_FIRST;
4797 ata_port_queue_task(ap, ata_pio_task, qc, 0);
4799 /* always send first data block using
4800 * the ata_pio_task() codepath.
4803 /* PIO data in protocol */
4804 ap->hsm_task_state = HSM_ST;
4806 if (qc->tf.flags & ATA_TFLAG_POLLING)
4807 ata_port_queue_task(ap, ata_pio_task, qc, 0);
4809 /* if polling, ata_pio_task() handles the rest.
4810 * otherwise, interrupt handler takes over from here.
4816 case ATA_PROT_ATAPI:
4817 case ATA_PROT_ATAPI_NODATA:
4818 if (qc->tf.flags & ATA_TFLAG_POLLING)
4819 ata_qc_set_polling(qc);
4821 ata_tf_to_host(ap, &qc->tf);
4823 ap->hsm_task_state = HSM_ST_FIRST;
4825 /* send cdb by polling if no cdb interrupt */
4826 if ((!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) ||
4827 (qc->tf.flags & ATA_TFLAG_POLLING))
4828 ata_port_queue_task(ap, ata_pio_task, qc, 0);
4831 case ATA_PROT_ATAPI_DMA:
4832 WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING);
4834 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
4835 ap->ops->bmdma_setup(qc); /* set up bmdma */
4836 ap->hsm_task_state = HSM_ST_FIRST;
4838 /* send cdb by polling if no cdb interrupt */
4839 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
4840 ata_port_queue_task(ap, ata_pio_task, qc, 0);
4845 return AC_ERR_SYSTEM;
4852 * ata_host_intr - Handle host interrupt for given (port, task)
4853 * @ap: Port on which interrupt arrived (possibly...)
4854 * @qc: Taskfile currently active in engine
4856 * Handle host interrupt for given queued command. Currently,
4857 * only DMA interrupts are handled. All other commands are
4858 * handled via polling with interrupts disabled (nIEN bit).
4861 * spin_lock_irqsave(host lock)
4864 * One if interrupt was handled, zero if not (shared irq).
4867 inline unsigned int ata_host_intr (struct ata_port *ap,
4868 struct ata_queued_cmd *qc)
4870 u8 status, host_stat = 0;
4872 VPRINTK("ata%u: protocol %d task_state %d\n",
4873 ap->id, qc->tf.protocol, ap->hsm_task_state);
4875 /* Check whether we are expecting interrupt in this state */
4876 switch (ap->hsm_task_state) {
4878 /* Some pre-ATAPI-4 devices assert INTRQ
4879 * at this state when ready to receive CDB.
4882 /* Check the ATA_DFLAG_CDB_INTR flag is enough here.
4883 * The flag was turned on only for atapi devices.
4884 * No need to check is_atapi_taskfile(&qc->tf) again.
4886 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
4890 if (qc->tf.protocol == ATA_PROT_DMA ||
4891 qc->tf.protocol == ATA_PROT_ATAPI_DMA) {
4892 /* check status of DMA engine */
4893 host_stat = ap->ops->bmdma_status(ap);
4894 VPRINTK("ata%u: host_stat 0x%X\n", ap->id, host_stat);
4896 /* if it's not our irq... */
4897 if (!(host_stat & ATA_DMA_INTR))
4900 /* before we do anything else, clear DMA-Start bit */
4901 ap->ops->bmdma_stop(qc);
4903 if (unlikely(host_stat & ATA_DMA_ERR)) {
4904 /* error when transfering data to/from memory */
4905 qc->err_mask |= AC_ERR_HOST_BUS;
4906 ap->hsm_task_state = HSM_ST_ERR;
4916 /* check altstatus */
4917 status = ata_altstatus(ap);
4918 if (status & ATA_BUSY)
4921 /* check main status, clearing INTRQ */
4922 status = ata_chk_status(ap);
4923 if (unlikely(status & ATA_BUSY))
4926 /* ack bmdma irq events */
4927 ap->ops->irq_clear(ap);
4929 ata_hsm_move(ap, qc, status, 0);
4930 return 1; /* irq handled */
4933 ap->stats.idle_irq++;
4936 if ((ap->stats.idle_irq % 1000) == 0) {
4937 ata_irq_ack(ap, 0); /* debug trap */
4938 ata_port_printk(ap, KERN_WARNING, "irq trap\n");
4942 return 0; /* irq not handled */
4946 * ata_interrupt - Default ATA host interrupt handler
4947 * @irq: irq line (unused)
4948 * @dev_instance: pointer to our ata_host information structure
4950 * Default interrupt handler for PCI IDE devices. Calls
4951 * ata_host_intr() for each port that is not disabled.
4954 * Obtains host lock during operation.
4957 * IRQ_NONE or IRQ_HANDLED.
4960 irqreturn_t ata_interrupt (int irq, void *dev_instance)
4962 struct ata_host *host = dev_instance;
4964 unsigned int handled = 0;
4965 unsigned long flags;
4967 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
4968 spin_lock_irqsave(&host->lock, flags);
4970 for (i = 0; i < host->n_ports; i++) {
4971 struct ata_port *ap;
4973 ap = host->ports[i];
4975 !(ap->flags & ATA_FLAG_DISABLED)) {
4976 struct ata_queued_cmd *qc;
4978 qc = ata_qc_from_tag(ap, ap->active_tag);
4979 if (qc && (!(qc->tf.flags & ATA_TFLAG_POLLING)) &&
4980 (qc->flags & ATA_QCFLAG_ACTIVE))
4981 handled |= ata_host_intr(ap, qc);
4985 spin_unlock_irqrestore(&host->lock, flags);
4987 return IRQ_RETVAL(handled);
4991 * sata_scr_valid - test whether SCRs are accessible
4992 * @ap: ATA port to test SCR accessibility for
4994 * Test whether SCRs are accessible for @ap.
5000 * 1 if SCRs are accessible, 0 otherwise.
5002 int sata_scr_valid(struct ata_port *ap)
5004 return ap->cbl == ATA_CBL_SATA && ap->ops->scr_read;
5008 * sata_scr_read - read SCR register of the specified port
5009 * @ap: ATA port to read SCR for
5011 * @val: Place to store read value
5013 * Read SCR register @reg of @ap into *@val. This function is
5014 * guaranteed to succeed if the cable type of the port is SATA
5015 * and the port implements ->scr_read.
5021 * 0 on success, negative errno on failure.
5023 int sata_scr_read(struct ata_port *ap, int reg, u32 *val)
5025 if (sata_scr_valid(ap)) {
5026 *val = ap->ops->scr_read(ap, reg);
5033 * sata_scr_write - write SCR register of the specified port
5034 * @ap: ATA port to write SCR for
5035 * @reg: SCR to write
5036 * @val: value to write
5038 * Write @val to SCR register @reg of @ap. This function is
5039 * guaranteed to succeed if the cable type of the port is SATA
5040 * and the port implements ->scr_read.
5046 * 0 on success, negative errno on failure.
5048 int sata_scr_write(struct ata_port *ap, int reg, u32 val)
5050 if (sata_scr_valid(ap)) {
5051 ap->ops->scr_write(ap, reg, val);
5058 * sata_scr_write_flush - write SCR register of the specified port and flush
5059 * @ap: ATA port to write SCR for
5060 * @reg: SCR to write
5061 * @val: value to write
5063 * This function is identical to sata_scr_write() except that this
5064 * function performs flush after writing to the register.
5070 * 0 on success, negative errno on failure.
5072 int sata_scr_write_flush(struct ata_port *ap, int reg, u32 val)
5074 if (sata_scr_valid(ap)) {
5075 ap->ops->scr_write(ap, reg, val);
5076 ap->ops->scr_read(ap, reg);
5083 * ata_port_online - test whether the given port is online
5084 * @ap: ATA port to test
5086 * Test whether @ap is online. Note that this function returns 0
5087 * if online status of @ap cannot be obtained, so
5088 * ata_port_online(ap) != !ata_port_offline(ap).
5094 * 1 if the port online status is available and online.
5096 int ata_port_online(struct ata_port *ap)
5100 if (!sata_scr_read(ap, SCR_STATUS, &sstatus) && (sstatus & 0xf) == 0x3)
5106 * ata_port_offline - test whether the given port is offline
5107 * @ap: ATA port to test
5109 * Test whether @ap is offline. Note that this function returns
5110 * 0 if offline status of @ap cannot be obtained, so
5111 * ata_port_online(ap) != !ata_port_offline(ap).
5117 * 1 if the port offline status is available and offline.
5119 int ata_port_offline(struct ata_port *ap)
5123 if (!sata_scr_read(ap, SCR_STATUS, &sstatus) && (sstatus & 0xf) != 0x3)
5128 int ata_flush_cache(struct ata_device *dev)
5130 unsigned int err_mask;
5133 if (!ata_try_flush_cache(dev))
5136 if (dev->flags & ATA_DFLAG_FLUSH_EXT)
5137 cmd = ATA_CMD_FLUSH_EXT;
5139 cmd = ATA_CMD_FLUSH;
5141 err_mask = ata_do_simple_cmd(dev, cmd);
5143 ata_dev_printk(dev, KERN_ERR, "failed to flush cache\n");
5150 static int ata_host_request_pm(struct ata_host *host, pm_message_t mesg,
5151 unsigned int action, unsigned int ehi_flags,
5154 unsigned long flags;
5157 for (i = 0; i < host->n_ports; i++) {
5158 struct ata_port *ap = host->ports[i];
5160 /* Previous resume operation might still be in
5161 * progress. Wait for PM_PENDING to clear.
5163 if (ap->pflags & ATA_PFLAG_PM_PENDING) {
5164 ata_port_wait_eh(ap);
5165 WARN_ON(ap->pflags & ATA_PFLAG_PM_PENDING);
5168 /* request PM ops to EH */
5169 spin_lock_irqsave(ap->lock, flags);
5174 ap->pm_result = &rc;
5177 ap->pflags |= ATA_PFLAG_PM_PENDING;
5178 ap->eh_info.action |= action;
5179 ap->eh_info.flags |= ehi_flags;
5181 ata_port_schedule_eh(ap);
5183 spin_unlock_irqrestore(ap->lock, flags);
5185 /* wait and check result */
5187 ata_port_wait_eh(ap);
5188 WARN_ON(ap->pflags & ATA_PFLAG_PM_PENDING);
5198 * ata_host_suspend - suspend host
5199 * @host: host to suspend
5202 * Suspend @host. Actual operation is performed by EH. This
5203 * function requests EH to perform PM operations and waits for EH
5207 * Kernel thread context (may sleep).
5210 * 0 on success, -errno on failure.
5212 int ata_host_suspend(struct ata_host *host, pm_message_t mesg)
5216 rc = ata_host_request_pm(host, mesg, 0, ATA_EHI_QUIET, 1);
5220 /* EH is quiescent now. Fail if we have any ready device.
5221 * This happens if hotplug occurs between completion of device
5222 * suspension and here.
5224 for (i = 0; i < host->n_ports; i++) {
5225 struct ata_port *ap = host->ports[i];
5227 for (j = 0; j < ATA_MAX_DEVICES; j++) {
5228 struct ata_device *dev = &ap->device[j];
5230 if (ata_dev_ready(dev)) {
5231 ata_port_printk(ap, KERN_WARNING,
5232 "suspend failed, device %d "
5233 "still active\n", dev->devno);
5240 host->dev->power.power_state = mesg;
5244 ata_host_resume(host);
5249 * ata_host_resume - resume host
5250 * @host: host to resume
5252 * Resume @host. Actual operation is performed by EH. This
5253 * function requests EH to perform PM operations and returns.
5254 * Note that all resume operations are performed parallely.
5257 * Kernel thread context (may sleep).
5259 void ata_host_resume(struct ata_host *host)
5261 ata_host_request_pm(host, PMSG_ON, ATA_EH_SOFTRESET,
5262 ATA_EHI_NO_AUTOPSY | ATA_EHI_QUIET, 0);
5263 host->dev->power.power_state = PMSG_ON;
5267 * ata_port_start - Set port up for dma.
5268 * @ap: Port to initialize
5270 * Called just after data structures for each port are
5271 * initialized. Allocates space for PRD table.
5273 * May be used as the port_start() entry in ata_port_operations.
5276 * Inherited from caller.
5279 int ata_port_start (struct ata_port *ap)
5281 struct device *dev = ap->dev;
5284 ap->prd = dma_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma, GFP_KERNEL);
5288 rc = ata_pad_alloc(ap, dev);
5290 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
5294 DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd, (unsigned long long) ap->prd_dma);
5301 * ata_port_stop - Undo ata_port_start()
5302 * @ap: Port to shut down
5304 * Frees the PRD table.
5306 * May be used as the port_stop() entry in ata_port_operations.
5309 * Inherited from caller.
5312 void ata_port_stop (struct ata_port *ap)
5314 struct device *dev = ap->dev;
5316 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
5317 ata_pad_free(ap, dev);
5320 void ata_host_stop (struct ata_host *host)
5322 if (host->mmio_base)
5323 iounmap(host->mmio_base);
5327 * ata_dev_init - Initialize an ata_device structure
5328 * @dev: Device structure to initialize
5330 * Initialize @dev in preparation for probing.
5333 * Inherited from caller.
5335 void ata_dev_init(struct ata_device *dev)
5337 struct ata_port *ap = dev->ap;
5338 unsigned long flags;
5340 /* SATA spd limit is bound to the first device */
5341 ap->sata_spd_limit = ap->hw_sata_spd_limit;
5343 /* High bits of dev->flags are used to record warm plug
5344 * requests which occur asynchronously. Synchronize using
5347 spin_lock_irqsave(ap->lock, flags);
5348 dev->flags &= ~ATA_DFLAG_INIT_MASK;
5349 spin_unlock_irqrestore(ap->lock, flags);
5351 memset((void *)dev + ATA_DEVICE_CLEAR_OFFSET, 0,
5352 sizeof(*dev) - ATA_DEVICE_CLEAR_OFFSET);
5353 dev->pio_mask = UINT_MAX;
5354 dev->mwdma_mask = UINT_MAX;
5355 dev->udma_mask = UINT_MAX;
5359 * ata_port_init - Initialize an ata_port structure
5360 * @ap: Structure to initialize
5361 * @host: Collection of hosts to which @ap belongs
5362 * @ent: Probe information provided by low-level driver
5363 * @port_no: Port number associated with this ata_port
5365 * Initialize a new ata_port structure.
5368 * Inherited from caller.
5370 void ata_port_init(struct ata_port *ap, struct ata_host *host,
5371 const struct ata_probe_ent *ent, unsigned int port_no)
5375 ap->lock = &host->lock;
5376 ap->flags = ATA_FLAG_DISABLED;
5377 ap->id = ata_unique_id++;
5378 ap->ctl = ATA_DEVCTL_OBS;
5381 ap->port_no = port_no;
5382 if (port_no == 1 && ent->pinfo2) {
5383 ap->pio_mask = ent->pinfo2->pio_mask;
5384 ap->mwdma_mask = ent->pinfo2->mwdma_mask;
5385 ap->udma_mask = ent->pinfo2->udma_mask;
5386 ap->flags |= ent->pinfo2->flags;
5387 ap->ops = ent->pinfo2->port_ops;
5389 ap->pio_mask = ent->pio_mask;
5390 ap->mwdma_mask = ent->mwdma_mask;
5391 ap->udma_mask = ent->udma_mask;
5392 ap->flags |= ent->port_flags;
5393 ap->ops = ent->port_ops;
5395 ap->hw_sata_spd_limit = UINT_MAX;
5396 ap->active_tag = ATA_TAG_POISON;
5397 ap->last_ctl = 0xFF;
5399 #if defined(ATA_VERBOSE_DEBUG)
5400 /* turn on all debugging levels */
5401 ap->msg_enable = 0x00FF;
5402 #elif defined(ATA_DEBUG)
5403 ap->msg_enable = ATA_MSG_DRV | ATA_MSG_INFO | ATA_MSG_CTL | ATA_MSG_WARN | ATA_MSG_ERR;
5405 ap->msg_enable = ATA_MSG_DRV | ATA_MSG_ERR | ATA_MSG_WARN;
5408 INIT_WORK(&ap->port_task, NULL, NULL);
5409 INIT_WORK(&ap->hotplug_task, ata_scsi_hotplug, ap);
5410 INIT_WORK(&ap->scsi_rescan_task, ata_scsi_dev_rescan, ap);
5411 INIT_LIST_HEAD(&ap->eh_done_q);
5412 init_waitqueue_head(&ap->eh_wait_q);
5414 /* set cable type */
5415 ap->cbl = ATA_CBL_NONE;
5416 if (ap->flags & ATA_FLAG_SATA)
5417 ap->cbl = ATA_CBL_SATA;
5419 for (i = 0; i < ATA_MAX_DEVICES; i++) {
5420 struct ata_device *dev = &ap->device[i];
5427 ap->stats.unhandled_irq = 1;
5428 ap->stats.idle_irq = 1;
5431 memcpy(&ap->ioaddr, &ent->port[port_no], sizeof(struct ata_ioports));
5435 * ata_port_init_shost - Initialize SCSI host associated with ATA port
5436 * @ap: ATA port to initialize SCSI host for
5437 * @shost: SCSI host associated with @ap
5439 * Initialize SCSI host @shost associated with ATA port @ap.
5442 * Inherited from caller.
5444 static void ata_port_init_shost(struct ata_port *ap, struct Scsi_Host *shost)
5446 ap->scsi_host = shost;
5448 shost->unique_id = ap->id;
5451 shost->max_channel = 1;
5452 shost->max_cmd_len = 12;
5456 * ata_port_add - Attach low-level ATA driver to system
5457 * @ent: Information provided by low-level driver
5458 * @host: Collections of ports to which we add
5459 * @port_no: Port number associated with this host
5461 * Attach low-level ATA driver to system.
5464 * PCI/etc. bus probe sem.
5467 * New ata_port on success, for NULL on error.
5469 static struct ata_port * ata_port_add(const struct ata_probe_ent *ent,
5470 struct ata_host *host,
5471 unsigned int port_no)
5473 struct Scsi_Host *shost;
5474 struct ata_port *ap;
5478 if (!ent->port_ops->error_handler &&
5479 !(ent->port_flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST))) {
5480 printk(KERN_ERR "ata%u: no reset mechanism available\n",
5485 shost = scsi_host_alloc(ent->sht, sizeof(struct ata_port));
5489 shost->transportt = &ata_scsi_transport_template;
5491 ap = ata_shost_to_port(shost);
5493 ata_port_init(ap, host, ent, port_no);
5494 ata_port_init_shost(ap, shost);
5500 * ata_sas_host_init - Initialize a host struct
5501 * @host: host to initialize
5502 * @dev: device host is attached to
5503 * @flags: host flags
5507 * PCI/etc. bus probe sem.
5511 void ata_host_init(struct ata_host *host, struct device *dev,
5512 unsigned long flags, const struct ata_port_operations *ops)
5514 spin_lock_init(&host->lock);
5516 host->flags = flags;
5521 * ata_device_add - Register hardware device with ATA and SCSI layers
5522 * @ent: Probe information describing hardware device to be registered
5524 * This function processes the information provided in the probe
5525 * information struct @ent, allocates the necessary ATA and SCSI
5526 * host information structures, initializes them, and registers
5527 * everything with requisite kernel subsystems.
5529 * This function requests irqs, probes the ATA bus, and probes
5533 * PCI/etc. bus probe sem.
5536 * Number of ports registered. Zero on error (no ports registered).
5538 int ata_device_add(const struct ata_probe_ent *ent)
5541 struct device *dev = ent->dev;
5542 struct ata_host *host;
5547 if (ent->irq == 0) {
5548 dev_printk(KERN_ERR, dev, "is not available: No interrupt assigned.\n");
5551 /* alloc a container for our list of ATA ports (buses) */
5552 host = kzalloc(sizeof(struct ata_host) +
5553 (ent->n_ports * sizeof(void *)), GFP_KERNEL);
5557 ata_host_init(host, dev, ent->_host_flags, ent->port_ops);
5558 host->n_ports = ent->n_ports;
5559 host->irq = ent->irq;
5560 host->irq2 = ent->irq2;
5561 host->mmio_base = ent->mmio_base;
5562 host->private_data = ent->private_data;
5564 /* register each port bound to this device */
5565 for (i = 0; i < host->n_ports; i++) {
5566 struct ata_port *ap;
5567 unsigned long xfer_mode_mask;
5568 int irq_line = ent->irq;
5570 ap = ata_port_add(ent, host, i);
5571 host->ports[i] = ap;
5576 if (ent->dummy_port_mask & (1 << i)) {
5577 ata_port_printk(ap, KERN_INFO, "DUMMY\n");
5578 ap->ops = &ata_dummy_port_ops;
5583 rc = ap->ops->port_start(ap);
5585 host->ports[i] = NULL;
5586 scsi_host_put(ap->scsi_host);
5590 /* Report the secondary IRQ for second channel legacy */
5591 if (i == 1 && ent->irq2)
5592 irq_line = ent->irq2;
5594 xfer_mode_mask =(ap->udma_mask << ATA_SHIFT_UDMA) |
5595 (ap->mwdma_mask << ATA_SHIFT_MWDMA) |
5596 (ap->pio_mask << ATA_SHIFT_PIO);
5598 /* print per-port info to dmesg */
5599 ata_port_printk(ap, KERN_INFO, "%cATA max %s cmd 0x%lX "
5600 "ctl 0x%lX bmdma 0x%lX irq %d\n",
5601 ap->flags & ATA_FLAG_SATA ? 'S' : 'P',
5602 ata_mode_string(xfer_mode_mask),
5603 ap->ioaddr.cmd_addr,
5604 ap->ioaddr.ctl_addr,
5605 ap->ioaddr.bmdma_addr,
5609 host->ops->irq_clear(ap);
5610 ata_eh_freeze_port(ap); /* freeze port before requesting IRQ */
5613 /* obtain irq, that may be shared between channels */
5614 rc = request_irq(ent->irq, ent->port_ops->irq_handler, ent->irq_flags,
5617 dev_printk(KERN_ERR, dev, "irq %lu request failed: %d\n",
5622 /* do we have a second IRQ for the other channel, eg legacy mode */
5624 /* We will get weird core code crashes later if this is true
5626 BUG_ON(ent->irq == ent->irq2);
5628 rc = request_irq(ent->irq2, ent->port_ops->irq_handler, ent->irq_flags,
5631 dev_printk(KERN_ERR, dev, "irq %lu request failed: %d\n",
5633 goto err_out_free_irq;
5637 /* perform each probe synchronously */
5638 DPRINTK("probe begin\n");
5639 for (i = 0; i < host->n_ports; i++) {
5640 struct ata_port *ap = host->ports[i];
5644 /* init sata_spd_limit to the current value */
5645 if (sata_scr_read(ap, SCR_CONTROL, &scontrol) == 0) {
5646 int spd = (scontrol >> 4) & 0xf;
5647 ap->hw_sata_spd_limit &= (1 << spd) - 1;
5649 ap->sata_spd_limit = ap->hw_sata_spd_limit;
5651 rc = scsi_add_host(ap->scsi_host, dev);
5653 ata_port_printk(ap, KERN_ERR, "scsi_add_host failed\n");
5654 /* FIXME: do something useful here */
5655 /* FIXME: handle unconditional calls to
5656 * scsi_scan_host and ata_host_remove, below,
5661 if (ap->ops->error_handler) {
5662 struct ata_eh_info *ehi = &ap->eh_info;
5663 unsigned long flags;
5667 /* kick EH for boot probing */
5668 spin_lock_irqsave(ap->lock, flags);
5670 ehi->probe_mask = (1 << ATA_MAX_DEVICES) - 1;
5671 ehi->action |= ATA_EH_SOFTRESET;
5672 ehi->flags |= ATA_EHI_NO_AUTOPSY | ATA_EHI_QUIET;
5674 ap->pflags |= ATA_PFLAG_LOADING;
5675 ata_port_schedule_eh(ap);
5677 spin_unlock_irqrestore(ap->lock, flags);
5679 /* wait for EH to finish */
5680 ata_port_wait_eh(ap);
5682 DPRINTK("ata%u: bus probe begin\n", ap->id);
5683 rc = ata_bus_probe(ap);
5684 DPRINTK("ata%u: bus probe end\n", ap->id);
5687 /* FIXME: do something useful here?
5688 * Current libata behavior will
5689 * tear down everything when
5690 * the module is removed
5691 * or the h/w is unplugged.
5697 /* probes are done, now scan each port's disk(s) */
5698 DPRINTK("host probe begin\n");
5699 for (i = 0; i < host->n_ports; i++) {
5700 struct ata_port *ap = host->ports[i];
5702 ata_scsi_scan_host(ap);
5705 dev_set_drvdata(dev, host);
5707 VPRINTK("EXIT, returning %u\n", ent->n_ports);
5708 return ent->n_ports; /* success */
5711 free_irq(ent->irq, host);
5713 for (i = 0; i < host->n_ports; i++) {
5714 struct ata_port *ap = host->ports[i];
5716 ap->ops->port_stop(ap);
5717 scsi_host_put(ap->scsi_host);
5722 VPRINTK("EXIT, returning 0\n");
5727 * ata_port_detach - Detach ATA port in prepration of device removal
5728 * @ap: ATA port to be detached
5730 * Detach all ATA devices and the associated SCSI devices of @ap;
5731 * then, remove the associated SCSI host. @ap is guaranteed to
5732 * be quiescent on return from this function.
5735 * Kernel thread context (may sleep).
5737 void ata_port_detach(struct ata_port *ap)
5739 unsigned long flags;
5742 if (!ap->ops->error_handler)
5745 /* tell EH we're leaving & flush EH */
5746 spin_lock_irqsave(ap->lock, flags);
5747 ap->pflags |= ATA_PFLAG_UNLOADING;
5748 spin_unlock_irqrestore(ap->lock, flags);
5750 ata_port_wait_eh(ap);
5752 /* EH is now guaranteed to see UNLOADING, so no new device
5753 * will be attached. Disable all existing devices.
5755 spin_lock_irqsave(ap->lock, flags);
5757 for (i = 0; i < ATA_MAX_DEVICES; i++)
5758 ata_dev_disable(&ap->device[i]);
5760 spin_unlock_irqrestore(ap->lock, flags);
5762 /* Final freeze & EH. All in-flight commands are aborted. EH
5763 * will be skipped and retrials will be terminated with bad
5766 spin_lock_irqsave(ap->lock, flags);
5767 ata_port_freeze(ap); /* won't be thawed */
5768 spin_unlock_irqrestore(ap->lock, flags);
5770 ata_port_wait_eh(ap);
5772 /* Flush hotplug task. The sequence is similar to
5773 * ata_port_flush_task().
5775 flush_workqueue(ata_aux_wq);
5776 cancel_delayed_work(&ap->hotplug_task);
5777 flush_workqueue(ata_aux_wq);
5780 /* remove the associated SCSI host */
5781 scsi_remove_host(ap->scsi_host);
5785 * ata_host_remove - PCI layer callback for device removal
5786 * @host: ATA host set that was removed
5788 * Unregister all objects associated with this host set. Free those
5792 * Inherited from calling layer (may sleep).
5795 void ata_host_remove(struct ata_host *host)
5799 for (i = 0; i < host->n_ports; i++)
5800 ata_port_detach(host->ports[i]);
5802 free_irq(host->irq, host);
5804 free_irq(host->irq2, host);
5806 for (i = 0; i < host->n_ports; i++) {
5807 struct ata_port *ap = host->ports[i];
5809 ata_scsi_release(ap->scsi_host);
5811 if ((ap->flags & ATA_FLAG_NO_LEGACY) == 0) {
5812 struct ata_ioports *ioaddr = &ap->ioaddr;
5814 /* FIXME: Add -ac IDE pci mods to remove these special cases */
5815 if (ioaddr->cmd_addr == ATA_PRIMARY_CMD)
5816 release_region(ATA_PRIMARY_CMD, 8);
5817 else if (ioaddr->cmd_addr == ATA_SECONDARY_CMD)
5818 release_region(ATA_SECONDARY_CMD, 8);
5821 scsi_host_put(ap->scsi_host);
5824 if (host->ops->host_stop)
5825 host->ops->host_stop(host);
5831 * ata_scsi_release - SCSI layer callback hook for host unload
5832 * @shost: libata host to be unloaded
5834 * Performs all duties necessary to shut down a libata port...
5835 * Kill port kthread, disable port, and release resources.
5838 * Inherited from SCSI layer.
5844 int ata_scsi_release(struct Scsi_Host *shost)
5846 struct ata_port *ap = ata_shost_to_port(shost);
5850 ap->ops->port_disable(ap);
5851 ap->ops->port_stop(ap);
5857 struct ata_probe_ent *
5858 ata_probe_ent_alloc(struct device *dev, const struct ata_port_info *port)
5860 struct ata_probe_ent *probe_ent;
5862 probe_ent = kzalloc(sizeof(*probe_ent), GFP_KERNEL);
5864 printk(KERN_ERR DRV_NAME "(%s): out of memory\n",
5865 kobject_name(&(dev->kobj)));
5869 INIT_LIST_HEAD(&probe_ent->node);
5870 probe_ent->dev = dev;
5872 probe_ent->sht = port->sht;
5873 probe_ent->port_flags = port->flags;
5874 probe_ent->pio_mask = port->pio_mask;
5875 probe_ent->mwdma_mask = port->mwdma_mask;
5876 probe_ent->udma_mask = port->udma_mask;
5877 probe_ent->port_ops = port->port_ops;
5878 probe_ent->private_data = port->private_data;
5884 * ata_std_ports - initialize ioaddr with standard port offsets.
5885 * @ioaddr: IO address structure to be initialized
5887 * Utility function which initializes data_addr, error_addr,
5888 * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
5889 * device_addr, status_addr, and command_addr to standard offsets
5890 * relative to cmd_addr.
5892 * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
5895 void ata_std_ports(struct ata_ioports *ioaddr)
5897 ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA;
5898 ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR;
5899 ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE;
5900 ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT;
5901 ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL;
5902 ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM;
5903 ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH;
5904 ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE;
5905 ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS;
5906 ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD;
5912 void ata_pci_host_stop (struct ata_host *host)
5914 struct pci_dev *pdev = to_pci_dev(host->dev);
5916 pci_iounmap(pdev, host->mmio_base);
5920 * ata_pci_remove_one - PCI layer callback for device removal
5921 * @pdev: PCI device that was removed
5923 * PCI layer indicates to libata via this hook that
5924 * hot-unplug or module unload event has occurred.
5925 * Handle this by unregistering all objects associated
5926 * with this PCI device. Free those objects. Then finally
5927 * release PCI resources and disable device.
5930 * Inherited from PCI layer (may sleep).
5933 void ata_pci_remove_one (struct pci_dev *pdev)
5935 struct device *dev = pci_dev_to_dev(pdev);
5936 struct ata_host *host = dev_get_drvdata(dev);
5938 ata_host_remove(host);
5940 pci_release_regions(pdev);
5941 pci_disable_device(pdev);
5942 dev_set_drvdata(dev, NULL);
5945 /* move to PCI subsystem */
5946 int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits)
5948 unsigned long tmp = 0;
5950 switch (bits->width) {
5953 pci_read_config_byte(pdev, bits->reg, &tmp8);
5959 pci_read_config_word(pdev, bits->reg, &tmp16);
5965 pci_read_config_dword(pdev, bits->reg, &tmp32);
5976 return (tmp == bits->val) ? 1 : 0;
5979 void ata_pci_device_do_suspend(struct pci_dev *pdev, pm_message_t mesg)
5981 pci_save_state(pdev);
5983 if (mesg.event == PM_EVENT_SUSPEND) {
5984 pci_disable_device(pdev);
5985 pci_set_power_state(pdev, PCI_D3hot);
5989 void ata_pci_device_do_resume(struct pci_dev *pdev)
5991 pci_set_power_state(pdev, PCI_D0);
5992 pci_restore_state(pdev);
5993 pci_enable_device(pdev);
5994 pci_set_master(pdev);
5997 int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg)
5999 struct ata_host *host = dev_get_drvdata(&pdev->dev);
6002 rc = ata_host_suspend(host, mesg);
6006 ata_pci_device_do_suspend(pdev, mesg);
6011 int ata_pci_device_resume(struct pci_dev *pdev)
6013 struct ata_host *host = dev_get_drvdata(&pdev->dev);
6015 ata_pci_device_do_resume(pdev);
6016 ata_host_resume(host);
6019 #endif /* CONFIG_PCI */
6022 static int __init ata_init(void)
6024 ata_probe_timeout *= HZ;
6025 ata_wq = create_workqueue("ata");
6029 ata_aux_wq = create_singlethread_workqueue("ata_aux");
6031 destroy_workqueue(ata_wq);
6035 printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n");
6039 static void __exit ata_exit(void)
6041 destroy_workqueue(ata_wq);
6042 destroy_workqueue(ata_aux_wq);
6045 subsys_initcall(ata_init);
6046 module_exit(ata_exit);
6048 static unsigned long ratelimit_time;
6049 static DEFINE_SPINLOCK(ata_ratelimit_lock);
6051 int ata_ratelimit(void)
6054 unsigned long flags;
6056 spin_lock_irqsave(&ata_ratelimit_lock, flags);
6058 if (time_after(jiffies, ratelimit_time)) {
6060 ratelimit_time = jiffies + (HZ/5);
6064 spin_unlock_irqrestore(&ata_ratelimit_lock, flags);
6070 * ata_wait_register - wait until register value changes
6071 * @reg: IO-mapped register
6072 * @mask: Mask to apply to read register value
6073 * @val: Wait condition
6074 * @interval_msec: polling interval in milliseconds
6075 * @timeout_msec: timeout in milliseconds
6077 * Waiting for some bits of register to change is a common
6078 * operation for ATA controllers. This function reads 32bit LE
6079 * IO-mapped register @reg and tests for the following condition.
6081 * (*@reg & mask) != val
6083 * If the condition is met, it returns; otherwise, the process is
6084 * repeated after @interval_msec until timeout.
6087 * Kernel thread context (may sleep)
6090 * The final register value.
6092 u32 ata_wait_register(void __iomem *reg, u32 mask, u32 val,
6093 unsigned long interval_msec,
6094 unsigned long timeout_msec)
6096 unsigned long timeout;
6099 tmp = ioread32(reg);
6101 /* Calculate timeout _after_ the first read to make sure
6102 * preceding writes reach the controller before starting to
6103 * eat away the timeout.
6105 timeout = jiffies + (timeout_msec * HZ) / 1000;
6107 while ((tmp & mask) == val && time_before(jiffies, timeout)) {
6108 msleep(interval_msec);
6109 tmp = ioread32(reg);
6118 static void ata_dummy_noret(struct ata_port *ap) { }
6119 static int ata_dummy_ret0(struct ata_port *ap) { return 0; }
6120 static void ata_dummy_qc_noret(struct ata_queued_cmd *qc) { }
6122 static u8 ata_dummy_check_status(struct ata_port *ap)
6127 static unsigned int ata_dummy_qc_issue(struct ata_queued_cmd *qc)
6129 return AC_ERR_SYSTEM;
6132 const struct ata_port_operations ata_dummy_port_ops = {
6133 .port_disable = ata_port_disable,
6134 .check_status = ata_dummy_check_status,
6135 .check_altstatus = ata_dummy_check_status,
6136 .dev_select = ata_noop_dev_select,
6137 .qc_prep = ata_noop_qc_prep,
6138 .qc_issue = ata_dummy_qc_issue,
6139 .freeze = ata_dummy_noret,
6140 .thaw = ata_dummy_noret,
6141 .error_handler = ata_dummy_noret,
6142 .post_internal_cmd = ata_dummy_qc_noret,
6143 .irq_clear = ata_dummy_noret,
6144 .port_start = ata_dummy_ret0,
6145 .port_stop = ata_dummy_noret,
6149 * libata is essentially a library of internal helper functions for
6150 * low-level ATA host controller drivers. As such, the API/ABI is
6151 * likely to change as new drivers are added and updated.
6152 * Do not depend on ABI/API stability.
6155 EXPORT_SYMBOL_GPL(sata_deb_timing_normal);
6156 EXPORT_SYMBOL_GPL(sata_deb_timing_hotplug);
6157 EXPORT_SYMBOL_GPL(sata_deb_timing_long);
6158 EXPORT_SYMBOL_GPL(ata_dummy_port_ops);
6159 EXPORT_SYMBOL_GPL(ata_std_bios_param);
6160 EXPORT_SYMBOL_GPL(ata_std_ports);
6161 EXPORT_SYMBOL_GPL(ata_host_init);
6162 EXPORT_SYMBOL_GPL(ata_device_add);
6163 EXPORT_SYMBOL_GPL(ata_port_detach);
6164 EXPORT_SYMBOL_GPL(ata_host_remove);
6165 EXPORT_SYMBOL_GPL(ata_sg_init);
6166 EXPORT_SYMBOL_GPL(ata_sg_init_one);
6167 EXPORT_SYMBOL_GPL(ata_hsm_move);
6168 EXPORT_SYMBOL_GPL(ata_qc_complete);
6169 EXPORT_SYMBOL_GPL(ata_qc_complete_multiple);
6170 EXPORT_SYMBOL_GPL(ata_qc_issue_prot);
6171 EXPORT_SYMBOL_GPL(ata_tf_load);
6172 EXPORT_SYMBOL_GPL(ata_tf_read);
6173 EXPORT_SYMBOL_GPL(ata_noop_dev_select);
6174 EXPORT_SYMBOL_GPL(ata_std_dev_select);
6175 EXPORT_SYMBOL_GPL(ata_tf_to_fis);
6176 EXPORT_SYMBOL_GPL(ata_tf_from_fis);
6177 EXPORT_SYMBOL_GPL(ata_check_status);
6178 EXPORT_SYMBOL_GPL(ata_altstatus);
6179 EXPORT_SYMBOL_GPL(ata_exec_command);
6180 EXPORT_SYMBOL_GPL(ata_port_start);
6181 EXPORT_SYMBOL_GPL(ata_port_stop);
6182 EXPORT_SYMBOL_GPL(ata_host_stop);
6183 EXPORT_SYMBOL_GPL(ata_interrupt);
6184 EXPORT_SYMBOL_GPL(ata_mmio_data_xfer);
6185 EXPORT_SYMBOL_GPL(ata_pio_data_xfer);
6186 EXPORT_SYMBOL_GPL(ata_pio_data_xfer_noirq);
6187 EXPORT_SYMBOL_GPL(ata_qc_prep);
6188 EXPORT_SYMBOL_GPL(ata_noop_qc_prep);
6189 EXPORT_SYMBOL_GPL(ata_bmdma_setup);
6190 EXPORT_SYMBOL_GPL(ata_bmdma_start);
6191 EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear);
6192 EXPORT_SYMBOL_GPL(ata_bmdma_status);
6193 EXPORT_SYMBOL_GPL(ata_bmdma_stop);
6194 EXPORT_SYMBOL_GPL(ata_bmdma_freeze);
6195 EXPORT_SYMBOL_GPL(ata_bmdma_thaw);
6196 EXPORT_SYMBOL_GPL(ata_bmdma_drive_eh);
6197 EXPORT_SYMBOL_GPL(ata_bmdma_error_handler);
6198 EXPORT_SYMBOL_GPL(ata_bmdma_post_internal_cmd);
6199 EXPORT_SYMBOL_GPL(ata_port_probe);
6200 EXPORT_SYMBOL_GPL(sata_set_spd);
6201 EXPORT_SYMBOL_GPL(sata_phy_debounce);
6202 EXPORT_SYMBOL_GPL(sata_phy_resume);
6203 EXPORT_SYMBOL_GPL(sata_phy_reset);
6204 EXPORT_SYMBOL_GPL(__sata_phy_reset);
6205 EXPORT_SYMBOL_GPL(ata_bus_reset);
6206 EXPORT_SYMBOL_GPL(ata_std_prereset);
6207 EXPORT_SYMBOL_GPL(ata_std_softreset);
6208 EXPORT_SYMBOL_GPL(sata_port_hardreset);
6209 EXPORT_SYMBOL_GPL(sata_std_hardreset);
6210 EXPORT_SYMBOL_GPL(ata_std_postreset);
6211 EXPORT_SYMBOL_GPL(ata_dev_classify);
6212 EXPORT_SYMBOL_GPL(ata_dev_pair);
6213 EXPORT_SYMBOL_GPL(ata_port_disable);
6214 EXPORT_SYMBOL_GPL(ata_ratelimit);
6215 EXPORT_SYMBOL_GPL(ata_wait_register);
6216 EXPORT_SYMBOL_GPL(ata_busy_sleep);
6217 EXPORT_SYMBOL_GPL(ata_port_queue_task);
6218 EXPORT_SYMBOL_GPL(ata_scsi_ioctl);
6219 EXPORT_SYMBOL_GPL(ata_scsi_queuecmd);
6220 EXPORT_SYMBOL_GPL(ata_scsi_slave_config);
6221 EXPORT_SYMBOL_GPL(ata_scsi_slave_destroy);
6222 EXPORT_SYMBOL_GPL(ata_scsi_change_queue_depth);
6223 EXPORT_SYMBOL_GPL(ata_scsi_release);
6224 EXPORT_SYMBOL_GPL(ata_host_intr);
6225 EXPORT_SYMBOL_GPL(sata_scr_valid);
6226 EXPORT_SYMBOL_GPL(sata_scr_read);
6227 EXPORT_SYMBOL_GPL(sata_scr_write);
6228 EXPORT_SYMBOL_GPL(sata_scr_write_flush);
6229 EXPORT_SYMBOL_GPL(ata_port_online);
6230 EXPORT_SYMBOL_GPL(ata_port_offline);
6231 EXPORT_SYMBOL_GPL(ata_host_suspend);
6232 EXPORT_SYMBOL_GPL(ata_host_resume);
6233 EXPORT_SYMBOL_GPL(ata_id_string);
6234 EXPORT_SYMBOL_GPL(ata_id_c_string);
6235 EXPORT_SYMBOL_GPL(ata_device_blacklisted);
6236 EXPORT_SYMBOL_GPL(ata_scsi_simulate);
6238 EXPORT_SYMBOL_GPL(ata_pio_need_iordy);
6239 EXPORT_SYMBOL_GPL(ata_timing_compute);
6240 EXPORT_SYMBOL_GPL(ata_timing_merge);
6243 EXPORT_SYMBOL_GPL(pci_test_config_bits);
6244 EXPORT_SYMBOL_GPL(ata_pci_host_stop);
6245 EXPORT_SYMBOL_GPL(ata_pci_init_native_mode);
6246 EXPORT_SYMBOL_GPL(ata_pci_init_one);
6247 EXPORT_SYMBOL_GPL(ata_pci_remove_one);
6248 EXPORT_SYMBOL_GPL(ata_pci_device_do_suspend);
6249 EXPORT_SYMBOL_GPL(ata_pci_device_do_resume);
6250 EXPORT_SYMBOL_GPL(ata_pci_device_suspend);
6251 EXPORT_SYMBOL_GPL(ata_pci_device_resume);
6252 EXPORT_SYMBOL_GPL(ata_pci_default_filter);
6253 EXPORT_SYMBOL_GPL(ata_pci_clear_simplex);
6254 #endif /* CONFIG_PCI */
6256 EXPORT_SYMBOL_GPL(ata_scsi_device_suspend);
6257 EXPORT_SYMBOL_GPL(ata_scsi_device_resume);
6259 EXPORT_SYMBOL_GPL(ata_eng_timeout);
6260 EXPORT_SYMBOL_GPL(ata_port_schedule_eh);
6261 EXPORT_SYMBOL_GPL(ata_port_abort);
6262 EXPORT_SYMBOL_GPL(ata_port_freeze);
6263 EXPORT_SYMBOL_GPL(ata_eh_freeze_port);
6264 EXPORT_SYMBOL_GPL(ata_eh_thaw_port);
6265 EXPORT_SYMBOL_GPL(ata_eh_qc_complete);
6266 EXPORT_SYMBOL_GPL(ata_eh_qc_retry);
6267 EXPORT_SYMBOL_GPL(ata_do_eh);