2 * libata-core.c - helper library for ATA
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
8 * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2004 Jeff Garzik
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
35 #include <linux/kernel.h>
36 #include <linux/module.h>
37 #include <linux/pci.h>
38 #include <linux/init.h>
39 #include <linux/list.h>
41 #include <linux/highmem.h>
42 #include <linux/spinlock.h>
43 #include <linux/blkdev.h>
44 #include <linux/delay.h>
45 #include <linux/timer.h>
46 #include <linux/interrupt.h>
47 #include <linux/completion.h>
48 #include <linux/suspend.h>
49 #include <linux/workqueue.h>
50 #include <linux/jiffies.h>
51 #include <linux/scatterlist.h>
52 #include <scsi/scsi.h>
53 #include <scsi/scsi_cmnd.h>
54 #include <scsi/scsi_host.h>
55 #include <linux/libata.h>
57 #include <asm/semaphore.h>
58 #include <asm/byteorder.h>
62 #define DRV_VERSION "2.10" /* must be exactly four chars */
65 /* debounce timing parameters in msecs { interval, duration, timeout } */
66 const unsigned long sata_deb_timing_normal[] = { 5, 100, 2000 };
67 const unsigned long sata_deb_timing_hotplug[] = { 25, 500, 2000 };
68 const unsigned long sata_deb_timing_long[] = { 100, 2000, 5000 };
70 static unsigned int ata_dev_init_params(struct ata_device *dev,
71 u16 heads, u16 sectors);
72 static unsigned int ata_dev_set_xfermode(struct ata_device *dev);
73 static void ata_dev_xfermask(struct ata_device *dev);
75 static unsigned int ata_unique_id = 1;
76 static struct workqueue_struct *ata_wq;
78 struct workqueue_struct *ata_aux_wq;
80 int atapi_enabled = 1;
81 module_param(atapi_enabled, int, 0444);
82 MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)");
85 module_param(atapi_dmadir, int, 0444);
86 MODULE_PARM_DESC(atapi_dmadir, "Enable ATAPI DMADIR bridge support (0=off, 1=on)");
89 module_param_named(fua, libata_fua, int, 0444);
90 MODULE_PARM_DESC(fua, "FUA support (0=off, 1=on)");
92 static int ata_probe_timeout = ATA_TMOUT_INTERNAL / HZ;
93 module_param(ata_probe_timeout, int, 0444);
94 MODULE_PARM_DESC(ata_probe_timeout, "Set ATA probing timeout (seconds)");
96 MODULE_AUTHOR("Jeff Garzik");
97 MODULE_DESCRIPTION("Library module for ATA devices");
98 MODULE_LICENSE("GPL");
99 MODULE_VERSION(DRV_VERSION);
103 * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure
104 * @tf: Taskfile to convert
105 * @fis: Buffer into which data will output
106 * @pmp: Port multiplier port
108 * Converts a standard ATA taskfile to a Serial ATA
109 * FIS structure (Register - Host to Device).
112 * Inherited from caller.
115 void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp)
117 fis[0] = 0x27; /* Register - Host to Device FIS */
118 fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number,
119 bit 7 indicates Command FIS */
120 fis[2] = tf->command;
121 fis[3] = tf->feature;
128 fis[8] = tf->hob_lbal;
129 fis[9] = tf->hob_lbam;
130 fis[10] = tf->hob_lbah;
131 fis[11] = tf->hob_feature;
134 fis[13] = tf->hob_nsect;
145 * ata_tf_from_fis - Convert SATA FIS to ATA taskfile
146 * @fis: Buffer from which data will be input
147 * @tf: Taskfile to output
149 * Converts a serial ATA FIS structure to a standard ATA taskfile.
152 * Inherited from caller.
155 void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf)
157 tf->command = fis[2]; /* status */
158 tf->feature = fis[3]; /* error */
165 tf->hob_lbal = fis[8];
166 tf->hob_lbam = fis[9];
167 tf->hob_lbah = fis[10];
170 tf->hob_nsect = fis[13];
173 static const u8 ata_rw_cmds[] = {
177 ATA_CMD_READ_MULTI_EXT,
178 ATA_CMD_WRITE_MULTI_EXT,
182 ATA_CMD_WRITE_MULTI_FUA_EXT,
186 ATA_CMD_PIO_READ_EXT,
187 ATA_CMD_PIO_WRITE_EXT,
200 ATA_CMD_WRITE_FUA_EXT
204 * ata_rwcmd_protocol - set taskfile r/w commands and protocol
205 * @tf: command to examine and configure
206 * @dev: device tf belongs to
208 * Examine the device configuration and tf->flags to calculate
209 * the proper read/write commands and protocol to use.
214 static int ata_rwcmd_protocol(struct ata_taskfile *tf, struct ata_device *dev)
218 int index, fua, lba48, write;
220 fua = (tf->flags & ATA_TFLAG_FUA) ? 4 : 0;
221 lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0;
222 write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0;
224 if (dev->flags & ATA_DFLAG_PIO) {
225 tf->protocol = ATA_PROT_PIO;
226 index = dev->multi_count ? 0 : 8;
227 } else if (lba48 && (dev->ap->flags & ATA_FLAG_PIO_LBA48)) {
228 /* Unable to use DMA due to host limitation */
229 tf->protocol = ATA_PROT_PIO;
230 index = dev->multi_count ? 0 : 8;
232 tf->protocol = ATA_PROT_DMA;
236 cmd = ata_rw_cmds[index + fua + lba48 + write];
245 * ata_tf_read_block - Read block address from ATA taskfile
246 * @tf: ATA taskfile of interest
247 * @dev: ATA device @tf belongs to
252 * Read block address from @tf. This function can handle all
253 * three address formats - LBA, LBA48 and CHS. tf->protocol and
254 * flags select the address format to use.
257 * Block address read from @tf.
259 u64 ata_tf_read_block(struct ata_taskfile *tf, struct ata_device *dev)
263 if (tf->flags & ATA_TFLAG_LBA) {
264 if (tf->flags & ATA_TFLAG_LBA48) {
265 block |= (u64)tf->hob_lbah << 40;
266 block |= (u64)tf->hob_lbam << 32;
267 block |= tf->hob_lbal << 24;
269 block |= (tf->device & 0xf) << 24;
271 block |= tf->lbah << 16;
272 block |= tf->lbam << 8;
277 cyl = tf->lbam | (tf->lbah << 8);
278 head = tf->device & 0xf;
281 block = (cyl * dev->heads + head) * dev->sectors + sect;
288 * ata_build_rw_tf - Build ATA taskfile for given read/write request
289 * @tf: Target ATA taskfile
290 * @dev: ATA device @tf belongs to
291 * @block: Block address
292 * @n_block: Number of blocks
293 * @tf_flags: RW/FUA etc...
299 * Build ATA taskfile @tf for read/write request described by
300 * @block, @n_block, @tf_flags and @tag on @dev.
304 * 0 on success, -ERANGE if the request is too large for @dev,
305 * -EINVAL if the request is invalid.
307 int ata_build_rw_tf(struct ata_taskfile *tf, struct ata_device *dev,
308 u64 block, u32 n_block, unsigned int tf_flags,
311 tf->flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
312 tf->flags |= tf_flags;
314 if ((dev->flags & (ATA_DFLAG_PIO | ATA_DFLAG_NCQ_OFF |
315 ATA_DFLAG_NCQ)) == ATA_DFLAG_NCQ &&
316 likely(tag != ATA_TAG_INTERNAL)) {
318 if (!lba_48_ok(block, n_block))
321 tf->protocol = ATA_PROT_NCQ;
322 tf->flags |= ATA_TFLAG_LBA | ATA_TFLAG_LBA48;
324 if (tf->flags & ATA_TFLAG_WRITE)
325 tf->command = ATA_CMD_FPDMA_WRITE;
327 tf->command = ATA_CMD_FPDMA_READ;
329 tf->nsect = tag << 3;
330 tf->hob_feature = (n_block >> 8) & 0xff;
331 tf->feature = n_block & 0xff;
333 tf->hob_lbah = (block >> 40) & 0xff;
334 tf->hob_lbam = (block >> 32) & 0xff;
335 tf->hob_lbal = (block >> 24) & 0xff;
336 tf->lbah = (block >> 16) & 0xff;
337 tf->lbam = (block >> 8) & 0xff;
338 tf->lbal = block & 0xff;
341 if (tf->flags & ATA_TFLAG_FUA)
342 tf->device |= 1 << 7;
343 } else if (dev->flags & ATA_DFLAG_LBA) {
344 tf->flags |= ATA_TFLAG_LBA;
346 if (lba_28_ok(block, n_block)) {
348 tf->device |= (block >> 24) & 0xf;
349 } else if (lba_48_ok(block, n_block)) {
350 if (!(dev->flags & ATA_DFLAG_LBA48))
354 tf->flags |= ATA_TFLAG_LBA48;
356 tf->hob_nsect = (n_block >> 8) & 0xff;
358 tf->hob_lbah = (block >> 40) & 0xff;
359 tf->hob_lbam = (block >> 32) & 0xff;
360 tf->hob_lbal = (block >> 24) & 0xff;
362 /* request too large even for LBA48 */
365 if (unlikely(ata_rwcmd_protocol(tf, dev) < 0))
368 tf->nsect = n_block & 0xff;
370 tf->lbah = (block >> 16) & 0xff;
371 tf->lbam = (block >> 8) & 0xff;
372 tf->lbal = block & 0xff;
374 tf->device |= ATA_LBA;
377 u32 sect, head, cyl, track;
379 /* The request -may- be too large for CHS addressing. */
380 if (!lba_28_ok(block, n_block))
383 if (unlikely(ata_rwcmd_protocol(tf, dev) < 0))
386 /* Convert LBA to CHS */
387 track = (u32)block / dev->sectors;
388 cyl = track / dev->heads;
389 head = track % dev->heads;
390 sect = (u32)block % dev->sectors + 1;
392 DPRINTK("block %u track %u cyl %u head %u sect %u\n",
393 (u32)block, track, cyl, head, sect);
395 /* Check whether the converted CHS can fit.
399 if ((cyl >> 16) || (head >> 4) || (sect >> 8) || (!sect))
402 tf->nsect = n_block & 0xff; /* Sector count 0 means 256 sectors */
413 * ata_pack_xfermask - Pack pio, mwdma and udma masks into xfer_mask
414 * @pio_mask: pio_mask
415 * @mwdma_mask: mwdma_mask
416 * @udma_mask: udma_mask
418 * Pack @pio_mask, @mwdma_mask and @udma_mask into a single
419 * unsigned int xfer_mask.
427 static unsigned int ata_pack_xfermask(unsigned int pio_mask,
428 unsigned int mwdma_mask,
429 unsigned int udma_mask)
431 return ((pio_mask << ATA_SHIFT_PIO) & ATA_MASK_PIO) |
432 ((mwdma_mask << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA) |
433 ((udma_mask << ATA_SHIFT_UDMA) & ATA_MASK_UDMA);
437 * ata_unpack_xfermask - Unpack xfer_mask into pio, mwdma and udma masks
438 * @xfer_mask: xfer_mask to unpack
439 * @pio_mask: resulting pio_mask
440 * @mwdma_mask: resulting mwdma_mask
441 * @udma_mask: resulting udma_mask
443 * Unpack @xfer_mask into @pio_mask, @mwdma_mask and @udma_mask.
444 * Any NULL distination masks will be ignored.
446 static void ata_unpack_xfermask(unsigned int xfer_mask,
447 unsigned int *pio_mask,
448 unsigned int *mwdma_mask,
449 unsigned int *udma_mask)
452 *pio_mask = (xfer_mask & ATA_MASK_PIO) >> ATA_SHIFT_PIO;
454 *mwdma_mask = (xfer_mask & ATA_MASK_MWDMA) >> ATA_SHIFT_MWDMA;
456 *udma_mask = (xfer_mask & ATA_MASK_UDMA) >> ATA_SHIFT_UDMA;
459 static const struct ata_xfer_ent {
463 { ATA_SHIFT_PIO, ATA_BITS_PIO, XFER_PIO_0 },
464 { ATA_SHIFT_MWDMA, ATA_BITS_MWDMA, XFER_MW_DMA_0 },
465 { ATA_SHIFT_UDMA, ATA_BITS_UDMA, XFER_UDMA_0 },
470 * ata_xfer_mask2mode - Find matching XFER_* for the given xfer_mask
471 * @xfer_mask: xfer_mask of interest
473 * Return matching XFER_* value for @xfer_mask. Only the highest
474 * bit of @xfer_mask is considered.
480 * Matching XFER_* value, 0 if no match found.
482 static u8 ata_xfer_mask2mode(unsigned int xfer_mask)
484 int highbit = fls(xfer_mask) - 1;
485 const struct ata_xfer_ent *ent;
487 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
488 if (highbit >= ent->shift && highbit < ent->shift + ent->bits)
489 return ent->base + highbit - ent->shift;
494 * ata_xfer_mode2mask - Find matching xfer_mask for XFER_*
495 * @xfer_mode: XFER_* of interest
497 * Return matching xfer_mask for @xfer_mode.
503 * Matching xfer_mask, 0 if no match found.
505 static unsigned int ata_xfer_mode2mask(u8 xfer_mode)
507 const struct ata_xfer_ent *ent;
509 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
510 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
511 return 1 << (ent->shift + xfer_mode - ent->base);
516 * ata_xfer_mode2shift - Find matching xfer_shift for XFER_*
517 * @xfer_mode: XFER_* of interest
519 * Return matching xfer_shift for @xfer_mode.
525 * Matching xfer_shift, -1 if no match found.
527 static int ata_xfer_mode2shift(unsigned int xfer_mode)
529 const struct ata_xfer_ent *ent;
531 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
532 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
538 * ata_mode_string - convert xfer_mask to string
539 * @xfer_mask: mask of bits supported; only highest bit counts.
541 * Determine string which represents the highest speed
542 * (highest bit in @modemask).
548 * Constant C string representing highest speed listed in
549 * @mode_mask, or the constant C string "<n/a>".
551 static const char *ata_mode_string(unsigned int xfer_mask)
553 static const char * const xfer_mode_str[] = {
577 highbit = fls(xfer_mask) - 1;
578 if (highbit >= 0 && highbit < ARRAY_SIZE(xfer_mode_str))
579 return xfer_mode_str[highbit];
583 static const char *sata_spd_string(unsigned int spd)
585 static const char * const spd_str[] = {
590 if (spd == 0 || (spd - 1) >= ARRAY_SIZE(spd_str))
592 return spd_str[spd - 1];
595 void ata_dev_disable(struct ata_device *dev)
597 if (ata_dev_enabled(dev) && ata_msg_drv(dev->ap)) {
598 ata_dev_printk(dev, KERN_WARNING, "disabled\n");
604 * ata_devchk - PATA device presence detection
605 * @ap: ATA channel to examine
606 * @device: Device to examine (starting at zero)
608 * This technique was originally described in
609 * Hale Landis's ATADRVR (www.ata-atapi.com), and
610 * later found its way into the ATA/ATAPI spec.
612 * Write a pattern to the ATA shadow registers,
613 * and if a device is present, it will respond by
614 * correctly storing and echoing back the
615 * ATA shadow register contents.
621 static unsigned int ata_devchk(struct ata_port *ap, unsigned int device)
623 struct ata_ioports *ioaddr = &ap->ioaddr;
626 ap->ops->dev_select(ap, device);
628 iowrite8(0x55, ioaddr->nsect_addr);
629 iowrite8(0xaa, ioaddr->lbal_addr);
631 iowrite8(0xaa, ioaddr->nsect_addr);
632 iowrite8(0x55, ioaddr->lbal_addr);
634 iowrite8(0x55, ioaddr->nsect_addr);
635 iowrite8(0xaa, ioaddr->lbal_addr);
637 nsect = ioread8(ioaddr->nsect_addr);
638 lbal = ioread8(ioaddr->lbal_addr);
640 if ((nsect == 0x55) && (lbal == 0xaa))
641 return 1; /* we found a device */
643 return 0; /* nothing found */
647 * ata_dev_classify - determine device type based on ATA-spec signature
648 * @tf: ATA taskfile register set for device to be identified
650 * Determine from taskfile register contents whether a device is
651 * ATA or ATAPI, as per "Signature and persistence" section
652 * of ATA/PI spec (volume 1, sect 5.14).
658 * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, or %ATA_DEV_UNKNOWN
659 * the event of failure.
662 unsigned int ata_dev_classify(const struct ata_taskfile *tf)
664 /* Apple's open source Darwin code hints that some devices only
665 * put a proper signature into the LBA mid/high registers,
666 * So, we only check those. It's sufficient for uniqueness.
669 if (((tf->lbam == 0) && (tf->lbah == 0)) ||
670 ((tf->lbam == 0x3c) && (tf->lbah == 0xc3))) {
671 DPRINTK("found ATA device by sig\n");
675 if (((tf->lbam == 0x14) && (tf->lbah == 0xeb)) ||
676 ((tf->lbam == 0x69) && (tf->lbah == 0x96))) {
677 DPRINTK("found ATAPI device by sig\n");
678 return ATA_DEV_ATAPI;
681 DPRINTK("unknown device\n");
682 return ATA_DEV_UNKNOWN;
686 * ata_dev_try_classify - Parse returned ATA device signature
687 * @ap: ATA channel to examine
688 * @device: Device to examine (starting at zero)
689 * @r_err: Value of error register on completion
691 * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
692 * an ATA/ATAPI-defined set of values is placed in the ATA
693 * shadow registers, indicating the results of device detection
696 * Select the ATA device, and read the values from the ATA shadow
697 * registers. Then parse according to the Error register value,
698 * and the spec-defined values examined by ata_dev_classify().
704 * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE.
708 ata_dev_try_classify(struct ata_port *ap, unsigned int device, u8 *r_err)
710 struct ata_taskfile tf;
714 ap->ops->dev_select(ap, device);
716 memset(&tf, 0, sizeof(tf));
718 ap->ops->tf_read(ap, &tf);
723 /* see if device passed diags: if master then continue and warn later */
724 if (err == 0 && device == 0)
725 /* diagnostic fail : do nothing _YET_ */
726 ap->device[device].horkage |= ATA_HORKAGE_DIAGNOSTIC;
729 else if ((device == 0) && (err == 0x81))
734 /* determine if device is ATA or ATAPI */
735 class = ata_dev_classify(&tf);
737 if (class == ATA_DEV_UNKNOWN)
739 if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0))
745 * ata_id_string - Convert IDENTIFY DEVICE page into string
746 * @id: IDENTIFY DEVICE results we will examine
747 * @s: string into which data is output
748 * @ofs: offset into identify device page
749 * @len: length of string to return. must be an even number.
751 * The strings in the IDENTIFY DEVICE page are broken up into
752 * 16-bit chunks. Run through the string, and output each
753 * 8-bit chunk linearly, regardless of platform.
759 void ata_id_string(const u16 *id, unsigned char *s,
760 unsigned int ofs, unsigned int len)
779 * ata_id_c_string - Convert IDENTIFY DEVICE page into C string
780 * @id: IDENTIFY DEVICE results we will examine
781 * @s: string into which data is output
782 * @ofs: offset into identify device page
783 * @len: length of string to return. must be an odd number.
785 * This function is identical to ata_id_string except that it
786 * trims trailing spaces and terminates the resulting string with
787 * null. @len must be actual maximum length (even number) + 1.
792 void ata_id_c_string(const u16 *id, unsigned char *s,
793 unsigned int ofs, unsigned int len)
799 ata_id_string(id, s, ofs, len - 1);
801 p = s + strnlen(s, len - 1);
802 while (p > s && p[-1] == ' ')
807 static u64 ata_id_n_sectors(const u16 *id)
809 if (ata_id_has_lba(id)) {
810 if (ata_id_has_lba48(id))
811 return ata_id_u64(id, 100);
813 return ata_id_u32(id, 60);
815 if (ata_id_current_chs_valid(id))
816 return ata_id_u32(id, 57);
818 return id[1] * id[3] * id[6];
823 * ata_noop_dev_select - Select device 0/1 on ATA bus
824 * @ap: ATA channel to manipulate
825 * @device: ATA device (numbered from zero) to select
827 * This function performs no actual function.
829 * May be used as the dev_select() entry in ata_port_operations.
834 void ata_noop_dev_select (struct ata_port *ap, unsigned int device)
840 * ata_std_dev_select - Select device 0/1 on ATA bus
841 * @ap: ATA channel to manipulate
842 * @device: ATA device (numbered from zero) to select
844 * Use the method defined in the ATA specification to
845 * make either device 0, or device 1, active on the
846 * ATA channel. Works with both PIO and MMIO.
848 * May be used as the dev_select() entry in ata_port_operations.
854 void ata_std_dev_select (struct ata_port *ap, unsigned int device)
859 tmp = ATA_DEVICE_OBS;
861 tmp = ATA_DEVICE_OBS | ATA_DEV1;
863 iowrite8(tmp, ap->ioaddr.device_addr);
864 ata_pause(ap); /* needed; also flushes, for mmio */
868 * ata_dev_select - Select device 0/1 on ATA bus
869 * @ap: ATA channel to manipulate
870 * @device: ATA device (numbered from zero) to select
871 * @wait: non-zero to wait for Status register BSY bit to clear
872 * @can_sleep: non-zero if context allows sleeping
874 * Use the method defined in the ATA specification to
875 * make either device 0, or device 1, active on the
878 * This is a high-level version of ata_std_dev_select(),
879 * which additionally provides the services of inserting
880 * the proper pauses and status polling, where needed.
886 void ata_dev_select(struct ata_port *ap, unsigned int device,
887 unsigned int wait, unsigned int can_sleep)
889 if (ata_msg_probe(ap))
890 ata_port_printk(ap, KERN_INFO, "ata_dev_select: ENTER, ata%u: "
891 "device %u, wait %u\n", ap->id, device, wait);
896 ap->ops->dev_select(ap, device);
899 if (can_sleep && ap->device[device].class == ATA_DEV_ATAPI)
906 * ata_dump_id - IDENTIFY DEVICE info debugging output
907 * @id: IDENTIFY DEVICE page to dump
909 * Dump selected 16-bit words from the given IDENTIFY DEVICE
916 static inline void ata_dump_id(const u16 *id)
918 DPRINTK("49==0x%04x "
928 DPRINTK("80==0x%04x "
938 DPRINTK("88==0x%04x "
945 * ata_id_xfermask - Compute xfermask from the given IDENTIFY data
946 * @id: IDENTIFY data to compute xfer mask from
948 * Compute the xfermask for this device. This is not as trivial
949 * as it seems if we must consider early devices correctly.
951 * FIXME: pre IDE drive timing (do we care ?).
959 static unsigned int ata_id_xfermask(const u16 *id)
961 unsigned int pio_mask, mwdma_mask, udma_mask;
963 /* Usual case. Word 53 indicates word 64 is valid */
964 if (id[ATA_ID_FIELD_VALID] & (1 << 1)) {
965 pio_mask = id[ATA_ID_PIO_MODES] & 0x03;
969 /* If word 64 isn't valid then Word 51 high byte holds
970 * the PIO timing number for the maximum. Turn it into
973 u8 mode = (id[ATA_ID_OLD_PIO_MODES] >> 8) & 0xFF;
974 if (mode < 5) /* Valid PIO range */
975 pio_mask = (2 << mode) - 1;
979 /* But wait.. there's more. Design your standards by
980 * committee and you too can get a free iordy field to
981 * process. However its the speeds not the modes that
982 * are supported... Note drivers using the timing API
983 * will get this right anyway
987 mwdma_mask = id[ATA_ID_MWDMA_MODES] & 0x07;
989 if (ata_id_is_cfa(id)) {
991 * Process compact flash extended modes
993 int pio = id[163] & 0x7;
994 int dma = (id[163] >> 3) & 7;
997 pio_mask |= (1 << 5);
999 pio_mask |= (1 << 6);
1001 mwdma_mask |= (1 << 3);
1003 mwdma_mask |= (1 << 4);
1007 if (id[ATA_ID_FIELD_VALID] & (1 << 2))
1008 udma_mask = id[ATA_ID_UDMA_MODES] & 0xff;
1010 return ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask);
1014 * ata_port_queue_task - Queue port_task
1015 * @ap: The ata_port to queue port_task for
1016 * @fn: workqueue function to be scheduled
1017 * @data: data for @fn to use
1018 * @delay: delay time for workqueue function
1020 * Schedule @fn(@data) for execution after @delay jiffies using
1021 * port_task. There is one port_task per port and it's the
1022 * user(low level driver)'s responsibility to make sure that only
1023 * one task is active at any given time.
1025 * libata core layer takes care of synchronization between
1026 * port_task and EH. ata_port_queue_task() may be ignored for EH
1030 * Inherited from caller.
1032 void ata_port_queue_task(struct ata_port *ap, work_func_t fn, void *data,
1033 unsigned long delay)
1037 if (ap->pflags & ATA_PFLAG_FLUSH_PORT_TASK)
1040 PREPARE_DELAYED_WORK(&ap->port_task, fn);
1041 ap->port_task_data = data;
1043 rc = queue_delayed_work(ata_wq, &ap->port_task, delay);
1045 /* rc == 0 means that another user is using port task */
1050 * ata_port_flush_task - Flush port_task
1051 * @ap: The ata_port to flush port_task for
1053 * After this function completes, port_task is guranteed not to
1054 * be running or scheduled.
1057 * Kernel thread context (may sleep)
1059 void ata_port_flush_task(struct ata_port *ap)
1061 unsigned long flags;
1065 spin_lock_irqsave(ap->lock, flags);
1066 ap->pflags |= ATA_PFLAG_FLUSH_PORT_TASK;
1067 spin_unlock_irqrestore(ap->lock, flags);
1069 DPRINTK("flush #1\n");
1070 flush_workqueue(ata_wq);
1073 * At this point, if a task is running, it's guaranteed to see
1074 * the FLUSH flag; thus, it will never queue pio tasks again.
1077 if (!cancel_delayed_work(&ap->port_task)) {
1078 if (ata_msg_ctl(ap))
1079 ata_port_printk(ap, KERN_DEBUG, "%s: flush #2\n",
1081 flush_workqueue(ata_wq);
1084 spin_lock_irqsave(ap->lock, flags);
1085 ap->pflags &= ~ATA_PFLAG_FLUSH_PORT_TASK;
1086 spin_unlock_irqrestore(ap->lock, flags);
1088 if (ata_msg_ctl(ap))
1089 ata_port_printk(ap, KERN_DEBUG, "%s: EXIT\n", __FUNCTION__);
1092 static void ata_qc_complete_internal(struct ata_queued_cmd *qc)
1094 struct completion *waiting = qc->private_data;
1100 * ata_exec_internal_sg - execute libata internal command
1101 * @dev: Device to which the command is sent
1102 * @tf: Taskfile registers for the command and the result
1103 * @cdb: CDB for packet command
1104 * @dma_dir: Data tranfer direction of the command
1105 * @sg: sg list for the data buffer of the command
1106 * @n_elem: Number of sg entries
1108 * Executes libata internal command with timeout. @tf contains
1109 * command on entry and result on return. Timeout and error
1110 * conditions are reported via return value. No recovery action
1111 * is taken after a command times out. It's caller's duty to
1112 * clean up after timeout.
1115 * None. Should be called with kernel context, might sleep.
1118 * Zero on success, AC_ERR_* mask on failure
1120 unsigned ata_exec_internal_sg(struct ata_device *dev,
1121 struct ata_taskfile *tf, const u8 *cdb,
1122 int dma_dir, struct scatterlist *sg,
1123 unsigned int n_elem)
1125 struct ata_port *ap = dev->ap;
1126 u8 command = tf->command;
1127 struct ata_queued_cmd *qc;
1128 unsigned int tag, preempted_tag;
1129 u32 preempted_sactive, preempted_qc_active;
1130 DECLARE_COMPLETION_ONSTACK(wait);
1131 unsigned long flags;
1132 unsigned int err_mask;
1135 spin_lock_irqsave(ap->lock, flags);
1137 /* no internal command while frozen */
1138 if (ap->pflags & ATA_PFLAG_FROZEN) {
1139 spin_unlock_irqrestore(ap->lock, flags);
1140 return AC_ERR_SYSTEM;
1143 /* initialize internal qc */
1145 /* XXX: Tag 0 is used for drivers with legacy EH as some
1146 * drivers choke if any other tag is given. This breaks
1147 * ata_tag_internal() test for those drivers. Don't use new
1148 * EH stuff without converting to it.
1150 if (ap->ops->error_handler)
1151 tag = ATA_TAG_INTERNAL;
1155 if (test_and_set_bit(tag, &ap->qc_allocated))
1157 qc = __ata_qc_from_tag(ap, tag);
1165 preempted_tag = ap->active_tag;
1166 preempted_sactive = ap->sactive;
1167 preempted_qc_active = ap->qc_active;
1168 ap->active_tag = ATA_TAG_POISON;
1172 /* prepare & issue qc */
1175 memcpy(qc->cdb, cdb, ATAPI_CDB_LEN);
1176 qc->flags |= ATA_QCFLAG_RESULT_TF;
1177 qc->dma_dir = dma_dir;
1178 if (dma_dir != DMA_NONE) {
1179 unsigned int i, buflen = 0;
1181 for (i = 0; i < n_elem; i++)
1182 buflen += sg[i].length;
1184 ata_sg_init(qc, sg, n_elem);
1185 qc->nbytes = buflen;
1188 qc->private_data = &wait;
1189 qc->complete_fn = ata_qc_complete_internal;
1193 spin_unlock_irqrestore(ap->lock, flags);
1195 rc = wait_for_completion_timeout(&wait, ata_probe_timeout);
1197 ata_port_flush_task(ap);
1200 spin_lock_irqsave(ap->lock, flags);
1202 /* We're racing with irq here. If we lose, the
1203 * following test prevents us from completing the qc
1204 * twice. If we win, the port is frozen and will be
1205 * cleaned up by ->post_internal_cmd().
1207 if (qc->flags & ATA_QCFLAG_ACTIVE) {
1208 qc->err_mask |= AC_ERR_TIMEOUT;
1210 if (ap->ops->error_handler)
1211 ata_port_freeze(ap);
1213 ata_qc_complete(qc);
1215 if (ata_msg_warn(ap))
1216 ata_dev_printk(dev, KERN_WARNING,
1217 "qc timeout (cmd 0x%x)\n", command);
1220 spin_unlock_irqrestore(ap->lock, flags);
1223 /* do post_internal_cmd */
1224 if (ap->ops->post_internal_cmd)
1225 ap->ops->post_internal_cmd(qc);
1227 if ((qc->flags & ATA_QCFLAG_FAILED) && !qc->err_mask) {
1228 if (ata_msg_warn(ap))
1229 ata_dev_printk(dev, KERN_WARNING,
1230 "zero err_mask for failed "
1231 "internal command, assuming AC_ERR_OTHER\n");
1232 qc->err_mask |= AC_ERR_OTHER;
1236 spin_lock_irqsave(ap->lock, flags);
1238 *tf = qc->result_tf;
1239 err_mask = qc->err_mask;
1242 ap->active_tag = preempted_tag;
1243 ap->sactive = preempted_sactive;
1244 ap->qc_active = preempted_qc_active;
1246 /* XXX - Some LLDDs (sata_mv) disable port on command failure.
1247 * Until those drivers are fixed, we detect the condition
1248 * here, fail the command with AC_ERR_SYSTEM and reenable the
1251 * Note that this doesn't change any behavior as internal
1252 * command failure results in disabling the device in the
1253 * higher layer for LLDDs without new reset/EH callbacks.
1255 * Kill the following code as soon as those drivers are fixed.
1257 if (ap->flags & ATA_FLAG_DISABLED) {
1258 err_mask |= AC_ERR_SYSTEM;
1262 spin_unlock_irqrestore(ap->lock, flags);
1268 * ata_exec_internal - execute libata internal command
1269 * @dev: Device to which the command is sent
1270 * @tf: Taskfile registers for the command and the result
1271 * @cdb: CDB for packet command
1272 * @dma_dir: Data tranfer direction of the command
1273 * @buf: Data buffer of the command
1274 * @buflen: Length of data buffer
1276 * Wrapper around ata_exec_internal_sg() which takes simple
1277 * buffer instead of sg list.
1280 * None. Should be called with kernel context, might sleep.
1283 * Zero on success, AC_ERR_* mask on failure
1285 unsigned ata_exec_internal(struct ata_device *dev,
1286 struct ata_taskfile *tf, const u8 *cdb,
1287 int dma_dir, void *buf, unsigned int buflen)
1289 struct scatterlist *psg = NULL, sg;
1290 unsigned int n_elem = 0;
1292 if (dma_dir != DMA_NONE) {
1294 sg_init_one(&sg, buf, buflen);
1299 return ata_exec_internal_sg(dev, tf, cdb, dma_dir, psg, n_elem);
1303 * ata_do_simple_cmd - execute simple internal command
1304 * @dev: Device to which the command is sent
1305 * @cmd: Opcode to execute
1307 * Execute a 'simple' command, that only consists of the opcode
1308 * 'cmd' itself, without filling any other registers
1311 * Kernel thread context (may sleep).
1314 * Zero on success, AC_ERR_* mask on failure
1316 unsigned int ata_do_simple_cmd(struct ata_device *dev, u8 cmd)
1318 struct ata_taskfile tf;
1320 ata_tf_init(dev, &tf);
1323 tf.flags |= ATA_TFLAG_DEVICE;
1324 tf.protocol = ATA_PROT_NODATA;
1326 return ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
1330 * ata_pio_need_iordy - check if iordy needed
1333 * Check if the current speed of the device requires IORDY. Used
1334 * by various controllers for chip configuration.
1337 unsigned int ata_pio_need_iordy(const struct ata_device *adev)
1340 int speed = adev->pio_mode - XFER_PIO_0;
1347 /* If we have no drive specific rule, then PIO 2 is non IORDY */
1349 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE */
1350 pio = adev->id[ATA_ID_EIDE_PIO];
1351 /* Is the speed faster than the drive allows non IORDY ? */
1353 /* This is cycle times not frequency - watch the logic! */
1354 if (pio > 240) /* PIO2 is 240nS per cycle */
1363 * ata_dev_read_id - Read ID data from the specified device
1364 * @dev: target device
1365 * @p_class: pointer to class of the target device (may be changed)
1366 * @flags: ATA_READID_* flags
1367 * @id: buffer to read IDENTIFY data into
1369 * Read ID data from the specified device. ATA_CMD_ID_ATA is
1370 * performed on ATA devices and ATA_CMD_ID_ATAPI on ATAPI
1371 * devices. This function also issues ATA_CMD_INIT_DEV_PARAMS
1372 * for pre-ATA4 drives.
1375 * Kernel thread context (may sleep)
1378 * 0 on success, -errno otherwise.
1380 int ata_dev_read_id(struct ata_device *dev, unsigned int *p_class,
1381 unsigned int flags, u16 *id)
1383 struct ata_port *ap = dev->ap;
1384 unsigned int class = *p_class;
1385 struct ata_taskfile tf;
1386 unsigned int err_mask = 0;
1390 if (ata_msg_ctl(ap))
1391 ata_dev_printk(dev, KERN_DEBUG, "%s: ENTER, host %u, dev %u\n",
1392 __FUNCTION__, ap->id, dev->devno);
1394 ata_dev_select(ap, dev->devno, 1, 1); /* select device 0/1 */
1397 ata_tf_init(dev, &tf);
1401 tf.command = ATA_CMD_ID_ATA;
1404 tf.command = ATA_CMD_ID_ATAPI;
1408 reason = "unsupported class";
1412 tf.protocol = ATA_PROT_PIO;
1413 tf.flags |= ATA_TFLAG_POLLING; /* for polling presence detection */
1415 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_FROM_DEVICE,
1416 id, sizeof(id[0]) * ATA_ID_WORDS);
1418 if (err_mask & AC_ERR_NODEV_HINT) {
1419 DPRINTK("ata%u.%d: NODEV after polling detection\n",
1420 ap->id, dev->devno);
1425 reason = "I/O error";
1429 swap_buf_le16(id, ATA_ID_WORDS);
1433 reason = "device reports illegal type";
1435 if (class == ATA_DEV_ATA) {
1436 if (!ata_id_is_ata(id) && !ata_id_is_cfa(id))
1439 if (ata_id_is_ata(id))
1443 if ((flags & ATA_READID_POSTRESET) && class == ATA_DEV_ATA) {
1445 * The exact sequence expected by certain pre-ATA4 drives is:
1448 * INITIALIZE DEVICE PARAMETERS
1450 * Some drives were very specific about that exact sequence.
1452 if (ata_id_major_version(id) < 4 || !ata_id_has_lba(id)) {
1453 err_mask = ata_dev_init_params(dev, id[3], id[6]);
1456 reason = "INIT_DEV_PARAMS failed";
1460 /* current CHS translation info (id[53-58]) might be
1461 * changed. reread the identify device info.
1463 flags &= ~ATA_READID_POSTRESET;
1473 if (ata_msg_warn(ap))
1474 ata_dev_printk(dev, KERN_WARNING, "failed to IDENTIFY "
1475 "(%s, err_mask=0x%x)\n", reason, err_mask);
1479 static inline u8 ata_dev_knobble(struct ata_device *dev)
1481 return ((dev->ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(dev->id)));
1484 static void ata_dev_config_ncq(struct ata_device *dev,
1485 char *desc, size_t desc_sz)
1487 struct ata_port *ap = dev->ap;
1488 int hdepth = 0, ddepth = ata_id_queue_depth(dev->id);
1490 if (!ata_id_has_ncq(dev->id)) {
1494 if (ata_device_blacklisted(dev) & ATA_HORKAGE_NONCQ) {
1495 snprintf(desc, desc_sz, "NCQ (not used)");
1498 if (ap->flags & ATA_FLAG_NCQ) {
1499 hdepth = min(ap->scsi_host->can_queue, ATA_MAX_QUEUE - 1);
1500 dev->flags |= ATA_DFLAG_NCQ;
1503 if (hdepth >= ddepth)
1504 snprintf(desc, desc_sz, "NCQ (depth %d)", ddepth);
1506 snprintf(desc, desc_sz, "NCQ (depth %d/%d)", hdepth, ddepth);
1509 static void ata_set_port_max_cmd_len(struct ata_port *ap)
1513 if (ap->scsi_host) {
1514 unsigned int len = 0;
1516 for (i = 0; i < ATA_MAX_DEVICES; i++)
1517 len = max(len, ap->device[i].cdb_len);
1519 ap->scsi_host->max_cmd_len = len;
1524 * ata_dev_configure - Configure the specified ATA/ATAPI device
1525 * @dev: Target device to configure
1527 * Configure @dev according to @dev->id. Generic and low-level
1528 * driver specific fixups are also applied.
1531 * Kernel thread context (may sleep)
1534 * 0 on success, -errno otherwise
1536 int ata_dev_configure(struct ata_device *dev)
1538 struct ata_port *ap = dev->ap;
1539 int print_info = ap->eh_context.i.flags & ATA_EHI_PRINTINFO;
1540 const u16 *id = dev->id;
1541 unsigned int xfer_mask;
1542 char revbuf[7]; /* XYZ-99\0 */
1545 if (!ata_dev_enabled(dev) && ata_msg_info(ap)) {
1546 ata_dev_printk(dev, KERN_INFO,
1547 "%s: ENTER/EXIT (host %u, dev %u) -- nodev\n",
1548 __FUNCTION__, ap->id, dev->devno);
1552 if (ata_msg_probe(ap))
1553 ata_dev_printk(dev, KERN_DEBUG, "%s: ENTER, host %u, dev %u\n",
1554 __FUNCTION__, ap->id, dev->devno);
1556 /* print device capabilities */
1557 if (ata_msg_probe(ap))
1558 ata_dev_printk(dev, KERN_DEBUG,
1559 "%s: cfg 49:%04x 82:%04x 83:%04x 84:%04x "
1560 "85:%04x 86:%04x 87:%04x 88:%04x\n",
1562 id[49], id[82], id[83], id[84],
1563 id[85], id[86], id[87], id[88]);
1565 /* initialize to-be-configured parameters */
1566 dev->flags &= ~ATA_DFLAG_CFG_MASK;
1567 dev->max_sectors = 0;
1575 * common ATA, ATAPI feature tests
1578 /* find max transfer mode; for printk only */
1579 xfer_mask = ata_id_xfermask(id);
1581 if (ata_msg_probe(ap))
1584 /* ATA-specific feature tests */
1585 if (dev->class == ATA_DEV_ATA) {
1586 if (ata_id_is_cfa(id)) {
1587 if (id[162] & 1) /* CPRM may make this media unusable */
1588 ata_dev_printk(dev, KERN_WARNING, "ata%u: device %u supports DRM functions and may not be fully accessable.\n",
1589 ap->id, dev->devno);
1590 snprintf(revbuf, 7, "CFA");
1593 snprintf(revbuf, 7, "ATA-%d", ata_id_major_version(id));
1595 dev->n_sectors = ata_id_n_sectors(id);
1597 if (ata_id_has_lba(id)) {
1598 const char *lba_desc;
1602 dev->flags |= ATA_DFLAG_LBA;
1603 if (ata_id_has_lba48(id)) {
1604 dev->flags |= ATA_DFLAG_LBA48;
1607 if (dev->n_sectors >= (1UL << 28) &&
1608 ata_id_has_flush_ext(id))
1609 dev->flags |= ATA_DFLAG_FLUSH_EXT;
1613 ata_dev_config_ncq(dev, ncq_desc, sizeof(ncq_desc));
1615 /* print device info to dmesg */
1616 if (ata_msg_drv(ap) && print_info)
1617 ata_dev_printk(dev, KERN_INFO, "%s, "
1618 "max %s, %Lu sectors: %s %s\n",
1620 ata_mode_string(xfer_mask),
1621 (unsigned long long)dev->n_sectors,
1622 lba_desc, ncq_desc);
1626 /* Default translation */
1627 dev->cylinders = id[1];
1629 dev->sectors = id[6];
1631 if (ata_id_current_chs_valid(id)) {
1632 /* Current CHS translation is valid. */
1633 dev->cylinders = id[54];
1634 dev->heads = id[55];
1635 dev->sectors = id[56];
1638 /* print device info to dmesg */
1639 if (ata_msg_drv(ap) && print_info)
1640 ata_dev_printk(dev, KERN_INFO, "%s, "
1641 "max %s, %Lu sectors: CHS %u/%u/%u\n",
1643 ata_mode_string(xfer_mask),
1644 (unsigned long long)dev->n_sectors,
1645 dev->cylinders, dev->heads,
1649 if (dev->id[59] & 0x100) {
1650 dev->multi_count = dev->id[59] & 0xff;
1651 if (ata_msg_drv(ap) && print_info)
1652 ata_dev_printk(dev, KERN_INFO,
1653 "ata%u: dev %u multi count %u\n",
1654 ap->id, dev->devno, dev->multi_count);
1660 /* ATAPI-specific feature tests */
1661 else if (dev->class == ATA_DEV_ATAPI) {
1662 char *cdb_intr_string = "";
1664 rc = atapi_cdb_len(id);
1665 if ((rc < 12) || (rc > ATAPI_CDB_LEN)) {
1666 if (ata_msg_warn(ap))
1667 ata_dev_printk(dev, KERN_WARNING,
1668 "unsupported CDB len\n");
1672 dev->cdb_len = (unsigned int) rc;
1674 if (ata_id_cdb_intr(dev->id)) {
1675 dev->flags |= ATA_DFLAG_CDB_INTR;
1676 cdb_intr_string = ", CDB intr";
1679 /* print device info to dmesg */
1680 if (ata_msg_drv(ap) && print_info)
1681 ata_dev_printk(dev, KERN_INFO, "ATAPI, max %s%s\n",
1682 ata_mode_string(xfer_mask),
1686 /* determine max_sectors */
1687 dev->max_sectors = ATA_MAX_SECTORS;
1688 if (dev->flags & ATA_DFLAG_LBA48)
1689 dev->max_sectors = ATA_MAX_SECTORS_LBA48;
1691 if (dev->horkage & ATA_HORKAGE_DIAGNOSTIC) {
1692 /* Let the user know. We don't want to disallow opens for
1693 rescue purposes, or in case the vendor is just a blithering
1696 ata_dev_printk(dev, KERN_WARNING,
1697 "Drive reports diagnostics failure. This may indicate a drive\n");
1698 ata_dev_printk(dev, KERN_WARNING,
1699 "fault or invalid emulation. Contact drive vendor for information.\n");
1703 ata_set_port_max_cmd_len(ap);
1705 /* limit bridge transfers to udma5, 200 sectors */
1706 if (ata_dev_knobble(dev)) {
1707 if (ata_msg_drv(ap) && print_info)
1708 ata_dev_printk(dev, KERN_INFO,
1709 "applying bridge limits\n");
1710 dev->udma_mask &= ATA_UDMA5;
1711 dev->max_sectors = ATA_MAX_SECTORS;
1714 if (ap->ops->dev_config)
1715 ap->ops->dev_config(ap, dev);
1717 if (ata_msg_probe(ap))
1718 ata_dev_printk(dev, KERN_DEBUG, "%s: EXIT, drv_stat = 0x%x\n",
1719 __FUNCTION__, ata_chk_status(ap));
1723 if (ata_msg_probe(ap))
1724 ata_dev_printk(dev, KERN_DEBUG,
1725 "%s: EXIT, err\n", __FUNCTION__);
1730 * ata_bus_probe - Reset and probe ATA bus
1733 * Master ATA bus probing function. Initiates a hardware-dependent
1734 * bus reset, then attempts to identify any devices found on
1738 * PCI/etc. bus probe sem.
1741 * Zero on success, negative errno otherwise.
1744 int ata_bus_probe(struct ata_port *ap)
1746 unsigned int classes[ATA_MAX_DEVICES];
1747 int tries[ATA_MAX_DEVICES];
1748 int i, rc, down_xfermask;
1749 struct ata_device *dev;
1753 for (i = 0; i < ATA_MAX_DEVICES; i++)
1754 tries[i] = ATA_PROBE_MAX_TRIES;
1759 /* reset and determine device classes */
1760 ap->ops->phy_reset(ap);
1762 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1763 dev = &ap->device[i];
1765 if (!(ap->flags & ATA_FLAG_DISABLED) &&
1766 dev->class != ATA_DEV_UNKNOWN)
1767 classes[dev->devno] = dev->class;
1769 classes[dev->devno] = ATA_DEV_NONE;
1771 dev->class = ATA_DEV_UNKNOWN;
1776 /* after the reset the device state is PIO 0 and the controller
1777 state is undefined. Record the mode */
1779 for (i = 0; i < ATA_MAX_DEVICES; i++)
1780 ap->device[i].pio_mode = XFER_PIO_0;
1782 /* read IDENTIFY page and configure devices */
1783 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1784 dev = &ap->device[i];
1787 dev->class = classes[i];
1789 if (!ata_dev_enabled(dev))
1792 rc = ata_dev_read_id(dev, &dev->class, ATA_READID_POSTRESET,
1797 ap->eh_context.i.flags |= ATA_EHI_PRINTINFO;
1798 rc = ata_dev_configure(dev);
1799 ap->eh_context.i.flags &= ~ATA_EHI_PRINTINFO;
1804 /* configure transfer mode */
1805 rc = ata_set_mode(ap, &dev);
1811 for (i = 0; i < ATA_MAX_DEVICES; i++)
1812 if (ata_dev_enabled(&ap->device[i]))
1815 /* no device present, disable port */
1816 ata_port_disable(ap);
1817 ap->ops->port_disable(ap);
1824 tries[dev->devno] = 0;
1827 sata_down_spd_limit(ap);
1830 tries[dev->devno]--;
1831 if (down_xfermask &&
1832 ata_down_xfermask_limit(dev, tries[dev->devno] == 1))
1833 tries[dev->devno] = 0;
1836 if (!tries[dev->devno]) {
1837 ata_down_xfermask_limit(dev, 1);
1838 ata_dev_disable(dev);
1845 * ata_port_probe - Mark port as enabled
1846 * @ap: Port for which we indicate enablement
1848 * Modify @ap data structure such that the system
1849 * thinks that the entire port is enabled.
1851 * LOCKING: host lock, or some other form of
1855 void ata_port_probe(struct ata_port *ap)
1857 ap->flags &= ~ATA_FLAG_DISABLED;
1861 * sata_print_link_status - Print SATA link status
1862 * @ap: SATA port to printk link status about
1864 * This function prints link speed and status of a SATA link.
1869 static void sata_print_link_status(struct ata_port *ap)
1871 u32 sstatus, scontrol, tmp;
1873 if (sata_scr_read(ap, SCR_STATUS, &sstatus))
1875 sata_scr_read(ap, SCR_CONTROL, &scontrol);
1877 if (ata_port_online(ap)) {
1878 tmp = (sstatus >> 4) & 0xf;
1879 ata_port_printk(ap, KERN_INFO,
1880 "SATA link up %s (SStatus %X SControl %X)\n",
1881 sata_spd_string(tmp), sstatus, scontrol);
1883 ata_port_printk(ap, KERN_INFO,
1884 "SATA link down (SStatus %X SControl %X)\n",
1890 * __sata_phy_reset - Wake/reset a low-level SATA PHY
1891 * @ap: SATA port associated with target SATA PHY.
1893 * This function issues commands to standard SATA Sxxx
1894 * PHY registers, to wake up the phy (and device), and
1895 * clear any reset condition.
1898 * PCI/etc. bus probe sem.
1901 void __sata_phy_reset(struct ata_port *ap)
1904 unsigned long timeout = jiffies + (HZ * 5);
1906 if (ap->flags & ATA_FLAG_SATA_RESET) {
1907 /* issue phy wake/reset */
1908 sata_scr_write_flush(ap, SCR_CONTROL, 0x301);
1909 /* Couldn't find anything in SATA I/II specs, but
1910 * AHCI-1.1 10.4.2 says at least 1 ms. */
1913 /* phy wake/clear reset */
1914 sata_scr_write_flush(ap, SCR_CONTROL, 0x300);
1916 /* wait for phy to become ready, if necessary */
1919 sata_scr_read(ap, SCR_STATUS, &sstatus);
1920 if ((sstatus & 0xf) != 1)
1922 } while (time_before(jiffies, timeout));
1924 /* print link status */
1925 sata_print_link_status(ap);
1927 /* TODO: phy layer with polling, timeouts, etc. */
1928 if (!ata_port_offline(ap))
1931 ata_port_disable(ap);
1933 if (ap->flags & ATA_FLAG_DISABLED)
1936 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
1937 ata_port_disable(ap);
1941 ap->cbl = ATA_CBL_SATA;
1945 * sata_phy_reset - Reset SATA bus.
1946 * @ap: SATA port associated with target SATA PHY.
1948 * This function resets the SATA bus, and then probes
1949 * the bus for devices.
1952 * PCI/etc. bus probe sem.
1955 void sata_phy_reset(struct ata_port *ap)
1957 __sata_phy_reset(ap);
1958 if (ap->flags & ATA_FLAG_DISABLED)
1964 * ata_dev_pair - return other device on cable
1967 * Obtain the other device on the same cable, or if none is
1968 * present NULL is returned
1971 struct ata_device *ata_dev_pair(struct ata_device *adev)
1973 struct ata_port *ap = adev->ap;
1974 struct ata_device *pair = &ap->device[1 - adev->devno];
1975 if (!ata_dev_enabled(pair))
1981 * ata_port_disable - Disable port.
1982 * @ap: Port to be disabled.
1984 * Modify @ap data structure such that the system
1985 * thinks that the entire port is disabled, and should
1986 * never attempt to probe or communicate with devices
1989 * LOCKING: host lock, or some other form of
1993 void ata_port_disable(struct ata_port *ap)
1995 ap->device[0].class = ATA_DEV_NONE;
1996 ap->device[1].class = ATA_DEV_NONE;
1997 ap->flags |= ATA_FLAG_DISABLED;
2001 * sata_down_spd_limit - adjust SATA spd limit downward
2002 * @ap: Port to adjust SATA spd limit for
2004 * Adjust SATA spd limit of @ap downward. Note that this
2005 * function only adjusts the limit. The change must be applied
2006 * using sata_set_spd().
2009 * Inherited from caller.
2012 * 0 on success, negative errno on failure
2014 int sata_down_spd_limit(struct ata_port *ap)
2016 u32 sstatus, spd, mask;
2019 rc = sata_scr_read(ap, SCR_STATUS, &sstatus);
2023 mask = ap->sata_spd_limit;
2026 highbit = fls(mask) - 1;
2027 mask &= ~(1 << highbit);
2029 spd = (sstatus >> 4) & 0xf;
2033 mask &= (1 << spd) - 1;
2037 ap->sata_spd_limit = mask;
2039 ata_port_printk(ap, KERN_WARNING, "limiting SATA link speed to %s\n",
2040 sata_spd_string(fls(mask)));
2045 static int __sata_set_spd_needed(struct ata_port *ap, u32 *scontrol)
2049 if (ap->sata_spd_limit == UINT_MAX)
2052 limit = fls(ap->sata_spd_limit);
2054 spd = (*scontrol >> 4) & 0xf;
2055 *scontrol = (*scontrol & ~0xf0) | ((limit & 0xf) << 4);
2057 return spd != limit;
2061 * sata_set_spd_needed - is SATA spd configuration needed
2062 * @ap: Port in question
2064 * Test whether the spd limit in SControl matches
2065 * @ap->sata_spd_limit. This function is used to determine
2066 * whether hardreset is necessary to apply SATA spd
2070 * Inherited from caller.
2073 * 1 if SATA spd configuration is needed, 0 otherwise.
2075 int sata_set_spd_needed(struct ata_port *ap)
2079 if (sata_scr_read(ap, SCR_CONTROL, &scontrol))
2082 return __sata_set_spd_needed(ap, &scontrol);
2086 * sata_set_spd - set SATA spd according to spd limit
2087 * @ap: Port to set SATA spd for
2089 * Set SATA spd of @ap according to sata_spd_limit.
2092 * Inherited from caller.
2095 * 0 if spd doesn't need to be changed, 1 if spd has been
2096 * changed. Negative errno if SCR registers are inaccessible.
2098 int sata_set_spd(struct ata_port *ap)
2103 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
2106 if (!__sata_set_spd_needed(ap, &scontrol))
2109 if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol)))
2116 * This mode timing computation functionality is ported over from
2117 * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik
2120 * PIO 0-4, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
2121 * These were taken from ATA/ATAPI-6 standard, rev 0a, except
2122 * for UDMA6, which is currently supported only by Maxtor drives.
2124 * For PIO 5/6 MWDMA 3/4 see the CFA specification 3.0.
2127 static const struct ata_timing ata_timing[] = {
2129 { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 },
2130 { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 },
2131 { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 },
2132 { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 },
2134 { XFER_MW_DMA_4, 25, 0, 0, 0, 55, 20, 80, 0 },
2135 { XFER_MW_DMA_3, 25, 0, 0, 0, 65, 25, 100, 0 },
2136 { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 },
2137 { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 },
2138 { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 },
2140 /* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */
2142 { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 },
2143 { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 },
2144 { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 },
2146 { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 },
2147 { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 },
2148 { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 },
2150 { XFER_PIO_6, 10, 55, 20, 80, 55, 20, 80, 0 },
2151 { XFER_PIO_5, 15, 65, 25, 100, 65, 25, 100, 0 },
2152 { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 },
2153 { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 },
2155 { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 },
2156 { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 },
2157 { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 },
2159 /* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */
2164 #define ENOUGH(v,unit) (((v)-1)/(unit)+1)
2165 #define EZ(v,unit) ((v)?ENOUGH(v,unit):0)
2167 static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT)
2169 q->setup = EZ(t->setup * 1000, T);
2170 q->act8b = EZ(t->act8b * 1000, T);
2171 q->rec8b = EZ(t->rec8b * 1000, T);
2172 q->cyc8b = EZ(t->cyc8b * 1000, T);
2173 q->active = EZ(t->active * 1000, T);
2174 q->recover = EZ(t->recover * 1000, T);
2175 q->cycle = EZ(t->cycle * 1000, T);
2176 q->udma = EZ(t->udma * 1000, UT);
2179 void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b,
2180 struct ata_timing *m, unsigned int what)
2182 if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup);
2183 if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b);
2184 if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b);
2185 if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b);
2186 if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active);
2187 if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover);
2188 if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle);
2189 if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma);
2192 static const struct ata_timing* ata_timing_find_mode(unsigned short speed)
2194 const struct ata_timing *t;
2196 for (t = ata_timing; t->mode != speed; t++)
2197 if (t->mode == 0xFF)
2202 int ata_timing_compute(struct ata_device *adev, unsigned short speed,
2203 struct ata_timing *t, int T, int UT)
2205 const struct ata_timing *s;
2206 struct ata_timing p;
2212 if (!(s = ata_timing_find_mode(speed)))
2215 memcpy(t, s, sizeof(*s));
2218 * If the drive is an EIDE drive, it can tell us it needs extended
2219 * PIO/MW_DMA cycle timing.
2222 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
2223 memset(&p, 0, sizeof(p));
2224 if(speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) {
2225 if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO];
2226 else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY];
2227 } else if(speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) {
2228 p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN];
2230 ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B);
2234 * Convert the timing to bus clock counts.
2237 ata_timing_quantize(t, t, T, UT);
2240 * Even in DMA/UDMA modes we still use PIO access for IDENTIFY,
2241 * S.M.A.R.T * and some other commands. We have to ensure that the
2242 * DMA cycle timing is slower/equal than the fastest PIO timing.
2245 if (speed > XFER_PIO_6) {
2246 ata_timing_compute(adev, adev->pio_mode, &p, T, UT);
2247 ata_timing_merge(&p, t, t, ATA_TIMING_ALL);
2251 * Lengthen active & recovery time so that cycle time is correct.
2254 if (t->act8b + t->rec8b < t->cyc8b) {
2255 t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2;
2256 t->rec8b = t->cyc8b - t->act8b;
2259 if (t->active + t->recover < t->cycle) {
2260 t->active += (t->cycle - (t->active + t->recover)) / 2;
2261 t->recover = t->cycle - t->active;
2268 * ata_down_xfermask_limit - adjust dev xfer masks downward
2269 * @dev: Device to adjust xfer masks
2270 * @force_pio0: Force PIO0
2272 * Adjust xfer masks of @dev downward. Note that this function
2273 * does not apply the change. Invoking ata_set_mode() afterwards
2274 * will apply the limit.
2277 * Inherited from caller.
2280 * 0 on success, negative errno on failure
2282 int ata_down_xfermask_limit(struct ata_device *dev, int force_pio0)
2284 unsigned long xfer_mask;
2287 xfer_mask = ata_pack_xfermask(dev->pio_mask, dev->mwdma_mask,
2292 /* don't gear down to MWDMA from UDMA, go directly to PIO */
2293 if (xfer_mask & ATA_MASK_UDMA)
2294 xfer_mask &= ~ATA_MASK_MWDMA;
2296 highbit = fls(xfer_mask) - 1;
2297 xfer_mask &= ~(1 << highbit);
2299 xfer_mask &= 1 << ATA_SHIFT_PIO;
2303 ata_unpack_xfermask(xfer_mask, &dev->pio_mask, &dev->mwdma_mask,
2306 ata_dev_printk(dev, KERN_WARNING, "limiting speed to %s\n",
2307 ata_mode_string(xfer_mask));
2315 static int ata_dev_set_mode(struct ata_device *dev)
2317 struct ata_eh_context *ehc = &dev->ap->eh_context;
2318 unsigned int err_mask;
2321 dev->flags &= ~ATA_DFLAG_PIO;
2322 if (dev->xfer_shift == ATA_SHIFT_PIO)
2323 dev->flags |= ATA_DFLAG_PIO;
2325 err_mask = ata_dev_set_xfermode(dev);
2327 ata_dev_printk(dev, KERN_ERR, "failed to set xfermode "
2328 "(err_mask=0x%x)\n", err_mask);
2332 ehc->i.flags |= ATA_EHI_POST_SETMODE;
2333 rc = ata_dev_revalidate(dev, 0);
2334 ehc->i.flags &= ~ATA_EHI_POST_SETMODE;
2338 DPRINTK("xfer_shift=%u, xfer_mode=0x%x\n",
2339 dev->xfer_shift, (int)dev->xfer_mode);
2341 ata_dev_printk(dev, KERN_INFO, "configured for %s\n",
2342 ata_mode_string(ata_xfer_mode2mask(dev->xfer_mode)));
2347 * ata_set_mode - Program timings and issue SET FEATURES - XFER
2348 * @ap: port on which timings will be programmed
2349 * @r_failed_dev: out paramter for failed device
2351 * Set ATA device disk transfer mode (PIO3, UDMA6, etc.). If
2352 * ata_set_mode() fails, pointer to the failing device is
2353 * returned in @r_failed_dev.
2356 * PCI/etc. bus probe sem.
2359 * 0 on success, negative errno otherwise
2361 int ata_set_mode(struct ata_port *ap, struct ata_device **r_failed_dev)
2363 struct ata_device *dev;
2364 int i, rc = 0, used_dma = 0, found = 0;
2366 /* has private set_mode? */
2367 if (ap->ops->set_mode)
2368 return ap->ops->set_mode(ap, r_failed_dev);
2370 /* step 1: calculate xfer_mask */
2371 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2372 unsigned int pio_mask, dma_mask;
2374 dev = &ap->device[i];
2376 if (!ata_dev_enabled(dev))
2379 ata_dev_xfermask(dev);
2381 pio_mask = ata_pack_xfermask(dev->pio_mask, 0, 0);
2382 dma_mask = ata_pack_xfermask(0, dev->mwdma_mask, dev->udma_mask);
2383 dev->pio_mode = ata_xfer_mask2mode(pio_mask);
2384 dev->dma_mode = ata_xfer_mask2mode(dma_mask);
2393 /* step 2: always set host PIO timings */
2394 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2395 dev = &ap->device[i];
2396 if (!ata_dev_enabled(dev))
2399 if (!dev->pio_mode) {
2400 ata_dev_printk(dev, KERN_WARNING, "no PIO support\n");
2405 dev->xfer_mode = dev->pio_mode;
2406 dev->xfer_shift = ATA_SHIFT_PIO;
2407 if (ap->ops->set_piomode)
2408 ap->ops->set_piomode(ap, dev);
2411 /* step 3: set host DMA timings */
2412 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2413 dev = &ap->device[i];
2415 if (!ata_dev_enabled(dev) || !dev->dma_mode)
2418 dev->xfer_mode = dev->dma_mode;
2419 dev->xfer_shift = ata_xfer_mode2shift(dev->dma_mode);
2420 if (ap->ops->set_dmamode)
2421 ap->ops->set_dmamode(ap, dev);
2424 /* step 4: update devices' xfer mode */
2425 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2426 dev = &ap->device[i];
2428 /* don't update suspended devices' xfer mode */
2429 if (!ata_dev_ready(dev))
2432 rc = ata_dev_set_mode(dev);
2437 /* Record simplex status. If we selected DMA then the other
2438 * host channels are not permitted to do so.
2440 if (used_dma && (ap->host->flags & ATA_HOST_SIMPLEX))
2441 ap->host->simplex_claimed = 1;
2443 /* step5: chip specific finalisation */
2444 if (ap->ops->post_set_mode)
2445 ap->ops->post_set_mode(ap);
2449 *r_failed_dev = dev;
2454 * ata_tf_to_host - issue ATA taskfile to host controller
2455 * @ap: port to which command is being issued
2456 * @tf: ATA taskfile register set
2458 * Issues ATA taskfile register set to ATA host controller,
2459 * with proper synchronization with interrupt handler and
2463 * spin_lock_irqsave(host lock)
2466 static inline void ata_tf_to_host(struct ata_port *ap,
2467 const struct ata_taskfile *tf)
2469 ap->ops->tf_load(ap, tf);
2470 ap->ops->exec_command(ap, tf);
2474 * ata_busy_sleep - sleep until BSY clears, or timeout
2475 * @ap: port containing status register to be polled
2476 * @tmout_pat: impatience timeout
2477 * @tmout: overall timeout
2479 * Sleep until ATA Status register bit BSY clears,
2480 * or a timeout occurs.
2483 * Kernel thread context (may sleep).
2486 * 0 on success, -errno otherwise.
2488 int ata_busy_sleep(struct ata_port *ap,
2489 unsigned long tmout_pat, unsigned long tmout)
2491 unsigned long timer_start, timeout;
2494 status = ata_busy_wait(ap, ATA_BUSY, 300);
2495 timer_start = jiffies;
2496 timeout = timer_start + tmout_pat;
2497 while (status != 0xff && (status & ATA_BUSY) &&
2498 time_before(jiffies, timeout)) {
2500 status = ata_busy_wait(ap, ATA_BUSY, 3);
2503 if (status != 0xff && (status & ATA_BUSY))
2504 ata_port_printk(ap, KERN_WARNING,
2505 "port is slow to respond, please be patient "
2506 "(Status 0x%x)\n", status);
2508 timeout = timer_start + tmout;
2509 while (status != 0xff && (status & ATA_BUSY) &&
2510 time_before(jiffies, timeout)) {
2512 status = ata_chk_status(ap);
2518 if (status & ATA_BUSY) {
2519 ata_port_printk(ap, KERN_ERR, "port failed to respond "
2520 "(%lu secs, Status 0x%x)\n",
2521 tmout / HZ, status);
2528 static void ata_bus_post_reset(struct ata_port *ap, unsigned int devmask)
2530 struct ata_ioports *ioaddr = &ap->ioaddr;
2531 unsigned int dev0 = devmask & (1 << 0);
2532 unsigned int dev1 = devmask & (1 << 1);
2533 unsigned long timeout;
2535 /* if device 0 was found in ata_devchk, wait for its
2539 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2541 /* if device 1 was found in ata_devchk, wait for
2542 * register access, then wait for BSY to clear
2544 timeout = jiffies + ATA_TMOUT_BOOT;
2548 ap->ops->dev_select(ap, 1);
2549 nsect = ioread8(ioaddr->nsect_addr);
2550 lbal = ioread8(ioaddr->lbal_addr);
2551 if ((nsect == 1) && (lbal == 1))
2553 if (time_after(jiffies, timeout)) {
2557 msleep(50); /* give drive a breather */
2560 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2562 /* is all this really necessary? */
2563 ap->ops->dev_select(ap, 0);
2565 ap->ops->dev_select(ap, 1);
2567 ap->ops->dev_select(ap, 0);
2570 static unsigned int ata_bus_softreset(struct ata_port *ap,
2571 unsigned int devmask)
2573 struct ata_ioports *ioaddr = &ap->ioaddr;
2575 DPRINTK("ata%u: bus reset via SRST\n", ap->id);
2577 /* software reset. causes dev0 to be selected */
2578 iowrite8(ap->ctl, ioaddr->ctl_addr);
2579 udelay(20); /* FIXME: flush */
2580 iowrite8(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
2581 udelay(20); /* FIXME: flush */
2582 iowrite8(ap->ctl, ioaddr->ctl_addr);
2584 /* spec mandates ">= 2ms" before checking status.
2585 * We wait 150ms, because that was the magic delay used for
2586 * ATAPI devices in Hale Landis's ATADRVR, for the period of time
2587 * between when the ATA command register is written, and then
2588 * status is checked. Because waiting for "a while" before
2589 * checking status is fine, post SRST, we perform this magic
2590 * delay here as well.
2592 * Old drivers/ide uses the 2mS rule and then waits for ready
2596 /* Before we perform post reset processing we want to see if
2597 * the bus shows 0xFF because the odd clown forgets the D7
2598 * pulldown resistor.
2600 if (ata_check_status(ap) == 0xFF)
2603 ata_bus_post_reset(ap, devmask);
2609 * ata_bus_reset - reset host port and associated ATA channel
2610 * @ap: port to reset
2612 * This is typically the first time we actually start issuing
2613 * commands to the ATA channel. We wait for BSY to clear, then
2614 * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its
2615 * result. Determine what devices, if any, are on the channel
2616 * by looking at the device 0/1 error register. Look at the signature
2617 * stored in each device's taskfile registers, to determine if
2618 * the device is ATA or ATAPI.
2621 * PCI/etc. bus probe sem.
2622 * Obtains host lock.
2625 * Sets ATA_FLAG_DISABLED if bus reset fails.
2628 void ata_bus_reset(struct ata_port *ap)
2630 struct ata_ioports *ioaddr = &ap->ioaddr;
2631 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2633 unsigned int dev0, dev1 = 0, devmask = 0;
2635 DPRINTK("ENTER, host %u, port %u\n", ap->id, ap->port_no);
2637 /* determine if device 0/1 are present */
2638 if (ap->flags & ATA_FLAG_SATA_RESET)
2641 dev0 = ata_devchk(ap, 0);
2643 dev1 = ata_devchk(ap, 1);
2647 devmask |= (1 << 0);
2649 devmask |= (1 << 1);
2651 /* select device 0 again */
2652 ap->ops->dev_select(ap, 0);
2654 /* issue bus reset */
2655 if (ap->flags & ATA_FLAG_SRST)
2656 if (ata_bus_softreset(ap, devmask))
2660 * determine by signature whether we have ATA or ATAPI devices
2662 ap->device[0].class = ata_dev_try_classify(ap, 0, &err);
2663 if ((slave_possible) && (err != 0x81))
2664 ap->device[1].class = ata_dev_try_classify(ap, 1, &err);
2666 /* re-enable interrupts */
2667 ap->ops->irq_on(ap);
2669 /* is double-select really necessary? */
2670 if (ap->device[1].class != ATA_DEV_NONE)
2671 ap->ops->dev_select(ap, 1);
2672 if (ap->device[0].class != ATA_DEV_NONE)
2673 ap->ops->dev_select(ap, 0);
2675 /* if no devices were detected, disable this port */
2676 if ((ap->device[0].class == ATA_DEV_NONE) &&
2677 (ap->device[1].class == ATA_DEV_NONE))
2680 if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) {
2681 /* set up device control for ATA_FLAG_SATA_RESET */
2682 iowrite8(ap->ctl, ioaddr->ctl_addr);
2689 ata_port_printk(ap, KERN_ERR, "disabling port\n");
2690 ap->ops->port_disable(ap);
2696 * sata_phy_debounce - debounce SATA phy status
2697 * @ap: ATA port to debounce SATA phy status for
2698 * @params: timing parameters { interval, duratinon, timeout } in msec
2700 * Make sure SStatus of @ap reaches stable state, determined by
2701 * holding the same value where DET is not 1 for @duration polled
2702 * every @interval, before @timeout. Timeout constraints the
2703 * beginning of the stable state. Because, after hot unplugging,
2704 * DET gets stuck at 1 on some controllers, this functions waits
2705 * until timeout then returns 0 if DET is stable at 1.
2708 * Kernel thread context (may sleep)
2711 * 0 on success, -errno on failure.
2713 int sata_phy_debounce(struct ata_port *ap, const unsigned long *params)
2715 unsigned long interval_msec = params[0];
2716 unsigned long duration = params[1] * HZ / 1000;
2717 unsigned long timeout = jiffies + params[2] * HZ / 1000;
2718 unsigned long last_jiffies;
2722 if ((rc = sata_scr_read(ap, SCR_STATUS, &cur)))
2727 last_jiffies = jiffies;
2730 msleep(interval_msec);
2731 if ((rc = sata_scr_read(ap, SCR_STATUS, &cur)))
2737 if (cur == 1 && time_before(jiffies, timeout))
2739 if (time_after(jiffies, last_jiffies + duration))
2744 /* unstable, start over */
2746 last_jiffies = jiffies;
2749 if (time_after(jiffies, timeout))
2755 * sata_phy_resume - resume SATA phy
2756 * @ap: ATA port to resume SATA phy for
2757 * @params: timing parameters { interval, duratinon, timeout } in msec
2759 * Resume SATA phy of @ap and debounce it.
2762 * Kernel thread context (may sleep)
2765 * 0 on success, -errno on failure.
2767 int sata_phy_resume(struct ata_port *ap, const unsigned long *params)
2772 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
2775 scontrol = (scontrol & 0x0f0) | 0x300;
2777 if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol)))
2780 /* Some PHYs react badly if SStatus is pounded immediately
2781 * after resuming. Delay 200ms before debouncing.
2785 return sata_phy_debounce(ap, params);
2788 static void ata_wait_spinup(struct ata_port *ap)
2790 struct ata_eh_context *ehc = &ap->eh_context;
2791 unsigned long end, secs;
2794 /* first, debounce phy if SATA */
2795 if (ap->cbl == ATA_CBL_SATA) {
2796 rc = sata_phy_debounce(ap, sata_deb_timing_hotplug);
2798 /* if debounced successfully and offline, no need to wait */
2799 if ((rc == 0 || rc == -EOPNOTSUPP) && ata_port_offline(ap))
2803 /* okay, let's give the drive time to spin up */
2804 end = ehc->i.hotplug_timestamp + ATA_SPINUP_WAIT * HZ / 1000;
2805 secs = ((end - jiffies) + HZ - 1) / HZ;
2807 if (time_after(jiffies, end))
2811 ata_port_printk(ap, KERN_INFO, "waiting for device to spin up "
2812 "(%lu secs)\n", secs);
2814 schedule_timeout_uninterruptible(end - jiffies);
2818 * ata_std_prereset - prepare for reset
2819 * @ap: ATA port to be reset
2821 * @ap is about to be reset. Initialize it.
2824 * Kernel thread context (may sleep)
2827 * 0 on success, -errno otherwise.
2829 int ata_std_prereset(struct ata_port *ap)
2831 struct ata_eh_context *ehc = &ap->eh_context;
2832 const unsigned long *timing = sata_ehc_deb_timing(ehc);
2835 /* handle link resume & hotplug spinup */
2836 if ((ehc->i.flags & ATA_EHI_RESUME_LINK) &&
2837 (ap->flags & ATA_FLAG_HRST_TO_RESUME))
2838 ehc->i.action |= ATA_EH_HARDRESET;
2840 if ((ehc->i.flags & ATA_EHI_HOTPLUGGED) &&
2841 (ap->flags & ATA_FLAG_SKIP_D2H_BSY))
2842 ata_wait_spinup(ap);
2844 /* if we're about to do hardreset, nothing more to do */
2845 if (ehc->i.action & ATA_EH_HARDRESET)
2848 /* if SATA, resume phy */
2849 if (ap->cbl == ATA_CBL_SATA) {
2850 rc = sata_phy_resume(ap, timing);
2851 if (rc && rc != -EOPNOTSUPP) {
2852 /* phy resume failed */
2853 ata_port_printk(ap, KERN_WARNING, "failed to resume "
2854 "link for reset (errno=%d)\n", rc);
2859 /* Wait for !BSY if the controller can wait for the first D2H
2860 * Reg FIS and we don't know that no device is attached.
2862 if (!(ap->flags & ATA_FLAG_SKIP_D2H_BSY) && !ata_port_offline(ap))
2863 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2869 * ata_std_softreset - reset host port via ATA SRST
2870 * @ap: port to reset
2871 * @classes: resulting classes of attached devices
2873 * Reset host port using ATA SRST.
2876 * Kernel thread context (may sleep)
2879 * 0 on success, -errno otherwise.
2881 int ata_std_softreset(struct ata_port *ap, unsigned int *classes)
2883 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2884 unsigned int devmask = 0, err_mask;
2889 if (ata_port_offline(ap)) {
2890 classes[0] = ATA_DEV_NONE;
2894 /* determine if device 0/1 are present */
2895 if (ata_devchk(ap, 0))
2896 devmask |= (1 << 0);
2897 if (slave_possible && ata_devchk(ap, 1))
2898 devmask |= (1 << 1);
2900 /* select device 0 again */
2901 ap->ops->dev_select(ap, 0);
2903 /* issue bus reset */
2904 DPRINTK("about to softreset, devmask=%x\n", devmask);
2905 err_mask = ata_bus_softreset(ap, devmask);
2907 ata_port_printk(ap, KERN_ERR, "SRST failed (err_mask=0x%x)\n",
2912 /* determine by signature whether we have ATA or ATAPI devices */
2913 classes[0] = ata_dev_try_classify(ap, 0, &err);
2914 if (slave_possible && err != 0x81)
2915 classes[1] = ata_dev_try_classify(ap, 1, &err);
2918 DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]);
2923 * sata_port_hardreset - reset port via SATA phy reset
2924 * @ap: port to reset
2925 * @timing: timing parameters { interval, duratinon, timeout } in msec
2927 * SATA phy-reset host port using DET bits of SControl register.
2930 * Kernel thread context (may sleep)
2933 * 0 on success, -errno otherwise.
2935 int sata_port_hardreset(struct ata_port *ap, const unsigned long *timing)
2942 if (sata_set_spd_needed(ap)) {
2943 /* SATA spec says nothing about how to reconfigure
2944 * spd. To be on the safe side, turn off phy during
2945 * reconfiguration. This works for at least ICH7 AHCI
2948 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
2951 scontrol = (scontrol & 0x0f0) | 0x304;
2953 if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol)))
2959 /* issue phy wake/reset */
2960 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
2963 scontrol = (scontrol & 0x0f0) | 0x301;
2965 if ((rc = sata_scr_write_flush(ap, SCR_CONTROL, scontrol)))
2968 /* Couldn't find anything in SATA I/II specs, but AHCI-1.1
2969 * 10.4.2 says at least 1 ms.
2973 /* bring phy back */
2974 rc = sata_phy_resume(ap, timing);
2976 DPRINTK("EXIT, rc=%d\n", rc);
2981 * sata_std_hardreset - reset host port via SATA phy reset
2982 * @ap: port to reset
2983 * @class: resulting class of attached device
2985 * SATA phy-reset host port using DET bits of SControl register,
2986 * wait for !BSY and classify the attached device.
2989 * Kernel thread context (may sleep)
2992 * 0 on success, -errno otherwise.
2994 int sata_std_hardreset(struct ata_port *ap, unsigned int *class)
2996 const unsigned long *timing = sata_ehc_deb_timing(&ap->eh_context);
3002 rc = sata_port_hardreset(ap, timing);
3004 ata_port_printk(ap, KERN_ERR,
3005 "COMRESET failed (errno=%d)\n", rc);
3009 /* TODO: phy layer with polling, timeouts, etc. */
3010 if (ata_port_offline(ap)) {
3011 *class = ATA_DEV_NONE;
3012 DPRINTK("EXIT, link offline\n");
3016 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
3017 ata_port_printk(ap, KERN_ERR,
3018 "COMRESET failed (device not ready)\n");
3022 ap->ops->dev_select(ap, 0); /* probably unnecessary */
3024 *class = ata_dev_try_classify(ap, 0, NULL);
3026 DPRINTK("EXIT, class=%u\n", *class);
3031 * ata_std_postreset - standard postreset callback
3032 * @ap: the target ata_port
3033 * @classes: classes of attached devices
3035 * This function is invoked after a successful reset. Note that
3036 * the device might have been reset more than once using
3037 * different reset methods before postreset is invoked.
3040 * Kernel thread context (may sleep)
3042 void ata_std_postreset(struct ata_port *ap, unsigned int *classes)
3048 /* print link status */
3049 sata_print_link_status(ap);
3052 if (sata_scr_read(ap, SCR_ERROR, &serror) == 0)
3053 sata_scr_write(ap, SCR_ERROR, serror);
3055 /* re-enable interrupts */
3056 if (!ap->ops->error_handler)
3057 ap->ops->irq_on(ap);
3059 /* is double-select really necessary? */
3060 if (classes[0] != ATA_DEV_NONE)
3061 ap->ops->dev_select(ap, 1);
3062 if (classes[1] != ATA_DEV_NONE)
3063 ap->ops->dev_select(ap, 0);
3065 /* bail out if no device is present */
3066 if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) {
3067 DPRINTK("EXIT, no device\n");
3071 /* set up device control */
3072 if (ap->ioaddr.ctl_addr)
3073 iowrite8(ap->ctl, ap->ioaddr.ctl_addr);
3079 * ata_dev_same_device - Determine whether new ID matches configured device
3080 * @dev: device to compare against
3081 * @new_class: class of the new device
3082 * @new_id: IDENTIFY page of the new device
3084 * Compare @new_class and @new_id against @dev and determine
3085 * whether @dev is the device indicated by @new_class and
3092 * 1 if @dev matches @new_class and @new_id, 0 otherwise.
3094 static int ata_dev_same_device(struct ata_device *dev, unsigned int new_class,
3097 const u16 *old_id = dev->id;
3098 unsigned char model[2][ATA_ID_PROD_LEN + 1];
3099 unsigned char serial[2][ATA_ID_SERNO_LEN + 1];
3102 if (dev->class != new_class) {
3103 ata_dev_printk(dev, KERN_INFO, "class mismatch %d != %d\n",
3104 dev->class, new_class);
3108 ata_id_c_string(old_id, model[0], ATA_ID_PROD, sizeof(model[0]));
3109 ata_id_c_string(new_id, model[1], ATA_ID_PROD, sizeof(model[1]));
3110 ata_id_c_string(old_id, serial[0], ATA_ID_SERNO, sizeof(serial[0]));
3111 ata_id_c_string(new_id, serial[1], ATA_ID_SERNO, sizeof(serial[1]));
3112 new_n_sectors = ata_id_n_sectors(new_id);
3114 if (strcmp(model[0], model[1])) {
3115 ata_dev_printk(dev, KERN_INFO, "model number mismatch "
3116 "'%s' != '%s'\n", model[0], model[1]);
3120 if (strcmp(serial[0], serial[1])) {
3121 ata_dev_printk(dev, KERN_INFO, "serial number mismatch "
3122 "'%s' != '%s'\n", serial[0], serial[1]);
3126 if (dev->class == ATA_DEV_ATA && dev->n_sectors != new_n_sectors) {
3127 ata_dev_printk(dev, KERN_INFO, "n_sectors mismatch "
3129 (unsigned long long)dev->n_sectors,
3130 (unsigned long long)new_n_sectors);
3138 * ata_dev_revalidate - Revalidate ATA device
3139 * @dev: device to revalidate
3140 * @readid_flags: read ID flags
3142 * Re-read IDENTIFY page and make sure @dev is still attached to
3146 * Kernel thread context (may sleep)
3149 * 0 on success, negative errno otherwise
3151 int ata_dev_revalidate(struct ata_device *dev, unsigned int readid_flags)
3153 unsigned int class = dev->class;
3154 u16 *id = (void *)dev->ap->sector_buf;
3157 if (!ata_dev_enabled(dev)) {
3163 rc = ata_dev_read_id(dev, &class, readid_flags, id);
3167 /* is the device still there? */
3168 if (!ata_dev_same_device(dev, class, id)) {
3173 memcpy(dev->id, id, sizeof(id[0]) * ATA_ID_WORDS);
3175 /* configure device according to the new ID */
3176 rc = ata_dev_configure(dev);
3181 ata_dev_printk(dev, KERN_ERR, "revalidation failed (errno=%d)\n", rc);
3185 struct ata_blacklist_entry {
3186 const char *model_num;
3187 const char *model_rev;
3188 unsigned long horkage;
3191 static const struct ata_blacklist_entry ata_device_blacklist [] = {
3192 /* Devices with DMA related problems under Linux */
3193 { "WDC AC11000H", NULL, ATA_HORKAGE_NODMA },
3194 { "WDC AC22100H", NULL, ATA_HORKAGE_NODMA },
3195 { "WDC AC32500H", NULL, ATA_HORKAGE_NODMA },
3196 { "WDC AC33100H", NULL, ATA_HORKAGE_NODMA },
3197 { "WDC AC31600H", NULL, ATA_HORKAGE_NODMA },
3198 { "WDC AC32100H", "24.09P07", ATA_HORKAGE_NODMA },
3199 { "WDC AC23200L", "21.10N21", ATA_HORKAGE_NODMA },
3200 { "Compaq CRD-8241B", NULL, ATA_HORKAGE_NODMA },
3201 { "CRD-8400B", NULL, ATA_HORKAGE_NODMA },
3202 { "CRD-8480B", NULL, ATA_HORKAGE_NODMA },
3203 { "CRD-8482B", NULL, ATA_HORKAGE_NODMA },
3204 { "CRD-84", NULL, ATA_HORKAGE_NODMA },
3205 { "SanDisk SDP3B", NULL, ATA_HORKAGE_NODMA },
3206 { "SanDisk SDP3B-64", NULL, ATA_HORKAGE_NODMA },
3207 { "SANYO CD-ROM CRD", NULL, ATA_HORKAGE_NODMA },
3208 { "HITACHI CDR-8", NULL, ATA_HORKAGE_NODMA },
3209 { "HITACHI CDR-8335", NULL, ATA_HORKAGE_NODMA },
3210 { "HITACHI CDR-8435", NULL, ATA_HORKAGE_NODMA },
3211 { "Toshiba CD-ROM XM-6202B", NULL, ATA_HORKAGE_NODMA },
3212 { "TOSHIBA CD-ROM XM-1702BC", NULL, ATA_HORKAGE_NODMA },
3213 { "CD-532E-A", NULL, ATA_HORKAGE_NODMA },
3214 { "E-IDE CD-ROM CR-840",NULL, ATA_HORKAGE_NODMA },
3215 { "CD-ROM Drive/F5A", NULL, ATA_HORKAGE_NODMA },
3216 { "WPI CDD-820", NULL, ATA_HORKAGE_NODMA },
3217 { "SAMSUNG CD-ROM SC-148C", NULL, ATA_HORKAGE_NODMA },
3218 { "SAMSUNG CD-ROM SC", NULL, ATA_HORKAGE_NODMA },
3219 { "SanDisk SDP3B-64", NULL, ATA_HORKAGE_NODMA },
3220 { "ATAPI CD-ROM DRIVE 40X MAXIMUM",NULL,ATA_HORKAGE_NODMA },
3221 { "_NEC DV5800A", NULL, ATA_HORKAGE_NODMA },
3222 { "SAMSUNG CD-ROM SN-124","N001", ATA_HORKAGE_NODMA },
3224 /* Devices we expect to fail diagnostics */
3226 /* Devices where NCQ should be avoided */
3228 { "WDC WD740ADFD-00", NULL, ATA_HORKAGE_NONCQ },
3230 /* Devices with NCQ limits */
3236 unsigned long ata_device_blacklisted(const struct ata_device *dev)
3238 unsigned char model_num[ATA_ID_PROD_LEN + 1];
3239 unsigned char model_rev[ATA_ID_FW_REV_LEN + 1];
3240 const struct ata_blacklist_entry *ad = ata_device_blacklist;
3242 ata_id_c_string(dev->id, model_num, ATA_ID_PROD, sizeof(model_num));
3243 ata_id_c_string(dev->id, model_rev, ATA_ID_FW_REV, sizeof(model_rev));
3245 while (ad->model_num) {
3246 if (!strcmp(ad->model_num, model_num)) {
3247 if (ad->model_rev == NULL)
3249 if (!strcmp(ad->model_rev, model_rev))
3257 static int ata_dma_blacklisted(const struct ata_device *dev)
3259 /* We don't support polling DMA.
3260 * DMA blacklist those ATAPI devices with CDB-intr (and use PIO)
3261 * if the LLDD handles only interrupts in the HSM_ST_LAST state.
3263 if ((dev->ap->flags & ATA_FLAG_PIO_POLLING) &&
3264 (dev->flags & ATA_DFLAG_CDB_INTR))
3266 return (ata_device_blacklisted(dev) & ATA_HORKAGE_NODMA) ? 1 : 0;
3270 * ata_dev_xfermask - Compute supported xfermask of the given device
3271 * @dev: Device to compute xfermask for
3273 * Compute supported xfermask of @dev and store it in
3274 * dev->*_mask. This function is responsible for applying all
3275 * known limits including host controller limits, device
3281 static void ata_dev_xfermask(struct ata_device *dev)
3283 struct ata_port *ap = dev->ap;
3284 struct ata_host *host = ap->host;
3285 unsigned long xfer_mask;
3287 /* controller modes available */
3288 xfer_mask = ata_pack_xfermask(ap->pio_mask,
3289 ap->mwdma_mask, ap->udma_mask);
3291 /* Apply cable rule here. Don't apply it early because when
3292 * we handle hot plug the cable type can itself change.
3294 if (ap->cbl == ATA_CBL_PATA40)
3295 xfer_mask &= ~(0xF8 << ATA_SHIFT_UDMA);
3296 /* Apply drive side cable rule. Unknown or 80 pin cables reported
3297 * host side are checked drive side as well. Cases where we know a
3298 * 40wire cable is used safely for 80 are not checked here.
3300 if (ata_drive_40wire(dev->id) && (ap->cbl == ATA_CBL_PATA_UNK || ap->cbl == ATA_CBL_PATA80))
3301 xfer_mask &= ~(0xF8 << ATA_SHIFT_UDMA);
3304 xfer_mask &= ata_pack_xfermask(dev->pio_mask,
3305 dev->mwdma_mask, dev->udma_mask);
3306 xfer_mask &= ata_id_xfermask(dev->id);
3309 * CFA Advanced TrueIDE timings are not allowed on a shared
3312 if (ata_dev_pair(dev)) {
3313 /* No PIO5 or PIO6 */
3314 xfer_mask &= ~(0x03 << (ATA_SHIFT_PIO + 5));
3315 /* No MWDMA3 or MWDMA 4 */
3316 xfer_mask &= ~(0x03 << (ATA_SHIFT_MWDMA + 3));
3319 if (ata_dma_blacklisted(dev)) {
3320 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
3321 ata_dev_printk(dev, KERN_WARNING,
3322 "device is on DMA blacklist, disabling DMA\n");
3325 if ((host->flags & ATA_HOST_SIMPLEX) && host->simplex_claimed) {
3326 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
3327 ata_dev_printk(dev, KERN_WARNING, "simplex DMA is claimed by "
3328 "other device, disabling DMA\n");
3331 if (ap->ops->mode_filter)
3332 xfer_mask = ap->ops->mode_filter(ap, dev, xfer_mask);
3334 ata_unpack_xfermask(xfer_mask, &dev->pio_mask,
3335 &dev->mwdma_mask, &dev->udma_mask);
3339 * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command
3340 * @dev: Device to which command will be sent
3342 * Issue SET FEATURES - XFER MODE command to device @dev
3346 * PCI/etc. bus probe sem.
3349 * 0 on success, AC_ERR_* mask otherwise.
3352 static unsigned int ata_dev_set_xfermode(struct ata_device *dev)
3354 struct ata_taskfile tf;
3355 unsigned int err_mask;
3357 /* set up set-features taskfile */
3358 DPRINTK("set features - xfer mode\n");
3360 ata_tf_init(dev, &tf);
3361 tf.command = ATA_CMD_SET_FEATURES;
3362 tf.feature = SETFEATURES_XFER;
3363 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
3364 tf.protocol = ATA_PROT_NODATA;
3365 tf.nsect = dev->xfer_mode;
3367 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
3369 DPRINTK("EXIT, err_mask=%x\n", err_mask);
3374 * ata_dev_init_params - Issue INIT DEV PARAMS command
3375 * @dev: Device to which command will be sent
3376 * @heads: Number of heads (taskfile parameter)
3377 * @sectors: Number of sectors (taskfile parameter)
3380 * Kernel thread context (may sleep)
3383 * 0 on success, AC_ERR_* mask otherwise.
3385 static unsigned int ata_dev_init_params(struct ata_device *dev,
3386 u16 heads, u16 sectors)
3388 struct ata_taskfile tf;
3389 unsigned int err_mask;
3391 /* Number of sectors per track 1-255. Number of heads 1-16 */
3392 if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16)
3393 return AC_ERR_INVALID;
3395 /* set up init dev params taskfile */
3396 DPRINTK("init dev params \n");
3398 ata_tf_init(dev, &tf);
3399 tf.command = ATA_CMD_INIT_DEV_PARAMS;
3400 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
3401 tf.protocol = ATA_PROT_NODATA;
3403 tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */
3405 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
3407 DPRINTK("EXIT, err_mask=%x\n", err_mask);
3412 * ata_sg_clean - Unmap DMA memory associated with command
3413 * @qc: Command containing DMA memory to be released
3415 * Unmap all mapped DMA memory associated with this command.
3418 * spin_lock_irqsave(host lock)
3420 void ata_sg_clean(struct ata_queued_cmd *qc)
3422 struct ata_port *ap = qc->ap;
3423 struct scatterlist *sg = qc->__sg;
3424 int dir = qc->dma_dir;
3425 void *pad_buf = NULL;
3427 WARN_ON(!(qc->flags & ATA_QCFLAG_DMAMAP));
3428 WARN_ON(sg == NULL);
3430 if (qc->flags & ATA_QCFLAG_SINGLE)
3431 WARN_ON(qc->n_elem > 1);
3433 VPRINTK("unmapping %u sg elements\n", qc->n_elem);
3435 /* if we padded the buffer out to 32-bit bound, and data
3436 * xfer direction is from-device, we must copy from the
3437 * pad buffer back into the supplied buffer
3439 if (qc->pad_len && !(qc->tf.flags & ATA_TFLAG_WRITE))
3440 pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3442 if (qc->flags & ATA_QCFLAG_SG) {
3444 dma_unmap_sg(ap->dev, sg, qc->n_elem, dir);
3445 /* restore last sg */
3446 sg[qc->orig_n_elem - 1].length += qc->pad_len;
3448 struct scatterlist *psg = &qc->pad_sgent;
3449 void *addr = kmap_atomic(psg->page, KM_IRQ0);
3450 memcpy(addr + psg->offset, pad_buf, qc->pad_len);
3451 kunmap_atomic(addr, KM_IRQ0);
3455 dma_unmap_single(ap->dev,
3456 sg_dma_address(&sg[0]), sg_dma_len(&sg[0]),
3459 sg->length += qc->pad_len;
3461 memcpy(qc->buf_virt + sg->length - qc->pad_len,
3462 pad_buf, qc->pad_len);
3465 qc->flags &= ~ATA_QCFLAG_DMAMAP;
3470 * ata_fill_sg - Fill PCI IDE PRD table
3471 * @qc: Metadata associated with taskfile to be transferred
3473 * Fill PCI IDE PRD (scatter-gather) table with segments
3474 * associated with the current disk command.
3477 * spin_lock_irqsave(host lock)
3480 static void ata_fill_sg(struct ata_queued_cmd *qc)
3482 struct ata_port *ap = qc->ap;
3483 struct scatterlist *sg;
3486 WARN_ON(qc->__sg == NULL);
3487 WARN_ON(qc->n_elem == 0 && qc->pad_len == 0);
3490 ata_for_each_sg(sg, qc) {
3494 /* determine if physical DMA addr spans 64K boundary.
3495 * Note h/w doesn't support 64-bit, so we unconditionally
3496 * truncate dma_addr_t to u32.
3498 addr = (u32) sg_dma_address(sg);
3499 sg_len = sg_dma_len(sg);
3502 offset = addr & 0xffff;
3504 if ((offset + sg_len) > 0x10000)
3505 len = 0x10000 - offset;
3507 ap->prd[idx].addr = cpu_to_le32(addr);
3508 ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff);
3509 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
3518 ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
3521 * ata_check_atapi_dma - Check whether ATAPI DMA can be supported
3522 * @qc: Metadata associated with taskfile to check
3524 * Allow low-level driver to filter ATA PACKET commands, returning
3525 * a status indicating whether or not it is OK to use DMA for the
3526 * supplied PACKET command.
3529 * spin_lock_irqsave(host lock)
3531 * RETURNS: 0 when ATAPI DMA can be used
3534 int ata_check_atapi_dma(struct ata_queued_cmd *qc)
3536 struct ata_port *ap = qc->ap;
3537 int rc = 0; /* Assume ATAPI DMA is OK by default */
3539 if (ap->ops->check_atapi_dma)
3540 rc = ap->ops->check_atapi_dma(qc);
3545 * ata_qc_prep - Prepare taskfile for submission
3546 * @qc: Metadata associated with taskfile to be prepared
3548 * Prepare ATA taskfile for submission.
3551 * spin_lock_irqsave(host lock)
3553 void ata_qc_prep(struct ata_queued_cmd *qc)
3555 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
3561 void ata_noop_qc_prep(struct ata_queued_cmd *qc) { }
3564 * ata_sg_init_one - Associate command with memory buffer
3565 * @qc: Command to be associated
3566 * @buf: Memory buffer
3567 * @buflen: Length of memory buffer, in bytes.
3569 * Initialize the data-related elements of queued_cmd @qc
3570 * to point to a single memory buffer, @buf of byte length @buflen.
3573 * spin_lock_irqsave(host lock)
3576 void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen)
3578 qc->flags |= ATA_QCFLAG_SINGLE;
3580 qc->__sg = &qc->sgent;
3582 qc->orig_n_elem = 1;
3584 qc->nbytes = buflen;
3586 sg_init_one(&qc->sgent, buf, buflen);
3590 * ata_sg_init - Associate command with scatter-gather table.
3591 * @qc: Command to be associated
3592 * @sg: Scatter-gather table.
3593 * @n_elem: Number of elements in s/g table.
3595 * Initialize the data-related elements of queued_cmd @qc
3596 * to point to a scatter-gather table @sg, containing @n_elem
3600 * spin_lock_irqsave(host lock)
3603 void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
3604 unsigned int n_elem)
3606 qc->flags |= ATA_QCFLAG_SG;
3608 qc->n_elem = n_elem;
3609 qc->orig_n_elem = n_elem;
3613 * ata_sg_setup_one - DMA-map the memory buffer associated with a command.
3614 * @qc: Command with memory buffer to be mapped.
3616 * DMA-map the memory buffer associated with queued_cmd @qc.
3619 * spin_lock_irqsave(host lock)
3622 * Zero on success, negative on error.
3625 static int ata_sg_setup_one(struct ata_queued_cmd *qc)
3627 struct ata_port *ap = qc->ap;
3628 int dir = qc->dma_dir;
3629 struct scatterlist *sg = qc->__sg;
3630 dma_addr_t dma_address;
3633 /* we must lengthen transfers to end on a 32-bit boundary */
3634 qc->pad_len = sg->length & 3;
3636 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3637 struct scatterlist *psg = &qc->pad_sgent;
3639 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
3641 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
3643 if (qc->tf.flags & ATA_TFLAG_WRITE)
3644 memcpy(pad_buf, qc->buf_virt + sg->length - qc->pad_len,
3647 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
3648 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
3650 sg->length -= qc->pad_len;
3651 if (sg->length == 0)
3654 DPRINTK("padding done, sg->length=%u pad_len=%u\n",
3655 sg->length, qc->pad_len);
3663 dma_address = dma_map_single(ap->dev, qc->buf_virt,
3665 if (dma_mapping_error(dma_address)) {
3667 sg->length += qc->pad_len;
3671 sg_dma_address(sg) = dma_address;
3672 sg_dma_len(sg) = sg->length;
3675 DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg),
3676 qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3682 * ata_sg_setup - DMA-map the scatter-gather table associated with a command.
3683 * @qc: Command with scatter-gather table to be mapped.
3685 * DMA-map the scatter-gather table associated with queued_cmd @qc.
3688 * spin_lock_irqsave(host lock)
3691 * Zero on success, negative on error.
3695 static int ata_sg_setup(struct ata_queued_cmd *qc)
3697 struct ata_port *ap = qc->ap;
3698 struct scatterlist *sg = qc->__sg;
3699 struct scatterlist *lsg = &sg[qc->n_elem - 1];
3700 int n_elem, pre_n_elem, dir, trim_sg = 0;
3702 VPRINTK("ENTER, ata%u\n", ap->id);
3703 WARN_ON(!(qc->flags & ATA_QCFLAG_SG));
3705 /* we must lengthen transfers to end on a 32-bit boundary */
3706 qc->pad_len = lsg->length & 3;
3708 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3709 struct scatterlist *psg = &qc->pad_sgent;
3710 unsigned int offset;
3712 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
3714 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
3717 * psg->page/offset are used to copy to-be-written
3718 * data in this function or read data in ata_sg_clean.
3720 offset = lsg->offset + lsg->length - qc->pad_len;
3721 psg->page = nth_page(lsg->page, offset >> PAGE_SHIFT);
3722 psg->offset = offset_in_page(offset);
3724 if (qc->tf.flags & ATA_TFLAG_WRITE) {
3725 void *addr = kmap_atomic(psg->page, KM_IRQ0);
3726 memcpy(pad_buf, addr + psg->offset, qc->pad_len);
3727 kunmap_atomic(addr, KM_IRQ0);
3730 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
3731 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
3733 lsg->length -= qc->pad_len;
3734 if (lsg->length == 0)
3737 DPRINTK("padding done, sg[%d].length=%u pad_len=%u\n",
3738 qc->n_elem - 1, lsg->length, qc->pad_len);
3741 pre_n_elem = qc->n_elem;
3742 if (trim_sg && pre_n_elem)
3751 n_elem = dma_map_sg(ap->dev, sg, pre_n_elem, dir);
3753 /* restore last sg */
3754 lsg->length += qc->pad_len;
3758 DPRINTK("%d sg elements mapped\n", n_elem);
3761 qc->n_elem = n_elem;
3767 * swap_buf_le16 - swap halves of 16-bit words in place
3768 * @buf: Buffer to swap
3769 * @buf_words: Number of 16-bit words in buffer.
3771 * Swap halves of 16-bit words if needed to convert from
3772 * little-endian byte order to native cpu byte order, or
3776 * Inherited from caller.
3778 void swap_buf_le16(u16 *buf, unsigned int buf_words)
3783 for (i = 0; i < buf_words; i++)
3784 buf[i] = le16_to_cpu(buf[i]);
3785 #endif /* __BIG_ENDIAN */
3789 * ata_data_xfer - Transfer data by PIO
3790 * @adev: device to target
3792 * @buflen: buffer length
3793 * @write_data: read/write
3795 * Transfer data from/to the device data register by PIO.
3798 * Inherited from caller.
3800 void ata_data_xfer(struct ata_device *adev, unsigned char *buf,
3801 unsigned int buflen, int write_data)
3803 struct ata_port *ap = adev->ap;
3804 unsigned int words = buflen >> 1;
3806 /* Transfer multiple of 2 bytes */
3808 iowrite16_rep(ap->ioaddr.data_addr, buf, words);
3810 ioread16_rep(ap->ioaddr.data_addr, buf, words);
3812 /* Transfer trailing 1 byte, if any. */
3813 if (unlikely(buflen & 0x01)) {
3814 u16 align_buf[1] = { 0 };
3815 unsigned char *trailing_buf = buf + buflen - 1;
3818 memcpy(align_buf, trailing_buf, 1);
3819 iowrite16(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr);
3821 align_buf[0] = cpu_to_le16(ioread16(ap->ioaddr.data_addr));
3822 memcpy(trailing_buf, align_buf, 1);
3828 * ata_data_xfer_noirq - Transfer data by PIO
3829 * @adev: device to target
3831 * @buflen: buffer length
3832 * @write_data: read/write
3834 * Transfer data from/to the device data register by PIO. Do the
3835 * transfer with interrupts disabled.
3838 * Inherited from caller.
3840 void ata_data_xfer_noirq(struct ata_device *adev, unsigned char *buf,
3841 unsigned int buflen, int write_data)
3843 unsigned long flags;
3844 local_irq_save(flags);
3845 ata_data_xfer(adev, buf, buflen, write_data);
3846 local_irq_restore(flags);
3851 * ata_pio_sector - Transfer ATA_SECT_SIZE (512 bytes) of data.
3852 * @qc: Command on going
3854 * Transfer ATA_SECT_SIZE of data from/to the ATA device.
3857 * Inherited from caller.
3860 static void ata_pio_sector(struct ata_queued_cmd *qc)
3862 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
3863 struct scatterlist *sg = qc->__sg;
3864 struct ata_port *ap = qc->ap;
3866 unsigned int offset;
3869 if (qc->curbytes == qc->nbytes - ATA_SECT_SIZE)
3870 ap->hsm_task_state = HSM_ST_LAST;
3872 page = sg[qc->cursg].page;
3873 offset = sg[qc->cursg].offset + qc->cursg_ofs;
3875 /* get the current page and offset */
3876 page = nth_page(page, (offset >> PAGE_SHIFT));
3877 offset %= PAGE_SIZE;
3879 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3881 if (PageHighMem(page)) {
3882 unsigned long flags;
3884 /* FIXME: use a bounce buffer */
3885 local_irq_save(flags);
3886 buf = kmap_atomic(page, KM_IRQ0);
3888 /* do the actual data transfer */
3889 ap->ops->data_xfer(qc->dev, buf + offset, ATA_SECT_SIZE, do_write);
3891 kunmap_atomic(buf, KM_IRQ0);
3892 local_irq_restore(flags);
3894 buf = page_address(page);
3895 ap->ops->data_xfer(qc->dev, buf + offset, ATA_SECT_SIZE, do_write);
3898 qc->curbytes += ATA_SECT_SIZE;
3899 qc->cursg_ofs += ATA_SECT_SIZE;
3901 if (qc->cursg_ofs == (&sg[qc->cursg])->length) {
3908 * ata_pio_sectors - Transfer one or many 512-byte sectors.
3909 * @qc: Command on going
3911 * Transfer one or many ATA_SECT_SIZE of data from/to the
3912 * ATA device for the DRQ request.
3915 * Inherited from caller.
3918 static void ata_pio_sectors(struct ata_queued_cmd *qc)
3920 if (is_multi_taskfile(&qc->tf)) {
3921 /* READ/WRITE MULTIPLE */
3924 WARN_ON(qc->dev->multi_count == 0);
3926 nsect = min((qc->nbytes - qc->curbytes) / ATA_SECT_SIZE,
3927 qc->dev->multi_count);
3935 * atapi_send_cdb - Write CDB bytes to hardware
3936 * @ap: Port to which ATAPI device is attached.
3937 * @qc: Taskfile currently active
3939 * When device has indicated its readiness to accept
3940 * a CDB, this function is called. Send the CDB.
3946 static void atapi_send_cdb(struct ata_port *ap, struct ata_queued_cmd *qc)
3949 DPRINTK("send cdb\n");
3950 WARN_ON(qc->dev->cdb_len < 12);
3952 ap->ops->data_xfer(qc->dev, qc->cdb, qc->dev->cdb_len, 1);
3953 ata_altstatus(ap); /* flush */
3955 switch (qc->tf.protocol) {
3956 case ATA_PROT_ATAPI:
3957 ap->hsm_task_state = HSM_ST;
3959 case ATA_PROT_ATAPI_NODATA:
3960 ap->hsm_task_state = HSM_ST_LAST;
3962 case ATA_PROT_ATAPI_DMA:
3963 ap->hsm_task_state = HSM_ST_LAST;
3964 /* initiate bmdma */
3965 ap->ops->bmdma_start(qc);
3971 * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
3972 * @qc: Command on going
3973 * @bytes: number of bytes
3975 * Transfer Transfer data from/to the ATAPI device.
3978 * Inherited from caller.
3982 static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
3984 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
3985 struct scatterlist *sg = qc->__sg;
3986 struct ata_port *ap = qc->ap;
3989 unsigned int offset, count;
3991 if (qc->curbytes + bytes >= qc->nbytes)
3992 ap->hsm_task_state = HSM_ST_LAST;
3995 if (unlikely(qc->cursg >= qc->n_elem)) {
3997 * The end of qc->sg is reached and the device expects
3998 * more data to transfer. In order not to overrun qc->sg
3999 * and fulfill length specified in the byte count register,
4000 * - for read case, discard trailing data from the device
4001 * - for write case, padding zero data to the device
4003 u16 pad_buf[1] = { 0 };
4004 unsigned int words = bytes >> 1;
4007 if (words) /* warning if bytes > 1 */
4008 ata_dev_printk(qc->dev, KERN_WARNING,
4009 "%u bytes trailing data\n", bytes);
4011 for (i = 0; i < words; i++)
4012 ap->ops->data_xfer(qc->dev, (unsigned char*)pad_buf, 2, do_write);
4014 ap->hsm_task_state = HSM_ST_LAST;
4018 sg = &qc->__sg[qc->cursg];
4021 offset = sg->offset + qc->cursg_ofs;
4023 /* get the current page and offset */
4024 page = nth_page(page, (offset >> PAGE_SHIFT));
4025 offset %= PAGE_SIZE;
4027 /* don't overrun current sg */
4028 count = min(sg->length - qc->cursg_ofs, bytes);
4030 /* don't cross page boundaries */
4031 count = min(count, (unsigned int)PAGE_SIZE - offset);
4033 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
4035 if (PageHighMem(page)) {
4036 unsigned long flags;
4038 /* FIXME: use bounce buffer */
4039 local_irq_save(flags);
4040 buf = kmap_atomic(page, KM_IRQ0);
4042 /* do the actual data transfer */
4043 ap->ops->data_xfer(qc->dev, buf + offset, count, do_write);
4045 kunmap_atomic(buf, KM_IRQ0);
4046 local_irq_restore(flags);
4048 buf = page_address(page);
4049 ap->ops->data_xfer(qc->dev, buf + offset, count, do_write);
4053 qc->curbytes += count;
4054 qc->cursg_ofs += count;
4056 if (qc->cursg_ofs == sg->length) {
4066 * atapi_pio_bytes - Transfer data from/to the ATAPI device.
4067 * @qc: Command on going
4069 * Transfer Transfer data from/to the ATAPI device.
4072 * Inherited from caller.
4075 static void atapi_pio_bytes(struct ata_queued_cmd *qc)
4077 struct ata_port *ap = qc->ap;
4078 struct ata_device *dev = qc->dev;
4079 unsigned int ireason, bc_lo, bc_hi, bytes;
4080 int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0;
4082 /* Abuse qc->result_tf for temp storage of intermediate TF
4083 * here to save some kernel stack usage.
4084 * For normal completion, qc->result_tf is not relevant. For
4085 * error, qc->result_tf is later overwritten by ata_qc_complete().
4086 * So, the correctness of qc->result_tf is not affected.
4088 ap->ops->tf_read(ap, &qc->result_tf);
4089 ireason = qc->result_tf.nsect;
4090 bc_lo = qc->result_tf.lbam;
4091 bc_hi = qc->result_tf.lbah;
4092 bytes = (bc_hi << 8) | bc_lo;
4094 /* shall be cleared to zero, indicating xfer of data */
4095 if (ireason & (1 << 0))
4098 /* make sure transfer direction matches expected */
4099 i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0;
4100 if (do_write != i_write)
4103 VPRINTK("ata%u: xfering %d bytes\n", ap->id, bytes);
4105 __atapi_pio_bytes(qc, bytes);
4110 ata_dev_printk(dev, KERN_INFO, "ATAPI check failed\n");
4111 qc->err_mask |= AC_ERR_HSM;
4112 ap->hsm_task_state = HSM_ST_ERR;
4116 * ata_hsm_ok_in_wq - Check if the qc can be handled in the workqueue.
4117 * @ap: the target ata_port
4121 * 1 if ok in workqueue, 0 otherwise.
4124 static inline int ata_hsm_ok_in_wq(struct ata_port *ap, struct ata_queued_cmd *qc)
4126 if (qc->tf.flags & ATA_TFLAG_POLLING)
4129 if (ap->hsm_task_state == HSM_ST_FIRST) {
4130 if (qc->tf.protocol == ATA_PROT_PIO &&
4131 (qc->tf.flags & ATA_TFLAG_WRITE))
4134 if (is_atapi_taskfile(&qc->tf) &&
4135 !(qc->dev->flags & ATA_DFLAG_CDB_INTR))
4143 * ata_hsm_qc_complete - finish a qc running on standard HSM
4144 * @qc: Command to complete
4145 * @in_wq: 1 if called from workqueue, 0 otherwise
4147 * Finish @qc which is running on standard HSM.
4150 * If @in_wq is zero, spin_lock_irqsave(host lock).
4151 * Otherwise, none on entry and grabs host lock.
4153 static void ata_hsm_qc_complete(struct ata_queued_cmd *qc, int in_wq)
4155 struct ata_port *ap = qc->ap;
4156 unsigned long flags;
4158 if (ap->ops->error_handler) {
4160 spin_lock_irqsave(ap->lock, flags);
4162 /* EH might have kicked in while host lock is
4165 qc = ata_qc_from_tag(ap, qc->tag);
4167 if (likely(!(qc->err_mask & AC_ERR_HSM))) {
4168 ap->ops->irq_on(ap);
4169 ata_qc_complete(qc);
4171 ata_port_freeze(ap);
4174 spin_unlock_irqrestore(ap->lock, flags);
4176 if (likely(!(qc->err_mask & AC_ERR_HSM)))
4177 ata_qc_complete(qc);
4179 ata_port_freeze(ap);
4183 spin_lock_irqsave(ap->lock, flags);
4184 ap->ops->irq_on(ap);
4185 ata_qc_complete(qc);
4186 spin_unlock_irqrestore(ap->lock, flags);
4188 ata_qc_complete(qc);
4191 ata_altstatus(ap); /* flush */
4195 * ata_hsm_move - move the HSM to the next state.
4196 * @ap: the target ata_port
4198 * @status: current device status
4199 * @in_wq: 1 if called from workqueue, 0 otherwise
4202 * 1 when poll next status needed, 0 otherwise.
4204 int ata_hsm_move(struct ata_port *ap, struct ata_queued_cmd *qc,
4205 u8 status, int in_wq)
4207 unsigned long flags = 0;
4210 WARN_ON((qc->flags & ATA_QCFLAG_ACTIVE) == 0);
4212 /* Make sure ata_qc_issue_prot() does not throw things
4213 * like DMA polling into the workqueue. Notice that
4214 * in_wq is not equivalent to (qc->tf.flags & ATA_TFLAG_POLLING).
4216 WARN_ON(in_wq != ata_hsm_ok_in_wq(ap, qc));
4219 DPRINTK("ata%u: protocol %d task_state %d (dev_stat 0x%X)\n",
4220 ap->id, qc->tf.protocol, ap->hsm_task_state, status);
4222 switch (ap->hsm_task_state) {
4224 /* Send first data block or PACKET CDB */
4226 /* If polling, we will stay in the work queue after
4227 * sending the data. Otherwise, interrupt handler
4228 * takes over after sending the data.
4230 poll_next = (qc->tf.flags & ATA_TFLAG_POLLING);
4232 /* check device status */
4233 if (unlikely((status & ATA_DRQ) == 0)) {
4234 /* handle BSY=0, DRQ=0 as error */
4235 if (likely(status & (ATA_ERR | ATA_DF)))
4236 /* device stops HSM for abort/error */
4237 qc->err_mask |= AC_ERR_DEV;
4239 /* HSM violation. Let EH handle this */
4240 qc->err_mask |= AC_ERR_HSM;
4242 ap->hsm_task_state = HSM_ST_ERR;
4246 /* Device should not ask for data transfer (DRQ=1)
4247 * when it finds something wrong.
4248 * We ignore DRQ here and stop the HSM by
4249 * changing hsm_task_state to HSM_ST_ERR and
4250 * let the EH abort the command or reset the device.
4252 if (unlikely(status & (ATA_ERR | ATA_DF))) {
4253 printk(KERN_WARNING "ata%d: DRQ=1 with device error, dev_stat 0x%X\n",
4255 qc->err_mask |= AC_ERR_HSM;
4256 ap->hsm_task_state = HSM_ST_ERR;
4260 /* Send the CDB (atapi) or the first data block (ata pio out).
4261 * During the state transition, interrupt handler shouldn't
4262 * be invoked before the data transfer is complete and
4263 * hsm_task_state is changed. Hence, the following locking.
4266 spin_lock_irqsave(ap->lock, flags);
4268 if (qc->tf.protocol == ATA_PROT_PIO) {
4269 /* PIO data out protocol.
4270 * send first data block.
4273 /* ata_pio_sectors() might change the state
4274 * to HSM_ST_LAST. so, the state is changed here
4275 * before ata_pio_sectors().
4277 ap->hsm_task_state = HSM_ST;
4278 ata_pio_sectors(qc);
4279 ata_altstatus(ap); /* flush */
4282 atapi_send_cdb(ap, qc);
4285 spin_unlock_irqrestore(ap->lock, flags);
4287 /* if polling, ata_pio_task() handles the rest.
4288 * otherwise, interrupt handler takes over from here.
4293 /* complete command or read/write the data register */
4294 if (qc->tf.protocol == ATA_PROT_ATAPI) {
4295 /* ATAPI PIO protocol */
4296 if ((status & ATA_DRQ) == 0) {
4297 /* No more data to transfer or device error.
4298 * Device error will be tagged in HSM_ST_LAST.
4300 ap->hsm_task_state = HSM_ST_LAST;
4304 /* Device should not ask for data transfer (DRQ=1)
4305 * when it finds something wrong.
4306 * We ignore DRQ here and stop the HSM by
4307 * changing hsm_task_state to HSM_ST_ERR and
4308 * let the EH abort the command or reset the device.
4310 if (unlikely(status & (ATA_ERR | ATA_DF))) {
4311 printk(KERN_WARNING "ata%d: DRQ=1 with device error, dev_stat 0x%X\n",
4313 qc->err_mask |= AC_ERR_HSM;
4314 ap->hsm_task_state = HSM_ST_ERR;
4318 atapi_pio_bytes(qc);
4320 if (unlikely(ap->hsm_task_state == HSM_ST_ERR))
4321 /* bad ireason reported by device */
4325 /* ATA PIO protocol */
4326 if (unlikely((status & ATA_DRQ) == 0)) {
4327 /* handle BSY=0, DRQ=0 as error */
4328 if (likely(status & (ATA_ERR | ATA_DF)))
4329 /* device stops HSM for abort/error */
4330 qc->err_mask |= AC_ERR_DEV;
4332 /* HSM violation. Let EH handle this.
4333 * Phantom devices also trigger this
4334 * condition. Mark hint.
4336 qc->err_mask |= AC_ERR_HSM |
4339 ap->hsm_task_state = HSM_ST_ERR;
4343 /* For PIO reads, some devices may ask for
4344 * data transfer (DRQ=1) alone with ERR=1.
4345 * We respect DRQ here and transfer one
4346 * block of junk data before changing the
4347 * hsm_task_state to HSM_ST_ERR.
4349 * For PIO writes, ERR=1 DRQ=1 doesn't make
4350 * sense since the data block has been
4351 * transferred to the device.
4353 if (unlikely(status & (ATA_ERR | ATA_DF))) {
4354 /* data might be corrputed */
4355 qc->err_mask |= AC_ERR_DEV;
4357 if (!(qc->tf.flags & ATA_TFLAG_WRITE)) {
4358 ata_pio_sectors(qc);
4360 status = ata_wait_idle(ap);
4363 if (status & (ATA_BUSY | ATA_DRQ))
4364 qc->err_mask |= AC_ERR_HSM;
4366 /* ata_pio_sectors() might change the
4367 * state to HSM_ST_LAST. so, the state
4368 * is changed after ata_pio_sectors().
4370 ap->hsm_task_state = HSM_ST_ERR;
4374 ata_pio_sectors(qc);
4376 if (ap->hsm_task_state == HSM_ST_LAST &&
4377 (!(qc->tf.flags & ATA_TFLAG_WRITE))) {
4380 status = ata_wait_idle(ap);
4385 ata_altstatus(ap); /* flush */
4390 if (unlikely(!ata_ok(status))) {
4391 qc->err_mask |= __ac_err_mask(status);
4392 ap->hsm_task_state = HSM_ST_ERR;
4396 /* no more data to transfer */
4397 DPRINTK("ata%u: dev %u command complete, drv_stat 0x%x\n",
4398 ap->id, qc->dev->devno, status);
4400 WARN_ON(qc->err_mask);
4402 ap->hsm_task_state = HSM_ST_IDLE;
4404 /* complete taskfile transaction */
4405 ata_hsm_qc_complete(qc, in_wq);
4411 /* make sure qc->err_mask is available to
4412 * know what's wrong and recover
4414 WARN_ON(qc->err_mask == 0);
4416 ap->hsm_task_state = HSM_ST_IDLE;
4418 /* complete taskfile transaction */
4419 ata_hsm_qc_complete(qc, in_wq);
4431 static void ata_pio_task(struct work_struct *work)
4433 struct ata_port *ap =
4434 container_of(work, struct ata_port, port_task.work);
4435 struct ata_queued_cmd *qc = ap->port_task_data;
4440 WARN_ON(ap->hsm_task_state == HSM_ST_IDLE);
4443 * This is purely heuristic. This is a fast path.
4444 * Sometimes when we enter, BSY will be cleared in
4445 * a chk-status or two. If not, the drive is probably seeking
4446 * or something. Snooze for a couple msecs, then
4447 * chk-status again. If still busy, queue delayed work.
4449 status = ata_busy_wait(ap, ATA_BUSY, 5);
4450 if (status & ATA_BUSY) {
4452 status = ata_busy_wait(ap, ATA_BUSY, 10);
4453 if (status & ATA_BUSY) {
4454 ata_port_queue_task(ap, ata_pio_task, qc, ATA_SHORT_PAUSE);
4460 poll_next = ata_hsm_move(ap, qc, status, 1);
4462 /* another command or interrupt handler
4463 * may be running at this point.
4470 * ata_qc_new - Request an available ATA command, for queueing
4471 * @ap: Port associated with device @dev
4472 * @dev: Device from whom we request an available command structure
4478 static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap)
4480 struct ata_queued_cmd *qc = NULL;
4483 /* no command while frozen */
4484 if (unlikely(ap->pflags & ATA_PFLAG_FROZEN))
4487 /* the last tag is reserved for internal command. */
4488 for (i = 0; i < ATA_MAX_QUEUE - 1; i++)
4489 if (!test_and_set_bit(i, &ap->qc_allocated)) {
4490 qc = __ata_qc_from_tag(ap, i);
4501 * ata_qc_new_init - Request an available ATA command, and initialize it
4502 * @dev: Device from whom we request an available command structure
4508 struct ata_queued_cmd *ata_qc_new_init(struct ata_device *dev)
4510 struct ata_port *ap = dev->ap;
4511 struct ata_queued_cmd *qc;
4513 qc = ata_qc_new(ap);
4526 * ata_qc_free - free unused ata_queued_cmd
4527 * @qc: Command to complete
4529 * Designed to free unused ata_queued_cmd object
4530 * in case something prevents using it.
4533 * spin_lock_irqsave(host lock)
4535 void ata_qc_free(struct ata_queued_cmd *qc)
4537 struct ata_port *ap = qc->ap;
4540 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
4544 if (likely(ata_tag_valid(tag))) {
4545 qc->tag = ATA_TAG_POISON;
4546 clear_bit(tag, &ap->qc_allocated);
4550 void __ata_qc_complete(struct ata_queued_cmd *qc)
4552 struct ata_port *ap = qc->ap;
4554 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
4555 WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE));
4557 if (likely(qc->flags & ATA_QCFLAG_DMAMAP))
4560 /* command should be marked inactive atomically with qc completion */
4561 if (qc->tf.protocol == ATA_PROT_NCQ)
4562 ap->sactive &= ~(1 << qc->tag);
4564 ap->active_tag = ATA_TAG_POISON;
4566 /* atapi: mark qc as inactive to prevent the interrupt handler
4567 * from completing the command twice later, before the error handler
4568 * is called. (when rc != 0 and atapi request sense is needed)
4570 qc->flags &= ~ATA_QCFLAG_ACTIVE;
4571 ap->qc_active &= ~(1 << qc->tag);
4573 /* call completion callback */
4574 qc->complete_fn(qc);
4577 static void fill_result_tf(struct ata_queued_cmd *qc)
4579 struct ata_port *ap = qc->ap;
4581 ap->ops->tf_read(ap, &qc->result_tf);
4582 qc->result_tf.flags = qc->tf.flags;
4586 * ata_qc_complete - Complete an active ATA command
4587 * @qc: Command to complete
4588 * @err_mask: ATA Status register contents
4590 * Indicate to the mid and upper layers that an ATA
4591 * command has completed, with either an ok or not-ok status.
4594 * spin_lock_irqsave(host lock)
4596 void ata_qc_complete(struct ata_queued_cmd *qc)
4598 struct ata_port *ap = qc->ap;
4600 /* XXX: New EH and old EH use different mechanisms to
4601 * synchronize EH with regular execution path.
4603 * In new EH, a failed qc is marked with ATA_QCFLAG_FAILED.
4604 * Normal execution path is responsible for not accessing a
4605 * failed qc. libata core enforces the rule by returning NULL
4606 * from ata_qc_from_tag() for failed qcs.
4608 * Old EH depends on ata_qc_complete() nullifying completion
4609 * requests if ATA_QCFLAG_EH_SCHEDULED is set. Old EH does
4610 * not synchronize with interrupt handler. Only PIO task is
4613 if (ap->ops->error_handler) {
4614 WARN_ON(ap->pflags & ATA_PFLAG_FROZEN);
4616 if (unlikely(qc->err_mask))
4617 qc->flags |= ATA_QCFLAG_FAILED;
4619 if (unlikely(qc->flags & ATA_QCFLAG_FAILED)) {
4620 if (!ata_tag_internal(qc->tag)) {
4621 /* always fill result TF for failed qc */
4623 ata_qc_schedule_eh(qc);
4628 /* read result TF if requested */
4629 if (qc->flags & ATA_QCFLAG_RESULT_TF)
4632 __ata_qc_complete(qc);
4634 if (qc->flags & ATA_QCFLAG_EH_SCHEDULED)
4637 /* read result TF if failed or requested */
4638 if (qc->err_mask || qc->flags & ATA_QCFLAG_RESULT_TF)
4641 __ata_qc_complete(qc);
4646 * ata_qc_complete_multiple - Complete multiple qcs successfully
4647 * @ap: port in question
4648 * @qc_active: new qc_active mask
4649 * @finish_qc: LLDD callback invoked before completing a qc
4651 * Complete in-flight commands. This functions is meant to be
4652 * called from low-level driver's interrupt routine to complete
4653 * requests normally. ap->qc_active and @qc_active is compared
4654 * and commands are completed accordingly.
4657 * spin_lock_irqsave(host lock)
4660 * Number of completed commands on success, -errno otherwise.
4662 int ata_qc_complete_multiple(struct ata_port *ap, u32 qc_active,
4663 void (*finish_qc)(struct ata_queued_cmd *))
4669 done_mask = ap->qc_active ^ qc_active;
4671 if (unlikely(done_mask & qc_active)) {
4672 ata_port_printk(ap, KERN_ERR, "illegal qc_active transition "
4673 "(%08x->%08x)\n", ap->qc_active, qc_active);
4677 for (i = 0; i < ATA_MAX_QUEUE; i++) {
4678 struct ata_queued_cmd *qc;
4680 if (!(done_mask & (1 << i)))
4683 if ((qc = ata_qc_from_tag(ap, i))) {
4686 ata_qc_complete(qc);
4694 static inline int ata_should_dma_map(struct ata_queued_cmd *qc)
4696 struct ata_port *ap = qc->ap;
4698 switch (qc->tf.protocol) {
4701 case ATA_PROT_ATAPI_DMA:
4704 case ATA_PROT_ATAPI:
4706 if (ap->flags & ATA_FLAG_PIO_DMA)
4719 * ata_qc_issue - issue taskfile to device
4720 * @qc: command to issue to device
4722 * Prepare an ATA command to submission to device.
4723 * This includes mapping the data into a DMA-able
4724 * area, filling in the S/G table, and finally
4725 * writing the taskfile to hardware, starting the command.
4728 * spin_lock_irqsave(host lock)
4730 void ata_qc_issue(struct ata_queued_cmd *qc)
4732 struct ata_port *ap = qc->ap;
4734 /* Make sure only one non-NCQ command is outstanding. The
4735 * check is skipped for old EH because it reuses active qc to
4736 * request ATAPI sense.
4738 WARN_ON(ap->ops->error_handler && ata_tag_valid(ap->active_tag));
4740 if (qc->tf.protocol == ATA_PROT_NCQ) {
4741 WARN_ON(ap->sactive & (1 << qc->tag));
4742 ap->sactive |= 1 << qc->tag;
4744 WARN_ON(ap->sactive);
4745 ap->active_tag = qc->tag;
4748 qc->flags |= ATA_QCFLAG_ACTIVE;
4749 ap->qc_active |= 1 << qc->tag;
4751 if (ata_should_dma_map(qc)) {
4752 if (qc->flags & ATA_QCFLAG_SG) {
4753 if (ata_sg_setup(qc))
4755 } else if (qc->flags & ATA_QCFLAG_SINGLE) {
4756 if (ata_sg_setup_one(qc))
4760 qc->flags &= ~ATA_QCFLAG_DMAMAP;
4763 ap->ops->qc_prep(qc);
4765 qc->err_mask |= ap->ops->qc_issue(qc);
4766 if (unlikely(qc->err_mask))
4771 qc->flags &= ~ATA_QCFLAG_DMAMAP;
4772 qc->err_mask |= AC_ERR_SYSTEM;
4774 ata_qc_complete(qc);
4778 * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner
4779 * @qc: command to issue to device
4781 * Using various libata functions and hooks, this function
4782 * starts an ATA command. ATA commands are grouped into
4783 * classes called "protocols", and issuing each type of protocol
4784 * is slightly different.
4786 * May be used as the qc_issue() entry in ata_port_operations.
4789 * spin_lock_irqsave(host lock)
4792 * Zero on success, AC_ERR_* mask on failure
4795 unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc)
4797 struct ata_port *ap = qc->ap;
4799 /* Use polling pio if the LLD doesn't handle
4800 * interrupt driven pio and atapi CDB interrupt.
4802 if (ap->flags & ATA_FLAG_PIO_POLLING) {
4803 switch (qc->tf.protocol) {
4805 case ATA_PROT_NODATA:
4806 case ATA_PROT_ATAPI:
4807 case ATA_PROT_ATAPI_NODATA:
4808 qc->tf.flags |= ATA_TFLAG_POLLING;
4810 case ATA_PROT_ATAPI_DMA:
4811 if (qc->dev->flags & ATA_DFLAG_CDB_INTR)
4812 /* see ata_dma_blacklisted() */
4820 /* Some controllers show flaky interrupt behavior after
4821 * setting xfer mode. Use polling instead.
4823 if (unlikely(qc->tf.command == ATA_CMD_SET_FEATURES &&
4824 qc->tf.feature == SETFEATURES_XFER) &&
4825 (ap->flags & ATA_FLAG_SETXFER_POLLING))
4826 qc->tf.flags |= ATA_TFLAG_POLLING;
4828 /* select the device */
4829 ata_dev_select(ap, qc->dev->devno, 1, 0);
4831 /* start the command */
4832 switch (qc->tf.protocol) {
4833 case ATA_PROT_NODATA:
4834 if (qc->tf.flags & ATA_TFLAG_POLLING)
4835 ata_qc_set_polling(qc);
4837 ata_tf_to_host(ap, &qc->tf);
4838 ap->hsm_task_state = HSM_ST_LAST;
4840 if (qc->tf.flags & ATA_TFLAG_POLLING)
4841 ata_port_queue_task(ap, ata_pio_task, qc, 0);
4846 WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING);
4848 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
4849 ap->ops->bmdma_setup(qc); /* set up bmdma */
4850 ap->ops->bmdma_start(qc); /* initiate bmdma */
4851 ap->hsm_task_state = HSM_ST_LAST;
4855 if (qc->tf.flags & ATA_TFLAG_POLLING)
4856 ata_qc_set_polling(qc);
4858 ata_tf_to_host(ap, &qc->tf);
4860 if (qc->tf.flags & ATA_TFLAG_WRITE) {
4861 /* PIO data out protocol */
4862 ap->hsm_task_state = HSM_ST_FIRST;
4863 ata_port_queue_task(ap, ata_pio_task, qc, 0);
4865 /* always send first data block using
4866 * the ata_pio_task() codepath.
4869 /* PIO data in protocol */
4870 ap->hsm_task_state = HSM_ST;
4872 if (qc->tf.flags & ATA_TFLAG_POLLING)
4873 ata_port_queue_task(ap, ata_pio_task, qc, 0);
4875 /* if polling, ata_pio_task() handles the rest.
4876 * otherwise, interrupt handler takes over from here.
4882 case ATA_PROT_ATAPI:
4883 case ATA_PROT_ATAPI_NODATA:
4884 if (qc->tf.flags & ATA_TFLAG_POLLING)
4885 ata_qc_set_polling(qc);
4887 ata_tf_to_host(ap, &qc->tf);
4889 ap->hsm_task_state = HSM_ST_FIRST;
4891 /* send cdb by polling if no cdb interrupt */
4892 if ((!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) ||
4893 (qc->tf.flags & ATA_TFLAG_POLLING))
4894 ata_port_queue_task(ap, ata_pio_task, qc, 0);
4897 case ATA_PROT_ATAPI_DMA:
4898 WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING);
4900 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
4901 ap->ops->bmdma_setup(qc); /* set up bmdma */
4902 ap->hsm_task_state = HSM_ST_FIRST;
4904 /* send cdb by polling if no cdb interrupt */
4905 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
4906 ata_port_queue_task(ap, ata_pio_task, qc, 0);
4911 return AC_ERR_SYSTEM;
4918 * ata_host_intr - Handle host interrupt for given (port, task)
4919 * @ap: Port on which interrupt arrived (possibly...)
4920 * @qc: Taskfile currently active in engine
4922 * Handle host interrupt for given queued command. Currently,
4923 * only DMA interrupts are handled. All other commands are
4924 * handled via polling with interrupts disabled (nIEN bit).
4927 * spin_lock_irqsave(host lock)
4930 * One if interrupt was handled, zero if not (shared irq).
4933 inline unsigned int ata_host_intr (struct ata_port *ap,
4934 struct ata_queued_cmd *qc)
4936 struct ata_eh_info *ehi = &ap->eh_info;
4937 u8 status, host_stat = 0;
4939 VPRINTK("ata%u: protocol %d task_state %d\n",
4940 ap->id, qc->tf.protocol, ap->hsm_task_state);
4942 /* Check whether we are expecting interrupt in this state */
4943 switch (ap->hsm_task_state) {
4945 /* Some pre-ATAPI-4 devices assert INTRQ
4946 * at this state when ready to receive CDB.
4949 /* Check the ATA_DFLAG_CDB_INTR flag is enough here.
4950 * The flag was turned on only for atapi devices.
4951 * No need to check is_atapi_taskfile(&qc->tf) again.
4953 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
4957 if (qc->tf.protocol == ATA_PROT_DMA ||
4958 qc->tf.protocol == ATA_PROT_ATAPI_DMA) {
4959 /* check status of DMA engine */
4960 host_stat = ap->ops->bmdma_status(ap);
4961 VPRINTK("ata%u: host_stat 0x%X\n", ap->id, host_stat);
4963 /* if it's not our irq... */
4964 if (!(host_stat & ATA_DMA_INTR))
4967 /* before we do anything else, clear DMA-Start bit */
4968 ap->ops->bmdma_stop(qc);
4970 if (unlikely(host_stat & ATA_DMA_ERR)) {
4971 /* error when transfering data to/from memory */
4972 qc->err_mask |= AC_ERR_HOST_BUS;
4973 ap->hsm_task_state = HSM_ST_ERR;
4983 /* check altstatus */
4984 status = ata_altstatus(ap);
4985 if (status & ATA_BUSY)
4988 /* check main status, clearing INTRQ */
4989 status = ata_chk_status(ap);
4990 if (unlikely(status & ATA_BUSY))
4993 /* ack bmdma irq events */
4994 ap->ops->irq_clear(ap);
4996 ata_hsm_move(ap, qc, status, 0);
4998 if (unlikely(qc->err_mask) && (qc->tf.protocol == ATA_PROT_DMA ||
4999 qc->tf.protocol == ATA_PROT_ATAPI_DMA))
5000 ata_ehi_push_desc(ehi, "BMDMA stat 0x%x", host_stat);
5002 return 1; /* irq handled */
5005 ap->stats.idle_irq++;
5008 if ((ap->stats.idle_irq % 1000) == 0) {
5009 ap->ops->irq_ack(ap, 0); /* debug trap */
5010 ata_port_printk(ap, KERN_WARNING, "irq trap\n");
5014 return 0; /* irq not handled */
5018 * ata_interrupt - Default ATA host interrupt handler
5019 * @irq: irq line (unused)
5020 * @dev_instance: pointer to our ata_host information structure
5022 * Default interrupt handler for PCI IDE devices. Calls
5023 * ata_host_intr() for each port that is not disabled.
5026 * Obtains host lock during operation.
5029 * IRQ_NONE or IRQ_HANDLED.
5032 irqreturn_t ata_interrupt (int irq, void *dev_instance)
5034 struct ata_host *host = dev_instance;
5036 unsigned int handled = 0;
5037 unsigned long flags;
5039 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
5040 spin_lock_irqsave(&host->lock, flags);
5042 for (i = 0; i < host->n_ports; i++) {
5043 struct ata_port *ap;
5045 ap = host->ports[i];
5047 !(ap->flags & ATA_FLAG_DISABLED)) {
5048 struct ata_queued_cmd *qc;
5050 qc = ata_qc_from_tag(ap, ap->active_tag);
5051 if (qc && (!(qc->tf.flags & ATA_TFLAG_POLLING)) &&
5052 (qc->flags & ATA_QCFLAG_ACTIVE))
5053 handled |= ata_host_intr(ap, qc);
5057 spin_unlock_irqrestore(&host->lock, flags);
5059 return IRQ_RETVAL(handled);
5063 * sata_scr_valid - test whether SCRs are accessible
5064 * @ap: ATA port to test SCR accessibility for
5066 * Test whether SCRs are accessible for @ap.
5072 * 1 if SCRs are accessible, 0 otherwise.
5074 int sata_scr_valid(struct ata_port *ap)
5076 return ap->cbl == ATA_CBL_SATA && ap->ops->scr_read;
5080 * sata_scr_read - read SCR register of the specified port
5081 * @ap: ATA port to read SCR for
5083 * @val: Place to store read value
5085 * Read SCR register @reg of @ap into *@val. This function is
5086 * guaranteed to succeed if the cable type of the port is SATA
5087 * and the port implements ->scr_read.
5093 * 0 on success, negative errno on failure.
5095 int sata_scr_read(struct ata_port *ap, int reg, u32 *val)
5097 if (sata_scr_valid(ap)) {
5098 *val = ap->ops->scr_read(ap, reg);
5105 * sata_scr_write - write SCR register of the specified port
5106 * @ap: ATA port to write SCR for
5107 * @reg: SCR to write
5108 * @val: value to write
5110 * Write @val to SCR register @reg of @ap. This function is
5111 * guaranteed to succeed if the cable type of the port is SATA
5112 * and the port implements ->scr_read.
5118 * 0 on success, negative errno on failure.
5120 int sata_scr_write(struct ata_port *ap, int reg, u32 val)
5122 if (sata_scr_valid(ap)) {
5123 ap->ops->scr_write(ap, reg, val);
5130 * sata_scr_write_flush - write SCR register of the specified port and flush
5131 * @ap: ATA port to write SCR for
5132 * @reg: SCR to write
5133 * @val: value to write
5135 * This function is identical to sata_scr_write() except that this
5136 * function performs flush after writing to the register.
5142 * 0 on success, negative errno on failure.
5144 int sata_scr_write_flush(struct ata_port *ap, int reg, u32 val)
5146 if (sata_scr_valid(ap)) {
5147 ap->ops->scr_write(ap, reg, val);
5148 ap->ops->scr_read(ap, reg);
5155 * ata_port_online - test whether the given port is online
5156 * @ap: ATA port to test
5158 * Test whether @ap is online. Note that this function returns 0
5159 * if online status of @ap cannot be obtained, so
5160 * ata_port_online(ap) != !ata_port_offline(ap).
5166 * 1 if the port online status is available and online.
5168 int ata_port_online(struct ata_port *ap)
5172 if (!sata_scr_read(ap, SCR_STATUS, &sstatus) && (sstatus & 0xf) == 0x3)
5178 * ata_port_offline - test whether the given port is offline
5179 * @ap: ATA port to test
5181 * Test whether @ap is offline. Note that this function returns
5182 * 0 if offline status of @ap cannot be obtained, so
5183 * ata_port_online(ap) != !ata_port_offline(ap).
5189 * 1 if the port offline status is available and offline.
5191 int ata_port_offline(struct ata_port *ap)
5195 if (!sata_scr_read(ap, SCR_STATUS, &sstatus) && (sstatus & 0xf) != 0x3)
5200 int ata_flush_cache(struct ata_device *dev)
5202 unsigned int err_mask;
5205 if (!ata_try_flush_cache(dev))
5208 if (dev->flags & ATA_DFLAG_FLUSH_EXT)
5209 cmd = ATA_CMD_FLUSH_EXT;
5211 cmd = ATA_CMD_FLUSH;
5213 err_mask = ata_do_simple_cmd(dev, cmd);
5215 ata_dev_printk(dev, KERN_ERR, "failed to flush cache\n");
5222 static int ata_host_request_pm(struct ata_host *host, pm_message_t mesg,
5223 unsigned int action, unsigned int ehi_flags,
5226 unsigned long flags;
5229 for (i = 0; i < host->n_ports; i++) {
5230 struct ata_port *ap = host->ports[i];
5232 /* Previous resume operation might still be in
5233 * progress. Wait for PM_PENDING to clear.
5235 if (ap->pflags & ATA_PFLAG_PM_PENDING) {
5236 ata_port_wait_eh(ap);
5237 WARN_ON(ap->pflags & ATA_PFLAG_PM_PENDING);
5240 /* request PM ops to EH */
5241 spin_lock_irqsave(ap->lock, flags);
5246 ap->pm_result = &rc;
5249 ap->pflags |= ATA_PFLAG_PM_PENDING;
5250 ap->eh_info.action |= action;
5251 ap->eh_info.flags |= ehi_flags;
5253 ata_port_schedule_eh(ap);
5255 spin_unlock_irqrestore(ap->lock, flags);
5257 /* wait and check result */
5259 ata_port_wait_eh(ap);
5260 WARN_ON(ap->pflags & ATA_PFLAG_PM_PENDING);
5270 * ata_host_suspend - suspend host
5271 * @host: host to suspend
5274 * Suspend @host. Actual operation is performed by EH. This
5275 * function requests EH to perform PM operations and waits for EH
5279 * Kernel thread context (may sleep).
5282 * 0 on success, -errno on failure.
5284 int ata_host_suspend(struct ata_host *host, pm_message_t mesg)
5288 rc = ata_host_request_pm(host, mesg, 0, ATA_EHI_QUIET, 1);
5292 /* EH is quiescent now. Fail if we have any ready device.
5293 * This happens if hotplug occurs between completion of device
5294 * suspension and here.
5296 for (i = 0; i < host->n_ports; i++) {
5297 struct ata_port *ap = host->ports[i];
5299 for (j = 0; j < ATA_MAX_DEVICES; j++) {
5300 struct ata_device *dev = &ap->device[j];
5302 if (ata_dev_ready(dev)) {
5303 ata_port_printk(ap, KERN_WARNING,
5304 "suspend failed, device %d "
5305 "still active\n", dev->devno);
5312 host->dev->power.power_state = mesg;
5316 ata_host_resume(host);
5321 * ata_host_resume - resume host
5322 * @host: host to resume
5324 * Resume @host. Actual operation is performed by EH. This
5325 * function requests EH to perform PM operations and returns.
5326 * Note that all resume operations are performed parallely.
5329 * Kernel thread context (may sleep).
5331 void ata_host_resume(struct ata_host *host)
5333 ata_host_request_pm(host, PMSG_ON, ATA_EH_SOFTRESET,
5334 ATA_EHI_NO_AUTOPSY | ATA_EHI_QUIET, 0);
5335 host->dev->power.power_state = PMSG_ON;
5339 * ata_port_start - Set port up for dma.
5340 * @ap: Port to initialize
5342 * Called just after data structures for each port are
5343 * initialized. Allocates space for PRD table.
5345 * May be used as the port_start() entry in ata_port_operations.
5348 * Inherited from caller.
5350 int ata_port_start(struct ata_port *ap)
5352 struct device *dev = ap->dev;
5355 ap->prd = dmam_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma,
5360 rc = ata_pad_alloc(ap, dev);
5364 DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd,
5365 (unsigned long long)ap->prd_dma);
5370 * ata_dev_init - Initialize an ata_device structure
5371 * @dev: Device structure to initialize
5373 * Initialize @dev in preparation for probing.
5376 * Inherited from caller.
5378 void ata_dev_init(struct ata_device *dev)
5380 struct ata_port *ap = dev->ap;
5381 unsigned long flags;
5383 /* SATA spd limit is bound to the first device */
5384 ap->sata_spd_limit = ap->hw_sata_spd_limit;
5386 /* High bits of dev->flags are used to record warm plug
5387 * requests which occur asynchronously. Synchronize using
5390 spin_lock_irqsave(ap->lock, flags);
5391 dev->flags &= ~ATA_DFLAG_INIT_MASK;
5392 spin_unlock_irqrestore(ap->lock, flags);
5394 memset((void *)dev + ATA_DEVICE_CLEAR_OFFSET, 0,
5395 sizeof(*dev) - ATA_DEVICE_CLEAR_OFFSET);
5396 dev->pio_mask = UINT_MAX;
5397 dev->mwdma_mask = UINT_MAX;
5398 dev->udma_mask = UINT_MAX;
5402 * ata_port_init - Initialize an ata_port structure
5403 * @ap: Structure to initialize
5404 * @host: Collection of hosts to which @ap belongs
5405 * @ent: Probe information provided by low-level driver
5406 * @port_no: Port number associated with this ata_port
5408 * Initialize a new ata_port structure.
5411 * Inherited from caller.
5413 void ata_port_init(struct ata_port *ap, struct ata_host *host,
5414 const struct ata_probe_ent *ent, unsigned int port_no)
5418 ap->lock = &host->lock;
5419 ap->flags = ATA_FLAG_DISABLED;
5420 ap->id = ata_unique_id++;
5421 ap->ctl = ATA_DEVCTL_OBS;
5424 ap->port_no = port_no;
5425 if (port_no == 1 && ent->pinfo2) {
5426 ap->pio_mask = ent->pinfo2->pio_mask;
5427 ap->mwdma_mask = ent->pinfo2->mwdma_mask;
5428 ap->udma_mask = ent->pinfo2->udma_mask;
5429 ap->flags |= ent->pinfo2->flags;
5430 ap->ops = ent->pinfo2->port_ops;
5432 ap->pio_mask = ent->pio_mask;
5433 ap->mwdma_mask = ent->mwdma_mask;
5434 ap->udma_mask = ent->udma_mask;
5435 ap->flags |= ent->port_flags;
5436 ap->ops = ent->port_ops;
5438 ap->hw_sata_spd_limit = UINT_MAX;
5439 ap->active_tag = ATA_TAG_POISON;
5440 ap->last_ctl = 0xFF;
5442 #if defined(ATA_VERBOSE_DEBUG)
5443 /* turn on all debugging levels */
5444 ap->msg_enable = 0x00FF;
5445 #elif defined(ATA_DEBUG)
5446 ap->msg_enable = ATA_MSG_DRV | ATA_MSG_INFO | ATA_MSG_CTL | ATA_MSG_WARN | ATA_MSG_ERR;
5448 ap->msg_enable = ATA_MSG_DRV | ATA_MSG_ERR | ATA_MSG_WARN;
5451 INIT_DELAYED_WORK(&ap->port_task, NULL);
5452 INIT_DELAYED_WORK(&ap->hotplug_task, ata_scsi_hotplug);
5453 INIT_WORK(&ap->scsi_rescan_task, ata_scsi_dev_rescan);
5454 INIT_LIST_HEAD(&ap->eh_done_q);
5455 init_waitqueue_head(&ap->eh_wait_q);
5457 /* set cable type */
5458 ap->cbl = ATA_CBL_NONE;
5459 if (ap->flags & ATA_FLAG_SATA)
5460 ap->cbl = ATA_CBL_SATA;
5462 for (i = 0; i < ATA_MAX_DEVICES; i++) {
5463 struct ata_device *dev = &ap->device[i];
5470 ap->stats.unhandled_irq = 1;
5471 ap->stats.idle_irq = 1;
5474 memcpy(&ap->ioaddr, &ent->port[port_no], sizeof(struct ata_ioports));
5478 * ata_port_init_shost - Initialize SCSI host associated with ATA port
5479 * @ap: ATA port to initialize SCSI host for
5480 * @shost: SCSI host associated with @ap
5482 * Initialize SCSI host @shost associated with ATA port @ap.
5485 * Inherited from caller.
5487 static void ata_port_init_shost(struct ata_port *ap, struct Scsi_Host *shost)
5489 ap->scsi_host = shost;
5491 shost->unique_id = ap->id;
5494 shost->max_channel = 1;
5495 shost->max_cmd_len = 12;
5499 * ata_port_add - Attach low-level ATA driver to system
5500 * @ent: Information provided by low-level driver
5501 * @host: Collections of ports to which we add
5502 * @port_no: Port number associated with this host
5504 * Attach low-level ATA driver to system.
5507 * PCI/etc. bus probe sem.
5510 * New ata_port on success, for NULL on error.
5512 static struct ata_port * ata_port_add(const struct ata_probe_ent *ent,
5513 struct ata_host *host,
5514 unsigned int port_no)
5516 struct Scsi_Host *shost;
5517 struct ata_port *ap;
5521 if (!ent->port_ops->error_handler &&
5522 !(ent->port_flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST))) {
5523 printk(KERN_ERR "ata%u: no reset mechanism available\n",
5528 shost = scsi_host_alloc(ent->sht, sizeof(struct ata_port));
5532 shost->transportt = &ata_scsi_transport_template;
5534 ap = ata_shost_to_port(shost);
5536 ata_port_init(ap, host, ent, port_no);
5537 ata_port_init_shost(ap, shost);
5542 static void ata_host_release(struct device *gendev, void *res)
5544 struct ata_host *host = dev_get_drvdata(gendev);
5547 for (i = 0; i < host->n_ports; i++) {
5548 struct ata_port *ap = host->ports[i];
5553 if (ap->ops->port_stop)
5554 ap->ops->port_stop(ap);
5556 scsi_host_put(ap->scsi_host);
5559 if (host->ops->host_stop)
5560 host->ops->host_stop(host);
5564 * ata_sas_host_init - Initialize a host struct
5565 * @host: host to initialize
5566 * @dev: device host is attached to
5567 * @flags: host flags
5571 * PCI/etc. bus probe sem.
5575 void ata_host_init(struct ata_host *host, struct device *dev,
5576 unsigned long flags, const struct ata_port_operations *ops)
5578 spin_lock_init(&host->lock);
5580 host->flags = flags;
5585 * ata_device_add - Register hardware device with ATA and SCSI layers
5586 * @ent: Probe information describing hardware device to be registered
5588 * This function processes the information provided in the probe
5589 * information struct @ent, allocates the necessary ATA and SCSI
5590 * host information structures, initializes them, and registers
5591 * everything with requisite kernel subsystems.
5593 * This function requests irqs, probes the ATA bus, and probes
5597 * PCI/etc. bus probe sem.
5600 * Number of ports registered. Zero on error (no ports registered).
5602 int ata_device_add(const struct ata_probe_ent *ent)
5605 struct device *dev = ent->dev;
5606 struct ata_host *host;
5611 if (ent->irq == 0) {
5612 dev_printk(KERN_ERR, dev, "is not available: No interrupt assigned.\n");
5616 if (!devres_open_group(dev, ata_device_add, GFP_KERNEL))
5619 /* alloc a container for our list of ATA ports (buses) */
5620 host = devres_alloc(ata_host_release, sizeof(struct ata_host) +
5621 (ent->n_ports * sizeof(void *)), GFP_KERNEL);
5624 devres_add(dev, host);
5625 dev_set_drvdata(dev, host);
5627 ata_host_init(host, dev, ent->_host_flags, ent->port_ops);
5628 host->n_ports = ent->n_ports;
5629 host->irq = ent->irq;
5630 host->irq2 = ent->irq2;
5631 host->iomap = ent->iomap;
5632 host->private_data = ent->private_data;
5634 /* register each port bound to this device */
5635 for (i = 0; i < host->n_ports; i++) {
5636 struct ata_port *ap;
5637 unsigned long xfer_mode_mask;
5638 int irq_line = ent->irq;
5640 ap = ata_port_add(ent, host, i);
5641 host->ports[i] = ap;
5646 if (ent->dummy_port_mask & (1 << i)) {
5647 ata_port_printk(ap, KERN_INFO, "DUMMY\n");
5648 ap->ops = &ata_dummy_port_ops;
5653 rc = ap->ops->port_start(ap);
5655 host->ports[i] = NULL;
5656 scsi_host_put(ap->scsi_host);
5660 /* Report the secondary IRQ for second channel legacy */
5661 if (i == 1 && ent->irq2)
5662 irq_line = ent->irq2;
5664 xfer_mode_mask =(ap->udma_mask << ATA_SHIFT_UDMA) |
5665 (ap->mwdma_mask << ATA_SHIFT_MWDMA) |
5666 (ap->pio_mask << ATA_SHIFT_PIO);
5668 /* print per-port info to dmesg */
5669 ata_port_printk(ap, KERN_INFO, "%cATA max %s cmd 0x%p "
5670 "ctl 0x%p bmdma 0x%p irq %d\n",
5671 ap->flags & ATA_FLAG_SATA ? 'S' : 'P',
5672 ata_mode_string(xfer_mode_mask),
5673 ap->ioaddr.cmd_addr,
5674 ap->ioaddr.ctl_addr,
5675 ap->ioaddr.bmdma_addr,
5678 /* freeze port before requesting IRQ */
5679 ata_eh_freeze_port(ap);
5682 /* obtain irq, that may be shared between channels */
5683 rc = devm_request_irq(dev, ent->irq, ent->port_ops->irq_handler,
5684 ent->irq_flags, DRV_NAME, host);
5686 dev_printk(KERN_ERR, dev, "irq %lu request failed: %d\n",
5691 /* do we have a second IRQ for the other channel, eg legacy mode */
5693 /* We will get weird core code crashes later if this is true
5695 BUG_ON(ent->irq == ent->irq2);
5697 rc = devm_request_irq(dev, ent->irq2,
5698 ent->port_ops->irq_handler, ent->irq_flags,
5701 dev_printk(KERN_ERR, dev, "irq %lu request failed: %d\n",
5707 /* resource acquisition complete */
5708 devres_remove_group(dev, ata_device_add);
5710 /* perform each probe synchronously */
5711 DPRINTK("probe begin\n");
5712 for (i = 0; i < host->n_ports; i++) {
5713 struct ata_port *ap = host->ports[i];
5717 /* init sata_spd_limit to the current value */
5718 if (sata_scr_read(ap, SCR_CONTROL, &scontrol) == 0) {
5719 int spd = (scontrol >> 4) & 0xf;
5720 ap->hw_sata_spd_limit &= (1 << spd) - 1;
5722 ap->sata_spd_limit = ap->hw_sata_spd_limit;
5724 rc = scsi_add_host(ap->scsi_host, dev);
5726 ata_port_printk(ap, KERN_ERR, "scsi_add_host failed\n");
5727 /* FIXME: do something useful here */
5728 /* FIXME: handle unconditional calls to
5729 * scsi_scan_host and ata_host_remove, below,
5734 if (ap->ops->error_handler) {
5735 struct ata_eh_info *ehi = &ap->eh_info;
5736 unsigned long flags;
5740 /* kick EH for boot probing */
5741 spin_lock_irqsave(ap->lock, flags);
5743 ehi->probe_mask = (1 << ATA_MAX_DEVICES) - 1;
5744 ehi->action |= ATA_EH_SOFTRESET;
5745 ehi->flags |= ATA_EHI_NO_AUTOPSY | ATA_EHI_QUIET;
5747 ap->pflags |= ATA_PFLAG_LOADING;
5748 ata_port_schedule_eh(ap);
5750 spin_unlock_irqrestore(ap->lock, flags);
5752 /* wait for EH to finish */
5753 ata_port_wait_eh(ap);
5755 DPRINTK("ata%u: bus probe begin\n", ap->id);
5756 rc = ata_bus_probe(ap);
5757 DPRINTK("ata%u: bus probe end\n", ap->id);
5760 /* FIXME: do something useful here?
5761 * Current libata behavior will
5762 * tear down everything when
5763 * the module is removed
5764 * or the h/w is unplugged.
5770 /* probes are done, now scan each port's disk(s) */
5771 DPRINTK("host probe begin\n");
5772 for (i = 0; i < host->n_ports; i++) {
5773 struct ata_port *ap = host->ports[i];
5775 ata_scsi_scan_host(ap);
5778 VPRINTK("EXIT, returning %u\n", ent->n_ports);
5779 return ent->n_ports; /* success */
5782 devres_release_group(dev, ata_device_add);
5783 dev_set_drvdata(dev, NULL);
5784 VPRINTK("EXIT, returning %d\n", rc);
5789 * ata_port_detach - Detach ATA port in prepration of device removal
5790 * @ap: ATA port to be detached
5792 * Detach all ATA devices and the associated SCSI devices of @ap;
5793 * then, remove the associated SCSI host. @ap is guaranteed to
5794 * be quiescent on return from this function.
5797 * Kernel thread context (may sleep).
5799 void ata_port_detach(struct ata_port *ap)
5801 unsigned long flags;
5804 if (!ap->ops->error_handler)
5807 /* tell EH we're leaving & flush EH */
5808 spin_lock_irqsave(ap->lock, flags);
5809 ap->pflags |= ATA_PFLAG_UNLOADING;
5810 spin_unlock_irqrestore(ap->lock, flags);
5812 ata_port_wait_eh(ap);
5814 /* EH is now guaranteed to see UNLOADING, so no new device
5815 * will be attached. Disable all existing devices.
5817 spin_lock_irqsave(ap->lock, flags);
5819 for (i = 0; i < ATA_MAX_DEVICES; i++)
5820 ata_dev_disable(&ap->device[i]);
5822 spin_unlock_irqrestore(ap->lock, flags);
5824 /* Final freeze & EH. All in-flight commands are aborted. EH
5825 * will be skipped and retrials will be terminated with bad
5828 spin_lock_irqsave(ap->lock, flags);
5829 ata_port_freeze(ap); /* won't be thawed */
5830 spin_unlock_irqrestore(ap->lock, flags);
5832 ata_port_wait_eh(ap);
5834 /* Flush hotplug task. The sequence is similar to
5835 * ata_port_flush_task().
5837 flush_workqueue(ata_aux_wq);
5838 cancel_delayed_work(&ap->hotplug_task);
5839 flush_workqueue(ata_aux_wq);
5842 /* remove the associated SCSI host */
5843 scsi_remove_host(ap->scsi_host);
5847 * ata_host_detach - Detach all ports of an ATA host
5848 * @host: Host to detach
5850 * Detach all ports of @host.
5853 * Kernel thread context (may sleep).
5855 void ata_host_detach(struct ata_host *host)
5859 for (i = 0; i < host->n_ports; i++)
5860 ata_port_detach(host->ports[i]);
5863 struct ata_probe_ent *
5864 ata_probe_ent_alloc(struct device *dev, const struct ata_port_info *port)
5866 struct ata_probe_ent *probe_ent;
5868 /* XXX - the following if can go away once all LLDs are managed */
5869 if (!list_empty(&dev->devres_head))
5870 probe_ent = devm_kzalloc(dev, sizeof(*probe_ent), GFP_KERNEL);
5872 probe_ent = kzalloc(sizeof(*probe_ent), GFP_KERNEL);
5874 printk(KERN_ERR DRV_NAME "(%s): out of memory\n",
5875 kobject_name(&(dev->kobj)));
5879 INIT_LIST_HEAD(&probe_ent->node);
5880 probe_ent->dev = dev;
5882 probe_ent->sht = port->sht;
5883 probe_ent->port_flags = port->flags;
5884 probe_ent->pio_mask = port->pio_mask;
5885 probe_ent->mwdma_mask = port->mwdma_mask;
5886 probe_ent->udma_mask = port->udma_mask;
5887 probe_ent->port_ops = port->port_ops;
5888 probe_ent->private_data = port->private_data;
5894 * ata_std_ports - initialize ioaddr with standard port offsets.
5895 * @ioaddr: IO address structure to be initialized
5897 * Utility function which initializes data_addr, error_addr,
5898 * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
5899 * device_addr, status_addr, and command_addr to standard offsets
5900 * relative to cmd_addr.
5902 * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
5905 void ata_std_ports(struct ata_ioports *ioaddr)
5907 ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA;
5908 ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR;
5909 ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE;
5910 ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT;
5911 ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL;
5912 ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM;
5913 ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH;
5914 ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE;
5915 ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS;
5916 ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD;
5923 * ata_pci_remove_one - PCI layer callback for device removal
5924 * @pdev: PCI device that was removed
5926 * PCI layer indicates to libata via this hook that hot-unplug or
5927 * module unload event has occurred. Detach all ports. Resource
5928 * release is handled via devres.
5931 * Inherited from PCI layer (may sleep).
5933 void ata_pci_remove_one(struct pci_dev *pdev)
5935 struct device *dev = pci_dev_to_dev(pdev);
5936 struct ata_host *host = dev_get_drvdata(dev);
5938 ata_host_detach(host);
5941 /* move to PCI subsystem */
5942 int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits)
5944 unsigned long tmp = 0;
5946 switch (bits->width) {
5949 pci_read_config_byte(pdev, bits->reg, &tmp8);
5955 pci_read_config_word(pdev, bits->reg, &tmp16);
5961 pci_read_config_dword(pdev, bits->reg, &tmp32);
5972 return (tmp == bits->val) ? 1 : 0;
5975 void ata_pci_device_do_suspend(struct pci_dev *pdev, pm_message_t mesg)
5977 pci_save_state(pdev);
5979 if (mesg.event == PM_EVENT_SUSPEND) {
5980 pci_disable_device(pdev);
5981 pci_set_power_state(pdev, PCI_D3hot);
5985 int ata_pci_device_do_resume(struct pci_dev *pdev)
5989 pci_set_power_state(pdev, PCI_D0);
5990 pci_restore_state(pdev);
5992 rc = pcim_enable_device(pdev);
5994 dev_printk(KERN_ERR, &pdev->dev,
5995 "failed to enable device after resume (%d)\n", rc);
5999 pci_set_master(pdev);
6003 int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg)
6005 struct ata_host *host = dev_get_drvdata(&pdev->dev);
6008 rc = ata_host_suspend(host, mesg);
6012 ata_pci_device_do_suspend(pdev, mesg);
6017 int ata_pci_device_resume(struct pci_dev *pdev)
6019 struct ata_host *host = dev_get_drvdata(&pdev->dev);
6022 rc = ata_pci_device_do_resume(pdev);
6024 ata_host_resume(host);
6027 #endif /* CONFIG_PCI */
6030 static int __init ata_init(void)
6032 ata_probe_timeout *= HZ;
6033 ata_wq = create_workqueue("ata");
6037 ata_aux_wq = create_singlethread_workqueue("ata_aux");
6039 destroy_workqueue(ata_wq);
6043 printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n");
6047 static void __exit ata_exit(void)
6049 destroy_workqueue(ata_wq);
6050 destroy_workqueue(ata_aux_wq);
6053 subsys_initcall(ata_init);
6054 module_exit(ata_exit);
6056 static unsigned long ratelimit_time;
6057 static DEFINE_SPINLOCK(ata_ratelimit_lock);
6059 int ata_ratelimit(void)
6062 unsigned long flags;
6064 spin_lock_irqsave(&ata_ratelimit_lock, flags);
6066 if (time_after(jiffies, ratelimit_time)) {
6068 ratelimit_time = jiffies + (HZ/5);
6072 spin_unlock_irqrestore(&ata_ratelimit_lock, flags);
6078 * ata_wait_register - wait until register value changes
6079 * @reg: IO-mapped register
6080 * @mask: Mask to apply to read register value
6081 * @val: Wait condition
6082 * @interval_msec: polling interval in milliseconds
6083 * @timeout_msec: timeout in milliseconds
6085 * Waiting for some bits of register to change is a common
6086 * operation for ATA controllers. This function reads 32bit LE
6087 * IO-mapped register @reg and tests for the following condition.
6089 * (*@reg & mask) != val
6091 * If the condition is met, it returns; otherwise, the process is
6092 * repeated after @interval_msec until timeout.
6095 * Kernel thread context (may sleep)
6098 * The final register value.
6100 u32 ata_wait_register(void __iomem *reg, u32 mask, u32 val,
6101 unsigned long interval_msec,
6102 unsigned long timeout_msec)
6104 unsigned long timeout;
6107 tmp = ioread32(reg);
6109 /* Calculate timeout _after_ the first read to make sure
6110 * preceding writes reach the controller before starting to
6111 * eat away the timeout.
6113 timeout = jiffies + (timeout_msec * HZ) / 1000;
6115 while ((tmp & mask) == val && time_before(jiffies, timeout)) {
6116 msleep(interval_msec);
6117 tmp = ioread32(reg);
6126 static void ata_dummy_noret(struct ata_port *ap) { }
6127 static int ata_dummy_ret0(struct ata_port *ap) { return 0; }
6128 static void ata_dummy_qc_noret(struct ata_queued_cmd *qc) { }
6130 static u8 ata_dummy_check_status(struct ata_port *ap)
6135 static unsigned int ata_dummy_qc_issue(struct ata_queued_cmd *qc)
6137 return AC_ERR_SYSTEM;
6140 const struct ata_port_operations ata_dummy_port_ops = {
6141 .port_disable = ata_port_disable,
6142 .check_status = ata_dummy_check_status,
6143 .check_altstatus = ata_dummy_check_status,
6144 .dev_select = ata_noop_dev_select,
6145 .qc_prep = ata_noop_qc_prep,
6146 .qc_issue = ata_dummy_qc_issue,
6147 .freeze = ata_dummy_noret,
6148 .thaw = ata_dummy_noret,
6149 .error_handler = ata_dummy_noret,
6150 .post_internal_cmd = ata_dummy_qc_noret,
6151 .irq_clear = ata_dummy_noret,
6152 .port_start = ata_dummy_ret0,
6153 .port_stop = ata_dummy_noret,
6157 * libata is essentially a library of internal helper functions for
6158 * low-level ATA host controller drivers. As such, the API/ABI is
6159 * likely to change as new drivers are added and updated.
6160 * Do not depend on ABI/API stability.
6163 EXPORT_SYMBOL_GPL(sata_deb_timing_normal);
6164 EXPORT_SYMBOL_GPL(sata_deb_timing_hotplug);
6165 EXPORT_SYMBOL_GPL(sata_deb_timing_long);
6166 EXPORT_SYMBOL_GPL(ata_dummy_port_ops);
6167 EXPORT_SYMBOL_GPL(ata_std_bios_param);
6168 EXPORT_SYMBOL_GPL(ata_std_ports);
6169 EXPORT_SYMBOL_GPL(ata_host_init);
6170 EXPORT_SYMBOL_GPL(ata_device_add);
6171 EXPORT_SYMBOL_GPL(ata_host_detach);
6172 EXPORT_SYMBOL_GPL(ata_sg_init);
6173 EXPORT_SYMBOL_GPL(ata_sg_init_one);
6174 EXPORT_SYMBOL_GPL(ata_hsm_move);
6175 EXPORT_SYMBOL_GPL(ata_qc_complete);
6176 EXPORT_SYMBOL_GPL(ata_qc_complete_multiple);
6177 EXPORT_SYMBOL_GPL(ata_qc_issue_prot);
6178 EXPORT_SYMBOL_GPL(ata_tf_load);
6179 EXPORT_SYMBOL_GPL(ata_tf_read);
6180 EXPORT_SYMBOL_GPL(ata_noop_dev_select);
6181 EXPORT_SYMBOL_GPL(ata_std_dev_select);
6182 EXPORT_SYMBOL_GPL(ata_tf_to_fis);
6183 EXPORT_SYMBOL_GPL(ata_tf_from_fis);
6184 EXPORT_SYMBOL_GPL(ata_check_status);
6185 EXPORT_SYMBOL_GPL(ata_altstatus);
6186 EXPORT_SYMBOL_GPL(ata_exec_command);
6187 EXPORT_SYMBOL_GPL(ata_port_start);
6188 EXPORT_SYMBOL_GPL(ata_interrupt);
6189 EXPORT_SYMBOL_GPL(ata_data_xfer);
6190 EXPORT_SYMBOL_GPL(ata_data_xfer_noirq);
6191 EXPORT_SYMBOL_GPL(ata_qc_prep);
6192 EXPORT_SYMBOL_GPL(ata_noop_qc_prep);
6193 EXPORT_SYMBOL_GPL(ata_bmdma_setup);
6194 EXPORT_SYMBOL_GPL(ata_bmdma_start);
6195 EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear);
6196 EXPORT_SYMBOL_GPL(ata_bmdma_status);
6197 EXPORT_SYMBOL_GPL(ata_bmdma_stop);
6198 EXPORT_SYMBOL_GPL(ata_bmdma_freeze);
6199 EXPORT_SYMBOL_GPL(ata_bmdma_thaw);
6200 EXPORT_SYMBOL_GPL(ata_bmdma_drive_eh);
6201 EXPORT_SYMBOL_GPL(ata_bmdma_error_handler);
6202 EXPORT_SYMBOL_GPL(ata_bmdma_post_internal_cmd);
6203 EXPORT_SYMBOL_GPL(ata_port_probe);
6204 EXPORT_SYMBOL_GPL(sata_set_spd);
6205 EXPORT_SYMBOL_GPL(sata_phy_debounce);
6206 EXPORT_SYMBOL_GPL(sata_phy_resume);
6207 EXPORT_SYMBOL_GPL(sata_phy_reset);
6208 EXPORT_SYMBOL_GPL(__sata_phy_reset);
6209 EXPORT_SYMBOL_GPL(ata_bus_reset);
6210 EXPORT_SYMBOL_GPL(ata_std_prereset);
6211 EXPORT_SYMBOL_GPL(ata_std_softreset);
6212 EXPORT_SYMBOL_GPL(sata_port_hardreset);
6213 EXPORT_SYMBOL_GPL(sata_std_hardreset);
6214 EXPORT_SYMBOL_GPL(ata_std_postreset);
6215 EXPORT_SYMBOL_GPL(ata_dev_classify);
6216 EXPORT_SYMBOL_GPL(ata_dev_pair);
6217 EXPORT_SYMBOL_GPL(ata_port_disable);
6218 EXPORT_SYMBOL_GPL(ata_ratelimit);
6219 EXPORT_SYMBOL_GPL(ata_wait_register);
6220 EXPORT_SYMBOL_GPL(ata_busy_sleep);
6221 EXPORT_SYMBOL_GPL(ata_port_queue_task);
6222 EXPORT_SYMBOL_GPL(ata_scsi_ioctl);
6223 EXPORT_SYMBOL_GPL(ata_scsi_queuecmd);
6224 EXPORT_SYMBOL_GPL(ata_scsi_slave_config);
6225 EXPORT_SYMBOL_GPL(ata_scsi_slave_destroy);
6226 EXPORT_SYMBOL_GPL(ata_scsi_change_queue_depth);
6227 EXPORT_SYMBOL_GPL(ata_host_intr);
6228 EXPORT_SYMBOL_GPL(sata_scr_valid);
6229 EXPORT_SYMBOL_GPL(sata_scr_read);
6230 EXPORT_SYMBOL_GPL(sata_scr_write);
6231 EXPORT_SYMBOL_GPL(sata_scr_write_flush);
6232 EXPORT_SYMBOL_GPL(ata_port_online);
6233 EXPORT_SYMBOL_GPL(ata_port_offline);
6234 EXPORT_SYMBOL_GPL(ata_host_suspend);
6235 EXPORT_SYMBOL_GPL(ata_host_resume);
6236 EXPORT_SYMBOL_GPL(ata_id_string);
6237 EXPORT_SYMBOL_GPL(ata_id_c_string);
6238 EXPORT_SYMBOL_GPL(ata_device_blacklisted);
6239 EXPORT_SYMBOL_GPL(ata_scsi_simulate);
6241 EXPORT_SYMBOL_GPL(ata_pio_need_iordy);
6242 EXPORT_SYMBOL_GPL(ata_timing_compute);
6243 EXPORT_SYMBOL_GPL(ata_timing_merge);
6246 EXPORT_SYMBOL_GPL(pci_test_config_bits);
6247 EXPORT_SYMBOL_GPL(ata_pci_init_native_mode);
6248 EXPORT_SYMBOL_GPL(ata_pci_init_one);
6249 EXPORT_SYMBOL_GPL(ata_pci_remove_one);
6250 EXPORT_SYMBOL_GPL(ata_pci_device_do_suspend);
6251 EXPORT_SYMBOL_GPL(ata_pci_device_do_resume);
6252 EXPORT_SYMBOL_GPL(ata_pci_device_suspend);
6253 EXPORT_SYMBOL_GPL(ata_pci_device_resume);
6254 EXPORT_SYMBOL_GPL(ata_pci_default_filter);
6255 EXPORT_SYMBOL_GPL(ata_pci_clear_simplex);
6256 #endif /* CONFIG_PCI */
6258 EXPORT_SYMBOL_GPL(ata_scsi_device_suspend);
6259 EXPORT_SYMBOL_GPL(ata_scsi_device_resume);
6261 EXPORT_SYMBOL_GPL(ata_eng_timeout);
6262 EXPORT_SYMBOL_GPL(ata_port_schedule_eh);
6263 EXPORT_SYMBOL_GPL(ata_port_abort);
6264 EXPORT_SYMBOL_GPL(ata_port_freeze);
6265 EXPORT_SYMBOL_GPL(ata_eh_freeze_port);
6266 EXPORT_SYMBOL_GPL(ata_eh_thaw_port);
6267 EXPORT_SYMBOL_GPL(ata_eh_qc_complete);
6268 EXPORT_SYMBOL_GPL(ata_eh_qc_retry);
6269 EXPORT_SYMBOL_GPL(ata_do_eh);
6270 EXPORT_SYMBOL_GPL(ata_irq_on);
6271 EXPORT_SYMBOL_GPL(ata_dummy_irq_on);
6272 EXPORT_SYMBOL_GPL(ata_irq_ack);
6273 EXPORT_SYMBOL_GPL(ata_dummy_irq_ack);