2 * libata-core.c - helper library for ATA
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
8 * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2004 Jeff Garzik
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
35 #include <linux/kernel.h>
36 #include <linux/module.h>
37 #include <linux/pci.h>
38 #include <linux/init.h>
39 #include <linux/list.h>
41 #include <linux/highmem.h>
42 #include <linux/spinlock.h>
43 #include <linux/blkdev.h>
44 #include <linux/delay.h>
45 #include <linux/timer.h>
46 #include <linux/interrupt.h>
47 #include <linux/completion.h>
48 #include <linux/suspend.h>
49 #include <linux/workqueue.h>
50 #include <linux/jiffies.h>
51 #include <linux/scatterlist.h>
52 #include <scsi/scsi.h>
53 #include <scsi/scsi_cmnd.h>
54 #include <scsi/scsi_host.h>
55 #include <linux/libata.h>
57 #include <asm/semaphore.h>
58 #include <asm/byteorder.h>
62 #define DRV_VERSION "2.10" /* must be exactly four chars */
65 /* debounce timing parameters in msecs { interval, duration, timeout } */
66 const unsigned long sata_deb_timing_normal[] = { 5, 100, 2000 };
67 const unsigned long sata_deb_timing_hotplug[] = { 25, 500, 2000 };
68 const unsigned long sata_deb_timing_long[] = { 100, 2000, 5000 };
70 static unsigned int ata_dev_init_params(struct ata_device *dev,
71 u16 heads, u16 sectors);
72 static unsigned int ata_dev_set_xfermode(struct ata_device *dev);
73 static void ata_dev_xfermask(struct ata_device *dev);
75 static unsigned int ata_unique_id = 1;
76 static struct workqueue_struct *ata_wq;
78 struct workqueue_struct *ata_aux_wq;
80 int atapi_enabled = 1;
81 module_param(atapi_enabled, int, 0444);
82 MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)");
85 module_param(atapi_dmadir, int, 0444);
86 MODULE_PARM_DESC(atapi_dmadir, "Enable ATAPI DMADIR bridge support (0=off, 1=on)");
89 module_param_named(fua, libata_fua, int, 0444);
90 MODULE_PARM_DESC(fua, "FUA support (0=off, 1=on)");
92 static int ata_probe_timeout = ATA_TMOUT_INTERNAL / HZ;
93 module_param(ata_probe_timeout, int, 0444);
94 MODULE_PARM_DESC(ata_probe_timeout, "Set ATA probing timeout (seconds)");
97 module_param(noacpi, int, 0444);
98 MODULE_PARM_DESC(noacpi, "Disables the use of ACPI in suspend/resume when set");
100 MODULE_AUTHOR("Jeff Garzik");
101 MODULE_DESCRIPTION("Library module for ATA devices");
102 MODULE_LICENSE("GPL");
103 MODULE_VERSION(DRV_VERSION);
107 * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure
108 * @tf: Taskfile to convert
109 * @fis: Buffer into which data will output
110 * @pmp: Port multiplier port
112 * Converts a standard ATA taskfile to a Serial ATA
113 * FIS structure (Register - Host to Device).
116 * Inherited from caller.
119 void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp)
121 fis[0] = 0x27; /* Register - Host to Device FIS */
122 fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number,
123 bit 7 indicates Command FIS */
124 fis[2] = tf->command;
125 fis[3] = tf->feature;
132 fis[8] = tf->hob_lbal;
133 fis[9] = tf->hob_lbam;
134 fis[10] = tf->hob_lbah;
135 fis[11] = tf->hob_feature;
138 fis[13] = tf->hob_nsect;
149 * ata_tf_from_fis - Convert SATA FIS to ATA taskfile
150 * @fis: Buffer from which data will be input
151 * @tf: Taskfile to output
153 * Converts a serial ATA FIS structure to a standard ATA taskfile.
156 * Inherited from caller.
159 void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf)
161 tf->command = fis[2]; /* status */
162 tf->feature = fis[3]; /* error */
169 tf->hob_lbal = fis[8];
170 tf->hob_lbam = fis[9];
171 tf->hob_lbah = fis[10];
174 tf->hob_nsect = fis[13];
177 static const u8 ata_rw_cmds[] = {
181 ATA_CMD_READ_MULTI_EXT,
182 ATA_CMD_WRITE_MULTI_EXT,
186 ATA_CMD_WRITE_MULTI_FUA_EXT,
190 ATA_CMD_PIO_READ_EXT,
191 ATA_CMD_PIO_WRITE_EXT,
204 ATA_CMD_WRITE_FUA_EXT
208 * ata_rwcmd_protocol - set taskfile r/w commands and protocol
209 * @tf: command to examine and configure
210 * @dev: device tf belongs to
212 * Examine the device configuration and tf->flags to calculate
213 * the proper read/write commands and protocol to use.
218 static int ata_rwcmd_protocol(struct ata_taskfile *tf, struct ata_device *dev)
222 int index, fua, lba48, write;
224 fua = (tf->flags & ATA_TFLAG_FUA) ? 4 : 0;
225 lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0;
226 write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0;
228 if (dev->flags & ATA_DFLAG_PIO) {
229 tf->protocol = ATA_PROT_PIO;
230 index = dev->multi_count ? 0 : 8;
231 } else if (lba48 && (dev->ap->flags & ATA_FLAG_PIO_LBA48)) {
232 /* Unable to use DMA due to host limitation */
233 tf->protocol = ATA_PROT_PIO;
234 index = dev->multi_count ? 0 : 8;
236 tf->protocol = ATA_PROT_DMA;
240 cmd = ata_rw_cmds[index + fua + lba48 + write];
249 * ata_tf_read_block - Read block address from ATA taskfile
250 * @tf: ATA taskfile of interest
251 * @dev: ATA device @tf belongs to
256 * Read block address from @tf. This function can handle all
257 * three address formats - LBA, LBA48 and CHS. tf->protocol and
258 * flags select the address format to use.
261 * Block address read from @tf.
263 u64 ata_tf_read_block(struct ata_taskfile *tf, struct ata_device *dev)
267 if (tf->flags & ATA_TFLAG_LBA) {
268 if (tf->flags & ATA_TFLAG_LBA48) {
269 block |= (u64)tf->hob_lbah << 40;
270 block |= (u64)tf->hob_lbam << 32;
271 block |= tf->hob_lbal << 24;
273 block |= (tf->device & 0xf) << 24;
275 block |= tf->lbah << 16;
276 block |= tf->lbam << 8;
281 cyl = tf->lbam | (tf->lbah << 8);
282 head = tf->device & 0xf;
285 block = (cyl * dev->heads + head) * dev->sectors + sect;
292 * ata_build_rw_tf - Build ATA taskfile for given read/write request
293 * @tf: Target ATA taskfile
294 * @dev: ATA device @tf belongs to
295 * @block: Block address
296 * @n_block: Number of blocks
297 * @tf_flags: RW/FUA etc...
303 * Build ATA taskfile @tf for read/write request described by
304 * @block, @n_block, @tf_flags and @tag on @dev.
308 * 0 on success, -ERANGE if the request is too large for @dev,
309 * -EINVAL if the request is invalid.
311 int ata_build_rw_tf(struct ata_taskfile *tf, struct ata_device *dev,
312 u64 block, u32 n_block, unsigned int tf_flags,
315 tf->flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
316 tf->flags |= tf_flags;
318 if ((dev->flags & (ATA_DFLAG_PIO | ATA_DFLAG_NCQ_OFF |
319 ATA_DFLAG_NCQ)) == ATA_DFLAG_NCQ &&
320 likely(tag != ATA_TAG_INTERNAL)) {
322 if (!lba_48_ok(block, n_block))
325 tf->protocol = ATA_PROT_NCQ;
326 tf->flags |= ATA_TFLAG_LBA | ATA_TFLAG_LBA48;
328 if (tf->flags & ATA_TFLAG_WRITE)
329 tf->command = ATA_CMD_FPDMA_WRITE;
331 tf->command = ATA_CMD_FPDMA_READ;
333 tf->nsect = tag << 3;
334 tf->hob_feature = (n_block >> 8) & 0xff;
335 tf->feature = n_block & 0xff;
337 tf->hob_lbah = (block >> 40) & 0xff;
338 tf->hob_lbam = (block >> 32) & 0xff;
339 tf->hob_lbal = (block >> 24) & 0xff;
340 tf->lbah = (block >> 16) & 0xff;
341 tf->lbam = (block >> 8) & 0xff;
342 tf->lbal = block & 0xff;
345 if (tf->flags & ATA_TFLAG_FUA)
346 tf->device |= 1 << 7;
347 } else if (dev->flags & ATA_DFLAG_LBA) {
348 tf->flags |= ATA_TFLAG_LBA;
350 if (lba_28_ok(block, n_block)) {
352 tf->device |= (block >> 24) & 0xf;
353 } else if (lba_48_ok(block, n_block)) {
354 if (!(dev->flags & ATA_DFLAG_LBA48))
358 tf->flags |= ATA_TFLAG_LBA48;
360 tf->hob_nsect = (n_block >> 8) & 0xff;
362 tf->hob_lbah = (block >> 40) & 0xff;
363 tf->hob_lbam = (block >> 32) & 0xff;
364 tf->hob_lbal = (block >> 24) & 0xff;
366 /* request too large even for LBA48 */
369 if (unlikely(ata_rwcmd_protocol(tf, dev) < 0))
372 tf->nsect = n_block & 0xff;
374 tf->lbah = (block >> 16) & 0xff;
375 tf->lbam = (block >> 8) & 0xff;
376 tf->lbal = block & 0xff;
378 tf->device |= ATA_LBA;
381 u32 sect, head, cyl, track;
383 /* The request -may- be too large for CHS addressing. */
384 if (!lba_28_ok(block, n_block))
387 if (unlikely(ata_rwcmd_protocol(tf, dev) < 0))
390 /* Convert LBA to CHS */
391 track = (u32)block / dev->sectors;
392 cyl = track / dev->heads;
393 head = track % dev->heads;
394 sect = (u32)block % dev->sectors + 1;
396 DPRINTK("block %u track %u cyl %u head %u sect %u\n",
397 (u32)block, track, cyl, head, sect);
399 /* Check whether the converted CHS can fit.
403 if ((cyl >> 16) || (head >> 4) || (sect >> 8) || (!sect))
406 tf->nsect = n_block & 0xff; /* Sector count 0 means 256 sectors */
417 * ata_pack_xfermask - Pack pio, mwdma and udma masks into xfer_mask
418 * @pio_mask: pio_mask
419 * @mwdma_mask: mwdma_mask
420 * @udma_mask: udma_mask
422 * Pack @pio_mask, @mwdma_mask and @udma_mask into a single
423 * unsigned int xfer_mask.
431 static unsigned int ata_pack_xfermask(unsigned int pio_mask,
432 unsigned int mwdma_mask,
433 unsigned int udma_mask)
435 return ((pio_mask << ATA_SHIFT_PIO) & ATA_MASK_PIO) |
436 ((mwdma_mask << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA) |
437 ((udma_mask << ATA_SHIFT_UDMA) & ATA_MASK_UDMA);
441 * ata_unpack_xfermask - Unpack xfer_mask into pio, mwdma and udma masks
442 * @xfer_mask: xfer_mask to unpack
443 * @pio_mask: resulting pio_mask
444 * @mwdma_mask: resulting mwdma_mask
445 * @udma_mask: resulting udma_mask
447 * Unpack @xfer_mask into @pio_mask, @mwdma_mask and @udma_mask.
448 * Any NULL distination masks will be ignored.
450 static void ata_unpack_xfermask(unsigned int xfer_mask,
451 unsigned int *pio_mask,
452 unsigned int *mwdma_mask,
453 unsigned int *udma_mask)
456 *pio_mask = (xfer_mask & ATA_MASK_PIO) >> ATA_SHIFT_PIO;
458 *mwdma_mask = (xfer_mask & ATA_MASK_MWDMA) >> ATA_SHIFT_MWDMA;
460 *udma_mask = (xfer_mask & ATA_MASK_UDMA) >> ATA_SHIFT_UDMA;
463 static const struct ata_xfer_ent {
467 { ATA_SHIFT_PIO, ATA_BITS_PIO, XFER_PIO_0 },
468 { ATA_SHIFT_MWDMA, ATA_BITS_MWDMA, XFER_MW_DMA_0 },
469 { ATA_SHIFT_UDMA, ATA_BITS_UDMA, XFER_UDMA_0 },
474 * ata_xfer_mask2mode - Find matching XFER_* for the given xfer_mask
475 * @xfer_mask: xfer_mask of interest
477 * Return matching XFER_* value for @xfer_mask. Only the highest
478 * bit of @xfer_mask is considered.
484 * Matching XFER_* value, 0 if no match found.
486 static u8 ata_xfer_mask2mode(unsigned int xfer_mask)
488 int highbit = fls(xfer_mask) - 1;
489 const struct ata_xfer_ent *ent;
491 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
492 if (highbit >= ent->shift && highbit < ent->shift + ent->bits)
493 return ent->base + highbit - ent->shift;
498 * ata_xfer_mode2mask - Find matching xfer_mask for XFER_*
499 * @xfer_mode: XFER_* of interest
501 * Return matching xfer_mask for @xfer_mode.
507 * Matching xfer_mask, 0 if no match found.
509 static unsigned int ata_xfer_mode2mask(u8 xfer_mode)
511 const struct ata_xfer_ent *ent;
513 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
514 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
515 return 1 << (ent->shift + xfer_mode - ent->base);
520 * ata_xfer_mode2shift - Find matching xfer_shift for XFER_*
521 * @xfer_mode: XFER_* of interest
523 * Return matching xfer_shift for @xfer_mode.
529 * Matching xfer_shift, -1 if no match found.
531 static int ata_xfer_mode2shift(unsigned int xfer_mode)
533 const struct ata_xfer_ent *ent;
535 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
536 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
542 * ata_mode_string - convert xfer_mask to string
543 * @xfer_mask: mask of bits supported; only highest bit counts.
545 * Determine string which represents the highest speed
546 * (highest bit in @modemask).
552 * Constant C string representing highest speed listed in
553 * @mode_mask, or the constant C string "<n/a>".
555 static const char *ata_mode_string(unsigned int xfer_mask)
557 static const char * const xfer_mode_str[] = {
581 highbit = fls(xfer_mask) - 1;
582 if (highbit >= 0 && highbit < ARRAY_SIZE(xfer_mode_str))
583 return xfer_mode_str[highbit];
587 static const char *sata_spd_string(unsigned int spd)
589 static const char * const spd_str[] = {
594 if (spd == 0 || (spd - 1) >= ARRAY_SIZE(spd_str))
596 return spd_str[spd - 1];
599 void ata_dev_disable(struct ata_device *dev)
601 if (ata_dev_enabled(dev) && ata_msg_drv(dev->ap)) {
602 ata_dev_printk(dev, KERN_WARNING, "disabled\n");
608 * ata_devchk - PATA device presence detection
609 * @ap: ATA channel to examine
610 * @device: Device to examine (starting at zero)
612 * This technique was originally described in
613 * Hale Landis's ATADRVR (www.ata-atapi.com), and
614 * later found its way into the ATA/ATAPI spec.
616 * Write a pattern to the ATA shadow registers,
617 * and if a device is present, it will respond by
618 * correctly storing and echoing back the
619 * ATA shadow register contents.
625 static unsigned int ata_devchk(struct ata_port *ap, unsigned int device)
627 struct ata_ioports *ioaddr = &ap->ioaddr;
630 ap->ops->dev_select(ap, device);
632 iowrite8(0x55, ioaddr->nsect_addr);
633 iowrite8(0xaa, ioaddr->lbal_addr);
635 iowrite8(0xaa, ioaddr->nsect_addr);
636 iowrite8(0x55, ioaddr->lbal_addr);
638 iowrite8(0x55, ioaddr->nsect_addr);
639 iowrite8(0xaa, ioaddr->lbal_addr);
641 nsect = ioread8(ioaddr->nsect_addr);
642 lbal = ioread8(ioaddr->lbal_addr);
644 if ((nsect == 0x55) && (lbal == 0xaa))
645 return 1; /* we found a device */
647 return 0; /* nothing found */
651 * ata_dev_classify - determine device type based on ATA-spec signature
652 * @tf: ATA taskfile register set for device to be identified
654 * Determine from taskfile register contents whether a device is
655 * ATA or ATAPI, as per "Signature and persistence" section
656 * of ATA/PI spec (volume 1, sect 5.14).
662 * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, or %ATA_DEV_UNKNOWN
663 * the event of failure.
666 unsigned int ata_dev_classify(const struct ata_taskfile *tf)
668 /* Apple's open source Darwin code hints that some devices only
669 * put a proper signature into the LBA mid/high registers,
670 * So, we only check those. It's sufficient for uniqueness.
673 if (((tf->lbam == 0) && (tf->lbah == 0)) ||
674 ((tf->lbam == 0x3c) && (tf->lbah == 0xc3))) {
675 DPRINTK("found ATA device by sig\n");
679 if (((tf->lbam == 0x14) && (tf->lbah == 0xeb)) ||
680 ((tf->lbam == 0x69) && (tf->lbah == 0x96))) {
681 DPRINTK("found ATAPI device by sig\n");
682 return ATA_DEV_ATAPI;
685 DPRINTK("unknown device\n");
686 return ATA_DEV_UNKNOWN;
690 * ata_dev_try_classify - Parse returned ATA device signature
691 * @ap: ATA channel to examine
692 * @device: Device to examine (starting at zero)
693 * @r_err: Value of error register on completion
695 * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
696 * an ATA/ATAPI-defined set of values is placed in the ATA
697 * shadow registers, indicating the results of device detection
700 * Select the ATA device, and read the values from the ATA shadow
701 * registers. Then parse according to the Error register value,
702 * and the spec-defined values examined by ata_dev_classify().
708 * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE.
712 ata_dev_try_classify(struct ata_port *ap, unsigned int device, u8 *r_err)
714 struct ata_taskfile tf;
718 ap->ops->dev_select(ap, device);
720 memset(&tf, 0, sizeof(tf));
722 ap->ops->tf_read(ap, &tf);
727 /* see if device passed diags: if master then continue and warn later */
728 if (err == 0 && device == 0)
729 /* diagnostic fail : do nothing _YET_ */
730 ap->device[device].horkage |= ATA_HORKAGE_DIAGNOSTIC;
733 else if ((device == 0) && (err == 0x81))
738 /* determine if device is ATA or ATAPI */
739 class = ata_dev_classify(&tf);
741 if (class == ATA_DEV_UNKNOWN)
743 if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0))
749 * ata_id_string - Convert IDENTIFY DEVICE page into string
750 * @id: IDENTIFY DEVICE results we will examine
751 * @s: string into which data is output
752 * @ofs: offset into identify device page
753 * @len: length of string to return. must be an even number.
755 * The strings in the IDENTIFY DEVICE page are broken up into
756 * 16-bit chunks. Run through the string, and output each
757 * 8-bit chunk linearly, regardless of platform.
763 void ata_id_string(const u16 *id, unsigned char *s,
764 unsigned int ofs, unsigned int len)
783 * ata_id_c_string - Convert IDENTIFY DEVICE page into C string
784 * @id: IDENTIFY DEVICE results we will examine
785 * @s: string into which data is output
786 * @ofs: offset into identify device page
787 * @len: length of string to return. must be an odd number.
789 * This function is identical to ata_id_string except that it
790 * trims trailing spaces and terminates the resulting string with
791 * null. @len must be actual maximum length (even number) + 1.
796 void ata_id_c_string(const u16 *id, unsigned char *s,
797 unsigned int ofs, unsigned int len)
803 ata_id_string(id, s, ofs, len - 1);
805 p = s + strnlen(s, len - 1);
806 while (p > s && p[-1] == ' ')
811 static u64 ata_id_n_sectors(const u16 *id)
813 if (ata_id_has_lba(id)) {
814 if (ata_id_has_lba48(id))
815 return ata_id_u64(id, 100);
817 return ata_id_u32(id, 60);
819 if (ata_id_current_chs_valid(id))
820 return ata_id_u32(id, 57);
822 return id[1] * id[3] * id[6];
827 * ata_noop_dev_select - Select device 0/1 on ATA bus
828 * @ap: ATA channel to manipulate
829 * @device: ATA device (numbered from zero) to select
831 * This function performs no actual function.
833 * May be used as the dev_select() entry in ata_port_operations.
838 void ata_noop_dev_select (struct ata_port *ap, unsigned int device)
844 * ata_std_dev_select - Select device 0/1 on ATA bus
845 * @ap: ATA channel to manipulate
846 * @device: ATA device (numbered from zero) to select
848 * Use the method defined in the ATA specification to
849 * make either device 0, or device 1, active on the
850 * ATA channel. Works with both PIO and MMIO.
852 * May be used as the dev_select() entry in ata_port_operations.
858 void ata_std_dev_select (struct ata_port *ap, unsigned int device)
863 tmp = ATA_DEVICE_OBS;
865 tmp = ATA_DEVICE_OBS | ATA_DEV1;
867 iowrite8(tmp, ap->ioaddr.device_addr);
868 ata_pause(ap); /* needed; also flushes, for mmio */
872 * ata_dev_select - Select device 0/1 on ATA bus
873 * @ap: ATA channel to manipulate
874 * @device: ATA device (numbered from zero) to select
875 * @wait: non-zero to wait for Status register BSY bit to clear
876 * @can_sleep: non-zero if context allows sleeping
878 * Use the method defined in the ATA specification to
879 * make either device 0, or device 1, active on the
882 * This is a high-level version of ata_std_dev_select(),
883 * which additionally provides the services of inserting
884 * the proper pauses and status polling, where needed.
890 void ata_dev_select(struct ata_port *ap, unsigned int device,
891 unsigned int wait, unsigned int can_sleep)
893 if (ata_msg_probe(ap))
894 ata_port_printk(ap, KERN_INFO, "ata_dev_select: ENTER, ata%u: "
895 "device %u, wait %u\n", ap->id, device, wait);
900 ap->ops->dev_select(ap, device);
903 if (can_sleep && ap->device[device].class == ATA_DEV_ATAPI)
910 * ata_dump_id - IDENTIFY DEVICE info debugging output
911 * @id: IDENTIFY DEVICE page to dump
913 * Dump selected 16-bit words from the given IDENTIFY DEVICE
920 static inline void ata_dump_id(const u16 *id)
922 DPRINTK("49==0x%04x "
932 DPRINTK("80==0x%04x "
942 DPRINTK("88==0x%04x "
949 * ata_id_xfermask - Compute xfermask from the given IDENTIFY data
950 * @id: IDENTIFY data to compute xfer mask from
952 * Compute the xfermask for this device. This is not as trivial
953 * as it seems if we must consider early devices correctly.
955 * FIXME: pre IDE drive timing (do we care ?).
963 static unsigned int ata_id_xfermask(const u16 *id)
965 unsigned int pio_mask, mwdma_mask, udma_mask;
967 /* Usual case. Word 53 indicates word 64 is valid */
968 if (id[ATA_ID_FIELD_VALID] & (1 << 1)) {
969 pio_mask = id[ATA_ID_PIO_MODES] & 0x03;
973 /* If word 64 isn't valid then Word 51 high byte holds
974 * the PIO timing number for the maximum. Turn it into
977 u8 mode = (id[ATA_ID_OLD_PIO_MODES] >> 8) & 0xFF;
978 if (mode < 5) /* Valid PIO range */
979 pio_mask = (2 << mode) - 1;
983 /* But wait.. there's more. Design your standards by
984 * committee and you too can get a free iordy field to
985 * process. However its the speeds not the modes that
986 * are supported... Note drivers using the timing API
987 * will get this right anyway
991 mwdma_mask = id[ATA_ID_MWDMA_MODES] & 0x07;
993 if (ata_id_is_cfa(id)) {
995 * Process compact flash extended modes
997 int pio = id[163] & 0x7;
998 int dma = (id[163] >> 3) & 7;
1001 pio_mask |= (1 << 5);
1003 pio_mask |= (1 << 6);
1005 mwdma_mask |= (1 << 3);
1007 mwdma_mask |= (1 << 4);
1011 if (id[ATA_ID_FIELD_VALID] & (1 << 2))
1012 udma_mask = id[ATA_ID_UDMA_MODES] & 0xff;
1014 return ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask);
1018 * ata_port_queue_task - Queue port_task
1019 * @ap: The ata_port to queue port_task for
1020 * @fn: workqueue function to be scheduled
1021 * @data: data for @fn to use
1022 * @delay: delay time for workqueue function
1024 * Schedule @fn(@data) for execution after @delay jiffies using
1025 * port_task. There is one port_task per port and it's the
1026 * user(low level driver)'s responsibility to make sure that only
1027 * one task is active at any given time.
1029 * libata core layer takes care of synchronization between
1030 * port_task and EH. ata_port_queue_task() may be ignored for EH
1034 * Inherited from caller.
1036 void ata_port_queue_task(struct ata_port *ap, work_func_t fn, void *data,
1037 unsigned long delay)
1041 if (ap->pflags & ATA_PFLAG_FLUSH_PORT_TASK)
1044 PREPARE_DELAYED_WORK(&ap->port_task, fn);
1045 ap->port_task_data = data;
1047 rc = queue_delayed_work(ata_wq, &ap->port_task, delay);
1049 /* rc == 0 means that another user is using port task */
1054 * ata_port_flush_task - Flush port_task
1055 * @ap: The ata_port to flush port_task for
1057 * After this function completes, port_task is guranteed not to
1058 * be running or scheduled.
1061 * Kernel thread context (may sleep)
1063 void ata_port_flush_task(struct ata_port *ap)
1065 unsigned long flags;
1069 spin_lock_irqsave(ap->lock, flags);
1070 ap->pflags |= ATA_PFLAG_FLUSH_PORT_TASK;
1071 spin_unlock_irqrestore(ap->lock, flags);
1073 DPRINTK("flush #1\n");
1074 flush_workqueue(ata_wq);
1077 * At this point, if a task is running, it's guaranteed to see
1078 * the FLUSH flag; thus, it will never queue pio tasks again.
1081 if (!cancel_delayed_work(&ap->port_task)) {
1082 if (ata_msg_ctl(ap))
1083 ata_port_printk(ap, KERN_DEBUG, "%s: flush #2\n",
1085 flush_workqueue(ata_wq);
1088 spin_lock_irqsave(ap->lock, flags);
1089 ap->pflags &= ~ATA_PFLAG_FLUSH_PORT_TASK;
1090 spin_unlock_irqrestore(ap->lock, flags);
1092 if (ata_msg_ctl(ap))
1093 ata_port_printk(ap, KERN_DEBUG, "%s: EXIT\n", __FUNCTION__);
1096 static void ata_qc_complete_internal(struct ata_queued_cmd *qc)
1098 struct completion *waiting = qc->private_data;
1104 * ata_exec_internal_sg - execute libata internal command
1105 * @dev: Device to which the command is sent
1106 * @tf: Taskfile registers for the command and the result
1107 * @cdb: CDB for packet command
1108 * @dma_dir: Data tranfer direction of the command
1109 * @sg: sg list for the data buffer of the command
1110 * @n_elem: Number of sg entries
1112 * Executes libata internal command with timeout. @tf contains
1113 * command on entry and result on return. Timeout and error
1114 * conditions are reported via return value. No recovery action
1115 * is taken after a command times out. It's caller's duty to
1116 * clean up after timeout.
1119 * None. Should be called with kernel context, might sleep.
1122 * Zero on success, AC_ERR_* mask on failure
1124 unsigned ata_exec_internal_sg(struct ata_device *dev,
1125 struct ata_taskfile *tf, const u8 *cdb,
1126 int dma_dir, struct scatterlist *sg,
1127 unsigned int n_elem)
1129 struct ata_port *ap = dev->ap;
1130 u8 command = tf->command;
1131 struct ata_queued_cmd *qc;
1132 unsigned int tag, preempted_tag;
1133 u32 preempted_sactive, preempted_qc_active;
1134 DECLARE_COMPLETION_ONSTACK(wait);
1135 unsigned long flags;
1136 unsigned int err_mask;
1139 spin_lock_irqsave(ap->lock, flags);
1141 /* no internal command while frozen */
1142 if (ap->pflags & ATA_PFLAG_FROZEN) {
1143 spin_unlock_irqrestore(ap->lock, flags);
1144 return AC_ERR_SYSTEM;
1147 /* initialize internal qc */
1149 /* XXX: Tag 0 is used for drivers with legacy EH as some
1150 * drivers choke if any other tag is given. This breaks
1151 * ata_tag_internal() test for those drivers. Don't use new
1152 * EH stuff without converting to it.
1154 if (ap->ops->error_handler)
1155 tag = ATA_TAG_INTERNAL;
1159 if (test_and_set_bit(tag, &ap->qc_allocated))
1161 qc = __ata_qc_from_tag(ap, tag);
1169 preempted_tag = ap->active_tag;
1170 preempted_sactive = ap->sactive;
1171 preempted_qc_active = ap->qc_active;
1172 ap->active_tag = ATA_TAG_POISON;
1176 /* prepare & issue qc */
1179 memcpy(qc->cdb, cdb, ATAPI_CDB_LEN);
1180 qc->flags |= ATA_QCFLAG_RESULT_TF;
1181 qc->dma_dir = dma_dir;
1182 if (dma_dir != DMA_NONE) {
1183 unsigned int i, buflen = 0;
1185 for (i = 0; i < n_elem; i++)
1186 buflen += sg[i].length;
1188 ata_sg_init(qc, sg, n_elem);
1189 qc->nbytes = buflen;
1192 qc->private_data = &wait;
1193 qc->complete_fn = ata_qc_complete_internal;
1197 spin_unlock_irqrestore(ap->lock, flags);
1199 rc = wait_for_completion_timeout(&wait, ata_probe_timeout);
1201 ata_port_flush_task(ap);
1204 spin_lock_irqsave(ap->lock, flags);
1206 /* We're racing with irq here. If we lose, the
1207 * following test prevents us from completing the qc
1208 * twice. If we win, the port is frozen and will be
1209 * cleaned up by ->post_internal_cmd().
1211 if (qc->flags & ATA_QCFLAG_ACTIVE) {
1212 qc->err_mask |= AC_ERR_TIMEOUT;
1214 if (ap->ops->error_handler)
1215 ata_port_freeze(ap);
1217 ata_qc_complete(qc);
1219 if (ata_msg_warn(ap))
1220 ata_dev_printk(dev, KERN_WARNING,
1221 "qc timeout (cmd 0x%x)\n", command);
1224 spin_unlock_irqrestore(ap->lock, flags);
1227 /* do post_internal_cmd */
1228 if (ap->ops->post_internal_cmd)
1229 ap->ops->post_internal_cmd(qc);
1231 if ((qc->flags & ATA_QCFLAG_FAILED) && !qc->err_mask) {
1232 if (ata_msg_warn(ap))
1233 ata_dev_printk(dev, KERN_WARNING,
1234 "zero err_mask for failed "
1235 "internal command, assuming AC_ERR_OTHER\n");
1236 qc->err_mask |= AC_ERR_OTHER;
1240 spin_lock_irqsave(ap->lock, flags);
1242 *tf = qc->result_tf;
1243 err_mask = qc->err_mask;
1246 ap->active_tag = preempted_tag;
1247 ap->sactive = preempted_sactive;
1248 ap->qc_active = preempted_qc_active;
1250 /* XXX - Some LLDDs (sata_mv) disable port on command failure.
1251 * Until those drivers are fixed, we detect the condition
1252 * here, fail the command with AC_ERR_SYSTEM and reenable the
1255 * Note that this doesn't change any behavior as internal
1256 * command failure results in disabling the device in the
1257 * higher layer for LLDDs without new reset/EH callbacks.
1259 * Kill the following code as soon as those drivers are fixed.
1261 if (ap->flags & ATA_FLAG_DISABLED) {
1262 err_mask |= AC_ERR_SYSTEM;
1266 spin_unlock_irqrestore(ap->lock, flags);
1272 * ata_exec_internal - execute libata internal command
1273 * @dev: Device to which the command is sent
1274 * @tf: Taskfile registers for the command and the result
1275 * @cdb: CDB for packet command
1276 * @dma_dir: Data tranfer direction of the command
1277 * @buf: Data buffer of the command
1278 * @buflen: Length of data buffer
1280 * Wrapper around ata_exec_internal_sg() which takes simple
1281 * buffer instead of sg list.
1284 * None. Should be called with kernel context, might sleep.
1287 * Zero on success, AC_ERR_* mask on failure
1289 unsigned ata_exec_internal(struct ata_device *dev,
1290 struct ata_taskfile *tf, const u8 *cdb,
1291 int dma_dir, void *buf, unsigned int buflen)
1293 struct scatterlist *psg = NULL, sg;
1294 unsigned int n_elem = 0;
1296 if (dma_dir != DMA_NONE) {
1298 sg_init_one(&sg, buf, buflen);
1303 return ata_exec_internal_sg(dev, tf, cdb, dma_dir, psg, n_elem);
1307 * ata_do_simple_cmd - execute simple internal command
1308 * @dev: Device to which the command is sent
1309 * @cmd: Opcode to execute
1311 * Execute a 'simple' command, that only consists of the opcode
1312 * 'cmd' itself, without filling any other registers
1315 * Kernel thread context (may sleep).
1318 * Zero on success, AC_ERR_* mask on failure
1320 unsigned int ata_do_simple_cmd(struct ata_device *dev, u8 cmd)
1322 struct ata_taskfile tf;
1324 ata_tf_init(dev, &tf);
1327 tf.flags |= ATA_TFLAG_DEVICE;
1328 tf.protocol = ATA_PROT_NODATA;
1330 return ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
1334 * ata_pio_need_iordy - check if iordy needed
1337 * Check if the current speed of the device requires IORDY. Used
1338 * by various controllers for chip configuration.
1341 unsigned int ata_pio_need_iordy(const struct ata_device *adev)
1344 int speed = adev->pio_mode - XFER_PIO_0;
1351 /* If we have no drive specific rule, then PIO 2 is non IORDY */
1353 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE */
1354 pio = adev->id[ATA_ID_EIDE_PIO];
1355 /* Is the speed faster than the drive allows non IORDY ? */
1357 /* This is cycle times not frequency - watch the logic! */
1358 if (pio > 240) /* PIO2 is 240nS per cycle */
1367 * ata_dev_read_id - Read ID data from the specified device
1368 * @dev: target device
1369 * @p_class: pointer to class of the target device (may be changed)
1370 * @flags: ATA_READID_* flags
1371 * @id: buffer to read IDENTIFY data into
1373 * Read ID data from the specified device. ATA_CMD_ID_ATA is
1374 * performed on ATA devices and ATA_CMD_ID_ATAPI on ATAPI
1375 * devices. This function also issues ATA_CMD_INIT_DEV_PARAMS
1376 * for pre-ATA4 drives.
1379 * Kernel thread context (may sleep)
1382 * 0 on success, -errno otherwise.
1384 int ata_dev_read_id(struct ata_device *dev, unsigned int *p_class,
1385 unsigned int flags, u16 *id)
1387 struct ata_port *ap = dev->ap;
1388 unsigned int class = *p_class;
1389 struct ata_taskfile tf;
1390 unsigned int err_mask = 0;
1394 if (ata_msg_ctl(ap))
1395 ata_dev_printk(dev, KERN_DEBUG, "%s: ENTER, host %u, dev %u\n",
1396 __FUNCTION__, ap->id, dev->devno);
1398 ata_dev_select(ap, dev->devno, 1, 1); /* select device 0/1 */
1401 ata_tf_init(dev, &tf);
1405 tf.command = ATA_CMD_ID_ATA;
1408 tf.command = ATA_CMD_ID_ATAPI;
1412 reason = "unsupported class";
1416 tf.protocol = ATA_PROT_PIO;
1418 /* Some devices choke if TF registers contain garbage. Make
1419 * sure those are properly initialized.
1421 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
1423 /* Device presence detection is unreliable on some
1424 * controllers. Always poll IDENTIFY if available.
1426 tf.flags |= ATA_TFLAG_POLLING;
1428 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_FROM_DEVICE,
1429 id, sizeof(id[0]) * ATA_ID_WORDS);
1431 if (err_mask & AC_ERR_NODEV_HINT) {
1432 DPRINTK("ata%u.%d: NODEV after polling detection\n",
1433 ap->id, dev->devno);
1438 reason = "I/O error";
1442 swap_buf_le16(id, ATA_ID_WORDS);
1446 reason = "device reports illegal type";
1448 if (class == ATA_DEV_ATA) {
1449 if (!ata_id_is_ata(id) && !ata_id_is_cfa(id))
1452 if (ata_id_is_ata(id))
1456 if ((flags & ATA_READID_POSTRESET) && class == ATA_DEV_ATA) {
1458 * The exact sequence expected by certain pre-ATA4 drives is:
1461 * INITIALIZE DEVICE PARAMETERS
1463 * Some drives were very specific about that exact sequence.
1465 if (ata_id_major_version(id) < 4 || !ata_id_has_lba(id)) {
1466 err_mask = ata_dev_init_params(dev, id[3], id[6]);
1469 reason = "INIT_DEV_PARAMS failed";
1473 /* current CHS translation info (id[53-58]) might be
1474 * changed. reread the identify device info.
1476 flags &= ~ATA_READID_POSTRESET;
1486 if (ata_msg_warn(ap))
1487 ata_dev_printk(dev, KERN_WARNING, "failed to IDENTIFY "
1488 "(%s, err_mask=0x%x)\n", reason, err_mask);
1492 static inline u8 ata_dev_knobble(struct ata_device *dev)
1494 return ((dev->ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(dev->id)));
1497 static void ata_dev_config_ncq(struct ata_device *dev,
1498 char *desc, size_t desc_sz)
1500 struct ata_port *ap = dev->ap;
1501 int hdepth = 0, ddepth = ata_id_queue_depth(dev->id);
1503 if (!ata_id_has_ncq(dev->id)) {
1507 if (ata_device_blacklisted(dev) & ATA_HORKAGE_NONCQ) {
1508 snprintf(desc, desc_sz, "NCQ (not used)");
1511 if (ap->flags & ATA_FLAG_NCQ) {
1512 hdepth = min(ap->scsi_host->can_queue, ATA_MAX_QUEUE - 1);
1513 dev->flags |= ATA_DFLAG_NCQ;
1516 if (hdepth >= ddepth)
1517 snprintf(desc, desc_sz, "NCQ (depth %d)", ddepth);
1519 snprintf(desc, desc_sz, "NCQ (depth %d/%d)", hdepth, ddepth);
1522 static void ata_set_port_max_cmd_len(struct ata_port *ap)
1526 if (ap->scsi_host) {
1527 unsigned int len = 0;
1529 for (i = 0; i < ATA_MAX_DEVICES; i++)
1530 len = max(len, ap->device[i].cdb_len);
1532 ap->scsi_host->max_cmd_len = len;
1537 * ata_dev_configure - Configure the specified ATA/ATAPI device
1538 * @dev: Target device to configure
1540 * Configure @dev according to @dev->id. Generic and low-level
1541 * driver specific fixups are also applied.
1544 * Kernel thread context (may sleep)
1547 * 0 on success, -errno otherwise
1549 int ata_dev_configure(struct ata_device *dev)
1551 struct ata_port *ap = dev->ap;
1552 int print_info = ap->eh_context.i.flags & ATA_EHI_PRINTINFO;
1553 const u16 *id = dev->id;
1554 unsigned int xfer_mask;
1555 char revbuf[7]; /* XYZ-99\0 */
1556 char fwrevbuf[ATA_ID_FW_REV_LEN+1];
1557 char modelbuf[ATA_ID_PROD_LEN+1];
1560 if (!ata_dev_enabled(dev) && ata_msg_info(ap)) {
1561 ata_dev_printk(dev, KERN_INFO,
1562 "%s: ENTER/EXIT (host %u, dev %u) -- nodev\n",
1563 __FUNCTION__, ap->id, dev->devno);
1567 if (ata_msg_probe(ap))
1568 ata_dev_printk(dev, KERN_DEBUG, "%s: ENTER, host %u, dev %u\n",
1569 __FUNCTION__, ap->id, dev->devno);
1572 rc = ata_acpi_push_id(ap, dev->devno);
1574 ata_dev_printk(dev, KERN_WARNING, "failed to set _SDD(%d)\n",
1578 /* retrieve and execute the ATA task file of _GTF */
1579 ata_acpi_exec_tfs(ap);
1581 /* print device capabilities */
1582 if (ata_msg_probe(ap))
1583 ata_dev_printk(dev, KERN_DEBUG,
1584 "%s: cfg 49:%04x 82:%04x 83:%04x 84:%04x "
1585 "85:%04x 86:%04x 87:%04x 88:%04x\n",
1587 id[49], id[82], id[83], id[84],
1588 id[85], id[86], id[87], id[88]);
1590 /* initialize to-be-configured parameters */
1591 dev->flags &= ~ATA_DFLAG_CFG_MASK;
1592 dev->max_sectors = 0;
1600 * common ATA, ATAPI feature tests
1603 /* find max transfer mode; for printk only */
1604 xfer_mask = ata_id_xfermask(id);
1606 if (ata_msg_probe(ap))
1609 /* ATA-specific feature tests */
1610 if (dev->class == ATA_DEV_ATA) {
1611 if (ata_id_is_cfa(id)) {
1612 if (id[162] & 1) /* CPRM may make this media unusable */
1613 ata_dev_printk(dev, KERN_WARNING, "ata%u: device %u supports DRM functions and may not be fully accessable.\n",
1614 ap->id, dev->devno);
1615 snprintf(revbuf, 7, "CFA");
1618 snprintf(revbuf, 7, "ATA-%d", ata_id_major_version(id));
1620 dev->n_sectors = ata_id_n_sectors(id);
1622 /* SCSI only uses 4-char revisions, dump full 8 chars from ATA */
1623 ata_id_c_string(dev->id, fwrevbuf, ATA_ID_FW_REV,
1626 ata_id_c_string(dev->id, modelbuf, ATA_ID_PROD,
1629 if (dev->id[59] & 0x100)
1630 dev->multi_count = dev->id[59] & 0xff;
1632 if (ata_id_has_lba(id)) {
1633 const char *lba_desc;
1637 dev->flags |= ATA_DFLAG_LBA;
1638 if (ata_id_has_lba48(id)) {
1639 dev->flags |= ATA_DFLAG_LBA48;
1642 if (dev->n_sectors >= (1UL << 28) &&
1643 ata_id_has_flush_ext(id))
1644 dev->flags |= ATA_DFLAG_FLUSH_EXT;
1648 ata_dev_config_ncq(dev, ncq_desc, sizeof(ncq_desc));
1650 /* print device info to dmesg */
1651 if (ata_msg_drv(ap) && print_info) {
1652 ata_dev_printk(dev, KERN_INFO,
1653 "%s: %s, %s, max %s\n",
1654 revbuf, modelbuf, fwrevbuf,
1655 ata_mode_string(xfer_mask));
1656 ata_dev_printk(dev, KERN_INFO,
1657 "%Lu sectors, multi %u: %s %s\n",
1658 (unsigned long long)dev->n_sectors,
1659 dev->multi_count, lba_desc, ncq_desc);
1664 /* Default translation */
1665 dev->cylinders = id[1];
1667 dev->sectors = id[6];
1669 if (ata_id_current_chs_valid(id)) {
1670 /* Current CHS translation is valid. */
1671 dev->cylinders = id[54];
1672 dev->heads = id[55];
1673 dev->sectors = id[56];
1676 /* print device info to dmesg */
1677 if (ata_msg_drv(ap) && print_info) {
1678 ata_dev_printk(dev, KERN_INFO,
1679 "%s: %s, %s, max %s\n",
1680 revbuf, modelbuf, fwrevbuf,
1681 ata_mode_string(xfer_mask));
1682 ata_dev_printk(dev, KERN_INFO,
1683 "%Lu sectors, multi %u, CHS %u/%u/%u\n",
1684 (unsigned long long)dev->n_sectors,
1685 dev->multi_count, dev->cylinders,
1686 dev->heads, dev->sectors);
1693 /* ATAPI-specific feature tests */
1694 else if (dev->class == ATA_DEV_ATAPI) {
1695 char *cdb_intr_string = "";
1697 rc = atapi_cdb_len(id);
1698 if ((rc < 12) || (rc > ATAPI_CDB_LEN)) {
1699 if (ata_msg_warn(ap))
1700 ata_dev_printk(dev, KERN_WARNING,
1701 "unsupported CDB len\n");
1705 dev->cdb_len = (unsigned int) rc;
1707 if (ata_id_cdb_intr(dev->id)) {
1708 dev->flags |= ATA_DFLAG_CDB_INTR;
1709 cdb_intr_string = ", CDB intr";
1712 /* print device info to dmesg */
1713 if (ata_msg_drv(ap) && print_info)
1714 ata_dev_printk(dev, KERN_INFO, "ATAPI, max %s%s\n",
1715 ata_mode_string(xfer_mask),
1719 /* determine max_sectors */
1720 dev->max_sectors = ATA_MAX_SECTORS;
1721 if (dev->flags & ATA_DFLAG_LBA48)
1722 dev->max_sectors = ATA_MAX_SECTORS_LBA48;
1724 if (dev->horkage & ATA_HORKAGE_DIAGNOSTIC) {
1725 /* Let the user know. We don't want to disallow opens for
1726 rescue purposes, or in case the vendor is just a blithering
1729 ata_dev_printk(dev, KERN_WARNING,
1730 "Drive reports diagnostics failure. This may indicate a drive\n");
1731 ata_dev_printk(dev, KERN_WARNING,
1732 "fault or invalid emulation. Contact drive vendor for information.\n");
1736 ata_set_port_max_cmd_len(ap);
1738 /* limit bridge transfers to udma5, 200 sectors */
1739 if (ata_dev_knobble(dev)) {
1740 if (ata_msg_drv(ap) && print_info)
1741 ata_dev_printk(dev, KERN_INFO,
1742 "applying bridge limits\n");
1743 dev->udma_mask &= ATA_UDMA5;
1744 dev->max_sectors = ATA_MAX_SECTORS;
1747 if (ap->ops->dev_config)
1748 ap->ops->dev_config(ap, dev);
1750 if (ata_msg_probe(ap))
1751 ata_dev_printk(dev, KERN_DEBUG, "%s: EXIT, drv_stat = 0x%x\n",
1752 __FUNCTION__, ata_chk_status(ap));
1756 if (ata_msg_probe(ap))
1757 ata_dev_printk(dev, KERN_DEBUG,
1758 "%s: EXIT, err\n", __FUNCTION__);
1763 * ata_bus_probe - Reset and probe ATA bus
1766 * Master ATA bus probing function. Initiates a hardware-dependent
1767 * bus reset, then attempts to identify any devices found on
1771 * PCI/etc. bus probe sem.
1774 * Zero on success, negative errno otherwise.
1777 int ata_bus_probe(struct ata_port *ap)
1779 unsigned int classes[ATA_MAX_DEVICES];
1780 int tries[ATA_MAX_DEVICES];
1781 int i, rc, down_xfermask;
1782 struct ata_device *dev;
1786 for (i = 0; i < ATA_MAX_DEVICES; i++)
1787 tries[i] = ATA_PROBE_MAX_TRIES;
1792 /* reset and determine device classes */
1793 ap->ops->phy_reset(ap);
1795 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1796 dev = &ap->device[i];
1798 if (!(ap->flags & ATA_FLAG_DISABLED) &&
1799 dev->class != ATA_DEV_UNKNOWN)
1800 classes[dev->devno] = dev->class;
1802 classes[dev->devno] = ATA_DEV_NONE;
1804 dev->class = ATA_DEV_UNKNOWN;
1809 /* after the reset the device state is PIO 0 and the controller
1810 state is undefined. Record the mode */
1812 for (i = 0; i < ATA_MAX_DEVICES; i++)
1813 ap->device[i].pio_mode = XFER_PIO_0;
1815 /* read IDENTIFY page and configure devices */
1816 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1817 dev = &ap->device[i];
1820 dev->class = classes[i];
1822 if (!ata_dev_enabled(dev))
1825 rc = ata_dev_read_id(dev, &dev->class, ATA_READID_POSTRESET,
1830 ap->eh_context.i.flags |= ATA_EHI_PRINTINFO;
1831 rc = ata_dev_configure(dev);
1832 ap->eh_context.i.flags &= ~ATA_EHI_PRINTINFO;
1837 /* configure transfer mode */
1838 rc = ata_set_mode(ap, &dev);
1844 for (i = 0; i < ATA_MAX_DEVICES; i++)
1845 if (ata_dev_enabled(&ap->device[i]))
1848 /* no device present, disable port */
1849 ata_port_disable(ap);
1850 ap->ops->port_disable(ap);
1857 tries[dev->devno] = 0;
1860 sata_down_spd_limit(ap);
1863 tries[dev->devno]--;
1864 if (down_xfermask &&
1865 ata_down_xfermask_limit(dev, tries[dev->devno] == 1))
1866 tries[dev->devno] = 0;
1869 if (!tries[dev->devno]) {
1870 ata_down_xfermask_limit(dev, 1);
1871 ata_dev_disable(dev);
1878 * ata_port_probe - Mark port as enabled
1879 * @ap: Port for which we indicate enablement
1881 * Modify @ap data structure such that the system
1882 * thinks that the entire port is enabled.
1884 * LOCKING: host lock, or some other form of
1888 void ata_port_probe(struct ata_port *ap)
1890 ap->flags &= ~ATA_FLAG_DISABLED;
1894 * sata_print_link_status - Print SATA link status
1895 * @ap: SATA port to printk link status about
1897 * This function prints link speed and status of a SATA link.
1902 static void sata_print_link_status(struct ata_port *ap)
1904 u32 sstatus, scontrol, tmp;
1906 if (sata_scr_read(ap, SCR_STATUS, &sstatus))
1908 sata_scr_read(ap, SCR_CONTROL, &scontrol);
1910 if (ata_port_online(ap)) {
1911 tmp = (sstatus >> 4) & 0xf;
1912 ata_port_printk(ap, KERN_INFO,
1913 "SATA link up %s (SStatus %X SControl %X)\n",
1914 sata_spd_string(tmp), sstatus, scontrol);
1916 ata_port_printk(ap, KERN_INFO,
1917 "SATA link down (SStatus %X SControl %X)\n",
1923 * __sata_phy_reset - Wake/reset a low-level SATA PHY
1924 * @ap: SATA port associated with target SATA PHY.
1926 * This function issues commands to standard SATA Sxxx
1927 * PHY registers, to wake up the phy (and device), and
1928 * clear any reset condition.
1931 * PCI/etc. bus probe sem.
1934 void __sata_phy_reset(struct ata_port *ap)
1937 unsigned long timeout = jiffies + (HZ * 5);
1939 if (ap->flags & ATA_FLAG_SATA_RESET) {
1940 /* issue phy wake/reset */
1941 sata_scr_write_flush(ap, SCR_CONTROL, 0x301);
1942 /* Couldn't find anything in SATA I/II specs, but
1943 * AHCI-1.1 10.4.2 says at least 1 ms. */
1946 /* phy wake/clear reset */
1947 sata_scr_write_flush(ap, SCR_CONTROL, 0x300);
1949 /* wait for phy to become ready, if necessary */
1952 sata_scr_read(ap, SCR_STATUS, &sstatus);
1953 if ((sstatus & 0xf) != 1)
1955 } while (time_before(jiffies, timeout));
1957 /* print link status */
1958 sata_print_link_status(ap);
1960 /* TODO: phy layer with polling, timeouts, etc. */
1961 if (!ata_port_offline(ap))
1964 ata_port_disable(ap);
1966 if (ap->flags & ATA_FLAG_DISABLED)
1969 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
1970 ata_port_disable(ap);
1974 ap->cbl = ATA_CBL_SATA;
1978 * sata_phy_reset - Reset SATA bus.
1979 * @ap: SATA port associated with target SATA PHY.
1981 * This function resets the SATA bus, and then probes
1982 * the bus for devices.
1985 * PCI/etc. bus probe sem.
1988 void sata_phy_reset(struct ata_port *ap)
1990 __sata_phy_reset(ap);
1991 if (ap->flags & ATA_FLAG_DISABLED)
1997 * ata_dev_pair - return other device on cable
2000 * Obtain the other device on the same cable, or if none is
2001 * present NULL is returned
2004 struct ata_device *ata_dev_pair(struct ata_device *adev)
2006 struct ata_port *ap = adev->ap;
2007 struct ata_device *pair = &ap->device[1 - adev->devno];
2008 if (!ata_dev_enabled(pair))
2014 * ata_port_disable - Disable port.
2015 * @ap: Port to be disabled.
2017 * Modify @ap data structure such that the system
2018 * thinks that the entire port is disabled, and should
2019 * never attempt to probe or communicate with devices
2022 * LOCKING: host lock, or some other form of
2026 void ata_port_disable(struct ata_port *ap)
2028 ap->device[0].class = ATA_DEV_NONE;
2029 ap->device[1].class = ATA_DEV_NONE;
2030 ap->flags |= ATA_FLAG_DISABLED;
2034 * sata_down_spd_limit - adjust SATA spd limit downward
2035 * @ap: Port to adjust SATA spd limit for
2037 * Adjust SATA spd limit of @ap downward. Note that this
2038 * function only adjusts the limit. The change must be applied
2039 * using sata_set_spd().
2042 * Inherited from caller.
2045 * 0 on success, negative errno on failure
2047 int sata_down_spd_limit(struct ata_port *ap)
2049 u32 sstatus, spd, mask;
2052 rc = sata_scr_read(ap, SCR_STATUS, &sstatus);
2056 mask = ap->sata_spd_limit;
2059 highbit = fls(mask) - 1;
2060 mask &= ~(1 << highbit);
2062 spd = (sstatus >> 4) & 0xf;
2066 mask &= (1 << spd) - 1;
2070 ap->sata_spd_limit = mask;
2072 ata_port_printk(ap, KERN_WARNING, "limiting SATA link speed to %s\n",
2073 sata_spd_string(fls(mask)));
2078 static int __sata_set_spd_needed(struct ata_port *ap, u32 *scontrol)
2082 if (ap->sata_spd_limit == UINT_MAX)
2085 limit = fls(ap->sata_spd_limit);
2087 spd = (*scontrol >> 4) & 0xf;
2088 *scontrol = (*scontrol & ~0xf0) | ((limit & 0xf) << 4);
2090 return spd != limit;
2094 * sata_set_spd_needed - is SATA spd configuration needed
2095 * @ap: Port in question
2097 * Test whether the spd limit in SControl matches
2098 * @ap->sata_spd_limit. This function is used to determine
2099 * whether hardreset is necessary to apply SATA spd
2103 * Inherited from caller.
2106 * 1 if SATA spd configuration is needed, 0 otherwise.
2108 int sata_set_spd_needed(struct ata_port *ap)
2112 if (sata_scr_read(ap, SCR_CONTROL, &scontrol))
2115 return __sata_set_spd_needed(ap, &scontrol);
2119 * sata_set_spd - set SATA spd according to spd limit
2120 * @ap: Port to set SATA spd for
2122 * Set SATA spd of @ap according to sata_spd_limit.
2125 * Inherited from caller.
2128 * 0 if spd doesn't need to be changed, 1 if spd has been
2129 * changed. Negative errno if SCR registers are inaccessible.
2131 int sata_set_spd(struct ata_port *ap)
2136 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
2139 if (!__sata_set_spd_needed(ap, &scontrol))
2142 if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol)))
2149 * This mode timing computation functionality is ported over from
2150 * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik
2153 * PIO 0-4, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
2154 * These were taken from ATA/ATAPI-6 standard, rev 0a, except
2155 * for UDMA6, which is currently supported only by Maxtor drives.
2157 * For PIO 5/6 MWDMA 3/4 see the CFA specification 3.0.
2160 static const struct ata_timing ata_timing[] = {
2162 { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 },
2163 { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 },
2164 { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 },
2165 { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 },
2167 { XFER_MW_DMA_4, 25, 0, 0, 0, 55, 20, 80, 0 },
2168 { XFER_MW_DMA_3, 25, 0, 0, 0, 65, 25, 100, 0 },
2169 { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 },
2170 { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 },
2171 { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 },
2173 /* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */
2175 { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 },
2176 { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 },
2177 { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 },
2179 { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 },
2180 { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 },
2181 { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 },
2183 { XFER_PIO_6, 10, 55, 20, 80, 55, 20, 80, 0 },
2184 { XFER_PIO_5, 15, 65, 25, 100, 65, 25, 100, 0 },
2185 { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 },
2186 { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 },
2188 { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 },
2189 { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 },
2190 { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 },
2192 /* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */
2197 #define ENOUGH(v,unit) (((v)-1)/(unit)+1)
2198 #define EZ(v,unit) ((v)?ENOUGH(v,unit):0)
2200 static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT)
2202 q->setup = EZ(t->setup * 1000, T);
2203 q->act8b = EZ(t->act8b * 1000, T);
2204 q->rec8b = EZ(t->rec8b * 1000, T);
2205 q->cyc8b = EZ(t->cyc8b * 1000, T);
2206 q->active = EZ(t->active * 1000, T);
2207 q->recover = EZ(t->recover * 1000, T);
2208 q->cycle = EZ(t->cycle * 1000, T);
2209 q->udma = EZ(t->udma * 1000, UT);
2212 void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b,
2213 struct ata_timing *m, unsigned int what)
2215 if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup);
2216 if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b);
2217 if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b);
2218 if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b);
2219 if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active);
2220 if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover);
2221 if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle);
2222 if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma);
2225 static const struct ata_timing* ata_timing_find_mode(unsigned short speed)
2227 const struct ata_timing *t;
2229 for (t = ata_timing; t->mode != speed; t++)
2230 if (t->mode == 0xFF)
2235 int ata_timing_compute(struct ata_device *adev, unsigned short speed,
2236 struct ata_timing *t, int T, int UT)
2238 const struct ata_timing *s;
2239 struct ata_timing p;
2245 if (!(s = ata_timing_find_mode(speed)))
2248 memcpy(t, s, sizeof(*s));
2251 * If the drive is an EIDE drive, it can tell us it needs extended
2252 * PIO/MW_DMA cycle timing.
2255 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
2256 memset(&p, 0, sizeof(p));
2257 if(speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) {
2258 if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO];
2259 else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY];
2260 } else if(speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) {
2261 p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN];
2263 ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B);
2267 * Convert the timing to bus clock counts.
2270 ata_timing_quantize(t, t, T, UT);
2273 * Even in DMA/UDMA modes we still use PIO access for IDENTIFY,
2274 * S.M.A.R.T * and some other commands. We have to ensure that the
2275 * DMA cycle timing is slower/equal than the fastest PIO timing.
2278 if (speed > XFER_PIO_6) {
2279 ata_timing_compute(adev, adev->pio_mode, &p, T, UT);
2280 ata_timing_merge(&p, t, t, ATA_TIMING_ALL);
2284 * Lengthen active & recovery time so that cycle time is correct.
2287 if (t->act8b + t->rec8b < t->cyc8b) {
2288 t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2;
2289 t->rec8b = t->cyc8b - t->act8b;
2292 if (t->active + t->recover < t->cycle) {
2293 t->active += (t->cycle - (t->active + t->recover)) / 2;
2294 t->recover = t->cycle - t->active;
2301 * ata_down_xfermask_limit - adjust dev xfer masks downward
2302 * @dev: Device to adjust xfer masks
2303 * @force_pio0: Force PIO0
2305 * Adjust xfer masks of @dev downward. Note that this function
2306 * does not apply the change. Invoking ata_set_mode() afterwards
2307 * will apply the limit.
2310 * Inherited from caller.
2313 * 0 on success, negative errno on failure
2315 int ata_down_xfermask_limit(struct ata_device *dev, int force_pio0)
2317 unsigned long xfer_mask;
2320 xfer_mask = ata_pack_xfermask(dev->pio_mask, dev->mwdma_mask,
2325 /* don't gear down to MWDMA from UDMA, go directly to PIO */
2326 if (xfer_mask & ATA_MASK_UDMA)
2327 xfer_mask &= ~ATA_MASK_MWDMA;
2329 highbit = fls(xfer_mask) - 1;
2330 xfer_mask &= ~(1 << highbit);
2332 xfer_mask &= 1 << ATA_SHIFT_PIO;
2336 ata_unpack_xfermask(xfer_mask, &dev->pio_mask, &dev->mwdma_mask,
2339 ata_dev_printk(dev, KERN_WARNING, "limiting speed to %s\n",
2340 ata_mode_string(xfer_mask));
2348 static int ata_dev_set_mode(struct ata_device *dev)
2350 struct ata_eh_context *ehc = &dev->ap->eh_context;
2351 unsigned int err_mask;
2354 dev->flags &= ~ATA_DFLAG_PIO;
2355 if (dev->xfer_shift == ATA_SHIFT_PIO)
2356 dev->flags |= ATA_DFLAG_PIO;
2358 err_mask = ata_dev_set_xfermode(dev);
2359 /* Old CFA may refuse this command, which is just fine */
2360 if (dev->xfer_shift == ATA_SHIFT_PIO && ata_id_is_cfa(dev->id))
2361 err_mask &= ~AC_ERR_DEV;
2364 ata_dev_printk(dev, KERN_ERR, "failed to set xfermode "
2365 "(err_mask=0x%x)\n", err_mask);
2369 ehc->i.flags |= ATA_EHI_POST_SETMODE;
2370 rc = ata_dev_revalidate(dev, 0);
2371 ehc->i.flags &= ~ATA_EHI_POST_SETMODE;
2375 DPRINTK("xfer_shift=%u, xfer_mode=0x%x\n",
2376 dev->xfer_shift, (int)dev->xfer_mode);
2378 ata_dev_printk(dev, KERN_INFO, "configured for %s\n",
2379 ata_mode_string(ata_xfer_mode2mask(dev->xfer_mode)));
2384 * ata_set_mode - Program timings and issue SET FEATURES - XFER
2385 * @ap: port on which timings will be programmed
2386 * @r_failed_dev: out paramter for failed device
2388 * Set ATA device disk transfer mode (PIO3, UDMA6, etc.). If
2389 * ata_set_mode() fails, pointer to the failing device is
2390 * returned in @r_failed_dev.
2393 * PCI/etc. bus probe sem.
2396 * 0 on success, negative errno otherwise
2398 int ata_set_mode(struct ata_port *ap, struct ata_device **r_failed_dev)
2400 struct ata_device *dev;
2401 int i, rc = 0, used_dma = 0, found = 0;
2403 /* has private set_mode? */
2404 if (ap->ops->set_mode)
2405 return ap->ops->set_mode(ap, r_failed_dev);
2407 /* step 1: calculate xfer_mask */
2408 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2409 unsigned int pio_mask, dma_mask;
2411 dev = &ap->device[i];
2413 if (!ata_dev_enabled(dev))
2416 ata_dev_xfermask(dev);
2418 pio_mask = ata_pack_xfermask(dev->pio_mask, 0, 0);
2419 dma_mask = ata_pack_xfermask(0, dev->mwdma_mask, dev->udma_mask);
2420 dev->pio_mode = ata_xfer_mask2mode(pio_mask);
2421 dev->dma_mode = ata_xfer_mask2mode(dma_mask);
2430 /* step 2: always set host PIO timings */
2431 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2432 dev = &ap->device[i];
2433 if (!ata_dev_enabled(dev))
2436 if (!dev->pio_mode) {
2437 ata_dev_printk(dev, KERN_WARNING, "no PIO support\n");
2442 dev->xfer_mode = dev->pio_mode;
2443 dev->xfer_shift = ATA_SHIFT_PIO;
2444 if (ap->ops->set_piomode)
2445 ap->ops->set_piomode(ap, dev);
2448 /* step 3: set host DMA timings */
2449 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2450 dev = &ap->device[i];
2452 if (!ata_dev_enabled(dev) || !dev->dma_mode)
2455 dev->xfer_mode = dev->dma_mode;
2456 dev->xfer_shift = ata_xfer_mode2shift(dev->dma_mode);
2457 if (ap->ops->set_dmamode)
2458 ap->ops->set_dmamode(ap, dev);
2461 /* step 4: update devices' xfer mode */
2462 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2463 dev = &ap->device[i];
2465 /* don't update suspended devices' xfer mode */
2466 if (!ata_dev_ready(dev))
2469 rc = ata_dev_set_mode(dev);
2474 /* Record simplex status. If we selected DMA then the other
2475 * host channels are not permitted to do so.
2477 if (used_dma && (ap->host->flags & ATA_HOST_SIMPLEX))
2478 ap->host->simplex_claimed = 1;
2480 /* step5: chip specific finalisation */
2481 if (ap->ops->post_set_mode)
2482 ap->ops->post_set_mode(ap);
2486 *r_failed_dev = dev;
2491 * ata_tf_to_host - issue ATA taskfile to host controller
2492 * @ap: port to which command is being issued
2493 * @tf: ATA taskfile register set
2495 * Issues ATA taskfile register set to ATA host controller,
2496 * with proper synchronization with interrupt handler and
2500 * spin_lock_irqsave(host lock)
2503 static inline void ata_tf_to_host(struct ata_port *ap,
2504 const struct ata_taskfile *tf)
2506 ap->ops->tf_load(ap, tf);
2507 ap->ops->exec_command(ap, tf);
2511 * ata_busy_sleep - sleep until BSY clears, or timeout
2512 * @ap: port containing status register to be polled
2513 * @tmout_pat: impatience timeout
2514 * @tmout: overall timeout
2516 * Sleep until ATA Status register bit BSY clears,
2517 * or a timeout occurs.
2520 * Kernel thread context (may sleep).
2523 * 0 on success, -errno otherwise.
2525 int ata_busy_sleep(struct ata_port *ap,
2526 unsigned long tmout_pat, unsigned long tmout)
2528 unsigned long timer_start, timeout;
2531 status = ata_busy_wait(ap, ATA_BUSY, 300);
2532 timer_start = jiffies;
2533 timeout = timer_start + tmout_pat;
2534 while (status != 0xff && (status & ATA_BUSY) &&
2535 time_before(jiffies, timeout)) {
2537 status = ata_busy_wait(ap, ATA_BUSY, 3);
2540 if (status != 0xff && (status & ATA_BUSY))
2541 ata_port_printk(ap, KERN_WARNING,
2542 "port is slow to respond, please be patient "
2543 "(Status 0x%x)\n", status);
2545 timeout = timer_start + tmout;
2546 while (status != 0xff && (status & ATA_BUSY) &&
2547 time_before(jiffies, timeout)) {
2549 status = ata_chk_status(ap);
2555 if (status & ATA_BUSY) {
2556 ata_port_printk(ap, KERN_ERR, "port failed to respond "
2557 "(%lu secs, Status 0x%x)\n",
2558 tmout / HZ, status);
2565 static void ata_bus_post_reset(struct ata_port *ap, unsigned int devmask)
2567 struct ata_ioports *ioaddr = &ap->ioaddr;
2568 unsigned int dev0 = devmask & (1 << 0);
2569 unsigned int dev1 = devmask & (1 << 1);
2570 unsigned long timeout;
2572 /* if device 0 was found in ata_devchk, wait for its
2576 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2578 /* if device 1 was found in ata_devchk, wait for
2579 * register access, then wait for BSY to clear
2581 timeout = jiffies + ATA_TMOUT_BOOT;
2585 ap->ops->dev_select(ap, 1);
2586 nsect = ioread8(ioaddr->nsect_addr);
2587 lbal = ioread8(ioaddr->lbal_addr);
2588 if ((nsect == 1) && (lbal == 1))
2590 if (time_after(jiffies, timeout)) {
2594 msleep(50); /* give drive a breather */
2597 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2599 /* is all this really necessary? */
2600 ap->ops->dev_select(ap, 0);
2602 ap->ops->dev_select(ap, 1);
2604 ap->ops->dev_select(ap, 0);
2607 static unsigned int ata_bus_softreset(struct ata_port *ap,
2608 unsigned int devmask)
2610 struct ata_ioports *ioaddr = &ap->ioaddr;
2612 DPRINTK("ata%u: bus reset via SRST\n", ap->id);
2614 /* software reset. causes dev0 to be selected */
2615 iowrite8(ap->ctl, ioaddr->ctl_addr);
2616 udelay(20); /* FIXME: flush */
2617 iowrite8(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
2618 udelay(20); /* FIXME: flush */
2619 iowrite8(ap->ctl, ioaddr->ctl_addr);
2621 /* spec mandates ">= 2ms" before checking status.
2622 * We wait 150ms, because that was the magic delay used for
2623 * ATAPI devices in Hale Landis's ATADRVR, for the period of time
2624 * between when the ATA command register is written, and then
2625 * status is checked. Because waiting for "a while" before
2626 * checking status is fine, post SRST, we perform this magic
2627 * delay here as well.
2629 * Old drivers/ide uses the 2mS rule and then waits for ready
2633 /* Before we perform post reset processing we want to see if
2634 * the bus shows 0xFF because the odd clown forgets the D7
2635 * pulldown resistor.
2637 if (ata_check_status(ap) == 0xFF)
2640 ata_bus_post_reset(ap, devmask);
2646 * ata_bus_reset - reset host port and associated ATA channel
2647 * @ap: port to reset
2649 * This is typically the first time we actually start issuing
2650 * commands to the ATA channel. We wait for BSY to clear, then
2651 * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its
2652 * result. Determine what devices, if any, are on the channel
2653 * by looking at the device 0/1 error register. Look at the signature
2654 * stored in each device's taskfile registers, to determine if
2655 * the device is ATA or ATAPI.
2658 * PCI/etc. bus probe sem.
2659 * Obtains host lock.
2662 * Sets ATA_FLAG_DISABLED if bus reset fails.
2665 void ata_bus_reset(struct ata_port *ap)
2667 struct ata_ioports *ioaddr = &ap->ioaddr;
2668 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2670 unsigned int dev0, dev1 = 0, devmask = 0;
2672 DPRINTK("ENTER, host %u, port %u\n", ap->id, ap->port_no);
2674 /* determine if device 0/1 are present */
2675 if (ap->flags & ATA_FLAG_SATA_RESET)
2678 dev0 = ata_devchk(ap, 0);
2680 dev1 = ata_devchk(ap, 1);
2684 devmask |= (1 << 0);
2686 devmask |= (1 << 1);
2688 /* select device 0 again */
2689 ap->ops->dev_select(ap, 0);
2691 /* issue bus reset */
2692 if (ap->flags & ATA_FLAG_SRST)
2693 if (ata_bus_softreset(ap, devmask))
2697 * determine by signature whether we have ATA or ATAPI devices
2699 ap->device[0].class = ata_dev_try_classify(ap, 0, &err);
2700 if ((slave_possible) && (err != 0x81))
2701 ap->device[1].class = ata_dev_try_classify(ap, 1, &err);
2703 /* re-enable interrupts */
2704 ap->ops->irq_on(ap);
2706 /* is double-select really necessary? */
2707 if (ap->device[1].class != ATA_DEV_NONE)
2708 ap->ops->dev_select(ap, 1);
2709 if (ap->device[0].class != ATA_DEV_NONE)
2710 ap->ops->dev_select(ap, 0);
2712 /* if no devices were detected, disable this port */
2713 if ((ap->device[0].class == ATA_DEV_NONE) &&
2714 (ap->device[1].class == ATA_DEV_NONE))
2717 if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) {
2718 /* set up device control for ATA_FLAG_SATA_RESET */
2719 iowrite8(ap->ctl, ioaddr->ctl_addr);
2726 ata_port_printk(ap, KERN_ERR, "disabling port\n");
2727 ap->ops->port_disable(ap);
2733 * sata_phy_debounce - debounce SATA phy status
2734 * @ap: ATA port to debounce SATA phy status for
2735 * @params: timing parameters { interval, duratinon, timeout } in msec
2737 * Make sure SStatus of @ap reaches stable state, determined by
2738 * holding the same value where DET is not 1 for @duration polled
2739 * every @interval, before @timeout. Timeout constraints the
2740 * beginning of the stable state. Because, after hot unplugging,
2741 * DET gets stuck at 1 on some controllers, this functions waits
2742 * until timeout then returns 0 if DET is stable at 1.
2745 * Kernel thread context (may sleep)
2748 * 0 on success, -errno on failure.
2750 int sata_phy_debounce(struct ata_port *ap, const unsigned long *params)
2752 unsigned long interval_msec = params[0];
2753 unsigned long duration = params[1] * HZ / 1000;
2754 unsigned long timeout = jiffies + params[2] * HZ / 1000;
2755 unsigned long last_jiffies;
2759 if ((rc = sata_scr_read(ap, SCR_STATUS, &cur)))
2764 last_jiffies = jiffies;
2767 msleep(interval_msec);
2768 if ((rc = sata_scr_read(ap, SCR_STATUS, &cur)))
2774 if (cur == 1 && time_before(jiffies, timeout))
2776 if (time_after(jiffies, last_jiffies + duration))
2781 /* unstable, start over */
2783 last_jiffies = jiffies;
2786 if (time_after(jiffies, timeout))
2792 * sata_phy_resume - resume SATA phy
2793 * @ap: ATA port to resume SATA phy for
2794 * @params: timing parameters { interval, duratinon, timeout } in msec
2796 * Resume SATA phy of @ap and debounce it.
2799 * Kernel thread context (may sleep)
2802 * 0 on success, -errno on failure.
2804 int sata_phy_resume(struct ata_port *ap, const unsigned long *params)
2809 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
2812 scontrol = (scontrol & 0x0f0) | 0x300;
2814 if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol)))
2817 /* Some PHYs react badly if SStatus is pounded immediately
2818 * after resuming. Delay 200ms before debouncing.
2822 return sata_phy_debounce(ap, params);
2825 static void ata_wait_spinup(struct ata_port *ap)
2827 struct ata_eh_context *ehc = &ap->eh_context;
2828 unsigned long end, secs;
2831 /* first, debounce phy if SATA */
2832 if (ap->cbl == ATA_CBL_SATA) {
2833 rc = sata_phy_debounce(ap, sata_deb_timing_hotplug);
2835 /* if debounced successfully and offline, no need to wait */
2836 if ((rc == 0 || rc == -EOPNOTSUPP) && ata_port_offline(ap))
2840 /* okay, let's give the drive time to spin up */
2841 end = ehc->i.hotplug_timestamp + ATA_SPINUP_WAIT * HZ / 1000;
2842 secs = ((end - jiffies) + HZ - 1) / HZ;
2844 if (time_after(jiffies, end))
2848 ata_port_printk(ap, KERN_INFO, "waiting for device to spin up "
2849 "(%lu secs)\n", secs);
2851 schedule_timeout_uninterruptible(end - jiffies);
2855 * ata_std_prereset - prepare for reset
2856 * @ap: ATA port to be reset
2858 * @ap is about to be reset. Initialize it.
2861 * Kernel thread context (may sleep)
2864 * 0 on success, -errno otherwise.
2866 int ata_std_prereset(struct ata_port *ap)
2868 struct ata_eh_context *ehc = &ap->eh_context;
2869 const unsigned long *timing = sata_ehc_deb_timing(ehc);
2872 /* handle link resume & hotplug spinup */
2873 if ((ehc->i.flags & ATA_EHI_RESUME_LINK) &&
2874 (ap->flags & ATA_FLAG_HRST_TO_RESUME))
2875 ehc->i.action |= ATA_EH_HARDRESET;
2877 if ((ehc->i.flags & ATA_EHI_HOTPLUGGED) &&
2878 (ap->flags & ATA_FLAG_SKIP_D2H_BSY))
2879 ata_wait_spinup(ap);
2881 /* if we're about to do hardreset, nothing more to do */
2882 if (ehc->i.action & ATA_EH_HARDRESET)
2885 /* if SATA, resume phy */
2886 if (ap->cbl == ATA_CBL_SATA) {
2887 rc = sata_phy_resume(ap, timing);
2888 if (rc && rc != -EOPNOTSUPP) {
2889 /* phy resume failed */
2890 ata_port_printk(ap, KERN_WARNING, "failed to resume "
2891 "link for reset (errno=%d)\n", rc);
2896 /* Wait for !BSY if the controller can wait for the first D2H
2897 * Reg FIS and we don't know that no device is attached.
2899 if (!(ap->flags & ATA_FLAG_SKIP_D2H_BSY) && !ata_port_offline(ap))
2900 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2906 * ata_std_softreset - reset host port via ATA SRST
2907 * @ap: port to reset
2908 * @classes: resulting classes of attached devices
2910 * Reset host port using ATA SRST.
2913 * Kernel thread context (may sleep)
2916 * 0 on success, -errno otherwise.
2918 int ata_std_softreset(struct ata_port *ap, unsigned int *classes)
2920 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2921 unsigned int devmask = 0, err_mask;
2926 if (ata_port_offline(ap)) {
2927 classes[0] = ATA_DEV_NONE;
2931 /* determine if device 0/1 are present */
2932 if (ata_devchk(ap, 0))
2933 devmask |= (1 << 0);
2934 if (slave_possible && ata_devchk(ap, 1))
2935 devmask |= (1 << 1);
2937 /* select device 0 again */
2938 ap->ops->dev_select(ap, 0);
2940 /* issue bus reset */
2941 DPRINTK("about to softreset, devmask=%x\n", devmask);
2942 err_mask = ata_bus_softreset(ap, devmask);
2944 ata_port_printk(ap, KERN_ERR, "SRST failed (err_mask=0x%x)\n",
2949 /* determine by signature whether we have ATA or ATAPI devices */
2950 classes[0] = ata_dev_try_classify(ap, 0, &err);
2951 if (slave_possible && err != 0x81)
2952 classes[1] = ata_dev_try_classify(ap, 1, &err);
2955 DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]);
2960 * sata_port_hardreset - reset port via SATA phy reset
2961 * @ap: port to reset
2962 * @timing: timing parameters { interval, duratinon, timeout } in msec
2964 * SATA phy-reset host port using DET bits of SControl register.
2967 * Kernel thread context (may sleep)
2970 * 0 on success, -errno otherwise.
2972 int sata_port_hardreset(struct ata_port *ap, const unsigned long *timing)
2979 if (sata_set_spd_needed(ap)) {
2980 /* SATA spec says nothing about how to reconfigure
2981 * spd. To be on the safe side, turn off phy during
2982 * reconfiguration. This works for at least ICH7 AHCI
2985 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
2988 scontrol = (scontrol & 0x0f0) | 0x304;
2990 if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol)))
2996 /* issue phy wake/reset */
2997 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
3000 scontrol = (scontrol & 0x0f0) | 0x301;
3002 if ((rc = sata_scr_write_flush(ap, SCR_CONTROL, scontrol)))
3005 /* Couldn't find anything in SATA I/II specs, but AHCI-1.1
3006 * 10.4.2 says at least 1 ms.
3010 /* bring phy back */
3011 rc = sata_phy_resume(ap, timing);
3013 DPRINTK("EXIT, rc=%d\n", rc);
3018 * sata_std_hardreset - reset host port via SATA phy reset
3019 * @ap: port to reset
3020 * @class: resulting class of attached device
3022 * SATA phy-reset host port using DET bits of SControl register,
3023 * wait for !BSY and classify the attached device.
3026 * Kernel thread context (may sleep)
3029 * 0 on success, -errno otherwise.
3031 int sata_std_hardreset(struct ata_port *ap, unsigned int *class)
3033 const unsigned long *timing = sata_ehc_deb_timing(&ap->eh_context);
3039 rc = sata_port_hardreset(ap, timing);
3041 ata_port_printk(ap, KERN_ERR,
3042 "COMRESET failed (errno=%d)\n", rc);
3046 /* TODO: phy layer with polling, timeouts, etc. */
3047 if (ata_port_offline(ap)) {
3048 *class = ATA_DEV_NONE;
3049 DPRINTK("EXIT, link offline\n");
3053 /* wait a while before checking status, see SRST for more info */
3056 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
3057 ata_port_printk(ap, KERN_ERR,
3058 "COMRESET failed (device not ready)\n");
3062 ap->ops->dev_select(ap, 0); /* probably unnecessary */
3064 *class = ata_dev_try_classify(ap, 0, NULL);
3066 DPRINTK("EXIT, class=%u\n", *class);
3071 * ata_std_postreset - standard postreset callback
3072 * @ap: the target ata_port
3073 * @classes: classes of attached devices
3075 * This function is invoked after a successful reset. Note that
3076 * the device might have been reset more than once using
3077 * different reset methods before postreset is invoked.
3080 * Kernel thread context (may sleep)
3082 void ata_std_postreset(struct ata_port *ap, unsigned int *classes)
3088 /* print link status */
3089 sata_print_link_status(ap);
3092 if (sata_scr_read(ap, SCR_ERROR, &serror) == 0)
3093 sata_scr_write(ap, SCR_ERROR, serror);
3095 /* re-enable interrupts */
3096 if (!ap->ops->error_handler)
3097 ap->ops->irq_on(ap);
3099 /* is double-select really necessary? */
3100 if (classes[0] != ATA_DEV_NONE)
3101 ap->ops->dev_select(ap, 1);
3102 if (classes[1] != ATA_DEV_NONE)
3103 ap->ops->dev_select(ap, 0);
3105 /* bail out if no device is present */
3106 if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) {
3107 DPRINTK("EXIT, no device\n");
3111 /* set up device control */
3112 if (ap->ioaddr.ctl_addr)
3113 iowrite8(ap->ctl, ap->ioaddr.ctl_addr);
3119 * ata_dev_same_device - Determine whether new ID matches configured device
3120 * @dev: device to compare against
3121 * @new_class: class of the new device
3122 * @new_id: IDENTIFY page of the new device
3124 * Compare @new_class and @new_id against @dev and determine
3125 * whether @dev is the device indicated by @new_class and
3132 * 1 if @dev matches @new_class and @new_id, 0 otherwise.
3134 static int ata_dev_same_device(struct ata_device *dev, unsigned int new_class,
3137 const u16 *old_id = dev->id;
3138 unsigned char model[2][ATA_ID_PROD_LEN + 1];
3139 unsigned char serial[2][ATA_ID_SERNO_LEN + 1];
3142 if (dev->class != new_class) {
3143 ata_dev_printk(dev, KERN_INFO, "class mismatch %d != %d\n",
3144 dev->class, new_class);
3148 ata_id_c_string(old_id, model[0], ATA_ID_PROD, sizeof(model[0]));
3149 ata_id_c_string(new_id, model[1], ATA_ID_PROD, sizeof(model[1]));
3150 ata_id_c_string(old_id, serial[0], ATA_ID_SERNO, sizeof(serial[0]));
3151 ata_id_c_string(new_id, serial[1], ATA_ID_SERNO, sizeof(serial[1]));
3152 new_n_sectors = ata_id_n_sectors(new_id);
3154 if (strcmp(model[0], model[1])) {
3155 ata_dev_printk(dev, KERN_INFO, "model number mismatch "
3156 "'%s' != '%s'\n", model[0], model[1]);
3160 if (strcmp(serial[0], serial[1])) {
3161 ata_dev_printk(dev, KERN_INFO, "serial number mismatch "
3162 "'%s' != '%s'\n", serial[0], serial[1]);
3166 if (dev->class == ATA_DEV_ATA && dev->n_sectors != new_n_sectors) {
3167 ata_dev_printk(dev, KERN_INFO, "n_sectors mismatch "
3169 (unsigned long long)dev->n_sectors,
3170 (unsigned long long)new_n_sectors);
3178 * ata_dev_revalidate - Revalidate ATA device
3179 * @dev: device to revalidate
3180 * @readid_flags: read ID flags
3182 * Re-read IDENTIFY page and make sure @dev is still attached to
3186 * Kernel thread context (may sleep)
3189 * 0 on success, negative errno otherwise
3191 int ata_dev_revalidate(struct ata_device *dev, unsigned int readid_flags)
3193 unsigned int class = dev->class;
3194 u16 *id = (void *)dev->ap->sector_buf;
3197 if (!ata_dev_enabled(dev)) {
3203 rc = ata_dev_read_id(dev, &class, readid_flags, id);
3207 /* is the device still there? */
3208 if (!ata_dev_same_device(dev, class, id)) {
3213 memcpy(dev->id, id, sizeof(id[0]) * ATA_ID_WORDS);
3215 /* configure device according to the new ID */
3216 rc = ata_dev_configure(dev);
3221 ata_dev_printk(dev, KERN_ERR, "revalidation failed (errno=%d)\n", rc);
3225 struct ata_blacklist_entry {
3226 const char *model_num;
3227 const char *model_rev;
3228 unsigned long horkage;
3231 static const struct ata_blacklist_entry ata_device_blacklist [] = {
3232 /* Devices with DMA related problems under Linux */
3233 { "WDC AC11000H", NULL, ATA_HORKAGE_NODMA },
3234 { "WDC AC22100H", NULL, ATA_HORKAGE_NODMA },
3235 { "WDC AC32500H", NULL, ATA_HORKAGE_NODMA },
3236 { "WDC AC33100H", NULL, ATA_HORKAGE_NODMA },
3237 { "WDC AC31600H", NULL, ATA_HORKAGE_NODMA },
3238 { "WDC AC32100H", "24.09P07", ATA_HORKAGE_NODMA },
3239 { "WDC AC23200L", "21.10N21", ATA_HORKAGE_NODMA },
3240 { "Compaq CRD-8241B", NULL, ATA_HORKAGE_NODMA },
3241 { "CRD-8400B", NULL, ATA_HORKAGE_NODMA },
3242 { "CRD-8480B", NULL, ATA_HORKAGE_NODMA },
3243 { "CRD-8482B", NULL, ATA_HORKAGE_NODMA },
3244 { "CRD-84", NULL, ATA_HORKAGE_NODMA },
3245 { "SanDisk SDP3B", NULL, ATA_HORKAGE_NODMA },
3246 { "SanDisk SDP3B-64", NULL, ATA_HORKAGE_NODMA },
3247 { "SANYO CD-ROM CRD", NULL, ATA_HORKAGE_NODMA },
3248 { "HITACHI CDR-8", NULL, ATA_HORKAGE_NODMA },
3249 { "HITACHI CDR-8335", NULL, ATA_HORKAGE_NODMA },
3250 { "HITACHI CDR-8435", NULL, ATA_HORKAGE_NODMA },
3251 { "Toshiba CD-ROM XM-6202B", NULL, ATA_HORKAGE_NODMA },
3252 { "TOSHIBA CD-ROM XM-1702BC", NULL, ATA_HORKAGE_NODMA },
3253 { "CD-532E-A", NULL, ATA_HORKAGE_NODMA },
3254 { "E-IDE CD-ROM CR-840",NULL, ATA_HORKAGE_NODMA },
3255 { "CD-ROM Drive/F5A", NULL, ATA_HORKAGE_NODMA },
3256 { "WPI CDD-820", NULL, ATA_HORKAGE_NODMA },
3257 { "SAMSUNG CD-ROM SC-148C", NULL, ATA_HORKAGE_NODMA },
3258 { "SAMSUNG CD-ROM SC", NULL, ATA_HORKAGE_NODMA },
3259 { "SanDisk SDP3B-64", NULL, ATA_HORKAGE_NODMA },
3260 { "ATAPI CD-ROM DRIVE 40X MAXIMUM",NULL,ATA_HORKAGE_NODMA },
3261 { "_NEC DV5800A", NULL, ATA_HORKAGE_NODMA },
3262 { "SAMSUNG CD-ROM SN-124","N001", ATA_HORKAGE_NODMA },
3264 /* Devices we expect to fail diagnostics */
3266 /* Devices where NCQ should be avoided */
3268 { "WDC WD740ADFD-00", NULL, ATA_HORKAGE_NONCQ },
3270 /* Devices with NCQ limits */
3276 unsigned long ata_device_blacklisted(const struct ata_device *dev)
3278 unsigned char model_num[ATA_ID_PROD_LEN + 1];
3279 unsigned char model_rev[ATA_ID_FW_REV_LEN + 1];
3280 const struct ata_blacklist_entry *ad = ata_device_blacklist;
3282 ata_id_c_string(dev->id, model_num, ATA_ID_PROD, sizeof(model_num));
3283 ata_id_c_string(dev->id, model_rev, ATA_ID_FW_REV, sizeof(model_rev));
3285 while (ad->model_num) {
3286 if (!strcmp(ad->model_num, model_num)) {
3287 if (ad->model_rev == NULL)
3289 if (!strcmp(ad->model_rev, model_rev))
3297 static int ata_dma_blacklisted(const struct ata_device *dev)
3299 /* We don't support polling DMA.
3300 * DMA blacklist those ATAPI devices with CDB-intr (and use PIO)
3301 * if the LLDD handles only interrupts in the HSM_ST_LAST state.
3303 if ((dev->ap->flags & ATA_FLAG_PIO_POLLING) &&
3304 (dev->flags & ATA_DFLAG_CDB_INTR))
3306 return (ata_device_blacklisted(dev) & ATA_HORKAGE_NODMA) ? 1 : 0;
3310 * ata_dev_xfermask - Compute supported xfermask of the given device
3311 * @dev: Device to compute xfermask for
3313 * Compute supported xfermask of @dev and store it in
3314 * dev->*_mask. This function is responsible for applying all
3315 * known limits including host controller limits, device
3321 static void ata_dev_xfermask(struct ata_device *dev)
3323 struct ata_port *ap = dev->ap;
3324 struct ata_host *host = ap->host;
3325 unsigned long xfer_mask;
3327 /* controller modes available */
3328 xfer_mask = ata_pack_xfermask(ap->pio_mask,
3329 ap->mwdma_mask, ap->udma_mask);
3331 /* Apply cable rule here. Don't apply it early because when
3332 * we handle hot plug the cable type can itself change.
3334 if (ap->cbl == ATA_CBL_PATA40)
3335 xfer_mask &= ~(0xF8 << ATA_SHIFT_UDMA);
3336 /* Apply drive side cable rule. Unknown or 80 pin cables reported
3337 * host side are checked drive side as well. Cases where we know a
3338 * 40wire cable is used safely for 80 are not checked here.
3340 if (ata_drive_40wire(dev->id) && (ap->cbl == ATA_CBL_PATA_UNK || ap->cbl == ATA_CBL_PATA80))
3341 xfer_mask &= ~(0xF8 << ATA_SHIFT_UDMA);
3344 xfer_mask &= ata_pack_xfermask(dev->pio_mask,
3345 dev->mwdma_mask, dev->udma_mask);
3346 xfer_mask &= ata_id_xfermask(dev->id);
3349 * CFA Advanced TrueIDE timings are not allowed on a shared
3352 if (ata_dev_pair(dev)) {
3353 /* No PIO5 or PIO6 */
3354 xfer_mask &= ~(0x03 << (ATA_SHIFT_PIO + 5));
3355 /* No MWDMA3 or MWDMA 4 */
3356 xfer_mask &= ~(0x03 << (ATA_SHIFT_MWDMA + 3));
3359 if (ata_dma_blacklisted(dev)) {
3360 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
3361 ata_dev_printk(dev, KERN_WARNING,
3362 "device is on DMA blacklist, disabling DMA\n");
3365 if ((host->flags & ATA_HOST_SIMPLEX) && host->simplex_claimed) {
3366 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
3367 ata_dev_printk(dev, KERN_WARNING, "simplex DMA is claimed by "
3368 "other device, disabling DMA\n");
3371 if (ap->ops->mode_filter)
3372 xfer_mask = ap->ops->mode_filter(ap, dev, xfer_mask);
3374 ata_unpack_xfermask(xfer_mask, &dev->pio_mask,
3375 &dev->mwdma_mask, &dev->udma_mask);
3379 * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command
3380 * @dev: Device to which command will be sent
3382 * Issue SET FEATURES - XFER MODE command to device @dev
3386 * PCI/etc. bus probe sem.
3389 * 0 on success, AC_ERR_* mask otherwise.
3392 static unsigned int ata_dev_set_xfermode(struct ata_device *dev)
3394 struct ata_taskfile tf;
3395 unsigned int err_mask;
3397 /* set up set-features taskfile */
3398 DPRINTK("set features - xfer mode\n");
3400 ata_tf_init(dev, &tf);
3401 tf.command = ATA_CMD_SET_FEATURES;
3402 tf.feature = SETFEATURES_XFER;
3403 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
3404 tf.protocol = ATA_PROT_NODATA;
3405 tf.nsect = dev->xfer_mode;
3407 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
3409 DPRINTK("EXIT, err_mask=%x\n", err_mask);
3414 * ata_dev_init_params - Issue INIT DEV PARAMS command
3415 * @dev: Device to which command will be sent
3416 * @heads: Number of heads (taskfile parameter)
3417 * @sectors: Number of sectors (taskfile parameter)
3420 * Kernel thread context (may sleep)
3423 * 0 on success, AC_ERR_* mask otherwise.
3425 static unsigned int ata_dev_init_params(struct ata_device *dev,
3426 u16 heads, u16 sectors)
3428 struct ata_taskfile tf;
3429 unsigned int err_mask;
3431 /* Number of sectors per track 1-255. Number of heads 1-16 */
3432 if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16)
3433 return AC_ERR_INVALID;
3435 /* set up init dev params taskfile */
3436 DPRINTK("init dev params \n");
3438 ata_tf_init(dev, &tf);
3439 tf.command = ATA_CMD_INIT_DEV_PARAMS;
3440 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
3441 tf.protocol = ATA_PROT_NODATA;
3443 tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */
3445 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
3447 DPRINTK("EXIT, err_mask=%x\n", err_mask);
3452 * ata_sg_clean - Unmap DMA memory associated with command
3453 * @qc: Command containing DMA memory to be released
3455 * Unmap all mapped DMA memory associated with this command.
3458 * spin_lock_irqsave(host lock)
3460 void ata_sg_clean(struct ata_queued_cmd *qc)
3462 struct ata_port *ap = qc->ap;
3463 struct scatterlist *sg = qc->__sg;
3464 int dir = qc->dma_dir;
3465 void *pad_buf = NULL;
3467 WARN_ON(!(qc->flags & ATA_QCFLAG_DMAMAP));
3468 WARN_ON(sg == NULL);
3470 if (qc->flags & ATA_QCFLAG_SINGLE)
3471 WARN_ON(qc->n_elem > 1);
3473 VPRINTK("unmapping %u sg elements\n", qc->n_elem);
3475 /* if we padded the buffer out to 32-bit bound, and data
3476 * xfer direction is from-device, we must copy from the
3477 * pad buffer back into the supplied buffer
3479 if (qc->pad_len && !(qc->tf.flags & ATA_TFLAG_WRITE))
3480 pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3482 if (qc->flags & ATA_QCFLAG_SG) {
3484 dma_unmap_sg(ap->dev, sg, qc->n_elem, dir);
3485 /* restore last sg */
3486 sg[qc->orig_n_elem - 1].length += qc->pad_len;
3488 struct scatterlist *psg = &qc->pad_sgent;
3489 void *addr = kmap_atomic(psg->page, KM_IRQ0);
3490 memcpy(addr + psg->offset, pad_buf, qc->pad_len);
3491 kunmap_atomic(addr, KM_IRQ0);
3495 dma_unmap_single(ap->dev,
3496 sg_dma_address(&sg[0]), sg_dma_len(&sg[0]),
3499 sg->length += qc->pad_len;
3501 memcpy(qc->buf_virt + sg->length - qc->pad_len,
3502 pad_buf, qc->pad_len);
3505 qc->flags &= ~ATA_QCFLAG_DMAMAP;
3510 * ata_fill_sg - Fill PCI IDE PRD table
3511 * @qc: Metadata associated with taskfile to be transferred
3513 * Fill PCI IDE PRD (scatter-gather) table with segments
3514 * associated with the current disk command.
3517 * spin_lock_irqsave(host lock)
3520 static void ata_fill_sg(struct ata_queued_cmd *qc)
3522 struct ata_port *ap = qc->ap;
3523 struct scatterlist *sg;
3526 WARN_ON(qc->__sg == NULL);
3527 WARN_ON(qc->n_elem == 0 && qc->pad_len == 0);
3530 ata_for_each_sg(sg, qc) {
3534 /* determine if physical DMA addr spans 64K boundary.
3535 * Note h/w doesn't support 64-bit, so we unconditionally
3536 * truncate dma_addr_t to u32.
3538 addr = (u32) sg_dma_address(sg);
3539 sg_len = sg_dma_len(sg);
3542 offset = addr & 0xffff;
3544 if ((offset + sg_len) > 0x10000)
3545 len = 0x10000 - offset;
3547 ap->prd[idx].addr = cpu_to_le32(addr);
3548 ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff);
3549 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
3558 ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
3561 * ata_check_atapi_dma - Check whether ATAPI DMA can be supported
3562 * @qc: Metadata associated with taskfile to check
3564 * Allow low-level driver to filter ATA PACKET commands, returning
3565 * a status indicating whether or not it is OK to use DMA for the
3566 * supplied PACKET command.
3569 * spin_lock_irqsave(host lock)
3571 * RETURNS: 0 when ATAPI DMA can be used
3574 int ata_check_atapi_dma(struct ata_queued_cmd *qc)
3576 struct ata_port *ap = qc->ap;
3577 int rc = 0; /* Assume ATAPI DMA is OK by default */
3579 if (ap->ops->check_atapi_dma)
3580 rc = ap->ops->check_atapi_dma(qc);
3585 * ata_qc_prep - Prepare taskfile for submission
3586 * @qc: Metadata associated with taskfile to be prepared
3588 * Prepare ATA taskfile for submission.
3591 * spin_lock_irqsave(host lock)
3593 void ata_qc_prep(struct ata_queued_cmd *qc)
3595 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
3601 void ata_noop_qc_prep(struct ata_queued_cmd *qc) { }
3604 * ata_sg_init_one - Associate command with memory buffer
3605 * @qc: Command to be associated
3606 * @buf: Memory buffer
3607 * @buflen: Length of memory buffer, in bytes.
3609 * Initialize the data-related elements of queued_cmd @qc
3610 * to point to a single memory buffer, @buf of byte length @buflen.
3613 * spin_lock_irqsave(host lock)
3616 void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen)
3618 qc->flags |= ATA_QCFLAG_SINGLE;
3620 qc->__sg = &qc->sgent;
3622 qc->orig_n_elem = 1;
3624 qc->nbytes = buflen;
3626 sg_init_one(&qc->sgent, buf, buflen);
3630 * ata_sg_init - Associate command with scatter-gather table.
3631 * @qc: Command to be associated
3632 * @sg: Scatter-gather table.
3633 * @n_elem: Number of elements in s/g table.
3635 * Initialize the data-related elements of queued_cmd @qc
3636 * to point to a scatter-gather table @sg, containing @n_elem
3640 * spin_lock_irqsave(host lock)
3643 void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
3644 unsigned int n_elem)
3646 qc->flags |= ATA_QCFLAG_SG;
3648 qc->n_elem = n_elem;
3649 qc->orig_n_elem = n_elem;
3653 * ata_sg_setup_one - DMA-map the memory buffer associated with a command.
3654 * @qc: Command with memory buffer to be mapped.
3656 * DMA-map the memory buffer associated with queued_cmd @qc.
3659 * spin_lock_irqsave(host lock)
3662 * Zero on success, negative on error.
3665 static int ata_sg_setup_one(struct ata_queued_cmd *qc)
3667 struct ata_port *ap = qc->ap;
3668 int dir = qc->dma_dir;
3669 struct scatterlist *sg = qc->__sg;
3670 dma_addr_t dma_address;
3673 /* we must lengthen transfers to end on a 32-bit boundary */
3674 qc->pad_len = sg->length & 3;
3676 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3677 struct scatterlist *psg = &qc->pad_sgent;
3679 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
3681 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
3683 if (qc->tf.flags & ATA_TFLAG_WRITE)
3684 memcpy(pad_buf, qc->buf_virt + sg->length - qc->pad_len,
3687 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
3688 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
3690 sg->length -= qc->pad_len;
3691 if (sg->length == 0)
3694 DPRINTK("padding done, sg->length=%u pad_len=%u\n",
3695 sg->length, qc->pad_len);
3703 dma_address = dma_map_single(ap->dev, qc->buf_virt,
3705 if (dma_mapping_error(dma_address)) {
3707 sg->length += qc->pad_len;
3711 sg_dma_address(sg) = dma_address;
3712 sg_dma_len(sg) = sg->length;
3715 DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg),
3716 qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3722 * ata_sg_setup - DMA-map the scatter-gather table associated with a command.
3723 * @qc: Command with scatter-gather table to be mapped.
3725 * DMA-map the scatter-gather table associated with queued_cmd @qc.
3728 * spin_lock_irqsave(host lock)
3731 * Zero on success, negative on error.
3735 static int ata_sg_setup(struct ata_queued_cmd *qc)
3737 struct ata_port *ap = qc->ap;
3738 struct scatterlist *sg = qc->__sg;
3739 struct scatterlist *lsg = &sg[qc->n_elem - 1];
3740 int n_elem, pre_n_elem, dir, trim_sg = 0;
3742 VPRINTK("ENTER, ata%u\n", ap->id);
3743 WARN_ON(!(qc->flags & ATA_QCFLAG_SG));
3745 /* we must lengthen transfers to end on a 32-bit boundary */
3746 qc->pad_len = lsg->length & 3;
3748 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3749 struct scatterlist *psg = &qc->pad_sgent;
3750 unsigned int offset;
3752 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
3754 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
3757 * psg->page/offset are used to copy to-be-written
3758 * data in this function or read data in ata_sg_clean.
3760 offset = lsg->offset + lsg->length - qc->pad_len;
3761 psg->page = nth_page(lsg->page, offset >> PAGE_SHIFT);
3762 psg->offset = offset_in_page(offset);
3764 if (qc->tf.flags & ATA_TFLAG_WRITE) {
3765 void *addr = kmap_atomic(psg->page, KM_IRQ0);
3766 memcpy(pad_buf, addr + psg->offset, qc->pad_len);
3767 kunmap_atomic(addr, KM_IRQ0);
3770 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
3771 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
3773 lsg->length -= qc->pad_len;
3774 if (lsg->length == 0)
3777 DPRINTK("padding done, sg[%d].length=%u pad_len=%u\n",
3778 qc->n_elem - 1, lsg->length, qc->pad_len);
3781 pre_n_elem = qc->n_elem;
3782 if (trim_sg && pre_n_elem)
3791 n_elem = dma_map_sg(ap->dev, sg, pre_n_elem, dir);
3793 /* restore last sg */
3794 lsg->length += qc->pad_len;
3798 DPRINTK("%d sg elements mapped\n", n_elem);
3801 qc->n_elem = n_elem;
3807 * swap_buf_le16 - swap halves of 16-bit words in place
3808 * @buf: Buffer to swap
3809 * @buf_words: Number of 16-bit words in buffer.
3811 * Swap halves of 16-bit words if needed to convert from
3812 * little-endian byte order to native cpu byte order, or
3816 * Inherited from caller.
3818 void swap_buf_le16(u16 *buf, unsigned int buf_words)
3823 for (i = 0; i < buf_words; i++)
3824 buf[i] = le16_to_cpu(buf[i]);
3825 #endif /* __BIG_ENDIAN */
3829 * ata_data_xfer - Transfer data by PIO
3830 * @adev: device to target
3832 * @buflen: buffer length
3833 * @write_data: read/write
3835 * Transfer data from/to the device data register by PIO.
3838 * Inherited from caller.
3840 void ata_data_xfer(struct ata_device *adev, unsigned char *buf,
3841 unsigned int buflen, int write_data)
3843 struct ata_port *ap = adev->ap;
3844 unsigned int words = buflen >> 1;
3846 /* Transfer multiple of 2 bytes */
3848 iowrite16_rep(ap->ioaddr.data_addr, buf, words);
3850 ioread16_rep(ap->ioaddr.data_addr, buf, words);
3852 /* Transfer trailing 1 byte, if any. */
3853 if (unlikely(buflen & 0x01)) {
3854 u16 align_buf[1] = { 0 };
3855 unsigned char *trailing_buf = buf + buflen - 1;
3858 memcpy(align_buf, trailing_buf, 1);
3859 iowrite16(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr);
3861 align_buf[0] = cpu_to_le16(ioread16(ap->ioaddr.data_addr));
3862 memcpy(trailing_buf, align_buf, 1);
3868 * ata_data_xfer_noirq - Transfer data by PIO
3869 * @adev: device to target
3871 * @buflen: buffer length
3872 * @write_data: read/write
3874 * Transfer data from/to the device data register by PIO. Do the
3875 * transfer with interrupts disabled.
3878 * Inherited from caller.
3880 void ata_data_xfer_noirq(struct ata_device *adev, unsigned char *buf,
3881 unsigned int buflen, int write_data)
3883 unsigned long flags;
3884 local_irq_save(flags);
3885 ata_data_xfer(adev, buf, buflen, write_data);
3886 local_irq_restore(flags);
3891 * ata_pio_sector - Transfer ATA_SECT_SIZE (512 bytes) of data.
3892 * @qc: Command on going
3894 * Transfer ATA_SECT_SIZE of data from/to the ATA device.
3897 * Inherited from caller.
3900 static void ata_pio_sector(struct ata_queued_cmd *qc)
3902 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
3903 struct scatterlist *sg = qc->__sg;
3904 struct ata_port *ap = qc->ap;
3906 unsigned int offset;
3909 if (qc->curbytes == qc->nbytes - ATA_SECT_SIZE)
3910 ap->hsm_task_state = HSM_ST_LAST;
3912 page = sg[qc->cursg].page;
3913 offset = sg[qc->cursg].offset + qc->cursg_ofs;
3915 /* get the current page and offset */
3916 page = nth_page(page, (offset >> PAGE_SHIFT));
3917 offset %= PAGE_SIZE;
3919 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3921 if (PageHighMem(page)) {
3922 unsigned long flags;
3924 /* FIXME: use a bounce buffer */
3925 local_irq_save(flags);
3926 buf = kmap_atomic(page, KM_IRQ0);
3928 /* do the actual data transfer */
3929 ap->ops->data_xfer(qc->dev, buf + offset, ATA_SECT_SIZE, do_write);
3931 kunmap_atomic(buf, KM_IRQ0);
3932 local_irq_restore(flags);
3934 buf = page_address(page);
3935 ap->ops->data_xfer(qc->dev, buf + offset, ATA_SECT_SIZE, do_write);
3938 qc->curbytes += ATA_SECT_SIZE;
3939 qc->cursg_ofs += ATA_SECT_SIZE;
3941 if (qc->cursg_ofs == (&sg[qc->cursg])->length) {
3948 * ata_pio_sectors - Transfer one or many 512-byte sectors.
3949 * @qc: Command on going
3951 * Transfer one or many ATA_SECT_SIZE of data from/to the
3952 * ATA device for the DRQ request.
3955 * Inherited from caller.
3958 static void ata_pio_sectors(struct ata_queued_cmd *qc)
3960 if (is_multi_taskfile(&qc->tf)) {
3961 /* READ/WRITE MULTIPLE */
3964 WARN_ON(qc->dev->multi_count == 0);
3966 nsect = min((qc->nbytes - qc->curbytes) / ATA_SECT_SIZE,
3967 qc->dev->multi_count);
3975 * atapi_send_cdb - Write CDB bytes to hardware
3976 * @ap: Port to which ATAPI device is attached.
3977 * @qc: Taskfile currently active
3979 * When device has indicated its readiness to accept
3980 * a CDB, this function is called. Send the CDB.
3986 static void atapi_send_cdb(struct ata_port *ap, struct ata_queued_cmd *qc)
3989 DPRINTK("send cdb\n");
3990 WARN_ON(qc->dev->cdb_len < 12);
3992 ap->ops->data_xfer(qc->dev, qc->cdb, qc->dev->cdb_len, 1);
3993 ata_altstatus(ap); /* flush */
3995 switch (qc->tf.protocol) {
3996 case ATA_PROT_ATAPI:
3997 ap->hsm_task_state = HSM_ST;
3999 case ATA_PROT_ATAPI_NODATA:
4000 ap->hsm_task_state = HSM_ST_LAST;
4002 case ATA_PROT_ATAPI_DMA:
4003 ap->hsm_task_state = HSM_ST_LAST;
4004 /* initiate bmdma */
4005 ap->ops->bmdma_start(qc);
4011 * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
4012 * @qc: Command on going
4013 * @bytes: number of bytes
4015 * Transfer Transfer data from/to the ATAPI device.
4018 * Inherited from caller.
4022 static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
4024 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
4025 struct scatterlist *sg = qc->__sg;
4026 struct ata_port *ap = qc->ap;
4029 unsigned int offset, count;
4031 if (qc->curbytes + bytes >= qc->nbytes)
4032 ap->hsm_task_state = HSM_ST_LAST;
4035 if (unlikely(qc->cursg >= qc->n_elem)) {
4037 * The end of qc->sg is reached and the device expects
4038 * more data to transfer. In order not to overrun qc->sg
4039 * and fulfill length specified in the byte count register,
4040 * - for read case, discard trailing data from the device
4041 * - for write case, padding zero data to the device
4043 u16 pad_buf[1] = { 0 };
4044 unsigned int words = bytes >> 1;
4047 if (words) /* warning if bytes > 1 */
4048 ata_dev_printk(qc->dev, KERN_WARNING,
4049 "%u bytes trailing data\n", bytes);
4051 for (i = 0; i < words; i++)
4052 ap->ops->data_xfer(qc->dev, (unsigned char*)pad_buf, 2, do_write);
4054 ap->hsm_task_state = HSM_ST_LAST;
4058 sg = &qc->__sg[qc->cursg];
4061 offset = sg->offset + qc->cursg_ofs;
4063 /* get the current page and offset */
4064 page = nth_page(page, (offset >> PAGE_SHIFT));
4065 offset %= PAGE_SIZE;
4067 /* don't overrun current sg */
4068 count = min(sg->length - qc->cursg_ofs, bytes);
4070 /* don't cross page boundaries */
4071 count = min(count, (unsigned int)PAGE_SIZE - offset);
4073 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
4075 if (PageHighMem(page)) {
4076 unsigned long flags;
4078 /* FIXME: use bounce buffer */
4079 local_irq_save(flags);
4080 buf = kmap_atomic(page, KM_IRQ0);
4082 /* do the actual data transfer */
4083 ap->ops->data_xfer(qc->dev, buf + offset, count, do_write);
4085 kunmap_atomic(buf, KM_IRQ0);
4086 local_irq_restore(flags);
4088 buf = page_address(page);
4089 ap->ops->data_xfer(qc->dev, buf + offset, count, do_write);
4093 qc->curbytes += count;
4094 qc->cursg_ofs += count;
4096 if (qc->cursg_ofs == sg->length) {
4106 * atapi_pio_bytes - Transfer data from/to the ATAPI device.
4107 * @qc: Command on going
4109 * Transfer Transfer data from/to the ATAPI device.
4112 * Inherited from caller.
4115 static void atapi_pio_bytes(struct ata_queued_cmd *qc)
4117 struct ata_port *ap = qc->ap;
4118 struct ata_device *dev = qc->dev;
4119 unsigned int ireason, bc_lo, bc_hi, bytes;
4120 int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0;
4122 /* Abuse qc->result_tf for temp storage of intermediate TF
4123 * here to save some kernel stack usage.
4124 * For normal completion, qc->result_tf is not relevant. For
4125 * error, qc->result_tf is later overwritten by ata_qc_complete().
4126 * So, the correctness of qc->result_tf is not affected.
4128 ap->ops->tf_read(ap, &qc->result_tf);
4129 ireason = qc->result_tf.nsect;
4130 bc_lo = qc->result_tf.lbam;
4131 bc_hi = qc->result_tf.lbah;
4132 bytes = (bc_hi << 8) | bc_lo;
4134 /* shall be cleared to zero, indicating xfer of data */
4135 if (ireason & (1 << 0))
4138 /* make sure transfer direction matches expected */
4139 i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0;
4140 if (do_write != i_write)
4143 VPRINTK("ata%u: xfering %d bytes\n", ap->id, bytes);
4145 __atapi_pio_bytes(qc, bytes);
4150 ata_dev_printk(dev, KERN_INFO, "ATAPI check failed\n");
4151 qc->err_mask |= AC_ERR_HSM;
4152 ap->hsm_task_state = HSM_ST_ERR;
4156 * ata_hsm_ok_in_wq - Check if the qc can be handled in the workqueue.
4157 * @ap: the target ata_port
4161 * 1 if ok in workqueue, 0 otherwise.
4164 static inline int ata_hsm_ok_in_wq(struct ata_port *ap, struct ata_queued_cmd *qc)
4166 if (qc->tf.flags & ATA_TFLAG_POLLING)
4169 if (ap->hsm_task_state == HSM_ST_FIRST) {
4170 if (qc->tf.protocol == ATA_PROT_PIO &&
4171 (qc->tf.flags & ATA_TFLAG_WRITE))
4174 if (is_atapi_taskfile(&qc->tf) &&
4175 !(qc->dev->flags & ATA_DFLAG_CDB_INTR))
4183 * ata_hsm_qc_complete - finish a qc running on standard HSM
4184 * @qc: Command to complete
4185 * @in_wq: 1 if called from workqueue, 0 otherwise
4187 * Finish @qc which is running on standard HSM.
4190 * If @in_wq is zero, spin_lock_irqsave(host lock).
4191 * Otherwise, none on entry and grabs host lock.
4193 static void ata_hsm_qc_complete(struct ata_queued_cmd *qc, int in_wq)
4195 struct ata_port *ap = qc->ap;
4196 unsigned long flags;
4198 if (ap->ops->error_handler) {
4200 spin_lock_irqsave(ap->lock, flags);
4202 /* EH might have kicked in while host lock is
4205 qc = ata_qc_from_tag(ap, qc->tag);
4207 if (likely(!(qc->err_mask & AC_ERR_HSM))) {
4208 ap->ops->irq_on(ap);
4209 ata_qc_complete(qc);
4211 ata_port_freeze(ap);
4214 spin_unlock_irqrestore(ap->lock, flags);
4216 if (likely(!(qc->err_mask & AC_ERR_HSM)))
4217 ata_qc_complete(qc);
4219 ata_port_freeze(ap);
4223 spin_lock_irqsave(ap->lock, flags);
4224 ap->ops->irq_on(ap);
4225 ata_qc_complete(qc);
4226 spin_unlock_irqrestore(ap->lock, flags);
4228 ata_qc_complete(qc);
4231 ata_altstatus(ap); /* flush */
4235 * ata_hsm_move - move the HSM to the next state.
4236 * @ap: the target ata_port
4238 * @status: current device status
4239 * @in_wq: 1 if called from workqueue, 0 otherwise
4242 * 1 when poll next status needed, 0 otherwise.
4244 int ata_hsm_move(struct ata_port *ap, struct ata_queued_cmd *qc,
4245 u8 status, int in_wq)
4247 unsigned long flags = 0;
4250 WARN_ON((qc->flags & ATA_QCFLAG_ACTIVE) == 0);
4252 /* Make sure ata_qc_issue_prot() does not throw things
4253 * like DMA polling into the workqueue. Notice that
4254 * in_wq is not equivalent to (qc->tf.flags & ATA_TFLAG_POLLING).
4256 WARN_ON(in_wq != ata_hsm_ok_in_wq(ap, qc));
4259 DPRINTK("ata%u: protocol %d task_state %d (dev_stat 0x%X)\n",
4260 ap->id, qc->tf.protocol, ap->hsm_task_state, status);
4262 switch (ap->hsm_task_state) {
4264 /* Send first data block or PACKET CDB */
4266 /* If polling, we will stay in the work queue after
4267 * sending the data. Otherwise, interrupt handler
4268 * takes over after sending the data.
4270 poll_next = (qc->tf.flags & ATA_TFLAG_POLLING);
4272 /* check device status */
4273 if (unlikely((status & ATA_DRQ) == 0)) {
4274 /* handle BSY=0, DRQ=0 as error */
4275 if (likely(status & (ATA_ERR | ATA_DF)))
4276 /* device stops HSM for abort/error */
4277 qc->err_mask |= AC_ERR_DEV;
4279 /* HSM violation. Let EH handle this */
4280 qc->err_mask |= AC_ERR_HSM;
4282 ap->hsm_task_state = HSM_ST_ERR;
4286 /* Device should not ask for data transfer (DRQ=1)
4287 * when it finds something wrong.
4288 * We ignore DRQ here and stop the HSM by
4289 * changing hsm_task_state to HSM_ST_ERR and
4290 * let the EH abort the command or reset the device.
4292 if (unlikely(status & (ATA_ERR | ATA_DF))) {
4293 printk(KERN_WARNING "ata%d: DRQ=1 with device error, dev_stat 0x%X\n",
4295 qc->err_mask |= AC_ERR_HSM;
4296 ap->hsm_task_state = HSM_ST_ERR;
4300 /* Send the CDB (atapi) or the first data block (ata pio out).
4301 * During the state transition, interrupt handler shouldn't
4302 * be invoked before the data transfer is complete and
4303 * hsm_task_state is changed. Hence, the following locking.
4306 spin_lock_irqsave(ap->lock, flags);
4308 if (qc->tf.protocol == ATA_PROT_PIO) {
4309 /* PIO data out protocol.
4310 * send first data block.
4313 /* ata_pio_sectors() might change the state
4314 * to HSM_ST_LAST. so, the state is changed here
4315 * before ata_pio_sectors().
4317 ap->hsm_task_state = HSM_ST;
4318 ata_pio_sectors(qc);
4319 ata_altstatus(ap); /* flush */
4322 atapi_send_cdb(ap, qc);
4325 spin_unlock_irqrestore(ap->lock, flags);
4327 /* if polling, ata_pio_task() handles the rest.
4328 * otherwise, interrupt handler takes over from here.
4333 /* complete command or read/write the data register */
4334 if (qc->tf.protocol == ATA_PROT_ATAPI) {
4335 /* ATAPI PIO protocol */
4336 if ((status & ATA_DRQ) == 0) {
4337 /* No more data to transfer or device error.
4338 * Device error will be tagged in HSM_ST_LAST.
4340 ap->hsm_task_state = HSM_ST_LAST;
4344 /* Device should not ask for data transfer (DRQ=1)
4345 * when it finds something wrong.
4346 * We ignore DRQ here and stop the HSM by
4347 * changing hsm_task_state to HSM_ST_ERR and
4348 * let the EH abort the command or reset the device.
4350 if (unlikely(status & (ATA_ERR | ATA_DF))) {
4351 printk(KERN_WARNING "ata%d: DRQ=1 with device error, dev_stat 0x%X\n",
4353 qc->err_mask |= AC_ERR_HSM;
4354 ap->hsm_task_state = HSM_ST_ERR;
4358 atapi_pio_bytes(qc);
4360 if (unlikely(ap->hsm_task_state == HSM_ST_ERR))
4361 /* bad ireason reported by device */
4365 /* ATA PIO protocol */
4366 if (unlikely((status & ATA_DRQ) == 0)) {
4367 /* handle BSY=0, DRQ=0 as error */
4368 if (likely(status & (ATA_ERR | ATA_DF)))
4369 /* device stops HSM for abort/error */
4370 qc->err_mask |= AC_ERR_DEV;
4372 /* HSM violation. Let EH handle this.
4373 * Phantom devices also trigger this
4374 * condition. Mark hint.
4376 qc->err_mask |= AC_ERR_HSM |
4379 ap->hsm_task_state = HSM_ST_ERR;
4383 /* For PIO reads, some devices may ask for
4384 * data transfer (DRQ=1) alone with ERR=1.
4385 * We respect DRQ here and transfer one
4386 * block of junk data before changing the
4387 * hsm_task_state to HSM_ST_ERR.
4389 * For PIO writes, ERR=1 DRQ=1 doesn't make
4390 * sense since the data block has been
4391 * transferred to the device.
4393 if (unlikely(status & (ATA_ERR | ATA_DF))) {
4394 /* data might be corrputed */
4395 qc->err_mask |= AC_ERR_DEV;
4397 if (!(qc->tf.flags & ATA_TFLAG_WRITE)) {
4398 ata_pio_sectors(qc);
4400 status = ata_wait_idle(ap);
4403 if (status & (ATA_BUSY | ATA_DRQ))
4404 qc->err_mask |= AC_ERR_HSM;
4406 /* ata_pio_sectors() might change the
4407 * state to HSM_ST_LAST. so, the state
4408 * is changed after ata_pio_sectors().
4410 ap->hsm_task_state = HSM_ST_ERR;
4414 ata_pio_sectors(qc);
4416 if (ap->hsm_task_state == HSM_ST_LAST &&
4417 (!(qc->tf.flags & ATA_TFLAG_WRITE))) {
4420 status = ata_wait_idle(ap);
4425 ata_altstatus(ap); /* flush */
4430 if (unlikely(!ata_ok(status))) {
4431 qc->err_mask |= __ac_err_mask(status);
4432 ap->hsm_task_state = HSM_ST_ERR;
4436 /* no more data to transfer */
4437 DPRINTK("ata%u: dev %u command complete, drv_stat 0x%x\n",
4438 ap->id, qc->dev->devno, status);
4440 WARN_ON(qc->err_mask);
4442 ap->hsm_task_state = HSM_ST_IDLE;
4444 /* complete taskfile transaction */
4445 ata_hsm_qc_complete(qc, in_wq);
4451 /* make sure qc->err_mask is available to
4452 * know what's wrong and recover
4454 WARN_ON(qc->err_mask == 0);
4456 ap->hsm_task_state = HSM_ST_IDLE;
4458 /* complete taskfile transaction */
4459 ata_hsm_qc_complete(qc, in_wq);
4471 static void ata_pio_task(struct work_struct *work)
4473 struct ata_port *ap =
4474 container_of(work, struct ata_port, port_task.work);
4475 struct ata_queued_cmd *qc = ap->port_task_data;
4480 WARN_ON(ap->hsm_task_state == HSM_ST_IDLE);
4483 * This is purely heuristic. This is a fast path.
4484 * Sometimes when we enter, BSY will be cleared in
4485 * a chk-status or two. If not, the drive is probably seeking
4486 * or something. Snooze for a couple msecs, then
4487 * chk-status again. If still busy, queue delayed work.
4489 status = ata_busy_wait(ap, ATA_BUSY, 5);
4490 if (status & ATA_BUSY) {
4492 status = ata_busy_wait(ap, ATA_BUSY, 10);
4493 if (status & ATA_BUSY) {
4494 ata_port_queue_task(ap, ata_pio_task, qc, ATA_SHORT_PAUSE);
4500 poll_next = ata_hsm_move(ap, qc, status, 1);
4502 /* another command or interrupt handler
4503 * may be running at this point.
4510 * ata_qc_new - Request an available ATA command, for queueing
4511 * @ap: Port associated with device @dev
4512 * @dev: Device from whom we request an available command structure
4518 static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap)
4520 struct ata_queued_cmd *qc = NULL;
4523 /* no command while frozen */
4524 if (unlikely(ap->pflags & ATA_PFLAG_FROZEN))
4527 /* the last tag is reserved for internal command. */
4528 for (i = 0; i < ATA_MAX_QUEUE - 1; i++)
4529 if (!test_and_set_bit(i, &ap->qc_allocated)) {
4530 qc = __ata_qc_from_tag(ap, i);
4541 * ata_qc_new_init - Request an available ATA command, and initialize it
4542 * @dev: Device from whom we request an available command structure
4548 struct ata_queued_cmd *ata_qc_new_init(struct ata_device *dev)
4550 struct ata_port *ap = dev->ap;
4551 struct ata_queued_cmd *qc;
4553 qc = ata_qc_new(ap);
4566 * ata_qc_free - free unused ata_queued_cmd
4567 * @qc: Command to complete
4569 * Designed to free unused ata_queued_cmd object
4570 * in case something prevents using it.
4573 * spin_lock_irqsave(host lock)
4575 void ata_qc_free(struct ata_queued_cmd *qc)
4577 struct ata_port *ap = qc->ap;
4580 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
4584 if (likely(ata_tag_valid(tag))) {
4585 qc->tag = ATA_TAG_POISON;
4586 clear_bit(tag, &ap->qc_allocated);
4590 void __ata_qc_complete(struct ata_queued_cmd *qc)
4592 struct ata_port *ap = qc->ap;
4594 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
4595 WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE));
4597 if (likely(qc->flags & ATA_QCFLAG_DMAMAP))
4600 /* command should be marked inactive atomically with qc completion */
4601 if (qc->tf.protocol == ATA_PROT_NCQ)
4602 ap->sactive &= ~(1 << qc->tag);
4604 ap->active_tag = ATA_TAG_POISON;
4606 /* atapi: mark qc as inactive to prevent the interrupt handler
4607 * from completing the command twice later, before the error handler
4608 * is called. (when rc != 0 and atapi request sense is needed)
4610 qc->flags &= ~ATA_QCFLAG_ACTIVE;
4611 ap->qc_active &= ~(1 << qc->tag);
4613 /* call completion callback */
4614 qc->complete_fn(qc);
4617 static void fill_result_tf(struct ata_queued_cmd *qc)
4619 struct ata_port *ap = qc->ap;
4621 ap->ops->tf_read(ap, &qc->result_tf);
4622 qc->result_tf.flags = qc->tf.flags;
4626 * ata_qc_complete - Complete an active ATA command
4627 * @qc: Command to complete
4628 * @err_mask: ATA Status register contents
4630 * Indicate to the mid and upper layers that an ATA
4631 * command has completed, with either an ok or not-ok status.
4634 * spin_lock_irqsave(host lock)
4636 void ata_qc_complete(struct ata_queued_cmd *qc)
4638 struct ata_port *ap = qc->ap;
4640 /* XXX: New EH and old EH use different mechanisms to
4641 * synchronize EH with regular execution path.
4643 * In new EH, a failed qc is marked with ATA_QCFLAG_FAILED.
4644 * Normal execution path is responsible for not accessing a
4645 * failed qc. libata core enforces the rule by returning NULL
4646 * from ata_qc_from_tag() for failed qcs.
4648 * Old EH depends on ata_qc_complete() nullifying completion
4649 * requests if ATA_QCFLAG_EH_SCHEDULED is set. Old EH does
4650 * not synchronize with interrupt handler. Only PIO task is
4653 if (ap->ops->error_handler) {
4654 WARN_ON(ap->pflags & ATA_PFLAG_FROZEN);
4656 if (unlikely(qc->err_mask))
4657 qc->flags |= ATA_QCFLAG_FAILED;
4659 if (unlikely(qc->flags & ATA_QCFLAG_FAILED)) {
4660 if (!ata_tag_internal(qc->tag)) {
4661 /* always fill result TF for failed qc */
4663 ata_qc_schedule_eh(qc);
4668 /* read result TF if requested */
4669 if (qc->flags & ATA_QCFLAG_RESULT_TF)
4672 __ata_qc_complete(qc);
4674 if (qc->flags & ATA_QCFLAG_EH_SCHEDULED)
4677 /* read result TF if failed or requested */
4678 if (qc->err_mask || qc->flags & ATA_QCFLAG_RESULT_TF)
4681 __ata_qc_complete(qc);
4686 * ata_qc_complete_multiple - Complete multiple qcs successfully
4687 * @ap: port in question
4688 * @qc_active: new qc_active mask
4689 * @finish_qc: LLDD callback invoked before completing a qc
4691 * Complete in-flight commands. This functions is meant to be
4692 * called from low-level driver's interrupt routine to complete
4693 * requests normally. ap->qc_active and @qc_active is compared
4694 * and commands are completed accordingly.
4697 * spin_lock_irqsave(host lock)
4700 * Number of completed commands on success, -errno otherwise.
4702 int ata_qc_complete_multiple(struct ata_port *ap, u32 qc_active,
4703 void (*finish_qc)(struct ata_queued_cmd *))
4709 done_mask = ap->qc_active ^ qc_active;
4711 if (unlikely(done_mask & qc_active)) {
4712 ata_port_printk(ap, KERN_ERR, "illegal qc_active transition "
4713 "(%08x->%08x)\n", ap->qc_active, qc_active);
4717 for (i = 0; i < ATA_MAX_QUEUE; i++) {
4718 struct ata_queued_cmd *qc;
4720 if (!(done_mask & (1 << i)))
4723 if ((qc = ata_qc_from_tag(ap, i))) {
4726 ata_qc_complete(qc);
4734 static inline int ata_should_dma_map(struct ata_queued_cmd *qc)
4736 struct ata_port *ap = qc->ap;
4738 switch (qc->tf.protocol) {
4741 case ATA_PROT_ATAPI_DMA:
4744 case ATA_PROT_ATAPI:
4746 if (ap->flags & ATA_FLAG_PIO_DMA)
4759 * ata_qc_issue - issue taskfile to device
4760 * @qc: command to issue to device
4762 * Prepare an ATA command to submission to device.
4763 * This includes mapping the data into a DMA-able
4764 * area, filling in the S/G table, and finally
4765 * writing the taskfile to hardware, starting the command.
4768 * spin_lock_irqsave(host lock)
4770 void ata_qc_issue(struct ata_queued_cmd *qc)
4772 struct ata_port *ap = qc->ap;
4774 /* Make sure only one non-NCQ command is outstanding. The
4775 * check is skipped for old EH because it reuses active qc to
4776 * request ATAPI sense.
4778 WARN_ON(ap->ops->error_handler && ata_tag_valid(ap->active_tag));
4780 if (qc->tf.protocol == ATA_PROT_NCQ) {
4781 WARN_ON(ap->sactive & (1 << qc->tag));
4782 ap->sactive |= 1 << qc->tag;
4784 WARN_ON(ap->sactive);
4785 ap->active_tag = qc->tag;
4788 qc->flags |= ATA_QCFLAG_ACTIVE;
4789 ap->qc_active |= 1 << qc->tag;
4791 if (ata_should_dma_map(qc)) {
4792 if (qc->flags & ATA_QCFLAG_SG) {
4793 if (ata_sg_setup(qc))
4795 } else if (qc->flags & ATA_QCFLAG_SINGLE) {
4796 if (ata_sg_setup_one(qc))
4800 qc->flags &= ~ATA_QCFLAG_DMAMAP;
4803 ap->ops->qc_prep(qc);
4805 qc->err_mask |= ap->ops->qc_issue(qc);
4806 if (unlikely(qc->err_mask))
4811 qc->flags &= ~ATA_QCFLAG_DMAMAP;
4812 qc->err_mask |= AC_ERR_SYSTEM;
4814 ata_qc_complete(qc);
4818 * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner
4819 * @qc: command to issue to device
4821 * Using various libata functions and hooks, this function
4822 * starts an ATA command. ATA commands are grouped into
4823 * classes called "protocols", and issuing each type of protocol
4824 * is slightly different.
4826 * May be used as the qc_issue() entry in ata_port_operations.
4829 * spin_lock_irqsave(host lock)
4832 * Zero on success, AC_ERR_* mask on failure
4835 unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc)
4837 struct ata_port *ap = qc->ap;
4839 /* Use polling pio if the LLD doesn't handle
4840 * interrupt driven pio and atapi CDB interrupt.
4842 if (ap->flags & ATA_FLAG_PIO_POLLING) {
4843 switch (qc->tf.protocol) {
4845 case ATA_PROT_NODATA:
4846 case ATA_PROT_ATAPI:
4847 case ATA_PROT_ATAPI_NODATA:
4848 qc->tf.flags |= ATA_TFLAG_POLLING;
4850 case ATA_PROT_ATAPI_DMA:
4851 if (qc->dev->flags & ATA_DFLAG_CDB_INTR)
4852 /* see ata_dma_blacklisted() */
4860 /* Some controllers show flaky interrupt behavior after
4861 * setting xfer mode. Use polling instead.
4863 if (unlikely(qc->tf.command == ATA_CMD_SET_FEATURES &&
4864 qc->tf.feature == SETFEATURES_XFER) &&
4865 (ap->flags & ATA_FLAG_SETXFER_POLLING))
4866 qc->tf.flags |= ATA_TFLAG_POLLING;
4868 /* select the device */
4869 ata_dev_select(ap, qc->dev->devno, 1, 0);
4871 /* start the command */
4872 switch (qc->tf.protocol) {
4873 case ATA_PROT_NODATA:
4874 if (qc->tf.flags & ATA_TFLAG_POLLING)
4875 ata_qc_set_polling(qc);
4877 ata_tf_to_host(ap, &qc->tf);
4878 ap->hsm_task_state = HSM_ST_LAST;
4880 if (qc->tf.flags & ATA_TFLAG_POLLING)
4881 ata_port_queue_task(ap, ata_pio_task, qc, 0);
4886 WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING);
4888 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
4889 ap->ops->bmdma_setup(qc); /* set up bmdma */
4890 ap->ops->bmdma_start(qc); /* initiate bmdma */
4891 ap->hsm_task_state = HSM_ST_LAST;
4895 if (qc->tf.flags & ATA_TFLAG_POLLING)
4896 ata_qc_set_polling(qc);
4898 ata_tf_to_host(ap, &qc->tf);
4900 if (qc->tf.flags & ATA_TFLAG_WRITE) {
4901 /* PIO data out protocol */
4902 ap->hsm_task_state = HSM_ST_FIRST;
4903 ata_port_queue_task(ap, ata_pio_task, qc, 0);
4905 /* always send first data block using
4906 * the ata_pio_task() codepath.
4909 /* PIO data in protocol */
4910 ap->hsm_task_state = HSM_ST;
4912 if (qc->tf.flags & ATA_TFLAG_POLLING)
4913 ata_port_queue_task(ap, ata_pio_task, qc, 0);
4915 /* if polling, ata_pio_task() handles the rest.
4916 * otherwise, interrupt handler takes over from here.
4922 case ATA_PROT_ATAPI:
4923 case ATA_PROT_ATAPI_NODATA:
4924 if (qc->tf.flags & ATA_TFLAG_POLLING)
4925 ata_qc_set_polling(qc);
4927 ata_tf_to_host(ap, &qc->tf);
4929 ap->hsm_task_state = HSM_ST_FIRST;
4931 /* send cdb by polling if no cdb interrupt */
4932 if ((!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) ||
4933 (qc->tf.flags & ATA_TFLAG_POLLING))
4934 ata_port_queue_task(ap, ata_pio_task, qc, 0);
4937 case ATA_PROT_ATAPI_DMA:
4938 WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING);
4940 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
4941 ap->ops->bmdma_setup(qc); /* set up bmdma */
4942 ap->hsm_task_state = HSM_ST_FIRST;
4944 /* send cdb by polling if no cdb interrupt */
4945 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
4946 ata_port_queue_task(ap, ata_pio_task, qc, 0);
4951 return AC_ERR_SYSTEM;
4958 * ata_host_intr - Handle host interrupt for given (port, task)
4959 * @ap: Port on which interrupt arrived (possibly...)
4960 * @qc: Taskfile currently active in engine
4962 * Handle host interrupt for given queued command. Currently,
4963 * only DMA interrupts are handled. All other commands are
4964 * handled via polling with interrupts disabled (nIEN bit).
4967 * spin_lock_irqsave(host lock)
4970 * One if interrupt was handled, zero if not (shared irq).
4973 inline unsigned int ata_host_intr (struct ata_port *ap,
4974 struct ata_queued_cmd *qc)
4976 struct ata_eh_info *ehi = &ap->eh_info;
4977 u8 status, host_stat = 0;
4979 VPRINTK("ata%u: protocol %d task_state %d\n",
4980 ap->id, qc->tf.protocol, ap->hsm_task_state);
4982 /* Check whether we are expecting interrupt in this state */
4983 switch (ap->hsm_task_state) {
4985 /* Some pre-ATAPI-4 devices assert INTRQ
4986 * at this state when ready to receive CDB.
4989 /* Check the ATA_DFLAG_CDB_INTR flag is enough here.
4990 * The flag was turned on only for atapi devices.
4991 * No need to check is_atapi_taskfile(&qc->tf) again.
4993 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
4997 if (qc->tf.protocol == ATA_PROT_DMA ||
4998 qc->tf.protocol == ATA_PROT_ATAPI_DMA) {
4999 /* check status of DMA engine */
5000 host_stat = ap->ops->bmdma_status(ap);
5001 VPRINTK("ata%u: host_stat 0x%X\n", ap->id, host_stat);
5003 /* if it's not our irq... */
5004 if (!(host_stat & ATA_DMA_INTR))
5007 /* before we do anything else, clear DMA-Start bit */
5008 ap->ops->bmdma_stop(qc);
5010 if (unlikely(host_stat & ATA_DMA_ERR)) {
5011 /* error when transfering data to/from memory */
5012 qc->err_mask |= AC_ERR_HOST_BUS;
5013 ap->hsm_task_state = HSM_ST_ERR;
5023 /* check altstatus */
5024 status = ata_altstatus(ap);
5025 if (status & ATA_BUSY)
5028 /* check main status, clearing INTRQ */
5029 status = ata_chk_status(ap);
5030 if (unlikely(status & ATA_BUSY))
5033 /* ack bmdma irq events */
5034 ap->ops->irq_clear(ap);
5036 ata_hsm_move(ap, qc, status, 0);
5038 if (unlikely(qc->err_mask) && (qc->tf.protocol == ATA_PROT_DMA ||
5039 qc->tf.protocol == ATA_PROT_ATAPI_DMA))
5040 ata_ehi_push_desc(ehi, "BMDMA stat 0x%x", host_stat);
5042 return 1; /* irq handled */
5045 ap->stats.idle_irq++;
5048 if ((ap->stats.idle_irq % 1000) == 0) {
5049 ap->ops->irq_ack(ap, 0); /* debug trap */
5050 ata_port_printk(ap, KERN_WARNING, "irq trap\n");
5054 return 0; /* irq not handled */
5058 * ata_interrupt - Default ATA host interrupt handler
5059 * @irq: irq line (unused)
5060 * @dev_instance: pointer to our ata_host information structure
5062 * Default interrupt handler for PCI IDE devices. Calls
5063 * ata_host_intr() for each port that is not disabled.
5066 * Obtains host lock during operation.
5069 * IRQ_NONE or IRQ_HANDLED.
5072 irqreturn_t ata_interrupt (int irq, void *dev_instance)
5074 struct ata_host *host = dev_instance;
5076 unsigned int handled = 0;
5077 unsigned long flags;
5079 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
5080 spin_lock_irqsave(&host->lock, flags);
5082 for (i = 0; i < host->n_ports; i++) {
5083 struct ata_port *ap;
5085 ap = host->ports[i];
5087 !(ap->flags & ATA_FLAG_DISABLED)) {
5088 struct ata_queued_cmd *qc;
5090 qc = ata_qc_from_tag(ap, ap->active_tag);
5091 if (qc && (!(qc->tf.flags & ATA_TFLAG_POLLING)) &&
5092 (qc->flags & ATA_QCFLAG_ACTIVE))
5093 handled |= ata_host_intr(ap, qc);
5097 spin_unlock_irqrestore(&host->lock, flags);
5099 return IRQ_RETVAL(handled);
5103 * sata_scr_valid - test whether SCRs are accessible
5104 * @ap: ATA port to test SCR accessibility for
5106 * Test whether SCRs are accessible for @ap.
5112 * 1 if SCRs are accessible, 0 otherwise.
5114 int sata_scr_valid(struct ata_port *ap)
5116 return ap->cbl == ATA_CBL_SATA && ap->ops->scr_read;
5120 * sata_scr_read - read SCR register of the specified port
5121 * @ap: ATA port to read SCR for
5123 * @val: Place to store read value
5125 * Read SCR register @reg of @ap into *@val. This function is
5126 * guaranteed to succeed if the cable type of the port is SATA
5127 * and the port implements ->scr_read.
5133 * 0 on success, negative errno on failure.
5135 int sata_scr_read(struct ata_port *ap, int reg, u32 *val)
5137 if (sata_scr_valid(ap)) {
5138 *val = ap->ops->scr_read(ap, reg);
5145 * sata_scr_write - write SCR register of the specified port
5146 * @ap: ATA port to write SCR for
5147 * @reg: SCR to write
5148 * @val: value to write
5150 * Write @val to SCR register @reg of @ap. This function is
5151 * guaranteed to succeed if the cable type of the port is SATA
5152 * and the port implements ->scr_read.
5158 * 0 on success, negative errno on failure.
5160 int sata_scr_write(struct ata_port *ap, int reg, u32 val)
5162 if (sata_scr_valid(ap)) {
5163 ap->ops->scr_write(ap, reg, val);
5170 * sata_scr_write_flush - write SCR register of the specified port and flush
5171 * @ap: ATA port to write SCR for
5172 * @reg: SCR to write
5173 * @val: value to write
5175 * This function is identical to sata_scr_write() except that this
5176 * function performs flush after writing to the register.
5182 * 0 on success, negative errno on failure.
5184 int sata_scr_write_flush(struct ata_port *ap, int reg, u32 val)
5186 if (sata_scr_valid(ap)) {
5187 ap->ops->scr_write(ap, reg, val);
5188 ap->ops->scr_read(ap, reg);
5195 * ata_port_online - test whether the given port is online
5196 * @ap: ATA port to test
5198 * Test whether @ap is online. Note that this function returns 0
5199 * if online status of @ap cannot be obtained, so
5200 * ata_port_online(ap) != !ata_port_offline(ap).
5206 * 1 if the port online status is available and online.
5208 int ata_port_online(struct ata_port *ap)
5212 if (!sata_scr_read(ap, SCR_STATUS, &sstatus) && (sstatus & 0xf) == 0x3)
5218 * ata_port_offline - test whether the given port is offline
5219 * @ap: ATA port to test
5221 * Test whether @ap is offline. Note that this function returns
5222 * 0 if offline status of @ap cannot be obtained, so
5223 * ata_port_online(ap) != !ata_port_offline(ap).
5229 * 1 if the port offline status is available and offline.
5231 int ata_port_offline(struct ata_port *ap)
5235 if (!sata_scr_read(ap, SCR_STATUS, &sstatus) && (sstatus & 0xf) != 0x3)
5240 int ata_flush_cache(struct ata_device *dev)
5242 unsigned int err_mask;
5245 if (!ata_try_flush_cache(dev))
5248 if (dev->flags & ATA_DFLAG_FLUSH_EXT)
5249 cmd = ATA_CMD_FLUSH_EXT;
5251 cmd = ATA_CMD_FLUSH;
5253 err_mask = ata_do_simple_cmd(dev, cmd);
5255 ata_dev_printk(dev, KERN_ERR, "failed to flush cache\n");
5262 static int ata_host_request_pm(struct ata_host *host, pm_message_t mesg,
5263 unsigned int action, unsigned int ehi_flags,
5266 unsigned long flags;
5269 for (i = 0; i < host->n_ports; i++) {
5270 struct ata_port *ap = host->ports[i];
5272 /* Previous resume operation might still be in
5273 * progress. Wait for PM_PENDING to clear.
5275 if (ap->pflags & ATA_PFLAG_PM_PENDING) {
5276 ata_port_wait_eh(ap);
5277 WARN_ON(ap->pflags & ATA_PFLAG_PM_PENDING);
5280 /* request PM ops to EH */
5281 spin_lock_irqsave(ap->lock, flags);
5286 ap->pm_result = &rc;
5289 ap->pflags |= ATA_PFLAG_PM_PENDING;
5290 ap->eh_info.action |= action;
5291 ap->eh_info.flags |= ehi_flags;
5293 ata_port_schedule_eh(ap);
5295 spin_unlock_irqrestore(ap->lock, flags);
5297 /* wait and check result */
5299 ata_port_wait_eh(ap);
5300 WARN_ON(ap->pflags & ATA_PFLAG_PM_PENDING);
5310 * ata_host_suspend - suspend host
5311 * @host: host to suspend
5314 * Suspend @host. Actual operation is performed by EH. This
5315 * function requests EH to perform PM operations and waits for EH
5319 * Kernel thread context (may sleep).
5322 * 0 on success, -errno on failure.
5324 int ata_host_suspend(struct ata_host *host, pm_message_t mesg)
5328 rc = ata_host_request_pm(host, mesg, 0, ATA_EHI_QUIET, 1);
5332 /* EH is quiescent now. Fail if we have any ready device.
5333 * This happens if hotplug occurs between completion of device
5334 * suspension and here.
5336 for (i = 0; i < host->n_ports; i++) {
5337 struct ata_port *ap = host->ports[i];
5339 for (j = 0; j < ATA_MAX_DEVICES; j++) {
5340 struct ata_device *dev = &ap->device[j];
5342 if (ata_dev_ready(dev)) {
5343 ata_port_printk(ap, KERN_WARNING,
5344 "suspend failed, device %d "
5345 "still active\n", dev->devno);
5352 host->dev->power.power_state = mesg;
5356 ata_host_resume(host);
5361 * ata_host_resume - resume host
5362 * @host: host to resume
5364 * Resume @host. Actual operation is performed by EH. This
5365 * function requests EH to perform PM operations and returns.
5366 * Note that all resume operations are performed parallely.
5369 * Kernel thread context (may sleep).
5371 void ata_host_resume(struct ata_host *host)
5373 ata_host_request_pm(host, PMSG_ON, ATA_EH_SOFTRESET,
5374 ATA_EHI_NO_AUTOPSY | ATA_EHI_QUIET, 0);
5375 host->dev->power.power_state = PMSG_ON;
5379 * ata_port_start - Set port up for dma.
5380 * @ap: Port to initialize
5382 * Called just after data structures for each port are
5383 * initialized. Allocates space for PRD table.
5385 * May be used as the port_start() entry in ata_port_operations.
5388 * Inherited from caller.
5390 int ata_port_start(struct ata_port *ap)
5392 struct device *dev = ap->dev;
5395 ap->prd = dmam_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma,
5400 rc = ata_pad_alloc(ap, dev);
5404 DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd,
5405 (unsigned long long)ap->prd_dma);
5410 * ata_dev_init - Initialize an ata_device structure
5411 * @dev: Device structure to initialize
5413 * Initialize @dev in preparation for probing.
5416 * Inherited from caller.
5418 void ata_dev_init(struct ata_device *dev)
5420 struct ata_port *ap = dev->ap;
5421 unsigned long flags;
5423 /* SATA spd limit is bound to the first device */
5424 ap->sata_spd_limit = ap->hw_sata_spd_limit;
5426 /* High bits of dev->flags are used to record warm plug
5427 * requests which occur asynchronously. Synchronize using
5430 spin_lock_irqsave(ap->lock, flags);
5431 dev->flags &= ~ATA_DFLAG_INIT_MASK;
5432 spin_unlock_irqrestore(ap->lock, flags);
5434 memset((void *)dev + ATA_DEVICE_CLEAR_OFFSET, 0,
5435 sizeof(*dev) - ATA_DEVICE_CLEAR_OFFSET);
5436 dev->pio_mask = UINT_MAX;
5437 dev->mwdma_mask = UINT_MAX;
5438 dev->udma_mask = UINT_MAX;
5442 * ata_port_init - Initialize an ata_port structure
5443 * @ap: Structure to initialize
5444 * @host: Collection of hosts to which @ap belongs
5445 * @ent: Probe information provided by low-level driver
5446 * @port_no: Port number associated with this ata_port
5448 * Initialize a new ata_port structure.
5451 * Inherited from caller.
5453 void ata_port_init(struct ata_port *ap, struct ata_host *host,
5454 const struct ata_probe_ent *ent, unsigned int port_no)
5458 ap->lock = &host->lock;
5459 ap->flags = ATA_FLAG_DISABLED;
5460 ap->id = ata_unique_id++;
5461 ap->ctl = ATA_DEVCTL_OBS;
5464 ap->port_no = port_no;
5465 if (port_no == 1 && ent->pinfo2) {
5466 ap->pio_mask = ent->pinfo2->pio_mask;
5467 ap->mwdma_mask = ent->pinfo2->mwdma_mask;
5468 ap->udma_mask = ent->pinfo2->udma_mask;
5469 ap->flags |= ent->pinfo2->flags;
5470 ap->ops = ent->pinfo2->port_ops;
5472 ap->pio_mask = ent->pio_mask;
5473 ap->mwdma_mask = ent->mwdma_mask;
5474 ap->udma_mask = ent->udma_mask;
5475 ap->flags |= ent->port_flags;
5476 ap->ops = ent->port_ops;
5478 ap->hw_sata_spd_limit = UINT_MAX;
5479 ap->active_tag = ATA_TAG_POISON;
5480 ap->last_ctl = 0xFF;
5482 #if defined(ATA_VERBOSE_DEBUG)
5483 /* turn on all debugging levels */
5484 ap->msg_enable = 0x00FF;
5485 #elif defined(ATA_DEBUG)
5486 ap->msg_enable = ATA_MSG_DRV | ATA_MSG_INFO | ATA_MSG_CTL | ATA_MSG_WARN | ATA_MSG_ERR;
5488 ap->msg_enable = ATA_MSG_DRV | ATA_MSG_ERR | ATA_MSG_WARN;
5491 INIT_DELAYED_WORK(&ap->port_task, NULL);
5492 INIT_DELAYED_WORK(&ap->hotplug_task, ata_scsi_hotplug);
5493 INIT_WORK(&ap->scsi_rescan_task, ata_scsi_dev_rescan);
5494 INIT_LIST_HEAD(&ap->eh_done_q);
5495 init_waitqueue_head(&ap->eh_wait_q);
5497 /* set cable type */
5498 ap->cbl = ATA_CBL_NONE;
5499 if (ap->flags & ATA_FLAG_SATA)
5500 ap->cbl = ATA_CBL_SATA;
5502 for (i = 0; i < ATA_MAX_DEVICES; i++) {
5503 struct ata_device *dev = &ap->device[i];
5510 ap->stats.unhandled_irq = 1;
5511 ap->stats.idle_irq = 1;
5514 memcpy(&ap->ioaddr, &ent->port[port_no], sizeof(struct ata_ioports));
5518 * ata_port_init_shost - Initialize SCSI host associated with ATA port
5519 * @ap: ATA port to initialize SCSI host for
5520 * @shost: SCSI host associated with @ap
5522 * Initialize SCSI host @shost associated with ATA port @ap.
5525 * Inherited from caller.
5527 static void ata_port_init_shost(struct ata_port *ap, struct Scsi_Host *shost)
5529 ap->scsi_host = shost;
5531 shost->unique_id = ap->id;
5534 shost->max_channel = 1;
5535 shost->max_cmd_len = 12;
5539 * ata_port_add - Attach low-level ATA driver to system
5540 * @ent: Information provided by low-level driver
5541 * @host: Collections of ports to which we add
5542 * @port_no: Port number associated with this host
5544 * Attach low-level ATA driver to system.
5547 * PCI/etc. bus probe sem.
5550 * New ata_port on success, for NULL on error.
5552 static struct ata_port * ata_port_add(const struct ata_probe_ent *ent,
5553 struct ata_host *host,
5554 unsigned int port_no)
5556 struct Scsi_Host *shost;
5557 struct ata_port *ap;
5561 if (!ent->port_ops->error_handler &&
5562 !(ent->port_flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST))) {
5563 printk(KERN_ERR "ata%u: no reset mechanism available\n",
5568 shost = scsi_host_alloc(ent->sht, sizeof(struct ata_port));
5572 shost->transportt = &ata_scsi_transport_template;
5574 ap = ata_shost_to_port(shost);
5576 ata_port_init(ap, host, ent, port_no);
5577 ata_port_init_shost(ap, shost);
5582 static void ata_host_release(struct device *gendev, void *res)
5584 struct ata_host *host = dev_get_drvdata(gendev);
5587 for (i = 0; i < host->n_ports; i++) {
5588 struct ata_port *ap = host->ports[i];
5593 if (ap->ops->port_stop)
5594 ap->ops->port_stop(ap);
5596 scsi_host_put(ap->scsi_host);
5599 if (host->ops->host_stop)
5600 host->ops->host_stop(host);
5604 * ata_sas_host_init - Initialize a host struct
5605 * @host: host to initialize
5606 * @dev: device host is attached to
5607 * @flags: host flags
5611 * PCI/etc. bus probe sem.
5615 void ata_host_init(struct ata_host *host, struct device *dev,
5616 unsigned long flags, const struct ata_port_operations *ops)
5618 spin_lock_init(&host->lock);
5620 host->flags = flags;
5625 * ata_device_add - Register hardware device with ATA and SCSI layers
5626 * @ent: Probe information describing hardware device to be registered
5628 * This function processes the information provided in the probe
5629 * information struct @ent, allocates the necessary ATA and SCSI
5630 * host information structures, initializes them, and registers
5631 * everything with requisite kernel subsystems.
5633 * This function requests irqs, probes the ATA bus, and probes
5637 * PCI/etc. bus probe sem.
5640 * Number of ports registered. Zero on error (no ports registered).
5642 int ata_device_add(const struct ata_probe_ent *ent)
5645 struct device *dev = ent->dev;
5646 struct ata_host *host;
5651 if (ent->irq == 0) {
5652 dev_printk(KERN_ERR, dev, "is not available: No interrupt assigned.\n");
5656 if (!devres_open_group(dev, ata_device_add, GFP_KERNEL))
5659 /* alloc a container for our list of ATA ports (buses) */
5660 host = devres_alloc(ata_host_release, sizeof(struct ata_host) +
5661 (ent->n_ports * sizeof(void *)), GFP_KERNEL);
5664 devres_add(dev, host);
5665 dev_set_drvdata(dev, host);
5667 ata_host_init(host, dev, ent->_host_flags, ent->port_ops);
5668 host->n_ports = ent->n_ports;
5669 host->irq = ent->irq;
5670 host->irq2 = ent->irq2;
5671 host->iomap = ent->iomap;
5672 host->private_data = ent->private_data;
5674 /* register each port bound to this device */
5675 for (i = 0; i < host->n_ports; i++) {
5676 struct ata_port *ap;
5677 unsigned long xfer_mode_mask;
5678 int irq_line = ent->irq;
5680 ap = ata_port_add(ent, host, i);
5681 host->ports[i] = ap;
5686 if (ent->dummy_port_mask & (1 << i)) {
5687 ata_port_printk(ap, KERN_INFO, "DUMMY\n");
5688 ap->ops = &ata_dummy_port_ops;
5693 rc = ap->ops->port_start(ap);
5695 host->ports[i] = NULL;
5696 scsi_host_put(ap->scsi_host);
5700 /* Report the secondary IRQ for second channel legacy */
5701 if (i == 1 && ent->irq2)
5702 irq_line = ent->irq2;
5704 xfer_mode_mask =(ap->udma_mask << ATA_SHIFT_UDMA) |
5705 (ap->mwdma_mask << ATA_SHIFT_MWDMA) |
5706 (ap->pio_mask << ATA_SHIFT_PIO);
5708 /* print per-port info to dmesg */
5709 ata_port_printk(ap, KERN_INFO, "%cATA max %s cmd 0x%p "
5710 "ctl 0x%p bmdma 0x%p irq %d\n",
5711 ap->flags & ATA_FLAG_SATA ? 'S' : 'P',
5712 ata_mode_string(xfer_mode_mask),
5713 ap->ioaddr.cmd_addr,
5714 ap->ioaddr.ctl_addr,
5715 ap->ioaddr.bmdma_addr,
5718 /* freeze port before requesting IRQ */
5719 ata_eh_freeze_port(ap);
5722 /* obtain irq, that may be shared between channels */
5723 rc = devm_request_irq(dev, ent->irq, ent->port_ops->irq_handler,
5724 ent->irq_flags, DRV_NAME, host);
5726 dev_printk(KERN_ERR, dev, "irq %lu request failed: %d\n",
5731 /* do we have a second IRQ for the other channel, eg legacy mode */
5733 /* We will get weird core code crashes later if this is true
5735 BUG_ON(ent->irq == ent->irq2);
5737 rc = devm_request_irq(dev, ent->irq2,
5738 ent->port_ops->irq_handler, ent->irq_flags,
5741 dev_printk(KERN_ERR, dev, "irq %lu request failed: %d\n",
5747 /* resource acquisition complete */
5748 devres_remove_group(dev, ata_device_add);
5750 /* perform each probe synchronously */
5751 DPRINTK("probe begin\n");
5752 for (i = 0; i < host->n_ports; i++) {
5753 struct ata_port *ap = host->ports[i];
5757 /* init sata_spd_limit to the current value */
5758 if (sata_scr_read(ap, SCR_CONTROL, &scontrol) == 0) {
5759 int spd = (scontrol >> 4) & 0xf;
5760 ap->hw_sata_spd_limit &= (1 << spd) - 1;
5762 ap->sata_spd_limit = ap->hw_sata_spd_limit;
5764 rc = scsi_add_host(ap->scsi_host, dev);
5766 ata_port_printk(ap, KERN_ERR, "scsi_add_host failed\n");
5767 /* FIXME: do something useful here */
5768 /* FIXME: handle unconditional calls to
5769 * scsi_scan_host and ata_host_remove, below,
5774 if (ap->ops->error_handler) {
5775 struct ata_eh_info *ehi = &ap->eh_info;
5776 unsigned long flags;
5780 /* kick EH for boot probing */
5781 spin_lock_irqsave(ap->lock, flags);
5783 ehi->probe_mask = (1 << ATA_MAX_DEVICES) - 1;
5784 ehi->action |= ATA_EH_SOFTRESET;
5785 ehi->flags |= ATA_EHI_NO_AUTOPSY | ATA_EHI_QUIET;
5787 ap->pflags |= ATA_PFLAG_LOADING;
5788 ata_port_schedule_eh(ap);
5790 spin_unlock_irqrestore(ap->lock, flags);
5792 /* wait for EH to finish */
5793 ata_port_wait_eh(ap);
5795 DPRINTK("ata%u: bus probe begin\n", ap->id);
5796 rc = ata_bus_probe(ap);
5797 DPRINTK("ata%u: bus probe end\n", ap->id);
5800 /* FIXME: do something useful here?
5801 * Current libata behavior will
5802 * tear down everything when
5803 * the module is removed
5804 * or the h/w is unplugged.
5810 /* probes are done, now scan each port's disk(s) */
5811 DPRINTK("host probe begin\n");
5812 for (i = 0; i < host->n_ports; i++) {
5813 struct ata_port *ap = host->ports[i];
5815 ata_scsi_scan_host(ap);
5818 VPRINTK("EXIT, returning %u\n", ent->n_ports);
5819 return ent->n_ports; /* success */
5822 devres_release_group(dev, ata_device_add);
5823 dev_set_drvdata(dev, NULL);
5824 VPRINTK("EXIT, returning %d\n", rc);
5829 * ata_port_detach - Detach ATA port in prepration of device removal
5830 * @ap: ATA port to be detached
5832 * Detach all ATA devices and the associated SCSI devices of @ap;
5833 * then, remove the associated SCSI host. @ap is guaranteed to
5834 * be quiescent on return from this function.
5837 * Kernel thread context (may sleep).
5839 void ata_port_detach(struct ata_port *ap)
5841 unsigned long flags;
5844 if (!ap->ops->error_handler)
5847 /* tell EH we're leaving & flush EH */
5848 spin_lock_irqsave(ap->lock, flags);
5849 ap->pflags |= ATA_PFLAG_UNLOADING;
5850 spin_unlock_irqrestore(ap->lock, flags);
5852 ata_port_wait_eh(ap);
5854 /* EH is now guaranteed to see UNLOADING, so no new device
5855 * will be attached. Disable all existing devices.
5857 spin_lock_irqsave(ap->lock, flags);
5859 for (i = 0; i < ATA_MAX_DEVICES; i++)
5860 ata_dev_disable(&ap->device[i]);
5862 spin_unlock_irqrestore(ap->lock, flags);
5864 /* Final freeze & EH. All in-flight commands are aborted. EH
5865 * will be skipped and retrials will be terminated with bad
5868 spin_lock_irqsave(ap->lock, flags);
5869 ata_port_freeze(ap); /* won't be thawed */
5870 spin_unlock_irqrestore(ap->lock, flags);
5872 ata_port_wait_eh(ap);
5874 /* Flush hotplug task. The sequence is similar to
5875 * ata_port_flush_task().
5877 flush_workqueue(ata_aux_wq);
5878 cancel_delayed_work(&ap->hotplug_task);
5879 flush_workqueue(ata_aux_wq);
5882 /* remove the associated SCSI host */
5883 scsi_remove_host(ap->scsi_host);
5887 * ata_host_detach - Detach all ports of an ATA host
5888 * @host: Host to detach
5890 * Detach all ports of @host.
5893 * Kernel thread context (may sleep).
5895 void ata_host_detach(struct ata_host *host)
5899 for (i = 0; i < host->n_ports; i++)
5900 ata_port_detach(host->ports[i]);
5903 struct ata_probe_ent *
5904 ata_probe_ent_alloc(struct device *dev, const struct ata_port_info *port)
5906 struct ata_probe_ent *probe_ent;
5908 /* XXX - the following if can go away once all LLDs are managed */
5909 if (!list_empty(&dev->devres_head))
5910 probe_ent = devm_kzalloc(dev, sizeof(*probe_ent), GFP_KERNEL);
5912 probe_ent = kzalloc(sizeof(*probe_ent), GFP_KERNEL);
5914 printk(KERN_ERR DRV_NAME "(%s): out of memory\n",
5915 kobject_name(&(dev->kobj)));
5919 INIT_LIST_HEAD(&probe_ent->node);
5920 probe_ent->dev = dev;
5922 probe_ent->sht = port->sht;
5923 probe_ent->port_flags = port->flags;
5924 probe_ent->pio_mask = port->pio_mask;
5925 probe_ent->mwdma_mask = port->mwdma_mask;
5926 probe_ent->udma_mask = port->udma_mask;
5927 probe_ent->port_ops = port->port_ops;
5928 probe_ent->private_data = port->private_data;
5934 * ata_std_ports - initialize ioaddr with standard port offsets.
5935 * @ioaddr: IO address structure to be initialized
5937 * Utility function which initializes data_addr, error_addr,
5938 * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
5939 * device_addr, status_addr, and command_addr to standard offsets
5940 * relative to cmd_addr.
5942 * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
5945 void ata_std_ports(struct ata_ioports *ioaddr)
5947 ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA;
5948 ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR;
5949 ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE;
5950 ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT;
5951 ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL;
5952 ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM;
5953 ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH;
5954 ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE;
5955 ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS;
5956 ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD;
5963 * ata_pci_remove_one - PCI layer callback for device removal
5964 * @pdev: PCI device that was removed
5966 * PCI layer indicates to libata via this hook that hot-unplug or
5967 * module unload event has occurred. Detach all ports. Resource
5968 * release is handled via devres.
5971 * Inherited from PCI layer (may sleep).
5973 void ata_pci_remove_one(struct pci_dev *pdev)
5975 struct device *dev = pci_dev_to_dev(pdev);
5976 struct ata_host *host = dev_get_drvdata(dev);
5978 ata_host_detach(host);
5981 /* move to PCI subsystem */
5982 int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits)
5984 unsigned long tmp = 0;
5986 switch (bits->width) {
5989 pci_read_config_byte(pdev, bits->reg, &tmp8);
5995 pci_read_config_word(pdev, bits->reg, &tmp16);
6001 pci_read_config_dword(pdev, bits->reg, &tmp32);
6012 return (tmp == bits->val) ? 1 : 0;
6015 void ata_pci_device_do_suspend(struct pci_dev *pdev, pm_message_t mesg)
6017 pci_save_state(pdev);
6019 if (mesg.event == PM_EVENT_SUSPEND) {
6020 pci_disable_device(pdev);
6021 pci_set_power_state(pdev, PCI_D3hot);
6025 int ata_pci_device_do_resume(struct pci_dev *pdev)
6029 pci_set_power_state(pdev, PCI_D0);
6030 pci_restore_state(pdev);
6032 rc = pcim_enable_device(pdev);
6034 dev_printk(KERN_ERR, &pdev->dev,
6035 "failed to enable device after resume (%d)\n", rc);
6039 pci_set_master(pdev);
6043 int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg)
6045 struct ata_host *host = dev_get_drvdata(&pdev->dev);
6048 rc = ata_host_suspend(host, mesg);
6052 ata_pci_device_do_suspend(pdev, mesg);
6057 int ata_pci_device_resume(struct pci_dev *pdev)
6059 struct ata_host *host = dev_get_drvdata(&pdev->dev);
6062 rc = ata_pci_device_do_resume(pdev);
6064 ata_host_resume(host);
6067 #endif /* CONFIG_PCI */
6070 static int __init ata_init(void)
6072 ata_probe_timeout *= HZ;
6073 ata_wq = create_workqueue("ata");
6077 ata_aux_wq = create_singlethread_workqueue("ata_aux");
6079 destroy_workqueue(ata_wq);
6083 printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n");
6087 static void __exit ata_exit(void)
6089 destroy_workqueue(ata_wq);
6090 destroy_workqueue(ata_aux_wq);
6093 subsys_initcall(ata_init);
6094 module_exit(ata_exit);
6096 static unsigned long ratelimit_time;
6097 static DEFINE_SPINLOCK(ata_ratelimit_lock);
6099 int ata_ratelimit(void)
6102 unsigned long flags;
6104 spin_lock_irqsave(&ata_ratelimit_lock, flags);
6106 if (time_after(jiffies, ratelimit_time)) {
6108 ratelimit_time = jiffies + (HZ/5);
6112 spin_unlock_irqrestore(&ata_ratelimit_lock, flags);
6118 * ata_wait_register - wait until register value changes
6119 * @reg: IO-mapped register
6120 * @mask: Mask to apply to read register value
6121 * @val: Wait condition
6122 * @interval_msec: polling interval in milliseconds
6123 * @timeout_msec: timeout in milliseconds
6125 * Waiting for some bits of register to change is a common
6126 * operation for ATA controllers. This function reads 32bit LE
6127 * IO-mapped register @reg and tests for the following condition.
6129 * (*@reg & mask) != val
6131 * If the condition is met, it returns; otherwise, the process is
6132 * repeated after @interval_msec until timeout.
6135 * Kernel thread context (may sleep)
6138 * The final register value.
6140 u32 ata_wait_register(void __iomem *reg, u32 mask, u32 val,
6141 unsigned long interval_msec,
6142 unsigned long timeout_msec)
6144 unsigned long timeout;
6147 tmp = ioread32(reg);
6149 /* Calculate timeout _after_ the first read to make sure
6150 * preceding writes reach the controller before starting to
6151 * eat away the timeout.
6153 timeout = jiffies + (timeout_msec * HZ) / 1000;
6155 while ((tmp & mask) == val && time_before(jiffies, timeout)) {
6156 msleep(interval_msec);
6157 tmp = ioread32(reg);
6166 static void ata_dummy_noret(struct ata_port *ap) { }
6167 static int ata_dummy_ret0(struct ata_port *ap) { return 0; }
6168 static void ata_dummy_qc_noret(struct ata_queued_cmd *qc) { }
6170 static u8 ata_dummy_check_status(struct ata_port *ap)
6175 static unsigned int ata_dummy_qc_issue(struct ata_queued_cmd *qc)
6177 return AC_ERR_SYSTEM;
6180 const struct ata_port_operations ata_dummy_port_ops = {
6181 .port_disable = ata_port_disable,
6182 .check_status = ata_dummy_check_status,
6183 .check_altstatus = ata_dummy_check_status,
6184 .dev_select = ata_noop_dev_select,
6185 .qc_prep = ata_noop_qc_prep,
6186 .qc_issue = ata_dummy_qc_issue,
6187 .freeze = ata_dummy_noret,
6188 .thaw = ata_dummy_noret,
6189 .error_handler = ata_dummy_noret,
6190 .post_internal_cmd = ata_dummy_qc_noret,
6191 .irq_clear = ata_dummy_noret,
6192 .port_start = ata_dummy_ret0,
6193 .port_stop = ata_dummy_noret,
6197 * libata is essentially a library of internal helper functions for
6198 * low-level ATA host controller drivers. As such, the API/ABI is
6199 * likely to change as new drivers are added and updated.
6200 * Do not depend on ABI/API stability.
6203 EXPORT_SYMBOL_GPL(sata_deb_timing_normal);
6204 EXPORT_SYMBOL_GPL(sata_deb_timing_hotplug);
6205 EXPORT_SYMBOL_GPL(sata_deb_timing_long);
6206 EXPORT_SYMBOL_GPL(ata_dummy_port_ops);
6207 EXPORT_SYMBOL_GPL(ata_std_bios_param);
6208 EXPORT_SYMBOL_GPL(ata_std_ports);
6209 EXPORT_SYMBOL_GPL(ata_host_init);
6210 EXPORT_SYMBOL_GPL(ata_device_add);
6211 EXPORT_SYMBOL_GPL(ata_host_detach);
6212 EXPORT_SYMBOL_GPL(ata_sg_init);
6213 EXPORT_SYMBOL_GPL(ata_sg_init_one);
6214 EXPORT_SYMBOL_GPL(ata_hsm_move);
6215 EXPORT_SYMBOL_GPL(ata_qc_complete);
6216 EXPORT_SYMBOL_GPL(ata_qc_complete_multiple);
6217 EXPORT_SYMBOL_GPL(ata_qc_issue_prot);
6218 EXPORT_SYMBOL_GPL(ata_tf_load);
6219 EXPORT_SYMBOL_GPL(ata_tf_read);
6220 EXPORT_SYMBOL_GPL(ata_noop_dev_select);
6221 EXPORT_SYMBOL_GPL(ata_std_dev_select);
6222 EXPORT_SYMBOL_GPL(ata_tf_to_fis);
6223 EXPORT_SYMBOL_GPL(ata_tf_from_fis);
6224 EXPORT_SYMBOL_GPL(ata_check_status);
6225 EXPORT_SYMBOL_GPL(ata_altstatus);
6226 EXPORT_SYMBOL_GPL(ata_exec_command);
6227 EXPORT_SYMBOL_GPL(ata_port_start);
6228 EXPORT_SYMBOL_GPL(ata_interrupt);
6229 EXPORT_SYMBOL_GPL(ata_data_xfer);
6230 EXPORT_SYMBOL_GPL(ata_data_xfer_noirq);
6231 EXPORT_SYMBOL_GPL(ata_qc_prep);
6232 EXPORT_SYMBOL_GPL(ata_noop_qc_prep);
6233 EXPORT_SYMBOL_GPL(ata_bmdma_setup);
6234 EXPORT_SYMBOL_GPL(ata_bmdma_start);
6235 EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear);
6236 EXPORT_SYMBOL_GPL(ata_bmdma_status);
6237 EXPORT_SYMBOL_GPL(ata_bmdma_stop);
6238 EXPORT_SYMBOL_GPL(ata_bmdma_freeze);
6239 EXPORT_SYMBOL_GPL(ata_bmdma_thaw);
6240 EXPORT_SYMBOL_GPL(ata_bmdma_drive_eh);
6241 EXPORT_SYMBOL_GPL(ata_bmdma_error_handler);
6242 EXPORT_SYMBOL_GPL(ata_bmdma_post_internal_cmd);
6243 EXPORT_SYMBOL_GPL(ata_port_probe);
6244 EXPORT_SYMBOL_GPL(sata_set_spd);
6245 EXPORT_SYMBOL_GPL(sata_phy_debounce);
6246 EXPORT_SYMBOL_GPL(sata_phy_resume);
6247 EXPORT_SYMBOL_GPL(sata_phy_reset);
6248 EXPORT_SYMBOL_GPL(__sata_phy_reset);
6249 EXPORT_SYMBOL_GPL(ata_bus_reset);
6250 EXPORT_SYMBOL_GPL(ata_std_prereset);
6251 EXPORT_SYMBOL_GPL(ata_std_softreset);
6252 EXPORT_SYMBOL_GPL(sata_port_hardreset);
6253 EXPORT_SYMBOL_GPL(sata_std_hardreset);
6254 EXPORT_SYMBOL_GPL(ata_std_postreset);
6255 EXPORT_SYMBOL_GPL(ata_dev_classify);
6256 EXPORT_SYMBOL_GPL(ata_dev_pair);
6257 EXPORT_SYMBOL_GPL(ata_port_disable);
6258 EXPORT_SYMBOL_GPL(ata_ratelimit);
6259 EXPORT_SYMBOL_GPL(ata_wait_register);
6260 EXPORT_SYMBOL_GPL(ata_busy_sleep);
6261 EXPORT_SYMBOL_GPL(ata_port_queue_task);
6262 EXPORT_SYMBOL_GPL(ata_scsi_ioctl);
6263 EXPORT_SYMBOL_GPL(ata_scsi_queuecmd);
6264 EXPORT_SYMBOL_GPL(ata_scsi_slave_config);
6265 EXPORT_SYMBOL_GPL(ata_scsi_slave_destroy);
6266 EXPORT_SYMBOL_GPL(ata_scsi_change_queue_depth);
6267 EXPORT_SYMBOL_GPL(ata_host_intr);
6268 EXPORT_SYMBOL_GPL(sata_scr_valid);
6269 EXPORT_SYMBOL_GPL(sata_scr_read);
6270 EXPORT_SYMBOL_GPL(sata_scr_write);
6271 EXPORT_SYMBOL_GPL(sata_scr_write_flush);
6272 EXPORT_SYMBOL_GPL(ata_port_online);
6273 EXPORT_SYMBOL_GPL(ata_port_offline);
6274 EXPORT_SYMBOL_GPL(ata_host_suspend);
6275 EXPORT_SYMBOL_GPL(ata_host_resume);
6276 EXPORT_SYMBOL_GPL(ata_id_string);
6277 EXPORT_SYMBOL_GPL(ata_id_c_string);
6278 EXPORT_SYMBOL_GPL(ata_device_blacklisted);
6279 EXPORT_SYMBOL_GPL(ata_scsi_simulate);
6281 EXPORT_SYMBOL_GPL(ata_pio_need_iordy);
6282 EXPORT_SYMBOL_GPL(ata_timing_compute);
6283 EXPORT_SYMBOL_GPL(ata_timing_merge);
6286 EXPORT_SYMBOL_GPL(pci_test_config_bits);
6287 EXPORT_SYMBOL_GPL(ata_pci_init_native_mode);
6288 EXPORT_SYMBOL_GPL(ata_pci_init_one);
6289 EXPORT_SYMBOL_GPL(ata_pci_remove_one);
6290 EXPORT_SYMBOL_GPL(ata_pci_device_do_suspend);
6291 EXPORT_SYMBOL_GPL(ata_pci_device_do_resume);
6292 EXPORT_SYMBOL_GPL(ata_pci_device_suspend);
6293 EXPORT_SYMBOL_GPL(ata_pci_device_resume);
6294 EXPORT_SYMBOL_GPL(ata_pci_default_filter);
6295 EXPORT_SYMBOL_GPL(ata_pci_clear_simplex);
6296 #endif /* CONFIG_PCI */
6298 EXPORT_SYMBOL_GPL(ata_scsi_device_suspend);
6299 EXPORT_SYMBOL_GPL(ata_scsi_device_resume);
6301 EXPORT_SYMBOL_GPL(ata_eng_timeout);
6302 EXPORT_SYMBOL_GPL(ata_port_schedule_eh);
6303 EXPORT_SYMBOL_GPL(ata_port_abort);
6304 EXPORT_SYMBOL_GPL(ata_port_freeze);
6305 EXPORT_SYMBOL_GPL(ata_eh_freeze_port);
6306 EXPORT_SYMBOL_GPL(ata_eh_thaw_port);
6307 EXPORT_SYMBOL_GPL(ata_eh_qc_complete);
6308 EXPORT_SYMBOL_GPL(ata_eh_qc_retry);
6309 EXPORT_SYMBOL_GPL(ata_do_eh);
6310 EXPORT_SYMBOL_GPL(ata_irq_on);
6311 EXPORT_SYMBOL_GPL(ata_dummy_irq_on);
6312 EXPORT_SYMBOL_GPL(ata_irq_ack);
6313 EXPORT_SYMBOL_GPL(ata_dummy_irq_ack);