2 * libata-core.c - helper library for ATA
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
8 * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2004 Jeff Garzik
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
35 #include <linux/kernel.h>
36 #include <linux/module.h>
37 #include <linux/pci.h>
38 #include <linux/init.h>
39 #include <linux/list.h>
41 #include <linux/highmem.h>
42 #include <linux/spinlock.h>
43 #include <linux/blkdev.h>
44 #include <linux/delay.h>
45 #include <linux/timer.h>
46 #include <linux/interrupt.h>
47 #include <linux/completion.h>
48 #include <linux/suspend.h>
49 #include <linux/workqueue.h>
50 #include <linux/jiffies.h>
51 #include <linux/scatterlist.h>
52 #include <scsi/scsi.h>
53 #include <scsi/scsi_cmnd.h>
54 #include <scsi/scsi_host.h>
55 #include <linux/libata.h>
57 #include <asm/semaphore.h>
58 #include <asm/byteorder.h>
62 /* debounce timing parameters in msecs { interval, duration, timeout } */
63 const unsigned long sata_deb_timing_normal[] = { 5, 100, 2000 };
64 const unsigned long sata_deb_timing_hotplug[] = { 25, 500, 2000 };
65 const unsigned long sata_deb_timing_long[] = { 100, 2000, 5000 };
67 static unsigned int ata_dev_init_params(struct ata_device *dev,
68 u16 heads, u16 sectors);
69 static unsigned int ata_dev_set_xfermode(struct ata_device *dev);
70 static void ata_dev_xfermask(struct ata_device *dev);
72 static unsigned int ata_unique_id = 1;
73 static struct workqueue_struct *ata_wq;
75 struct workqueue_struct *ata_aux_wq;
77 int atapi_enabled = 1;
78 module_param(atapi_enabled, int, 0444);
79 MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)");
82 module_param(atapi_dmadir, int, 0444);
83 MODULE_PARM_DESC(atapi_dmadir, "Enable ATAPI DMADIR bridge support (0=off, 1=on)");
86 module_param_named(fua, libata_fua, int, 0444);
87 MODULE_PARM_DESC(fua, "FUA support (0=off, 1=on)");
89 static int ata_probe_timeout = ATA_TMOUT_INTERNAL / HZ;
90 module_param(ata_probe_timeout, int, 0444);
91 MODULE_PARM_DESC(ata_probe_timeout, "Set ATA probing timeout (seconds)");
93 MODULE_AUTHOR("Jeff Garzik");
94 MODULE_DESCRIPTION("Library module for ATA devices");
95 MODULE_LICENSE("GPL");
96 MODULE_VERSION(DRV_VERSION);
100 * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure
101 * @tf: Taskfile to convert
102 * @fis: Buffer into which data will output
103 * @pmp: Port multiplier port
105 * Converts a standard ATA taskfile to a Serial ATA
106 * FIS structure (Register - Host to Device).
109 * Inherited from caller.
112 void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp)
114 fis[0] = 0x27; /* Register - Host to Device FIS */
115 fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number,
116 bit 7 indicates Command FIS */
117 fis[2] = tf->command;
118 fis[3] = tf->feature;
125 fis[8] = tf->hob_lbal;
126 fis[9] = tf->hob_lbam;
127 fis[10] = tf->hob_lbah;
128 fis[11] = tf->hob_feature;
131 fis[13] = tf->hob_nsect;
142 * ata_tf_from_fis - Convert SATA FIS to ATA taskfile
143 * @fis: Buffer from which data will be input
144 * @tf: Taskfile to output
146 * Converts a serial ATA FIS structure to a standard ATA taskfile.
149 * Inherited from caller.
152 void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf)
154 tf->command = fis[2]; /* status */
155 tf->feature = fis[3]; /* error */
162 tf->hob_lbal = fis[8];
163 tf->hob_lbam = fis[9];
164 tf->hob_lbah = fis[10];
167 tf->hob_nsect = fis[13];
170 static const u8 ata_rw_cmds[] = {
174 ATA_CMD_READ_MULTI_EXT,
175 ATA_CMD_WRITE_MULTI_EXT,
179 ATA_CMD_WRITE_MULTI_FUA_EXT,
183 ATA_CMD_PIO_READ_EXT,
184 ATA_CMD_PIO_WRITE_EXT,
197 ATA_CMD_WRITE_FUA_EXT
201 * ata_rwcmd_protocol - set taskfile r/w commands and protocol
202 * @qc: command to examine and configure
204 * Examine the device configuration and tf->flags to calculate
205 * the proper read/write commands and protocol to use.
210 int ata_rwcmd_protocol(struct ata_queued_cmd *qc)
212 struct ata_taskfile *tf = &qc->tf;
213 struct ata_device *dev = qc->dev;
216 int index, fua, lba48, write;
218 fua = (tf->flags & ATA_TFLAG_FUA) ? 4 : 0;
219 lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0;
220 write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0;
222 if (dev->flags & ATA_DFLAG_PIO) {
223 tf->protocol = ATA_PROT_PIO;
224 index = dev->multi_count ? 0 : 8;
225 } else if (lba48 && (qc->ap->flags & ATA_FLAG_PIO_LBA48)) {
226 /* Unable to use DMA due to host limitation */
227 tf->protocol = ATA_PROT_PIO;
228 index = dev->multi_count ? 0 : 8;
230 tf->protocol = ATA_PROT_DMA;
234 cmd = ata_rw_cmds[index + fua + lba48 + write];
243 * ata_pack_xfermask - Pack pio, mwdma and udma masks into xfer_mask
244 * @pio_mask: pio_mask
245 * @mwdma_mask: mwdma_mask
246 * @udma_mask: udma_mask
248 * Pack @pio_mask, @mwdma_mask and @udma_mask into a single
249 * unsigned int xfer_mask.
257 static unsigned int ata_pack_xfermask(unsigned int pio_mask,
258 unsigned int mwdma_mask,
259 unsigned int udma_mask)
261 return ((pio_mask << ATA_SHIFT_PIO) & ATA_MASK_PIO) |
262 ((mwdma_mask << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA) |
263 ((udma_mask << ATA_SHIFT_UDMA) & ATA_MASK_UDMA);
267 * ata_unpack_xfermask - Unpack xfer_mask into pio, mwdma and udma masks
268 * @xfer_mask: xfer_mask to unpack
269 * @pio_mask: resulting pio_mask
270 * @mwdma_mask: resulting mwdma_mask
271 * @udma_mask: resulting udma_mask
273 * Unpack @xfer_mask into @pio_mask, @mwdma_mask and @udma_mask.
274 * Any NULL distination masks will be ignored.
276 static void ata_unpack_xfermask(unsigned int xfer_mask,
277 unsigned int *pio_mask,
278 unsigned int *mwdma_mask,
279 unsigned int *udma_mask)
282 *pio_mask = (xfer_mask & ATA_MASK_PIO) >> ATA_SHIFT_PIO;
284 *mwdma_mask = (xfer_mask & ATA_MASK_MWDMA) >> ATA_SHIFT_MWDMA;
286 *udma_mask = (xfer_mask & ATA_MASK_UDMA) >> ATA_SHIFT_UDMA;
289 static const struct ata_xfer_ent {
293 { ATA_SHIFT_PIO, ATA_BITS_PIO, XFER_PIO_0 },
294 { ATA_SHIFT_MWDMA, ATA_BITS_MWDMA, XFER_MW_DMA_0 },
295 { ATA_SHIFT_UDMA, ATA_BITS_UDMA, XFER_UDMA_0 },
300 * ata_xfer_mask2mode - Find matching XFER_* for the given xfer_mask
301 * @xfer_mask: xfer_mask of interest
303 * Return matching XFER_* value for @xfer_mask. Only the highest
304 * bit of @xfer_mask is considered.
310 * Matching XFER_* value, 0 if no match found.
312 static u8 ata_xfer_mask2mode(unsigned int xfer_mask)
314 int highbit = fls(xfer_mask) - 1;
315 const struct ata_xfer_ent *ent;
317 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
318 if (highbit >= ent->shift && highbit < ent->shift + ent->bits)
319 return ent->base + highbit - ent->shift;
324 * ata_xfer_mode2mask - Find matching xfer_mask for XFER_*
325 * @xfer_mode: XFER_* of interest
327 * Return matching xfer_mask for @xfer_mode.
333 * Matching xfer_mask, 0 if no match found.
335 static unsigned int ata_xfer_mode2mask(u8 xfer_mode)
337 const struct ata_xfer_ent *ent;
339 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
340 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
341 return 1 << (ent->shift + xfer_mode - ent->base);
346 * ata_xfer_mode2shift - Find matching xfer_shift for XFER_*
347 * @xfer_mode: XFER_* of interest
349 * Return matching xfer_shift for @xfer_mode.
355 * Matching xfer_shift, -1 if no match found.
357 static int ata_xfer_mode2shift(unsigned int xfer_mode)
359 const struct ata_xfer_ent *ent;
361 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
362 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
368 * ata_mode_string - convert xfer_mask to string
369 * @xfer_mask: mask of bits supported; only highest bit counts.
371 * Determine string which represents the highest speed
372 * (highest bit in @modemask).
378 * Constant C string representing highest speed listed in
379 * @mode_mask, or the constant C string "<n/a>".
381 static const char *ata_mode_string(unsigned int xfer_mask)
383 static const char * const xfer_mode_str[] = {
407 highbit = fls(xfer_mask) - 1;
408 if (highbit >= 0 && highbit < ARRAY_SIZE(xfer_mode_str))
409 return xfer_mode_str[highbit];
413 static const char *sata_spd_string(unsigned int spd)
415 static const char * const spd_str[] = {
420 if (spd == 0 || (spd - 1) >= ARRAY_SIZE(spd_str))
422 return spd_str[spd - 1];
425 void ata_dev_disable(struct ata_device *dev)
427 if (ata_dev_enabled(dev) && ata_msg_drv(dev->ap)) {
428 ata_dev_printk(dev, KERN_WARNING, "disabled\n");
434 * ata_pio_devchk - PATA device presence detection
435 * @ap: ATA channel to examine
436 * @device: Device to examine (starting at zero)
438 * This technique was originally described in
439 * Hale Landis's ATADRVR (www.ata-atapi.com), and
440 * later found its way into the ATA/ATAPI spec.
442 * Write a pattern to the ATA shadow registers,
443 * and if a device is present, it will respond by
444 * correctly storing and echoing back the
445 * ATA shadow register contents.
451 static unsigned int ata_pio_devchk(struct ata_port *ap,
454 struct ata_ioports *ioaddr = &ap->ioaddr;
457 ap->ops->dev_select(ap, device);
459 outb(0x55, ioaddr->nsect_addr);
460 outb(0xaa, ioaddr->lbal_addr);
462 outb(0xaa, ioaddr->nsect_addr);
463 outb(0x55, ioaddr->lbal_addr);
465 outb(0x55, ioaddr->nsect_addr);
466 outb(0xaa, ioaddr->lbal_addr);
468 nsect = inb(ioaddr->nsect_addr);
469 lbal = inb(ioaddr->lbal_addr);
471 if ((nsect == 0x55) && (lbal == 0xaa))
472 return 1; /* we found a device */
474 return 0; /* nothing found */
478 * ata_mmio_devchk - PATA device presence detection
479 * @ap: ATA channel to examine
480 * @device: Device to examine (starting at zero)
482 * This technique was originally described in
483 * Hale Landis's ATADRVR (www.ata-atapi.com), and
484 * later found its way into the ATA/ATAPI spec.
486 * Write a pattern to the ATA shadow registers,
487 * and if a device is present, it will respond by
488 * correctly storing and echoing back the
489 * ATA shadow register contents.
495 static unsigned int ata_mmio_devchk(struct ata_port *ap,
498 struct ata_ioports *ioaddr = &ap->ioaddr;
501 ap->ops->dev_select(ap, device);
503 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
504 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
506 writeb(0xaa, (void __iomem *) ioaddr->nsect_addr);
507 writeb(0x55, (void __iomem *) ioaddr->lbal_addr);
509 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
510 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
512 nsect = readb((void __iomem *) ioaddr->nsect_addr);
513 lbal = readb((void __iomem *) ioaddr->lbal_addr);
515 if ((nsect == 0x55) && (lbal == 0xaa))
516 return 1; /* we found a device */
518 return 0; /* nothing found */
522 * ata_devchk - PATA device presence detection
523 * @ap: ATA channel to examine
524 * @device: Device to examine (starting at zero)
526 * Dispatch ATA device presence detection, depending
527 * on whether we are using PIO or MMIO to talk to the
528 * ATA shadow registers.
534 static unsigned int ata_devchk(struct ata_port *ap,
537 if (ap->flags & ATA_FLAG_MMIO)
538 return ata_mmio_devchk(ap, device);
539 return ata_pio_devchk(ap, device);
543 * ata_dev_classify - determine device type based on ATA-spec signature
544 * @tf: ATA taskfile register set for device to be identified
546 * Determine from taskfile register contents whether a device is
547 * ATA or ATAPI, as per "Signature and persistence" section
548 * of ATA/PI spec (volume 1, sect 5.14).
554 * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, or %ATA_DEV_UNKNOWN
555 * the event of failure.
558 unsigned int ata_dev_classify(const struct ata_taskfile *tf)
560 /* Apple's open source Darwin code hints that some devices only
561 * put a proper signature into the LBA mid/high registers,
562 * So, we only check those. It's sufficient for uniqueness.
565 if (((tf->lbam == 0) && (tf->lbah == 0)) ||
566 ((tf->lbam == 0x3c) && (tf->lbah == 0xc3))) {
567 DPRINTK("found ATA device by sig\n");
571 if (((tf->lbam == 0x14) && (tf->lbah == 0xeb)) ||
572 ((tf->lbam == 0x69) && (tf->lbah == 0x96))) {
573 DPRINTK("found ATAPI device by sig\n");
574 return ATA_DEV_ATAPI;
577 DPRINTK("unknown device\n");
578 return ATA_DEV_UNKNOWN;
582 * ata_dev_try_classify - Parse returned ATA device signature
583 * @ap: ATA channel to examine
584 * @device: Device to examine (starting at zero)
585 * @r_err: Value of error register on completion
587 * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
588 * an ATA/ATAPI-defined set of values is placed in the ATA
589 * shadow registers, indicating the results of device detection
592 * Select the ATA device, and read the values from the ATA shadow
593 * registers. Then parse according to the Error register value,
594 * and the spec-defined values examined by ata_dev_classify().
600 * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE.
604 ata_dev_try_classify(struct ata_port *ap, unsigned int device, u8 *r_err)
606 struct ata_taskfile tf;
610 ap->ops->dev_select(ap, device);
612 memset(&tf, 0, sizeof(tf));
614 ap->ops->tf_read(ap, &tf);
619 /* see if device passed diags: if master then continue and warn later */
620 if (err == 0 && device == 0)
621 /* diagnostic fail : do nothing _YET_ */
622 ap->device[device].horkage |= ATA_HORKAGE_DIAGNOSTIC;
625 else if ((device == 0) && (err == 0x81))
630 /* determine if device is ATA or ATAPI */
631 class = ata_dev_classify(&tf);
633 if (class == ATA_DEV_UNKNOWN)
635 if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0))
641 * ata_id_string - Convert IDENTIFY DEVICE page into string
642 * @id: IDENTIFY DEVICE results we will examine
643 * @s: string into which data is output
644 * @ofs: offset into identify device page
645 * @len: length of string to return. must be an even number.
647 * The strings in the IDENTIFY DEVICE page are broken up into
648 * 16-bit chunks. Run through the string, and output each
649 * 8-bit chunk linearly, regardless of platform.
655 void ata_id_string(const u16 *id, unsigned char *s,
656 unsigned int ofs, unsigned int len)
675 * ata_id_c_string - Convert IDENTIFY DEVICE page into C string
676 * @id: IDENTIFY DEVICE results we will examine
677 * @s: string into which data is output
678 * @ofs: offset into identify device page
679 * @len: length of string to return. must be an odd number.
681 * This function is identical to ata_id_string except that it
682 * trims trailing spaces and terminates the resulting string with
683 * null. @len must be actual maximum length (even number) + 1.
688 void ata_id_c_string(const u16 *id, unsigned char *s,
689 unsigned int ofs, unsigned int len)
695 ata_id_string(id, s, ofs, len - 1);
697 p = s + strnlen(s, len - 1);
698 while (p > s && p[-1] == ' ')
703 static u64 ata_id_n_sectors(const u16 *id)
705 if (ata_id_has_lba(id)) {
706 if (ata_id_has_lba48(id))
707 return ata_id_u64(id, 100);
709 return ata_id_u32(id, 60);
711 if (ata_id_current_chs_valid(id))
712 return ata_id_u32(id, 57);
714 return id[1] * id[3] * id[6];
719 * ata_noop_dev_select - Select device 0/1 on ATA bus
720 * @ap: ATA channel to manipulate
721 * @device: ATA device (numbered from zero) to select
723 * This function performs no actual function.
725 * May be used as the dev_select() entry in ata_port_operations.
730 void ata_noop_dev_select (struct ata_port *ap, unsigned int device)
736 * ata_std_dev_select - Select device 0/1 on ATA bus
737 * @ap: ATA channel to manipulate
738 * @device: ATA device (numbered from zero) to select
740 * Use the method defined in the ATA specification to
741 * make either device 0, or device 1, active on the
742 * ATA channel. Works with both PIO and MMIO.
744 * May be used as the dev_select() entry in ata_port_operations.
750 void ata_std_dev_select (struct ata_port *ap, unsigned int device)
755 tmp = ATA_DEVICE_OBS;
757 tmp = ATA_DEVICE_OBS | ATA_DEV1;
759 if (ap->flags & ATA_FLAG_MMIO) {
760 writeb(tmp, (void __iomem *) ap->ioaddr.device_addr);
762 outb(tmp, ap->ioaddr.device_addr);
764 ata_pause(ap); /* needed; also flushes, for mmio */
768 * ata_dev_select - Select device 0/1 on ATA bus
769 * @ap: ATA channel to manipulate
770 * @device: ATA device (numbered from zero) to select
771 * @wait: non-zero to wait for Status register BSY bit to clear
772 * @can_sleep: non-zero if context allows sleeping
774 * Use the method defined in the ATA specification to
775 * make either device 0, or device 1, active on the
778 * This is a high-level version of ata_std_dev_select(),
779 * which additionally provides the services of inserting
780 * the proper pauses and status polling, where needed.
786 void ata_dev_select(struct ata_port *ap, unsigned int device,
787 unsigned int wait, unsigned int can_sleep)
789 if (ata_msg_probe(ap))
790 ata_port_printk(ap, KERN_INFO, "ata_dev_select: ENTER, ata%u: "
791 "device %u, wait %u\n", ap->id, device, wait);
796 ap->ops->dev_select(ap, device);
799 if (can_sleep && ap->device[device].class == ATA_DEV_ATAPI)
806 * ata_dump_id - IDENTIFY DEVICE info debugging output
807 * @id: IDENTIFY DEVICE page to dump
809 * Dump selected 16-bit words from the given IDENTIFY DEVICE
816 static inline void ata_dump_id(const u16 *id)
818 DPRINTK("49==0x%04x "
828 DPRINTK("80==0x%04x "
838 DPRINTK("88==0x%04x "
845 * ata_id_xfermask - Compute xfermask from the given IDENTIFY data
846 * @id: IDENTIFY data to compute xfer mask from
848 * Compute the xfermask for this device. This is not as trivial
849 * as it seems if we must consider early devices correctly.
851 * FIXME: pre IDE drive timing (do we care ?).
859 static unsigned int ata_id_xfermask(const u16 *id)
861 unsigned int pio_mask, mwdma_mask, udma_mask;
863 /* Usual case. Word 53 indicates word 64 is valid */
864 if (id[ATA_ID_FIELD_VALID] & (1 << 1)) {
865 pio_mask = id[ATA_ID_PIO_MODES] & 0x03;
869 /* If word 64 isn't valid then Word 51 high byte holds
870 * the PIO timing number for the maximum. Turn it into
873 u8 mode = id[ATA_ID_OLD_PIO_MODES] & 0xFF;
874 if (mode < 5) /* Valid PIO range */
875 pio_mask = (2 << mode) - 1;
879 /* But wait.. there's more. Design your standards by
880 * committee and you too can get a free iordy field to
881 * process. However its the speeds not the modes that
882 * are supported... Note drivers using the timing API
883 * will get this right anyway
887 mwdma_mask = id[ATA_ID_MWDMA_MODES] & 0x07;
889 if (ata_id_is_cfa(id)) {
891 * Process compact flash extended modes
893 int pio = id[163] & 0x7;
894 int dma = (id[163] >> 3) & 7;
897 pio_mask |= (1 << 5);
899 pio_mask |= (1 << 6);
901 mwdma_mask |= (1 << 3);
903 mwdma_mask |= (1 << 4);
907 if (id[ATA_ID_FIELD_VALID] & (1 << 2))
908 udma_mask = id[ATA_ID_UDMA_MODES] & 0xff;
910 return ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask);
914 * ata_port_queue_task - Queue port_task
915 * @ap: The ata_port to queue port_task for
916 * @fn: workqueue function to be scheduled
917 * @data: data value to pass to workqueue function
918 * @delay: delay time for workqueue function
920 * Schedule @fn(@data) for execution after @delay jiffies using
921 * port_task. There is one port_task per port and it's the
922 * user(low level driver)'s responsibility to make sure that only
923 * one task is active at any given time.
925 * libata core layer takes care of synchronization between
926 * port_task and EH. ata_port_queue_task() may be ignored for EH
930 * Inherited from caller.
932 void ata_port_queue_task(struct ata_port *ap, void (*fn)(void *), void *data,
937 if (ap->pflags & ATA_PFLAG_FLUSH_PORT_TASK)
940 PREPARE_WORK(&ap->port_task, fn, data);
943 rc = queue_work(ata_wq, &ap->port_task);
945 rc = queue_delayed_work(ata_wq, &ap->port_task, delay);
947 /* rc == 0 means that another user is using port task */
952 * ata_port_flush_task - Flush port_task
953 * @ap: The ata_port to flush port_task for
955 * After this function completes, port_task is guranteed not to
956 * be running or scheduled.
959 * Kernel thread context (may sleep)
961 void ata_port_flush_task(struct ata_port *ap)
967 spin_lock_irqsave(ap->lock, flags);
968 ap->pflags |= ATA_PFLAG_FLUSH_PORT_TASK;
969 spin_unlock_irqrestore(ap->lock, flags);
971 DPRINTK("flush #1\n");
972 flush_workqueue(ata_wq);
975 * At this point, if a task is running, it's guaranteed to see
976 * the FLUSH flag; thus, it will never queue pio tasks again.
979 if (!cancel_delayed_work(&ap->port_task)) {
981 ata_port_printk(ap, KERN_DEBUG, "%s: flush #2\n",
983 flush_workqueue(ata_wq);
986 spin_lock_irqsave(ap->lock, flags);
987 ap->pflags &= ~ATA_PFLAG_FLUSH_PORT_TASK;
988 spin_unlock_irqrestore(ap->lock, flags);
991 ata_port_printk(ap, KERN_DEBUG, "%s: EXIT\n", __FUNCTION__);
994 void ata_qc_complete_internal(struct ata_queued_cmd *qc)
996 struct completion *waiting = qc->private_data;
1002 * ata_exec_internal - execute libata internal command
1003 * @dev: Device to which the command is sent
1004 * @tf: Taskfile registers for the command and the result
1005 * @cdb: CDB for packet command
1006 * @dma_dir: Data tranfer direction of the command
1007 * @buf: Data buffer of the command
1008 * @buflen: Length of data buffer
1010 * Executes libata internal command with timeout. @tf contains
1011 * command on entry and result on return. Timeout and error
1012 * conditions are reported via return value. No recovery action
1013 * is taken after a command times out. It's caller's duty to
1014 * clean up after timeout.
1017 * None. Should be called with kernel context, might sleep.
1020 * Zero on success, AC_ERR_* mask on failure
1022 unsigned ata_exec_internal(struct ata_device *dev,
1023 struct ata_taskfile *tf, const u8 *cdb,
1024 int dma_dir, void *buf, unsigned int buflen)
1026 struct ata_port *ap = dev->ap;
1027 u8 command = tf->command;
1028 struct ata_queued_cmd *qc;
1029 unsigned int tag, preempted_tag;
1030 u32 preempted_sactive, preempted_qc_active;
1031 DECLARE_COMPLETION_ONSTACK(wait);
1032 unsigned long flags;
1033 unsigned int err_mask;
1036 spin_lock_irqsave(ap->lock, flags);
1038 /* no internal command while frozen */
1039 if (ap->pflags & ATA_PFLAG_FROZEN) {
1040 spin_unlock_irqrestore(ap->lock, flags);
1041 return AC_ERR_SYSTEM;
1044 /* initialize internal qc */
1046 /* XXX: Tag 0 is used for drivers with legacy EH as some
1047 * drivers choke if any other tag is given. This breaks
1048 * ata_tag_internal() test for those drivers. Don't use new
1049 * EH stuff without converting to it.
1051 if (ap->ops->error_handler)
1052 tag = ATA_TAG_INTERNAL;
1056 if (test_and_set_bit(tag, &ap->qc_allocated))
1058 qc = __ata_qc_from_tag(ap, tag);
1066 preempted_tag = ap->active_tag;
1067 preempted_sactive = ap->sactive;
1068 preempted_qc_active = ap->qc_active;
1069 ap->active_tag = ATA_TAG_POISON;
1073 /* prepare & issue qc */
1076 memcpy(qc->cdb, cdb, ATAPI_CDB_LEN);
1077 qc->flags |= ATA_QCFLAG_RESULT_TF;
1078 qc->dma_dir = dma_dir;
1079 if (dma_dir != DMA_NONE) {
1080 ata_sg_init_one(qc, buf, buflen);
1081 qc->nsect = buflen / ATA_SECT_SIZE;
1084 qc->private_data = &wait;
1085 qc->complete_fn = ata_qc_complete_internal;
1089 spin_unlock_irqrestore(ap->lock, flags);
1091 rc = wait_for_completion_timeout(&wait, ata_probe_timeout);
1093 ata_port_flush_task(ap);
1096 spin_lock_irqsave(ap->lock, flags);
1098 /* We're racing with irq here. If we lose, the
1099 * following test prevents us from completing the qc
1100 * twice. If we win, the port is frozen and will be
1101 * cleaned up by ->post_internal_cmd().
1103 if (qc->flags & ATA_QCFLAG_ACTIVE) {
1104 qc->err_mask |= AC_ERR_TIMEOUT;
1106 if (ap->ops->error_handler)
1107 ata_port_freeze(ap);
1109 ata_qc_complete(qc);
1111 if (ata_msg_warn(ap))
1112 ata_dev_printk(dev, KERN_WARNING,
1113 "qc timeout (cmd 0x%x)\n", command);
1116 spin_unlock_irqrestore(ap->lock, flags);
1119 /* do post_internal_cmd */
1120 if (ap->ops->post_internal_cmd)
1121 ap->ops->post_internal_cmd(qc);
1123 if (qc->flags & ATA_QCFLAG_FAILED && !qc->err_mask) {
1124 if (ata_msg_warn(ap))
1125 ata_dev_printk(dev, KERN_WARNING,
1126 "zero err_mask for failed "
1127 "internal command, assuming AC_ERR_OTHER\n");
1128 qc->err_mask |= AC_ERR_OTHER;
1132 spin_lock_irqsave(ap->lock, flags);
1134 *tf = qc->result_tf;
1135 err_mask = qc->err_mask;
1138 ap->active_tag = preempted_tag;
1139 ap->sactive = preempted_sactive;
1140 ap->qc_active = preempted_qc_active;
1142 /* XXX - Some LLDDs (sata_mv) disable port on command failure.
1143 * Until those drivers are fixed, we detect the condition
1144 * here, fail the command with AC_ERR_SYSTEM and reenable the
1147 * Note that this doesn't change any behavior as internal
1148 * command failure results in disabling the device in the
1149 * higher layer for LLDDs without new reset/EH callbacks.
1151 * Kill the following code as soon as those drivers are fixed.
1153 if (ap->flags & ATA_FLAG_DISABLED) {
1154 err_mask |= AC_ERR_SYSTEM;
1158 spin_unlock_irqrestore(ap->lock, flags);
1164 * ata_do_simple_cmd - execute simple internal command
1165 * @dev: Device to which the command is sent
1166 * @cmd: Opcode to execute
1168 * Execute a 'simple' command, that only consists of the opcode
1169 * 'cmd' itself, without filling any other registers
1172 * Kernel thread context (may sleep).
1175 * Zero on success, AC_ERR_* mask on failure
1177 unsigned int ata_do_simple_cmd(struct ata_device *dev, u8 cmd)
1179 struct ata_taskfile tf;
1181 ata_tf_init(dev, &tf);
1184 tf.flags |= ATA_TFLAG_DEVICE;
1185 tf.protocol = ATA_PROT_NODATA;
1187 return ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
1191 * ata_pio_need_iordy - check if iordy needed
1194 * Check if the current speed of the device requires IORDY. Used
1195 * by various controllers for chip configuration.
1198 unsigned int ata_pio_need_iordy(const struct ata_device *adev)
1201 int speed = adev->pio_mode - XFER_PIO_0;
1208 /* If we have no drive specific rule, then PIO 2 is non IORDY */
1210 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE */
1211 pio = adev->id[ATA_ID_EIDE_PIO];
1212 /* Is the speed faster than the drive allows non IORDY ? */
1214 /* This is cycle times not frequency - watch the logic! */
1215 if (pio > 240) /* PIO2 is 240nS per cycle */
1224 * ata_dev_read_id - Read ID data from the specified device
1225 * @dev: target device
1226 * @p_class: pointer to class of the target device (may be changed)
1227 * @flags: ATA_READID_* flags
1228 * @id: buffer to read IDENTIFY data into
1230 * Read ID data from the specified device. ATA_CMD_ID_ATA is
1231 * performed on ATA devices and ATA_CMD_ID_ATAPI on ATAPI
1232 * devices. This function also issues ATA_CMD_INIT_DEV_PARAMS
1233 * for pre-ATA4 drives.
1236 * Kernel thread context (may sleep)
1239 * 0 on success, -errno otherwise.
1241 int ata_dev_read_id(struct ata_device *dev, unsigned int *p_class,
1242 unsigned int flags, u16 *id)
1244 struct ata_port *ap = dev->ap;
1245 unsigned int class = *p_class;
1246 struct ata_taskfile tf;
1247 unsigned int err_mask = 0;
1251 if (ata_msg_ctl(ap))
1252 ata_dev_printk(dev, KERN_DEBUG, "%s: ENTER, host %u, dev %u\n",
1253 __FUNCTION__, ap->id, dev->devno);
1255 ata_dev_select(ap, dev->devno, 1, 1); /* select device 0/1 */
1258 ata_tf_init(dev, &tf);
1262 tf.command = ATA_CMD_ID_ATA;
1265 tf.command = ATA_CMD_ID_ATAPI;
1269 reason = "unsupported class";
1273 tf.protocol = ATA_PROT_PIO;
1275 /* presence detection using polling IDENTIFY? */
1276 if (flags & ATA_READID_DETECT)
1277 tf.flags |= ATA_TFLAG_POLLING;
1279 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_FROM_DEVICE,
1280 id, sizeof(id[0]) * ATA_ID_WORDS);
1282 if ((flags & ATA_READID_DETECT) &&
1283 (err_mask & AC_ERR_NODEV_HINT)) {
1284 DPRINTK("ata%u.%d: NODEV after polling detection\n",
1285 ap->id, dev->devno);
1290 reason = "I/O error";
1294 swap_buf_le16(id, ATA_ID_WORDS);
1298 reason = "device reports illegal type";
1300 if (class == ATA_DEV_ATA) {
1301 if (!ata_id_is_ata(id) && !ata_id_is_cfa(id))
1304 if (ata_id_is_ata(id))
1308 if ((flags & ATA_READID_POSTRESET) && class == ATA_DEV_ATA) {
1310 * The exact sequence expected by certain pre-ATA4 drives is:
1313 * INITIALIZE DEVICE PARAMETERS
1315 * Some drives were very specific about that exact sequence.
1317 if (ata_id_major_version(id) < 4 || !ata_id_has_lba(id)) {
1318 err_mask = ata_dev_init_params(dev, id[3], id[6]);
1321 reason = "INIT_DEV_PARAMS failed";
1325 /* current CHS translation info (id[53-58]) might be
1326 * changed. reread the identify device info.
1328 flags &= ~ATA_READID_POSTRESET;
1338 if (ata_msg_warn(ap))
1339 ata_dev_printk(dev, KERN_WARNING, "failed to IDENTIFY "
1340 "(%s, err_mask=0x%x)\n", reason, err_mask);
1344 static inline u8 ata_dev_knobble(struct ata_device *dev)
1346 return ((dev->ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(dev->id)));
1349 static void ata_dev_config_ncq(struct ata_device *dev,
1350 char *desc, size_t desc_sz)
1352 struct ata_port *ap = dev->ap;
1353 int hdepth = 0, ddepth = ata_id_queue_depth(dev->id);
1355 if (!ata_id_has_ncq(dev->id)) {
1359 if (ata_device_blacklisted(dev) & ATA_HORKAGE_NONCQ) {
1360 snprintf(desc, desc_sz, "NCQ (not used)");
1363 if (ap->flags & ATA_FLAG_NCQ) {
1364 hdepth = min(ap->scsi_host->can_queue, ATA_MAX_QUEUE - 1);
1365 dev->flags |= ATA_DFLAG_NCQ;
1368 if (hdepth >= ddepth)
1369 snprintf(desc, desc_sz, "NCQ (depth %d)", ddepth);
1371 snprintf(desc, desc_sz, "NCQ (depth %d/%d)", hdepth, ddepth);
1374 static void ata_set_port_max_cmd_len(struct ata_port *ap)
1378 if (ap->scsi_host) {
1379 unsigned int len = 0;
1381 for (i = 0; i < ATA_MAX_DEVICES; i++)
1382 len = max(len, ap->device[i].cdb_len);
1384 ap->scsi_host->max_cmd_len = len;
1389 * ata_dev_configure - Configure the specified ATA/ATAPI device
1390 * @dev: Target device to configure
1392 * Configure @dev according to @dev->id. Generic and low-level
1393 * driver specific fixups are also applied.
1396 * Kernel thread context (may sleep)
1399 * 0 on success, -errno otherwise
1401 int ata_dev_configure(struct ata_device *dev)
1403 struct ata_port *ap = dev->ap;
1404 int print_info = ap->eh_context.i.flags & ATA_EHI_PRINTINFO;
1405 const u16 *id = dev->id;
1406 unsigned int xfer_mask;
1407 char revbuf[7]; /* XYZ-99\0 */
1410 if (!ata_dev_enabled(dev) && ata_msg_info(ap)) {
1411 ata_dev_printk(dev, KERN_INFO,
1412 "%s: ENTER/EXIT (host %u, dev %u) -- nodev\n",
1413 __FUNCTION__, ap->id, dev->devno);
1417 if (ata_msg_probe(ap))
1418 ata_dev_printk(dev, KERN_DEBUG, "%s: ENTER, host %u, dev %u\n",
1419 __FUNCTION__, ap->id, dev->devno);
1421 /* print device capabilities */
1422 if (ata_msg_probe(ap))
1423 ata_dev_printk(dev, KERN_DEBUG,
1424 "%s: cfg 49:%04x 82:%04x 83:%04x 84:%04x "
1425 "85:%04x 86:%04x 87:%04x 88:%04x\n",
1427 id[49], id[82], id[83], id[84],
1428 id[85], id[86], id[87], id[88]);
1430 /* initialize to-be-configured parameters */
1431 dev->flags &= ~ATA_DFLAG_CFG_MASK;
1432 dev->max_sectors = 0;
1440 * common ATA, ATAPI feature tests
1443 /* find max transfer mode; for printk only */
1444 xfer_mask = ata_id_xfermask(id);
1446 if (ata_msg_probe(ap))
1449 /* ATA-specific feature tests */
1450 if (dev->class == ATA_DEV_ATA) {
1451 if (ata_id_is_cfa(id)) {
1452 if (id[162] & 1) /* CPRM may make this media unusable */
1453 ata_dev_printk(dev, KERN_WARNING, "ata%u: device %u supports DRM functions and may not be fully accessable.\n",
1454 ap->id, dev->devno);
1455 snprintf(revbuf, 7, "CFA");
1458 snprintf(revbuf, 7, "ATA-%d", ata_id_major_version(id));
1460 dev->n_sectors = ata_id_n_sectors(id);
1462 if (ata_id_has_lba(id)) {
1463 const char *lba_desc;
1467 dev->flags |= ATA_DFLAG_LBA;
1468 if (ata_id_has_lba48(id)) {
1469 dev->flags |= ATA_DFLAG_LBA48;
1472 if (dev->n_sectors >= (1UL << 28) &&
1473 ata_id_has_flush_ext(id))
1474 dev->flags |= ATA_DFLAG_FLUSH_EXT;
1478 ata_dev_config_ncq(dev, ncq_desc, sizeof(ncq_desc));
1480 /* print device info to dmesg */
1481 if (ata_msg_drv(ap) && print_info)
1482 ata_dev_printk(dev, KERN_INFO, "%s, "
1483 "max %s, %Lu sectors: %s %s\n",
1485 ata_mode_string(xfer_mask),
1486 (unsigned long long)dev->n_sectors,
1487 lba_desc, ncq_desc);
1491 /* Default translation */
1492 dev->cylinders = id[1];
1494 dev->sectors = id[6];
1496 if (ata_id_current_chs_valid(id)) {
1497 /* Current CHS translation is valid. */
1498 dev->cylinders = id[54];
1499 dev->heads = id[55];
1500 dev->sectors = id[56];
1503 /* print device info to dmesg */
1504 if (ata_msg_drv(ap) && print_info)
1505 ata_dev_printk(dev, KERN_INFO, "%s, "
1506 "max %s, %Lu sectors: CHS %u/%u/%u\n",
1508 ata_mode_string(xfer_mask),
1509 (unsigned long long)dev->n_sectors,
1510 dev->cylinders, dev->heads,
1514 if (dev->id[59] & 0x100) {
1515 dev->multi_count = dev->id[59] & 0xff;
1516 if (ata_msg_drv(ap) && print_info)
1517 ata_dev_printk(dev, KERN_INFO,
1518 "ata%u: dev %u multi count %u\n",
1519 ap->id, dev->devno, dev->multi_count);
1525 /* ATAPI-specific feature tests */
1526 else if (dev->class == ATA_DEV_ATAPI) {
1527 char *cdb_intr_string = "";
1529 rc = atapi_cdb_len(id);
1530 if ((rc < 12) || (rc > ATAPI_CDB_LEN)) {
1531 if (ata_msg_warn(ap))
1532 ata_dev_printk(dev, KERN_WARNING,
1533 "unsupported CDB len\n");
1537 dev->cdb_len = (unsigned int) rc;
1539 if (ata_id_cdb_intr(dev->id)) {
1540 dev->flags |= ATA_DFLAG_CDB_INTR;
1541 cdb_intr_string = ", CDB intr";
1544 /* print device info to dmesg */
1545 if (ata_msg_drv(ap) && print_info)
1546 ata_dev_printk(dev, KERN_INFO, "ATAPI, max %s%s\n",
1547 ata_mode_string(xfer_mask),
1551 /* determine max_sectors */
1552 dev->max_sectors = ATA_MAX_SECTORS;
1553 if (dev->flags & ATA_DFLAG_LBA48)
1554 dev->max_sectors = ATA_MAX_SECTORS_LBA48;
1556 if (dev->horkage & ATA_HORKAGE_DIAGNOSTIC) {
1557 /* Let the user know. We don't want to disallow opens for
1558 rescue purposes, or in case the vendor is just a blithering
1561 ata_dev_printk(dev, KERN_WARNING,
1562 "Drive reports diagnostics failure. This may indicate a drive\n");
1563 ata_dev_printk(dev, KERN_WARNING,
1564 "fault or invalid emulation. Contact drive vendor for information.\n");
1568 ata_set_port_max_cmd_len(ap);
1570 /* limit bridge transfers to udma5, 200 sectors */
1571 if (ata_dev_knobble(dev)) {
1572 if (ata_msg_drv(ap) && print_info)
1573 ata_dev_printk(dev, KERN_INFO,
1574 "applying bridge limits\n");
1575 dev->udma_mask &= ATA_UDMA5;
1576 dev->max_sectors = ATA_MAX_SECTORS;
1579 if (ap->ops->dev_config)
1580 ap->ops->dev_config(ap, dev);
1582 if (ata_msg_probe(ap))
1583 ata_dev_printk(dev, KERN_DEBUG, "%s: EXIT, drv_stat = 0x%x\n",
1584 __FUNCTION__, ata_chk_status(ap));
1588 if (ata_msg_probe(ap))
1589 ata_dev_printk(dev, KERN_DEBUG,
1590 "%s: EXIT, err\n", __FUNCTION__);
1595 * ata_bus_probe - Reset and probe ATA bus
1598 * Master ATA bus probing function. Initiates a hardware-dependent
1599 * bus reset, then attempts to identify any devices found on
1603 * PCI/etc. bus probe sem.
1606 * Zero on success, negative errno otherwise.
1609 int ata_bus_probe(struct ata_port *ap)
1611 unsigned int classes[ATA_MAX_DEVICES];
1612 int tries[ATA_MAX_DEVICES];
1613 int i, rc, down_xfermask;
1614 struct ata_device *dev;
1618 for (i = 0; i < ATA_MAX_DEVICES; i++)
1619 tries[i] = ATA_PROBE_MAX_TRIES;
1624 /* reset and determine device classes */
1625 ap->ops->phy_reset(ap);
1627 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1628 dev = &ap->device[i];
1630 if (!(ap->flags & ATA_FLAG_DISABLED) &&
1631 dev->class != ATA_DEV_UNKNOWN)
1632 classes[dev->devno] = dev->class;
1634 classes[dev->devno] = ATA_DEV_NONE;
1636 dev->class = ATA_DEV_UNKNOWN;
1641 /* after the reset the device state is PIO 0 and the controller
1642 state is undefined. Record the mode */
1644 for (i = 0; i < ATA_MAX_DEVICES; i++)
1645 ap->device[i].pio_mode = XFER_PIO_0;
1647 /* read IDENTIFY page and configure devices */
1648 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1649 dev = &ap->device[i];
1652 dev->class = classes[i];
1654 if (!ata_dev_enabled(dev))
1657 rc = ata_dev_read_id(dev, &dev->class, ATA_READID_POSTRESET,
1662 ap->eh_context.i.flags |= ATA_EHI_PRINTINFO;
1663 rc = ata_dev_configure(dev);
1664 ap->eh_context.i.flags &= ~ATA_EHI_PRINTINFO;
1669 /* configure transfer mode */
1670 rc = ata_set_mode(ap, &dev);
1676 for (i = 0; i < ATA_MAX_DEVICES; i++)
1677 if (ata_dev_enabled(&ap->device[i]))
1680 /* no device present, disable port */
1681 ata_port_disable(ap);
1682 ap->ops->port_disable(ap);
1689 tries[dev->devno] = 0;
1692 sata_down_spd_limit(ap);
1695 tries[dev->devno]--;
1696 if (down_xfermask &&
1697 ata_down_xfermask_limit(dev, tries[dev->devno] == 1))
1698 tries[dev->devno] = 0;
1701 if (!tries[dev->devno]) {
1702 ata_down_xfermask_limit(dev, 1);
1703 ata_dev_disable(dev);
1710 * ata_port_probe - Mark port as enabled
1711 * @ap: Port for which we indicate enablement
1713 * Modify @ap data structure such that the system
1714 * thinks that the entire port is enabled.
1716 * LOCKING: host lock, or some other form of
1720 void ata_port_probe(struct ata_port *ap)
1722 ap->flags &= ~ATA_FLAG_DISABLED;
1726 * sata_print_link_status - Print SATA link status
1727 * @ap: SATA port to printk link status about
1729 * This function prints link speed and status of a SATA link.
1734 static void sata_print_link_status(struct ata_port *ap)
1736 u32 sstatus, scontrol, tmp;
1738 if (sata_scr_read(ap, SCR_STATUS, &sstatus))
1740 sata_scr_read(ap, SCR_CONTROL, &scontrol);
1742 if (ata_port_online(ap)) {
1743 tmp = (sstatus >> 4) & 0xf;
1744 ata_port_printk(ap, KERN_INFO,
1745 "SATA link up %s (SStatus %X SControl %X)\n",
1746 sata_spd_string(tmp), sstatus, scontrol);
1748 ata_port_printk(ap, KERN_INFO,
1749 "SATA link down (SStatus %X SControl %X)\n",
1755 * __sata_phy_reset - Wake/reset a low-level SATA PHY
1756 * @ap: SATA port associated with target SATA PHY.
1758 * This function issues commands to standard SATA Sxxx
1759 * PHY registers, to wake up the phy (and device), and
1760 * clear any reset condition.
1763 * PCI/etc. bus probe sem.
1766 void __sata_phy_reset(struct ata_port *ap)
1769 unsigned long timeout = jiffies + (HZ * 5);
1771 if (ap->flags & ATA_FLAG_SATA_RESET) {
1772 /* issue phy wake/reset */
1773 sata_scr_write_flush(ap, SCR_CONTROL, 0x301);
1774 /* Couldn't find anything in SATA I/II specs, but
1775 * AHCI-1.1 10.4.2 says at least 1 ms. */
1778 /* phy wake/clear reset */
1779 sata_scr_write_flush(ap, SCR_CONTROL, 0x300);
1781 /* wait for phy to become ready, if necessary */
1784 sata_scr_read(ap, SCR_STATUS, &sstatus);
1785 if ((sstatus & 0xf) != 1)
1787 } while (time_before(jiffies, timeout));
1789 /* print link status */
1790 sata_print_link_status(ap);
1792 /* TODO: phy layer with polling, timeouts, etc. */
1793 if (!ata_port_offline(ap))
1796 ata_port_disable(ap);
1798 if (ap->flags & ATA_FLAG_DISABLED)
1801 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
1802 ata_port_disable(ap);
1806 ap->cbl = ATA_CBL_SATA;
1810 * sata_phy_reset - Reset SATA bus.
1811 * @ap: SATA port associated with target SATA PHY.
1813 * This function resets the SATA bus, and then probes
1814 * the bus for devices.
1817 * PCI/etc. bus probe sem.
1820 void sata_phy_reset(struct ata_port *ap)
1822 __sata_phy_reset(ap);
1823 if (ap->flags & ATA_FLAG_DISABLED)
1829 * ata_dev_pair - return other device on cable
1832 * Obtain the other device on the same cable, or if none is
1833 * present NULL is returned
1836 struct ata_device *ata_dev_pair(struct ata_device *adev)
1838 struct ata_port *ap = adev->ap;
1839 struct ata_device *pair = &ap->device[1 - adev->devno];
1840 if (!ata_dev_enabled(pair))
1846 * ata_port_disable - Disable port.
1847 * @ap: Port to be disabled.
1849 * Modify @ap data structure such that the system
1850 * thinks that the entire port is disabled, and should
1851 * never attempt to probe or communicate with devices
1854 * LOCKING: host lock, or some other form of
1858 void ata_port_disable(struct ata_port *ap)
1860 ap->device[0].class = ATA_DEV_NONE;
1861 ap->device[1].class = ATA_DEV_NONE;
1862 ap->flags |= ATA_FLAG_DISABLED;
1866 * sata_down_spd_limit - adjust SATA spd limit downward
1867 * @ap: Port to adjust SATA spd limit for
1869 * Adjust SATA spd limit of @ap downward. Note that this
1870 * function only adjusts the limit. The change must be applied
1871 * using sata_set_spd().
1874 * Inherited from caller.
1877 * 0 on success, negative errno on failure
1879 int sata_down_spd_limit(struct ata_port *ap)
1881 u32 sstatus, spd, mask;
1884 rc = sata_scr_read(ap, SCR_STATUS, &sstatus);
1888 mask = ap->sata_spd_limit;
1891 highbit = fls(mask) - 1;
1892 mask &= ~(1 << highbit);
1894 spd = (sstatus >> 4) & 0xf;
1898 mask &= (1 << spd) - 1;
1902 ap->sata_spd_limit = mask;
1904 ata_port_printk(ap, KERN_WARNING, "limiting SATA link speed to %s\n",
1905 sata_spd_string(fls(mask)));
1910 static int __sata_set_spd_needed(struct ata_port *ap, u32 *scontrol)
1914 if (ap->sata_spd_limit == UINT_MAX)
1917 limit = fls(ap->sata_spd_limit);
1919 spd = (*scontrol >> 4) & 0xf;
1920 *scontrol = (*scontrol & ~0xf0) | ((limit & 0xf) << 4);
1922 return spd != limit;
1926 * sata_set_spd_needed - is SATA spd configuration needed
1927 * @ap: Port in question
1929 * Test whether the spd limit in SControl matches
1930 * @ap->sata_spd_limit. This function is used to determine
1931 * whether hardreset is necessary to apply SATA spd
1935 * Inherited from caller.
1938 * 1 if SATA spd configuration is needed, 0 otherwise.
1940 int sata_set_spd_needed(struct ata_port *ap)
1944 if (sata_scr_read(ap, SCR_CONTROL, &scontrol))
1947 return __sata_set_spd_needed(ap, &scontrol);
1951 * sata_set_spd - set SATA spd according to spd limit
1952 * @ap: Port to set SATA spd for
1954 * Set SATA spd of @ap according to sata_spd_limit.
1957 * Inherited from caller.
1960 * 0 if spd doesn't need to be changed, 1 if spd has been
1961 * changed. Negative errno if SCR registers are inaccessible.
1963 int sata_set_spd(struct ata_port *ap)
1968 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
1971 if (!__sata_set_spd_needed(ap, &scontrol))
1974 if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol)))
1981 * This mode timing computation functionality is ported over from
1982 * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik
1985 * PIO 0-4, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
1986 * These were taken from ATA/ATAPI-6 standard, rev 0a, except
1987 * for UDMA6, which is currently supported only by Maxtor drives.
1989 * For PIO 5/6 MWDMA 3/4 see the CFA specification 3.0.
1992 static const struct ata_timing ata_timing[] = {
1994 { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 },
1995 { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 },
1996 { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 },
1997 { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 },
1999 { XFER_MW_DMA_4, 25, 0, 0, 0, 55, 20, 80, 0 },
2000 { XFER_MW_DMA_3, 25, 0, 0, 0, 65, 25, 100, 0 },
2001 { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 },
2002 { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 },
2003 { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 },
2005 /* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */
2007 { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 },
2008 { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 },
2009 { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 },
2011 { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 },
2012 { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 },
2013 { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 },
2015 { XFER_PIO_6, 10, 55, 20, 80, 55, 20, 80, 0 },
2016 { XFER_PIO_5, 15, 65, 25, 100, 65, 25, 100, 0 },
2017 { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 },
2018 { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 },
2020 { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 },
2021 { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 },
2022 { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 },
2024 /* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */
2029 #define ENOUGH(v,unit) (((v)-1)/(unit)+1)
2030 #define EZ(v,unit) ((v)?ENOUGH(v,unit):0)
2032 static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT)
2034 q->setup = EZ(t->setup * 1000, T);
2035 q->act8b = EZ(t->act8b * 1000, T);
2036 q->rec8b = EZ(t->rec8b * 1000, T);
2037 q->cyc8b = EZ(t->cyc8b * 1000, T);
2038 q->active = EZ(t->active * 1000, T);
2039 q->recover = EZ(t->recover * 1000, T);
2040 q->cycle = EZ(t->cycle * 1000, T);
2041 q->udma = EZ(t->udma * 1000, UT);
2044 void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b,
2045 struct ata_timing *m, unsigned int what)
2047 if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup);
2048 if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b);
2049 if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b);
2050 if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b);
2051 if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active);
2052 if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover);
2053 if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle);
2054 if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma);
2057 static const struct ata_timing* ata_timing_find_mode(unsigned short speed)
2059 const struct ata_timing *t;
2061 for (t = ata_timing; t->mode != speed; t++)
2062 if (t->mode == 0xFF)
2067 int ata_timing_compute(struct ata_device *adev, unsigned short speed,
2068 struct ata_timing *t, int T, int UT)
2070 const struct ata_timing *s;
2071 struct ata_timing p;
2077 if (!(s = ata_timing_find_mode(speed)))
2080 memcpy(t, s, sizeof(*s));
2083 * If the drive is an EIDE drive, it can tell us it needs extended
2084 * PIO/MW_DMA cycle timing.
2087 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
2088 memset(&p, 0, sizeof(p));
2089 if(speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) {
2090 if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO];
2091 else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY];
2092 } else if(speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) {
2093 p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN];
2095 ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B);
2099 * Convert the timing to bus clock counts.
2102 ata_timing_quantize(t, t, T, UT);
2105 * Even in DMA/UDMA modes we still use PIO access for IDENTIFY,
2106 * S.M.A.R.T * and some other commands. We have to ensure that the
2107 * DMA cycle timing is slower/equal than the fastest PIO timing.
2110 if (speed > XFER_PIO_4) {
2111 ata_timing_compute(adev, adev->pio_mode, &p, T, UT);
2112 ata_timing_merge(&p, t, t, ATA_TIMING_ALL);
2116 * Lengthen active & recovery time so that cycle time is correct.
2119 if (t->act8b + t->rec8b < t->cyc8b) {
2120 t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2;
2121 t->rec8b = t->cyc8b - t->act8b;
2124 if (t->active + t->recover < t->cycle) {
2125 t->active += (t->cycle - (t->active + t->recover)) / 2;
2126 t->recover = t->cycle - t->active;
2133 * ata_down_xfermask_limit - adjust dev xfer masks downward
2134 * @dev: Device to adjust xfer masks
2135 * @force_pio0: Force PIO0
2137 * Adjust xfer masks of @dev downward. Note that this function
2138 * does not apply the change. Invoking ata_set_mode() afterwards
2139 * will apply the limit.
2142 * Inherited from caller.
2145 * 0 on success, negative errno on failure
2147 int ata_down_xfermask_limit(struct ata_device *dev, int force_pio0)
2149 unsigned long xfer_mask;
2152 xfer_mask = ata_pack_xfermask(dev->pio_mask, dev->mwdma_mask,
2157 /* don't gear down to MWDMA from UDMA, go directly to PIO */
2158 if (xfer_mask & ATA_MASK_UDMA)
2159 xfer_mask &= ~ATA_MASK_MWDMA;
2161 highbit = fls(xfer_mask) - 1;
2162 xfer_mask &= ~(1 << highbit);
2164 xfer_mask &= 1 << ATA_SHIFT_PIO;
2168 ata_unpack_xfermask(xfer_mask, &dev->pio_mask, &dev->mwdma_mask,
2171 ata_dev_printk(dev, KERN_WARNING, "limiting speed to %s\n",
2172 ata_mode_string(xfer_mask));
2180 static int ata_dev_set_mode(struct ata_device *dev)
2182 struct ata_eh_context *ehc = &dev->ap->eh_context;
2183 unsigned int err_mask;
2186 dev->flags &= ~ATA_DFLAG_PIO;
2187 if (dev->xfer_shift == ATA_SHIFT_PIO)
2188 dev->flags |= ATA_DFLAG_PIO;
2190 err_mask = ata_dev_set_xfermode(dev);
2192 ata_dev_printk(dev, KERN_ERR, "failed to set xfermode "
2193 "(err_mask=0x%x)\n", err_mask);
2197 ehc->i.flags |= ATA_EHI_POST_SETMODE;
2198 rc = ata_dev_revalidate(dev, 0);
2199 ehc->i.flags &= ~ATA_EHI_POST_SETMODE;
2203 DPRINTK("xfer_shift=%u, xfer_mode=0x%x\n",
2204 dev->xfer_shift, (int)dev->xfer_mode);
2206 ata_dev_printk(dev, KERN_INFO, "configured for %s\n",
2207 ata_mode_string(ata_xfer_mode2mask(dev->xfer_mode)));
2212 * ata_set_mode - Program timings and issue SET FEATURES - XFER
2213 * @ap: port on which timings will be programmed
2214 * @r_failed_dev: out paramter for failed device
2216 * Set ATA device disk transfer mode (PIO3, UDMA6, etc.). If
2217 * ata_set_mode() fails, pointer to the failing device is
2218 * returned in @r_failed_dev.
2221 * PCI/etc. bus probe sem.
2224 * 0 on success, negative errno otherwise
2226 int ata_set_mode(struct ata_port *ap, struct ata_device **r_failed_dev)
2228 struct ata_device *dev;
2229 int i, rc = 0, used_dma = 0, found = 0;
2231 /* has private set_mode? */
2232 if (ap->ops->set_mode) {
2233 /* FIXME: make ->set_mode handle no device case and
2234 * return error code and failing device on failure.
2236 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2237 if (ata_dev_ready(&ap->device[i])) {
2238 ap->ops->set_mode(ap);
2245 /* step 1: calculate xfer_mask */
2246 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2247 unsigned int pio_mask, dma_mask;
2249 dev = &ap->device[i];
2251 if (!ata_dev_enabled(dev))
2254 ata_dev_xfermask(dev);
2256 pio_mask = ata_pack_xfermask(dev->pio_mask, 0, 0);
2257 dma_mask = ata_pack_xfermask(0, dev->mwdma_mask, dev->udma_mask);
2258 dev->pio_mode = ata_xfer_mask2mode(pio_mask);
2259 dev->dma_mode = ata_xfer_mask2mode(dma_mask);
2268 /* step 2: always set host PIO timings */
2269 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2270 dev = &ap->device[i];
2271 if (!ata_dev_enabled(dev))
2274 if (!dev->pio_mode) {
2275 ata_dev_printk(dev, KERN_WARNING, "no PIO support\n");
2280 dev->xfer_mode = dev->pio_mode;
2281 dev->xfer_shift = ATA_SHIFT_PIO;
2282 if (ap->ops->set_piomode)
2283 ap->ops->set_piomode(ap, dev);
2286 /* step 3: set host DMA timings */
2287 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2288 dev = &ap->device[i];
2290 if (!ata_dev_enabled(dev) || !dev->dma_mode)
2293 dev->xfer_mode = dev->dma_mode;
2294 dev->xfer_shift = ata_xfer_mode2shift(dev->dma_mode);
2295 if (ap->ops->set_dmamode)
2296 ap->ops->set_dmamode(ap, dev);
2299 /* step 4: update devices' xfer mode */
2300 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2301 dev = &ap->device[i];
2303 /* don't udpate suspended devices' xfer mode */
2304 if (!ata_dev_ready(dev))
2307 rc = ata_dev_set_mode(dev);
2312 /* Record simplex status. If we selected DMA then the other
2313 * host channels are not permitted to do so.
2315 if (used_dma && (ap->host->flags & ATA_HOST_SIMPLEX))
2316 ap->host->simplex_claimed = 1;
2318 /* step5: chip specific finalisation */
2319 if (ap->ops->post_set_mode)
2320 ap->ops->post_set_mode(ap);
2324 *r_failed_dev = dev;
2329 * ata_tf_to_host - issue ATA taskfile to host controller
2330 * @ap: port to which command is being issued
2331 * @tf: ATA taskfile register set
2333 * Issues ATA taskfile register set to ATA host controller,
2334 * with proper synchronization with interrupt handler and
2338 * spin_lock_irqsave(host lock)
2341 static inline void ata_tf_to_host(struct ata_port *ap,
2342 const struct ata_taskfile *tf)
2344 ap->ops->tf_load(ap, tf);
2345 ap->ops->exec_command(ap, tf);
2349 * ata_busy_sleep - sleep until BSY clears, or timeout
2350 * @ap: port containing status register to be polled
2351 * @tmout_pat: impatience timeout
2352 * @tmout: overall timeout
2354 * Sleep until ATA Status register bit BSY clears,
2355 * or a timeout occurs.
2358 * Kernel thread context (may sleep).
2361 * 0 on success, -errno otherwise.
2363 int ata_busy_sleep(struct ata_port *ap,
2364 unsigned long tmout_pat, unsigned long tmout)
2366 unsigned long timer_start, timeout;
2369 status = ata_busy_wait(ap, ATA_BUSY, 300);
2370 timer_start = jiffies;
2371 timeout = timer_start + tmout_pat;
2372 while (status != 0xff && (status & ATA_BUSY) &&
2373 time_before(jiffies, timeout)) {
2375 status = ata_busy_wait(ap, ATA_BUSY, 3);
2378 if (status != 0xff && (status & ATA_BUSY))
2379 ata_port_printk(ap, KERN_WARNING,
2380 "port is slow to respond, please be patient "
2381 "(Status 0x%x)\n", status);
2383 timeout = timer_start + tmout;
2384 while (status != 0xff && (status & ATA_BUSY) &&
2385 time_before(jiffies, timeout)) {
2387 status = ata_chk_status(ap);
2393 if (status & ATA_BUSY) {
2394 ata_port_printk(ap, KERN_ERR, "port failed to respond "
2395 "(%lu secs, Status 0x%x)\n",
2396 tmout / HZ, status);
2403 static void ata_bus_post_reset(struct ata_port *ap, unsigned int devmask)
2405 struct ata_ioports *ioaddr = &ap->ioaddr;
2406 unsigned int dev0 = devmask & (1 << 0);
2407 unsigned int dev1 = devmask & (1 << 1);
2408 unsigned long timeout;
2410 /* if device 0 was found in ata_devchk, wait for its
2414 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2416 /* if device 1 was found in ata_devchk, wait for
2417 * register access, then wait for BSY to clear
2419 timeout = jiffies + ATA_TMOUT_BOOT;
2423 ap->ops->dev_select(ap, 1);
2424 if (ap->flags & ATA_FLAG_MMIO) {
2425 nsect = readb((void __iomem *) ioaddr->nsect_addr);
2426 lbal = readb((void __iomem *) ioaddr->lbal_addr);
2428 nsect = inb(ioaddr->nsect_addr);
2429 lbal = inb(ioaddr->lbal_addr);
2431 if ((nsect == 1) && (lbal == 1))
2433 if (time_after(jiffies, timeout)) {
2437 msleep(50); /* give drive a breather */
2440 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2442 /* is all this really necessary? */
2443 ap->ops->dev_select(ap, 0);
2445 ap->ops->dev_select(ap, 1);
2447 ap->ops->dev_select(ap, 0);
2450 static unsigned int ata_bus_softreset(struct ata_port *ap,
2451 unsigned int devmask)
2453 struct ata_ioports *ioaddr = &ap->ioaddr;
2455 DPRINTK("ata%u: bus reset via SRST\n", ap->id);
2457 /* software reset. causes dev0 to be selected */
2458 if (ap->flags & ATA_FLAG_MMIO) {
2459 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2460 udelay(20); /* FIXME: flush */
2461 writeb(ap->ctl | ATA_SRST, (void __iomem *) ioaddr->ctl_addr);
2462 udelay(20); /* FIXME: flush */
2463 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2465 outb(ap->ctl, ioaddr->ctl_addr);
2467 outb(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
2469 outb(ap->ctl, ioaddr->ctl_addr);
2472 /* spec mandates ">= 2ms" before checking status.
2473 * We wait 150ms, because that was the magic delay used for
2474 * ATAPI devices in Hale Landis's ATADRVR, for the period of time
2475 * between when the ATA command register is written, and then
2476 * status is checked. Because waiting for "a while" before
2477 * checking status is fine, post SRST, we perform this magic
2478 * delay here as well.
2480 * Old drivers/ide uses the 2mS rule and then waits for ready
2484 /* Before we perform post reset processing we want to see if
2485 * the bus shows 0xFF because the odd clown forgets the D7
2486 * pulldown resistor.
2488 if (ata_check_status(ap) == 0xFF)
2491 ata_bus_post_reset(ap, devmask);
2497 * ata_bus_reset - reset host port and associated ATA channel
2498 * @ap: port to reset
2500 * This is typically the first time we actually start issuing
2501 * commands to the ATA channel. We wait for BSY to clear, then
2502 * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its
2503 * result. Determine what devices, if any, are on the channel
2504 * by looking at the device 0/1 error register. Look at the signature
2505 * stored in each device's taskfile registers, to determine if
2506 * the device is ATA or ATAPI.
2509 * PCI/etc. bus probe sem.
2510 * Obtains host lock.
2513 * Sets ATA_FLAG_DISABLED if bus reset fails.
2516 void ata_bus_reset(struct ata_port *ap)
2518 struct ata_ioports *ioaddr = &ap->ioaddr;
2519 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2521 unsigned int dev0, dev1 = 0, devmask = 0;
2523 DPRINTK("ENTER, host %u, port %u\n", ap->id, ap->port_no);
2525 /* determine if device 0/1 are present */
2526 if (ap->flags & ATA_FLAG_SATA_RESET)
2529 dev0 = ata_devchk(ap, 0);
2531 dev1 = ata_devchk(ap, 1);
2535 devmask |= (1 << 0);
2537 devmask |= (1 << 1);
2539 /* select device 0 again */
2540 ap->ops->dev_select(ap, 0);
2542 /* issue bus reset */
2543 if (ap->flags & ATA_FLAG_SRST)
2544 if (ata_bus_softreset(ap, devmask))
2548 * determine by signature whether we have ATA or ATAPI devices
2550 ap->device[0].class = ata_dev_try_classify(ap, 0, &err);
2551 if ((slave_possible) && (err != 0x81))
2552 ap->device[1].class = ata_dev_try_classify(ap, 1, &err);
2554 /* re-enable interrupts */
2555 if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
2558 /* is double-select really necessary? */
2559 if (ap->device[1].class != ATA_DEV_NONE)
2560 ap->ops->dev_select(ap, 1);
2561 if (ap->device[0].class != ATA_DEV_NONE)
2562 ap->ops->dev_select(ap, 0);
2564 /* if no devices were detected, disable this port */
2565 if ((ap->device[0].class == ATA_DEV_NONE) &&
2566 (ap->device[1].class == ATA_DEV_NONE))
2569 if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) {
2570 /* set up device control for ATA_FLAG_SATA_RESET */
2571 if (ap->flags & ATA_FLAG_MMIO)
2572 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2574 outb(ap->ctl, ioaddr->ctl_addr);
2581 ata_port_printk(ap, KERN_ERR, "disabling port\n");
2582 ap->ops->port_disable(ap);
2588 * sata_phy_debounce - debounce SATA phy status
2589 * @ap: ATA port to debounce SATA phy status for
2590 * @params: timing parameters { interval, duratinon, timeout } in msec
2592 * Make sure SStatus of @ap reaches stable state, determined by
2593 * holding the same value where DET is not 1 for @duration polled
2594 * every @interval, before @timeout. Timeout constraints the
2595 * beginning of the stable state. Because, after hot unplugging,
2596 * DET gets stuck at 1 on some controllers, this functions waits
2597 * until timeout then returns 0 if DET is stable at 1.
2600 * Kernel thread context (may sleep)
2603 * 0 on success, -errno on failure.
2605 int sata_phy_debounce(struct ata_port *ap, const unsigned long *params)
2607 unsigned long interval_msec = params[0];
2608 unsigned long duration = params[1] * HZ / 1000;
2609 unsigned long timeout = jiffies + params[2] * HZ / 1000;
2610 unsigned long last_jiffies;
2614 if ((rc = sata_scr_read(ap, SCR_STATUS, &cur)))
2619 last_jiffies = jiffies;
2622 msleep(interval_msec);
2623 if ((rc = sata_scr_read(ap, SCR_STATUS, &cur)))
2629 if (cur == 1 && time_before(jiffies, timeout))
2631 if (time_after(jiffies, last_jiffies + duration))
2636 /* unstable, start over */
2638 last_jiffies = jiffies;
2641 if (time_after(jiffies, timeout))
2647 * sata_phy_resume - resume SATA phy
2648 * @ap: ATA port to resume SATA phy for
2649 * @params: timing parameters { interval, duratinon, timeout } in msec
2651 * Resume SATA phy of @ap and debounce it.
2654 * Kernel thread context (may sleep)
2657 * 0 on success, -errno on failure.
2659 int sata_phy_resume(struct ata_port *ap, const unsigned long *params)
2664 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
2667 scontrol = (scontrol & 0x0f0) | 0x300;
2669 if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol)))
2672 /* Some PHYs react badly if SStatus is pounded immediately
2673 * after resuming. Delay 200ms before debouncing.
2677 return sata_phy_debounce(ap, params);
2680 static void ata_wait_spinup(struct ata_port *ap)
2682 struct ata_eh_context *ehc = &ap->eh_context;
2683 unsigned long end, secs;
2686 /* first, debounce phy if SATA */
2687 if (ap->cbl == ATA_CBL_SATA) {
2688 rc = sata_phy_debounce(ap, sata_deb_timing_hotplug);
2690 /* if debounced successfully and offline, no need to wait */
2691 if ((rc == 0 || rc == -EOPNOTSUPP) && ata_port_offline(ap))
2695 /* okay, let's give the drive time to spin up */
2696 end = ehc->i.hotplug_timestamp + ATA_SPINUP_WAIT * HZ / 1000;
2697 secs = ((end - jiffies) + HZ - 1) / HZ;
2699 if (time_after(jiffies, end))
2703 ata_port_printk(ap, KERN_INFO, "waiting for device to spin up "
2704 "(%lu secs)\n", secs);
2706 schedule_timeout_uninterruptible(end - jiffies);
2710 * ata_std_prereset - prepare for reset
2711 * @ap: ATA port to be reset
2713 * @ap is about to be reset. Initialize it.
2716 * Kernel thread context (may sleep)
2719 * 0 on success, -errno otherwise.
2721 int ata_std_prereset(struct ata_port *ap)
2723 struct ata_eh_context *ehc = &ap->eh_context;
2724 const unsigned long *timing = sata_ehc_deb_timing(ehc);
2727 /* handle link resume & hotplug spinup */
2728 if ((ehc->i.flags & ATA_EHI_RESUME_LINK) &&
2729 (ap->flags & ATA_FLAG_HRST_TO_RESUME))
2730 ehc->i.action |= ATA_EH_HARDRESET;
2732 if ((ehc->i.flags & ATA_EHI_HOTPLUGGED) &&
2733 (ap->flags & ATA_FLAG_SKIP_D2H_BSY))
2734 ata_wait_spinup(ap);
2736 /* if we're about to do hardreset, nothing more to do */
2737 if (ehc->i.action & ATA_EH_HARDRESET)
2740 /* if SATA, resume phy */
2741 if (ap->cbl == ATA_CBL_SATA) {
2742 rc = sata_phy_resume(ap, timing);
2743 if (rc && rc != -EOPNOTSUPP) {
2744 /* phy resume failed */
2745 ata_port_printk(ap, KERN_WARNING, "failed to resume "
2746 "link for reset (errno=%d)\n", rc);
2751 /* Wait for !BSY if the controller can wait for the first D2H
2752 * Reg FIS and we don't know that no device is attached.
2754 if (!(ap->flags & ATA_FLAG_SKIP_D2H_BSY) && !ata_port_offline(ap))
2755 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2761 * ata_std_softreset - reset host port via ATA SRST
2762 * @ap: port to reset
2763 * @classes: resulting classes of attached devices
2765 * Reset host port using ATA SRST.
2768 * Kernel thread context (may sleep)
2771 * 0 on success, -errno otherwise.
2773 int ata_std_softreset(struct ata_port *ap, unsigned int *classes)
2775 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2776 unsigned int devmask = 0, err_mask;
2781 if (ata_port_offline(ap)) {
2782 classes[0] = ATA_DEV_NONE;
2786 /* determine if device 0/1 are present */
2787 if (ata_devchk(ap, 0))
2788 devmask |= (1 << 0);
2789 if (slave_possible && ata_devchk(ap, 1))
2790 devmask |= (1 << 1);
2792 /* select device 0 again */
2793 ap->ops->dev_select(ap, 0);
2795 /* issue bus reset */
2796 DPRINTK("about to softreset, devmask=%x\n", devmask);
2797 err_mask = ata_bus_softreset(ap, devmask);
2799 ata_port_printk(ap, KERN_ERR, "SRST failed (err_mask=0x%x)\n",
2804 /* determine by signature whether we have ATA or ATAPI devices */
2805 classes[0] = ata_dev_try_classify(ap, 0, &err);
2806 if (slave_possible && err != 0x81)
2807 classes[1] = ata_dev_try_classify(ap, 1, &err);
2810 DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]);
2815 * sata_port_hardreset - reset port via SATA phy reset
2816 * @ap: port to reset
2817 * @timing: timing parameters { interval, duratinon, timeout } in msec
2819 * SATA phy-reset host port using DET bits of SControl register.
2822 * Kernel thread context (may sleep)
2825 * 0 on success, -errno otherwise.
2827 int sata_port_hardreset(struct ata_port *ap, const unsigned long *timing)
2834 if (sata_set_spd_needed(ap)) {
2835 /* SATA spec says nothing about how to reconfigure
2836 * spd. To be on the safe side, turn off phy during
2837 * reconfiguration. This works for at least ICH7 AHCI
2840 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
2843 scontrol = (scontrol & 0x0f0) | 0x304;
2845 if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol)))
2851 /* issue phy wake/reset */
2852 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
2855 scontrol = (scontrol & 0x0f0) | 0x301;
2857 if ((rc = sata_scr_write_flush(ap, SCR_CONTROL, scontrol)))
2860 /* Couldn't find anything in SATA I/II specs, but AHCI-1.1
2861 * 10.4.2 says at least 1 ms.
2865 /* bring phy back */
2866 rc = sata_phy_resume(ap, timing);
2868 DPRINTK("EXIT, rc=%d\n", rc);
2873 * sata_std_hardreset - reset host port via SATA phy reset
2874 * @ap: port to reset
2875 * @class: resulting class of attached device
2877 * SATA phy-reset host port using DET bits of SControl register,
2878 * wait for !BSY and classify the attached device.
2881 * Kernel thread context (may sleep)
2884 * 0 on success, -errno otherwise.
2886 int sata_std_hardreset(struct ata_port *ap, unsigned int *class)
2888 const unsigned long *timing = sata_ehc_deb_timing(&ap->eh_context);
2894 rc = sata_port_hardreset(ap, timing);
2896 ata_port_printk(ap, KERN_ERR,
2897 "COMRESET failed (errno=%d)\n", rc);
2901 /* TODO: phy layer with polling, timeouts, etc. */
2902 if (ata_port_offline(ap)) {
2903 *class = ATA_DEV_NONE;
2904 DPRINTK("EXIT, link offline\n");
2908 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
2909 ata_port_printk(ap, KERN_ERR,
2910 "COMRESET failed (device not ready)\n");
2914 ap->ops->dev_select(ap, 0); /* probably unnecessary */
2916 *class = ata_dev_try_classify(ap, 0, NULL);
2918 DPRINTK("EXIT, class=%u\n", *class);
2923 * ata_std_postreset - standard postreset callback
2924 * @ap: the target ata_port
2925 * @classes: classes of attached devices
2927 * This function is invoked after a successful reset. Note that
2928 * the device might have been reset more than once using
2929 * different reset methods before postreset is invoked.
2932 * Kernel thread context (may sleep)
2934 void ata_std_postreset(struct ata_port *ap, unsigned int *classes)
2940 /* print link status */
2941 sata_print_link_status(ap);
2944 if (sata_scr_read(ap, SCR_ERROR, &serror) == 0)
2945 sata_scr_write(ap, SCR_ERROR, serror);
2947 /* re-enable interrupts */
2948 if (!ap->ops->error_handler) {
2949 /* FIXME: hack. create a hook instead */
2950 if (ap->ioaddr.ctl_addr)
2954 /* is double-select really necessary? */
2955 if (classes[0] != ATA_DEV_NONE)
2956 ap->ops->dev_select(ap, 1);
2957 if (classes[1] != ATA_DEV_NONE)
2958 ap->ops->dev_select(ap, 0);
2960 /* bail out if no device is present */
2961 if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) {
2962 DPRINTK("EXIT, no device\n");
2966 /* set up device control */
2967 if (ap->ioaddr.ctl_addr) {
2968 if (ap->flags & ATA_FLAG_MMIO)
2969 writeb(ap->ctl, (void __iomem *) ap->ioaddr.ctl_addr);
2971 outb(ap->ctl, ap->ioaddr.ctl_addr);
2978 * ata_dev_same_device - Determine whether new ID matches configured device
2979 * @dev: device to compare against
2980 * @new_class: class of the new device
2981 * @new_id: IDENTIFY page of the new device
2983 * Compare @new_class and @new_id against @dev and determine
2984 * whether @dev is the device indicated by @new_class and
2991 * 1 if @dev matches @new_class and @new_id, 0 otherwise.
2993 static int ata_dev_same_device(struct ata_device *dev, unsigned int new_class,
2996 const u16 *old_id = dev->id;
2997 unsigned char model[2][41], serial[2][21];
3000 if (dev->class != new_class) {
3001 ata_dev_printk(dev, KERN_INFO, "class mismatch %d != %d\n",
3002 dev->class, new_class);
3006 ata_id_c_string(old_id, model[0], ATA_ID_PROD_OFS, sizeof(model[0]));
3007 ata_id_c_string(new_id, model[1], ATA_ID_PROD_OFS, sizeof(model[1]));
3008 ata_id_c_string(old_id, serial[0], ATA_ID_SERNO_OFS, sizeof(serial[0]));
3009 ata_id_c_string(new_id, serial[1], ATA_ID_SERNO_OFS, sizeof(serial[1]));
3010 new_n_sectors = ata_id_n_sectors(new_id);
3012 if (strcmp(model[0], model[1])) {
3013 ata_dev_printk(dev, KERN_INFO, "model number mismatch "
3014 "'%s' != '%s'\n", model[0], model[1]);
3018 if (strcmp(serial[0], serial[1])) {
3019 ata_dev_printk(dev, KERN_INFO, "serial number mismatch "
3020 "'%s' != '%s'\n", serial[0], serial[1]);
3024 if (dev->class == ATA_DEV_ATA && dev->n_sectors != new_n_sectors) {
3025 ata_dev_printk(dev, KERN_INFO, "n_sectors mismatch "
3027 (unsigned long long)dev->n_sectors,
3028 (unsigned long long)new_n_sectors);
3036 * ata_dev_revalidate - Revalidate ATA device
3037 * @dev: device to revalidate
3038 * @readid_flags: read ID flags
3040 * Re-read IDENTIFY page and make sure @dev is still attached to
3044 * Kernel thread context (may sleep)
3047 * 0 on success, negative errno otherwise
3049 int ata_dev_revalidate(struct ata_device *dev, unsigned int readid_flags)
3051 unsigned int class = dev->class;
3052 u16 *id = (void *)dev->ap->sector_buf;
3055 if (!ata_dev_enabled(dev)) {
3061 rc = ata_dev_read_id(dev, &class, readid_flags, id);
3065 /* is the device still there? */
3066 if (!ata_dev_same_device(dev, class, id)) {
3071 memcpy(dev->id, id, sizeof(id[0]) * ATA_ID_WORDS);
3073 /* configure device according to the new ID */
3074 rc = ata_dev_configure(dev);
3079 ata_dev_printk(dev, KERN_ERR, "revalidation failed (errno=%d)\n", rc);
3083 struct ata_blacklist_entry {
3084 const char *model_num;
3085 const char *model_rev;
3086 unsigned long horkage;
3089 static const struct ata_blacklist_entry ata_device_blacklist [] = {
3090 /* Devices with DMA related problems under Linux */
3091 { "WDC AC11000H", NULL, ATA_HORKAGE_NODMA },
3092 { "WDC AC22100H", NULL, ATA_HORKAGE_NODMA },
3093 { "WDC AC32500H", NULL, ATA_HORKAGE_NODMA },
3094 { "WDC AC33100H", NULL, ATA_HORKAGE_NODMA },
3095 { "WDC AC31600H", NULL, ATA_HORKAGE_NODMA },
3096 { "WDC AC32100H", "24.09P07", ATA_HORKAGE_NODMA },
3097 { "WDC AC23200L", "21.10N21", ATA_HORKAGE_NODMA },
3098 { "Compaq CRD-8241B", NULL, ATA_HORKAGE_NODMA },
3099 { "CRD-8400B", NULL, ATA_HORKAGE_NODMA },
3100 { "CRD-8480B", NULL, ATA_HORKAGE_NODMA },
3101 { "CRD-8482B", NULL, ATA_HORKAGE_NODMA },
3102 { "CRD-84", NULL, ATA_HORKAGE_NODMA },
3103 { "SanDisk SDP3B", NULL, ATA_HORKAGE_NODMA },
3104 { "SanDisk SDP3B-64", NULL, ATA_HORKAGE_NODMA },
3105 { "SANYO CD-ROM CRD", NULL, ATA_HORKAGE_NODMA },
3106 { "HITACHI CDR-8", NULL, ATA_HORKAGE_NODMA },
3107 { "HITACHI CDR-8335", NULL, ATA_HORKAGE_NODMA },
3108 { "HITACHI CDR-8435", NULL, ATA_HORKAGE_NODMA },
3109 { "Toshiba CD-ROM XM-6202B", NULL, ATA_HORKAGE_NODMA },
3110 { "TOSHIBA CD-ROM XM-1702BC", NULL, ATA_HORKAGE_NODMA },
3111 { "CD-532E-A", NULL, ATA_HORKAGE_NODMA },
3112 { "E-IDE CD-ROM CR-840",NULL, ATA_HORKAGE_NODMA },
3113 { "CD-ROM Drive/F5A", NULL, ATA_HORKAGE_NODMA },
3114 { "WPI CDD-820", NULL, ATA_HORKAGE_NODMA },
3115 { "SAMSUNG CD-ROM SC-148C", NULL, ATA_HORKAGE_NODMA },
3116 { "SAMSUNG CD-ROM SC", NULL, ATA_HORKAGE_NODMA },
3117 { "SanDisk SDP3B-64", NULL, ATA_HORKAGE_NODMA },
3118 { "ATAPI CD-ROM DRIVE 40X MAXIMUM",NULL,ATA_HORKAGE_NODMA },
3119 { "_NEC DV5800A", NULL, ATA_HORKAGE_NODMA },
3120 { "SAMSUNG CD-ROM SN-124","N001", ATA_HORKAGE_NODMA },
3122 /* Devices we expect to fail diagnostics */
3124 /* Devices where NCQ should be avoided */
3126 { "WDC WD740ADFD-00", NULL, ATA_HORKAGE_NONCQ },
3128 /* Devices with NCQ limits */
3134 static int ata_strim(char *s, size_t len)
3136 len = strnlen(s, len);
3138 /* ATAPI specifies that empty space is blank-filled; remove blanks */
3139 while ((len > 0) && (s[len - 1] == ' ')) {
3146 unsigned long ata_device_blacklisted(const struct ata_device *dev)
3148 unsigned char model_num[40];
3149 unsigned char model_rev[16];
3150 unsigned int nlen, rlen;
3151 const struct ata_blacklist_entry *ad = ata_device_blacklist;
3153 ata_id_string(dev->id, model_num, ATA_ID_PROD_OFS,
3155 ata_id_string(dev->id, model_rev, ATA_ID_FW_REV_OFS,
3157 nlen = ata_strim(model_num, sizeof(model_num));
3158 rlen = ata_strim(model_rev, sizeof(model_rev));
3160 while (ad->model_num) {
3161 if (!strncmp(ad->model_num, model_num, nlen)) {
3162 if (ad->model_rev == NULL)
3164 if (!strncmp(ad->model_rev, model_rev, rlen))
3172 static int ata_dma_blacklisted(const struct ata_device *dev)
3174 /* We don't support polling DMA.
3175 * DMA blacklist those ATAPI devices with CDB-intr (and use PIO)
3176 * if the LLDD handles only interrupts in the HSM_ST_LAST state.
3178 if ((dev->ap->flags & ATA_FLAG_PIO_POLLING) &&
3179 (dev->flags & ATA_DFLAG_CDB_INTR))
3181 return (ata_device_blacklisted(dev) & ATA_HORKAGE_NODMA) ? 1 : 0;
3185 * ata_dev_xfermask - Compute supported xfermask of the given device
3186 * @dev: Device to compute xfermask for
3188 * Compute supported xfermask of @dev and store it in
3189 * dev->*_mask. This function is responsible for applying all
3190 * known limits including host controller limits, device
3196 static void ata_dev_xfermask(struct ata_device *dev)
3198 struct ata_port *ap = dev->ap;
3199 struct ata_host *host = ap->host;
3200 unsigned long xfer_mask;
3202 /* controller modes available */
3203 xfer_mask = ata_pack_xfermask(ap->pio_mask,
3204 ap->mwdma_mask, ap->udma_mask);
3206 /* Apply cable rule here. Don't apply it early because when
3207 * we handle hot plug the cable type can itself change.
3209 if (ap->cbl == ATA_CBL_PATA40)
3210 xfer_mask &= ~(0xF8 << ATA_SHIFT_UDMA);
3211 /* Apply drive side cable rule. Unknown or 80 pin cables reported
3212 * host side are checked drive side as well. Cases where we know a
3213 * 40wire cable is used safely for 80 are not checked here.
3215 if (ata_drive_40wire(dev->id) && (ap->cbl == ATA_CBL_PATA_UNK || ap->cbl == ATA_CBL_PATA80))
3216 xfer_mask &= ~(0xF8 << ATA_SHIFT_UDMA);
3219 xfer_mask &= ata_pack_xfermask(dev->pio_mask,
3220 dev->mwdma_mask, dev->udma_mask);
3221 xfer_mask &= ata_id_xfermask(dev->id);
3224 * CFA Advanced TrueIDE timings are not allowed on a shared
3227 if (ata_dev_pair(dev)) {
3228 /* No PIO5 or PIO6 */
3229 xfer_mask &= ~(0x03 << (ATA_SHIFT_PIO + 5));
3230 /* No MWDMA3 or MWDMA 4 */
3231 xfer_mask &= ~(0x03 << (ATA_SHIFT_MWDMA + 3));
3234 if (ata_dma_blacklisted(dev)) {
3235 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
3236 ata_dev_printk(dev, KERN_WARNING,
3237 "device is on DMA blacklist, disabling DMA\n");
3240 if ((host->flags & ATA_HOST_SIMPLEX) && host->simplex_claimed) {
3241 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
3242 ata_dev_printk(dev, KERN_WARNING, "simplex DMA is claimed by "
3243 "other device, disabling DMA\n");
3246 if (ap->ops->mode_filter)
3247 xfer_mask = ap->ops->mode_filter(ap, dev, xfer_mask);
3249 ata_unpack_xfermask(xfer_mask, &dev->pio_mask,
3250 &dev->mwdma_mask, &dev->udma_mask);
3254 * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command
3255 * @dev: Device to which command will be sent
3257 * Issue SET FEATURES - XFER MODE command to device @dev
3261 * PCI/etc. bus probe sem.
3264 * 0 on success, AC_ERR_* mask otherwise.
3267 static unsigned int ata_dev_set_xfermode(struct ata_device *dev)
3269 struct ata_taskfile tf;
3270 unsigned int err_mask;
3272 /* set up set-features taskfile */
3273 DPRINTK("set features - xfer mode\n");
3275 ata_tf_init(dev, &tf);
3276 tf.command = ATA_CMD_SET_FEATURES;
3277 tf.feature = SETFEATURES_XFER;
3278 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
3279 tf.protocol = ATA_PROT_NODATA;
3280 tf.nsect = dev->xfer_mode;
3282 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
3284 DPRINTK("EXIT, err_mask=%x\n", err_mask);
3289 * ata_dev_init_params - Issue INIT DEV PARAMS command
3290 * @dev: Device to which command will be sent
3291 * @heads: Number of heads (taskfile parameter)
3292 * @sectors: Number of sectors (taskfile parameter)
3295 * Kernel thread context (may sleep)
3298 * 0 on success, AC_ERR_* mask otherwise.
3300 static unsigned int ata_dev_init_params(struct ata_device *dev,
3301 u16 heads, u16 sectors)
3303 struct ata_taskfile tf;
3304 unsigned int err_mask;
3306 /* Number of sectors per track 1-255. Number of heads 1-16 */
3307 if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16)
3308 return AC_ERR_INVALID;
3310 /* set up init dev params taskfile */
3311 DPRINTK("init dev params \n");
3313 ata_tf_init(dev, &tf);
3314 tf.command = ATA_CMD_INIT_DEV_PARAMS;
3315 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
3316 tf.protocol = ATA_PROT_NODATA;
3318 tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */
3320 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
3322 DPRINTK("EXIT, err_mask=%x\n", err_mask);
3327 * ata_sg_clean - Unmap DMA memory associated with command
3328 * @qc: Command containing DMA memory to be released
3330 * Unmap all mapped DMA memory associated with this command.
3333 * spin_lock_irqsave(host lock)
3336 static void ata_sg_clean(struct ata_queued_cmd *qc)
3338 struct ata_port *ap = qc->ap;
3339 struct scatterlist *sg = qc->__sg;
3340 int dir = qc->dma_dir;
3341 void *pad_buf = NULL;
3343 WARN_ON(!(qc->flags & ATA_QCFLAG_DMAMAP));
3344 WARN_ON(sg == NULL);
3346 if (qc->flags & ATA_QCFLAG_SINGLE)
3347 WARN_ON(qc->n_elem > 1);
3349 VPRINTK("unmapping %u sg elements\n", qc->n_elem);
3351 /* if we padded the buffer out to 32-bit bound, and data
3352 * xfer direction is from-device, we must copy from the
3353 * pad buffer back into the supplied buffer
3355 if (qc->pad_len && !(qc->tf.flags & ATA_TFLAG_WRITE))
3356 pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3358 if (qc->flags & ATA_QCFLAG_SG) {
3360 dma_unmap_sg(ap->dev, sg, qc->n_elem, dir);
3361 /* restore last sg */
3362 sg[qc->orig_n_elem - 1].length += qc->pad_len;
3364 struct scatterlist *psg = &qc->pad_sgent;
3365 void *addr = kmap_atomic(psg->page, KM_IRQ0);
3366 memcpy(addr + psg->offset, pad_buf, qc->pad_len);
3367 kunmap_atomic(addr, KM_IRQ0);
3371 dma_unmap_single(ap->dev,
3372 sg_dma_address(&sg[0]), sg_dma_len(&sg[0]),
3375 sg->length += qc->pad_len;
3377 memcpy(qc->buf_virt + sg->length - qc->pad_len,
3378 pad_buf, qc->pad_len);
3381 qc->flags &= ~ATA_QCFLAG_DMAMAP;
3386 * ata_fill_sg - Fill PCI IDE PRD table
3387 * @qc: Metadata associated with taskfile to be transferred
3389 * Fill PCI IDE PRD (scatter-gather) table with segments
3390 * associated with the current disk command.
3393 * spin_lock_irqsave(host lock)
3396 static void ata_fill_sg(struct ata_queued_cmd *qc)
3398 struct ata_port *ap = qc->ap;
3399 struct scatterlist *sg;
3402 WARN_ON(qc->__sg == NULL);
3403 WARN_ON(qc->n_elem == 0 && qc->pad_len == 0);
3406 ata_for_each_sg(sg, qc) {
3410 /* determine if physical DMA addr spans 64K boundary.
3411 * Note h/w doesn't support 64-bit, so we unconditionally
3412 * truncate dma_addr_t to u32.
3414 addr = (u32) sg_dma_address(sg);
3415 sg_len = sg_dma_len(sg);
3418 offset = addr & 0xffff;
3420 if ((offset + sg_len) > 0x10000)
3421 len = 0x10000 - offset;
3423 ap->prd[idx].addr = cpu_to_le32(addr);
3424 ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff);
3425 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
3434 ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
3437 * ata_check_atapi_dma - Check whether ATAPI DMA can be supported
3438 * @qc: Metadata associated with taskfile to check
3440 * Allow low-level driver to filter ATA PACKET commands, returning
3441 * a status indicating whether or not it is OK to use DMA for the
3442 * supplied PACKET command.
3445 * spin_lock_irqsave(host lock)
3447 * RETURNS: 0 when ATAPI DMA can be used
3450 int ata_check_atapi_dma(struct ata_queued_cmd *qc)
3452 struct ata_port *ap = qc->ap;
3453 int rc = 0; /* Assume ATAPI DMA is OK by default */
3455 if (ap->ops->check_atapi_dma)
3456 rc = ap->ops->check_atapi_dma(qc);
3461 * ata_qc_prep - Prepare taskfile for submission
3462 * @qc: Metadata associated with taskfile to be prepared
3464 * Prepare ATA taskfile for submission.
3467 * spin_lock_irqsave(host lock)
3469 void ata_qc_prep(struct ata_queued_cmd *qc)
3471 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
3477 void ata_noop_qc_prep(struct ata_queued_cmd *qc) { }
3480 * ata_sg_init_one - Associate command with memory buffer
3481 * @qc: Command to be associated
3482 * @buf: Memory buffer
3483 * @buflen: Length of memory buffer, in bytes.
3485 * Initialize the data-related elements of queued_cmd @qc
3486 * to point to a single memory buffer, @buf of byte length @buflen.
3489 * spin_lock_irqsave(host lock)
3492 void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen)
3494 qc->flags |= ATA_QCFLAG_SINGLE;
3496 qc->__sg = &qc->sgent;
3498 qc->orig_n_elem = 1;
3500 qc->nbytes = buflen;
3502 sg_init_one(&qc->sgent, buf, buflen);
3506 * ata_sg_init - Associate command with scatter-gather table.
3507 * @qc: Command to be associated
3508 * @sg: Scatter-gather table.
3509 * @n_elem: Number of elements in s/g table.
3511 * Initialize the data-related elements of queued_cmd @qc
3512 * to point to a scatter-gather table @sg, containing @n_elem
3516 * spin_lock_irqsave(host lock)
3519 void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
3520 unsigned int n_elem)
3522 qc->flags |= ATA_QCFLAG_SG;
3524 qc->n_elem = n_elem;
3525 qc->orig_n_elem = n_elem;
3529 * ata_sg_setup_one - DMA-map the memory buffer associated with a command.
3530 * @qc: Command with memory buffer to be mapped.
3532 * DMA-map the memory buffer associated with queued_cmd @qc.
3535 * spin_lock_irqsave(host lock)
3538 * Zero on success, negative on error.
3541 static int ata_sg_setup_one(struct ata_queued_cmd *qc)
3543 struct ata_port *ap = qc->ap;
3544 int dir = qc->dma_dir;
3545 struct scatterlist *sg = qc->__sg;
3546 dma_addr_t dma_address;
3549 /* we must lengthen transfers to end on a 32-bit boundary */
3550 qc->pad_len = sg->length & 3;
3552 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3553 struct scatterlist *psg = &qc->pad_sgent;
3555 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
3557 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
3559 if (qc->tf.flags & ATA_TFLAG_WRITE)
3560 memcpy(pad_buf, qc->buf_virt + sg->length - qc->pad_len,
3563 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
3564 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
3566 sg->length -= qc->pad_len;
3567 if (sg->length == 0)
3570 DPRINTK("padding done, sg->length=%u pad_len=%u\n",
3571 sg->length, qc->pad_len);
3579 dma_address = dma_map_single(ap->dev, qc->buf_virt,
3581 if (dma_mapping_error(dma_address)) {
3583 sg->length += qc->pad_len;
3587 sg_dma_address(sg) = dma_address;
3588 sg_dma_len(sg) = sg->length;
3591 DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg),
3592 qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3598 * ata_sg_setup - DMA-map the scatter-gather table associated with a command.
3599 * @qc: Command with scatter-gather table to be mapped.
3601 * DMA-map the scatter-gather table associated with queued_cmd @qc.
3604 * spin_lock_irqsave(host lock)
3607 * Zero on success, negative on error.
3611 static int ata_sg_setup(struct ata_queued_cmd *qc)
3613 struct ata_port *ap = qc->ap;
3614 struct scatterlist *sg = qc->__sg;
3615 struct scatterlist *lsg = &sg[qc->n_elem - 1];
3616 int n_elem, pre_n_elem, dir, trim_sg = 0;
3618 VPRINTK("ENTER, ata%u\n", ap->id);
3619 WARN_ON(!(qc->flags & ATA_QCFLAG_SG));
3621 /* we must lengthen transfers to end on a 32-bit boundary */
3622 qc->pad_len = lsg->length & 3;
3624 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3625 struct scatterlist *psg = &qc->pad_sgent;
3626 unsigned int offset;
3628 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
3630 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
3633 * psg->page/offset are used to copy to-be-written
3634 * data in this function or read data in ata_sg_clean.
3636 offset = lsg->offset + lsg->length - qc->pad_len;
3637 psg->page = nth_page(lsg->page, offset >> PAGE_SHIFT);
3638 psg->offset = offset_in_page(offset);
3640 if (qc->tf.flags & ATA_TFLAG_WRITE) {
3641 void *addr = kmap_atomic(psg->page, KM_IRQ0);
3642 memcpy(pad_buf, addr + psg->offset, qc->pad_len);
3643 kunmap_atomic(addr, KM_IRQ0);
3646 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
3647 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
3649 lsg->length -= qc->pad_len;
3650 if (lsg->length == 0)
3653 DPRINTK("padding done, sg[%d].length=%u pad_len=%u\n",
3654 qc->n_elem - 1, lsg->length, qc->pad_len);
3657 pre_n_elem = qc->n_elem;
3658 if (trim_sg && pre_n_elem)
3667 n_elem = dma_map_sg(ap->dev, sg, pre_n_elem, dir);
3669 /* restore last sg */
3670 lsg->length += qc->pad_len;
3674 DPRINTK("%d sg elements mapped\n", n_elem);
3677 qc->n_elem = n_elem;
3683 * swap_buf_le16 - swap halves of 16-bit words in place
3684 * @buf: Buffer to swap
3685 * @buf_words: Number of 16-bit words in buffer.
3687 * Swap halves of 16-bit words if needed to convert from
3688 * little-endian byte order to native cpu byte order, or
3692 * Inherited from caller.
3694 void swap_buf_le16(u16 *buf, unsigned int buf_words)
3699 for (i = 0; i < buf_words; i++)
3700 buf[i] = le16_to_cpu(buf[i]);
3701 #endif /* __BIG_ENDIAN */
3705 * ata_mmio_data_xfer - Transfer data by MMIO
3706 * @adev: device for this I/O
3708 * @buflen: buffer length
3709 * @write_data: read/write
3711 * Transfer data from/to the device data register by MMIO.
3714 * Inherited from caller.
3717 void ata_mmio_data_xfer(struct ata_device *adev, unsigned char *buf,
3718 unsigned int buflen, int write_data)
3720 struct ata_port *ap = adev->ap;
3722 unsigned int words = buflen >> 1;
3723 u16 *buf16 = (u16 *) buf;
3724 void __iomem *mmio = (void __iomem *)ap->ioaddr.data_addr;
3726 /* Transfer multiple of 2 bytes */
3728 for (i = 0; i < words; i++)
3729 writew(le16_to_cpu(buf16[i]), mmio);
3731 for (i = 0; i < words; i++)
3732 buf16[i] = cpu_to_le16(readw(mmio));
3735 /* Transfer trailing 1 byte, if any. */
3736 if (unlikely(buflen & 0x01)) {
3737 u16 align_buf[1] = { 0 };
3738 unsigned char *trailing_buf = buf + buflen - 1;
3741 memcpy(align_buf, trailing_buf, 1);
3742 writew(le16_to_cpu(align_buf[0]), mmio);
3744 align_buf[0] = cpu_to_le16(readw(mmio));
3745 memcpy(trailing_buf, align_buf, 1);
3751 * ata_pio_data_xfer - Transfer data by PIO
3752 * @adev: device to target
3754 * @buflen: buffer length
3755 * @write_data: read/write
3757 * Transfer data from/to the device data register by PIO.
3760 * Inherited from caller.
3763 void ata_pio_data_xfer(struct ata_device *adev, unsigned char *buf,
3764 unsigned int buflen, int write_data)
3766 struct ata_port *ap = adev->ap;
3767 unsigned int words = buflen >> 1;
3769 /* Transfer multiple of 2 bytes */
3771 outsw(ap->ioaddr.data_addr, buf, words);
3773 insw(ap->ioaddr.data_addr, buf, words);
3775 /* Transfer trailing 1 byte, if any. */
3776 if (unlikely(buflen & 0x01)) {
3777 u16 align_buf[1] = { 0 };
3778 unsigned char *trailing_buf = buf + buflen - 1;
3781 memcpy(align_buf, trailing_buf, 1);
3782 outw(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr);
3784 align_buf[0] = cpu_to_le16(inw(ap->ioaddr.data_addr));
3785 memcpy(trailing_buf, align_buf, 1);
3791 * ata_pio_data_xfer_noirq - Transfer data by PIO
3792 * @adev: device to target
3794 * @buflen: buffer length
3795 * @write_data: read/write
3797 * Transfer data from/to the device data register by PIO. Do the
3798 * transfer with interrupts disabled.
3801 * Inherited from caller.
3804 void ata_pio_data_xfer_noirq(struct ata_device *adev, unsigned char *buf,
3805 unsigned int buflen, int write_data)
3807 unsigned long flags;
3808 local_irq_save(flags);
3809 ata_pio_data_xfer(adev, buf, buflen, write_data);
3810 local_irq_restore(flags);
3815 * ata_pio_sector - Transfer ATA_SECT_SIZE (512 bytes) of data.
3816 * @qc: Command on going
3818 * Transfer ATA_SECT_SIZE of data from/to the ATA device.
3821 * Inherited from caller.
3824 static void ata_pio_sector(struct ata_queued_cmd *qc)
3826 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
3827 struct scatterlist *sg = qc->__sg;
3828 struct ata_port *ap = qc->ap;
3830 unsigned int offset;
3833 if (qc->cursect == (qc->nsect - 1))
3834 ap->hsm_task_state = HSM_ST_LAST;
3836 page = sg[qc->cursg].page;
3837 offset = sg[qc->cursg].offset + qc->cursg_ofs * ATA_SECT_SIZE;
3839 /* get the current page and offset */
3840 page = nth_page(page, (offset >> PAGE_SHIFT));
3841 offset %= PAGE_SIZE;
3843 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3845 if (PageHighMem(page)) {
3846 unsigned long flags;
3848 /* FIXME: use a bounce buffer */
3849 local_irq_save(flags);
3850 buf = kmap_atomic(page, KM_IRQ0);
3852 /* do the actual data transfer */
3853 ap->ops->data_xfer(qc->dev, buf + offset, ATA_SECT_SIZE, do_write);
3855 kunmap_atomic(buf, KM_IRQ0);
3856 local_irq_restore(flags);
3858 buf = page_address(page);
3859 ap->ops->data_xfer(qc->dev, buf + offset, ATA_SECT_SIZE, do_write);
3865 if ((qc->cursg_ofs * ATA_SECT_SIZE) == (&sg[qc->cursg])->length) {
3872 * ata_pio_sectors - Transfer one or many 512-byte sectors.
3873 * @qc: Command on going
3875 * Transfer one or many ATA_SECT_SIZE of data from/to the
3876 * ATA device for the DRQ request.
3879 * Inherited from caller.
3882 static void ata_pio_sectors(struct ata_queued_cmd *qc)
3884 if (is_multi_taskfile(&qc->tf)) {
3885 /* READ/WRITE MULTIPLE */
3888 WARN_ON(qc->dev->multi_count == 0);
3890 nsect = min(qc->nsect - qc->cursect, qc->dev->multi_count);
3898 * atapi_send_cdb - Write CDB bytes to hardware
3899 * @ap: Port to which ATAPI device is attached.
3900 * @qc: Taskfile currently active
3902 * When device has indicated its readiness to accept
3903 * a CDB, this function is called. Send the CDB.
3909 static void atapi_send_cdb(struct ata_port *ap, struct ata_queued_cmd *qc)
3912 DPRINTK("send cdb\n");
3913 WARN_ON(qc->dev->cdb_len < 12);
3915 ap->ops->data_xfer(qc->dev, qc->cdb, qc->dev->cdb_len, 1);
3916 ata_altstatus(ap); /* flush */
3918 switch (qc->tf.protocol) {
3919 case ATA_PROT_ATAPI:
3920 ap->hsm_task_state = HSM_ST;
3922 case ATA_PROT_ATAPI_NODATA:
3923 ap->hsm_task_state = HSM_ST_LAST;
3925 case ATA_PROT_ATAPI_DMA:
3926 ap->hsm_task_state = HSM_ST_LAST;
3927 /* initiate bmdma */
3928 ap->ops->bmdma_start(qc);
3934 * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
3935 * @qc: Command on going
3936 * @bytes: number of bytes
3938 * Transfer Transfer data from/to the ATAPI device.
3941 * Inherited from caller.
3945 static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
3947 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
3948 struct scatterlist *sg = qc->__sg;
3949 struct ata_port *ap = qc->ap;
3952 unsigned int offset, count;
3954 if (qc->curbytes + bytes >= qc->nbytes)
3955 ap->hsm_task_state = HSM_ST_LAST;
3958 if (unlikely(qc->cursg >= qc->n_elem)) {
3960 * The end of qc->sg is reached and the device expects
3961 * more data to transfer. In order not to overrun qc->sg
3962 * and fulfill length specified in the byte count register,
3963 * - for read case, discard trailing data from the device
3964 * - for write case, padding zero data to the device
3966 u16 pad_buf[1] = { 0 };
3967 unsigned int words = bytes >> 1;
3970 if (words) /* warning if bytes > 1 */
3971 ata_dev_printk(qc->dev, KERN_WARNING,
3972 "%u bytes trailing data\n", bytes);
3974 for (i = 0; i < words; i++)
3975 ap->ops->data_xfer(qc->dev, (unsigned char*)pad_buf, 2, do_write);
3977 ap->hsm_task_state = HSM_ST_LAST;
3981 sg = &qc->__sg[qc->cursg];
3984 offset = sg->offset + qc->cursg_ofs;
3986 /* get the current page and offset */
3987 page = nth_page(page, (offset >> PAGE_SHIFT));
3988 offset %= PAGE_SIZE;
3990 /* don't overrun current sg */
3991 count = min(sg->length - qc->cursg_ofs, bytes);
3993 /* don't cross page boundaries */
3994 count = min(count, (unsigned int)PAGE_SIZE - offset);
3996 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3998 if (PageHighMem(page)) {
3999 unsigned long flags;
4001 /* FIXME: use bounce buffer */
4002 local_irq_save(flags);
4003 buf = kmap_atomic(page, KM_IRQ0);
4005 /* do the actual data transfer */
4006 ap->ops->data_xfer(qc->dev, buf + offset, count, do_write);
4008 kunmap_atomic(buf, KM_IRQ0);
4009 local_irq_restore(flags);
4011 buf = page_address(page);
4012 ap->ops->data_xfer(qc->dev, buf + offset, count, do_write);
4016 qc->curbytes += count;
4017 qc->cursg_ofs += count;
4019 if (qc->cursg_ofs == sg->length) {
4029 * atapi_pio_bytes - Transfer data from/to the ATAPI device.
4030 * @qc: Command on going
4032 * Transfer Transfer data from/to the ATAPI device.
4035 * Inherited from caller.
4038 static void atapi_pio_bytes(struct ata_queued_cmd *qc)
4040 struct ata_port *ap = qc->ap;
4041 struct ata_device *dev = qc->dev;
4042 unsigned int ireason, bc_lo, bc_hi, bytes;
4043 int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0;
4045 /* Abuse qc->result_tf for temp storage of intermediate TF
4046 * here to save some kernel stack usage.
4047 * For normal completion, qc->result_tf is not relevant. For
4048 * error, qc->result_tf is later overwritten by ata_qc_complete().
4049 * So, the correctness of qc->result_tf is not affected.
4051 ap->ops->tf_read(ap, &qc->result_tf);
4052 ireason = qc->result_tf.nsect;
4053 bc_lo = qc->result_tf.lbam;
4054 bc_hi = qc->result_tf.lbah;
4055 bytes = (bc_hi << 8) | bc_lo;
4057 /* shall be cleared to zero, indicating xfer of data */
4058 if (ireason & (1 << 0))
4061 /* make sure transfer direction matches expected */
4062 i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0;
4063 if (do_write != i_write)
4066 VPRINTK("ata%u: xfering %d bytes\n", ap->id, bytes);
4068 __atapi_pio_bytes(qc, bytes);
4073 ata_dev_printk(dev, KERN_INFO, "ATAPI check failed\n");
4074 qc->err_mask |= AC_ERR_HSM;
4075 ap->hsm_task_state = HSM_ST_ERR;
4079 * ata_hsm_ok_in_wq - Check if the qc can be handled in the workqueue.
4080 * @ap: the target ata_port
4084 * 1 if ok in workqueue, 0 otherwise.
4087 static inline int ata_hsm_ok_in_wq(struct ata_port *ap, struct ata_queued_cmd *qc)
4089 if (qc->tf.flags & ATA_TFLAG_POLLING)
4092 if (ap->hsm_task_state == HSM_ST_FIRST) {
4093 if (qc->tf.protocol == ATA_PROT_PIO &&
4094 (qc->tf.flags & ATA_TFLAG_WRITE))
4097 if (is_atapi_taskfile(&qc->tf) &&
4098 !(qc->dev->flags & ATA_DFLAG_CDB_INTR))
4106 * ata_hsm_qc_complete - finish a qc running on standard HSM
4107 * @qc: Command to complete
4108 * @in_wq: 1 if called from workqueue, 0 otherwise
4110 * Finish @qc which is running on standard HSM.
4113 * If @in_wq is zero, spin_lock_irqsave(host lock).
4114 * Otherwise, none on entry and grabs host lock.
4116 static void ata_hsm_qc_complete(struct ata_queued_cmd *qc, int in_wq)
4118 struct ata_port *ap = qc->ap;
4119 unsigned long flags;
4121 if (ap->ops->error_handler) {
4123 spin_lock_irqsave(ap->lock, flags);
4125 /* EH might have kicked in while host lock is
4128 qc = ata_qc_from_tag(ap, qc->tag);
4130 if (likely(!(qc->err_mask & AC_ERR_HSM))) {
4132 ata_qc_complete(qc);
4134 ata_port_freeze(ap);
4137 spin_unlock_irqrestore(ap->lock, flags);
4139 if (likely(!(qc->err_mask & AC_ERR_HSM)))
4140 ata_qc_complete(qc);
4142 ata_port_freeze(ap);
4146 spin_lock_irqsave(ap->lock, flags);
4148 ata_qc_complete(qc);
4149 spin_unlock_irqrestore(ap->lock, flags);
4151 ata_qc_complete(qc);
4154 ata_altstatus(ap); /* flush */
4158 * ata_hsm_move - move the HSM to the next state.
4159 * @ap: the target ata_port
4161 * @status: current device status
4162 * @in_wq: 1 if called from workqueue, 0 otherwise
4165 * 1 when poll next status needed, 0 otherwise.
4167 int ata_hsm_move(struct ata_port *ap, struct ata_queued_cmd *qc,
4168 u8 status, int in_wq)
4170 unsigned long flags = 0;
4173 WARN_ON((qc->flags & ATA_QCFLAG_ACTIVE) == 0);
4175 /* Make sure ata_qc_issue_prot() does not throw things
4176 * like DMA polling into the workqueue. Notice that
4177 * in_wq is not equivalent to (qc->tf.flags & ATA_TFLAG_POLLING).
4179 WARN_ON(in_wq != ata_hsm_ok_in_wq(ap, qc));
4182 DPRINTK("ata%u: protocol %d task_state %d (dev_stat 0x%X)\n",
4183 ap->id, qc->tf.protocol, ap->hsm_task_state, status);
4185 switch (ap->hsm_task_state) {
4187 /* Send first data block or PACKET CDB */
4189 /* If polling, we will stay in the work queue after
4190 * sending the data. Otherwise, interrupt handler
4191 * takes over after sending the data.
4193 poll_next = (qc->tf.flags & ATA_TFLAG_POLLING);
4195 /* check device status */
4196 if (unlikely((status & ATA_DRQ) == 0)) {
4197 /* handle BSY=0, DRQ=0 as error */
4198 if (likely(status & (ATA_ERR | ATA_DF)))
4199 /* device stops HSM for abort/error */
4200 qc->err_mask |= AC_ERR_DEV;
4202 /* HSM violation. Let EH handle this */
4203 qc->err_mask |= AC_ERR_HSM;
4205 ap->hsm_task_state = HSM_ST_ERR;
4209 /* Device should not ask for data transfer (DRQ=1)
4210 * when it finds something wrong.
4211 * We ignore DRQ here and stop the HSM by
4212 * changing hsm_task_state to HSM_ST_ERR and
4213 * let the EH abort the command or reset the device.
4215 if (unlikely(status & (ATA_ERR | ATA_DF))) {
4216 printk(KERN_WARNING "ata%d: DRQ=1 with device error, dev_stat 0x%X\n",
4218 qc->err_mask |= AC_ERR_HSM;
4219 ap->hsm_task_state = HSM_ST_ERR;
4223 /* Send the CDB (atapi) or the first data block (ata pio out).
4224 * During the state transition, interrupt handler shouldn't
4225 * be invoked before the data transfer is complete and
4226 * hsm_task_state is changed. Hence, the following locking.
4229 spin_lock_irqsave(ap->lock, flags);
4231 if (qc->tf.protocol == ATA_PROT_PIO) {
4232 /* PIO data out protocol.
4233 * send first data block.
4236 /* ata_pio_sectors() might change the state
4237 * to HSM_ST_LAST. so, the state is changed here
4238 * before ata_pio_sectors().
4240 ap->hsm_task_state = HSM_ST;
4241 ata_pio_sectors(qc);
4242 ata_altstatus(ap); /* flush */
4245 atapi_send_cdb(ap, qc);
4248 spin_unlock_irqrestore(ap->lock, flags);
4250 /* if polling, ata_pio_task() handles the rest.
4251 * otherwise, interrupt handler takes over from here.
4256 /* complete command or read/write the data register */
4257 if (qc->tf.protocol == ATA_PROT_ATAPI) {
4258 /* ATAPI PIO protocol */
4259 if ((status & ATA_DRQ) == 0) {
4260 /* No more data to transfer or device error.
4261 * Device error will be tagged in HSM_ST_LAST.
4263 ap->hsm_task_state = HSM_ST_LAST;
4267 /* Device should not ask for data transfer (DRQ=1)
4268 * when it finds something wrong.
4269 * We ignore DRQ here and stop the HSM by
4270 * changing hsm_task_state to HSM_ST_ERR and
4271 * let the EH abort the command or reset the device.
4273 if (unlikely(status & (ATA_ERR | ATA_DF))) {
4274 printk(KERN_WARNING "ata%d: DRQ=1 with device error, dev_stat 0x%X\n",
4276 qc->err_mask |= AC_ERR_HSM;
4277 ap->hsm_task_state = HSM_ST_ERR;
4281 atapi_pio_bytes(qc);
4283 if (unlikely(ap->hsm_task_state == HSM_ST_ERR))
4284 /* bad ireason reported by device */
4288 /* ATA PIO protocol */
4289 if (unlikely((status & ATA_DRQ) == 0)) {
4290 /* handle BSY=0, DRQ=0 as error */
4291 if (likely(status & (ATA_ERR | ATA_DF)))
4292 /* device stops HSM for abort/error */
4293 qc->err_mask |= AC_ERR_DEV;
4295 /* HSM violation. Let EH handle this.
4296 * Phantom devices also trigger this
4297 * condition. Mark hint.
4299 qc->err_mask |= AC_ERR_HSM |
4302 ap->hsm_task_state = HSM_ST_ERR;
4306 /* For PIO reads, some devices may ask for
4307 * data transfer (DRQ=1) alone with ERR=1.
4308 * We respect DRQ here and transfer one
4309 * block of junk data before changing the
4310 * hsm_task_state to HSM_ST_ERR.
4312 * For PIO writes, ERR=1 DRQ=1 doesn't make
4313 * sense since the data block has been
4314 * transferred to the device.
4316 if (unlikely(status & (ATA_ERR | ATA_DF))) {
4317 /* data might be corrputed */
4318 qc->err_mask |= AC_ERR_DEV;
4320 if (!(qc->tf.flags & ATA_TFLAG_WRITE)) {
4321 ata_pio_sectors(qc);
4323 status = ata_wait_idle(ap);
4326 if (status & (ATA_BUSY | ATA_DRQ))
4327 qc->err_mask |= AC_ERR_HSM;
4329 /* ata_pio_sectors() might change the
4330 * state to HSM_ST_LAST. so, the state
4331 * is changed after ata_pio_sectors().
4333 ap->hsm_task_state = HSM_ST_ERR;
4337 ata_pio_sectors(qc);
4339 if (ap->hsm_task_state == HSM_ST_LAST &&
4340 (!(qc->tf.flags & ATA_TFLAG_WRITE))) {
4343 status = ata_wait_idle(ap);
4348 ata_altstatus(ap); /* flush */
4353 if (unlikely(!ata_ok(status))) {
4354 qc->err_mask |= __ac_err_mask(status);
4355 ap->hsm_task_state = HSM_ST_ERR;
4359 /* no more data to transfer */
4360 DPRINTK("ata%u: dev %u command complete, drv_stat 0x%x\n",
4361 ap->id, qc->dev->devno, status);
4363 WARN_ON(qc->err_mask);
4365 ap->hsm_task_state = HSM_ST_IDLE;
4367 /* complete taskfile transaction */
4368 ata_hsm_qc_complete(qc, in_wq);
4374 /* make sure qc->err_mask is available to
4375 * know what's wrong and recover
4377 WARN_ON(qc->err_mask == 0);
4379 ap->hsm_task_state = HSM_ST_IDLE;
4381 /* complete taskfile transaction */
4382 ata_hsm_qc_complete(qc, in_wq);
4394 static void ata_pio_task(void *_data)
4396 struct ata_queued_cmd *qc = _data;
4397 struct ata_port *ap = qc->ap;
4402 WARN_ON(ap->hsm_task_state == HSM_ST_IDLE);
4405 * This is purely heuristic. This is a fast path.
4406 * Sometimes when we enter, BSY will be cleared in
4407 * a chk-status or two. If not, the drive is probably seeking
4408 * or something. Snooze for a couple msecs, then
4409 * chk-status again. If still busy, queue delayed work.
4411 status = ata_busy_wait(ap, ATA_BUSY, 5);
4412 if (status & ATA_BUSY) {
4414 status = ata_busy_wait(ap, ATA_BUSY, 10);
4415 if (status & ATA_BUSY) {
4416 ata_port_queue_task(ap, ata_pio_task, qc, ATA_SHORT_PAUSE);
4422 poll_next = ata_hsm_move(ap, qc, status, 1);
4424 /* another command or interrupt handler
4425 * may be running at this point.
4432 * ata_qc_new - Request an available ATA command, for queueing
4433 * @ap: Port associated with device @dev
4434 * @dev: Device from whom we request an available command structure
4440 static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap)
4442 struct ata_queued_cmd *qc = NULL;
4445 /* no command while frozen */
4446 if (unlikely(ap->pflags & ATA_PFLAG_FROZEN))
4449 /* the last tag is reserved for internal command. */
4450 for (i = 0; i < ATA_MAX_QUEUE - 1; i++)
4451 if (!test_and_set_bit(i, &ap->qc_allocated)) {
4452 qc = __ata_qc_from_tag(ap, i);
4463 * ata_qc_new_init - Request an available ATA command, and initialize it
4464 * @dev: Device from whom we request an available command structure
4470 struct ata_queued_cmd *ata_qc_new_init(struct ata_device *dev)
4472 struct ata_port *ap = dev->ap;
4473 struct ata_queued_cmd *qc;
4475 qc = ata_qc_new(ap);
4488 * ata_qc_free - free unused ata_queued_cmd
4489 * @qc: Command to complete
4491 * Designed to free unused ata_queued_cmd object
4492 * in case something prevents using it.
4495 * spin_lock_irqsave(host lock)
4497 void ata_qc_free(struct ata_queued_cmd *qc)
4499 struct ata_port *ap = qc->ap;
4502 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
4506 if (likely(ata_tag_valid(tag))) {
4507 qc->tag = ATA_TAG_POISON;
4508 clear_bit(tag, &ap->qc_allocated);
4512 void __ata_qc_complete(struct ata_queued_cmd *qc)
4514 struct ata_port *ap = qc->ap;
4516 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
4517 WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE));
4519 if (likely(qc->flags & ATA_QCFLAG_DMAMAP))
4522 /* command should be marked inactive atomically with qc completion */
4523 if (qc->tf.protocol == ATA_PROT_NCQ)
4524 ap->sactive &= ~(1 << qc->tag);
4526 ap->active_tag = ATA_TAG_POISON;
4528 /* atapi: mark qc as inactive to prevent the interrupt handler
4529 * from completing the command twice later, before the error handler
4530 * is called. (when rc != 0 and atapi request sense is needed)
4532 qc->flags &= ~ATA_QCFLAG_ACTIVE;
4533 ap->qc_active &= ~(1 << qc->tag);
4535 /* call completion callback */
4536 qc->complete_fn(qc);
4539 static void fill_result_tf(struct ata_queued_cmd *qc)
4541 struct ata_port *ap = qc->ap;
4543 ap->ops->tf_read(ap, &qc->result_tf);
4544 qc->result_tf.flags = qc->tf.flags;
4548 * ata_qc_complete - Complete an active ATA command
4549 * @qc: Command to complete
4550 * @err_mask: ATA Status register contents
4552 * Indicate to the mid and upper layers that an ATA
4553 * command has completed, with either an ok or not-ok status.
4556 * spin_lock_irqsave(host lock)
4558 void ata_qc_complete(struct ata_queued_cmd *qc)
4560 struct ata_port *ap = qc->ap;
4562 /* XXX: New EH and old EH use different mechanisms to
4563 * synchronize EH with regular execution path.
4565 * In new EH, a failed qc is marked with ATA_QCFLAG_FAILED.
4566 * Normal execution path is responsible for not accessing a
4567 * failed qc. libata core enforces the rule by returning NULL
4568 * from ata_qc_from_tag() for failed qcs.
4570 * Old EH depends on ata_qc_complete() nullifying completion
4571 * requests if ATA_QCFLAG_EH_SCHEDULED is set. Old EH does
4572 * not synchronize with interrupt handler. Only PIO task is
4575 if (ap->ops->error_handler) {
4576 WARN_ON(ap->pflags & ATA_PFLAG_FROZEN);
4578 if (unlikely(qc->err_mask))
4579 qc->flags |= ATA_QCFLAG_FAILED;
4581 if (unlikely(qc->flags & ATA_QCFLAG_FAILED)) {
4582 if (!ata_tag_internal(qc->tag)) {
4583 /* always fill result TF for failed qc */
4585 ata_qc_schedule_eh(qc);
4590 /* read result TF if requested */
4591 if (qc->flags & ATA_QCFLAG_RESULT_TF)
4594 __ata_qc_complete(qc);
4596 if (qc->flags & ATA_QCFLAG_EH_SCHEDULED)
4599 /* read result TF if failed or requested */
4600 if (qc->err_mask || qc->flags & ATA_QCFLAG_RESULT_TF)
4603 __ata_qc_complete(qc);
4608 * ata_qc_complete_multiple - Complete multiple qcs successfully
4609 * @ap: port in question
4610 * @qc_active: new qc_active mask
4611 * @finish_qc: LLDD callback invoked before completing a qc
4613 * Complete in-flight commands. This functions is meant to be
4614 * called from low-level driver's interrupt routine to complete
4615 * requests normally. ap->qc_active and @qc_active is compared
4616 * and commands are completed accordingly.
4619 * spin_lock_irqsave(host lock)
4622 * Number of completed commands on success, -errno otherwise.
4624 int ata_qc_complete_multiple(struct ata_port *ap, u32 qc_active,
4625 void (*finish_qc)(struct ata_queued_cmd *))
4631 done_mask = ap->qc_active ^ qc_active;
4633 if (unlikely(done_mask & qc_active)) {
4634 ata_port_printk(ap, KERN_ERR, "illegal qc_active transition "
4635 "(%08x->%08x)\n", ap->qc_active, qc_active);
4639 for (i = 0; i < ATA_MAX_QUEUE; i++) {
4640 struct ata_queued_cmd *qc;
4642 if (!(done_mask & (1 << i)))
4645 if ((qc = ata_qc_from_tag(ap, i))) {
4648 ata_qc_complete(qc);
4656 static inline int ata_should_dma_map(struct ata_queued_cmd *qc)
4658 struct ata_port *ap = qc->ap;
4660 switch (qc->tf.protocol) {
4663 case ATA_PROT_ATAPI_DMA:
4666 case ATA_PROT_ATAPI:
4668 if (ap->flags & ATA_FLAG_PIO_DMA)
4681 * ata_qc_issue - issue taskfile to device
4682 * @qc: command to issue to device
4684 * Prepare an ATA command to submission to device.
4685 * This includes mapping the data into a DMA-able
4686 * area, filling in the S/G table, and finally
4687 * writing the taskfile to hardware, starting the command.
4690 * spin_lock_irqsave(host lock)
4692 void ata_qc_issue(struct ata_queued_cmd *qc)
4694 struct ata_port *ap = qc->ap;
4696 /* Make sure only one non-NCQ command is outstanding. The
4697 * check is skipped for old EH because it reuses active qc to
4698 * request ATAPI sense.
4700 WARN_ON(ap->ops->error_handler && ata_tag_valid(ap->active_tag));
4702 if (qc->tf.protocol == ATA_PROT_NCQ) {
4703 WARN_ON(ap->sactive & (1 << qc->tag));
4704 ap->sactive |= 1 << qc->tag;
4706 WARN_ON(ap->sactive);
4707 ap->active_tag = qc->tag;
4710 qc->flags |= ATA_QCFLAG_ACTIVE;
4711 ap->qc_active |= 1 << qc->tag;
4713 if (ata_should_dma_map(qc)) {
4714 if (qc->flags & ATA_QCFLAG_SG) {
4715 if (ata_sg_setup(qc))
4717 } else if (qc->flags & ATA_QCFLAG_SINGLE) {
4718 if (ata_sg_setup_one(qc))
4722 qc->flags &= ~ATA_QCFLAG_DMAMAP;
4725 ap->ops->qc_prep(qc);
4727 qc->err_mask |= ap->ops->qc_issue(qc);
4728 if (unlikely(qc->err_mask))
4733 qc->flags &= ~ATA_QCFLAG_DMAMAP;
4734 qc->err_mask |= AC_ERR_SYSTEM;
4736 ata_qc_complete(qc);
4740 * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner
4741 * @qc: command to issue to device
4743 * Using various libata functions and hooks, this function
4744 * starts an ATA command. ATA commands are grouped into
4745 * classes called "protocols", and issuing each type of protocol
4746 * is slightly different.
4748 * May be used as the qc_issue() entry in ata_port_operations.
4751 * spin_lock_irqsave(host lock)
4754 * Zero on success, AC_ERR_* mask on failure
4757 unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc)
4759 struct ata_port *ap = qc->ap;
4761 /* Use polling pio if the LLD doesn't handle
4762 * interrupt driven pio and atapi CDB interrupt.
4764 if (ap->flags & ATA_FLAG_PIO_POLLING) {
4765 switch (qc->tf.protocol) {
4767 case ATA_PROT_ATAPI:
4768 case ATA_PROT_ATAPI_NODATA:
4769 qc->tf.flags |= ATA_TFLAG_POLLING;
4771 case ATA_PROT_ATAPI_DMA:
4772 if (qc->dev->flags & ATA_DFLAG_CDB_INTR)
4773 /* see ata_dma_blacklisted() */
4781 /* select the device */
4782 ata_dev_select(ap, qc->dev->devno, 1, 0);
4784 /* start the command */
4785 switch (qc->tf.protocol) {
4786 case ATA_PROT_NODATA:
4787 if (qc->tf.flags & ATA_TFLAG_POLLING)
4788 ata_qc_set_polling(qc);
4790 ata_tf_to_host(ap, &qc->tf);
4791 ap->hsm_task_state = HSM_ST_LAST;
4793 if (qc->tf.flags & ATA_TFLAG_POLLING)
4794 ata_port_queue_task(ap, ata_pio_task, qc, 0);
4799 WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING);
4801 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
4802 ap->ops->bmdma_setup(qc); /* set up bmdma */
4803 ap->ops->bmdma_start(qc); /* initiate bmdma */
4804 ap->hsm_task_state = HSM_ST_LAST;
4808 if (qc->tf.flags & ATA_TFLAG_POLLING)
4809 ata_qc_set_polling(qc);
4811 ata_tf_to_host(ap, &qc->tf);
4813 if (qc->tf.flags & ATA_TFLAG_WRITE) {
4814 /* PIO data out protocol */
4815 ap->hsm_task_state = HSM_ST_FIRST;
4816 ata_port_queue_task(ap, ata_pio_task, qc, 0);
4818 /* always send first data block using
4819 * the ata_pio_task() codepath.
4822 /* PIO data in protocol */
4823 ap->hsm_task_state = HSM_ST;
4825 if (qc->tf.flags & ATA_TFLAG_POLLING)
4826 ata_port_queue_task(ap, ata_pio_task, qc, 0);
4828 /* if polling, ata_pio_task() handles the rest.
4829 * otherwise, interrupt handler takes over from here.
4835 case ATA_PROT_ATAPI:
4836 case ATA_PROT_ATAPI_NODATA:
4837 if (qc->tf.flags & ATA_TFLAG_POLLING)
4838 ata_qc_set_polling(qc);
4840 ata_tf_to_host(ap, &qc->tf);
4842 ap->hsm_task_state = HSM_ST_FIRST;
4844 /* send cdb by polling if no cdb interrupt */
4845 if ((!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) ||
4846 (qc->tf.flags & ATA_TFLAG_POLLING))
4847 ata_port_queue_task(ap, ata_pio_task, qc, 0);
4850 case ATA_PROT_ATAPI_DMA:
4851 WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING);
4853 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
4854 ap->ops->bmdma_setup(qc); /* set up bmdma */
4855 ap->hsm_task_state = HSM_ST_FIRST;
4857 /* send cdb by polling if no cdb interrupt */
4858 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
4859 ata_port_queue_task(ap, ata_pio_task, qc, 0);
4864 return AC_ERR_SYSTEM;
4871 * ata_host_intr - Handle host interrupt for given (port, task)
4872 * @ap: Port on which interrupt arrived (possibly...)
4873 * @qc: Taskfile currently active in engine
4875 * Handle host interrupt for given queued command. Currently,
4876 * only DMA interrupts are handled. All other commands are
4877 * handled via polling with interrupts disabled (nIEN bit).
4880 * spin_lock_irqsave(host lock)
4883 * One if interrupt was handled, zero if not (shared irq).
4886 inline unsigned int ata_host_intr (struct ata_port *ap,
4887 struct ata_queued_cmd *qc)
4889 u8 status, host_stat = 0;
4891 VPRINTK("ata%u: protocol %d task_state %d\n",
4892 ap->id, qc->tf.protocol, ap->hsm_task_state);
4894 /* Check whether we are expecting interrupt in this state */
4895 switch (ap->hsm_task_state) {
4897 /* Some pre-ATAPI-4 devices assert INTRQ
4898 * at this state when ready to receive CDB.
4901 /* Check the ATA_DFLAG_CDB_INTR flag is enough here.
4902 * The flag was turned on only for atapi devices.
4903 * No need to check is_atapi_taskfile(&qc->tf) again.
4905 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
4909 if (qc->tf.protocol == ATA_PROT_DMA ||
4910 qc->tf.protocol == ATA_PROT_ATAPI_DMA) {
4911 /* check status of DMA engine */
4912 host_stat = ap->ops->bmdma_status(ap);
4913 VPRINTK("ata%u: host_stat 0x%X\n", ap->id, host_stat);
4915 /* if it's not our irq... */
4916 if (!(host_stat & ATA_DMA_INTR))
4919 /* before we do anything else, clear DMA-Start bit */
4920 ap->ops->bmdma_stop(qc);
4922 if (unlikely(host_stat & ATA_DMA_ERR)) {
4923 /* error when transfering data to/from memory */
4924 qc->err_mask |= AC_ERR_HOST_BUS;
4925 ap->hsm_task_state = HSM_ST_ERR;
4935 /* check altstatus */
4936 status = ata_altstatus(ap);
4937 if (status & ATA_BUSY)
4940 /* check main status, clearing INTRQ */
4941 status = ata_chk_status(ap);
4942 if (unlikely(status & ATA_BUSY))
4945 /* ack bmdma irq events */
4946 ap->ops->irq_clear(ap);
4948 ata_hsm_move(ap, qc, status, 0);
4949 return 1; /* irq handled */
4952 ap->stats.idle_irq++;
4955 if ((ap->stats.idle_irq % 1000) == 0) {
4956 ata_irq_ack(ap, 0); /* debug trap */
4957 ata_port_printk(ap, KERN_WARNING, "irq trap\n");
4961 return 0; /* irq not handled */
4965 * ata_interrupt - Default ATA host interrupt handler
4966 * @irq: irq line (unused)
4967 * @dev_instance: pointer to our ata_host information structure
4969 * Default interrupt handler for PCI IDE devices. Calls
4970 * ata_host_intr() for each port that is not disabled.
4973 * Obtains host lock during operation.
4976 * IRQ_NONE or IRQ_HANDLED.
4979 irqreturn_t ata_interrupt (int irq, void *dev_instance)
4981 struct ata_host *host = dev_instance;
4983 unsigned int handled = 0;
4984 unsigned long flags;
4986 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
4987 spin_lock_irqsave(&host->lock, flags);
4989 for (i = 0; i < host->n_ports; i++) {
4990 struct ata_port *ap;
4992 ap = host->ports[i];
4994 !(ap->flags & ATA_FLAG_DISABLED)) {
4995 struct ata_queued_cmd *qc;
4997 qc = ata_qc_from_tag(ap, ap->active_tag);
4998 if (qc && (!(qc->tf.flags & ATA_TFLAG_POLLING)) &&
4999 (qc->flags & ATA_QCFLAG_ACTIVE))
5000 handled |= ata_host_intr(ap, qc);
5004 spin_unlock_irqrestore(&host->lock, flags);
5006 return IRQ_RETVAL(handled);
5010 * sata_scr_valid - test whether SCRs are accessible
5011 * @ap: ATA port to test SCR accessibility for
5013 * Test whether SCRs are accessible for @ap.
5019 * 1 if SCRs are accessible, 0 otherwise.
5021 int sata_scr_valid(struct ata_port *ap)
5023 return ap->cbl == ATA_CBL_SATA && ap->ops->scr_read;
5027 * sata_scr_read - read SCR register of the specified port
5028 * @ap: ATA port to read SCR for
5030 * @val: Place to store read value
5032 * Read SCR register @reg of @ap into *@val. This function is
5033 * guaranteed to succeed if the cable type of the port is SATA
5034 * and the port implements ->scr_read.
5040 * 0 on success, negative errno on failure.
5042 int sata_scr_read(struct ata_port *ap, int reg, u32 *val)
5044 if (sata_scr_valid(ap)) {
5045 *val = ap->ops->scr_read(ap, reg);
5052 * sata_scr_write - write SCR register of the specified port
5053 * @ap: ATA port to write SCR for
5054 * @reg: SCR to write
5055 * @val: value to write
5057 * Write @val to SCR register @reg of @ap. This function is
5058 * guaranteed to succeed if the cable type of the port is SATA
5059 * and the port implements ->scr_read.
5065 * 0 on success, negative errno on failure.
5067 int sata_scr_write(struct ata_port *ap, int reg, u32 val)
5069 if (sata_scr_valid(ap)) {
5070 ap->ops->scr_write(ap, reg, val);
5077 * sata_scr_write_flush - write SCR register of the specified port and flush
5078 * @ap: ATA port to write SCR for
5079 * @reg: SCR to write
5080 * @val: value to write
5082 * This function is identical to sata_scr_write() except that this
5083 * function performs flush after writing to the register.
5089 * 0 on success, negative errno on failure.
5091 int sata_scr_write_flush(struct ata_port *ap, int reg, u32 val)
5093 if (sata_scr_valid(ap)) {
5094 ap->ops->scr_write(ap, reg, val);
5095 ap->ops->scr_read(ap, reg);
5102 * ata_port_online - test whether the given port is online
5103 * @ap: ATA port to test
5105 * Test whether @ap is online. Note that this function returns 0
5106 * if online status of @ap cannot be obtained, so
5107 * ata_port_online(ap) != !ata_port_offline(ap).
5113 * 1 if the port online status is available and online.
5115 int ata_port_online(struct ata_port *ap)
5119 if (!sata_scr_read(ap, SCR_STATUS, &sstatus) && (sstatus & 0xf) == 0x3)
5125 * ata_port_offline - test whether the given port is offline
5126 * @ap: ATA port to test
5128 * Test whether @ap is offline. Note that this function returns
5129 * 0 if offline status of @ap cannot be obtained, so
5130 * ata_port_online(ap) != !ata_port_offline(ap).
5136 * 1 if the port offline status is available and offline.
5138 int ata_port_offline(struct ata_port *ap)
5142 if (!sata_scr_read(ap, SCR_STATUS, &sstatus) && (sstatus & 0xf) != 0x3)
5147 int ata_flush_cache(struct ata_device *dev)
5149 unsigned int err_mask;
5152 if (!ata_try_flush_cache(dev))
5155 if (dev->flags & ATA_DFLAG_FLUSH_EXT)
5156 cmd = ATA_CMD_FLUSH_EXT;
5158 cmd = ATA_CMD_FLUSH;
5160 err_mask = ata_do_simple_cmd(dev, cmd);
5162 ata_dev_printk(dev, KERN_ERR, "failed to flush cache\n");
5169 static int ata_host_request_pm(struct ata_host *host, pm_message_t mesg,
5170 unsigned int action, unsigned int ehi_flags,
5173 unsigned long flags;
5176 for (i = 0; i < host->n_ports; i++) {
5177 struct ata_port *ap = host->ports[i];
5179 /* Previous resume operation might still be in
5180 * progress. Wait for PM_PENDING to clear.
5182 if (ap->pflags & ATA_PFLAG_PM_PENDING) {
5183 ata_port_wait_eh(ap);
5184 WARN_ON(ap->pflags & ATA_PFLAG_PM_PENDING);
5187 /* request PM ops to EH */
5188 spin_lock_irqsave(ap->lock, flags);
5193 ap->pm_result = &rc;
5196 ap->pflags |= ATA_PFLAG_PM_PENDING;
5197 ap->eh_info.action |= action;
5198 ap->eh_info.flags |= ehi_flags;
5200 ata_port_schedule_eh(ap);
5202 spin_unlock_irqrestore(ap->lock, flags);
5204 /* wait and check result */
5206 ata_port_wait_eh(ap);
5207 WARN_ON(ap->pflags & ATA_PFLAG_PM_PENDING);
5217 * ata_host_suspend - suspend host
5218 * @host: host to suspend
5221 * Suspend @host. Actual operation is performed by EH. This
5222 * function requests EH to perform PM operations and waits for EH
5226 * Kernel thread context (may sleep).
5229 * 0 on success, -errno on failure.
5231 int ata_host_suspend(struct ata_host *host, pm_message_t mesg)
5235 rc = ata_host_request_pm(host, mesg, 0, ATA_EHI_QUIET, 1);
5239 /* EH is quiescent now. Fail if we have any ready device.
5240 * This happens if hotplug occurs between completion of device
5241 * suspension and here.
5243 for (i = 0; i < host->n_ports; i++) {
5244 struct ata_port *ap = host->ports[i];
5246 for (j = 0; j < ATA_MAX_DEVICES; j++) {
5247 struct ata_device *dev = &ap->device[j];
5249 if (ata_dev_ready(dev)) {
5250 ata_port_printk(ap, KERN_WARNING,
5251 "suspend failed, device %d "
5252 "still active\n", dev->devno);
5259 host->dev->power.power_state = mesg;
5263 ata_host_resume(host);
5268 * ata_host_resume - resume host
5269 * @host: host to resume
5271 * Resume @host. Actual operation is performed by EH. This
5272 * function requests EH to perform PM operations and returns.
5273 * Note that all resume operations are performed parallely.
5276 * Kernel thread context (may sleep).
5278 void ata_host_resume(struct ata_host *host)
5280 ata_host_request_pm(host, PMSG_ON, ATA_EH_SOFTRESET,
5281 ATA_EHI_NO_AUTOPSY | ATA_EHI_QUIET, 0);
5282 host->dev->power.power_state = PMSG_ON;
5286 * ata_port_start - Set port up for dma.
5287 * @ap: Port to initialize
5289 * Called just after data structures for each port are
5290 * initialized. Allocates space for PRD table.
5292 * May be used as the port_start() entry in ata_port_operations.
5295 * Inherited from caller.
5298 int ata_port_start (struct ata_port *ap)
5300 struct device *dev = ap->dev;
5303 ap->prd = dma_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma, GFP_KERNEL);
5307 rc = ata_pad_alloc(ap, dev);
5309 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
5313 DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd, (unsigned long long) ap->prd_dma);
5320 * ata_port_stop - Undo ata_port_start()
5321 * @ap: Port to shut down
5323 * Frees the PRD table.
5325 * May be used as the port_stop() entry in ata_port_operations.
5328 * Inherited from caller.
5331 void ata_port_stop (struct ata_port *ap)
5333 struct device *dev = ap->dev;
5335 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
5336 ata_pad_free(ap, dev);
5339 void ata_host_stop (struct ata_host *host)
5341 if (host->mmio_base)
5342 iounmap(host->mmio_base);
5346 * ata_dev_init - Initialize an ata_device structure
5347 * @dev: Device structure to initialize
5349 * Initialize @dev in preparation for probing.
5352 * Inherited from caller.
5354 void ata_dev_init(struct ata_device *dev)
5356 struct ata_port *ap = dev->ap;
5357 unsigned long flags;
5359 /* SATA spd limit is bound to the first device */
5360 ap->sata_spd_limit = ap->hw_sata_spd_limit;
5362 /* High bits of dev->flags are used to record warm plug
5363 * requests which occur asynchronously. Synchronize using
5366 spin_lock_irqsave(ap->lock, flags);
5367 dev->flags &= ~ATA_DFLAG_INIT_MASK;
5368 spin_unlock_irqrestore(ap->lock, flags);
5370 memset((void *)dev + ATA_DEVICE_CLEAR_OFFSET, 0,
5371 sizeof(*dev) - ATA_DEVICE_CLEAR_OFFSET);
5372 dev->pio_mask = UINT_MAX;
5373 dev->mwdma_mask = UINT_MAX;
5374 dev->udma_mask = UINT_MAX;
5378 * ata_port_init - Initialize an ata_port structure
5379 * @ap: Structure to initialize
5380 * @host: Collection of hosts to which @ap belongs
5381 * @ent: Probe information provided by low-level driver
5382 * @port_no: Port number associated with this ata_port
5384 * Initialize a new ata_port structure.
5387 * Inherited from caller.
5389 void ata_port_init(struct ata_port *ap, struct ata_host *host,
5390 const struct ata_probe_ent *ent, unsigned int port_no)
5394 ap->lock = &host->lock;
5395 ap->flags = ATA_FLAG_DISABLED;
5396 ap->id = ata_unique_id++;
5397 ap->ctl = ATA_DEVCTL_OBS;
5400 ap->port_no = port_no;
5401 if (port_no == 1 && ent->pinfo2) {
5402 ap->pio_mask = ent->pinfo2->pio_mask;
5403 ap->mwdma_mask = ent->pinfo2->mwdma_mask;
5404 ap->udma_mask = ent->pinfo2->udma_mask;
5405 ap->flags |= ent->pinfo2->flags;
5406 ap->ops = ent->pinfo2->port_ops;
5408 ap->pio_mask = ent->pio_mask;
5409 ap->mwdma_mask = ent->mwdma_mask;
5410 ap->udma_mask = ent->udma_mask;
5411 ap->flags |= ent->port_flags;
5412 ap->ops = ent->port_ops;
5414 ap->hw_sata_spd_limit = UINT_MAX;
5415 ap->active_tag = ATA_TAG_POISON;
5416 ap->last_ctl = 0xFF;
5418 #if defined(ATA_VERBOSE_DEBUG)
5419 /* turn on all debugging levels */
5420 ap->msg_enable = 0x00FF;
5421 #elif defined(ATA_DEBUG)
5422 ap->msg_enable = ATA_MSG_DRV | ATA_MSG_INFO | ATA_MSG_CTL | ATA_MSG_WARN | ATA_MSG_ERR;
5424 ap->msg_enable = ATA_MSG_DRV | ATA_MSG_ERR | ATA_MSG_WARN;
5427 INIT_WORK(&ap->port_task, NULL, NULL);
5428 INIT_WORK(&ap->hotplug_task, ata_scsi_hotplug, ap);
5429 INIT_WORK(&ap->scsi_rescan_task, ata_scsi_dev_rescan, ap);
5430 INIT_LIST_HEAD(&ap->eh_done_q);
5431 init_waitqueue_head(&ap->eh_wait_q);
5433 /* set cable type */
5434 ap->cbl = ATA_CBL_NONE;
5435 if (ap->flags & ATA_FLAG_SATA)
5436 ap->cbl = ATA_CBL_SATA;
5438 for (i = 0; i < ATA_MAX_DEVICES; i++) {
5439 struct ata_device *dev = &ap->device[i];
5446 ap->stats.unhandled_irq = 1;
5447 ap->stats.idle_irq = 1;
5450 memcpy(&ap->ioaddr, &ent->port[port_no], sizeof(struct ata_ioports));
5454 * ata_port_init_shost - Initialize SCSI host associated with ATA port
5455 * @ap: ATA port to initialize SCSI host for
5456 * @shost: SCSI host associated with @ap
5458 * Initialize SCSI host @shost associated with ATA port @ap.
5461 * Inherited from caller.
5463 static void ata_port_init_shost(struct ata_port *ap, struct Scsi_Host *shost)
5465 ap->scsi_host = shost;
5467 shost->unique_id = ap->id;
5470 shost->max_channel = 1;
5471 shost->max_cmd_len = 12;
5475 * ata_port_add - Attach low-level ATA driver to system
5476 * @ent: Information provided by low-level driver
5477 * @host: Collections of ports to which we add
5478 * @port_no: Port number associated with this host
5480 * Attach low-level ATA driver to system.
5483 * PCI/etc. bus probe sem.
5486 * New ata_port on success, for NULL on error.
5488 static struct ata_port * ata_port_add(const struct ata_probe_ent *ent,
5489 struct ata_host *host,
5490 unsigned int port_no)
5492 struct Scsi_Host *shost;
5493 struct ata_port *ap;
5497 if (!ent->port_ops->error_handler &&
5498 !(ent->port_flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST))) {
5499 printk(KERN_ERR "ata%u: no reset mechanism available\n",
5504 shost = scsi_host_alloc(ent->sht, sizeof(struct ata_port));
5508 shost->transportt = &ata_scsi_transport_template;
5510 ap = ata_shost_to_port(shost);
5512 ata_port_init(ap, host, ent, port_no);
5513 ata_port_init_shost(ap, shost);
5519 * ata_sas_host_init - Initialize a host struct
5520 * @host: host to initialize
5521 * @dev: device host is attached to
5522 * @flags: host flags
5526 * PCI/etc. bus probe sem.
5530 void ata_host_init(struct ata_host *host, struct device *dev,
5531 unsigned long flags, const struct ata_port_operations *ops)
5533 spin_lock_init(&host->lock);
5535 host->flags = flags;
5540 * ata_device_add - Register hardware device with ATA and SCSI layers
5541 * @ent: Probe information describing hardware device to be registered
5543 * This function processes the information provided in the probe
5544 * information struct @ent, allocates the necessary ATA and SCSI
5545 * host information structures, initializes them, and registers
5546 * everything with requisite kernel subsystems.
5548 * This function requests irqs, probes the ATA bus, and probes
5552 * PCI/etc. bus probe sem.
5555 * Number of ports registered. Zero on error (no ports registered).
5557 int ata_device_add(const struct ata_probe_ent *ent)
5560 struct device *dev = ent->dev;
5561 struct ata_host *host;
5566 if (ent->irq == 0) {
5567 dev_printk(KERN_ERR, dev, "is not available: No interrupt assigned.\n");
5570 /* alloc a container for our list of ATA ports (buses) */
5571 host = kzalloc(sizeof(struct ata_host) +
5572 (ent->n_ports * sizeof(void *)), GFP_KERNEL);
5576 ata_host_init(host, dev, ent->_host_flags, ent->port_ops);
5577 host->n_ports = ent->n_ports;
5578 host->irq = ent->irq;
5579 host->irq2 = ent->irq2;
5580 host->mmio_base = ent->mmio_base;
5581 host->private_data = ent->private_data;
5583 /* register each port bound to this device */
5584 for (i = 0; i < host->n_ports; i++) {
5585 struct ata_port *ap;
5586 unsigned long xfer_mode_mask;
5587 int irq_line = ent->irq;
5589 ap = ata_port_add(ent, host, i);
5590 host->ports[i] = ap;
5595 if (ent->dummy_port_mask & (1 << i)) {
5596 ata_port_printk(ap, KERN_INFO, "DUMMY\n");
5597 ap->ops = &ata_dummy_port_ops;
5602 rc = ap->ops->port_start(ap);
5604 host->ports[i] = NULL;
5605 scsi_host_put(ap->scsi_host);
5609 /* Report the secondary IRQ for second channel legacy */
5610 if (i == 1 && ent->irq2)
5611 irq_line = ent->irq2;
5613 xfer_mode_mask =(ap->udma_mask << ATA_SHIFT_UDMA) |
5614 (ap->mwdma_mask << ATA_SHIFT_MWDMA) |
5615 (ap->pio_mask << ATA_SHIFT_PIO);
5617 /* print per-port info to dmesg */
5618 ata_port_printk(ap, KERN_INFO, "%cATA max %s cmd 0x%lX "
5619 "ctl 0x%lX bmdma 0x%lX irq %d\n",
5620 ap->flags & ATA_FLAG_SATA ? 'S' : 'P',
5621 ata_mode_string(xfer_mode_mask),
5622 ap->ioaddr.cmd_addr,
5623 ap->ioaddr.ctl_addr,
5624 ap->ioaddr.bmdma_addr,
5628 host->ops->irq_clear(ap);
5629 ata_eh_freeze_port(ap); /* freeze port before requesting IRQ */
5632 /* obtain irq, that may be shared between channels */
5633 rc = request_irq(ent->irq, ent->port_ops->irq_handler, ent->irq_flags,
5636 dev_printk(KERN_ERR, dev, "irq %lu request failed: %d\n",
5641 /* do we have a second IRQ for the other channel, eg legacy mode */
5643 /* We will get weird core code crashes later if this is true
5645 BUG_ON(ent->irq == ent->irq2);
5647 rc = request_irq(ent->irq2, ent->port_ops->irq_handler, ent->irq_flags,
5650 dev_printk(KERN_ERR, dev, "irq %lu request failed: %d\n",
5652 goto err_out_free_irq;
5656 /* perform each probe synchronously */
5657 DPRINTK("probe begin\n");
5658 for (i = 0; i < host->n_ports; i++) {
5659 struct ata_port *ap = host->ports[i];
5663 /* init sata_spd_limit to the current value */
5664 if (sata_scr_read(ap, SCR_CONTROL, &scontrol) == 0) {
5665 int spd = (scontrol >> 4) & 0xf;
5666 ap->hw_sata_spd_limit &= (1 << spd) - 1;
5668 ap->sata_spd_limit = ap->hw_sata_spd_limit;
5670 rc = scsi_add_host(ap->scsi_host, dev);
5672 ata_port_printk(ap, KERN_ERR, "scsi_add_host failed\n");
5673 /* FIXME: do something useful here */
5674 /* FIXME: handle unconditional calls to
5675 * scsi_scan_host and ata_host_remove, below,
5680 if (ap->ops->error_handler) {
5681 struct ata_eh_info *ehi = &ap->eh_info;
5682 unsigned long flags;
5686 /* kick EH for boot probing */
5687 spin_lock_irqsave(ap->lock, flags);
5689 ehi->probe_mask = (1 << ATA_MAX_DEVICES) - 1;
5690 ehi->action |= ATA_EH_SOFTRESET;
5691 ehi->flags |= ATA_EHI_NO_AUTOPSY | ATA_EHI_QUIET;
5693 ap->pflags |= ATA_PFLAG_LOADING;
5694 ata_port_schedule_eh(ap);
5696 spin_unlock_irqrestore(ap->lock, flags);
5698 /* wait for EH to finish */
5699 ata_port_wait_eh(ap);
5701 DPRINTK("ata%u: bus probe begin\n", ap->id);
5702 rc = ata_bus_probe(ap);
5703 DPRINTK("ata%u: bus probe end\n", ap->id);
5706 /* FIXME: do something useful here?
5707 * Current libata behavior will
5708 * tear down everything when
5709 * the module is removed
5710 * or the h/w is unplugged.
5716 /* probes are done, now scan each port's disk(s) */
5717 DPRINTK("host probe begin\n");
5718 for (i = 0; i < host->n_ports; i++) {
5719 struct ata_port *ap = host->ports[i];
5721 ata_scsi_scan_host(ap);
5724 dev_set_drvdata(dev, host);
5726 VPRINTK("EXIT, returning %u\n", ent->n_ports);
5727 return ent->n_ports; /* success */
5730 free_irq(ent->irq, host);
5732 for (i = 0; i < host->n_ports; i++) {
5733 struct ata_port *ap = host->ports[i];
5735 ap->ops->port_stop(ap);
5736 scsi_host_put(ap->scsi_host);
5741 VPRINTK("EXIT, returning 0\n");
5746 * ata_port_detach - Detach ATA port in prepration of device removal
5747 * @ap: ATA port to be detached
5749 * Detach all ATA devices and the associated SCSI devices of @ap;
5750 * then, remove the associated SCSI host. @ap is guaranteed to
5751 * be quiescent on return from this function.
5754 * Kernel thread context (may sleep).
5756 void ata_port_detach(struct ata_port *ap)
5758 unsigned long flags;
5761 if (!ap->ops->error_handler)
5764 /* tell EH we're leaving & flush EH */
5765 spin_lock_irqsave(ap->lock, flags);
5766 ap->pflags |= ATA_PFLAG_UNLOADING;
5767 spin_unlock_irqrestore(ap->lock, flags);
5769 ata_port_wait_eh(ap);
5771 /* EH is now guaranteed to see UNLOADING, so no new device
5772 * will be attached. Disable all existing devices.
5774 spin_lock_irqsave(ap->lock, flags);
5776 for (i = 0; i < ATA_MAX_DEVICES; i++)
5777 ata_dev_disable(&ap->device[i]);
5779 spin_unlock_irqrestore(ap->lock, flags);
5781 /* Final freeze & EH. All in-flight commands are aborted. EH
5782 * will be skipped and retrials will be terminated with bad
5785 spin_lock_irqsave(ap->lock, flags);
5786 ata_port_freeze(ap); /* won't be thawed */
5787 spin_unlock_irqrestore(ap->lock, flags);
5789 ata_port_wait_eh(ap);
5791 /* Flush hotplug task. The sequence is similar to
5792 * ata_port_flush_task().
5794 flush_workqueue(ata_aux_wq);
5795 cancel_delayed_work(&ap->hotplug_task);
5796 flush_workqueue(ata_aux_wq);
5799 /* remove the associated SCSI host */
5800 scsi_remove_host(ap->scsi_host);
5804 * ata_host_remove - PCI layer callback for device removal
5805 * @host: ATA host set that was removed
5807 * Unregister all objects associated with this host set. Free those
5811 * Inherited from calling layer (may sleep).
5814 void ata_host_remove(struct ata_host *host)
5818 for (i = 0; i < host->n_ports; i++)
5819 ata_port_detach(host->ports[i]);
5821 free_irq(host->irq, host);
5823 free_irq(host->irq2, host);
5825 for (i = 0; i < host->n_ports; i++) {
5826 struct ata_port *ap = host->ports[i];
5828 ata_scsi_release(ap->scsi_host);
5830 if ((ap->flags & ATA_FLAG_NO_LEGACY) == 0) {
5831 struct ata_ioports *ioaddr = &ap->ioaddr;
5833 /* FIXME: Add -ac IDE pci mods to remove these special cases */
5834 if (ioaddr->cmd_addr == ATA_PRIMARY_CMD)
5835 release_region(ATA_PRIMARY_CMD, 8);
5836 else if (ioaddr->cmd_addr == ATA_SECONDARY_CMD)
5837 release_region(ATA_SECONDARY_CMD, 8);
5840 scsi_host_put(ap->scsi_host);
5843 if (host->ops->host_stop)
5844 host->ops->host_stop(host);
5850 * ata_scsi_release - SCSI layer callback hook for host unload
5851 * @shost: libata host to be unloaded
5853 * Performs all duties necessary to shut down a libata port...
5854 * Kill port kthread, disable port, and release resources.
5857 * Inherited from SCSI layer.
5863 int ata_scsi_release(struct Scsi_Host *shost)
5865 struct ata_port *ap = ata_shost_to_port(shost);
5869 ap->ops->port_disable(ap);
5870 ap->ops->port_stop(ap);
5876 struct ata_probe_ent *
5877 ata_probe_ent_alloc(struct device *dev, const struct ata_port_info *port)
5879 struct ata_probe_ent *probe_ent;
5881 probe_ent = kzalloc(sizeof(*probe_ent), GFP_KERNEL);
5883 printk(KERN_ERR DRV_NAME "(%s): out of memory\n",
5884 kobject_name(&(dev->kobj)));
5888 INIT_LIST_HEAD(&probe_ent->node);
5889 probe_ent->dev = dev;
5891 probe_ent->sht = port->sht;
5892 probe_ent->port_flags = port->flags;
5893 probe_ent->pio_mask = port->pio_mask;
5894 probe_ent->mwdma_mask = port->mwdma_mask;
5895 probe_ent->udma_mask = port->udma_mask;
5896 probe_ent->port_ops = port->port_ops;
5897 probe_ent->private_data = port->private_data;
5903 * ata_std_ports - initialize ioaddr with standard port offsets.
5904 * @ioaddr: IO address structure to be initialized
5906 * Utility function which initializes data_addr, error_addr,
5907 * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
5908 * device_addr, status_addr, and command_addr to standard offsets
5909 * relative to cmd_addr.
5911 * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
5914 void ata_std_ports(struct ata_ioports *ioaddr)
5916 ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA;
5917 ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR;
5918 ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE;
5919 ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT;
5920 ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL;
5921 ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM;
5922 ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH;
5923 ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE;
5924 ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS;
5925 ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD;
5931 void ata_pci_host_stop (struct ata_host *host)
5933 struct pci_dev *pdev = to_pci_dev(host->dev);
5935 pci_iounmap(pdev, host->mmio_base);
5939 * ata_pci_remove_one - PCI layer callback for device removal
5940 * @pdev: PCI device that was removed
5942 * PCI layer indicates to libata via this hook that
5943 * hot-unplug or module unload event has occurred.
5944 * Handle this by unregistering all objects associated
5945 * with this PCI device. Free those objects. Then finally
5946 * release PCI resources and disable device.
5949 * Inherited from PCI layer (may sleep).
5952 void ata_pci_remove_one (struct pci_dev *pdev)
5954 struct device *dev = pci_dev_to_dev(pdev);
5955 struct ata_host *host = dev_get_drvdata(dev);
5957 ata_host_remove(host);
5959 pci_release_regions(pdev);
5960 pci_disable_device(pdev);
5961 dev_set_drvdata(dev, NULL);
5964 /* move to PCI subsystem */
5965 int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits)
5967 unsigned long tmp = 0;
5969 switch (bits->width) {
5972 pci_read_config_byte(pdev, bits->reg, &tmp8);
5978 pci_read_config_word(pdev, bits->reg, &tmp16);
5984 pci_read_config_dword(pdev, bits->reg, &tmp32);
5995 return (tmp == bits->val) ? 1 : 0;
5998 void ata_pci_device_do_suspend(struct pci_dev *pdev, pm_message_t mesg)
6000 pci_save_state(pdev);
6002 if (mesg.event == PM_EVENT_SUSPEND) {
6003 pci_disable_device(pdev);
6004 pci_set_power_state(pdev, PCI_D3hot);
6008 void ata_pci_device_do_resume(struct pci_dev *pdev)
6010 pci_set_power_state(pdev, PCI_D0);
6011 pci_restore_state(pdev);
6012 pci_enable_device(pdev);
6013 pci_set_master(pdev);
6016 int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg)
6018 struct ata_host *host = dev_get_drvdata(&pdev->dev);
6021 rc = ata_host_suspend(host, mesg);
6025 ata_pci_device_do_suspend(pdev, mesg);
6030 int ata_pci_device_resume(struct pci_dev *pdev)
6032 struct ata_host *host = dev_get_drvdata(&pdev->dev);
6034 ata_pci_device_do_resume(pdev);
6035 ata_host_resume(host);
6038 #endif /* CONFIG_PCI */
6041 static int __init ata_init(void)
6043 ata_probe_timeout *= HZ;
6044 ata_wq = create_workqueue("ata");
6048 ata_aux_wq = create_singlethread_workqueue("ata_aux");
6050 destroy_workqueue(ata_wq);
6054 printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n");
6058 static void __exit ata_exit(void)
6060 destroy_workqueue(ata_wq);
6061 destroy_workqueue(ata_aux_wq);
6064 subsys_initcall(ata_init);
6065 module_exit(ata_exit);
6067 static unsigned long ratelimit_time;
6068 static DEFINE_SPINLOCK(ata_ratelimit_lock);
6070 int ata_ratelimit(void)
6073 unsigned long flags;
6075 spin_lock_irqsave(&ata_ratelimit_lock, flags);
6077 if (time_after(jiffies, ratelimit_time)) {
6079 ratelimit_time = jiffies + (HZ/5);
6083 spin_unlock_irqrestore(&ata_ratelimit_lock, flags);
6089 * ata_wait_register - wait until register value changes
6090 * @reg: IO-mapped register
6091 * @mask: Mask to apply to read register value
6092 * @val: Wait condition
6093 * @interval_msec: polling interval in milliseconds
6094 * @timeout_msec: timeout in milliseconds
6096 * Waiting for some bits of register to change is a common
6097 * operation for ATA controllers. This function reads 32bit LE
6098 * IO-mapped register @reg and tests for the following condition.
6100 * (*@reg & mask) != val
6102 * If the condition is met, it returns; otherwise, the process is
6103 * repeated after @interval_msec until timeout.
6106 * Kernel thread context (may sleep)
6109 * The final register value.
6111 u32 ata_wait_register(void __iomem *reg, u32 mask, u32 val,
6112 unsigned long interval_msec,
6113 unsigned long timeout_msec)
6115 unsigned long timeout;
6118 tmp = ioread32(reg);
6120 /* Calculate timeout _after_ the first read to make sure
6121 * preceding writes reach the controller before starting to
6122 * eat away the timeout.
6124 timeout = jiffies + (timeout_msec * HZ) / 1000;
6126 while ((tmp & mask) == val && time_before(jiffies, timeout)) {
6127 msleep(interval_msec);
6128 tmp = ioread32(reg);
6137 static void ata_dummy_noret(struct ata_port *ap) { }
6138 static int ata_dummy_ret0(struct ata_port *ap) { return 0; }
6139 static void ata_dummy_qc_noret(struct ata_queued_cmd *qc) { }
6141 static u8 ata_dummy_check_status(struct ata_port *ap)
6146 static unsigned int ata_dummy_qc_issue(struct ata_queued_cmd *qc)
6148 return AC_ERR_SYSTEM;
6151 const struct ata_port_operations ata_dummy_port_ops = {
6152 .port_disable = ata_port_disable,
6153 .check_status = ata_dummy_check_status,
6154 .check_altstatus = ata_dummy_check_status,
6155 .dev_select = ata_noop_dev_select,
6156 .qc_prep = ata_noop_qc_prep,
6157 .qc_issue = ata_dummy_qc_issue,
6158 .freeze = ata_dummy_noret,
6159 .thaw = ata_dummy_noret,
6160 .error_handler = ata_dummy_noret,
6161 .post_internal_cmd = ata_dummy_qc_noret,
6162 .irq_clear = ata_dummy_noret,
6163 .port_start = ata_dummy_ret0,
6164 .port_stop = ata_dummy_noret,
6168 * libata is essentially a library of internal helper functions for
6169 * low-level ATA host controller drivers. As such, the API/ABI is
6170 * likely to change as new drivers are added and updated.
6171 * Do not depend on ABI/API stability.
6174 EXPORT_SYMBOL_GPL(sata_deb_timing_normal);
6175 EXPORT_SYMBOL_GPL(sata_deb_timing_hotplug);
6176 EXPORT_SYMBOL_GPL(sata_deb_timing_long);
6177 EXPORT_SYMBOL_GPL(ata_dummy_port_ops);
6178 EXPORT_SYMBOL_GPL(ata_std_bios_param);
6179 EXPORT_SYMBOL_GPL(ata_std_ports);
6180 EXPORT_SYMBOL_GPL(ata_host_init);
6181 EXPORT_SYMBOL_GPL(ata_device_add);
6182 EXPORT_SYMBOL_GPL(ata_port_detach);
6183 EXPORT_SYMBOL_GPL(ata_host_remove);
6184 EXPORT_SYMBOL_GPL(ata_sg_init);
6185 EXPORT_SYMBOL_GPL(ata_sg_init_one);
6186 EXPORT_SYMBOL_GPL(ata_hsm_move);
6187 EXPORT_SYMBOL_GPL(ata_qc_complete);
6188 EXPORT_SYMBOL_GPL(ata_qc_complete_multiple);
6189 EXPORT_SYMBOL_GPL(ata_qc_issue_prot);
6190 EXPORT_SYMBOL_GPL(ata_tf_load);
6191 EXPORT_SYMBOL_GPL(ata_tf_read);
6192 EXPORT_SYMBOL_GPL(ata_noop_dev_select);
6193 EXPORT_SYMBOL_GPL(ata_std_dev_select);
6194 EXPORT_SYMBOL_GPL(ata_tf_to_fis);
6195 EXPORT_SYMBOL_GPL(ata_tf_from_fis);
6196 EXPORT_SYMBOL_GPL(ata_check_status);
6197 EXPORT_SYMBOL_GPL(ata_altstatus);
6198 EXPORT_SYMBOL_GPL(ata_exec_command);
6199 EXPORT_SYMBOL_GPL(ata_port_start);
6200 EXPORT_SYMBOL_GPL(ata_port_stop);
6201 EXPORT_SYMBOL_GPL(ata_host_stop);
6202 EXPORT_SYMBOL_GPL(ata_interrupt);
6203 EXPORT_SYMBOL_GPL(ata_mmio_data_xfer);
6204 EXPORT_SYMBOL_GPL(ata_pio_data_xfer);
6205 EXPORT_SYMBOL_GPL(ata_pio_data_xfer_noirq);
6206 EXPORT_SYMBOL_GPL(ata_qc_prep);
6207 EXPORT_SYMBOL_GPL(ata_noop_qc_prep);
6208 EXPORT_SYMBOL_GPL(ata_bmdma_setup);
6209 EXPORT_SYMBOL_GPL(ata_bmdma_start);
6210 EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear);
6211 EXPORT_SYMBOL_GPL(ata_bmdma_status);
6212 EXPORT_SYMBOL_GPL(ata_bmdma_stop);
6213 EXPORT_SYMBOL_GPL(ata_bmdma_freeze);
6214 EXPORT_SYMBOL_GPL(ata_bmdma_thaw);
6215 EXPORT_SYMBOL_GPL(ata_bmdma_drive_eh);
6216 EXPORT_SYMBOL_GPL(ata_bmdma_error_handler);
6217 EXPORT_SYMBOL_GPL(ata_bmdma_post_internal_cmd);
6218 EXPORT_SYMBOL_GPL(ata_port_probe);
6219 EXPORT_SYMBOL_GPL(sata_set_spd);
6220 EXPORT_SYMBOL_GPL(sata_phy_debounce);
6221 EXPORT_SYMBOL_GPL(sata_phy_resume);
6222 EXPORT_SYMBOL_GPL(sata_phy_reset);
6223 EXPORT_SYMBOL_GPL(__sata_phy_reset);
6224 EXPORT_SYMBOL_GPL(ata_bus_reset);
6225 EXPORT_SYMBOL_GPL(ata_std_prereset);
6226 EXPORT_SYMBOL_GPL(ata_std_softreset);
6227 EXPORT_SYMBOL_GPL(sata_port_hardreset);
6228 EXPORT_SYMBOL_GPL(sata_std_hardreset);
6229 EXPORT_SYMBOL_GPL(ata_std_postreset);
6230 EXPORT_SYMBOL_GPL(ata_dev_classify);
6231 EXPORT_SYMBOL_GPL(ata_dev_pair);
6232 EXPORT_SYMBOL_GPL(ata_port_disable);
6233 EXPORT_SYMBOL_GPL(ata_ratelimit);
6234 EXPORT_SYMBOL_GPL(ata_wait_register);
6235 EXPORT_SYMBOL_GPL(ata_busy_sleep);
6236 EXPORT_SYMBOL_GPL(ata_port_queue_task);
6237 EXPORT_SYMBOL_GPL(ata_scsi_ioctl);
6238 EXPORT_SYMBOL_GPL(ata_scsi_queuecmd);
6239 EXPORT_SYMBOL_GPL(ata_scsi_slave_config);
6240 EXPORT_SYMBOL_GPL(ata_scsi_slave_destroy);
6241 EXPORT_SYMBOL_GPL(ata_scsi_change_queue_depth);
6242 EXPORT_SYMBOL_GPL(ata_scsi_release);
6243 EXPORT_SYMBOL_GPL(ata_host_intr);
6244 EXPORT_SYMBOL_GPL(sata_scr_valid);
6245 EXPORT_SYMBOL_GPL(sata_scr_read);
6246 EXPORT_SYMBOL_GPL(sata_scr_write);
6247 EXPORT_SYMBOL_GPL(sata_scr_write_flush);
6248 EXPORT_SYMBOL_GPL(ata_port_online);
6249 EXPORT_SYMBOL_GPL(ata_port_offline);
6250 EXPORT_SYMBOL_GPL(ata_host_suspend);
6251 EXPORT_SYMBOL_GPL(ata_host_resume);
6252 EXPORT_SYMBOL_GPL(ata_id_string);
6253 EXPORT_SYMBOL_GPL(ata_id_c_string);
6254 EXPORT_SYMBOL_GPL(ata_device_blacklisted);
6255 EXPORT_SYMBOL_GPL(ata_scsi_simulate);
6257 EXPORT_SYMBOL_GPL(ata_pio_need_iordy);
6258 EXPORT_SYMBOL_GPL(ata_timing_compute);
6259 EXPORT_SYMBOL_GPL(ata_timing_merge);
6262 EXPORT_SYMBOL_GPL(pci_test_config_bits);
6263 EXPORT_SYMBOL_GPL(ata_pci_host_stop);
6264 EXPORT_SYMBOL_GPL(ata_pci_init_native_mode);
6265 EXPORT_SYMBOL_GPL(ata_pci_init_one);
6266 EXPORT_SYMBOL_GPL(ata_pci_remove_one);
6267 EXPORT_SYMBOL_GPL(ata_pci_device_do_suspend);
6268 EXPORT_SYMBOL_GPL(ata_pci_device_do_resume);
6269 EXPORT_SYMBOL_GPL(ata_pci_device_suspend);
6270 EXPORT_SYMBOL_GPL(ata_pci_device_resume);
6271 EXPORT_SYMBOL_GPL(ata_pci_default_filter);
6272 EXPORT_SYMBOL_GPL(ata_pci_clear_simplex);
6273 #endif /* CONFIG_PCI */
6275 EXPORT_SYMBOL_GPL(ata_scsi_device_suspend);
6276 EXPORT_SYMBOL_GPL(ata_scsi_device_resume);
6278 EXPORT_SYMBOL_GPL(ata_eng_timeout);
6279 EXPORT_SYMBOL_GPL(ata_port_schedule_eh);
6280 EXPORT_SYMBOL_GPL(ata_port_abort);
6281 EXPORT_SYMBOL_GPL(ata_port_freeze);
6282 EXPORT_SYMBOL_GPL(ata_eh_freeze_port);
6283 EXPORT_SYMBOL_GPL(ata_eh_thaw_port);
6284 EXPORT_SYMBOL_GPL(ata_eh_qc_complete);
6285 EXPORT_SYMBOL_GPL(ata_eh_qc_retry);
6286 EXPORT_SYMBOL_GPL(ata_do_eh);