2 * libata-core.c - helper library for ATA
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
8 * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2004 Jeff Garzik
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
35 #include <linux/kernel.h>
36 #include <linux/module.h>
37 #include <linux/pci.h>
38 #include <linux/init.h>
39 #include <linux/list.h>
41 #include <linux/highmem.h>
42 #include <linux/spinlock.h>
43 #include <linux/blkdev.h>
44 #include <linux/delay.h>
45 #include <linux/timer.h>
46 #include <linux/interrupt.h>
47 #include <linux/completion.h>
48 #include <linux/suspend.h>
49 #include <linux/workqueue.h>
50 #include <linux/jiffies.h>
51 #include <linux/scatterlist.h>
52 #include <scsi/scsi.h>
53 #include <scsi/scsi_cmnd.h>
54 #include <scsi/scsi_host.h>
55 #include <linux/libata.h>
57 #include <asm/semaphore.h>
58 #include <asm/byteorder.h>
62 #define DRV_VERSION "2.20" /* must be exactly four chars */
65 /* debounce timing parameters in msecs { interval, duration, timeout } */
66 const unsigned long sata_deb_timing_normal[] = { 5, 100, 2000 };
67 const unsigned long sata_deb_timing_hotplug[] = { 25, 500, 2000 };
68 const unsigned long sata_deb_timing_long[] = { 100, 2000, 5000 };
70 static unsigned int ata_dev_init_params(struct ata_device *dev,
71 u16 heads, u16 sectors);
72 static unsigned int ata_dev_set_xfermode(struct ata_device *dev);
73 static void ata_dev_xfermask(struct ata_device *dev);
75 static unsigned int ata_print_id = 1;
76 static struct workqueue_struct *ata_wq;
78 struct workqueue_struct *ata_aux_wq;
80 int atapi_enabled = 1;
81 module_param(atapi_enabled, int, 0444);
82 MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)");
85 module_param(atapi_dmadir, int, 0444);
86 MODULE_PARM_DESC(atapi_dmadir, "Enable ATAPI DMADIR bridge support (0=off, 1=on)");
89 module_param_named(fua, libata_fua, int, 0444);
90 MODULE_PARM_DESC(fua, "FUA support (0=off, 1=on)");
92 static int ata_probe_timeout = ATA_TMOUT_INTERNAL / HZ;
93 module_param(ata_probe_timeout, int, 0444);
94 MODULE_PARM_DESC(ata_probe_timeout, "Set ATA probing timeout (seconds)");
96 int libata_noacpi = 1;
97 module_param_named(noacpi, libata_noacpi, int, 0444);
98 MODULE_PARM_DESC(noacpi, "Disables the use of ACPI in suspend/resume when set");
100 MODULE_AUTHOR("Jeff Garzik");
101 MODULE_DESCRIPTION("Library module for ATA devices");
102 MODULE_LICENSE("GPL");
103 MODULE_VERSION(DRV_VERSION);
107 * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure
108 * @tf: Taskfile to convert
109 * @fis: Buffer into which data will output
110 * @pmp: Port multiplier port
112 * Converts a standard ATA taskfile to a Serial ATA
113 * FIS structure (Register - Host to Device).
116 * Inherited from caller.
119 void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp)
121 fis[0] = 0x27; /* Register - Host to Device FIS */
122 fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number,
123 bit 7 indicates Command FIS */
124 fis[2] = tf->command;
125 fis[3] = tf->feature;
132 fis[8] = tf->hob_lbal;
133 fis[9] = tf->hob_lbam;
134 fis[10] = tf->hob_lbah;
135 fis[11] = tf->hob_feature;
138 fis[13] = tf->hob_nsect;
149 * ata_tf_from_fis - Convert SATA FIS to ATA taskfile
150 * @fis: Buffer from which data will be input
151 * @tf: Taskfile to output
153 * Converts a serial ATA FIS structure to a standard ATA taskfile.
156 * Inherited from caller.
159 void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf)
161 tf->command = fis[2]; /* status */
162 tf->feature = fis[3]; /* error */
169 tf->hob_lbal = fis[8];
170 tf->hob_lbam = fis[9];
171 tf->hob_lbah = fis[10];
174 tf->hob_nsect = fis[13];
177 static const u8 ata_rw_cmds[] = {
181 ATA_CMD_READ_MULTI_EXT,
182 ATA_CMD_WRITE_MULTI_EXT,
186 ATA_CMD_WRITE_MULTI_FUA_EXT,
190 ATA_CMD_PIO_READ_EXT,
191 ATA_CMD_PIO_WRITE_EXT,
204 ATA_CMD_WRITE_FUA_EXT
208 * ata_rwcmd_protocol - set taskfile r/w commands and protocol
209 * @tf: command to examine and configure
210 * @dev: device tf belongs to
212 * Examine the device configuration and tf->flags to calculate
213 * the proper read/write commands and protocol to use.
218 static int ata_rwcmd_protocol(struct ata_taskfile *tf, struct ata_device *dev)
222 int index, fua, lba48, write;
224 fua = (tf->flags & ATA_TFLAG_FUA) ? 4 : 0;
225 lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0;
226 write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0;
228 if (dev->flags & ATA_DFLAG_PIO) {
229 tf->protocol = ATA_PROT_PIO;
230 index = dev->multi_count ? 0 : 8;
231 } else if (lba48 && (dev->ap->flags & ATA_FLAG_PIO_LBA48)) {
232 /* Unable to use DMA due to host limitation */
233 tf->protocol = ATA_PROT_PIO;
234 index = dev->multi_count ? 0 : 8;
236 tf->protocol = ATA_PROT_DMA;
240 cmd = ata_rw_cmds[index + fua + lba48 + write];
249 * ata_tf_read_block - Read block address from ATA taskfile
250 * @tf: ATA taskfile of interest
251 * @dev: ATA device @tf belongs to
256 * Read block address from @tf. This function can handle all
257 * three address formats - LBA, LBA48 and CHS. tf->protocol and
258 * flags select the address format to use.
261 * Block address read from @tf.
263 u64 ata_tf_read_block(struct ata_taskfile *tf, struct ata_device *dev)
267 if (tf->flags & ATA_TFLAG_LBA) {
268 if (tf->flags & ATA_TFLAG_LBA48) {
269 block |= (u64)tf->hob_lbah << 40;
270 block |= (u64)tf->hob_lbam << 32;
271 block |= tf->hob_lbal << 24;
273 block |= (tf->device & 0xf) << 24;
275 block |= tf->lbah << 16;
276 block |= tf->lbam << 8;
281 cyl = tf->lbam | (tf->lbah << 8);
282 head = tf->device & 0xf;
285 block = (cyl * dev->heads + head) * dev->sectors + sect;
292 * ata_build_rw_tf - Build ATA taskfile for given read/write request
293 * @tf: Target ATA taskfile
294 * @dev: ATA device @tf belongs to
295 * @block: Block address
296 * @n_block: Number of blocks
297 * @tf_flags: RW/FUA etc...
303 * Build ATA taskfile @tf for read/write request described by
304 * @block, @n_block, @tf_flags and @tag on @dev.
308 * 0 on success, -ERANGE if the request is too large for @dev,
309 * -EINVAL if the request is invalid.
311 int ata_build_rw_tf(struct ata_taskfile *tf, struct ata_device *dev,
312 u64 block, u32 n_block, unsigned int tf_flags,
315 tf->flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
316 tf->flags |= tf_flags;
318 if (ata_ncq_enabled(dev) && likely(tag != ATA_TAG_INTERNAL)) {
320 if (!lba_48_ok(block, n_block))
323 tf->protocol = ATA_PROT_NCQ;
324 tf->flags |= ATA_TFLAG_LBA | ATA_TFLAG_LBA48;
326 if (tf->flags & ATA_TFLAG_WRITE)
327 tf->command = ATA_CMD_FPDMA_WRITE;
329 tf->command = ATA_CMD_FPDMA_READ;
331 tf->nsect = tag << 3;
332 tf->hob_feature = (n_block >> 8) & 0xff;
333 tf->feature = n_block & 0xff;
335 tf->hob_lbah = (block >> 40) & 0xff;
336 tf->hob_lbam = (block >> 32) & 0xff;
337 tf->hob_lbal = (block >> 24) & 0xff;
338 tf->lbah = (block >> 16) & 0xff;
339 tf->lbam = (block >> 8) & 0xff;
340 tf->lbal = block & 0xff;
343 if (tf->flags & ATA_TFLAG_FUA)
344 tf->device |= 1 << 7;
345 } else if (dev->flags & ATA_DFLAG_LBA) {
346 tf->flags |= ATA_TFLAG_LBA;
348 if (lba_28_ok(block, n_block)) {
350 tf->device |= (block >> 24) & 0xf;
351 } else if (lba_48_ok(block, n_block)) {
352 if (!(dev->flags & ATA_DFLAG_LBA48))
356 tf->flags |= ATA_TFLAG_LBA48;
358 tf->hob_nsect = (n_block >> 8) & 0xff;
360 tf->hob_lbah = (block >> 40) & 0xff;
361 tf->hob_lbam = (block >> 32) & 0xff;
362 tf->hob_lbal = (block >> 24) & 0xff;
364 /* request too large even for LBA48 */
367 if (unlikely(ata_rwcmd_protocol(tf, dev) < 0))
370 tf->nsect = n_block & 0xff;
372 tf->lbah = (block >> 16) & 0xff;
373 tf->lbam = (block >> 8) & 0xff;
374 tf->lbal = block & 0xff;
376 tf->device |= ATA_LBA;
379 u32 sect, head, cyl, track;
381 /* The request -may- be too large for CHS addressing. */
382 if (!lba_28_ok(block, n_block))
385 if (unlikely(ata_rwcmd_protocol(tf, dev) < 0))
388 /* Convert LBA to CHS */
389 track = (u32)block / dev->sectors;
390 cyl = track / dev->heads;
391 head = track % dev->heads;
392 sect = (u32)block % dev->sectors + 1;
394 DPRINTK("block %u track %u cyl %u head %u sect %u\n",
395 (u32)block, track, cyl, head, sect);
397 /* Check whether the converted CHS can fit.
401 if ((cyl >> 16) || (head >> 4) || (sect >> 8) || (!sect))
404 tf->nsect = n_block & 0xff; /* Sector count 0 means 256 sectors */
415 * ata_pack_xfermask - Pack pio, mwdma and udma masks into xfer_mask
416 * @pio_mask: pio_mask
417 * @mwdma_mask: mwdma_mask
418 * @udma_mask: udma_mask
420 * Pack @pio_mask, @mwdma_mask and @udma_mask into a single
421 * unsigned int xfer_mask.
429 static unsigned int ata_pack_xfermask(unsigned int pio_mask,
430 unsigned int mwdma_mask,
431 unsigned int udma_mask)
433 return ((pio_mask << ATA_SHIFT_PIO) & ATA_MASK_PIO) |
434 ((mwdma_mask << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA) |
435 ((udma_mask << ATA_SHIFT_UDMA) & ATA_MASK_UDMA);
439 * ata_unpack_xfermask - Unpack xfer_mask into pio, mwdma and udma masks
440 * @xfer_mask: xfer_mask to unpack
441 * @pio_mask: resulting pio_mask
442 * @mwdma_mask: resulting mwdma_mask
443 * @udma_mask: resulting udma_mask
445 * Unpack @xfer_mask into @pio_mask, @mwdma_mask and @udma_mask.
446 * Any NULL distination masks will be ignored.
448 static void ata_unpack_xfermask(unsigned int xfer_mask,
449 unsigned int *pio_mask,
450 unsigned int *mwdma_mask,
451 unsigned int *udma_mask)
454 *pio_mask = (xfer_mask & ATA_MASK_PIO) >> ATA_SHIFT_PIO;
456 *mwdma_mask = (xfer_mask & ATA_MASK_MWDMA) >> ATA_SHIFT_MWDMA;
458 *udma_mask = (xfer_mask & ATA_MASK_UDMA) >> ATA_SHIFT_UDMA;
461 static const struct ata_xfer_ent {
465 { ATA_SHIFT_PIO, ATA_BITS_PIO, XFER_PIO_0 },
466 { ATA_SHIFT_MWDMA, ATA_BITS_MWDMA, XFER_MW_DMA_0 },
467 { ATA_SHIFT_UDMA, ATA_BITS_UDMA, XFER_UDMA_0 },
472 * ata_xfer_mask2mode - Find matching XFER_* for the given xfer_mask
473 * @xfer_mask: xfer_mask of interest
475 * Return matching XFER_* value for @xfer_mask. Only the highest
476 * bit of @xfer_mask is considered.
482 * Matching XFER_* value, 0 if no match found.
484 static u8 ata_xfer_mask2mode(unsigned int xfer_mask)
486 int highbit = fls(xfer_mask) - 1;
487 const struct ata_xfer_ent *ent;
489 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
490 if (highbit >= ent->shift && highbit < ent->shift + ent->bits)
491 return ent->base + highbit - ent->shift;
496 * ata_xfer_mode2mask - Find matching xfer_mask for XFER_*
497 * @xfer_mode: XFER_* of interest
499 * Return matching xfer_mask for @xfer_mode.
505 * Matching xfer_mask, 0 if no match found.
507 static unsigned int ata_xfer_mode2mask(u8 xfer_mode)
509 const struct ata_xfer_ent *ent;
511 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
512 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
513 return 1 << (ent->shift + xfer_mode - ent->base);
518 * ata_xfer_mode2shift - Find matching xfer_shift for XFER_*
519 * @xfer_mode: XFER_* of interest
521 * Return matching xfer_shift for @xfer_mode.
527 * Matching xfer_shift, -1 if no match found.
529 static int ata_xfer_mode2shift(unsigned int xfer_mode)
531 const struct ata_xfer_ent *ent;
533 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
534 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
540 * ata_mode_string - convert xfer_mask to string
541 * @xfer_mask: mask of bits supported; only highest bit counts.
543 * Determine string which represents the highest speed
544 * (highest bit in @modemask).
550 * Constant C string representing highest speed listed in
551 * @mode_mask, or the constant C string "<n/a>".
553 static const char *ata_mode_string(unsigned int xfer_mask)
555 static const char * const xfer_mode_str[] = {
579 highbit = fls(xfer_mask) - 1;
580 if (highbit >= 0 && highbit < ARRAY_SIZE(xfer_mode_str))
581 return xfer_mode_str[highbit];
585 static const char *sata_spd_string(unsigned int spd)
587 static const char * const spd_str[] = {
592 if (spd == 0 || (spd - 1) >= ARRAY_SIZE(spd_str))
594 return spd_str[spd - 1];
597 void ata_dev_disable(struct ata_device *dev)
599 if (ata_dev_enabled(dev) && ata_msg_drv(dev->ap)) {
600 ata_dev_printk(dev, KERN_WARNING, "disabled\n");
601 ata_down_xfermask_limit(dev, ATA_DNXFER_FORCE_PIO0 |
608 * ata_devchk - PATA device presence detection
609 * @ap: ATA channel to examine
610 * @device: Device to examine (starting at zero)
612 * This technique was originally described in
613 * Hale Landis's ATADRVR (www.ata-atapi.com), and
614 * later found its way into the ATA/ATAPI spec.
616 * Write a pattern to the ATA shadow registers,
617 * and if a device is present, it will respond by
618 * correctly storing and echoing back the
619 * ATA shadow register contents.
625 static unsigned int ata_devchk(struct ata_port *ap, unsigned int device)
627 struct ata_ioports *ioaddr = &ap->ioaddr;
630 ap->ops->dev_select(ap, device);
632 iowrite8(0x55, ioaddr->nsect_addr);
633 iowrite8(0xaa, ioaddr->lbal_addr);
635 iowrite8(0xaa, ioaddr->nsect_addr);
636 iowrite8(0x55, ioaddr->lbal_addr);
638 iowrite8(0x55, ioaddr->nsect_addr);
639 iowrite8(0xaa, ioaddr->lbal_addr);
641 nsect = ioread8(ioaddr->nsect_addr);
642 lbal = ioread8(ioaddr->lbal_addr);
644 if ((nsect == 0x55) && (lbal == 0xaa))
645 return 1; /* we found a device */
647 return 0; /* nothing found */
651 * ata_dev_classify - determine device type based on ATA-spec signature
652 * @tf: ATA taskfile register set for device to be identified
654 * Determine from taskfile register contents whether a device is
655 * ATA or ATAPI, as per "Signature and persistence" section
656 * of ATA/PI spec (volume 1, sect 5.14).
662 * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, or %ATA_DEV_UNKNOWN
663 * the event of failure.
666 unsigned int ata_dev_classify(const struct ata_taskfile *tf)
668 /* Apple's open source Darwin code hints that some devices only
669 * put a proper signature into the LBA mid/high registers,
670 * So, we only check those. It's sufficient for uniqueness.
673 if (((tf->lbam == 0) && (tf->lbah == 0)) ||
674 ((tf->lbam == 0x3c) && (tf->lbah == 0xc3))) {
675 DPRINTK("found ATA device by sig\n");
679 if (((tf->lbam == 0x14) && (tf->lbah == 0xeb)) ||
680 ((tf->lbam == 0x69) && (tf->lbah == 0x96))) {
681 DPRINTK("found ATAPI device by sig\n");
682 return ATA_DEV_ATAPI;
685 DPRINTK("unknown device\n");
686 return ATA_DEV_UNKNOWN;
690 * ata_dev_try_classify - Parse returned ATA device signature
691 * @ap: ATA channel to examine
692 * @device: Device to examine (starting at zero)
693 * @r_err: Value of error register on completion
695 * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
696 * an ATA/ATAPI-defined set of values is placed in the ATA
697 * shadow registers, indicating the results of device detection
700 * Select the ATA device, and read the values from the ATA shadow
701 * registers. Then parse according to the Error register value,
702 * and the spec-defined values examined by ata_dev_classify().
708 * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE.
712 ata_dev_try_classify(struct ata_port *ap, unsigned int device, u8 *r_err)
714 struct ata_taskfile tf;
718 ap->ops->dev_select(ap, device);
720 memset(&tf, 0, sizeof(tf));
722 ap->ops->tf_read(ap, &tf);
727 /* see if device passed diags: if master then continue and warn later */
728 if (err == 0 && device == 0)
729 /* diagnostic fail : do nothing _YET_ */
730 ap->device[device].horkage |= ATA_HORKAGE_DIAGNOSTIC;
733 else if ((device == 0) && (err == 0x81))
738 /* determine if device is ATA or ATAPI */
739 class = ata_dev_classify(&tf);
741 if (class == ATA_DEV_UNKNOWN)
743 if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0))
749 * ata_id_string - Convert IDENTIFY DEVICE page into string
750 * @id: IDENTIFY DEVICE results we will examine
751 * @s: string into which data is output
752 * @ofs: offset into identify device page
753 * @len: length of string to return. must be an even number.
755 * The strings in the IDENTIFY DEVICE page are broken up into
756 * 16-bit chunks. Run through the string, and output each
757 * 8-bit chunk linearly, regardless of platform.
763 void ata_id_string(const u16 *id, unsigned char *s,
764 unsigned int ofs, unsigned int len)
783 * ata_id_c_string - Convert IDENTIFY DEVICE page into C string
784 * @id: IDENTIFY DEVICE results we will examine
785 * @s: string into which data is output
786 * @ofs: offset into identify device page
787 * @len: length of string to return. must be an odd number.
789 * This function is identical to ata_id_string except that it
790 * trims trailing spaces and terminates the resulting string with
791 * null. @len must be actual maximum length (even number) + 1.
796 void ata_id_c_string(const u16 *id, unsigned char *s,
797 unsigned int ofs, unsigned int len)
803 ata_id_string(id, s, ofs, len - 1);
805 p = s + strnlen(s, len - 1);
806 while (p > s && p[-1] == ' ')
811 static u64 ata_id_n_sectors(const u16 *id)
813 if (ata_id_has_lba(id)) {
814 if (ata_id_has_lba48(id))
815 return ata_id_u64(id, 100);
817 return ata_id_u32(id, 60);
819 if (ata_id_current_chs_valid(id))
820 return ata_id_u32(id, 57);
822 return id[1] * id[3] * id[6];
827 * ata_id_to_dma_mode - Identify DMA mode from id block
828 * @dev: device to identify
829 * @unknown: mode to assume if we cannot tell
831 * Set up the timing values for the device based upon the identify
832 * reported values for the DMA mode. This function is used by drivers
833 * which rely upon firmware configured modes, but wish to report the
834 * mode correctly when possible.
836 * In addition we emit similarly formatted messages to the default
837 * ata_dev_set_mode handler, in order to provide consistency of
841 void ata_id_to_dma_mode(struct ata_device *dev, u8 unknown)
846 /* Pack the DMA modes */
847 mask = ((dev->id[63] >> 8) << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA;
848 if (dev->id[53] & 0x04)
849 mask |= ((dev->id[88] >> 8) << ATA_SHIFT_UDMA) & ATA_MASK_UDMA;
851 /* Select the mode in use */
852 mode = ata_xfer_mask2mode(mask);
855 ata_dev_printk(dev, KERN_INFO, "configured for %s\n",
856 ata_mode_string(mask));
858 /* SWDMA perhaps ? */
860 ata_dev_printk(dev, KERN_INFO, "configured for DMA\n");
863 /* Configure the device reporting */
864 dev->xfer_mode = mode;
865 dev->xfer_shift = ata_xfer_mode2shift(mode);
869 * ata_noop_dev_select - Select device 0/1 on ATA bus
870 * @ap: ATA channel to manipulate
871 * @device: ATA device (numbered from zero) to select
873 * This function performs no actual function.
875 * May be used as the dev_select() entry in ata_port_operations.
880 void ata_noop_dev_select (struct ata_port *ap, unsigned int device)
886 * ata_std_dev_select - Select device 0/1 on ATA bus
887 * @ap: ATA channel to manipulate
888 * @device: ATA device (numbered from zero) to select
890 * Use the method defined in the ATA specification to
891 * make either device 0, or device 1, active on the
892 * ATA channel. Works with both PIO and MMIO.
894 * May be used as the dev_select() entry in ata_port_operations.
900 void ata_std_dev_select (struct ata_port *ap, unsigned int device)
905 tmp = ATA_DEVICE_OBS;
907 tmp = ATA_DEVICE_OBS | ATA_DEV1;
909 iowrite8(tmp, ap->ioaddr.device_addr);
910 ata_pause(ap); /* needed; also flushes, for mmio */
914 * ata_dev_select - Select device 0/1 on ATA bus
915 * @ap: ATA channel to manipulate
916 * @device: ATA device (numbered from zero) to select
917 * @wait: non-zero to wait for Status register BSY bit to clear
918 * @can_sleep: non-zero if context allows sleeping
920 * Use the method defined in the ATA specification to
921 * make either device 0, or device 1, active on the
924 * This is a high-level version of ata_std_dev_select(),
925 * which additionally provides the services of inserting
926 * the proper pauses and status polling, where needed.
932 void ata_dev_select(struct ata_port *ap, unsigned int device,
933 unsigned int wait, unsigned int can_sleep)
935 if (ata_msg_probe(ap))
936 ata_port_printk(ap, KERN_INFO, "ata_dev_select: ENTER, "
937 "device %u, wait %u\n", device, wait);
942 ap->ops->dev_select(ap, device);
945 if (can_sleep && ap->device[device].class == ATA_DEV_ATAPI)
952 * ata_dump_id - IDENTIFY DEVICE info debugging output
953 * @id: IDENTIFY DEVICE page to dump
955 * Dump selected 16-bit words from the given IDENTIFY DEVICE
962 static inline void ata_dump_id(const u16 *id)
964 DPRINTK("49==0x%04x "
974 DPRINTK("80==0x%04x "
984 DPRINTK("88==0x%04x "
991 * ata_id_xfermask - Compute xfermask from the given IDENTIFY data
992 * @id: IDENTIFY data to compute xfer mask from
994 * Compute the xfermask for this device. This is not as trivial
995 * as it seems if we must consider early devices correctly.
997 * FIXME: pre IDE drive timing (do we care ?).
1005 static unsigned int ata_id_xfermask(const u16 *id)
1007 unsigned int pio_mask, mwdma_mask, udma_mask;
1009 /* Usual case. Word 53 indicates word 64 is valid */
1010 if (id[ATA_ID_FIELD_VALID] & (1 << 1)) {
1011 pio_mask = id[ATA_ID_PIO_MODES] & 0x03;
1015 /* If word 64 isn't valid then Word 51 high byte holds
1016 * the PIO timing number for the maximum. Turn it into
1019 u8 mode = (id[ATA_ID_OLD_PIO_MODES] >> 8) & 0xFF;
1020 if (mode < 5) /* Valid PIO range */
1021 pio_mask = (2 << mode) - 1;
1025 /* But wait.. there's more. Design your standards by
1026 * committee and you too can get a free iordy field to
1027 * process. However its the speeds not the modes that
1028 * are supported... Note drivers using the timing API
1029 * will get this right anyway
1033 mwdma_mask = id[ATA_ID_MWDMA_MODES] & 0x07;
1035 if (ata_id_is_cfa(id)) {
1037 * Process compact flash extended modes
1039 int pio = id[163] & 0x7;
1040 int dma = (id[163] >> 3) & 7;
1043 pio_mask |= (1 << 5);
1045 pio_mask |= (1 << 6);
1047 mwdma_mask |= (1 << 3);
1049 mwdma_mask |= (1 << 4);
1053 if (id[ATA_ID_FIELD_VALID] & (1 << 2))
1054 udma_mask = id[ATA_ID_UDMA_MODES] & 0xff;
1056 return ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask);
1060 * ata_port_queue_task - Queue port_task
1061 * @ap: The ata_port to queue port_task for
1062 * @fn: workqueue function to be scheduled
1063 * @data: data for @fn to use
1064 * @delay: delay time for workqueue function
1066 * Schedule @fn(@data) for execution after @delay jiffies using
1067 * port_task. There is one port_task per port and it's the
1068 * user(low level driver)'s responsibility to make sure that only
1069 * one task is active at any given time.
1071 * libata core layer takes care of synchronization between
1072 * port_task and EH. ata_port_queue_task() may be ignored for EH
1076 * Inherited from caller.
1078 void ata_port_queue_task(struct ata_port *ap, work_func_t fn, void *data,
1079 unsigned long delay)
1083 if (ap->pflags & ATA_PFLAG_FLUSH_PORT_TASK)
1086 PREPARE_DELAYED_WORK(&ap->port_task, fn);
1087 ap->port_task_data = data;
1089 rc = queue_delayed_work(ata_wq, &ap->port_task, delay);
1091 /* rc == 0 means that another user is using port task */
1096 * ata_port_flush_task - Flush port_task
1097 * @ap: The ata_port to flush port_task for
1099 * After this function completes, port_task is guranteed not to
1100 * be running or scheduled.
1103 * Kernel thread context (may sleep)
1105 void ata_port_flush_task(struct ata_port *ap)
1107 unsigned long flags;
1111 spin_lock_irqsave(ap->lock, flags);
1112 ap->pflags |= ATA_PFLAG_FLUSH_PORT_TASK;
1113 spin_unlock_irqrestore(ap->lock, flags);
1115 DPRINTK("flush #1\n");
1116 flush_workqueue(ata_wq);
1119 * At this point, if a task is running, it's guaranteed to see
1120 * the FLUSH flag; thus, it will never queue pio tasks again.
1123 if (!cancel_delayed_work(&ap->port_task)) {
1124 if (ata_msg_ctl(ap))
1125 ata_port_printk(ap, KERN_DEBUG, "%s: flush #2\n",
1127 flush_workqueue(ata_wq);
1130 spin_lock_irqsave(ap->lock, flags);
1131 ap->pflags &= ~ATA_PFLAG_FLUSH_PORT_TASK;
1132 spin_unlock_irqrestore(ap->lock, flags);
1134 if (ata_msg_ctl(ap))
1135 ata_port_printk(ap, KERN_DEBUG, "%s: EXIT\n", __FUNCTION__);
1138 static void ata_qc_complete_internal(struct ata_queued_cmd *qc)
1140 struct completion *waiting = qc->private_data;
1146 * ata_exec_internal_sg - execute libata internal command
1147 * @dev: Device to which the command is sent
1148 * @tf: Taskfile registers for the command and the result
1149 * @cdb: CDB for packet command
1150 * @dma_dir: Data tranfer direction of the command
1151 * @sg: sg list for the data buffer of the command
1152 * @n_elem: Number of sg entries
1154 * Executes libata internal command with timeout. @tf contains
1155 * command on entry and result on return. Timeout and error
1156 * conditions are reported via return value. No recovery action
1157 * is taken after a command times out. It's caller's duty to
1158 * clean up after timeout.
1161 * None. Should be called with kernel context, might sleep.
1164 * Zero on success, AC_ERR_* mask on failure
1166 unsigned ata_exec_internal_sg(struct ata_device *dev,
1167 struct ata_taskfile *tf, const u8 *cdb,
1168 int dma_dir, struct scatterlist *sg,
1169 unsigned int n_elem)
1171 struct ata_port *ap = dev->ap;
1172 u8 command = tf->command;
1173 struct ata_queued_cmd *qc;
1174 unsigned int tag, preempted_tag;
1175 u32 preempted_sactive, preempted_qc_active;
1176 DECLARE_COMPLETION_ONSTACK(wait);
1177 unsigned long flags;
1178 unsigned int err_mask;
1181 spin_lock_irqsave(ap->lock, flags);
1183 /* no internal command while frozen */
1184 if (ap->pflags & ATA_PFLAG_FROZEN) {
1185 spin_unlock_irqrestore(ap->lock, flags);
1186 return AC_ERR_SYSTEM;
1189 /* initialize internal qc */
1191 /* XXX: Tag 0 is used for drivers with legacy EH as some
1192 * drivers choke if any other tag is given. This breaks
1193 * ata_tag_internal() test for those drivers. Don't use new
1194 * EH stuff without converting to it.
1196 if (ap->ops->error_handler)
1197 tag = ATA_TAG_INTERNAL;
1201 if (test_and_set_bit(tag, &ap->qc_allocated))
1203 qc = __ata_qc_from_tag(ap, tag);
1211 preempted_tag = ap->active_tag;
1212 preempted_sactive = ap->sactive;
1213 preempted_qc_active = ap->qc_active;
1214 ap->active_tag = ATA_TAG_POISON;
1218 /* prepare & issue qc */
1221 memcpy(qc->cdb, cdb, ATAPI_CDB_LEN);
1222 qc->flags |= ATA_QCFLAG_RESULT_TF;
1223 qc->dma_dir = dma_dir;
1224 if (dma_dir != DMA_NONE) {
1225 unsigned int i, buflen = 0;
1227 for (i = 0; i < n_elem; i++)
1228 buflen += sg[i].length;
1230 ata_sg_init(qc, sg, n_elem);
1231 qc->nbytes = buflen;
1234 qc->private_data = &wait;
1235 qc->complete_fn = ata_qc_complete_internal;
1239 spin_unlock_irqrestore(ap->lock, flags);
1241 rc = wait_for_completion_timeout(&wait, ata_probe_timeout);
1243 ata_port_flush_task(ap);
1246 spin_lock_irqsave(ap->lock, flags);
1248 /* We're racing with irq here. If we lose, the
1249 * following test prevents us from completing the qc
1250 * twice. If we win, the port is frozen and will be
1251 * cleaned up by ->post_internal_cmd().
1253 if (qc->flags & ATA_QCFLAG_ACTIVE) {
1254 qc->err_mask |= AC_ERR_TIMEOUT;
1256 if (ap->ops->error_handler)
1257 ata_port_freeze(ap);
1259 ata_qc_complete(qc);
1261 if (ata_msg_warn(ap))
1262 ata_dev_printk(dev, KERN_WARNING,
1263 "qc timeout (cmd 0x%x)\n", command);
1266 spin_unlock_irqrestore(ap->lock, flags);
1269 /* do post_internal_cmd */
1270 if (ap->ops->post_internal_cmd)
1271 ap->ops->post_internal_cmd(qc);
1273 if ((qc->flags & ATA_QCFLAG_FAILED) && !qc->err_mask) {
1274 if (ata_msg_warn(ap))
1275 ata_dev_printk(dev, KERN_WARNING,
1276 "zero err_mask for failed "
1277 "internal command, assuming AC_ERR_OTHER\n");
1278 qc->err_mask |= AC_ERR_OTHER;
1282 spin_lock_irqsave(ap->lock, flags);
1284 *tf = qc->result_tf;
1285 err_mask = qc->err_mask;
1288 ap->active_tag = preempted_tag;
1289 ap->sactive = preempted_sactive;
1290 ap->qc_active = preempted_qc_active;
1292 /* XXX - Some LLDDs (sata_mv) disable port on command failure.
1293 * Until those drivers are fixed, we detect the condition
1294 * here, fail the command with AC_ERR_SYSTEM and reenable the
1297 * Note that this doesn't change any behavior as internal
1298 * command failure results in disabling the device in the
1299 * higher layer for LLDDs without new reset/EH callbacks.
1301 * Kill the following code as soon as those drivers are fixed.
1303 if (ap->flags & ATA_FLAG_DISABLED) {
1304 err_mask |= AC_ERR_SYSTEM;
1308 spin_unlock_irqrestore(ap->lock, flags);
1314 * ata_exec_internal - execute libata internal command
1315 * @dev: Device to which the command is sent
1316 * @tf: Taskfile registers for the command and the result
1317 * @cdb: CDB for packet command
1318 * @dma_dir: Data tranfer direction of the command
1319 * @buf: Data buffer of the command
1320 * @buflen: Length of data buffer
1322 * Wrapper around ata_exec_internal_sg() which takes simple
1323 * buffer instead of sg list.
1326 * None. Should be called with kernel context, might sleep.
1329 * Zero on success, AC_ERR_* mask on failure
1331 unsigned ata_exec_internal(struct ata_device *dev,
1332 struct ata_taskfile *tf, const u8 *cdb,
1333 int dma_dir, void *buf, unsigned int buflen)
1335 struct scatterlist *psg = NULL, sg;
1336 unsigned int n_elem = 0;
1338 if (dma_dir != DMA_NONE) {
1340 sg_init_one(&sg, buf, buflen);
1345 return ata_exec_internal_sg(dev, tf, cdb, dma_dir, psg, n_elem);
1349 * ata_do_simple_cmd - execute simple internal command
1350 * @dev: Device to which the command is sent
1351 * @cmd: Opcode to execute
1353 * Execute a 'simple' command, that only consists of the opcode
1354 * 'cmd' itself, without filling any other registers
1357 * Kernel thread context (may sleep).
1360 * Zero on success, AC_ERR_* mask on failure
1362 unsigned int ata_do_simple_cmd(struct ata_device *dev, u8 cmd)
1364 struct ata_taskfile tf;
1366 ata_tf_init(dev, &tf);
1369 tf.flags |= ATA_TFLAG_DEVICE;
1370 tf.protocol = ATA_PROT_NODATA;
1372 return ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
1376 * ata_pio_need_iordy - check if iordy needed
1379 * Check if the current speed of the device requires IORDY. Used
1380 * by various controllers for chip configuration.
1383 unsigned int ata_pio_need_iordy(const struct ata_device *adev)
1386 int speed = adev->pio_mode - XFER_PIO_0;
1393 /* If we have no drive specific rule, then PIO 2 is non IORDY */
1395 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE */
1396 pio = adev->id[ATA_ID_EIDE_PIO];
1397 /* Is the speed faster than the drive allows non IORDY ? */
1399 /* This is cycle times not frequency - watch the logic! */
1400 if (pio > 240) /* PIO2 is 240nS per cycle */
1409 * ata_dev_read_id - Read ID data from the specified device
1410 * @dev: target device
1411 * @p_class: pointer to class of the target device (may be changed)
1412 * @flags: ATA_READID_* flags
1413 * @id: buffer to read IDENTIFY data into
1415 * Read ID data from the specified device. ATA_CMD_ID_ATA is
1416 * performed on ATA devices and ATA_CMD_ID_ATAPI on ATAPI
1417 * devices. This function also issues ATA_CMD_INIT_DEV_PARAMS
1418 * for pre-ATA4 drives.
1421 * Kernel thread context (may sleep)
1424 * 0 on success, -errno otherwise.
1426 int ata_dev_read_id(struct ata_device *dev, unsigned int *p_class,
1427 unsigned int flags, u16 *id)
1429 struct ata_port *ap = dev->ap;
1430 unsigned int class = *p_class;
1431 struct ata_taskfile tf;
1432 unsigned int err_mask = 0;
1436 if (ata_msg_ctl(ap))
1437 ata_dev_printk(dev, KERN_DEBUG, "%s: ENTER\n", __FUNCTION__);
1439 ata_dev_select(ap, dev->devno, 1, 1); /* select device 0/1 */
1442 ata_tf_init(dev, &tf);
1446 tf.command = ATA_CMD_ID_ATA;
1449 tf.command = ATA_CMD_ID_ATAPI;
1453 reason = "unsupported class";
1457 tf.protocol = ATA_PROT_PIO;
1459 /* Some devices choke if TF registers contain garbage. Make
1460 * sure those are properly initialized.
1462 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
1464 /* Device presence detection is unreliable on some
1465 * controllers. Always poll IDENTIFY if available.
1467 tf.flags |= ATA_TFLAG_POLLING;
1469 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_FROM_DEVICE,
1470 id, sizeof(id[0]) * ATA_ID_WORDS);
1472 if (err_mask & AC_ERR_NODEV_HINT) {
1473 DPRINTK("ata%u.%d: NODEV after polling detection\n",
1474 ap->print_id, dev->devno);
1479 reason = "I/O error";
1483 swap_buf_le16(id, ATA_ID_WORDS);
1487 reason = "device reports illegal type";
1489 if (class == ATA_DEV_ATA) {
1490 if (!ata_id_is_ata(id) && !ata_id_is_cfa(id))
1493 if (ata_id_is_ata(id))
1497 if ((flags & ATA_READID_POSTRESET) && class == ATA_DEV_ATA) {
1499 * The exact sequence expected by certain pre-ATA4 drives is:
1502 * INITIALIZE DEVICE PARAMETERS
1504 * Some drives were very specific about that exact sequence.
1506 if (ata_id_major_version(id) < 4 || !ata_id_has_lba(id)) {
1507 err_mask = ata_dev_init_params(dev, id[3], id[6]);
1510 reason = "INIT_DEV_PARAMS failed";
1514 /* current CHS translation info (id[53-58]) might be
1515 * changed. reread the identify device info.
1517 flags &= ~ATA_READID_POSTRESET;
1527 if (ata_msg_warn(ap))
1528 ata_dev_printk(dev, KERN_WARNING, "failed to IDENTIFY "
1529 "(%s, err_mask=0x%x)\n", reason, err_mask);
1533 static inline u8 ata_dev_knobble(struct ata_device *dev)
1535 return ((dev->ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(dev->id)));
1538 static void ata_dev_config_ncq(struct ata_device *dev,
1539 char *desc, size_t desc_sz)
1541 struct ata_port *ap = dev->ap;
1542 int hdepth = 0, ddepth = ata_id_queue_depth(dev->id);
1544 if (!ata_id_has_ncq(dev->id)) {
1548 if (ata_device_blacklisted(dev) & ATA_HORKAGE_NONCQ) {
1549 snprintf(desc, desc_sz, "NCQ (not used)");
1552 if (ap->flags & ATA_FLAG_NCQ) {
1553 hdepth = min(ap->scsi_host->can_queue, ATA_MAX_QUEUE - 1);
1554 dev->flags |= ATA_DFLAG_NCQ;
1557 if (hdepth >= ddepth)
1558 snprintf(desc, desc_sz, "NCQ (depth %d)", ddepth);
1560 snprintf(desc, desc_sz, "NCQ (depth %d/%d)", hdepth, ddepth);
1564 * ata_dev_configure - Configure the specified ATA/ATAPI device
1565 * @dev: Target device to configure
1567 * Configure @dev according to @dev->id. Generic and low-level
1568 * driver specific fixups are also applied.
1571 * Kernel thread context (may sleep)
1574 * 0 on success, -errno otherwise
1576 int ata_dev_configure(struct ata_device *dev)
1578 struct ata_port *ap = dev->ap;
1579 int print_info = ap->eh_context.i.flags & ATA_EHI_PRINTINFO;
1580 const u16 *id = dev->id;
1581 unsigned int xfer_mask;
1582 char revbuf[7]; /* XYZ-99\0 */
1583 char fwrevbuf[ATA_ID_FW_REV_LEN+1];
1584 char modelbuf[ATA_ID_PROD_LEN+1];
1587 if (!ata_dev_enabled(dev) && ata_msg_info(ap)) {
1588 ata_dev_printk(dev, KERN_INFO, "%s: ENTER/EXIT -- nodev\n",
1593 if (ata_msg_probe(ap))
1594 ata_dev_printk(dev, KERN_DEBUG, "%s: ENTER\n", __FUNCTION__);
1597 rc = ata_acpi_push_id(ap, dev->devno);
1599 ata_dev_printk(dev, KERN_WARNING, "failed to set _SDD(%d)\n",
1603 /* retrieve and execute the ATA task file of _GTF */
1604 ata_acpi_exec_tfs(ap);
1606 /* print device capabilities */
1607 if (ata_msg_probe(ap))
1608 ata_dev_printk(dev, KERN_DEBUG,
1609 "%s: cfg 49:%04x 82:%04x 83:%04x 84:%04x "
1610 "85:%04x 86:%04x 87:%04x 88:%04x\n",
1612 id[49], id[82], id[83], id[84],
1613 id[85], id[86], id[87], id[88]);
1615 /* initialize to-be-configured parameters */
1616 dev->flags &= ~ATA_DFLAG_CFG_MASK;
1617 dev->max_sectors = 0;
1625 * common ATA, ATAPI feature tests
1628 /* find max transfer mode; for printk only */
1629 xfer_mask = ata_id_xfermask(id);
1631 if (ata_msg_probe(ap))
1634 /* ATA-specific feature tests */
1635 if (dev->class == ATA_DEV_ATA) {
1636 if (ata_id_is_cfa(id)) {
1637 if (id[162] & 1) /* CPRM may make this media unusable */
1638 ata_dev_printk(dev, KERN_WARNING,
1639 "supports DRM functions and may "
1640 "not be fully accessable.\n");
1641 snprintf(revbuf, 7, "CFA");
1644 snprintf(revbuf, 7, "ATA-%d", ata_id_major_version(id));
1646 dev->n_sectors = ata_id_n_sectors(id);
1648 /* SCSI only uses 4-char revisions, dump full 8 chars from ATA */
1649 ata_id_c_string(dev->id, fwrevbuf, ATA_ID_FW_REV,
1652 ata_id_c_string(dev->id, modelbuf, ATA_ID_PROD,
1655 if (dev->id[59] & 0x100)
1656 dev->multi_count = dev->id[59] & 0xff;
1658 if (ata_id_has_lba(id)) {
1659 const char *lba_desc;
1663 dev->flags |= ATA_DFLAG_LBA;
1664 if (ata_id_has_lba48(id)) {
1665 dev->flags |= ATA_DFLAG_LBA48;
1668 if (dev->n_sectors >= (1UL << 28) &&
1669 ata_id_has_flush_ext(id))
1670 dev->flags |= ATA_DFLAG_FLUSH_EXT;
1674 ata_dev_config_ncq(dev, ncq_desc, sizeof(ncq_desc));
1676 /* print device info to dmesg */
1677 if (ata_msg_drv(ap) && print_info) {
1678 ata_dev_printk(dev, KERN_INFO,
1679 "%s: %s, %s, max %s\n",
1680 revbuf, modelbuf, fwrevbuf,
1681 ata_mode_string(xfer_mask));
1682 ata_dev_printk(dev, KERN_INFO,
1683 "%Lu sectors, multi %u: %s %s\n",
1684 (unsigned long long)dev->n_sectors,
1685 dev->multi_count, lba_desc, ncq_desc);
1690 /* Default translation */
1691 dev->cylinders = id[1];
1693 dev->sectors = id[6];
1695 if (ata_id_current_chs_valid(id)) {
1696 /* Current CHS translation is valid. */
1697 dev->cylinders = id[54];
1698 dev->heads = id[55];
1699 dev->sectors = id[56];
1702 /* print device info to dmesg */
1703 if (ata_msg_drv(ap) && print_info) {
1704 ata_dev_printk(dev, KERN_INFO,
1705 "%s: %s, %s, max %s\n",
1706 revbuf, modelbuf, fwrevbuf,
1707 ata_mode_string(xfer_mask));
1708 ata_dev_printk(dev, KERN_INFO,
1709 "%Lu sectors, multi %u, CHS %u/%u/%u\n",
1710 (unsigned long long)dev->n_sectors,
1711 dev->multi_count, dev->cylinders,
1712 dev->heads, dev->sectors);
1719 /* ATAPI-specific feature tests */
1720 else if (dev->class == ATA_DEV_ATAPI) {
1721 char *cdb_intr_string = "";
1723 rc = atapi_cdb_len(id);
1724 if ((rc < 12) || (rc > ATAPI_CDB_LEN)) {
1725 if (ata_msg_warn(ap))
1726 ata_dev_printk(dev, KERN_WARNING,
1727 "unsupported CDB len\n");
1731 dev->cdb_len = (unsigned int) rc;
1733 if (ata_id_cdb_intr(dev->id)) {
1734 dev->flags |= ATA_DFLAG_CDB_INTR;
1735 cdb_intr_string = ", CDB intr";
1738 /* print device info to dmesg */
1739 if (ata_msg_drv(ap) && print_info)
1740 ata_dev_printk(dev, KERN_INFO, "ATAPI, max %s%s\n",
1741 ata_mode_string(xfer_mask),
1745 /* determine max_sectors */
1746 dev->max_sectors = ATA_MAX_SECTORS;
1747 if (dev->flags & ATA_DFLAG_LBA48)
1748 dev->max_sectors = ATA_MAX_SECTORS_LBA48;
1750 if (dev->horkage & ATA_HORKAGE_DIAGNOSTIC) {
1751 /* Let the user know. We don't want to disallow opens for
1752 rescue purposes, or in case the vendor is just a blithering
1755 ata_dev_printk(dev, KERN_WARNING,
1756 "Drive reports diagnostics failure. This may indicate a drive\n");
1757 ata_dev_printk(dev, KERN_WARNING,
1758 "fault or invalid emulation. Contact drive vendor for information.\n");
1762 /* limit bridge transfers to udma5, 200 sectors */
1763 if (ata_dev_knobble(dev)) {
1764 if (ata_msg_drv(ap) && print_info)
1765 ata_dev_printk(dev, KERN_INFO,
1766 "applying bridge limits\n");
1767 dev->udma_mask &= ATA_UDMA5;
1768 dev->max_sectors = ATA_MAX_SECTORS;
1771 if (ata_device_blacklisted(dev) & ATA_HORKAGE_MAX_SEC_128)
1772 dev->max_sectors = min(ATA_MAX_SECTORS_128, dev->max_sectors);
1774 /* limit ATAPI DMA to R/W commands only */
1775 if (ata_device_blacklisted(dev) & ATA_HORKAGE_DMA_RW_ONLY)
1776 dev->horkage |= ATA_HORKAGE_DMA_RW_ONLY;
1778 if (ap->ops->dev_config)
1779 ap->ops->dev_config(dev);
1781 if (ata_msg_probe(ap))
1782 ata_dev_printk(dev, KERN_DEBUG, "%s: EXIT, drv_stat = 0x%x\n",
1783 __FUNCTION__, ata_chk_status(ap));
1787 if (ata_msg_probe(ap))
1788 ata_dev_printk(dev, KERN_DEBUG,
1789 "%s: EXIT, err\n", __FUNCTION__);
1794 * ata_cable_40wire - return 40 wire cable type
1797 * Helper method for drivers which want to hardwire 40 wire cable
1801 int ata_cable_40wire(struct ata_port *ap)
1803 return ATA_CBL_PATA40;
1807 * ata_cable_80wire - return 80 wire cable type
1810 * Helper method for drivers which want to hardwire 80 wire cable
1814 int ata_cable_80wire(struct ata_port *ap)
1816 return ATA_CBL_PATA80;
1820 * ata_cable_unknown - return unknown PATA cable.
1823 * Helper method for drivers which have no PATA cable detection.
1826 int ata_cable_unknown(struct ata_port *ap)
1828 return ATA_CBL_PATA_UNK;
1832 * ata_cable_sata - return SATA cable type
1835 * Helper method for drivers which have SATA cables
1838 int ata_cable_sata(struct ata_port *ap)
1840 return ATA_CBL_SATA;
1844 * ata_bus_probe - Reset and probe ATA bus
1847 * Master ATA bus probing function. Initiates a hardware-dependent
1848 * bus reset, then attempts to identify any devices found on
1852 * PCI/etc. bus probe sem.
1855 * Zero on success, negative errno otherwise.
1858 int ata_bus_probe(struct ata_port *ap)
1860 unsigned int classes[ATA_MAX_DEVICES];
1861 int tries[ATA_MAX_DEVICES];
1863 struct ata_device *dev;
1867 for (i = 0; i < ATA_MAX_DEVICES; i++)
1868 tries[i] = ATA_PROBE_MAX_TRIES;
1871 /* reset and determine device classes */
1872 ap->ops->phy_reset(ap);
1874 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1875 dev = &ap->device[i];
1877 if (!(ap->flags & ATA_FLAG_DISABLED) &&
1878 dev->class != ATA_DEV_UNKNOWN)
1879 classes[dev->devno] = dev->class;
1881 classes[dev->devno] = ATA_DEV_NONE;
1883 dev->class = ATA_DEV_UNKNOWN;
1888 /* after the reset the device state is PIO 0 and the controller
1889 state is undefined. Record the mode */
1891 for (i = 0; i < ATA_MAX_DEVICES; i++)
1892 ap->device[i].pio_mode = XFER_PIO_0;
1894 /* read IDENTIFY page and configure devices. We have to do the identify
1895 specific sequence bass-ackwards so that PDIAG- is released by
1898 for (i = ATA_MAX_DEVICES - 1; i >= 0; i--) {
1899 dev = &ap->device[i];
1902 dev->class = classes[i];
1904 if (!ata_dev_enabled(dev))
1907 rc = ata_dev_read_id(dev, &dev->class, ATA_READID_POSTRESET,
1913 /* Now ask for the cable type as PDIAG- should have been released */
1914 if (ap->ops->cable_detect)
1915 ap->cbl = ap->ops->cable_detect(ap);
1917 /* After the identify sequence we can now set up the devices. We do
1918 this in the normal order so that the user doesn't get confused */
1920 for(i = 0; i < ATA_MAX_DEVICES; i++) {
1921 dev = &ap->device[i];
1922 if (!ata_dev_enabled(dev))
1925 ap->eh_context.i.flags |= ATA_EHI_PRINTINFO;
1926 rc = ata_dev_configure(dev);
1927 ap->eh_context.i.flags &= ~ATA_EHI_PRINTINFO;
1932 /* configure transfer mode */
1933 rc = ata_set_mode(ap, &dev);
1937 for (i = 0; i < ATA_MAX_DEVICES; i++)
1938 if (ata_dev_enabled(&ap->device[i]))
1941 /* no device present, disable port */
1942 ata_port_disable(ap);
1943 ap->ops->port_disable(ap);
1947 tries[dev->devno]--;
1951 /* eeek, something went very wrong, give up */
1952 tries[dev->devno] = 0;
1956 /* give it just one more chance */
1957 tries[dev->devno] = min(tries[dev->devno], 1);
1959 if (tries[dev->devno] == 1) {
1960 /* This is the last chance, better to slow
1961 * down than lose it.
1963 sata_down_spd_limit(ap);
1964 ata_down_xfermask_limit(dev, ATA_DNXFER_PIO);
1968 if (!tries[dev->devno])
1969 ata_dev_disable(dev);
1975 * ata_port_probe - Mark port as enabled
1976 * @ap: Port for which we indicate enablement
1978 * Modify @ap data structure such that the system
1979 * thinks that the entire port is enabled.
1981 * LOCKING: host lock, or some other form of
1985 void ata_port_probe(struct ata_port *ap)
1987 ap->flags &= ~ATA_FLAG_DISABLED;
1991 * sata_print_link_status - Print SATA link status
1992 * @ap: SATA port to printk link status about
1994 * This function prints link speed and status of a SATA link.
1999 void sata_print_link_status(struct ata_port *ap)
2001 u32 sstatus, scontrol, tmp;
2003 if (sata_scr_read(ap, SCR_STATUS, &sstatus))
2005 sata_scr_read(ap, SCR_CONTROL, &scontrol);
2007 if (ata_port_online(ap)) {
2008 tmp = (sstatus >> 4) & 0xf;
2009 ata_port_printk(ap, KERN_INFO,
2010 "SATA link up %s (SStatus %X SControl %X)\n",
2011 sata_spd_string(tmp), sstatus, scontrol);
2013 ata_port_printk(ap, KERN_INFO,
2014 "SATA link down (SStatus %X SControl %X)\n",
2020 * __sata_phy_reset - Wake/reset a low-level SATA PHY
2021 * @ap: SATA port associated with target SATA PHY.
2023 * This function issues commands to standard SATA Sxxx
2024 * PHY registers, to wake up the phy (and device), and
2025 * clear any reset condition.
2028 * PCI/etc. bus probe sem.
2031 void __sata_phy_reset(struct ata_port *ap)
2034 unsigned long timeout = jiffies + (HZ * 5);
2036 if (ap->flags & ATA_FLAG_SATA_RESET) {
2037 /* issue phy wake/reset */
2038 sata_scr_write_flush(ap, SCR_CONTROL, 0x301);
2039 /* Couldn't find anything in SATA I/II specs, but
2040 * AHCI-1.1 10.4.2 says at least 1 ms. */
2043 /* phy wake/clear reset */
2044 sata_scr_write_flush(ap, SCR_CONTROL, 0x300);
2046 /* wait for phy to become ready, if necessary */
2049 sata_scr_read(ap, SCR_STATUS, &sstatus);
2050 if ((sstatus & 0xf) != 1)
2052 } while (time_before(jiffies, timeout));
2054 /* print link status */
2055 sata_print_link_status(ap);
2057 /* TODO: phy layer with polling, timeouts, etc. */
2058 if (!ata_port_offline(ap))
2061 ata_port_disable(ap);
2063 if (ap->flags & ATA_FLAG_DISABLED)
2066 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
2067 ata_port_disable(ap);
2071 ap->cbl = ATA_CBL_SATA;
2075 * sata_phy_reset - Reset SATA bus.
2076 * @ap: SATA port associated with target SATA PHY.
2078 * This function resets the SATA bus, and then probes
2079 * the bus for devices.
2082 * PCI/etc. bus probe sem.
2085 void sata_phy_reset(struct ata_port *ap)
2087 __sata_phy_reset(ap);
2088 if (ap->flags & ATA_FLAG_DISABLED)
2094 * ata_dev_pair - return other device on cable
2097 * Obtain the other device on the same cable, or if none is
2098 * present NULL is returned
2101 struct ata_device *ata_dev_pair(struct ata_device *adev)
2103 struct ata_port *ap = adev->ap;
2104 struct ata_device *pair = &ap->device[1 - adev->devno];
2105 if (!ata_dev_enabled(pair))
2111 * ata_port_disable - Disable port.
2112 * @ap: Port to be disabled.
2114 * Modify @ap data structure such that the system
2115 * thinks that the entire port is disabled, and should
2116 * never attempt to probe or communicate with devices
2119 * LOCKING: host lock, or some other form of
2123 void ata_port_disable(struct ata_port *ap)
2125 ap->device[0].class = ATA_DEV_NONE;
2126 ap->device[1].class = ATA_DEV_NONE;
2127 ap->flags |= ATA_FLAG_DISABLED;
2131 * sata_down_spd_limit - adjust SATA spd limit downward
2132 * @ap: Port to adjust SATA spd limit for
2134 * Adjust SATA spd limit of @ap downward. Note that this
2135 * function only adjusts the limit. The change must be applied
2136 * using sata_set_spd().
2139 * Inherited from caller.
2142 * 0 on success, negative errno on failure
2144 int sata_down_spd_limit(struct ata_port *ap)
2146 u32 sstatus, spd, mask;
2149 rc = sata_scr_read(ap, SCR_STATUS, &sstatus);
2153 mask = ap->sata_spd_limit;
2156 highbit = fls(mask) - 1;
2157 mask &= ~(1 << highbit);
2159 spd = (sstatus >> 4) & 0xf;
2163 mask &= (1 << spd) - 1;
2167 ap->sata_spd_limit = mask;
2169 ata_port_printk(ap, KERN_WARNING, "limiting SATA link speed to %s\n",
2170 sata_spd_string(fls(mask)));
2175 static int __sata_set_spd_needed(struct ata_port *ap, u32 *scontrol)
2179 if (ap->sata_spd_limit == UINT_MAX)
2182 limit = fls(ap->sata_spd_limit);
2184 spd = (*scontrol >> 4) & 0xf;
2185 *scontrol = (*scontrol & ~0xf0) | ((limit & 0xf) << 4);
2187 return spd != limit;
2191 * sata_set_spd_needed - is SATA spd configuration needed
2192 * @ap: Port in question
2194 * Test whether the spd limit in SControl matches
2195 * @ap->sata_spd_limit. This function is used to determine
2196 * whether hardreset is necessary to apply SATA spd
2200 * Inherited from caller.
2203 * 1 if SATA spd configuration is needed, 0 otherwise.
2205 int sata_set_spd_needed(struct ata_port *ap)
2209 if (sata_scr_read(ap, SCR_CONTROL, &scontrol))
2212 return __sata_set_spd_needed(ap, &scontrol);
2216 * sata_set_spd - set SATA spd according to spd limit
2217 * @ap: Port to set SATA spd for
2219 * Set SATA spd of @ap according to sata_spd_limit.
2222 * Inherited from caller.
2225 * 0 if spd doesn't need to be changed, 1 if spd has been
2226 * changed. Negative errno if SCR registers are inaccessible.
2228 int sata_set_spd(struct ata_port *ap)
2233 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
2236 if (!__sata_set_spd_needed(ap, &scontrol))
2239 if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol)))
2246 * This mode timing computation functionality is ported over from
2247 * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik
2250 * PIO 0-4, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
2251 * These were taken from ATA/ATAPI-6 standard, rev 0a, except
2252 * for UDMA6, which is currently supported only by Maxtor drives.
2254 * For PIO 5/6 MWDMA 3/4 see the CFA specification 3.0.
2257 static const struct ata_timing ata_timing[] = {
2259 { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 },
2260 { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 },
2261 { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 },
2262 { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 },
2264 { XFER_MW_DMA_4, 25, 0, 0, 0, 55, 20, 80, 0 },
2265 { XFER_MW_DMA_3, 25, 0, 0, 0, 65, 25, 100, 0 },
2266 { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 },
2267 { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 },
2268 { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 },
2270 /* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */
2272 { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 },
2273 { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 },
2274 { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 },
2276 { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 },
2277 { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 },
2278 { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 },
2280 { XFER_PIO_6, 10, 55, 20, 80, 55, 20, 80, 0 },
2281 { XFER_PIO_5, 15, 65, 25, 100, 65, 25, 100, 0 },
2282 { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 },
2283 { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 },
2285 { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 },
2286 { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 },
2287 { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 },
2289 /* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */
2294 #define ENOUGH(v,unit) (((v)-1)/(unit)+1)
2295 #define EZ(v,unit) ((v)?ENOUGH(v,unit):0)
2297 static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT)
2299 q->setup = EZ(t->setup * 1000, T);
2300 q->act8b = EZ(t->act8b * 1000, T);
2301 q->rec8b = EZ(t->rec8b * 1000, T);
2302 q->cyc8b = EZ(t->cyc8b * 1000, T);
2303 q->active = EZ(t->active * 1000, T);
2304 q->recover = EZ(t->recover * 1000, T);
2305 q->cycle = EZ(t->cycle * 1000, T);
2306 q->udma = EZ(t->udma * 1000, UT);
2309 void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b,
2310 struct ata_timing *m, unsigned int what)
2312 if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup);
2313 if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b);
2314 if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b);
2315 if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b);
2316 if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active);
2317 if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover);
2318 if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle);
2319 if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma);
2322 static const struct ata_timing* ata_timing_find_mode(unsigned short speed)
2324 const struct ata_timing *t;
2326 for (t = ata_timing; t->mode != speed; t++)
2327 if (t->mode == 0xFF)
2332 int ata_timing_compute(struct ata_device *adev, unsigned short speed,
2333 struct ata_timing *t, int T, int UT)
2335 const struct ata_timing *s;
2336 struct ata_timing p;
2342 if (!(s = ata_timing_find_mode(speed)))
2345 memcpy(t, s, sizeof(*s));
2348 * If the drive is an EIDE drive, it can tell us it needs extended
2349 * PIO/MW_DMA cycle timing.
2352 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
2353 memset(&p, 0, sizeof(p));
2354 if(speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) {
2355 if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO];
2356 else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY];
2357 } else if(speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) {
2358 p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN];
2360 ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B);
2364 * Convert the timing to bus clock counts.
2367 ata_timing_quantize(t, t, T, UT);
2370 * Even in DMA/UDMA modes we still use PIO access for IDENTIFY,
2371 * S.M.A.R.T * and some other commands. We have to ensure that the
2372 * DMA cycle timing is slower/equal than the fastest PIO timing.
2375 if (speed > XFER_PIO_6) {
2376 ata_timing_compute(adev, adev->pio_mode, &p, T, UT);
2377 ata_timing_merge(&p, t, t, ATA_TIMING_ALL);
2381 * Lengthen active & recovery time so that cycle time is correct.
2384 if (t->act8b + t->rec8b < t->cyc8b) {
2385 t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2;
2386 t->rec8b = t->cyc8b - t->act8b;
2389 if (t->active + t->recover < t->cycle) {
2390 t->active += (t->cycle - (t->active + t->recover)) / 2;
2391 t->recover = t->cycle - t->active;
2398 * ata_down_xfermask_limit - adjust dev xfer masks downward
2399 * @dev: Device to adjust xfer masks
2400 * @sel: ATA_DNXFER_* selector
2402 * Adjust xfer masks of @dev downward. Note that this function
2403 * does not apply the change. Invoking ata_set_mode() afterwards
2404 * will apply the limit.
2407 * Inherited from caller.
2410 * 0 on success, negative errno on failure
2412 int ata_down_xfermask_limit(struct ata_device *dev, unsigned int sel)
2415 unsigned int orig_mask, xfer_mask;
2416 unsigned int pio_mask, mwdma_mask, udma_mask;
2419 quiet = !!(sel & ATA_DNXFER_QUIET);
2420 sel &= ~ATA_DNXFER_QUIET;
2422 xfer_mask = orig_mask = ata_pack_xfermask(dev->pio_mask,
2425 ata_unpack_xfermask(xfer_mask, &pio_mask, &mwdma_mask, &udma_mask);
2428 case ATA_DNXFER_PIO:
2429 highbit = fls(pio_mask) - 1;
2430 pio_mask &= ~(1 << highbit);
2433 case ATA_DNXFER_DMA:
2435 highbit = fls(udma_mask) - 1;
2436 udma_mask &= ~(1 << highbit);
2439 } else if (mwdma_mask) {
2440 highbit = fls(mwdma_mask) - 1;
2441 mwdma_mask &= ~(1 << highbit);
2447 case ATA_DNXFER_40C:
2448 udma_mask &= ATA_UDMA_MASK_40C;
2451 case ATA_DNXFER_FORCE_PIO0:
2453 case ATA_DNXFER_FORCE_PIO:
2462 xfer_mask &= ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask);
2464 if (!(xfer_mask & ATA_MASK_PIO) || xfer_mask == orig_mask)
2468 if (xfer_mask & (ATA_MASK_MWDMA | ATA_MASK_UDMA))
2469 snprintf(buf, sizeof(buf), "%s:%s",
2470 ata_mode_string(xfer_mask),
2471 ata_mode_string(xfer_mask & ATA_MASK_PIO));
2473 snprintf(buf, sizeof(buf), "%s",
2474 ata_mode_string(xfer_mask));
2476 ata_dev_printk(dev, KERN_WARNING,
2477 "limiting speed to %s\n", buf);
2480 ata_unpack_xfermask(xfer_mask, &dev->pio_mask, &dev->mwdma_mask,
2486 static int ata_dev_set_mode(struct ata_device *dev)
2488 struct ata_eh_context *ehc = &dev->ap->eh_context;
2489 unsigned int err_mask;
2492 dev->flags &= ~ATA_DFLAG_PIO;
2493 if (dev->xfer_shift == ATA_SHIFT_PIO)
2494 dev->flags |= ATA_DFLAG_PIO;
2496 err_mask = ata_dev_set_xfermode(dev);
2497 /* Old CFA may refuse this command, which is just fine */
2498 if (dev->xfer_shift == ATA_SHIFT_PIO && ata_id_is_cfa(dev->id))
2499 err_mask &= ~AC_ERR_DEV;
2502 ata_dev_printk(dev, KERN_ERR, "failed to set xfermode "
2503 "(err_mask=0x%x)\n", err_mask);
2507 ehc->i.flags |= ATA_EHI_POST_SETMODE;
2508 rc = ata_dev_revalidate(dev, 0);
2509 ehc->i.flags &= ~ATA_EHI_POST_SETMODE;
2513 DPRINTK("xfer_shift=%u, xfer_mode=0x%x\n",
2514 dev->xfer_shift, (int)dev->xfer_mode);
2516 ata_dev_printk(dev, KERN_INFO, "configured for %s\n",
2517 ata_mode_string(ata_xfer_mode2mask(dev->xfer_mode)));
2522 * ata_set_mode - Program timings and issue SET FEATURES - XFER
2523 * @ap: port on which timings will be programmed
2524 * @r_failed_dev: out paramter for failed device
2526 * Set ATA device disk transfer mode (PIO3, UDMA6, etc.). If
2527 * ata_set_mode() fails, pointer to the failing device is
2528 * returned in @r_failed_dev.
2531 * PCI/etc. bus probe sem.
2534 * 0 on success, negative errno otherwise
2536 int ata_set_mode(struct ata_port *ap, struct ata_device **r_failed_dev)
2538 struct ata_device *dev;
2539 int i, rc = 0, used_dma = 0, found = 0;
2541 /* has private set_mode? */
2542 if (ap->ops->set_mode)
2543 return ap->ops->set_mode(ap, r_failed_dev);
2545 /* step 1: calculate xfer_mask */
2546 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2547 unsigned int pio_mask, dma_mask;
2549 dev = &ap->device[i];
2551 if (!ata_dev_enabled(dev))
2554 ata_dev_xfermask(dev);
2556 pio_mask = ata_pack_xfermask(dev->pio_mask, 0, 0);
2557 dma_mask = ata_pack_xfermask(0, dev->mwdma_mask, dev->udma_mask);
2558 dev->pio_mode = ata_xfer_mask2mode(pio_mask);
2559 dev->dma_mode = ata_xfer_mask2mode(dma_mask);
2568 /* step 2: always set host PIO timings */
2569 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2570 dev = &ap->device[i];
2571 if (!ata_dev_enabled(dev))
2574 if (!dev->pio_mode) {
2575 ata_dev_printk(dev, KERN_WARNING, "no PIO support\n");
2580 dev->xfer_mode = dev->pio_mode;
2581 dev->xfer_shift = ATA_SHIFT_PIO;
2582 if (ap->ops->set_piomode)
2583 ap->ops->set_piomode(ap, dev);
2586 /* step 3: set host DMA timings */
2587 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2588 dev = &ap->device[i];
2590 if (!ata_dev_enabled(dev) || !dev->dma_mode)
2593 dev->xfer_mode = dev->dma_mode;
2594 dev->xfer_shift = ata_xfer_mode2shift(dev->dma_mode);
2595 if (ap->ops->set_dmamode)
2596 ap->ops->set_dmamode(ap, dev);
2599 /* step 4: update devices' xfer mode */
2600 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2601 dev = &ap->device[i];
2603 /* don't update suspended devices' xfer mode */
2604 if (!ata_dev_ready(dev))
2607 rc = ata_dev_set_mode(dev);
2612 /* Record simplex status. If we selected DMA then the other
2613 * host channels are not permitted to do so.
2615 if (used_dma && (ap->host->flags & ATA_HOST_SIMPLEX))
2616 ap->host->simplex_claimed = ap;
2618 /* step5: chip specific finalisation */
2619 if (ap->ops->post_set_mode)
2620 ap->ops->post_set_mode(ap);
2623 *r_failed_dev = dev;
2628 * ata_tf_to_host - issue ATA taskfile to host controller
2629 * @ap: port to which command is being issued
2630 * @tf: ATA taskfile register set
2632 * Issues ATA taskfile register set to ATA host controller,
2633 * with proper synchronization with interrupt handler and
2637 * spin_lock_irqsave(host lock)
2640 static inline void ata_tf_to_host(struct ata_port *ap,
2641 const struct ata_taskfile *tf)
2643 ap->ops->tf_load(ap, tf);
2644 ap->ops->exec_command(ap, tf);
2648 * ata_busy_sleep - sleep until BSY clears, or timeout
2649 * @ap: port containing status register to be polled
2650 * @tmout_pat: impatience timeout
2651 * @tmout: overall timeout
2653 * Sleep until ATA Status register bit BSY clears,
2654 * or a timeout occurs.
2657 * Kernel thread context (may sleep).
2660 * 0 on success, -errno otherwise.
2662 int ata_busy_sleep(struct ata_port *ap,
2663 unsigned long tmout_pat, unsigned long tmout)
2665 unsigned long timer_start, timeout;
2668 status = ata_busy_wait(ap, ATA_BUSY, 300);
2669 timer_start = jiffies;
2670 timeout = timer_start + tmout_pat;
2671 while (status != 0xff && (status & ATA_BUSY) &&
2672 time_before(jiffies, timeout)) {
2674 status = ata_busy_wait(ap, ATA_BUSY, 3);
2677 if (status != 0xff && (status & ATA_BUSY))
2678 ata_port_printk(ap, KERN_WARNING,
2679 "port is slow to respond, please be patient "
2680 "(Status 0x%x)\n", status);
2682 timeout = timer_start + tmout;
2683 while (status != 0xff && (status & ATA_BUSY) &&
2684 time_before(jiffies, timeout)) {
2686 status = ata_chk_status(ap);
2692 if (status & ATA_BUSY) {
2693 ata_port_printk(ap, KERN_ERR, "port failed to respond "
2694 "(%lu secs, Status 0x%x)\n",
2695 tmout / HZ, status);
2702 static void ata_bus_post_reset(struct ata_port *ap, unsigned int devmask)
2704 struct ata_ioports *ioaddr = &ap->ioaddr;
2705 unsigned int dev0 = devmask & (1 << 0);
2706 unsigned int dev1 = devmask & (1 << 1);
2707 unsigned long timeout;
2709 /* if device 0 was found in ata_devchk, wait for its
2713 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2715 /* if device 1 was found in ata_devchk, wait for
2716 * register access, then wait for BSY to clear
2718 timeout = jiffies + ATA_TMOUT_BOOT;
2722 ap->ops->dev_select(ap, 1);
2723 nsect = ioread8(ioaddr->nsect_addr);
2724 lbal = ioread8(ioaddr->lbal_addr);
2725 if ((nsect == 1) && (lbal == 1))
2727 if (time_after(jiffies, timeout)) {
2731 msleep(50); /* give drive a breather */
2734 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2736 /* is all this really necessary? */
2737 ap->ops->dev_select(ap, 0);
2739 ap->ops->dev_select(ap, 1);
2741 ap->ops->dev_select(ap, 0);
2744 static unsigned int ata_bus_softreset(struct ata_port *ap,
2745 unsigned int devmask)
2747 struct ata_ioports *ioaddr = &ap->ioaddr;
2749 DPRINTK("ata%u: bus reset via SRST\n", ap->print_id);
2751 /* software reset. causes dev0 to be selected */
2752 iowrite8(ap->ctl, ioaddr->ctl_addr);
2753 udelay(20); /* FIXME: flush */
2754 iowrite8(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
2755 udelay(20); /* FIXME: flush */
2756 iowrite8(ap->ctl, ioaddr->ctl_addr);
2758 /* spec mandates ">= 2ms" before checking status.
2759 * We wait 150ms, because that was the magic delay used for
2760 * ATAPI devices in Hale Landis's ATADRVR, for the period of time
2761 * between when the ATA command register is written, and then
2762 * status is checked. Because waiting for "a while" before
2763 * checking status is fine, post SRST, we perform this magic
2764 * delay here as well.
2766 * Old drivers/ide uses the 2mS rule and then waits for ready
2770 /* Before we perform post reset processing we want to see if
2771 * the bus shows 0xFF because the odd clown forgets the D7
2772 * pulldown resistor.
2774 if (ata_check_status(ap) == 0xFF)
2777 ata_bus_post_reset(ap, devmask);
2783 * ata_bus_reset - reset host port and associated ATA channel
2784 * @ap: port to reset
2786 * This is typically the first time we actually start issuing
2787 * commands to the ATA channel. We wait for BSY to clear, then
2788 * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its
2789 * result. Determine what devices, if any, are on the channel
2790 * by looking at the device 0/1 error register. Look at the signature
2791 * stored in each device's taskfile registers, to determine if
2792 * the device is ATA or ATAPI.
2795 * PCI/etc. bus probe sem.
2796 * Obtains host lock.
2799 * Sets ATA_FLAG_DISABLED if bus reset fails.
2802 void ata_bus_reset(struct ata_port *ap)
2804 struct ata_ioports *ioaddr = &ap->ioaddr;
2805 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2807 unsigned int dev0, dev1 = 0, devmask = 0;
2809 DPRINTK("ENTER, host %u, port %u\n", ap->print_id, ap->port_no);
2811 /* determine if device 0/1 are present */
2812 if (ap->flags & ATA_FLAG_SATA_RESET)
2815 dev0 = ata_devchk(ap, 0);
2817 dev1 = ata_devchk(ap, 1);
2821 devmask |= (1 << 0);
2823 devmask |= (1 << 1);
2825 /* select device 0 again */
2826 ap->ops->dev_select(ap, 0);
2828 /* issue bus reset */
2829 if (ap->flags & ATA_FLAG_SRST)
2830 if (ata_bus_softreset(ap, devmask))
2834 * determine by signature whether we have ATA or ATAPI devices
2836 ap->device[0].class = ata_dev_try_classify(ap, 0, &err);
2837 if ((slave_possible) && (err != 0x81))
2838 ap->device[1].class = ata_dev_try_classify(ap, 1, &err);
2840 /* re-enable interrupts */
2841 ap->ops->irq_on(ap);
2843 /* is double-select really necessary? */
2844 if (ap->device[1].class != ATA_DEV_NONE)
2845 ap->ops->dev_select(ap, 1);
2846 if (ap->device[0].class != ATA_DEV_NONE)
2847 ap->ops->dev_select(ap, 0);
2849 /* if no devices were detected, disable this port */
2850 if ((ap->device[0].class == ATA_DEV_NONE) &&
2851 (ap->device[1].class == ATA_DEV_NONE))
2854 if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) {
2855 /* set up device control for ATA_FLAG_SATA_RESET */
2856 iowrite8(ap->ctl, ioaddr->ctl_addr);
2863 ata_port_printk(ap, KERN_ERR, "disabling port\n");
2864 ap->ops->port_disable(ap);
2870 * sata_phy_debounce - debounce SATA phy status
2871 * @ap: ATA port to debounce SATA phy status for
2872 * @params: timing parameters { interval, duratinon, timeout } in msec
2874 * Make sure SStatus of @ap reaches stable state, determined by
2875 * holding the same value where DET is not 1 for @duration polled
2876 * every @interval, before @timeout. Timeout constraints the
2877 * beginning of the stable state. Because, after hot unplugging,
2878 * DET gets stuck at 1 on some controllers, this functions waits
2879 * until timeout then returns 0 if DET is stable at 1.
2882 * Kernel thread context (may sleep)
2885 * 0 on success, -errno on failure.
2887 int sata_phy_debounce(struct ata_port *ap, const unsigned long *params)
2889 unsigned long interval_msec = params[0];
2890 unsigned long duration = params[1] * HZ / 1000;
2891 unsigned long timeout = jiffies + params[2] * HZ / 1000;
2892 unsigned long last_jiffies;
2896 if ((rc = sata_scr_read(ap, SCR_STATUS, &cur)))
2901 last_jiffies = jiffies;
2904 msleep(interval_msec);
2905 if ((rc = sata_scr_read(ap, SCR_STATUS, &cur)))
2911 if (cur == 1 && time_before(jiffies, timeout))
2913 if (time_after(jiffies, last_jiffies + duration))
2918 /* unstable, start over */
2920 last_jiffies = jiffies;
2923 if (time_after(jiffies, timeout))
2929 * sata_phy_resume - resume SATA phy
2930 * @ap: ATA port to resume SATA phy for
2931 * @params: timing parameters { interval, duratinon, timeout } in msec
2933 * Resume SATA phy of @ap and debounce it.
2936 * Kernel thread context (may sleep)
2939 * 0 on success, -errno on failure.
2941 int sata_phy_resume(struct ata_port *ap, const unsigned long *params)
2946 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
2949 scontrol = (scontrol & 0x0f0) | 0x300;
2951 if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol)))
2954 /* Some PHYs react badly if SStatus is pounded immediately
2955 * after resuming. Delay 200ms before debouncing.
2959 return sata_phy_debounce(ap, params);
2962 static void ata_wait_spinup(struct ata_port *ap)
2964 struct ata_eh_context *ehc = &ap->eh_context;
2965 unsigned long end, secs;
2968 /* first, debounce phy if SATA */
2969 if (ap->cbl == ATA_CBL_SATA) {
2970 rc = sata_phy_debounce(ap, sata_deb_timing_hotplug);
2972 /* if debounced successfully and offline, no need to wait */
2973 if ((rc == 0 || rc == -EOPNOTSUPP) && ata_port_offline(ap))
2977 /* okay, let's give the drive time to spin up */
2978 end = ehc->i.hotplug_timestamp + ATA_SPINUP_WAIT * HZ / 1000;
2979 secs = ((end - jiffies) + HZ - 1) / HZ;
2981 if (time_after(jiffies, end))
2985 ata_port_printk(ap, KERN_INFO, "waiting for device to spin up "
2986 "(%lu secs)\n", secs);
2988 schedule_timeout_uninterruptible(end - jiffies);
2992 * ata_std_prereset - prepare for reset
2993 * @ap: ATA port to be reset
2995 * @ap is about to be reset. Initialize it.
2998 * Kernel thread context (may sleep)
3001 * 0 on success, -errno otherwise.
3003 int ata_std_prereset(struct ata_port *ap)
3005 struct ata_eh_context *ehc = &ap->eh_context;
3006 const unsigned long *timing = sata_ehc_deb_timing(ehc);
3009 /* handle link resume & hotplug spinup */
3010 if ((ehc->i.flags & ATA_EHI_RESUME_LINK) &&
3011 (ap->flags & ATA_FLAG_HRST_TO_RESUME))
3012 ehc->i.action |= ATA_EH_HARDRESET;
3014 if ((ehc->i.flags & ATA_EHI_HOTPLUGGED) &&
3015 (ap->flags & ATA_FLAG_SKIP_D2H_BSY))
3016 ata_wait_spinup(ap);
3018 /* if we're about to do hardreset, nothing more to do */
3019 if (ehc->i.action & ATA_EH_HARDRESET)
3022 /* if SATA, resume phy */
3023 if (ap->cbl == ATA_CBL_SATA) {
3024 rc = sata_phy_resume(ap, timing);
3025 if (rc && rc != -EOPNOTSUPP) {
3026 /* phy resume failed */
3027 ata_port_printk(ap, KERN_WARNING, "failed to resume "
3028 "link for reset (errno=%d)\n", rc);
3033 /* Wait for !BSY if the controller can wait for the first D2H
3034 * Reg FIS and we don't know that no device is attached.
3036 if (!(ap->flags & ATA_FLAG_SKIP_D2H_BSY) && !ata_port_offline(ap))
3037 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
3043 * ata_std_softreset - reset host port via ATA SRST
3044 * @ap: port to reset
3045 * @classes: resulting classes of attached devices
3047 * Reset host port using ATA SRST.
3050 * Kernel thread context (may sleep)
3053 * 0 on success, -errno otherwise.
3055 int ata_std_softreset(struct ata_port *ap, unsigned int *classes)
3057 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
3058 unsigned int devmask = 0, err_mask;
3063 if (ata_port_offline(ap)) {
3064 classes[0] = ATA_DEV_NONE;
3068 /* determine if device 0/1 are present */
3069 if (ata_devchk(ap, 0))
3070 devmask |= (1 << 0);
3071 if (slave_possible && ata_devchk(ap, 1))
3072 devmask |= (1 << 1);
3074 /* select device 0 again */
3075 ap->ops->dev_select(ap, 0);
3077 /* issue bus reset */
3078 DPRINTK("about to softreset, devmask=%x\n", devmask);
3079 err_mask = ata_bus_softreset(ap, devmask);
3081 ata_port_printk(ap, KERN_ERR, "SRST failed (err_mask=0x%x)\n",
3086 /* determine by signature whether we have ATA or ATAPI devices */
3087 classes[0] = ata_dev_try_classify(ap, 0, &err);
3088 if (slave_possible && err != 0x81)
3089 classes[1] = ata_dev_try_classify(ap, 1, &err);
3092 DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]);
3097 * sata_port_hardreset - reset port via SATA phy reset
3098 * @ap: port to reset
3099 * @timing: timing parameters { interval, duratinon, timeout } in msec
3101 * SATA phy-reset host port using DET bits of SControl register.
3104 * Kernel thread context (may sleep)
3107 * 0 on success, -errno otherwise.
3109 int sata_port_hardreset(struct ata_port *ap, const unsigned long *timing)
3116 if (sata_set_spd_needed(ap)) {
3117 /* SATA spec says nothing about how to reconfigure
3118 * spd. To be on the safe side, turn off phy during
3119 * reconfiguration. This works for at least ICH7 AHCI
3122 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
3125 scontrol = (scontrol & 0x0f0) | 0x304;
3127 if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol)))
3133 /* issue phy wake/reset */
3134 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
3137 scontrol = (scontrol & 0x0f0) | 0x301;
3139 if ((rc = sata_scr_write_flush(ap, SCR_CONTROL, scontrol)))
3142 /* Couldn't find anything in SATA I/II specs, but AHCI-1.1
3143 * 10.4.2 says at least 1 ms.
3147 /* bring phy back */
3148 rc = sata_phy_resume(ap, timing);
3150 DPRINTK("EXIT, rc=%d\n", rc);
3155 * sata_std_hardreset - reset host port via SATA phy reset
3156 * @ap: port to reset
3157 * @class: resulting class of attached device
3159 * SATA phy-reset host port using DET bits of SControl register,
3160 * wait for !BSY and classify the attached device.
3163 * Kernel thread context (may sleep)
3166 * 0 on success, -errno otherwise.
3168 int sata_std_hardreset(struct ata_port *ap, unsigned int *class)
3170 const unsigned long *timing = sata_ehc_deb_timing(&ap->eh_context);
3176 rc = sata_port_hardreset(ap, timing);
3178 ata_port_printk(ap, KERN_ERR,
3179 "COMRESET failed (errno=%d)\n", rc);
3183 /* TODO: phy layer with polling, timeouts, etc. */
3184 if (ata_port_offline(ap)) {
3185 *class = ATA_DEV_NONE;
3186 DPRINTK("EXIT, link offline\n");
3190 /* wait a while before checking status, see SRST for more info */
3193 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
3194 ata_port_printk(ap, KERN_ERR,
3195 "COMRESET failed (device not ready)\n");
3199 ap->ops->dev_select(ap, 0); /* probably unnecessary */
3201 *class = ata_dev_try_classify(ap, 0, NULL);
3203 DPRINTK("EXIT, class=%u\n", *class);
3208 * ata_std_postreset - standard postreset callback
3209 * @ap: the target ata_port
3210 * @classes: classes of attached devices
3212 * This function is invoked after a successful reset. Note that
3213 * the device might have been reset more than once using
3214 * different reset methods before postreset is invoked.
3217 * Kernel thread context (may sleep)
3219 void ata_std_postreset(struct ata_port *ap, unsigned int *classes)
3225 /* print link status */
3226 sata_print_link_status(ap);
3229 if (sata_scr_read(ap, SCR_ERROR, &serror) == 0)
3230 sata_scr_write(ap, SCR_ERROR, serror);
3232 /* re-enable interrupts */
3233 if (!ap->ops->error_handler)
3234 ap->ops->irq_on(ap);
3236 /* is double-select really necessary? */
3237 if (classes[0] != ATA_DEV_NONE)
3238 ap->ops->dev_select(ap, 1);
3239 if (classes[1] != ATA_DEV_NONE)
3240 ap->ops->dev_select(ap, 0);
3242 /* bail out if no device is present */
3243 if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) {
3244 DPRINTK("EXIT, no device\n");
3248 /* set up device control */
3249 if (ap->ioaddr.ctl_addr)
3250 iowrite8(ap->ctl, ap->ioaddr.ctl_addr);
3256 * ata_dev_same_device - Determine whether new ID matches configured device
3257 * @dev: device to compare against
3258 * @new_class: class of the new device
3259 * @new_id: IDENTIFY page of the new device
3261 * Compare @new_class and @new_id against @dev and determine
3262 * whether @dev is the device indicated by @new_class and
3269 * 1 if @dev matches @new_class and @new_id, 0 otherwise.
3271 static int ata_dev_same_device(struct ata_device *dev, unsigned int new_class,
3274 const u16 *old_id = dev->id;
3275 unsigned char model[2][ATA_ID_PROD_LEN + 1];
3276 unsigned char serial[2][ATA_ID_SERNO_LEN + 1];
3279 if (dev->class != new_class) {
3280 ata_dev_printk(dev, KERN_INFO, "class mismatch %d != %d\n",
3281 dev->class, new_class);
3285 ata_id_c_string(old_id, model[0], ATA_ID_PROD, sizeof(model[0]));
3286 ata_id_c_string(new_id, model[1], ATA_ID_PROD, sizeof(model[1]));
3287 ata_id_c_string(old_id, serial[0], ATA_ID_SERNO, sizeof(serial[0]));
3288 ata_id_c_string(new_id, serial[1], ATA_ID_SERNO, sizeof(serial[1]));
3289 new_n_sectors = ata_id_n_sectors(new_id);
3291 if (strcmp(model[0], model[1])) {
3292 ata_dev_printk(dev, KERN_INFO, "model number mismatch "
3293 "'%s' != '%s'\n", model[0], model[1]);
3297 if (strcmp(serial[0], serial[1])) {
3298 ata_dev_printk(dev, KERN_INFO, "serial number mismatch "
3299 "'%s' != '%s'\n", serial[0], serial[1]);
3303 if (dev->class == ATA_DEV_ATA && dev->n_sectors != new_n_sectors) {
3304 ata_dev_printk(dev, KERN_INFO, "n_sectors mismatch "
3306 (unsigned long long)dev->n_sectors,
3307 (unsigned long long)new_n_sectors);
3315 * ata_dev_revalidate - Revalidate ATA device
3316 * @dev: device to revalidate
3317 * @readid_flags: read ID flags
3319 * Re-read IDENTIFY page and make sure @dev is still attached to
3323 * Kernel thread context (may sleep)
3326 * 0 on success, negative errno otherwise
3328 int ata_dev_revalidate(struct ata_device *dev, unsigned int readid_flags)
3330 unsigned int class = dev->class;
3331 u16 *id = (void *)dev->ap->sector_buf;
3334 if (!ata_dev_enabled(dev)) {
3340 rc = ata_dev_read_id(dev, &class, readid_flags, id);
3344 /* is the device still there? */
3345 if (!ata_dev_same_device(dev, class, id)) {
3350 memcpy(dev->id, id, sizeof(id[0]) * ATA_ID_WORDS);
3352 /* configure device according to the new ID */
3353 rc = ata_dev_configure(dev);
3358 ata_dev_printk(dev, KERN_ERR, "revalidation failed (errno=%d)\n", rc);
3362 struct ata_blacklist_entry {
3363 const char *model_num;
3364 const char *model_rev;
3365 unsigned long horkage;
3368 static const struct ata_blacklist_entry ata_device_blacklist [] = {
3369 /* Devices with DMA related problems under Linux */
3370 { "WDC AC11000H", NULL, ATA_HORKAGE_NODMA },
3371 { "WDC AC22100H", NULL, ATA_HORKAGE_NODMA },
3372 { "WDC AC32500H", NULL, ATA_HORKAGE_NODMA },
3373 { "WDC AC33100H", NULL, ATA_HORKAGE_NODMA },
3374 { "WDC AC31600H", NULL, ATA_HORKAGE_NODMA },
3375 { "WDC AC32100H", "24.09P07", ATA_HORKAGE_NODMA },
3376 { "WDC AC23200L", "21.10N21", ATA_HORKAGE_NODMA },
3377 { "Compaq CRD-8241B", NULL, ATA_HORKAGE_NODMA },
3378 { "CRD-8400B", NULL, ATA_HORKAGE_NODMA },
3379 { "CRD-8480B", NULL, ATA_HORKAGE_NODMA },
3380 { "CRD-8482B", NULL, ATA_HORKAGE_NODMA },
3381 { "CRD-84", NULL, ATA_HORKAGE_NODMA },
3382 { "SanDisk SDP3B", NULL, ATA_HORKAGE_NODMA },
3383 { "SanDisk SDP3B-64", NULL, ATA_HORKAGE_NODMA },
3384 { "SANYO CD-ROM CRD", NULL, ATA_HORKAGE_NODMA },
3385 { "HITACHI CDR-8", NULL, ATA_HORKAGE_NODMA },
3386 { "HITACHI CDR-8335", NULL, ATA_HORKAGE_NODMA },
3387 { "HITACHI CDR-8435", NULL, ATA_HORKAGE_NODMA },
3388 { "Toshiba CD-ROM XM-6202B", NULL, ATA_HORKAGE_NODMA },
3389 { "TOSHIBA CD-ROM XM-1702BC", NULL, ATA_HORKAGE_NODMA },
3390 { "CD-532E-A", NULL, ATA_HORKAGE_NODMA },
3391 { "E-IDE CD-ROM CR-840",NULL, ATA_HORKAGE_NODMA },
3392 { "CD-ROM Drive/F5A", NULL, ATA_HORKAGE_NODMA },
3393 { "WPI CDD-820", NULL, ATA_HORKAGE_NODMA },
3394 { "SAMSUNG CD-ROM SC-148C", NULL, ATA_HORKAGE_NODMA },
3395 { "SAMSUNG CD-ROM SC", NULL, ATA_HORKAGE_NODMA },
3396 { "ATAPI CD-ROM DRIVE 40X MAXIMUM",NULL,ATA_HORKAGE_NODMA },
3397 { "_NEC DV5800A", NULL, ATA_HORKAGE_NODMA },
3398 { "SAMSUNG CD-ROM SN-124","N001", ATA_HORKAGE_NODMA },
3400 /* Weird ATAPI devices */
3401 { "TORiSAN DVD-ROM DRD-N216", NULL, ATA_HORKAGE_MAX_SEC_128 |
3402 ATA_HORKAGE_DMA_RW_ONLY },
3404 /* Devices we expect to fail diagnostics */
3406 /* Devices where NCQ should be avoided */
3408 { "WDC WD740ADFD-00", NULL, ATA_HORKAGE_NONCQ },
3409 /* http://thread.gmane.org/gmane.linux.ide/14907 */
3410 { "FUJITSU MHT2060BH", NULL, ATA_HORKAGE_NONCQ },
3412 { "Maxtor 6L250S0", "BANC1G10", ATA_HORKAGE_NONCQ },
3413 /* NCQ hard hangs device under heavier load, needs hard power cycle */
3414 { "Maxtor 6B250S0", "BANC1B70", ATA_HORKAGE_NONCQ },
3415 /* Blacklist entries taken from Silicon Image 3124/3132
3416 Windows driver .inf file - also several Linux problem reports */
3417 { "HTS541060G9SA00", "MB3OC60D", ATA_HORKAGE_NONCQ, },
3418 { "HTS541080G9SA00", "MB4OC60D", ATA_HORKAGE_NONCQ, },
3419 { "HTS541010G9SA00", "MBZOC60D", ATA_HORKAGE_NONCQ, },
3421 /* Devices with NCQ limits */
3427 unsigned long ata_device_blacklisted(const struct ata_device *dev)
3429 unsigned char model_num[ATA_ID_PROD_LEN + 1];
3430 unsigned char model_rev[ATA_ID_FW_REV_LEN + 1];
3431 const struct ata_blacklist_entry *ad = ata_device_blacklist;
3433 ata_id_c_string(dev->id, model_num, ATA_ID_PROD, sizeof(model_num));
3434 ata_id_c_string(dev->id, model_rev, ATA_ID_FW_REV, sizeof(model_rev));
3436 while (ad->model_num) {
3437 if (!strcmp(ad->model_num, model_num)) {
3438 if (ad->model_rev == NULL)
3440 if (!strcmp(ad->model_rev, model_rev))
3448 static int ata_dma_blacklisted(const struct ata_device *dev)
3450 /* We don't support polling DMA.
3451 * DMA blacklist those ATAPI devices with CDB-intr (and use PIO)
3452 * if the LLDD handles only interrupts in the HSM_ST_LAST state.
3454 if ((dev->ap->flags & ATA_FLAG_PIO_POLLING) &&
3455 (dev->flags & ATA_DFLAG_CDB_INTR))
3457 return (ata_device_blacklisted(dev) & ATA_HORKAGE_NODMA) ? 1 : 0;
3461 * ata_dev_xfermask - Compute supported xfermask of the given device
3462 * @dev: Device to compute xfermask for
3464 * Compute supported xfermask of @dev and store it in
3465 * dev->*_mask. This function is responsible for applying all
3466 * known limits including host controller limits, device
3472 static void ata_dev_xfermask(struct ata_device *dev)
3474 struct ata_port *ap = dev->ap;
3475 struct ata_host *host = ap->host;
3476 unsigned long xfer_mask;
3478 /* controller modes available */
3479 xfer_mask = ata_pack_xfermask(ap->pio_mask,
3480 ap->mwdma_mask, ap->udma_mask);
3482 /* drive modes available */
3483 xfer_mask &= ata_pack_xfermask(dev->pio_mask,
3484 dev->mwdma_mask, dev->udma_mask);
3485 xfer_mask &= ata_id_xfermask(dev->id);
3488 * CFA Advanced TrueIDE timings are not allowed on a shared
3491 if (ata_dev_pair(dev)) {
3492 /* No PIO5 or PIO6 */
3493 xfer_mask &= ~(0x03 << (ATA_SHIFT_PIO + 5));
3494 /* No MWDMA3 or MWDMA 4 */
3495 xfer_mask &= ~(0x03 << (ATA_SHIFT_MWDMA + 3));
3498 if (ata_dma_blacklisted(dev)) {
3499 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
3500 ata_dev_printk(dev, KERN_WARNING,
3501 "device is on DMA blacklist, disabling DMA\n");
3504 if ((host->flags & ATA_HOST_SIMPLEX) &&
3505 host->simplex_claimed && host->simplex_claimed != ap) {
3506 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
3507 ata_dev_printk(dev, KERN_WARNING, "simplex DMA is claimed by "
3508 "other device, disabling DMA\n");
3511 if (ap->ops->mode_filter)
3512 xfer_mask = ap->ops->mode_filter(ap, dev, xfer_mask);
3514 /* Apply cable rule here. Don't apply it early because when
3515 * we handle hot plug the cable type can itself change.
3516 * Check this last so that we know if the transfer rate was
3517 * solely limited by the cable.
3518 * Unknown or 80 wire cables reported host side are checked
3519 * drive side as well. Cases where we know a 40wire cable
3520 * is used safely for 80 are not checked here.
3522 if (xfer_mask & (0xF8 << ATA_SHIFT_UDMA))
3523 /* UDMA/44 or higher would be available */
3524 if((ap->cbl == ATA_CBL_PATA40) ||
3525 (ata_drive_40wire(dev->id) &&
3526 (ap->cbl == ATA_CBL_PATA_UNK ||
3527 ap->cbl == ATA_CBL_PATA80))) {
3528 ata_dev_printk(dev, KERN_WARNING,
3529 "limited to UDMA/33 due to 40-wire cable\n");
3530 xfer_mask &= ~(0xF8 << ATA_SHIFT_UDMA);
3533 ata_unpack_xfermask(xfer_mask, &dev->pio_mask,
3534 &dev->mwdma_mask, &dev->udma_mask);
3538 * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command
3539 * @dev: Device to which command will be sent
3541 * Issue SET FEATURES - XFER MODE command to device @dev
3545 * PCI/etc. bus probe sem.
3548 * 0 on success, AC_ERR_* mask otherwise.
3551 static unsigned int ata_dev_set_xfermode(struct ata_device *dev)
3553 struct ata_taskfile tf;
3554 unsigned int err_mask;
3556 /* set up set-features taskfile */
3557 DPRINTK("set features - xfer mode\n");
3559 ata_tf_init(dev, &tf);
3560 tf.command = ATA_CMD_SET_FEATURES;
3561 tf.feature = SETFEATURES_XFER;
3562 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
3563 tf.protocol = ATA_PROT_NODATA;
3564 tf.nsect = dev->xfer_mode;
3566 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
3568 DPRINTK("EXIT, err_mask=%x\n", err_mask);
3573 * ata_dev_init_params - Issue INIT DEV PARAMS command
3574 * @dev: Device to which command will be sent
3575 * @heads: Number of heads (taskfile parameter)
3576 * @sectors: Number of sectors (taskfile parameter)
3579 * Kernel thread context (may sleep)
3582 * 0 on success, AC_ERR_* mask otherwise.
3584 static unsigned int ata_dev_init_params(struct ata_device *dev,
3585 u16 heads, u16 sectors)
3587 struct ata_taskfile tf;
3588 unsigned int err_mask;
3590 /* Number of sectors per track 1-255. Number of heads 1-16 */
3591 if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16)
3592 return AC_ERR_INVALID;
3594 /* set up init dev params taskfile */
3595 DPRINTK("init dev params \n");
3597 ata_tf_init(dev, &tf);
3598 tf.command = ATA_CMD_INIT_DEV_PARAMS;
3599 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
3600 tf.protocol = ATA_PROT_NODATA;
3602 tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */
3604 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
3606 DPRINTK("EXIT, err_mask=%x\n", err_mask);
3611 * ata_sg_clean - Unmap DMA memory associated with command
3612 * @qc: Command containing DMA memory to be released
3614 * Unmap all mapped DMA memory associated with this command.
3617 * spin_lock_irqsave(host lock)
3619 void ata_sg_clean(struct ata_queued_cmd *qc)
3621 struct ata_port *ap = qc->ap;
3622 struct scatterlist *sg = qc->__sg;
3623 int dir = qc->dma_dir;
3624 void *pad_buf = NULL;
3626 WARN_ON(!(qc->flags & ATA_QCFLAG_DMAMAP));
3627 WARN_ON(sg == NULL);
3629 if (qc->flags & ATA_QCFLAG_SINGLE)
3630 WARN_ON(qc->n_elem > 1);
3632 VPRINTK("unmapping %u sg elements\n", qc->n_elem);
3634 /* if we padded the buffer out to 32-bit bound, and data
3635 * xfer direction is from-device, we must copy from the
3636 * pad buffer back into the supplied buffer
3638 if (qc->pad_len && !(qc->tf.flags & ATA_TFLAG_WRITE))
3639 pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3641 if (qc->flags & ATA_QCFLAG_SG) {
3643 dma_unmap_sg(ap->dev, sg, qc->n_elem, dir);
3644 /* restore last sg */
3645 sg[qc->orig_n_elem - 1].length += qc->pad_len;
3647 struct scatterlist *psg = &qc->pad_sgent;
3648 void *addr = kmap_atomic(psg->page, KM_IRQ0);
3649 memcpy(addr + psg->offset, pad_buf, qc->pad_len);
3650 kunmap_atomic(addr, KM_IRQ0);
3654 dma_unmap_single(ap->dev,
3655 sg_dma_address(&sg[0]), sg_dma_len(&sg[0]),
3658 sg->length += qc->pad_len;
3660 memcpy(qc->buf_virt + sg->length - qc->pad_len,
3661 pad_buf, qc->pad_len);
3664 qc->flags &= ~ATA_QCFLAG_DMAMAP;
3669 * ata_fill_sg - Fill PCI IDE PRD table
3670 * @qc: Metadata associated with taskfile to be transferred
3672 * Fill PCI IDE PRD (scatter-gather) table with segments
3673 * associated with the current disk command.
3676 * spin_lock_irqsave(host lock)
3679 static void ata_fill_sg(struct ata_queued_cmd *qc)
3681 struct ata_port *ap = qc->ap;
3682 struct scatterlist *sg;
3685 WARN_ON(qc->__sg == NULL);
3686 WARN_ON(qc->n_elem == 0 && qc->pad_len == 0);
3689 ata_for_each_sg(sg, qc) {
3693 /* determine if physical DMA addr spans 64K boundary.
3694 * Note h/w doesn't support 64-bit, so we unconditionally
3695 * truncate dma_addr_t to u32.
3697 addr = (u32) sg_dma_address(sg);
3698 sg_len = sg_dma_len(sg);
3701 offset = addr & 0xffff;
3703 if ((offset + sg_len) > 0x10000)
3704 len = 0x10000 - offset;
3706 ap->prd[idx].addr = cpu_to_le32(addr);
3707 ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff);
3708 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
3717 ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
3720 * ata_check_atapi_dma - Check whether ATAPI DMA can be supported
3721 * @qc: Metadata associated with taskfile to check
3723 * Allow low-level driver to filter ATA PACKET commands, returning
3724 * a status indicating whether or not it is OK to use DMA for the
3725 * supplied PACKET command.
3728 * spin_lock_irqsave(host lock)
3730 * RETURNS: 0 when ATAPI DMA can be used
3733 int ata_check_atapi_dma(struct ata_queued_cmd *qc)
3735 struct ata_port *ap = qc->ap;
3736 int rc = 0; /* Assume ATAPI DMA is OK by default */
3738 /* some drives can only do ATAPI DMA on read/write */
3739 if (unlikely(qc->dev->horkage & ATA_HORKAGE_DMA_RW_ONLY)) {
3740 struct scsi_cmnd *cmd = qc->scsicmd;
3741 u8 *scsicmd = cmd->cmnd;
3743 switch (scsicmd[0]) {
3750 /* atapi dma maybe ok */
3753 /* turn off atapi dma */
3758 if (ap->ops->check_atapi_dma)
3759 rc = ap->ops->check_atapi_dma(qc);
3764 * ata_qc_prep - Prepare taskfile for submission
3765 * @qc: Metadata associated with taskfile to be prepared
3767 * Prepare ATA taskfile for submission.
3770 * spin_lock_irqsave(host lock)
3772 void ata_qc_prep(struct ata_queued_cmd *qc)
3774 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
3780 void ata_noop_qc_prep(struct ata_queued_cmd *qc) { }
3783 * ata_sg_init_one - Associate command with memory buffer
3784 * @qc: Command to be associated
3785 * @buf: Memory buffer
3786 * @buflen: Length of memory buffer, in bytes.
3788 * Initialize the data-related elements of queued_cmd @qc
3789 * to point to a single memory buffer, @buf of byte length @buflen.
3792 * spin_lock_irqsave(host lock)
3795 void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen)
3797 qc->flags |= ATA_QCFLAG_SINGLE;
3799 qc->__sg = &qc->sgent;
3801 qc->orig_n_elem = 1;
3803 qc->nbytes = buflen;
3805 sg_init_one(&qc->sgent, buf, buflen);
3809 * ata_sg_init - Associate command with scatter-gather table.
3810 * @qc: Command to be associated
3811 * @sg: Scatter-gather table.
3812 * @n_elem: Number of elements in s/g table.
3814 * Initialize the data-related elements of queued_cmd @qc
3815 * to point to a scatter-gather table @sg, containing @n_elem
3819 * spin_lock_irqsave(host lock)
3822 void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
3823 unsigned int n_elem)
3825 qc->flags |= ATA_QCFLAG_SG;
3827 qc->n_elem = n_elem;
3828 qc->orig_n_elem = n_elem;
3832 * ata_sg_setup_one - DMA-map the memory buffer associated with a command.
3833 * @qc: Command with memory buffer to be mapped.
3835 * DMA-map the memory buffer associated with queued_cmd @qc.
3838 * spin_lock_irqsave(host lock)
3841 * Zero on success, negative on error.
3844 static int ata_sg_setup_one(struct ata_queued_cmd *qc)
3846 struct ata_port *ap = qc->ap;
3847 int dir = qc->dma_dir;
3848 struct scatterlist *sg = qc->__sg;
3849 dma_addr_t dma_address;
3852 /* we must lengthen transfers to end on a 32-bit boundary */
3853 qc->pad_len = sg->length & 3;
3855 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3856 struct scatterlist *psg = &qc->pad_sgent;
3858 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
3860 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
3862 if (qc->tf.flags & ATA_TFLAG_WRITE)
3863 memcpy(pad_buf, qc->buf_virt + sg->length - qc->pad_len,
3866 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
3867 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
3869 sg->length -= qc->pad_len;
3870 if (sg->length == 0)
3873 DPRINTK("padding done, sg->length=%u pad_len=%u\n",
3874 sg->length, qc->pad_len);
3882 dma_address = dma_map_single(ap->dev, qc->buf_virt,
3884 if (dma_mapping_error(dma_address)) {
3886 sg->length += qc->pad_len;
3890 sg_dma_address(sg) = dma_address;
3891 sg_dma_len(sg) = sg->length;
3894 DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg),
3895 qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3901 * ata_sg_setup - DMA-map the scatter-gather table associated with a command.
3902 * @qc: Command with scatter-gather table to be mapped.
3904 * DMA-map the scatter-gather table associated with queued_cmd @qc.
3907 * spin_lock_irqsave(host lock)
3910 * Zero on success, negative on error.
3914 static int ata_sg_setup(struct ata_queued_cmd *qc)
3916 struct ata_port *ap = qc->ap;
3917 struct scatterlist *sg = qc->__sg;
3918 struct scatterlist *lsg = &sg[qc->n_elem - 1];
3919 int n_elem, pre_n_elem, dir, trim_sg = 0;
3921 VPRINTK("ENTER, ata%u\n", ap->print_id);
3922 WARN_ON(!(qc->flags & ATA_QCFLAG_SG));
3924 /* we must lengthen transfers to end on a 32-bit boundary */
3925 qc->pad_len = lsg->length & 3;
3927 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3928 struct scatterlist *psg = &qc->pad_sgent;
3929 unsigned int offset;
3931 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
3933 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
3936 * psg->page/offset are used to copy to-be-written
3937 * data in this function or read data in ata_sg_clean.
3939 offset = lsg->offset + lsg->length - qc->pad_len;
3940 psg->page = nth_page(lsg->page, offset >> PAGE_SHIFT);
3941 psg->offset = offset_in_page(offset);
3943 if (qc->tf.flags & ATA_TFLAG_WRITE) {
3944 void *addr = kmap_atomic(psg->page, KM_IRQ0);
3945 memcpy(pad_buf, addr + psg->offset, qc->pad_len);
3946 kunmap_atomic(addr, KM_IRQ0);
3949 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
3950 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
3952 lsg->length -= qc->pad_len;
3953 if (lsg->length == 0)
3956 DPRINTK("padding done, sg[%d].length=%u pad_len=%u\n",
3957 qc->n_elem - 1, lsg->length, qc->pad_len);
3960 pre_n_elem = qc->n_elem;
3961 if (trim_sg && pre_n_elem)
3970 n_elem = dma_map_sg(ap->dev, sg, pre_n_elem, dir);
3972 /* restore last sg */
3973 lsg->length += qc->pad_len;
3977 DPRINTK("%d sg elements mapped\n", n_elem);
3980 qc->n_elem = n_elem;
3986 * swap_buf_le16 - swap halves of 16-bit words in place
3987 * @buf: Buffer to swap
3988 * @buf_words: Number of 16-bit words in buffer.
3990 * Swap halves of 16-bit words if needed to convert from
3991 * little-endian byte order to native cpu byte order, or
3995 * Inherited from caller.
3997 void swap_buf_le16(u16 *buf, unsigned int buf_words)
4002 for (i = 0; i < buf_words; i++)
4003 buf[i] = le16_to_cpu(buf[i]);
4004 #endif /* __BIG_ENDIAN */
4008 * ata_data_xfer - Transfer data by PIO
4009 * @adev: device to target
4011 * @buflen: buffer length
4012 * @write_data: read/write
4014 * Transfer data from/to the device data register by PIO.
4017 * Inherited from caller.
4019 void ata_data_xfer(struct ata_device *adev, unsigned char *buf,
4020 unsigned int buflen, int write_data)
4022 struct ata_port *ap = adev->ap;
4023 unsigned int words = buflen >> 1;
4025 /* Transfer multiple of 2 bytes */
4027 iowrite16_rep(ap->ioaddr.data_addr, buf, words);
4029 ioread16_rep(ap->ioaddr.data_addr, buf, words);
4031 /* Transfer trailing 1 byte, if any. */
4032 if (unlikely(buflen & 0x01)) {
4033 u16 align_buf[1] = { 0 };
4034 unsigned char *trailing_buf = buf + buflen - 1;
4037 memcpy(align_buf, trailing_buf, 1);
4038 iowrite16(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr);
4040 align_buf[0] = cpu_to_le16(ioread16(ap->ioaddr.data_addr));
4041 memcpy(trailing_buf, align_buf, 1);
4047 * ata_data_xfer_noirq - Transfer data by PIO
4048 * @adev: device to target
4050 * @buflen: buffer length
4051 * @write_data: read/write
4053 * Transfer data from/to the device data register by PIO. Do the
4054 * transfer with interrupts disabled.
4057 * Inherited from caller.
4059 void ata_data_xfer_noirq(struct ata_device *adev, unsigned char *buf,
4060 unsigned int buflen, int write_data)
4062 unsigned long flags;
4063 local_irq_save(flags);
4064 ata_data_xfer(adev, buf, buflen, write_data);
4065 local_irq_restore(flags);
4070 * ata_pio_sector - Transfer ATA_SECT_SIZE (512 bytes) of data.
4071 * @qc: Command on going
4073 * Transfer ATA_SECT_SIZE of data from/to the ATA device.
4076 * Inherited from caller.
4079 static void ata_pio_sector(struct ata_queued_cmd *qc)
4081 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
4082 struct scatterlist *sg = qc->__sg;
4083 struct ata_port *ap = qc->ap;
4085 unsigned int offset;
4088 if (qc->curbytes == qc->nbytes - ATA_SECT_SIZE)
4089 ap->hsm_task_state = HSM_ST_LAST;
4091 page = sg[qc->cursg].page;
4092 offset = sg[qc->cursg].offset + qc->cursg_ofs;
4094 /* get the current page and offset */
4095 page = nth_page(page, (offset >> PAGE_SHIFT));
4096 offset %= PAGE_SIZE;
4098 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
4100 if (PageHighMem(page)) {
4101 unsigned long flags;
4103 /* FIXME: use a bounce buffer */
4104 local_irq_save(flags);
4105 buf = kmap_atomic(page, KM_IRQ0);
4107 /* do the actual data transfer */
4108 ap->ops->data_xfer(qc->dev, buf + offset, ATA_SECT_SIZE, do_write);
4110 kunmap_atomic(buf, KM_IRQ0);
4111 local_irq_restore(flags);
4113 buf = page_address(page);
4114 ap->ops->data_xfer(qc->dev, buf + offset, ATA_SECT_SIZE, do_write);
4117 qc->curbytes += ATA_SECT_SIZE;
4118 qc->cursg_ofs += ATA_SECT_SIZE;
4120 if (qc->cursg_ofs == (&sg[qc->cursg])->length) {
4127 * ata_pio_sectors - Transfer one or many 512-byte sectors.
4128 * @qc: Command on going
4130 * Transfer one or many ATA_SECT_SIZE of data from/to the
4131 * ATA device for the DRQ request.
4134 * Inherited from caller.
4137 static void ata_pio_sectors(struct ata_queued_cmd *qc)
4139 if (is_multi_taskfile(&qc->tf)) {
4140 /* READ/WRITE MULTIPLE */
4143 WARN_ON(qc->dev->multi_count == 0);
4145 nsect = min((qc->nbytes - qc->curbytes) / ATA_SECT_SIZE,
4146 qc->dev->multi_count);
4154 * atapi_send_cdb - Write CDB bytes to hardware
4155 * @ap: Port to which ATAPI device is attached.
4156 * @qc: Taskfile currently active
4158 * When device has indicated its readiness to accept
4159 * a CDB, this function is called. Send the CDB.
4165 static void atapi_send_cdb(struct ata_port *ap, struct ata_queued_cmd *qc)
4168 DPRINTK("send cdb\n");
4169 WARN_ON(qc->dev->cdb_len < 12);
4171 ap->ops->data_xfer(qc->dev, qc->cdb, qc->dev->cdb_len, 1);
4172 ata_altstatus(ap); /* flush */
4174 switch (qc->tf.protocol) {
4175 case ATA_PROT_ATAPI:
4176 ap->hsm_task_state = HSM_ST;
4178 case ATA_PROT_ATAPI_NODATA:
4179 ap->hsm_task_state = HSM_ST_LAST;
4181 case ATA_PROT_ATAPI_DMA:
4182 ap->hsm_task_state = HSM_ST_LAST;
4183 /* initiate bmdma */
4184 ap->ops->bmdma_start(qc);
4190 * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
4191 * @qc: Command on going
4192 * @bytes: number of bytes
4194 * Transfer Transfer data from/to the ATAPI device.
4197 * Inherited from caller.
4201 static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
4203 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
4204 struct scatterlist *sg = qc->__sg;
4205 struct ata_port *ap = qc->ap;
4208 unsigned int offset, count;
4210 if (qc->curbytes + bytes >= qc->nbytes)
4211 ap->hsm_task_state = HSM_ST_LAST;
4214 if (unlikely(qc->cursg >= qc->n_elem)) {
4216 * The end of qc->sg is reached and the device expects
4217 * more data to transfer. In order not to overrun qc->sg
4218 * and fulfill length specified in the byte count register,
4219 * - for read case, discard trailing data from the device
4220 * - for write case, padding zero data to the device
4222 u16 pad_buf[1] = { 0 };
4223 unsigned int words = bytes >> 1;
4226 if (words) /* warning if bytes > 1 */
4227 ata_dev_printk(qc->dev, KERN_WARNING,
4228 "%u bytes trailing data\n", bytes);
4230 for (i = 0; i < words; i++)
4231 ap->ops->data_xfer(qc->dev, (unsigned char*)pad_buf, 2, do_write);
4233 ap->hsm_task_state = HSM_ST_LAST;
4237 sg = &qc->__sg[qc->cursg];
4240 offset = sg->offset + qc->cursg_ofs;
4242 /* get the current page and offset */
4243 page = nth_page(page, (offset >> PAGE_SHIFT));
4244 offset %= PAGE_SIZE;
4246 /* don't overrun current sg */
4247 count = min(sg->length - qc->cursg_ofs, bytes);
4249 /* don't cross page boundaries */
4250 count = min(count, (unsigned int)PAGE_SIZE - offset);
4252 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
4254 if (PageHighMem(page)) {
4255 unsigned long flags;
4257 /* FIXME: use bounce buffer */
4258 local_irq_save(flags);
4259 buf = kmap_atomic(page, KM_IRQ0);
4261 /* do the actual data transfer */
4262 ap->ops->data_xfer(qc->dev, buf + offset, count, do_write);
4264 kunmap_atomic(buf, KM_IRQ0);
4265 local_irq_restore(flags);
4267 buf = page_address(page);
4268 ap->ops->data_xfer(qc->dev, buf + offset, count, do_write);
4272 qc->curbytes += count;
4273 qc->cursg_ofs += count;
4275 if (qc->cursg_ofs == sg->length) {
4285 * atapi_pio_bytes - Transfer data from/to the ATAPI device.
4286 * @qc: Command on going
4288 * Transfer Transfer data from/to the ATAPI device.
4291 * Inherited from caller.
4294 static void atapi_pio_bytes(struct ata_queued_cmd *qc)
4296 struct ata_port *ap = qc->ap;
4297 struct ata_device *dev = qc->dev;
4298 unsigned int ireason, bc_lo, bc_hi, bytes;
4299 int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0;
4301 /* Abuse qc->result_tf for temp storage of intermediate TF
4302 * here to save some kernel stack usage.
4303 * For normal completion, qc->result_tf is not relevant. For
4304 * error, qc->result_tf is later overwritten by ata_qc_complete().
4305 * So, the correctness of qc->result_tf is not affected.
4307 ap->ops->tf_read(ap, &qc->result_tf);
4308 ireason = qc->result_tf.nsect;
4309 bc_lo = qc->result_tf.lbam;
4310 bc_hi = qc->result_tf.lbah;
4311 bytes = (bc_hi << 8) | bc_lo;
4313 /* shall be cleared to zero, indicating xfer of data */
4314 if (ireason & (1 << 0))
4317 /* make sure transfer direction matches expected */
4318 i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0;
4319 if (do_write != i_write)
4322 VPRINTK("ata%u: xfering %d bytes\n", ap->print_id, bytes);
4324 __atapi_pio_bytes(qc, bytes);
4329 ata_dev_printk(dev, KERN_INFO, "ATAPI check failed\n");
4330 qc->err_mask |= AC_ERR_HSM;
4331 ap->hsm_task_state = HSM_ST_ERR;
4335 * ata_hsm_ok_in_wq - Check if the qc can be handled in the workqueue.
4336 * @ap: the target ata_port
4340 * 1 if ok in workqueue, 0 otherwise.
4343 static inline int ata_hsm_ok_in_wq(struct ata_port *ap, struct ata_queued_cmd *qc)
4345 if (qc->tf.flags & ATA_TFLAG_POLLING)
4348 if (ap->hsm_task_state == HSM_ST_FIRST) {
4349 if (qc->tf.protocol == ATA_PROT_PIO &&
4350 (qc->tf.flags & ATA_TFLAG_WRITE))
4353 if (is_atapi_taskfile(&qc->tf) &&
4354 !(qc->dev->flags & ATA_DFLAG_CDB_INTR))
4362 * ata_hsm_qc_complete - finish a qc running on standard HSM
4363 * @qc: Command to complete
4364 * @in_wq: 1 if called from workqueue, 0 otherwise
4366 * Finish @qc which is running on standard HSM.
4369 * If @in_wq is zero, spin_lock_irqsave(host lock).
4370 * Otherwise, none on entry and grabs host lock.
4372 static void ata_hsm_qc_complete(struct ata_queued_cmd *qc, int in_wq)
4374 struct ata_port *ap = qc->ap;
4375 unsigned long flags;
4377 if (ap->ops->error_handler) {
4379 spin_lock_irqsave(ap->lock, flags);
4381 /* EH might have kicked in while host lock is
4384 qc = ata_qc_from_tag(ap, qc->tag);
4386 if (likely(!(qc->err_mask & AC_ERR_HSM))) {
4387 ap->ops->irq_on(ap);
4388 ata_qc_complete(qc);
4390 ata_port_freeze(ap);
4393 spin_unlock_irqrestore(ap->lock, flags);
4395 if (likely(!(qc->err_mask & AC_ERR_HSM)))
4396 ata_qc_complete(qc);
4398 ata_port_freeze(ap);
4402 spin_lock_irqsave(ap->lock, flags);
4403 ap->ops->irq_on(ap);
4404 ata_qc_complete(qc);
4405 spin_unlock_irqrestore(ap->lock, flags);
4407 ata_qc_complete(qc);
4410 ata_altstatus(ap); /* flush */
4414 * ata_hsm_move - move the HSM to the next state.
4415 * @ap: the target ata_port
4417 * @status: current device status
4418 * @in_wq: 1 if called from workqueue, 0 otherwise
4421 * 1 when poll next status needed, 0 otherwise.
4423 int ata_hsm_move(struct ata_port *ap, struct ata_queued_cmd *qc,
4424 u8 status, int in_wq)
4426 unsigned long flags = 0;
4429 WARN_ON((qc->flags & ATA_QCFLAG_ACTIVE) == 0);
4431 /* Make sure ata_qc_issue_prot() does not throw things
4432 * like DMA polling into the workqueue. Notice that
4433 * in_wq is not equivalent to (qc->tf.flags & ATA_TFLAG_POLLING).
4435 WARN_ON(in_wq != ata_hsm_ok_in_wq(ap, qc));
4438 DPRINTK("ata%u: protocol %d task_state %d (dev_stat 0x%X)\n",
4439 ap->print_id, qc->tf.protocol, ap->hsm_task_state, status);
4441 switch (ap->hsm_task_state) {
4443 /* Send first data block or PACKET CDB */
4445 /* If polling, we will stay in the work queue after
4446 * sending the data. Otherwise, interrupt handler
4447 * takes over after sending the data.
4449 poll_next = (qc->tf.flags & ATA_TFLAG_POLLING);
4451 /* check device status */
4452 if (unlikely((status & ATA_DRQ) == 0)) {
4453 /* handle BSY=0, DRQ=0 as error */
4454 if (likely(status & (ATA_ERR | ATA_DF)))
4455 /* device stops HSM for abort/error */
4456 qc->err_mask |= AC_ERR_DEV;
4458 /* HSM violation. Let EH handle this */
4459 qc->err_mask |= AC_ERR_HSM;
4461 ap->hsm_task_state = HSM_ST_ERR;
4465 /* Device should not ask for data transfer (DRQ=1)
4466 * when it finds something wrong.
4467 * We ignore DRQ here and stop the HSM by
4468 * changing hsm_task_state to HSM_ST_ERR and
4469 * let the EH abort the command or reset the device.
4471 if (unlikely(status & (ATA_ERR | ATA_DF))) {
4472 ata_port_printk(ap, KERN_WARNING, "DRQ=1 with device "
4473 "error, dev_stat 0x%X\n", status);
4474 qc->err_mask |= AC_ERR_HSM;
4475 ap->hsm_task_state = HSM_ST_ERR;
4479 /* Send the CDB (atapi) or the first data block (ata pio out).
4480 * During the state transition, interrupt handler shouldn't
4481 * be invoked before the data transfer is complete and
4482 * hsm_task_state is changed. Hence, the following locking.
4485 spin_lock_irqsave(ap->lock, flags);
4487 if (qc->tf.protocol == ATA_PROT_PIO) {
4488 /* PIO data out protocol.
4489 * send first data block.
4492 /* ata_pio_sectors() might change the state
4493 * to HSM_ST_LAST. so, the state is changed here
4494 * before ata_pio_sectors().
4496 ap->hsm_task_state = HSM_ST;
4497 ata_pio_sectors(qc);
4498 ata_altstatus(ap); /* flush */
4501 atapi_send_cdb(ap, qc);
4504 spin_unlock_irqrestore(ap->lock, flags);
4506 /* if polling, ata_pio_task() handles the rest.
4507 * otherwise, interrupt handler takes over from here.
4512 /* complete command or read/write the data register */
4513 if (qc->tf.protocol == ATA_PROT_ATAPI) {
4514 /* ATAPI PIO protocol */
4515 if ((status & ATA_DRQ) == 0) {
4516 /* No more data to transfer or device error.
4517 * Device error will be tagged in HSM_ST_LAST.
4519 ap->hsm_task_state = HSM_ST_LAST;
4523 /* Device should not ask for data transfer (DRQ=1)
4524 * when it finds something wrong.
4525 * We ignore DRQ here and stop the HSM by
4526 * changing hsm_task_state to HSM_ST_ERR and
4527 * let the EH abort the command or reset the device.
4529 if (unlikely(status & (ATA_ERR | ATA_DF))) {
4530 ata_port_printk(ap, KERN_WARNING, "DRQ=1 with "
4531 "device error, dev_stat 0x%X\n",
4533 qc->err_mask |= AC_ERR_HSM;
4534 ap->hsm_task_state = HSM_ST_ERR;
4538 atapi_pio_bytes(qc);
4540 if (unlikely(ap->hsm_task_state == HSM_ST_ERR))
4541 /* bad ireason reported by device */
4545 /* ATA PIO protocol */
4546 if (unlikely((status & ATA_DRQ) == 0)) {
4547 /* handle BSY=0, DRQ=0 as error */
4548 if (likely(status & (ATA_ERR | ATA_DF)))
4549 /* device stops HSM for abort/error */
4550 qc->err_mask |= AC_ERR_DEV;
4552 /* HSM violation. Let EH handle this.
4553 * Phantom devices also trigger this
4554 * condition. Mark hint.
4556 qc->err_mask |= AC_ERR_HSM |
4559 ap->hsm_task_state = HSM_ST_ERR;
4563 /* For PIO reads, some devices may ask for
4564 * data transfer (DRQ=1) alone with ERR=1.
4565 * We respect DRQ here and transfer one
4566 * block of junk data before changing the
4567 * hsm_task_state to HSM_ST_ERR.
4569 * For PIO writes, ERR=1 DRQ=1 doesn't make
4570 * sense since the data block has been
4571 * transferred to the device.
4573 if (unlikely(status & (ATA_ERR | ATA_DF))) {
4574 /* data might be corrputed */
4575 qc->err_mask |= AC_ERR_DEV;
4577 if (!(qc->tf.flags & ATA_TFLAG_WRITE)) {
4578 ata_pio_sectors(qc);
4580 status = ata_wait_idle(ap);
4583 if (status & (ATA_BUSY | ATA_DRQ))
4584 qc->err_mask |= AC_ERR_HSM;
4586 /* ata_pio_sectors() might change the
4587 * state to HSM_ST_LAST. so, the state
4588 * is changed after ata_pio_sectors().
4590 ap->hsm_task_state = HSM_ST_ERR;
4594 ata_pio_sectors(qc);
4596 if (ap->hsm_task_state == HSM_ST_LAST &&
4597 (!(qc->tf.flags & ATA_TFLAG_WRITE))) {
4600 status = ata_wait_idle(ap);
4605 ata_altstatus(ap); /* flush */
4610 if (unlikely(!ata_ok(status))) {
4611 qc->err_mask |= __ac_err_mask(status);
4612 ap->hsm_task_state = HSM_ST_ERR;
4616 /* no more data to transfer */
4617 DPRINTK("ata%u: dev %u command complete, drv_stat 0x%x\n",
4618 ap->print_id, qc->dev->devno, status);
4620 WARN_ON(qc->err_mask);
4622 ap->hsm_task_state = HSM_ST_IDLE;
4624 /* complete taskfile transaction */
4625 ata_hsm_qc_complete(qc, in_wq);
4631 /* make sure qc->err_mask is available to
4632 * know what's wrong and recover
4634 WARN_ON(qc->err_mask == 0);
4636 ap->hsm_task_state = HSM_ST_IDLE;
4638 /* complete taskfile transaction */
4639 ata_hsm_qc_complete(qc, in_wq);
4651 static void ata_pio_task(struct work_struct *work)
4653 struct ata_port *ap =
4654 container_of(work, struct ata_port, port_task.work);
4655 struct ata_queued_cmd *qc = ap->port_task_data;
4660 WARN_ON(ap->hsm_task_state == HSM_ST_IDLE);
4663 * This is purely heuristic. This is a fast path.
4664 * Sometimes when we enter, BSY will be cleared in
4665 * a chk-status or two. If not, the drive is probably seeking
4666 * or something. Snooze for a couple msecs, then
4667 * chk-status again. If still busy, queue delayed work.
4669 status = ata_busy_wait(ap, ATA_BUSY, 5);
4670 if (status & ATA_BUSY) {
4672 status = ata_busy_wait(ap, ATA_BUSY, 10);
4673 if (status & ATA_BUSY) {
4674 ata_port_queue_task(ap, ata_pio_task, qc, ATA_SHORT_PAUSE);
4680 poll_next = ata_hsm_move(ap, qc, status, 1);
4682 /* another command or interrupt handler
4683 * may be running at this point.
4690 * ata_qc_new - Request an available ATA command, for queueing
4691 * @ap: Port associated with device @dev
4692 * @dev: Device from whom we request an available command structure
4698 static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap)
4700 struct ata_queued_cmd *qc = NULL;
4703 /* no command while frozen */
4704 if (unlikely(ap->pflags & ATA_PFLAG_FROZEN))
4707 /* the last tag is reserved for internal command. */
4708 for (i = 0; i < ATA_MAX_QUEUE - 1; i++)
4709 if (!test_and_set_bit(i, &ap->qc_allocated)) {
4710 qc = __ata_qc_from_tag(ap, i);
4721 * ata_qc_new_init - Request an available ATA command, and initialize it
4722 * @dev: Device from whom we request an available command structure
4728 struct ata_queued_cmd *ata_qc_new_init(struct ata_device *dev)
4730 struct ata_port *ap = dev->ap;
4731 struct ata_queued_cmd *qc;
4733 qc = ata_qc_new(ap);
4746 * ata_qc_free - free unused ata_queued_cmd
4747 * @qc: Command to complete
4749 * Designed to free unused ata_queued_cmd object
4750 * in case something prevents using it.
4753 * spin_lock_irqsave(host lock)
4755 void ata_qc_free(struct ata_queued_cmd *qc)
4757 struct ata_port *ap = qc->ap;
4760 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
4764 if (likely(ata_tag_valid(tag))) {
4765 qc->tag = ATA_TAG_POISON;
4766 clear_bit(tag, &ap->qc_allocated);
4770 void __ata_qc_complete(struct ata_queued_cmd *qc)
4772 struct ata_port *ap = qc->ap;
4774 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
4775 WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE));
4777 if (likely(qc->flags & ATA_QCFLAG_DMAMAP))
4780 /* command should be marked inactive atomically with qc completion */
4781 if (qc->tf.protocol == ATA_PROT_NCQ)
4782 ap->sactive &= ~(1 << qc->tag);
4784 ap->active_tag = ATA_TAG_POISON;
4786 /* atapi: mark qc as inactive to prevent the interrupt handler
4787 * from completing the command twice later, before the error handler
4788 * is called. (when rc != 0 and atapi request sense is needed)
4790 qc->flags &= ~ATA_QCFLAG_ACTIVE;
4791 ap->qc_active &= ~(1 << qc->tag);
4793 /* call completion callback */
4794 qc->complete_fn(qc);
4797 static void fill_result_tf(struct ata_queued_cmd *qc)
4799 struct ata_port *ap = qc->ap;
4801 qc->result_tf.flags = qc->tf.flags;
4802 ap->ops->tf_read(ap, &qc->result_tf);
4806 * ata_qc_complete - Complete an active ATA command
4807 * @qc: Command to complete
4808 * @err_mask: ATA Status register contents
4810 * Indicate to the mid and upper layers that an ATA
4811 * command has completed, with either an ok or not-ok status.
4814 * spin_lock_irqsave(host lock)
4816 void ata_qc_complete(struct ata_queued_cmd *qc)
4818 struct ata_port *ap = qc->ap;
4820 /* XXX: New EH and old EH use different mechanisms to
4821 * synchronize EH with regular execution path.
4823 * In new EH, a failed qc is marked with ATA_QCFLAG_FAILED.
4824 * Normal execution path is responsible for not accessing a
4825 * failed qc. libata core enforces the rule by returning NULL
4826 * from ata_qc_from_tag() for failed qcs.
4828 * Old EH depends on ata_qc_complete() nullifying completion
4829 * requests if ATA_QCFLAG_EH_SCHEDULED is set. Old EH does
4830 * not synchronize with interrupt handler. Only PIO task is
4833 if (ap->ops->error_handler) {
4834 WARN_ON(ap->pflags & ATA_PFLAG_FROZEN);
4836 if (unlikely(qc->err_mask))
4837 qc->flags |= ATA_QCFLAG_FAILED;
4839 if (unlikely(qc->flags & ATA_QCFLAG_FAILED)) {
4840 if (!ata_tag_internal(qc->tag)) {
4841 /* always fill result TF for failed qc */
4843 ata_qc_schedule_eh(qc);
4848 /* read result TF if requested */
4849 if (qc->flags & ATA_QCFLAG_RESULT_TF)
4852 __ata_qc_complete(qc);
4854 if (qc->flags & ATA_QCFLAG_EH_SCHEDULED)
4857 /* read result TF if failed or requested */
4858 if (qc->err_mask || qc->flags & ATA_QCFLAG_RESULT_TF)
4861 __ata_qc_complete(qc);
4866 * ata_qc_complete_multiple - Complete multiple qcs successfully
4867 * @ap: port in question
4868 * @qc_active: new qc_active mask
4869 * @finish_qc: LLDD callback invoked before completing a qc
4871 * Complete in-flight commands. This functions is meant to be
4872 * called from low-level driver's interrupt routine to complete
4873 * requests normally. ap->qc_active and @qc_active is compared
4874 * and commands are completed accordingly.
4877 * spin_lock_irqsave(host lock)
4880 * Number of completed commands on success, -errno otherwise.
4882 int ata_qc_complete_multiple(struct ata_port *ap, u32 qc_active,
4883 void (*finish_qc)(struct ata_queued_cmd *))
4889 done_mask = ap->qc_active ^ qc_active;
4891 if (unlikely(done_mask & qc_active)) {
4892 ata_port_printk(ap, KERN_ERR, "illegal qc_active transition "
4893 "(%08x->%08x)\n", ap->qc_active, qc_active);
4897 for (i = 0; i < ATA_MAX_QUEUE; i++) {
4898 struct ata_queued_cmd *qc;
4900 if (!(done_mask & (1 << i)))
4903 if ((qc = ata_qc_from_tag(ap, i))) {
4906 ata_qc_complete(qc);
4914 static inline int ata_should_dma_map(struct ata_queued_cmd *qc)
4916 struct ata_port *ap = qc->ap;
4918 switch (qc->tf.protocol) {
4921 case ATA_PROT_ATAPI_DMA:
4924 case ATA_PROT_ATAPI:
4926 if (ap->flags & ATA_FLAG_PIO_DMA)
4939 * ata_qc_issue - issue taskfile to device
4940 * @qc: command to issue to device
4942 * Prepare an ATA command to submission to device.
4943 * This includes mapping the data into a DMA-able
4944 * area, filling in the S/G table, and finally
4945 * writing the taskfile to hardware, starting the command.
4948 * spin_lock_irqsave(host lock)
4950 void ata_qc_issue(struct ata_queued_cmd *qc)
4952 struct ata_port *ap = qc->ap;
4954 /* Make sure only one non-NCQ command is outstanding. The
4955 * check is skipped for old EH because it reuses active qc to
4956 * request ATAPI sense.
4958 WARN_ON(ap->ops->error_handler && ata_tag_valid(ap->active_tag));
4960 if (qc->tf.protocol == ATA_PROT_NCQ) {
4961 WARN_ON(ap->sactive & (1 << qc->tag));
4962 ap->sactive |= 1 << qc->tag;
4964 WARN_ON(ap->sactive);
4965 ap->active_tag = qc->tag;
4968 qc->flags |= ATA_QCFLAG_ACTIVE;
4969 ap->qc_active |= 1 << qc->tag;
4971 if (ata_should_dma_map(qc)) {
4972 if (qc->flags & ATA_QCFLAG_SG) {
4973 if (ata_sg_setup(qc))
4975 } else if (qc->flags & ATA_QCFLAG_SINGLE) {
4976 if (ata_sg_setup_one(qc))
4980 qc->flags &= ~ATA_QCFLAG_DMAMAP;
4983 ap->ops->qc_prep(qc);
4985 qc->err_mask |= ap->ops->qc_issue(qc);
4986 if (unlikely(qc->err_mask))
4991 qc->flags &= ~ATA_QCFLAG_DMAMAP;
4992 qc->err_mask |= AC_ERR_SYSTEM;
4994 ata_qc_complete(qc);
4998 * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner
4999 * @qc: command to issue to device
5001 * Using various libata functions and hooks, this function
5002 * starts an ATA command. ATA commands are grouped into
5003 * classes called "protocols", and issuing each type of protocol
5004 * is slightly different.
5006 * May be used as the qc_issue() entry in ata_port_operations.
5009 * spin_lock_irqsave(host lock)
5012 * Zero on success, AC_ERR_* mask on failure
5015 unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc)
5017 struct ata_port *ap = qc->ap;
5019 /* Use polling pio if the LLD doesn't handle
5020 * interrupt driven pio and atapi CDB interrupt.
5022 if (ap->flags & ATA_FLAG_PIO_POLLING) {
5023 switch (qc->tf.protocol) {
5025 case ATA_PROT_NODATA:
5026 case ATA_PROT_ATAPI:
5027 case ATA_PROT_ATAPI_NODATA:
5028 qc->tf.flags |= ATA_TFLAG_POLLING;
5030 case ATA_PROT_ATAPI_DMA:
5031 if (qc->dev->flags & ATA_DFLAG_CDB_INTR)
5032 /* see ata_dma_blacklisted() */
5040 /* Some controllers show flaky interrupt behavior after
5041 * setting xfer mode. Use polling instead.
5043 if (unlikely(qc->tf.command == ATA_CMD_SET_FEATURES &&
5044 qc->tf.feature == SETFEATURES_XFER) &&
5045 (ap->flags & ATA_FLAG_SETXFER_POLLING))
5046 qc->tf.flags |= ATA_TFLAG_POLLING;
5048 /* select the device */
5049 ata_dev_select(ap, qc->dev->devno, 1, 0);
5051 /* start the command */
5052 switch (qc->tf.protocol) {
5053 case ATA_PROT_NODATA:
5054 if (qc->tf.flags & ATA_TFLAG_POLLING)
5055 ata_qc_set_polling(qc);
5057 ata_tf_to_host(ap, &qc->tf);
5058 ap->hsm_task_state = HSM_ST_LAST;
5060 if (qc->tf.flags & ATA_TFLAG_POLLING)
5061 ata_port_queue_task(ap, ata_pio_task, qc, 0);
5066 WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING);
5068 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
5069 ap->ops->bmdma_setup(qc); /* set up bmdma */
5070 ap->ops->bmdma_start(qc); /* initiate bmdma */
5071 ap->hsm_task_state = HSM_ST_LAST;
5075 if (qc->tf.flags & ATA_TFLAG_POLLING)
5076 ata_qc_set_polling(qc);
5078 ata_tf_to_host(ap, &qc->tf);
5080 if (qc->tf.flags & ATA_TFLAG_WRITE) {
5081 /* PIO data out protocol */
5082 ap->hsm_task_state = HSM_ST_FIRST;
5083 ata_port_queue_task(ap, ata_pio_task, qc, 0);
5085 /* always send first data block using
5086 * the ata_pio_task() codepath.
5089 /* PIO data in protocol */
5090 ap->hsm_task_state = HSM_ST;
5092 if (qc->tf.flags & ATA_TFLAG_POLLING)
5093 ata_port_queue_task(ap, ata_pio_task, qc, 0);
5095 /* if polling, ata_pio_task() handles the rest.
5096 * otherwise, interrupt handler takes over from here.
5102 case ATA_PROT_ATAPI:
5103 case ATA_PROT_ATAPI_NODATA:
5104 if (qc->tf.flags & ATA_TFLAG_POLLING)
5105 ata_qc_set_polling(qc);
5107 ata_tf_to_host(ap, &qc->tf);
5109 ap->hsm_task_state = HSM_ST_FIRST;
5111 /* send cdb by polling if no cdb interrupt */
5112 if ((!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) ||
5113 (qc->tf.flags & ATA_TFLAG_POLLING))
5114 ata_port_queue_task(ap, ata_pio_task, qc, 0);
5117 case ATA_PROT_ATAPI_DMA:
5118 WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING);
5120 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
5121 ap->ops->bmdma_setup(qc); /* set up bmdma */
5122 ap->hsm_task_state = HSM_ST_FIRST;
5124 /* send cdb by polling if no cdb interrupt */
5125 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
5126 ata_port_queue_task(ap, ata_pio_task, qc, 0);
5131 return AC_ERR_SYSTEM;
5138 * ata_host_intr - Handle host interrupt for given (port, task)
5139 * @ap: Port on which interrupt arrived (possibly...)
5140 * @qc: Taskfile currently active in engine
5142 * Handle host interrupt for given queued command. Currently,
5143 * only DMA interrupts are handled. All other commands are
5144 * handled via polling with interrupts disabled (nIEN bit).
5147 * spin_lock_irqsave(host lock)
5150 * One if interrupt was handled, zero if not (shared irq).
5153 inline unsigned int ata_host_intr (struct ata_port *ap,
5154 struct ata_queued_cmd *qc)
5156 struct ata_eh_info *ehi = &ap->eh_info;
5157 u8 status, host_stat = 0;
5159 VPRINTK("ata%u: protocol %d task_state %d\n",
5160 ap->print_id, qc->tf.protocol, ap->hsm_task_state);
5162 /* Check whether we are expecting interrupt in this state */
5163 switch (ap->hsm_task_state) {
5165 /* Some pre-ATAPI-4 devices assert INTRQ
5166 * at this state when ready to receive CDB.
5169 /* Check the ATA_DFLAG_CDB_INTR flag is enough here.
5170 * The flag was turned on only for atapi devices.
5171 * No need to check is_atapi_taskfile(&qc->tf) again.
5173 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
5177 if (qc->tf.protocol == ATA_PROT_DMA ||
5178 qc->tf.protocol == ATA_PROT_ATAPI_DMA) {
5179 /* check status of DMA engine */
5180 host_stat = ap->ops->bmdma_status(ap);
5181 VPRINTK("ata%u: host_stat 0x%X\n",
5182 ap->print_id, host_stat);
5184 /* if it's not our irq... */
5185 if (!(host_stat & ATA_DMA_INTR))
5188 /* before we do anything else, clear DMA-Start bit */
5189 ap->ops->bmdma_stop(qc);
5191 if (unlikely(host_stat & ATA_DMA_ERR)) {
5192 /* error when transfering data to/from memory */
5193 qc->err_mask |= AC_ERR_HOST_BUS;
5194 ap->hsm_task_state = HSM_ST_ERR;
5204 /* check altstatus */
5205 status = ata_altstatus(ap);
5206 if (status & ATA_BUSY)
5209 /* check main status, clearing INTRQ */
5210 status = ata_chk_status(ap);
5211 if (unlikely(status & ATA_BUSY))
5214 /* ack bmdma irq events */
5215 ap->ops->irq_clear(ap);
5217 ata_hsm_move(ap, qc, status, 0);
5219 if (unlikely(qc->err_mask) && (qc->tf.protocol == ATA_PROT_DMA ||
5220 qc->tf.protocol == ATA_PROT_ATAPI_DMA))
5221 ata_ehi_push_desc(ehi, "BMDMA stat 0x%x", host_stat);
5223 return 1; /* irq handled */
5226 ap->stats.idle_irq++;
5229 if ((ap->stats.idle_irq % 1000) == 0) {
5230 ap->ops->irq_ack(ap, 0); /* debug trap */
5231 ata_port_printk(ap, KERN_WARNING, "irq trap\n");
5235 return 0; /* irq not handled */
5239 * ata_interrupt - Default ATA host interrupt handler
5240 * @irq: irq line (unused)
5241 * @dev_instance: pointer to our ata_host information structure
5243 * Default interrupt handler for PCI IDE devices. Calls
5244 * ata_host_intr() for each port that is not disabled.
5247 * Obtains host lock during operation.
5250 * IRQ_NONE or IRQ_HANDLED.
5253 irqreturn_t ata_interrupt (int irq, void *dev_instance)
5255 struct ata_host *host = dev_instance;
5257 unsigned int handled = 0;
5258 unsigned long flags;
5260 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
5261 spin_lock_irqsave(&host->lock, flags);
5263 for (i = 0; i < host->n_ports; i++) {
5264 struct ata_port *ap;
5266 ap = host->ports[i];
5268 !(ap->flags & ATA_FLAG_DISABLED)) {
5269 struct ata_queued_cmd *qc;
5271 qc = ata_qc_from_tag(ap, ap->active_tag);
5272 if (qc && (!(qc->tf.flags & ATA_TFLAG_POLLING)) &&
5273 (qc->flags & ATA_QCFLAG_ACTIVE))
5274 handled |= ata_host_intr(ap, qc);
5278 spin_unlock_irqrestore(&host->lock, flags);
5280 return IRQ_RETVAL(handled);
5284 * sata_scr_valid - test whether SCRs are accessible
5285 * @ap: ATA port to test SCR accessibility for
5287 * Test whether SCRs are accessible for @ap.
5293 * 1 if SCRs are accessible, 0 otherwise.
5295 int sata_scr_valid(struct ata_port *ap)
5297 return ap->cbl == ATA_CBL_SATA && ap->ops->scr_read;
5301 * sata_scr_read - read SCR register of the specified port
5302 * @ap: ATA port to read SCR for
5304 * @val: Place to store read value
5306 * Read SCR register @reg of @ap into *@val. This function is
5307 * guaranteed to succeed if the cable type of the port is SATA
5308 * and the port implements ->scr_read.
5314 * 0 on success, negative errno on failure.
5316 int sata_scr_read(struct ata_port *ap, int reg, u32 *val)
5318 if (sata_scr_valid(ap)) {
5319 *val = ap->ops->scr_read(ap, reg);
5326 * sata_scr_write - write SCR register of the specified port
5327 * @ap: ATA port to write SCR for
5328 * @reg: SCR to write
5329 * @val: value to write
5331 * Write @val to SCR register @reg of @ap. This function is
5332 * guaranteed to succeed if the cable type of the port is SATA
5333 * and the port implements ->scr_read.
5339 * 0 on success, negative errno on failure.
5341 int sata_scr_write(struct ata_port *ap, int reg, u32 val)
5343 if (sata_scr_valid(ap)) {
5344 ap->ops->scr_write(ap, reg, val);
5351 * sata_scr_write_flush - write SCR register of the specified port and flush
5352 * @ap: ATA port to write SCR for
5353 * @reg: SCR to write
5354 * @val: value to write
5356 * This function is identical to sata_scr_write() except that this
5357 * function performs flush after writing to the register.
5363 * 0 on success, negative errno on failure.
5365 int sata_scr_write_flush(struct ata_port *ap, int reg, u32 val)
5367 if (sata_scr_valid(ap)) {
5368 ap->ops->scr_write(ap, reg, val);
5369 ap->ops->scr_read(ap, reg);
5376 * ata_port_online - test whether the given port is online
5377 * @ap: ATA port to test
5379 * Test whether @ap is online. Note that this function returns 0
5380 * if online status of @ap cannot be obtained, so
5381 * ata_port_online(ap) != !ata_port_offline(ap).
5387 * 1 if the port online status is available and online.
5389 int ata_port_online(struct ata_port *ap)
5393 if (!sata_scr_read(ap, SCR_STATUS, &sstatus) && (sstatus & 0xf) == 0x3)
5399 * ata_port_offline - test whether the given port is offline
5400 * @ap: ATA port to test
5402 * Test whether @ap is offline. Note that this function returns
5403 * 0 if offline status of @ap cannot be obtained, so
5404 * ata_port_online(ap) != !ata_port_offline(ap).
5410 * 1 if the port offline status is available and offline.
5412 int ata_port_offline(struct ata_port *ap)
5416 if (!sata_scr_read(ap, SCR_STATUS, &sstatus) && (sstatus & 0xf) != 0x3)
5421 int ata_flush_cache(struct ata_device *dev)
5423 unsigned int err_mask;
5426 if (!ata_try_flush_cache(dev))
5429 if (dev->flags & ATA_DFLAG_FLUSH_EXT)
5430 cmd = ATA_CMD_FLUSH_EXT;
5432 cmd = ATA_CMD_FLUSH;
5434 err_mask = ata_do_simple_cmd(dev, cmd);
5436 ata_dev_printk(dev, KERN_ERR, "failed to flush cache\n");
5444 static int ata_host_request_pm(struct ata_host *host, pm_message_t mesg,
5445 unsigned int action, unsigned int ehi_flags,
5448 unsigned long flags;
5451 for (i = 0; i < host->n_ports; i++) {
5452 struct ata_port *ap = host->ports[i];
5454 /* Previous resume operation might still be in
5455 * progress. Wait for PM_PENDING to clear.
5457 if (ap->pflags & ATA_PFLAG_PM_PENDING) {
5458 ata_port_wait_eh(ap);
5459 WARN_ON(ap->pflags & ATA_PFLAG_PM_PENDING);
5462 /* request PM ops to EH */
5463 spin_lock_irqsave(ap->lock, flags);
5468 ap->pm_result = &rc;
5471 ap->pflags |= ATA_PFLAG_PM_PENDING;
5472 ap->eh_info.action |= action;
5473 ap->eh_info.flags |= ehi_flags;
5475 ata_port_schedule_eh(ap);
5477 spin_unlock_irqrestore(ap->lock, flags);
5479 /* wait and check result */
5481 ata_port_wait_eh(ap);
5482 WARN_ON(ap->pflags & ATA_PFLAG_PM_PENDING);
5492 * ata_host_suspend - suspend host
5493 * @host: host to suspend
5496 * Suspend @host. Actual operation is performed by EH. This
5497 * function requests EH to perform PM operations and waits for EH
5501 * Kernel thread context (may sleep).
5504 * 0 on success, -errno on failure.
5506 int ata_host_suspend(struct ata_host *host, pm_message_t mesg)
5510 rc = ata_host_request_pm(host, mesg, 0, ATA_EHI_QUIET, 1);
5514 /* EH is quiescent now. Fail if we have any ready device.
5515 * This happens if hotplug occurs between completion of device
5516 * suspension and here.
5518 for (i = 0; i < host->n_ports; i++) {
5519 struct ata_port *ap = host->ports[i];
5521 for (j = 0; j < ATA_MAX_DEVICES; j++) {
5522 struct ata_device *dev = &ap->device[j];
5524 if (ata_dev_ready(dev)) {
5525 ata_port_printk(ap, KERN_WARNING,
5526 "suspend failed, device %d "
5527 "still active\n", dev->devno);
5534 host->dev->power.power_state = mesg;
5538 ata_host_resume(host);
5543 * ata_host_resume - resume host
5544 * @host: host to resume
5546 * Resume @host. Actual operation is performed by EH. This
5547 * function requests EH to perform PM operations and returns.
5548 * Note that all resume operations are performed parallely.
5551 * Kernel thread context (may sleep).
5553 void ata_host_resume(struct ata_host *host)
5555 ata_host_request_pm(host, PMSG_ON, ATA_EH_SOFTRESET,
5556 ATA_EHI_NO_AUTOPSY | ATA_EHI_QUIET, 0);
5557 host->dev->power.power_state = PMSG_ON;
5562 * ata_port_start - Set port up for dma.
5563 * @ap: Port to initialize
5565 * Called just after data structures for each port are
5566 * initialized. Allocates space for PRD table.
5568 * May be used as the port_start() entry in ata_port_operations.
5571 * Inherited from caller.
5573 int ata_port_start(struct ata_port *ap)
5575 struct device *dev = ap->dev;
5578 ap->prd = dmam_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma,
5583 rc = ata_pad_alloc(ap, dev);
5587 DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd,
5588 (unsigned long long)ap->prd_dma);
5593 * ata_dev_init - Initialize an ata_device structure
5594 * @dev: Device structure to initialize
5596 * Initialize @dev in preparation for probing.
5599 * Inherited from caller.
5601 void ata_dev_init(struct ata_device *dev)
5603 struct ata_port *ap = dev->ap;
5604 unsigned long flags;
5606 /* SATA spd limit is bound to the first device */
5607 ap->sata_spd_limit = ap->hw_sata_spd_limit;
5609 /* High bits of dev->flags are used to record warm plug
5610 * requests which occur asynchronously. Synchronize using
5613 spin_lock_irqsave(ap->lock, flags);
5614 dev->flags &= ~ATA_DFLAG_INIT_MASK;
5615 spin_unlock_irqrestore(ap->lock, flags);
5617 memset((void *)dev + ATA_DEVICE_CLEAR_OFFSET, 0,
5618 sizeof(*dev) - ATA_DEVICE_CLEAR_OFFSET);
5619 dev->pio_mask = UINT_MAX;
5620 dev->mwdma_mask = UINT_MAX;
5621 dev->udma_mask = UINT_MAX;
5625 * ata_port_init - Initialize an ata_port structure
5626 * @ap: Structure to initialize
5627 * @host: Collection of hosts to which @ap belongs
5628 * @ent: Probe information provided by low-level driver
5629 * @port_no: Port number associated with this ata_port
5631 * Initialize a new ata_port structure.
5634 * Inherited from caller.
5636 void ata_port_init(struct ata_port *ap, struct ata_host *host,
5637 const struct ata_probe_ent *ent, unsigned int port_no)
5641 ap->lock = &host->lock;
5642 ap->flags = ATA_FLAG_DISABLED;
5643 ap->print_id = ata_print_id++;
5644 ap->ctl = ATA_DEVCTL_OBS;
5647 ap->port_no = port_no;
5648 if (port_no == 1 && ent->pinfo2) {
5649 ap->pio_mask = ent->pinfo2->pio_mask;
5650 ap->mwdma_mask = ent->pinfo2->mwdma_mask;
5651 ap->udma_mask = ent->pinfo2->udma_mask;
5652 ap->flags |= ent->pinfo2->flags;
5653 ap->ops = ent->pinfo2->port_ops;
5655 ap->pio_mask = ent->pio_mask;
5656 ap->mwdma_mask = ent->mwdma_mask;
5657 ap->udma_mask = ent->udma_mask;
5658 ap->flags |= ent->port_flags;
5659 ap->ops = ent->port_ops;
5661 ap->hw_sata_spd_limit = UINT_MAX;
5662 ap->active_tag = ATA_TAG_POISON;
5663 ap->last_ctl = 0xFF;
5665 #if defined(ATA_VERBOSE_DEBUG)
5666 /* turn on all debugging levels */
5667 ap->msg_enable = 0x00FF;
5668 #elif defined(ATA_DEBUG)
5669 ap->msg_enable = ATA_MSG_DRV | ATA_MSG_INFO | ATA_MSG_CTL | ATA_MSG_WARN | ATA_MSG_ERR;
5671 ap->msg_enable = ATA_MSG_DRV | ATA_MSG_ERR | ATA_MSG_WARN;
5674 INIT_DELAYED_WORK(&ap->port_task, NULL);
5675 INIT_DELAYED_WORK(&ap->hotplug_task, ata_scsi_hotplug);
5676 INIT_WORK(&ap->scsi_rescan_task, ata_scsi_dev_rescan);
5677 INIT_LIST_HEAD(&ap->eh_done_q);
5678 init_waitqueue_head(&ap->eh_wait_q);
5680 /* set cable type */
5681 ap->cbl = ATA_CBL_NONE;
5682 if (ap->flags & ATA_FLAG_SATA)
5683 ap->cbl = ATA_CBL_SATA;
5685 for (i = 0; i < ATA_MAX_DEVICES; i++) {
5686 struct ata_device *dev = &ap->device[i];
5693 ap->stats.unhandled_irq = 1;
5694 ap->stats.idle_irq = 1;
5697 memcpy(&ap->ioaddr, &ent->port[port_no], sizeof(struct ata_ioports));
5701 * ata_port_init_shost - Initialize SCSI host associated with ATA port
5702 * @ap: ATA port to initialize SCSI host for
5703 * @shost: SCSI host associated with @ap
5705 * Initialize SCSI host @shost associated with ATA port @ap.
5708 * Inherited from caller.
5710 static void ata_port_init_shost(struct ata_port *ap, struct Scsi_Host *shost)
5712 ap->scsi_host = shost;
5714 shost->unique_id = ap->print_id;
5717 shost->max_channel = 1;
5718 shost->max_cmd_len = 16;
5722 * ata_port_add - Attach low-level ATA driver to system
5723 * @ent: Information provided by low-level driver
5724 * @host: Collections of ports to which we add
5725 * @port_no: Port number associated with this host
5727 * Attach low-level ATA driver to system.
5730 * PCI/etc. bus probe sem.
5733 * New ata_port on success, for NULL on error.
5735 static struct ata_port * ata_port_add(const struct ata_probe_ent *ent,
5736 struct ata_host *host,
5737 unsigned int port_no)
5739 struct Scsi_Host *shost;
5740 struct ata_port *ap;
5744 if (!ent->port_ops->error_handler &&
5745 !(ent->port_flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST))) {
5746 printk(KERN_ERR "ata%u: no reset mechanism available\n",
5751 shost = scsi_host_alloc(ent->sht, sizeof(struct ata_port));
5755 shost->transportt = &ata_scsi_transport_template;
5757 ap = ata_shost_to_port(shost);
5759 ata_port_init(ap, host, ent, port_no);
5760 ata_port_init_shost(ap, shost);
5765 static void ata_host_release(struct device *gendev, void *res)
5767 struct ata_host *host = dev_get_drvdata(gendev);
5770 for (i = 0; i < host->n_ports; i++) {
5771 struct ata_port *ap = host->ports[i];
5773 if (ap && ap->ops->port_stop)
5774 ap->ops->port_stop(ap);
5777 if (host->ops->host_stop)
5778 host->ops->host_stop(host);
5780 for (i = 0; i < host->n_ports; i++) {
5781 struct ata_port *ap = host->ports[i];
5784 scsi_host_put(ap->scsi_host);
5786 host->ports[i] = NULL;
5789 dev_set_drvdata(gendev, NULL);
5793 * ata_sas_host_init - Initialize a host struct
5794 * @host: host to initialize
5795 * @dev: device host is attached to
5796 * @flags: host flags
5800 * PCI/etc. bus probe sem.
5804 void ata_host_init(struct ata_host *host, struct device *dev,
5805 unsigned long flags, const struct ata_port_operations *ops)
5807 spin_lock_init(&host->lock);
5809 host->flags = flags;
5814 * ata_device_add - Register hardware device with ATA and SCSI layers
5815 * @ent: Probe information describing hardware device to be registered
5817 * This function processes the information provided in the probe
5818 * information struct @ent, allocates the necessary ATA and SCSI
5819 * host information structures, initializes them, and registers
5820 * everything with requisite kernel subsystems.
5822 * This function requests irqs, probes the ATA bus, and probes
5826 * PCI/etc. bus probe sem.
5829 * Number of ports registered. Zero on error (no ports registered).
5831 int ata_device_add(const struct ata_probe_ent *ent)
5834 struct device *dev = ent->dev;
5835 struct ata_host *host;
5840 if (ent->irq == 0) {
5841 dev_printk(KERN_ERR, dev, "is not available: No interrupt assigned.\n");
5845 if (!devres_open_group(dev, ata_device_add, GFP_KERNEL))
5848 /* alloc a container for our list of ATA ports (buses) */
5849 host = devres_alloc(ata_host_release, sizeof(struct ata_host) +
5850 (ent->n_ports * sizeof(void *)), GFP_KERNEL);
5853 devres_add(dev, host);
5854 dev_set_drvdata(dev, host);
5856 ata_host_init(host, dev, ent->_host_flags, ent->port_ops);
5857 host->n_ports = ent->n_ports;
5858 host->irq = ent->irq;
5859 host->irq2 = ent->irq2;
5860 host->iomap = ent->iomap;
5861 host->private_data = ent->private_data;
5863 /* register each port bound to this device */
5864 for (i = 0; i < host->n_ports; i++) {
5865 struct ata_port *ap;
5866 unsigned long xfer_mode_mask;
5867 int irq_line = ent->irq;
5869 ap = ata_port_add(ent, host, i);
5870 host->ports[i] = ap;
5875 if (ent->dummy_port_mask & (1 << i)) {
5876 ata_port_printk(ap, KERN_INFO, "DUMMY\n");
5877 ap->ops = &ata_dummy_port_ops;
5882 rc = ap->ops->port_start(ap);
5884 host->ports[i] = NULL;
5885 scsi_host_put(ap->scsi_host);
5889 /* Report the secondary IRQ for second channel legacy */
5890 if (i == 1 && ent->irq2)
5891 irq_line = ent->irq2;
5893 xfer_mode_mask =(ap->udma_mask << ATA_SHIFT_UDMA) |
5894 (ap->mwdma_mask << ATA_SHIFT_MWDMA) |
5895 (ap->pio_mask << ATA_SHIFT_PIO);
5897 /* print per-port info to dmesg */
5898 ata_port_printk(ap, KERN_INFO, "%cATA max %s cmd 0x%p "
5899 "ctl 0x%p bmdma 0x%p irq %d\n",
5900 ap->flags & ATA_FLAG_SATA ? 'S' : 'P',
5901 ata_mode_string(xfer_mode_mask),
5902 ap->ioaddr.cmd_addr,
5903 ap->ioaddr.ctl_addr,
5904 ap->ioaddr.bmdma_addr,
5907 /* freeze port before requesting IRQ */
5908 ata_eh_freeze_port(ap);
5911 /* obtain irq, that may be shared between channels */
5912 rc = devm_request_irq(dev, ent->irq, ent->port_ops->irq_handler,
5913 ent->irq_flags, DRV_NAME, host);
5915 dev_printk(KERN_ERR, dev, "irq %lu request failed: %d\n",
5920 /* do we have a second IRQ for the other channel, eg legacy mode */
5922 /* We will get weird core code crashes later if this is true
5924 BUG_ON(ent->irq == ent->irq2);
5926 rc = devm_request_irq(dev, ent->irq2,
5927 ent->port_ops->irq_handler, ent->irq_flags,
5930 dev_printk(KERN_ERR, dev, "irq %lu request failed: %d\n",
5936 /* resource acquisition complete */
5937 devres_remove_group(dev, ata_device_add);
5939 /* perform each probe synchronously */
5940 DPRINTK("probe begin\n");
5941 for (i = 0; i < host->n_ports; i++) {
5942 struct ata_port *ap = host->ports[i];
5946 /* init sata_spd_limit to the current value */
5947 if (sata_scr_read(ap, SCR_CONTROL, &scontrol) == 0) {
5948 int spd = (scontrol >> 4) & 0xf;
5949 ap->hw_sata_spd_limit &= (1 << spd) - 1;
5951 ap->sata_spd_limit = ap->hw_sata_spd_limit;
5953 rc = scsi_add_host(ap->scsi_host, dev);
5955 ata_port_printk(ap, KERN_ERR, "scsi_add_host failed\n");
5956 /* FIXME: do something useful here */
5957 /* FIXME: handle unconditional calls to
5958 * scsi_scan_host and ata_host_remove, below,
5963 if (ap->ops->error_handler) {
5964 struct ata_eh_info *ehi = &ap->eh_info;
5965 unsigned long flags;
5969 /* kick EH for boot probing */
5970 spin_lock_irqsave(ap->lock, flags);
5972 ehi->probe_mask = (1 << ATA_MAX_DEVICES) - 1;
5973 ehi->action |= ATA_EH_SOFTRESET;
5974 ehi->flags |= ATA_EHI_NO_AUTOPSY | ATA_EHI_QUIET;
5976 ap->pflags |= ATA_PFLAG_LOADING;
5977 ata_port_schedule_eh(ap);
5979 spin_unlock_irqrestore(ap->lock, flags);
5981 /* wait for EH to finish */
5982 ata_port_wait_eh(ap);
5984 DPRINTK("ata%u: bus probe begin\n", ap->print_id);
5985 rc = ata_bus_probe(ap);
5986 DPRINTK("ata%u: bus probe end\n", ap->print_id);
5989 /* FIXME: do something useful here?
5990 * Current libata behavior will
5991 * tear down everything when
5992 * the module is removed
5993 * or the h/w is unplugged.
5999 /* probes are done, now scan each port's disk(s) */
6000 DPRINTK("host probe begin\n");
6001 for (i = 0; i < host->n_ports; i++) {
6002 struct ata_port *ap = host->ports[i];
6004 ata_scsi_scan_host(ap);
6007 VPRINTK("EXIT, returning %u\n", ent->n_ports);
6008 return ent->n_ports; /* success */
6011 devres_release_group(dev, ata_device_add);
6012 VPRINTK("EXIT, returning %d\n", rc);
6017 * ata_port_detach - Detach ATA port in prepration of device removal
6018 * @ap: ATA port to be detached
6020 * Detach all ATA devices and the associated SCSI devices of @ap;
6021 * then, remove the associated SCSI host. @ap is guaranteed to
6022 * be quiescent on return from this function.
6025 * Kernel thread context (may sleep).
6027 void ata_port_detach(struct ata_port *ap)
6029 unsigned long flags;
6032 if (!ap->ops->error_handler)
6035 /* tell EH we're leaving & flush EH */
6036 spin_lock_irqsave(ap->lock, flags);
6037 ap->pflags |= ATA_PFLAG_UNLOADING;
6038 spin_unlock_irqrestore(ap->lock, flags);
6040 ata_port_wait_eh(ap);
6042 /* EH is now guaranteed to see UNLOADING, so no new device
6043 * will be attached. Disable all existing devices.
6045 spin_lock_irqsave(ap->lock, flags);
6047 for (i = 0; i < ATA_MAX_DEVICES; i++)
6048 ata_dev_disable(&ap->device[i]);
6050 spin_unlock_irqrestore(ap->lock, flags);
6052 /* Final freeze & EH. All in-flight commands are aborted. EH
6053 * will be skipped and retrials will be terminated with bad
6056 spin_lock_irqsave(ap->lock, flags);
6057 ata_port_freeze(ap); /* won't be thawed */
6058 spin_unlock_irqrestore(ap->lock, flags);
6060 ata_port_wait_eh(ap);
6062 /* Flush hotplug task. The sequence is similar to
6063 * ata_port_flush_task().
6065 flush_workqueue(ata_aux_wq);
6066 cancel_delayed_work(&ap->hotplug_task);
6067 flush_workqueue(ata_aux_wq);
6070 /* remove the associated SCSI host */
6071 scsi_remove_host(ap->scsi_host);
6075 * ata_host_detach - Detach all ports of an ATA host
6076 * @host: Host to detach
6078 * Detach all ports of @host.
6081 * Kernel thread context (may sleep).
6083 void ata_host_detach(struct ata_host *host)
6087 for (i = 0; i < host->n_ports; i++)
6088 ata_port_detach(host->ports[i]);
6091 struct ata_probe_ent *
6092 ata_probe_ent_alloc(struct device *dev, const struct ata_port_info *port)
6094 struct ata_probe_ent *probe_ent;
6096 probe_ent = devm_kzalloc(dev, sizeof(*probe_ent), GFP_KERNEL);
6098 printk(KERN_ERR DRV_NAME "(%s): out of memory\n",
6099 kobject_name(&(dev->kobj)));
6103 INIT_LIST_HEAD(&probe_ent->node);
6104 probe_ent->dev = dev;
6106 probe_ent->sht = port->sht;
6107 probe_ent->port_flags = port->flags;
6108 probe_ent->pio_mask = port->pio_mask;
6109 probe_ent->mwdma_mask = port->mwdma_mask;
6110 probe_ent->udma_mask = port->udma_mask;
6111 probe_ent->port_ops = port->port_ops;
6112 probe_ent->private_data = port->private_data;
6118 * ata_std_ports - initialize ioaddr with standard port offsets.
6119 * @ioaddr: IO address structure to be initialized
6121 * Utility function which initializes data_addr, error_addr,
6122 * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
6123 * device_addr, status_addr, and command_addr to standard offsets
6124 * relative to cmd_addr.
6126 * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
6129 void ata_std_ports(struct ata_ioports *ioaddr)
6131 ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA;
6132 ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR;
6133 ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE;
6134 ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT;
6135 ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL;
6136 ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM;
6137 ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH;
6138 ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE;
6139 ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS;
6140 ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD;
6147 * ata_pci_remove_one - PCI layer callback for device removal
6148 * @pdev: PCI device that was removed
6150 * PCI layer indicates to libata via this hook that hot-unplug or
6151 * module unload event has occurred. Detach all ports. Resource
6152 * release is handled via devres.
6155 * Inherited from PCI layer (may sleep).
6157 void ata_pci_remove_one(struct pci_dev *pdev)
6159 struct device *dev = pci_dev_to_dev(pdev);
6160 struct ata_host *host = dev_get_drvdata(dev);
6162 ata_host_detach(host);
6165 /* move to PCI subsystem */
6166 int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits)
6168 unsigned long tmp = 0;
6170 switch (bits->width) {
6173 pci_read_config_byte(pdev, bits->reg, &tmp8);
6179 pci_read_config_word(pdev, bits->reg, &tmp16);
6185 pci_read_config_dword(pdev, bits->reg, &tmp32);
6196 return (tmp == bits->val) ? 1 : 0;
6200 void ata_pci_device_do_suspend(struct pci_dev *pdev, pm_message_t mesg)
6202 pci_save_state(pdev);
6203 pci_disable_device(pdev);
6205 if (mesg.event == PM_EVENT_SUSPEND)
6206 pci_set_power_state(pdev, PCI_D3hot);
6209 int ata_pci_device_do_resume(struct pci_dev *pdev)
6213 pci_set_power_state(pdev, PCI_D0);
6214 pci_restore_state(pdev);
6216 rc = pcim_enable_device(pdev);
6218 dev_printk(KERN_ERR, &pdev->dev,
6219 "failed to enable device after resume (%d)\n", rc);
6223 pci_set_master(pdev);
6227 int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg)
6229 struct ata_host *host = dev_get_drvdata(&pdev->dev);
6232 rc = ata_host_suspend(host, mesg);
6236 ata_pci_device_do_suspend(pdev, mesg);
6241 int ata_pci_device_resume(struct pci_dev *pdev)
6243 struct ata_host *host = dev_get_drvdata(&pdev->dev);
6246 rc = ata_pci_device_do_resume(pdev);
6248 ata_host_resume(host);
6251 #endif /* CONFIG_PM */
6253 #endif /* CONFIG_PCI */
6256 static int __init ata_init(void)
6258 ata_probe_timeout *= HZ;
6259 ata_wq = create_workqueue("ata");
6263 ata_aux_wq = create_singlethread_workqueue("ata_aux");
6265 destroy_workqueue(ata_wq);
6269 printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n");
6273 static void __exit ata_exit(void)
6275 destroy_workqueue(ata_wq);
6276 destroy_workqueue(ata_aux_wq);
6279 subsys_initcall(ata_init);
6280 module_exit(ata_exit);
6282 static unsigned long ratelimit_time;
6283 static DEFINE_SPINLOCK(ata_ratelimit_lock);
6285 int ata_ratelimit(void)
6288 unsigned long flags;
6290 spin_lock_irqsave(&ata_ratelimit_lock, flags);
6292 if (time_after(jiffies, ratelimit_time)) {
6294 ratelimit_time = jiffies + (HZ/5);
6298 spin_unlock_irqrestore(&ata_ratelimit_lock, flags);
6304 * ata_wait_register - wait until register value changes
6305 * @reg: IO-mapped register
6306 * @mask: Mask to apply to read register value
6307 * @val: Wait condition
6308 * @interval_msec: polling interval in milliseconds
6309 * @timeout_msec: timeout in milliseconds
6311 * Waiting for some bits of register to change is a common
6312 * operation for ATA controllers. This function reads 32bit LE
6313 * IO-mapped register @reg and tests for the following condition.
6315 * (*@reg & mask) != val
6317 * If the condition is met, it returns; otherwise, the process is
6318 * repeated after @interval_msec until timeout.
6321 * Kernel thread context (may sleep)
6324 * The final register value.
6326 u32 ata_wait_register(void __iomem *reg, u32 mask, u32 val,
6327 unsigned long interval_msec,
6328 unsigned long timeout_msec)
6330 unsigned long timeout;
6333 tmp = ioread32(reg);
6335 /* Calculate timeout _after_ the first read to make sure
6336 * preceding writes reach the controller before starting to
6337 * eat away the timeout.
6339 timeout = jiffies + (timeout_msec * HZ) / 1000;
6341 while ((tmp & mask) == val && time_before(jiffies, timeout)) {
6342 msleep(interval_msec);
6343 tmp = ioread32(reg);
6352 static void ata_dummy_noret(struct ata_port *ap) { }
6353 static int ata_dummy_ret0(struct ata_port *ap) { return 0; }
6354 static void ata_dummy_qc_noret(struct ata_queued_cmd *qc) { }
6356 static u8 ata_dummy_check_status(struct ata_port *ap)
6361 static unsigned int ata_dummy_qc_issue(struct ata_queued_cmd *qc)
6363 return AC_ERR_SYSTEM;
6366 const struct ata_port_operations ata_dummy_port_ops = {
6367 .port_disable = ata_port_disable,
6368 .check_status = ata_dummy_check_status,
6369 .check_altstatus = ata_dummy_check_status,
6370 .dev_select = ata_noop_dev_select,
6371 .qc_prep = ata_noop_qc_prep,
6372 .qc_issue = ata_dummy_qc_issue,
6373 .freeze = ata_dummy_noret,
6374 .thaw = ata_dummy_noret,
6375 .error_handler = ata_dummy_noret,
6376 .post_internal_cmd = ata_dummy_qc_noret,
6377 .irq_clear = ata_dummy_noret,
6378 .port_start = ata_dummy_ret0,
6379 .port_stop = ata_dummy_noret,
6383 * libata is essentially a library of internal helper functions for
6384 * low-level ATA host controller drivers. As such, the API/ABI is
6385 * likely to change as new drivers are added and updated.
6386 * Do not depend on ABI/API stability.
6389 EXPORT_SYMBOL_GPL(sata_deb_timing_normal);
6390 EXPORT_SYMBOL_GPL(sata_deb_timing_hotplug);
6391 EXPORT_SYMBOL_GPL(sata_deb_timing_long);
6392 EXPORT_SYMBOL_GPL(ata_dummy_port_ops);
6393 EXPORT_SYMBOL_GPL(ata_std_bios_param);
6394 EXPORT_SYMBOL_GPL(ata_std_ports);
6395 EXPORT_SYMBOL_GPL(ata_host_init);
6396 EXPORT_SYMBOL_GPL(ata_device_add);
6397 EXPORT_SYMBOL_GPL(ata_host_detach);
6398 EXPORT_SYMBOL_GPL(ata_sg_init);
6399 EXPORT_SYMBOL_GPL(ata_sg_init_one);
6400 EXPORT_SYMBOL_GPL(ata_hsm_move);
6401 EXPORT_SYMBOL_GPL(ata_qc_complete);
6402 EXPORT_SYMBOL_GPL(ata_qc_complete_multiple);
6403 EXPORT_SYMBOL_GPL(ata_qc_issue_prot);
6404 EXPORT_SYMBOL_GPL(ata_tf_load);
6405 EXPORT_SYMBOL_GPL(ata_tf_read);
6406 EXPORT_SYMBOL_GPL(ata_noop_dev_select);
6407 EXPORT_SYMBOL_GPL(ata_std_dev_select);
6408 EXPORT_SYMBOL_GPL(sata_print_link_status);
6409 EXPORT_SYMBOL_GPL(ata_tf_to_fis);
6410 EXPORT_SYMBOL_GPL(ata_tf_from_fis);
6411 EXPORT_SYMBOL_GPL(ata_check_status);
6412 EXPORT_SYMBOL_GPL(ata_altstatus);
6413 EXPORT_SYMBOL_GPL(ata_exec_command);
6414 EXPORT_SYMBOL_GPL(ata_port_start);
6415 EXPORT_SYMBOL_GPL(ata_interrupt);
6416 EXPORT_SYMBOL_GPL(ata_data_xfer);
6417 EXPORT_SYMBOL_GPL(ata_data_xfer_noirq);
6418 EXPORT_SYMBOL_GPL(ata_qc_prep);
6419 EXPORT_SYMBOL_GPL(ata_noop_qc_prep);
6420 EXPORT_SYMBOL_GPL(ata_bmdma_setup);
6421 EXPORT_SYMBOL_GPL(ata_bmdma_start);
6422 EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear);
6423 EXPORT_SYMBOL_GPL(ata_bmdma_status);
6424 EXPORT_SYMBOL_GPL(ata_bmdma_stop);
6425 EXPORT_SYMBOL_GPL(ata_bmdma_freeze);
6426 EXPORT_SYMBOL_GPL(ata_bmdma_thaw);
6427 EXPORT_SYMBOL_GPL(ata_bmdma_drive_eh);
6428 EXPORT_SYMBOL_GPL(ata_bmdma_error_handler);
6429 EXPORT_SYMBOL_GPL(ata_bmdma_post_internal_cmd);
6430 EXPORT_SYMBOL_GPL(ata_port_probe);
6431 EXPORT_SYMBOL_GPL(ata_dev_disable);
6432 EXPORT_SYMBOL_GPL(sata_set_spd);
6433 EXPORT_SYMBOL_GPL(sata_phy_debounce);
6434 EXPORT_SYMBOL_GPL(sata_phy_resume);
6435 EXPORT_SYMBOL_GPL(sata_phy_reset);
6436 EXPORT_SYMBOL_GPL(__sata_phy_reset);
6437 EXPORT_SYMBOL_GPL(ata_bus_reset);
6438 EXPORT_SYMBOL_GPL(ata_std_prereset);
6439 EXPORT_SYMBOL_GPL(ata_std_softreset);
6440 EXPORT_SYMBOL_GPL(sata_port_hardreset);
6441 EXPORT_SYMBOL_GPL(sata_std_hardreset);
6442 EXPORT_SYMBOL_GPL(ata_std_postreset);
6443 EXPORT_SYMBOL_GPL(ata_dev_classify);
6444 EXPORT_SYMBOL_GPL(ata_dev_pair);
6445 EXPORT_SYMBOL_GPL(ata_port_disable);
6446 EXPORT_SYMBOL_GPL(ata_ratelimit);
6447 EXPORT_SYMBOL_GPL(ata_wait_register);
6448 EXPORT_SYMBOL_GPL(ata_busy_sleep);
6449 EXPORT_SYMBOL_GPL(ata_port_queue_task);
6450 EXPORT_SYMBOL_GPL(ata_scsi_ioctl);
6451 EXPORT_SYMBOL_GPL(ata_scsi_queuecmd);
6452 EXPORT_SYMBOL_GPL(ata_scsi_slave_config);
6453 EXPORT_SYMBOL_GPL(ata_scsi_slave_destroy);
6454 EXPORT_SYMBOL_GPL(ata_scsi_change_queue_depth);
6455 EXPORT_SYMBOL_GPL(ata_host_intr);
6456 EXPORT_SYMBOL_GPL(sata_scr_valid);
6457 EXPORT_SYMBOL_GPL(sata_scr_read);
6458 EXPORT_SYMBOL_GPL(sata_scr_write);
6459 EXPORT_SYMBOL_GPL(sata_scr_write_flush);
6460 EXPORT_SYMBOL_GPL(ata_port_online);
6461 EXPORT_SYMBOL_GPL(ata_port_offline);
6463 EXPORT_SYMBOL_GPL(ata_host_suspend);
6464 EXPORT_SYMBOL_GPL(ata_host_resume);
6465 #endif /* CONFIG_PM */
6466 EXPORT_SYMBOL_GPL(ata_id_string);
6467 EXPORT_SYMBOL_GPL(ata_id_c_string);
6468 EXPORT_SYMBOL_GPL(ata_id_to_dma_mode);
6469 EXPORT_SYMBOL_GPL(ata_device_blacklisted);
6470 EXPORT_SYMBOL_GPL(ata_scsi_simulate);
6472 EXPORT_SYMBOL_GPL(ata_pio_need_iordy);
6473 EXPORT_SYMBOL_GPL(ata_timing_compute);
6474 EXPORT_SYMBOL_GPL(ata_timing_merge);
6477 EXPORT_SYMBOL_GPL(pci_test_config_bits);
6478 EXPORT_SYMBOL_GPL(ata_pci_init_native_mode);
6479 EXPORT_SYMBOL_GPL(ata_pci_init_one);
6480 EXPORT_SYMBOL_GPL(ata_pci_remove_one);
6482 EXPORT_SYMBOL_GPL(ata_pci_device_do_suspend);
6483 EXPORT_SYMBOL_GPL(ata_pci_device_do_resume);
6484 EXPORT_SYMBOL_GPL(ata_pci_device_suspend);
6485 EXPORT_SYMBOL_GPL(ata_pci_device_resume);
6486 #endif /* CONFIG_PM */
6487 EXPORT_SYMBOL_GPL(ata_pci_default_filter);
6488 EXPORT_SYMBOL_GPL(ata_pci_clear_simplex);
6489 #endif /* CONFIG_PCI */
6492 EXPORT_SYMBOL_GPL(ata_scsi_device_suspend);
6493 EXPORT_SYMBOL_GPL(ata_scsi_device_resume);
6494 #endif /* CONFIG_PM */
6496 EXPORT_SYMBOL_GPL(ata_eng_timeout);
6497 EXPORT_SYMBOL_GPL(ata_port_schedule_eh);
6498 EXPORT_SYMBOL_GPL(ata_port_abort);
6499 EXPORT_SYMBOL_GPL(ata_port_freeze);
6500 EXPORT_SYMBOL_GPL(ata_eh_freeze_port);
6501 EXPORT_SYMBOL_GPL(ata_eh_thaw_port);
6502 EXPORT_SYMBOL_GPL(ata_eh_qc_complete);
6503 EXPORT_SYMBOL_GPL(ata_eh_qc_retry);
6504 EXPORT_SYMBOL_GPL(ata_do_eh);
6505 EXPORT_SYMBOL_GPL(ata_irq_on);
6506 EXPORT_SYMBOL_GPL(ata_dummy_irq_on);
6507 EXPORT_SYMBOL_GPL(ata_irq_ack);
6508 EXPORT_SYMBOL_GPL(ata_dummy_irq_ack);
6509 EXPORT_SYMBOL_GPL(ata_dev_try_classify);
6511 EXPORT_SYMBOL_GPL(ata_cable_40wire);
6512 EXPORT_SYMBOL_GPL(ata_cable_80wire);
6513 EXPORT_SYMBOL_GPL(ata_cable_unknown);
6514 EXPORT_SYMBOL_GPL(ata_cable_sata);