2 * libata-core.c - helper library for ATA
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
8 * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2004 Jeff Garzik
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
35 #include <linux/kernel.h>
36 #include <linux/module.h>
37 #include <linux/pci.h>
38 #include <linux/init.h>
39 #include <linux/list.h>
41 #include <linux/highmem.h>
42 #include <linux/spinlock.h>
43 #include <linux/blkdev.h>
44 #include <linux/delay.h>
45 #include <linux/timer.h>
46 #include <linux/interrupt.h>
47 #include <linux/completion.h>
48 #include <linux/suspend.h>
49 #include <linux/workqueue.h>
50 #include <linux/jiffies.h>
51 #include <linux/scatterlist.h>
52 #include <scsi/scsi.h>
53 #include <scsi/scsi_cmnd.h>
54 #include <scsi/scsi_host.h>
55 #include <linux/libata.h>
57 #include <asm/semaphore.h>
58 #include <asm/byteorder.h>
62 #define DRV_VERSION "2.10" /* must be exactly four chars */
65 /* debounce timing parameters in msecs { interval, duration, timeout } */
66 const unsigned long sata_deb_timing_normal[] = { 5, 100, 2000 };
67 const unsigned long sata_deb_timing_hotplug[] = { 25, 500, 2000 };
68 const unsigned long sata_deb_timing_long[] = { 100, 2000, 5000 };
70 static unsigned int ata_dev_init_params(struct ata_device *dev,
71 u16 heads, u16 sectors);
72 static unsigned int ata_dev_set_xfermode(struct ata_device *dev);
73 static void ata_dev_xfermask(struct ata_device *dev);
75 static unsigned int ata_unique_id = 1;
76 static struct workqueue_struct *ata_wq;
78 struct workqueue_struct *ata_aux_wq;
80 int atapi_enabled = 1;
81 module_param(atapi_enabled, int, 0444);
82 MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)");
85 module_param(atapi_dmadir, int, 0444);
86 MODULE_PARM_DESC(atapi_dmadir, "Enable ATAPI DMADIR bridge support (0=off, 1=on)");
89 module_param_named(fua, libata_fua, int, 0444);
90 MODULE_PARM_DESC(fua, "FUA support (0=off, 1=on)");
92 static int ata_probe_timeout = ATA_TMOUT_INTERNAL / HZ;
93 module_param(ata_probe_timeout, int, 0444);
94 MODULE_PARM_DESC(ata_probe_timeout, "Set ATA probing timeout (seconds)");
97 module_param(noacpi, int, 0444);
98 MODULE_PARM_DESC(noacpi, "Disables the use of ACPI in suspend/resume when set");
100 MODULE_AUTHOR("Jeff Garzik");
101 MODULE_DESCRIPTION("Library module for ATA devices");
102 MODULE_LICENSE("GPL");
103 MODULE_VERSION(DRV_VERSION);
107 * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure
108 * @tf: Taskfile to convert
109 * @fis: Buffer into which data will output
110 * @pmp: Port multiplier port
112 * Converts a standard ATA taskfile to a Serial ATA
113 * FIS structure (Register - Host to Device).
116 * Inherited from caller.
119 void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp)
121 fis[0] = 0x27; /* Register - Host to Device FIS */
122 fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number,
123 bit 7 indicates Command FIS */
124 fis[2] = tf->command;
125 fis[3] = tf->feature;
132 fis[8] = tf->hob_lbal;
133 fis[9] = tf->hob_lbam;
134 fis[10] = tf->hob_lbah;
135 fis[11] = tf->hob_feature;
138 fis[13] = tf->hob_nsect;
149 * ata_tf_from_fis - Convert SATA FIS to ATA taskfile
150 * @fis: Buffer from which data will be input
151 * @tf: Taskfile to output
153 * Converts a serial ATA FIS structure to a standard ATA taskfile.
156 * Inherited from caller.
159 void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf)
161 tf->command = fis[2]; /* status */
162 tf->feature = fis[3]; /* error */
169 tf->hob_lbal = fis[8];
170 tf->hob_lbam = fis[9];
171 tf->hob_lbah = fis[10];
174 tf->hob_nsect = fis[13];
177 static const u8 ata_rw_cmds[] = {
181 ATA_CMD_READ_MULTI_EXT,
182 ATA_CMD_WRITE_MULTI_EXT,
186 ATA_CMD_WRITE_MULTI_FUA_EXT,
190 ATA_CMD_PIO_READ_EXT,
191 ATA_CMD_PIO_WRITE_EXT,
204 ATA_CMD_WRITE_FUA_EXT
208 * ata_rwcmd_protocol - set taskfile r/w commands and protocol
209 * @tf: command to examine and configure
210 * @dev: device tf belongs to
212 * Examine the device configuration and tf->flags to calculate
213 * the proper read/write commands and protocol to use.
218 static int ata_rwcmd_protocol(struct ata_taskfile *tf, struct ata_device *dev)
222 int index, fua, lba48, write;
224 fua = (tf->flags & ATA_TFLAG_FUA) ? 4 : 0;
225 lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0;
226 write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0;
228 if (dev->flags & ATA_DFLAG_PIO) {
229 tf->protocol = ATA_PROT_PIO;
230 index = dev->multi_count ? 0 : 8;
231 } else if (lba48 && (dev->ap->flags & ATA_FLAG_PIO_LBA48)) {
232 /* Unable to use DMA due to host limitation */
233 tf->protocol = ATA_PROT_PIO;
234 index = dev->multi_count ? 0 : 8;
236 tf->protocol = ATA_PROT_DMA;
240 cmd = ata_rw_cmds[index + fua + lba48 + write];
249 * ata_tf_read_block - Read block address from ATA taskfile
250 * @tf: ATA taskfile of interest
251 * @dev: ATA device @tf belongs to
256 * Read block address from @tf. This function can handle all
257 * three address formats - LBA, LBA48 and CHS. tf->protocol and
258 * flags select the address format to use.
261 * Block address read from @tf.
263 u64 ata_tf_read_block(struct ata_taskfile *tf, struct ata_device *dev)
267 if (tf->flags & ATA_TFLAG_LBA) {
268 if (tf->flags & ATA_TFLAG_LBA48) {
269 block |= (u64)tf->hob_lbah << 40;
270 block |= (u64)tf->hob_lbam << 32;
271 block |= tf->hob_lbal << 24;
273 block |= (tf->device & 0xf) << 24;
275 block |= tf->lbah << 16;
276 block |= tf->lbam << 8;
281 cyl = tf->lbam | (tf->lbah << 8);
282 head = tf->device & 0xf;
285 block = (cyl * dev->heads + head) * dev->sectors + sect;
292 * ata_build_rw_tf - Build ATA taskfile for given read/write request
293 * @tf: Target ATA taskfile
294 * @dev: ATA device @tf belongs to
295 * @block: Block address
296 * @n_block: Number of blocks
297 * @tf_flags: RW/FUA etc...
303 * Build ATA taskfile @tf for read/write request described by
304 * @block, @n_block, @tf_flags and @tag on @dev.
308 * 0 on success, -ERANGE if the request is too large for @dev,
309 * -EINVAL if the request is invalid.
311 int ata_build_rw_tf(struct ata_taskfile *tf, struct ata_device *dev,
312 u64 block, u32 n_block, unsigned int tf_flags,
315 tf->flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
316 tf->flags |= tf_flags;
318 if ((dev->flags & (ATA_DFLAG_PIO | ATA_DFLAG_NCQ_OFF |
319 ATA_DFLAG_NCQ)) == ATA_DFLAG_NCQ &&
320 likely(tag != ATA_TAG_INTERNAL)) {
322 if (!lba_48_ok(block, n_block))
325 tf->protocol = ATA_PROT_NCQ;
326 tf->flags |= ATA_TFLAG_LBA | ATA_TFLAG_LBA48;
328 if (tf->flags & ATA_TFLAG_WRITE)
329 tf->command = ATA_CMD_FPDMA_WRITE;
331 tf->command = ATA_CMD_FPDMA_READ;
333 tf->nsect = tag << 3;
334 tf->hob_feature = (n_block >> 8) & 0xff;
335 tf->feature = n_block & 0xff;
337 tf->hob_lbah = (block >> 40) & 0xff;
338 tf->hob_lbam = (block >> 32) & 0xff;
339 tf->hob_lbal = (block >> 24) & 0xff;
340 tf->lbah = (block >> 16) & 0xff;
341 tf->lbam = (block >> 8) & 0xff;
342 tf->lbal = block & 0xff;
345 if (tf->flags & ATA_TFLAG_FUA)
346 tf->device |= 1 << 7;
347 } else if (dev->flags & ATA_DFLAG_LBA) {
348 tf->flags |= ATA_TFLAG_LBA;
350 if (lba_28_ok(block, n_block)) {
352 tf->device |= (block >> 24) & 0xf;
353 } else if (lba_48_ok(block, n_block)) {
354 if (!(dev->flags & ATA_DFLAG_LBA48))
358 tf->flags |= ATA_TFLAG_LBA48;
360 tf->hob_nsect = (n_block >> 8) & 0xff;
362 tf->hob_lbah = (block >> 40) & 0xff;
363 tf->hob_lbam = (block >> 32) & 0xff;
364 tf->hob_lbal = (block >> 24) & 0xff;
366 /* request too large even for LBA48 */
369 if (unlikely(ata_rwcmd_protocol(tf, dev) < 0))
372 tf->nsect = n_block & 0xff;
374 tf->lbah = (block >> 16) & 0xff;
375 tf->lbam = (block >> 8) & 0xff;
376 tf->lbal = block & 0xff;
378 tf->device |= ATA_LBA;
381 u32 sect, head, cyl, track;
383 /* The request -may- be too large for CHS addressing. */
384 if (!lba_28_ok(block, n_block))
387 if (unlikely(ata_rwcmd_protocol(tf, dev) < 0))
390 /* Convert LBA to CHS */
391 track = (u32)block / dev->sectors;
392 cyl = track / dev->heads;
393 head = track % dev->heads;
394 sect = (u32)block % dev->sectors + 1;
396 DPRINTK("block %u track %u cyl %u head %u sect %u\n",
397 (u32)block, track, cyl, head, sect);
399 /* Check whether the converted CHS can fit.
403 if ((cyl >> 16) || (head >> 4) || (sect >> 8) || (!sect))
406 tf->nsect = n_block & 0xff; /* Sector count 0 means 256 sectors */
417 * ata_pack_xfermask - Pack pio, mwdma and udma masks into xfer_mask
418 * @pio_mask: pio_mask
419 * @mwdma_mask: mwdma_mask
420 * @udma_mask: udma_mask
422 * Pack @pio_mask, @mwdma_mask and @udma_mask into a single
423 * unsigned int xfer_mask.
431 static unsigned int ata_pack_xfermask(unsigned int pio_mask,
432 unsigned int mwdma_mask,
433 unsigned int udma_mask)
435 return ((pio_mask << ATA_SHIFT_PIO) & ATA_MASK_PIO) |
436 ((mwdma_mask << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA) |
437 ((udma_mask << ATA_SHIFT_UDMA) & ATA_MASK_UDMA);
441 * ata_unpack_xfermask - Unpack xfer_mask into pio, mwdma and udma masks
442 * @xfer_mask: xfer_mask to unpack
443 * @pio_mask: resulting pio_mask
444 * @mwdma_mask: resulting mwdma_mask
445 * @udma_mask: resulting udma_mask
447 * Unpack @xfer_mask into @pio_mask, @mwdma_mask and @udma_mask.
448 * Any NULL distination masks will be ignored.
450 static void ata_unpack_xfermask(unsigned int xfer_mask,
451 unsigned int *pio_mask,
452 unsigned int *mwdma_mask,
453 unsigned int *udma_mask)
456 *pio_mask = (xfer_mask & ATA_MASK_PIO) >> ATA_SHIFT_PIO;
458 *mwdma_mask = (xfer_mask & ATA_MASK_MWDMA) >> ATA_SHIFT_MWDMA;
460 *udma_mask = (xfer_mask & ATA_MASK_UDMA) >> ATA_SHIFT_UDMA;
463 static const struct ata_xfer_ent {
467 { ATA_SHIFT_PIO, ATA_BITS_PIO, XFER_PIO_0 },
468 { ATA_SHIFT_MWDMA, ATA_BITS_MWDMA, XFER_MW_DMA_0 },
469 { ATA_SHIFT_UDMA, ATA_BITS_UDMA, XFER_UDMA_0 },
474 * ata_xfer_mask2mode - Find matching XFER_* for the given xfer_mask
475 * @xfer_mask: xfer_mask of interest
477 * Return matching XFER_* value for @xfer_mask. Only the highest
478 * bit of @xfer_mask is considered.
484 * Matching XFER_* value, 0 if no match found.
486 static u8 ata_xfer_mask2mode(unsigned int xfer_mask)
488 int highbit = fls(xfer_mask) - 1;
489 const struct ata_xfer_ent *ent;
491 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
492 if (highbit >= ent->shift && highbit < ent->shift + ent->bits)
493 return ent->base + highbit - ent->shift;
498 * ata_xfer_mode2mask - Find matching xfer_mask for XFER_*
499 * @xfer_mode: XFER_* of interest
501 * Return matching xfer_mask for @xfer_mode.
507 * Matching xfer_mask, 0 if no match found.
509 static unsigned int ata_xfer_mode2mask(u8 xfer_mode)
511 const struct ata_xfer_ent *ent;
513 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
514 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
515 return 1 << (ent->shift + xfer_mode - ent->base);
520 * ata_xfer_mode2shift - Find matching xfer_shift for XFER_*
521 * @xfer_mode: XFER_* of interest
523 * Return matching xfer_shift for @xfer_mode.
529 * Matching xfer_shift, -1 if no match found.
531 static int ata_xfer_mode2shift(unsigned int xfer_mode)
533 const struct ata_xfer_ent *ent;
535 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
536 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
542 * ata_mode_string - convert xfer_mask to string
543 * @xfer_mask: mask of bits supported; only highest bit counts.
545 * Determine string which represents the highest speed
546 * (highest bit in @modemask).
552 * Constant C string representing highest speed listed in
553 * @mode_mask, or the constant C string "<n/a>".
555 static const char *ata_mode_string(unsigned int xfer_mask)
557 static const char * const xfer_mode_str[] = {
581 highbit = fls(xfer_mask) - 1;
582 if (highbit >= 0 && highbit < ARRAY_SIZE(xfer_mode_str))
583 return xfer_mode_str[highbit];
587 static const char *sata_spd_string(unsigned int spd)
589 static const char * const spd_str[] = {
594 if (spd == 0 || (spd - 1) >= ARRAY_SIZE(spd_str))
596 return spd_str[spd - 1];
599 void ata_dev_disable(struct ata_device *dev)
601 if (ata_dev_enabled(dev) && ata_msg_drv(dev->ap)) {
602 ata_dev_printk(dev, KERN_WARNING, "disabled\n");
608 * ata_devchk - PATA device presence detection
609 * @ap: ATA channel to examine
610 * @device: Device to examine (starting at zero)
612 * This technique was originally described in
613 * Hale Landis's ATADRVR (www.ata-atapi.com), and
614 * later found its way into the ATA/ATAPI spec.
616 * Write a pattern to the ATA shadow registers,
617 * and if a device is present, it will respond by
618 * correctly storing and echoing back the
619 * ATA shadow register contents.
625 static unsigned int ata_devchk(struct ata_port *ap, unsigned int device)
627 struct ata_ioports *ioaddr = &ap->ioaddr;
630 ap->ops->dev_select(ap, device);
632 iowrite8(0x55, ioaddr->nsect_addr);
633 iowrite8(0xaa, ioaddr->lbal_addr);
635 iowrite8(0xaa, ioaddr->nsect_addr);
636 iowrite8(0x55, ioaddr->lbal_addr);
638 iowrite8(0x55, ioaddr->nsect_addr);
639 iowrite8(0xaa, ioaddr->lbal_addr);
641 nsect = ioread8(ioaddr->nsect_addr);
642 lbal = ioread8(ioaddr->lbal_addr);
644 if ((nsect == 0x55) && (lbal == 0xaa))
645 return 1; /* we found a device */
647 return 0; /* nothing found */
651 * ata_dev_classify - determine device type based on ATA-spec signature
652 * @tf: ATA taskfile register set for device to be identified
654 * Determine from taskfile register contents whether a device is
655 * ATA or ATAPI, as per "Signature and persistence" section
656 * of ATA/PI spec (volume 1, sect 5.14).
662 * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, or %ATA_DEV_UNKNOWN
663 * the event of failure.
666 unsigned int ata_dev_classify(const struct ata_taskfile *tf)
668 /* Apple's open source Darwin code hints that some devices only
669 * put a proper signature into the LBA mid/high registers,
670 * So, we only check those. It's sufficient for uniqueness.
673 if (((tf->lbam == 0) && (tf->lbah == 0)) ||
674 ((tf->lbam == 0x3c) && (tf->lbah == 0xc3))) {
675 DPRINTK("found ATA device by sig\n");
679 if (((tf->lbam == 0x14) && (tf->lbah == 0xeb)) ||
680 ((tf->lbam == 0x69) && (tf->lbah == 0x96))) {
681 DPRINTK("found ATAPI device by sig\n");
682 return ATA_DEV_ATAPI;
685 DPRINTK("unknown device\n");
686 return ATA_DEV_UNKNOWN;
690 * ata_dev_try_classify - Parse returned ATA device signature
691 * @ap: ATA channel to examine
692 * @device: Device to examine (starting at zero)
693 * @r_err: Value of error register on completion
695 * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
696 * an ATA/ATAPI-defined set of values is placed in the ATA
697 * shadow registers, indicating the results of device detection
700 * Select the ATA device, and read the values from the ATA shadow
701 * registers. Then parse according to the Error register value,
702 * and the spec-defined values examined by ata_dev_classify().
708 * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE.
712 ata_dev_try_classify(struct ata_port *ap, unsigned int device, u8 *r_err)
714 struct ata_taskfile tf;
718 ap->ops->dev_select(ap, device);
720 memset(&tf, 0, sizeof(tf));
722 ap->ops->tf_read(ap, &tf);
727 /* see if device passed diags: if master then continue and warn later */
728 if (err == 0 && device == 0)
729 /* diagnostic fail : do nothing _YET_ */
730 ap->device[device].horkage |= ATA_HORKAGE_DIAGNOSTIC;
733 else if ((device == 0) && (err == 0x81))
738 /* determine if device is ATA or ATAPI */
739 class = ata_dev_classify(&tf);
741 if (class == ATA_DEV_UNKNOWN)
743 if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0))
749 * ata_id_string - Convert IDENTIFY DEVICE page into string
750 * @id: IDENTIFY DEVICE results we will examine
751 * @s: string into which data is output
752 * @ofs: offset into identify device page
753 * @len: length of string to return. must be an even number.
755 * The strings in the IDENTIFY DEVICE page are broken up into
756 * 16-bit chunks. Run through the string, and output each
757 * 8-bit chunk linearly, regardless of platform.
763 void ata_id_string(const u16 *id, unsigned char *s,
764 unsigned int ofs, unsigned int len)
783 * ata_id_c_string - Convert IDENTIFY DEVICE page into C string
784 * @id: IDENTIFY DEVICE results we will examine
785 * @s: string into which data is output
786 * @ofs: offset into identify device page
787 * @len: length of string to return. must be an odd number.
789 * This function is identical to ata_id_string except that it
790 * trims trailing spaces and terminates the resulting string with
791 * null. @len must be actual maximum length (even number) + 1.
796 void ata_id_c_string(const u16 *id, unsigned char *s,
797 unsigned int ofs, unsigned int len)
803 ata_id_string(id, s, ofs, len - 1);
805 p = s + strnlen(s, len - 1);
806 while (p > s && p[-1] == ' ')
811 static u64 ata_id_n_sectors(const u16 *id)
813 if (ata_id_has_lba(id)) {
814 if (ata_id_has_lba48(id))
815 return ata_id_u64(id, 100);
817 return ata_id_u32(id, 60);
819 if (ata_id_current_chs_valid(id))
820 return ata_id_u32(id, 57);
822 return id[1] * id[3] * id[6];
827 * ata_noop_dev_select - Select device 0/1 on ATA bus
828 * @ap: ATA channel to manipulate
829 * @device: ATA device (numbered from zero) to select
831 * This function performs no actual function.
833 * May be used as the dev_select() entry in ata_port_operations.
838 void ata_noop_dev_select (struct ata_port *ap, unsigned int device)
844 * ata_std_dev_select - Select device 0/1 on ATA bus
845 * @ap: ATA channel to manipulate
846 * @device: ATA device (numbered from zero) to select
848 * Use the method defined in the ATA specification to
849 * make either device 0, or device 1, active on the
850 * ATA channel. Works with both PIO and MMIO.
852 * May be used as the dev_select() entry in ata_port_operations.
858 void ata_std_dev_select (struct ata_port *ap, unsigned int device)
863 tmp = ATA_DEVICE_OBS;
865 tmp = ATA_DEVICE_OBS | ATA_DEV1;
867 iowrite8(tmp, ap->ioaddr.device_addr);
868 ata_pause(ap); /* needed; also flushes, for mmio */
872 * ata_dev_select - Select device 0/1 on ATA bus
873 * @ap: ATA channel to manipulate
874 * @device: ATA device (numbered from zero) to select
875 * @wait: non-zero to wait for Status register BSY bit to clear
876 * @can_sleep: non-zero if context allows sleeping
878 * Use the method defined in the ATA specification to
879 * make either device 0, or device 1, active on the
882 * This is a high-level version of ata_std_dev_select(),
883 * which additionally provides the services of inserting
884 * the proper pauses and status polling, where needed.
890 void ata_dev_select(struct ata_port *ap, unsigned int device,
891 unsigned int wait, unsigned int can_sleep)
893 if (ata_msg_probe(ap))
894 ata_port_printk(ap, KERN_INFO, "ata_dev_select: ENTER, ata%u: "
895 "device %u, wait %u\n", ap->id, device, wait);
900 ap->ops->dev_select(ap, device);
903 if (can_sleep && ap->device[device].class == ATA_DEV_ATAPI)
910 * ata_dump_id - IDENTIFY DEVICE info debugging output
911 * @id: IDENTIFY DEVICE page to dump
913 * Dump selected 16-bit words from the given IDENTIFY DEVICE
920 static inline void ata_dump_id(const u16 *id)
922 DPRINTK("49==0x%04x "
932 DPRINTK("80==0x%04x "
942 DPRINTK("88==0x%04x "
949 * ata_id_xfermask - Compute xfermask from the given IDENTIFY data
950 * @id: IDENTIFY data to compute xfer mask from
952 * Compute the xfermask for this device. This is not as trivial
953 * as it seems if we must consider early devices correctly.
955 * FIXME: pre IDE drive timing (do we care ?).
963 static unsigned int ata_id_xfermask(const u16 *id)
965 unsigned int pio_mask, mwdma_mask, udma_mask;
967 /* Usual case. Word 53 indicates word 64 is valid */
968 if (id[ATA_ID_FIELD_VALID] & (1 << 1)) {
969 pio_mask = id[ATA_ID_PIO_MODES] & 0x03;
973 /* If word 64 isn't valid then Word 51 high byte holds
974 * the PIO timing number for the maximum. Turn it into
977 u8 mode = (id[ATA_ID_OLD_PIO_MODES] >> 8) & 0xFF;
978 if (mode < 5) /* Valid PIO range */
979 pio_mask = (2 << mode) - 1;
983 /* But wait.. there's more. Design your standards by
984 * committee and you too can get a free iordy field to
985 * process. However its the speeds not the modes that
986 * are supported... Note drivers using the timing API
987 * will get this right anyway
991 mwdma_mask = id[ATA_ID_MWDMA_MODES] & 0x07;
993 if (ata_id_is_cfa(id)) {
995 * Process compact flash extended modes
997 int pio = id[163] & 0x7;
998 int dma = (id[163] >> 3) & 7;
1001 pio_mask |= (1 << 5);
1003 pio_mask |= (1 << 6);
1005 mwdma_mask |= (1 << 3);
1007 mwdma_mask |= (1 << 4);
1011 if (id[ATA_ID_FIELD_VALID] & (1 << 2))
1012 udma_mask = id[ATA_ID_UDMA_MODES] & 0xff;
1014 return ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask);
1018 * ata_port_queue_task - Queue port_task
1019 * @ap: The ata_port to queue port_task for
1020 * @fn: workqueue function to be scheduled
1021 * @data: data for @fn to use
1022 * @delay: delay time for workqueue function
1024 * Schedule @fn(@data) for execution after @delay jiffies using
1025 * port_task. There is one port_task per port and it's the
1026 * user(low level driver)'s responsibility to make sure that only
1027 * one task is active at any given time.
1029 * libata core layer takes care of synchronization between
1030 * port_task and EH. ata_port_queue_task() may be ignored for EH
1034 * Inherited from caller.
1036 void ata_port_queue_task(struct ata_port *ap, work_func_t fn, void *data,
1037 unsigned long delay)
1041 if (ap->pflags & ATA_PFLAG_FLUSH_PORT_TASK)
1044 PREPARE_DELAYED_WORK(&ap->port_task, fn);
1045 ap->port_task_data = data;
1047 rc = queue_delayed_work(ata_wq, &ap->port_task, delay);
1049 /* rc == 0 means that another user is using port task */
1054 * ata_port_flush_task - Flush port_task
1055 * @ap: The ata_port to flush port_task for
1057 * After this function completes, port_task is guranteed not to
1058 * be running or scheduled.
1061 * Kernel thread context (may sleep)
1063 void ata_port_flush_task(struct ata_port *ap)
1065 unsigned long flags;
1069 spin_lock_irqsave(ap->lock, flags);
1070 ap->pflags |= ATA_PFLAG_FLUSH_PORT_TASK;
1071 spin_unlock_irqrestore(ap->lock, flags);
1073 DPRINTK("flush #1\n");
1074 flush_workqueue(ata_wq);
1077 * At this point, if a task is running, it's guaranteed to see
1078 * the FLUSH flag; thus, it will never queue pio tasks again.
1081 if (!cancel_delayed_work(&ap->port_task)) {
1082 if (ata_msg_ctl(ap))
1083 ata_port_printk(ap, KERN_DEBUG, "%s: flush #2\n",
1085 flush_workqueue(ata_wq);
1088 spin_lock_irqsave(ap->lock, flags);
1089 ap->pflags &= ~ATA_PFLAG_FLUSH_PORT_TASK;
1090 spin_unlock_irqrestore(ap->lock, flags);
1092 if (ata_msg_ctl(ap))
1093 ata_port_printk(ap, KERN_DEBUG, "%s: EXIT\n", __FUNCTION__);
1096 static void ata_qc_complete_internal(struct ata_queued_cmd *qc)
1098 struct completion *waiting = qc->private_data;
1104 * ata_exec_internal_sg - execute libata internal command
1105 * @dev: Device to which the command is sent
1106 * @tf: Taskfile registers for the command and the result
1107 * @cdb: CDB for packet command
1108 * @dma_dir: Data tranfer direction of the command
1109 * @sg: sg list for the data buffer of the command
1110 * @n_elem: Number of sg entries
1112 * Executes libata internal command with timeout. @tf contains
1113 * command on entry and result on return. Timeout and error
1114 * conditions are reported via return value. No recovery action
1115 * is taken after a command times out. It's caller's duty to
1116 * clean up after timeout.
1119 * None. Should be called with kernel context, might sleep.
1122 * Zero on success, AC_ERR_* mask on failure
1124 unsigned ata_exec_internal_sg(struct ata_device *dev,
1125 struct ata_taskfile *tf, const u8 *cdb,
1126 int dma_dir, struct scatterlist *sg,
1127 unsigned int n_elem)
1129 struct ata_port *ap = dev->ap;
1130 u8 command = tf->command;
1131 struct ata_queued_cmd *qc;
1132 unsigned int tag, preempted_tag;
1133 u32 preempted_sactive, preempted_qc_active;
1134 DECLARE_COMPLETION_ONSTACK(wait);
1135 unsigned long flags;
1136 unsigned int err_mask;
1139 spin_lock_irqsave(ap->lock, flags);
1141 /* no internal command while frozen */
1142 if (ap->pflags & ATA_PFLAG_FROZEN) {
1143 spin_unlock_irqrestore(ap->lock, flags);
1144 return AC_ERR_SYSTEM;
1147 /* initialize internal qc */
1149 /* XXX: Tag 0 is used for drivers with legacy EH as some
1150 * drivers choke if any other tag is given. This breaks
1151 * ata_tag_internal() test for those drivers. Don't use new
1152 * EH stuff without converting to it.
1154 if (ap->ops->error_handler)
1155 tag = ATA_TAG_INTERNAL;
1159 if (test_and_set_bit(tag, &ap->qc_allocated))
1161 qc = __ata_qc_from_tag(ap, tag);
1169 preempted_tag = ap->active_tag;
1170 preempted_sactive = ap->sactive;
1171 preempted_qc_active = ap->qc_active;
1172 ap->active_tag = ATA_TAG_POISON;
1176 /* prepare & issue qc */
1179 memcpy(qc->cdb, cdb, ATAPI_CDB_LEN);
1180 qc->flags |= ATA_QCFLAG_RESULT_TF;
1181 qc->dma_dir = dma_dir;
1182 if (dma_dir != DMA_NONE) {
1183 unsigned int i, buflen = 0;
1185 for (i = 0; i < n_elem; i++)
1186 buflen += sg[i].length;
1188 ata_sg_init(qc, sg, n_elem);
1189 qc->nbytes = buflen;
1192 qc->private_data = &wait;
1193 qc->complete_fn = ata_qc_complete_internal;
1197 spin_unlock_irqrestore(ap->lock, flags);
1199 rc = wait_for_completion_timeout(&wait, ata_probe_timeout);
1201 ata_port_flush_task(ap);
1204 spin_lock_irqsave(ap->lock, flags);
1206 /* We're racing with irq here. If we lose, the
1207 * following test prevents us from completing the qc
1208 * twice. If we win, the port is frozen and will be
1209 * cleaned up by ->post_internal_cmd().
1211 if (qc->flags & ATA_QCFLAG_ACTIVE) {
1212 qc->err_mask |= AC_ERR_TIMEOUT;
1214 if (ap->ops->error_handler)
1215 ata_port_freeze(ap);
1217 ata_qc_complete(qc);
1219 if (ata_msg_warn(ap))
1220 ata_dev_printk(dev, KERN_WARNING,
1221 "qc timeout (cmd 0x%x)\n", command);
1224 spin_unlock_irqrestore(ap->lock, flags);
1227 /* do post_internal_cmd */
1228 if (ap->ops->post_internal_cmd)
1229 ap->ops->post_internal_cmd(qc);
1231 if ((qc->flags & ATA_QCFLAG_FAILED) && !qc->err_mask) {
1232 if (ata_msg_warn(ap))
1233 ata_dev_printk(dev, KERN_WARNING,
1234 "zero err_mask for failed "
1235 "internal command, assuming AC_ERR_OTHER\n");
1236 qc->err_mask |= AC_ERR_OTHER;
1240 spin_lock_irqsave(ap->lock, flags);
1242 *tf = qc->result_tf;
1243 err_mask = qc->err_mask;
1246 ap->active_tag = preempted_tag;
1247 ap->sactive = preempted_sactive;
1248 ap->qc_active = preempted_qc_active;
1250 /* XXX - Some LLDDs (sata_mv) disable port on command failure.
1251 * Until those drivers are fixed, we detect the condition
1252 * here, fail the command with AC_ERR_SYSTEM and reenable the
1255 * Note that this doesn't change any behavior as internal
1256 * command failure results in disabling the device in the
1257 * higher layer for LLDDs without new reset/EH callbacks.
1259 * Kill the following code as soon as those drivers are fixed.
1261 if (ap->flags & ATA_FLAG_DISABLED) {
1262 err_mask |= AC_ERR_SYSTEM;
1266 spin_unlock_irqrestore(ap->lock, flags);
1272 * ata_exec_internal - execute libata internal command
1273 * @dev: Device to which the command is sent
1274 * @tf: Taskfile registers for the command and the result
1275 * @cdb: CDB for packet command
1276 * @dma_dir: Data tranfer direction of the command
1277 * @buf: Data buffer of the command
1278 * @buflen: Length of data buffer
1280 * Wrapper around ata_exec_internal_sg() which takes simple
1281 * buffer instead of sg list.
1284 * None. Should be called with kernel context, might sleep.
1287 * Zero on success, AC_ERR_* mask on failure
1289 unsigned ata_exec_internal(struct ata_device *dev,
1290 struct ata_taskfile *tf, const u8 *cdb,
1291 int dma_dir, void *buf, unsigned int buflen)
1293 struct scatterlist *psg = NULL, sg;
1294 unsigned int n_elem = 0;
1296 if (dma_dir != DMA_NONE) {
1298 sg_init_one(&sg, buf, buflen);
1303 return ata_exec_internal_sg(dev, tf, cdb, dma_dir, psg, n_elem);
1307 * ata_do_simple_cmd - execute simple internal command
1308 * @dev: Device to which the command is sent
1309 * @cmd: Opcode to execute
1311 * Execute a 'simple' command, that only consists of the opcode
1312 * 'cmd' itself, without filling any other registers
1315 * Kernel thread context (may sleep).
1318 * Zero on success, AC_ERR_* mask on failure
1320 unsigned int ata_do_simple_cmd(struct ata_device *dev, u8 cmd)
1322 struct ata_taskfile tf;
1324 ata_tf_init(dev, &tf);
1327 tf.flags |= ATA_TFLAG_DEVICE;
1328 tf.protocol = ATA_PROT_NODATA;
1330 return ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
1334 * ata_pio_need_iordy - check if iordy needed
1337 * Check if the current speed of the device requires IORDY. Used
1338 * by various controllers for chip configuration.
1341 unsigned int ata_pio_need_iordy(const struct ata_device *adev)
1344 int speed = adev->pio_mode - XFER_PIO_0;
1351 /* If we have no drive specific rule, then PIO 2 is non IORDY */
1353 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE */
1354 pio = adev->id[ATA_ID_EIDE_PIO];
1355 /* Is the speed faster than the drive allows non IORDY ? */
1357 /* This is cycle times not frequency - watch the logic! */
1358 if (pio > 240) /* PIO2 is 240nS per cycle */
1367 * ata_dev_read_id - Read ID data from the specified device
1368 * @dev: target device
1369 * @p_class: pointer to class of the target device (may be changed)
1370 * @flags: ATA_READID_* flags
1371 * @id: buffer to read IDENTIFY data into
1373 * Read ID data from the specified device. ATA_CMD_ID_ATA is
1374 * performed on ATA devices and ATA_CMD_ID_ATAPI on ATAPI
1375 * devices. This function also issues ATA_CMD_INIT_DEV_PARAMS
1376 * for pre-ATA4 drives.
1379 * Kernel thread context (may sleep)
1382 * 0 on success, -errno otherwise.
1384 int ata_dev_read_id(struct ata_device *dev, unsigned int *p_class,
1385 unsigned int flags, u16 *id)
1387 struct ata_port *ap = dev->ap;
1388 unsigned int class = *p_class;
1389 struct ata_taskfile tf;
1390 unsigned int err_mask = 0;
1394 if (ata_msg_ctl(ap))
1395 ata_dev_printk(dev, KERN_DEBUG, "%s: ENTER, host %u, dev %u\n",
1396 __FUNCTION__, ap->id, dev->devno);
1398 ata_dev_select(ap, dev->devno, 1, 1); /* select device 0/1 */
1401 ata_tf_init(dev, &tf);
1405 tf.command = ATA_CMD_ID_ATA;
1408 tf.command = ATA_CMD_ID_ATAPI;
1412 reason = "unsupported class";
1416 tf.protocol = ATA_PROT_PIO;
1418 /* Some devices choke if TF registers contain garbage. Make
1419 * sure those are properly initialized.
1421 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
1423 /* Device presence detection is unreliable on some
1424 * controllers. Always poll IDENTIFY if available.
1426 tf.flags |= ATA_TFLAG_POLLING;
1428 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_FROM_DEVICE,
1429 id, sizeof(id[0]) * ATA_ID_WORDS);
1431 if (err_mask & AC_ERR_NODEV_HINT) {
1432 DPRINTK("ata%u.%d: NODEV after polling detection\n",
1433 ap->id, dev->devno);
1438 reason = "I/O error";
1442 swap_buf_le16(id, ATA_ID_WORDS);
1446 reason = "device reports illegal type";
1448 if (class == ATA_DEV_ATA) {
1449 if (!ata_id_is_ata(id) && !ata_id_is_cfa(id))
1452 if (ata_id_is_ata(id))
1456 if ((flags & ATA_READID_POSTRESET) && class == ATA_DEV_ATA) {
1458 * The exact sequence expected by certain pre-ATA4 drives is:
1461 * INITIALIZE DEVICE PARAMETERS
1463 * Some drives were very specific about that exact sequence.
1465 if (ata_id_major_version(id) < 4 || !ata_id_has_lba(id)) {
1466 err_mask = ata_dev_init_params(dev, id[3], id[6]);
1469 reason = "INIT_DEV_PARAMS failed";
1473 /* current CHS translation info (id[53-58]) might be
1474 * changed. reread the identify device info.
1476 flags &= ~ATA_READID_POSTRESET;
1486 if (ata_msg_warn(ap))
1487 ata_dev_printk(dev, KERN_WARNING, "failed to IDENTIFY "
1488 "(%s, err_mask=0x%x)\n", reason, err_mask);
1492 static inline u8 ata_dev_knobble(struct ata_device *dev)
1494 return ((dev->ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(dev->id)));
1497 static void ata_dev_config_ncq(struct ata_device *dev,
1498 char *desc, size_t desc_sz)
1500 struct ata_port *ap = dev->ap;
1501 int hdepth = 0, ddepth = ata_id_queue_depth(dev->id);
1503 if (!ata_id_has_ncq(dev->id)) {
1507 if (ata_device_blacklisted(dev) & ATA_HORKAGE_NONCQ) {
1508 snprintf(desc, desc_sz, "NCQ (not used)");
1511 if (ap->flags & ATA_FLAG_NCQ) {
1512 hdepth = min(ap->scsi_host->can_queue, ATA_MAX_QUEUE - 1);
1513 dev->flags |= ATA_DFLAG_NCQ;
1516 if (hdepth >= ddepth)
1517 snprintf(desc, desc_sz, "NCQ (depth %d)", ddepth);
1519 snprintf(desc, desc_sz, "NCQ (depth %d/%d)", hdepth, ddepth);
1522 static void ata_set_port_max_cmd_len(struct ata_port *ap)
1526 if (ap->scsi_host) {
1527 unsigned int len = 0;
1529 for (i = 0; i < ATA_MAX_DEVICES; i++)
1530 len = max(len, ap->device[i].cdb_len);
1532 ap->scsi_host->max_cmd_len = len;
1537 * ata_dev_configure - Configure the specified ATA/ATAPI device
1538 * @dev: Target device to configure
1540 * Configure @dev according to @dev->id. Generic and low-level
1541 * driver specific fixups are also applied.
1544 * Kernel thread context (may sleep)
1547 * 0 on success, -errno otherwise
1549 int ata_dev_configure(struct ata_device *dev)
1551 struct ata_port *ap = dev->ap;
1552 int print_info = ap->eh_context.i.flags & ATA_EHI_PRINTINFO;
1553 const u16 *id = dev->id;
1554 unsigned int xfer_mask;
1555 char revbuf[7]; /* XYZ-99\0 */
1556 char fwrevbuf[ATA_ID_FW_REV_LEN+1];
1557 char modelbuf[ATA_ID_PROD_LEN+1];
1560 if (!ata_dev_enabled(dev) && ata_msg_info(ap)) {
1561 ata_dev_printk(dev, KERN_INFO,
1562 "%s: ENTER/EXIT (host %u, dev %u) -- nodev\n",
1563 __FUNCTION__, ap->id, dev->devno);
1567 if (ata_msg_probe(ap))
1568 ata_dev_printk(dev, KERN_DEBUG, "%s: ENTER, host %u, dev %u\n",
1569 __FUNCTION__, ap->id, dev->devno);
1571 /* print device capabilities */
1572 if (ata_msg_probe(ap))
1573 ata_dev_printk(dev, KERN_DEBUG,
1574 "%s: cfg 49:%04x 82:%04x 83:%04x 84:%04x "
1575 "85:%04x 86:%04x 87:%04x 88:%04x\n",
1577 id[49], id[82], id[83], id[84],
1578 id[85], id[86], id[87], id[88]);
1580 /* initialize to-be-configured parameters */
1581 dev->flags &= ~ATA_DFLAG_CFG_MASK;
1582 dev->max_sectors = 0;
1590 * common ATA, ATAPI feature tests
1593 /* find max transfer mode; for printk only */
1594 xfer_mask = ata_id_xfermask(id);
1596 if (ata_msg_probe(ap))
1599 /* ATA-specific feature tests */
1600 if (dev->class == ATA_DEV_ATA) {
1601 if (ata_id_is_cfa(id)) {
1602 if (id[162] & 1) /* CPRM may make this media unusable */
1603 ata_dev_printk(dev, KERN_WARNING, "ata%u: device %u supports DRM functions and may not be fully accessable.\n",
1604 ap->id, dev->devno);
1605 snprintf(revbuf, 7, "CFA");
1608 snprintf(revbuf, 7, "ATA-%d", ata_id_major_version(id));
1610 dev->n_sectors = ata_id_n_sectors(id);
1612 /* SCSI only uses 4-char revisions, dump full 8 chars from ATA */
1613 ata_id_c_string(dev->id, fwrevbuf, ATA_ID_FW_REV,
1616 ata_id_c_string(dev->id, modelbuf, ATA_ID_PROD,
1619 if (dev->id[59] & 0x100)
1620 dev->multi_count = dev->id[59] & 0xff;
1622 if (ata_id_has_lba(id)) {
1623 const char *lba_desc;
1627 dev->flags |= ATA_DFLAG_LBA;
1628 if (ata_id_has_lba48(id)) {
1629 dev->flags |= ATA_DFLAG_LBA48;
1632 if (dev->n_sectors >= (1UL << 28) &&
1633 ata_id_has_flush_ext(id))
1634 dev->flags |= ATA_DFLAG_FLUSH_EXT;
1638 ata_dev_config_ncq(dev, ncq_desc, sizeof(ncq_desc));
1640 /* print device info to dmesg */
1641 if (ata_msg_drv(ap) && print_info) {
1642 ata_dev_printk(dev, KERN_INFO,
1643 "%s: %s, %s, max %s\n",
1644 revbuf, modelbuf, fwrevbuf,
1645 ata_mode_string(xfer_mask));
1646 ata_dev_printk(dev, KERN_INFO,
1647 "%Lu sectors, multi %u: %s %s\n",
1648 (unsigned long long)dev->n_sectors,
1649 dev->multi_count, lba_desc, ncq_desc);
1654 /* Default translation */
1655 dev->cylinders = id[1];
1657 dev->sectors = id[6];
1659 if (ata_id_current_chs_valid(id)) {
1660 /* Current CHS translation is valid. */
1661 dev->cylinders = id[54];
1662 dev->heads = id[55];
1663 dev->sectors = id[56];
1666 /* print device info to dmesg */
1667 if (ata_msg_drv(ap) && print_info) {
1668 ata_dev_printk(dev, KERN_INFO,
1669 "%s: %s, %s, max %s\n",
1670 revbuf, modelbuf, fwrevbuf,
1671 ata_mode_string(xfer_mask));
1672 ata_dev_printk(dev, KERN_INFO,
1673 "%Lu sectors, multi %u, CHS %u/%u/%u\n",
1674 (unsigned long long)dev->n_sectors,
1675 dev->multi_count, dev->cylinders,
1676 dev->heads, dev->sectors);
1683 /* ATAPI-specific feature tests */
1684 else if (dev->class == ATA_DEV_ATAPI) {
1685 char *cdb_intr_string = "";
1687 rc = atapi_cdb_len(id);
1688 if ((rc < 12) || (rc > ATAPI_CDB_LEN)) {
1689 if (ata_msg_warn(ap))
1690 ata_dev_printk(dev, KERN_WARNING,
1691 "unsupported CDB len\n");
1695 dev->cdb_len = (unsigned int) rc;
1697 if (ata_id_cdb_intr(dev->id)) {
1698 dev->flags |= ATA_DFLAG_CDB_INTR;
1699 cdb_intr_string = ", CDB intr";
1702 /* print device info to dmesg */
1703 if (ata_msg_drv(ap) && print_info)
1704 ata_dev_printk(dev, KERN_INFO, "ATAPI, max %s%s\n",
1705 ata_mode_string(xfer_mask),
1709 /* determine max_sectors */
1710 dev->max_sectors = ATA_MAX_SECTORS;
1711 if (dev->flags & ATA_DFLAG_LBA48)
1712 dev->max_sectors = ATA_MAX_SECTORS_LBA48;
1714 if (dev->horkage & ATA_HORKAGE_DIAGNOSTIC) {
1715 /* Let the user know. We don't want to disallow opens for
1716 rescue purposes, or in case the vendor is just a blithering
1719 ata_dev_printk(dev, KERN_WARNING,
1720 "Drive reports diagnostics failure. This may indicate a drive\n");
1721 ata_dev_printk(dev, KERN_WARNING,
1722 "fault or invalid emulation. Contact drive vendor for information.\n");
1726 ata_set_port_max_cmd_len(ap);
1728 /* limit bridge transfers to udma5, 200 sectors */
1729 if (ata_dev_knobble(dev)) {
1730 if (ata_msg_drv(ap) && print_info)
1731 ata_dev_printk(dev, KERN_INFO,
1732 "applying bridge limits\n");
1733 dev->udma_mask &= ATA_UDMA5;
1734 dev->max_sectors = ATA_MAX_SECTORS;
1737 if (ap->ops->dev_config)
1738 ap->ops->dev_config(ap, dev);
1740 if (ata_msg_probe(ap))
1741 ata_dev_printk(dev, KERN_DEBUG, "%s: EXIT, drv_stat = 0x%x\n",
1742 __FUNCTION__, ata_chk_status(ap));
1746 if (ata_msg_probe(ap))
1747 ata_dev_printk(dev, KERN_DEBUG,
1748 "%s: EXIT, err\n", __FUNCTION__);
1753 * ata_bus_probe - Reset and probe ATA bus
1756 * Master ATA bus probing function. Initiates a hardware-dependent
1757 * bus reset, then attempts to identify any devices found on
1761 * PCI/etc. bus probe sem.
1764 * Zero on success, negative errno otherwise.
1767 int ata_bus_probe(struct ata_port *ap)
1769 unsigned int classes[ATA_MAX_DEVICES];
1770 int tries[ATA_MAX_DEVICES];
1771 int i, rc, down_xfermask;
1772 struct ata_device *dev;
1776 for (i = 0; i < ATA_MAX_DEVICES; i++)
1777 tries[i] = ATA_PROBE_MAX_TRIES;
1782 /* reset and determine device classes */
1783 ap->ops->phy_reset(ap);
1785 /* retrieve and execute the ATA task file of _GTF */
1786 ata_acpi_exec_tfs(ap);
1788 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1789 dev = &ap->device[i];
1791 if (!(ap->flags & ATA_FLAG_DISABLED) &&
1792 dev->class != ATA_DEV_UNKNOWN)
1793 classes[dev->devno] = dev->class;
1795 classes[dev->devno] = ATA_DEV_NONE;
1797 dev->class = ATA_DEV_UNKNOWN;
1802 /* after the reset the device state is PIO 0 and the controller
1803 state is undefined. Record the mode */
1805 for (i = 0; i < ATA_MAX_DEVICES; i++)
1806 ap->device[i].pio_mode = XFER_PIO_0;
1808 /* read IDENTIFY page and configure devices */
1809 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1810 dev = &ap->device[i];
1813 dev->class = classes[i];
1815 if (!ata_dev_enabled(dev))
1818 rc = ata_dev_read_id(dev, &dev->class, ATA_READID_POSTRESET,
1823 ap->eh_context.i.flags |= ATA_EHI_PRINTINFO;
1824 rc = ata_dev_configure(dev);
1825 ap->eh_context.i.flags &= ~ATA_EHI_PRINTINFO;
1830 /* configure transfer mode */
1831 rc = ata_set_mode(ap, &dev);
1837 for (i = 0; i < ATA_MAX_DEVICES; i++)
1838 if (ata_dev_enabled(&ap->device[i]))
1841 /* no device present, disable port */
1842 ata_port_disable(ap);
1843 ap->ops->port_disable(ap);
1850 tries[dev->devno] = 0;
1853 sata_down_spd_limit(ap);
1856 tries[dev->devno]--;
1857 if (down_xfermask &&
1858 ata_down_xfermask_limit(dev, tries[dev->devno] == 1))
1859 tries[dev->devno] = 0;
1862 if (!tries[dev->devno]) {
1863 ata_down_xfermask_limit(dev, 1);
1864 ata_dev_disable(dev);
1871 * ata_port_probe - Mark port as enabled
1872 * @ap: Port for which we indicate enablement
1874 * Modify @ap data structure such that the system
1875 * thinks that the entire port is enabled.
1877 * LOCKING: host lock, or some other form of
1881 void ata_port_probe(struct ata_port *ap)
1883 ap->flags &= ~ATA_FLAG_DISABLED;
1887 * sata_print_link_status - Print SATA link status
1888 * @ap: SATA port to printk link status about
1890 * This function prints link speed and status of a SATA link.
1895 static void sata_print_link_status(struct ata_port *ap)
1897 u32 sstatus, scontrol, tmp;
1899 if (sata_scr_read(ap, SCR_STATUS, &sstatus))
1901 sata_scr_read(ap, SCR_CONTROL, &scontrol);
1903 if (ata_port_online(ap)) {
1904 tmp = (sstatus >> 4) & 0xf;
1905 ata_port_printk(ap, KERN_INFO,
1906 "SATA link up %s (SStatus %X SControl %X)\n",
1907 sata_spd_string(tmp), sstatus, scontrol);
1909 ata_port_printk(ap, KERN_INFO,
1910 "SATA link down (SStatus %X SControl %X)\n",
1916 * __sata_phy_reset - Wake/reset a low-level SATA PHY
1917 * @ap: SATA port associated with target SATA PHY.
1919 * This function issues commands to standard SATA Sxxx
1920 * PHY registers, to wake up the phy (and device), and
1921 * clear any reset condition.
1924 * PCI/etc. bus probe sem.
1927 void __sata_phy_reset(struct ata_port *ap)
1930 unsigned long timeout = jiffies + (HZ * 5);
1932 if (ap->flags & ATA_FLAG_SATA_RESET) {
1933 /* issue phy wake/reset */
1934 sata_scr_write_flush(ap, SCR_CONTROL, 0x301);
1935 /* Couldn't find anything in SATA I/II specs, but
1936 * AHCI-1.1 10.4.2 says at least 1 ms. */
1939 /* phy wake/clear reset */
1940 sata_scr_write_flush(ap, SCR_CONTROL, 0x300);
1942 /* wait for phy to become ready, if necessary */
1945 sata_scr_read(ap, SCR_STATUS, &sstatus);
1946 if ((sstatus & 0xf) != 1)
1948 } while (time_before(jiffies, timeout));
1950 /* print link status */
1951 sata_print_link_status(ap);
1953 /* TODO: phy layer with polling, timeouts, etc. */
1954 if (!ata_port_offline(ap))
1957 ata_port_disable(ap);
1959 if (ap->flags & ATA_FLAG_DISABLED)
1962 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
1963 ata_port_disable(ap);
1967 ap->cbl = ATA_CBL_SATA;
1971 * sata_phy_reset - Reset SATA bus.
1972 * @ap: SATA port associated with target SATA PHY.
1974 * This function resets the SATA bus, and then probes
1975 * the bus for devices.
1978 * PCI/etc. bus probe sem.
1981 void sata_phy_reset(struct ata_port *ap)
1983 __sata_phy_reset(ap);
1984 if (ap->flags & ATA_FLAG_DISABLED)
1990 * ata_dev_pair - return other device on cable
1993 * Obtain the other device on the same cable, or if none is
1994 * present NULL is returned
1997 struct ata_device *ata_dev_pair(struct ata_device *adev)
1999 struct ata_port *ap = adev->ap;
2000 struct ata_device *pair = &ap->device[1 - adev->devno];
2001 if (!ata_dev_enabled(pair))
2007 * ata_port_disable - Disable port.
2008 * @ap: Port to be disabled.
2010 * Modify @ap data structure such that the system
2011 * thinks that the entire port is disabled, and should
2012 * never attempt to probe or communicate with devices
2015 * LOCKING: host lock, or some other form of
2019 void ata_port_disable(struct ata_port *ap)
2021 ap->device[0].class = ATA_DEV_NONE;
2022 ap->device[1].class = ATA_DEV_NONE;
2023 ap->flags |= ATA_FLAG_DISABLED;
2027 * sata_down_spd_limit - adjust SATA spd limit downward
2028 * @ap: Port to adjust SATA spd limit for
2030 * Adjust SATA spd limit of @ap downward. Note that this
2031 * function only adjusts the limit. The change must be applied
2032 * using sata_set_spd().
2035 * Inherited from caller.
2038 * 0 on success, negative errno on failure
2040 int sata_down_spd_limit(struct ata_port *ap)
2042 u32 sstatus, spd, mask;
2045 rc = sata_scr_read(ap, SCR_STATUS, &sstatus);
2049 mask = ap->sata_spd_limit;
2052 highbit = fls(mask) - 1;
2053 mask &= ~(1 << highbit);
2055 spd = (sstatus >> 4) & 0xf;
2059 mask &= (1 << spd) - 1;
2063 ap->sata_spd_limit = mask;
2065 ata_port_printk(ap, KERN_WARNING, "limiting SATA link speed to %s\n",
2066 sata_spd_string(fls(mask)));
2071 static int __sata_set_spd_needed(struct ata_port *ap, u32 *scontrol)
2075 if (ap->sata_spd_limit == UINT_MAX)
2078 limit = fls(ap->sata_spd_limit);
2080 spd = (*scontrol >> 4) & 0xf;
2081 *scontrol = (*scontrol & ~0xf0) | ((limit & 0xf) << 4);
2083 return spd != limit;
2087 * sata_set_spd_needed - is SATA spd configuration needed
2088 * @ap: Port in question
2090 * Test whether the spd limit in SControl matches
2091 * @ap->sata_spd_limit. This function is used to determine
2092 * whether hardreset is necessary to apply SATA spd
2096 * Inherited from caller.
2099 * 1 if SATA spd configuration is needed, 0 otherwise.
2101 int sata_set_spd_needed(struct ata_port *ap)
2105 if (sata_scr_read(ap, SCR_CONTROL, &scontrol))
2108 return __sata_set_spd_needed(ap, &scontrol);
2112 * sata_set_spd - set SATA spd according to spd limit
2113 * @ap: Port to set SATA spd for
2115 * Set SATA spd of @ap according to sata_spd_limit.
2118 * Inherited from caller.
2121 * 0 if spd doesn't need to be changed, 1 if spd has been
2122 * changed. Negative errno if SCR registers are inaccessible.
2124 int sata_set_spd(struct ata_port *ap)
2129 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
2132 if (!__sata_set_spd_needed(ap, &scontrol))
2135 if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol)))
2142 * This mode timing computation functionality is ported over from
2143 * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik
2146 * PIO 0-4, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
2147 * These were taken from ATA/ATAPI-6 standard, rev 0a, except
2148 * for UDMA6, which is currently supported only by Maxtor drives.
2150 * For PIO 5/6 MWDMA 3/4 see the CFA specification 3.0.
2153 static const struct ata_timing ata_timing[] = {
2155 { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 },
2156 { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 },
2157 { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 },
2158 { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 },
2160 { XFER_MW_DMA_4, 25, 0, 0, 0, 55, 20, 80, 0 },
2161 { XFER_MW_DMA_3, 25, 0, 0, 0, 65, 25, 100, 0 },
2162 { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 },
2163 { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 },
2164 { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 },
2166 /* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */
2168 { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 },
2169 { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 },
2170 { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 },
2172 { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 },
2173 { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 },
2174 { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 },
2176 { XFER_PIO_6, 10, 55, 20, 80, 55, 20, 80, 0 },
2177 { XFER_PIO_5, 15, 65, 25, 100, 65, 25, 100, 0 },
2178 { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 },
2179 { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 },
2181 { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 },
2182 { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 },
2183 { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 },
2185 /* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */
2190 #define ENOUGH(v,unit) (((v)-1)/(unit)+1)
2191 #define EZ(v,unit) ((v)?ENOUGH(v,unit):0)
2193 static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT)
2195 q->setup = EZ(t->setup * 1000, T);
2196 q->act8b = EZ(t->act8b * 1000, T);
2197 q->rec8b = EZ(t->rec8b * 1000, T);
2198 q->cyc8b = EZ(t->cyc8b * 1000, T);
2199 q->active = EZ(t->active * 1000, T);
2200 q->recover = EZ(t->recover * 1000, T);
2201 q->cycle = EZ(t->cycle * 1000, T);
2202 q->udma = EZ(t->udma * 1000, UT);
2205 void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b,
2206 struct ata_timing *m, unsigned int what)
2208 if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup);
2209 if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b);
2210 if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b);
2211 if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b);
2212 if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active);
2213 if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover);
2214 if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle);
2215 if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma);
2218 static const struct ata_timing* ata_timing_find_mode(unsigned short speed)
2220 const struct ata_timing *t;
2222 for (t = ata_timing; t->mode != speed; t++)
2223 if (t->mode == 0xFF)
2228 int ata_timing_compute(struct ata_device *adev, unsigned short speed,
2229 struct ata_timing *t, int T, int UT)
2231 const struct ata_timing *s;
2232 struct ata_timing p;
2238 if (!(s = ata_timing_find_mode(speed)))
2241 memcpy(t, s, sizeof(*s));
2244 * If the drive is an EIDE drive, it can tell us it needs extended
2245 * PIO/MW_DMA cycle timing.
2248 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
2249 memset(&p, 0, sizeof(p));
2250 if(speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) {
2251 if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO];
2252 else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY];
2253 } else if(speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) {
2254 p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN];
2256 ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B);
2260 * Convert the timing to bus clock counts.
2263 ata_timing_quantize(t, t, T, UT);
2266 * Even in DMA/UDMA modes we still use PIO access for IDENTIFY,
2267 * S.M.A.R.T * and some other commands. We have to ensure that the
2268 * DMA cycle timing is slower/equal than the fastest PIO timing.
2271 if (speed > XFER_PIO_6) {
2272 ata_timing_compute(adev, adev->pio_mode, &p, T, UT);
2273 ata_timing_merge(&p, t, t, ATA_TIMING_ALL);
2277 * Lengthen active & recovery time so that cycle time is correct.
2280 if (t->act8b + t->rec8b < t->cyc8b) {
2281 t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2;
2282 t->rec8b = t->cyc8b - t->act8b;
2285 if (t->active + t->recover < t->cycle) {
2286 t->active += (t->cycle - (t->active + t->recover)) / 2;
2287 t->recover = t->cycle - t->active;
2294 * ata_down_xfermask_limit - adjust dev xfer masks downward
2295 * @dev: Device to adjust xfer masks
2296 * @force_pio0: Force PIO0
2298 * Adjust xfer masks of @dev downward. Note that this function
2299 * does not apply the change. Invoking ata_set_mode() afterwards
2300 * will apply the limit.
2303 * Inherited from caller.
2306 * 0 on success, negative errno on failure
2308 int ata_down_xfermask_limit(struct ata_device *dev, int force_pio0)
2310 unsigned long xfer_mask;
2313 xfer_mask = ata_pack_xfermask(dev->pio_mask, dev->mwdma_mask,
2318 /* don't gear down to MWDMA from UDMA, go directly to PIO */
2319 if (xfer_mask & ATA_MASK_UDMA)
2320 xfer_mask &= ~ATA_MASK_MWDMA;
2322 highbit = fls(xfer_mask) - 1;
2323 xfer_mask &= ~(1 << highbit);
2325 xfer_mask &= 1 << ATA_SHIFT_PIO;
2329 ata_unpack_xfermask(xfer_mask, &dev->pio_mask, &dev->mwdma_mask,
2332 ata_dev_printk(dev, KERN_WARNING, "limiting speed to %s\n",
2333 ata_mode_string(xfer_mask));
2341 static int ata_dev_set_mode(struct ata_device *dev)
2343 struct ata_eh_context *ehc = &dev->ap->eh_context;
2344 unsigned int err_mask;
2347 dev->flags &= ~ATA_DFLAG_PIO;
2348 if (dev->xfer_shift == ATA_SHIFT_PIO)
2349 dev->flags |= ATA_DFLAG_PIO;
2351 err_mask = ata_dev_set_xfermode(dev);
2352 /* Old CFA may refuse this command, which is just fine */
2353 if (dev->xfer_shift == ATA_SHIFT_PIO && ata_id_is_cfa(dev->id))
2354 err_mask &= ~AC_ERR_DEV;
2357 ata_dev_printk(dev, KERN_ERR, "failed to set xfermode "
2358 "(err_mask=0x%x)\n", err_mask);
2362 ehc->i.flags |= ATA_EHI_POST_SETMODE;
2363 rc = ata_dev_revalidate(dev, 0);
2364 ehc->i.flags &= ~ATA_EHI_POST_SETMODE;
2368 DPRINTK("xfer_shift=%u, xfer_mode=0x%x\n",
2369 dev->xfer_shift, (int)dev->xfer_mode);
2371 ata_dev_printk(dev, KERN_INFO, "configured for %s\n",
2372 ata_mode_string(ata_xfer_mode2mask(dev->xfer_mode)));
2377 * ata_set_mode - Program timings and issue SET FEATURES - XFER
2378 * @ap: port on which timings will be programmed
2379 * @r_failed_dev: out paramter for failed device
2381 * Set ATA device disk transfer mode (PIO3, UDMA6, etc.). If
2382 * ata_set_mode() fails, pointer to the failing device is
2383 * returned in @r_failed_dev.
2386 * PCI/etc. bus probe sem.
2389 * 0 on success, negative errno otherwise
2391 int ata_set_mode(struct ata_port *ap, struct ata_device **r_failed_dev)
2393 struct ata_device *dev;
2394 int i, rc = 0, used_dma = 0, found = 0;
2396 /* has private set_mode? */
2397 if (ap->ops->set_mode)
2398 return ap->ops->set_mode(ap, r_failed_dev);
2400 /* step 1: calculate xfer_mask */
2401 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2402 unsigned int pio_mask, dma_mask;
2404 dev = &ap->device[i];
2406 if (!ata_dev_enabled(dev))
2409 ata_dev_xfermask(dev);
2411 pio_mask = ata_pack_xfermask(dev->pio_mask, 0, 0);
2412 dma_mask = ata_pack_xfermask(0, dev->mwdma_mask, dev->udma_mask);
2413 dev->pio_mode = ata_xfer_mask2mode(pio_mask);
2414 dev->dma_mode = ata_xfer_mask2mode(dma_mask);
2423 /* step 2: always set host PIO timings */
2424 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2425 dev = &ap->device[i];
2426 if (!ata_dev_enabled(dev))
2429 if (!dev->pio_mode) {
2430 ata_dev_printk(dev, KERN_WARNING, "no PIO support\n");
2435 dev->xfer_mode = dev->pio_mode;
2436 dev->xfer_shift = ATA_SHIFT_PIO;
2437 if (ap->ops->set_piomode)
2438 ap->ops->set_piomode(ap, dev);
2441 /* step 3: set host DMA timings */
2442 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2443 dev = &ap->device[i];
2445 if (!ata_dev_enabled(dev) || !dev->dma_mode)
2448 dev->xfer_mode = dev->dma_mode;
2449 dev->xfer_shift = ata_xfer_mode2shift(dev->dma_mode);
2450 if (ap->ops->set_dmamode)
2451 ap->ops->set_dmamode(ap, dev);
2454 /* step 4: update devices' xfer mode */
2455 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2456 dev = &ap->device[i];
2458 /* don't update suspended devices' xfer mode */
2459 if (!ata_dev_ready(dev))
2462 rc = ata_dev_set_mode(dev);
2467 /* Record simplex status. If we selected DMA then the other
2468 * host channels are not permitted to do so.
2470 if (used_dma && (ap->host->flags & ATA_HOST_SIMPLEX))
2471 ap->host->simplex_claimed = 1;
2473 /* step5: chip specific finalisation */
2474 if (ap->ops->post_set_mode)
2475 ap->ops->post_set_mode(ap);
2479 *r_failed_dev = dev;
2484 * ata_tf_to_host - issue ATA taskfile to host controller
2485 * @ap: port to which command is being issued
2486 * @tf: ATA taskfile register set
2488 * Issues ATA taskfile register set to ATA host controller,
2489 * with proper synchronization with interrupt handler and
2493 * spin_lock_irqsave(host lock)
2496 static inline void ata_tf_to_host(struct ata_port *ap,
2497 const struct ata_taskfile *tf)
2499 ap->ops->tf_load(ap, tf);
2500 ap->ops->exec_command(ap, tf);
2504 * ata_busy_sleep - sleep until BSY clears, or timeout
2505 * @ap: port containing status register to be polled
2506 * @tmout_pat: impatience timeout
2507 * @tmout: overall timeout
2509 * Sleep until ATA Status register bit BSY clears,
2510 * or a timeout occurs.
2513 * Kernel thread context (may sleep).
2516 * 0 on success, -errno otherwise.
2518 int ata_busy_sleep(struct ata_port *ap,
2519 unsigned long tmout_pat, unsigned long tmout)
2521 unsigned long timer_start, timeout;
2524 status = ata_busy_wait(ap, ATA_BUSY, 300);
2525 timer_start = jiffies;
2526 timeout = timer_start + tmout_pat;
2527 while (status != 0xff && (status & ATA_BUSY) &&
2528 time_before(jiffies, timeout)) {
2530 status = ata_busy_wait(ap, ATA_BUSY, 3);
2533 if (status != 0xff && (status & ATA_BUSY))
2534 ata_port_printk(ap, KERN_WARNING,
2535 "port is slow to respond, please be patient "
2536 "(Status 0x%x)\n", status);
2538 timeout = timer_start + tmout;
2539 while (status != 0xff && (status & ATA_BUSY) &&
2540 time_before(jiffies, timeout)) {
2542 status = ata_chk_status(ap);
2548 if (status & ATA_BUSY) {
2549 ata_port_printk(ap, KERN_ERR, "port failed to respond "
2550 "(%lu secs, Status 0x%x)\n",
2551 tmout / HZ, status);
2558 static void ata_bus_post_reset(struct ata_port *ap, unsigned int devmask)
2560 struct ata_ioports *ioaddr = &ap->ioaddr;
2561 unsigned int dev0 = devmask & (1 << 0);
2562 unsigned int dev1 = devmask & (1 << 1);
2563 unsigned long timeout;
2565 /* if device 0 was found in ata_devchk, wait for its
2569 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2571 /* if device 1 was found in ata_devchk, wait for
2572 * register access, then wait for BSY to clear
2574 timeout = jiffies + ATA_TMOUT_BOOT;
2578 ap->ops->dev_select(ap, 1);
2579 nsect = ioread8(ioaddr->nsect_addr);
2580 lbal = ioread8(ioaddr->lbal_addr);
2581 if ((nsect == 1) && (lbal == 1))
2583 if (time_after(jiffies, timeout)) {
2587 msleep(50); /* give drive a breather */
2590 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2592 /* is all this really necessary? */
2593 ap->ops->dev_select(ap, 0);
2595 ap->ops->dev_select(ap, 1);
2597 ap->ops->dev_select(ap, 0);
2600 static unsigned int ata_bus_softreset(struct ata_port *ap,
2601 unsigned int devmask)
2603 struct ata_ioports *ioaddr = &ap->ioaddr;
2605 DPRINTK("ata%u: bus reset via SRST\n", ap->id);
2607 /* software reset. causes dev0 to be selected */
2608 iowrite8(ap->ctl, ioaddr->ctl_addr);
2609 udelay(20); /* FIXME: flush */
2610 iowrite8(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
2611 udelay(20); /* FIXME: flush */
2612 iowrite8(ap->ctl, ioaddr->ctl_addr);
2614 /* spec mandates ">= 2ms" before checking status.
2615 * We wait 150ms, because that was the magic delay used for
2616 * ATAPI devices in Hale Landis's ATADRVR, for the period of time
2617 * between when the ATA command register is written, and then
2618 * status is checked. Because waiting for "a while" before
2619 * checking status is fine, post SRST, we perform this magic
2620 * delay here as well.
2622 * Old drivers/ide uses the 2mS rule and then waits for ready
2626 /* Before we perform post reset processing we want to see if
2627 * the bus shows 0xFF because the odd clown forgets the D7
2628 * pulldown resistor.
2630 if (ata_check_status(ap) == 0xFF)
2633 ata_bus_post_reset(ap, devmask);
2639 * ata_bus_reset - reset host port and associated ATA channel
2640 * @ap: port to reset
2642 * This is typically the first time we actually start issuing
2643 * commands to the ATA channel. We wait for BSY to clear, then
2644 * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its
2645 * result. Determine what devices, if any, are on the channel
2646 * by looking at the device 0/1 error register. Look at the signature
2647 * stored in each device's taskfile registers, to determine if
2648 * the device is ATA or ATAPI.
2651 * PCI/etc. bus probe sem.
2652 * Obtains host lock.
2655 * Sets ATA_FLAG_DISABLED if bus reset fails.
2658 void ata_bus_reset(struct ata_port *ap)
2660 struct ata_ioports *ioaddr = &ap->ioaddr;
2661 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2663 unsigned int dev0, dev1 = 0, devmask = 0;
2665 DPRINTK("ENTER, host %u, port %u\n", ap->id, ap->port_no);
2667 /* determine if device 0/1 are present */
2668 if (ap->flags & ATA_FLAG_SATA_RESET)
2671 dev0 = ata_devchk(ap, 0);
2673 dev1 = ata_devchk(ap, 1);
2677 devmask |= (1 << 0);
2679 devmask |= (1 << 1);
2681 /* select device 0 again */
2682 ap->ops->dev_select(ap, 0);
2684 /* issue bus reset */
2685 if (ap->flags & ATA_FLAG_SRST)
2686 if (ata_bus_softreset(ap, devmask))
2690 * determine by signature whether we have ATA or ATAPI devices
2692 ap->device[0].class = ata_dev_try_classify(ap, 0, &err);
2693 if ((slave_possible) && (err != 0x81))
2694 ap->device[1].class = ata_dev_try_classify(ap, 1, &err);
2696 /* re-enable interrupts */
2697 ap->ops->irq_on(ap);
2699 /* is double-select really necessary? */
2700 if (ap->device[1].class != ATA_DEV_NONE)
2701 ap->ops->dev_select(ap, 1);
2702 if (ap->device[0].class != ATA_DEV_NONE)
2703 ap->ops->dev_select(ap, 0);
2705 /* if no devices were detected, disable this port */
2706 if ((ap->device[0].class == ATA_DEV_NONE) &&
2707 (ap->device[1].class == ATA_DEV_NONE))
2710 if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) {
2711 /* set up device control for ATA_FLAG_SATA_RESET */
2712 iowrite8(ap->ctl, ioaddr->ctl_addr);
2719 ata_port_printk(ap, KERN_ERR, "disabling port\n");
2720 ap->ops->port_disable(ap);
2726 * sata_phy_debounce - debounce SATA phy status
2727 * @ap: ATA port to debounce SATA phy status for
2728 * @params: timing parameters { interval, duratinon, timeout } in msec
2730 * Make sure SStatus of @ap reaches stable state, determined by
2731 * holding the same value where DET is not 1 for @duration polled
2732 * every @interval, before @timeout. Timeout constraints the
2733 * beginning of the stable state. Because, after hot unplugging,
2734 * DET gets stuck at 1 on some controllers, this functions waits
2735 * until timeout then returns 0 if DET is stable at 1.
2738 * Kernel thread context (may sleep)
2741 * 0 on success, -errno on failure.
2743 int sata_phy_debounce(struct ata_port *ap, const unsigned long *params)
2745 unsigned long interval_msec = params[0];
2746 unsigned long duration = params[1] * HZ / 1000;
2747 unsigned long timeout = jiffies + params[2] * HZ / 1000;
2748 unsigned long last_jiffies;
2752 if ((rc = sata_scr_read(ap, SCR_STATUS, &cur)))
2757 last_jiffies = jiffies;
2760 msleep(interval_msec);
2761 if ((rc = sata_scr_read(ap, SCR_STATUS, &cur)))
2767 if (cur == 1 && time_before(jiffies, timeout))
2769 if (time_after(jiffies, last_jiffies + duration))
2774 /* unstable, start over */
2776 last_jiffies = jiffies;
2779 if (time_after(jiffies, timeout))
2785 * sata_phy_resume - resume SATA phy
2786 * @ap: ATA port to resume SATA phy for
2787 * @params: timing parameters { interval, duratinon, timeout } in msec
2789 * Resume SATA phy of @ap and debounce it.
2792 * Kernel thread context (may sleep)
2795 * 0 on success, -errno on failure.
2797 int sata_phy_resume(struct ata_port *ap, const unsigned long *params)
2802 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
2805 scontrol = (scontrol & 0x0f0) | 0x300;
2807 if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol)))
2810 /* Some PHYs react badly if SStatus is pounded immediately
2811 * after resuming. Delay 200ms before debouncing.
2815 return sata_phy_debounce(ap, params);
2818 static void ata_wait_spinup(struct ata_port *ap)
2820 struct ata_eh_context *ehc = &ap->eh_context;
2821 unsigned long end, secs;
2824 /* first, debounce phy if SATA */
2825 if (ap->cbl == ATA_CBL_SATA) {
2826 rc = sata_phy_debounce(ap, sata_deb_timing_hotplug);
2828 /* if debounced successfully and offline, no need to wait */
2829 if ((rc == 0 || rc == -EOPNOTSUPP) && ata_port_offline(ap))
2833 /* okay, let's give the drive time to spin up */
2834 end = ehc->i.hotplug_timestamp + ATA_SPINUP_WAIT * HZ / 1000;
2835 secs = ((end - jiffies) + HZ - 1) / HZ;
2837 if (time_after(jiffies, end))
2841 ata_port_printk(ap, KERN_INFO, "waiting for device to spin up "
2842 "(%lu secs)\n", secs);
2844 schedule_timeout_uninterruptible(end - jiffies);
2848 * ata_std_prereset - prepare for reset
2849 * @ap: ATA port to be reset
2851 * @ap is about to be reset. Initialize it.
2854 * Kernel thread context (may sleep)
2857 * 0 on success, -errno otherwise.
2859 int ata_std_prereset(struct ata_port *ap)
2861 struct ata_eh_context *ehc = &ap->eh_context;
2862 const unsigned long *timing = sata_ehc_deb_timing(ehc);
2865 /* handle link resume & hotplug spinup */
2866 if ((ehc->i.flags & ATA_EHI_RESUME_LINK) &&
2867 (ap->flags & ATA_FLAG_HRST_TO_RESUME))
2868 ehc->i.action |= ATA_EH_HARDRESET;
2870 if ((ehc->i.flags & ATA_EHI_HOTPLUGGED) &&
2871 (ap->flags & ATA_FLAG_SKIP_D2H_BSY))
2872 ata_wait_spinup(ap);
2874 /* if we're about to do hardreset, nothing more to do */
2875 if (ehc->i.action & ATA_EH_HARDRESET)
2878 /* if SATA, resume phy */
2879 if (ap->cbl == ATA_CBL_SATA) {
2880 rc = sata_phy_resume(ap, timing);
2881 if (rc && rc != -EOPNOTSUPP) {
2882 /* phy resume failed */
2883 ata_port_printk(ap, KERN_WARNING, "failed to resume "
2884 "link for reset (errno=%d)\n", rc);
2889 /* Wait for !BSY if the controller can wait for the first D2H
2890 * Reg FIS and we don't know that no device is attached.
2892 if (!(ap->flags & ATA_FLAG_SKIP_D2H_BSY) && !ata_port_offline(ap))
2893 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2899 * ata_std_softreset - reset host port via ATA SRST
2900 * @ap: port to reset
2901 * @classes: resulting classes of attached devices
2903 * Reset host port using ATA SRST.
2906 * Kernel thread context (may sleep)
2909 * 0 on success, -errno otherwise.
2911 int ata_std_softreset(struct ata_port *ap, unsigned int *classes)
2913 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2914 unsigned int devmask = 0, err_mask;
2919 if (ata_port_offline(ap)) {
2920 classes[0] = ATA_DEV_NONE;
2924 /* determine if device 0/1 are present */
2925 if (ata_devchk(ap, 0))
2926 devmask |= (1 << 0);
2927 if (slave_possible && ata_devchk(ap, 1))
2928 devmask |= (1 << 1);
2930 /* select device 0 again */
2931 ap->ops->dev_select(ap, 0);
2933 /* issue bus reset */
2934 DPRINTK("about to softreset, devmask=%x\n", devmask);
2935 err_mask = ata_bus_softreset(ap, devmask);
2937 ata_port_printk(ap, KERN_ERR, "SRST failed (err_mask=0x%x)\n",
2942 /* determine by signature whether we have ATA or ATAPI devices */
2943 classes[0] = ata_dev_try_classify(ap, 0, &err);
2944 if (slave_possible && err != 0x81)
2945 classes[1] = ata_dev_try_classify(ap, 1, &err);
2948 DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]);
2953 * sata_port_hardreset - reset port via SATA phy reset
2954 * @ap: port to reset
2955 * @timing: timing parameters { interval, duratinon, timeout } in msec
2957 * SATA phy-reset host port using DET bits of SControl register.
2960 * Kernel thread context (may sleep)
2963 * 0 on success, -errno otherwise.
2965 int sata_port_hardreset(struct ata_port *ap, const unsigned long *timing)
2972 if (sata_set_spd_needed(ap)) {
2973 /* SATA spec says nothing about how to reconfigure
2974 * spd. To be on the safe side, turn off phy during
2975 * reconfiguration. This works for at least ICH7 AHCI
2978 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
2981 scontrol = (scontrol & 0x0f0) | 0x304;
2983 if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol)))
2989 /* issue phy wake/reset */
2990 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
2993 scontrol = (scontrol & 0x0f0) | 0x301;
2995 if ((rc = sata_scr_write_flush(ap, SCR_CONTROL, scontrol)))
2998 /* Couldn't find anything in SATA I/II specs, but AHCI-1.1
2999 * 10.4.2 says at least 1 ms.
3003 /* bring phy back */
3004 rc = sata_phy_resume(ap, timing);
3006 DPRINTK("EXIT, rc=%d\n", rc);
3011 * sata_std_hardreset - reset host port via SATA phy reset
3012 * @ap: port to reset
3013 * @class: resulting class of attached device
3015 * SATA phy-reset host port using DET bits of SControl register,
3016 * wait for !BSY and classify the attached device.
3019 * Kernel thread context (may sleep)
3022 * 0 on success, -errno otherwise.
3024 int sata_std_hardreset(struct ata_port *ap, unsigned int *class)
3026 const unsigned long *timing = sata_ehc_deb_timing(&ap->eh_context);
3032 rc = sata_port_hardreset(ap, timing);
3034 ata_port_printk(ap, KERN_ERR,
3035 "COMRESET failed (errno=%d)\n", rc);
3039 /* TODO: phy layer with polling, timeouts, etc. */
3040 if (ata_port_offline(ap)) {
3041 *class = ATA_DEV_NONE;
3042 DPRINTK("EXIT, link offline\n");
3046 /* wait a while before checking status, see SRST for more info */
3049 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
3050 ata_port_printk(ap, KERN_ERR,
3051 "COMRESET failed (device not ready)\n");
3055 ap->ops->dev_select(ap, 0); /* probably unnecessary */
3057 *class = ata_dev_try_classify(ap, 0, NULL);
3059 DPRINTK("EXIT, class=%u\n", *class);
3064 * ata_std_postreset - standard postreset callback
3065 * @ap: the target ata_port
3066 * @classes: classes of attached devices
3068 * This function is invoked after a successful reset. Note that
3069 * the device might have been reset more than once using
3070 * different reset methods before postreset is invoked.
3073 * Kernel thread context (may sleep)
3075 void ata_std_postreset(struct ata_port *ap, unsigned int *classes)
3081 /* print link status */
3082 sata_print_link_status(ap);
3085 if (sata_scr_read(ap, SCR_ERROR, &serror) == 0)
3086 sata_scr_write(ap, SCR_ERROR, serror);
3088 /* re-enable interrupts */
3089 if (!ap->ops->error_handler)
3090 ap->ops->irq_on(ap);
3092 /* is double-select really necessary? */
3093 if (classes[0] != ATA_DEV_NONE)
3094 ap->ops->dev_select(ap, 1);
3095 if (classes[1] != ATA_DEV_NONE)
3096 ap->ops->dev_select(ap, 0);
3098 /* bail out if no device is present */
3099 if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) {
3100 DPRINTK("EXIT, no device\n");
3104 /* set up device control */
3105 if (ap->ioaddr.ctl_addr)
3106 iowrite8(ap->ctl, ap->ioaddr.ctl_addr);
3112 * ata_dev_same_device - Determine whether new ID matches configured device
3113 * @dev: device to compare against
3114 * @new_class: class of the new device
3115 * @new_id: IDENTIFY page of the new device
3117 * Compare @new_class and @new_id against @dev and determine
3118 * whether @dev is the device indicated by @new_class and
3125 * 1 if @dev matches @new_class and @new_id, 0 otherwise.
3127 static int ata_dev_same_device(struct ata_device *dev, unsigned int new_class,
3130 const u16 *old_id = dev->id;
3131 unsigned char model[2][ATA_ID_PROD_LEN + 1];
3132 unsigned char serial[2][ATA_ID_SERNO_LEN + 1];
3135 if (dev->class != new_class) {
3136 ata_dev_printk(dev, KERN_INFO, "class mismatch %d != %d\n",
3137 dev->class, new_class);
3141 ata_id_c_string(old_id, model[0], ATA_ID_PROD, sizeof(model[0]));
3142 ata_id_c_string(new_id, model[1], ATA_ID_PROD, sizeof(model[1]));
3143 ata_id_c_string(old_id, serial[0], ATA_ID_SERNO, sizeof(serial[0]));
3144 ata_id_c_string(new_id, serial[1], ATA_ID_SERNO, sizeof(serial[1]));
3145 new_n_sectors = ata_id_n_sectors(new_id);
3147 if (strcmp(model[0], model[1])) {
3148 ata_dev_printk(dev, KERN_INFO, "model number mismatch "
3149 "'%s' != '%s'\n", model[0], model[1]);
3153 if (strcmp(serial[0], serial[1])) {
3154 ata_dev_printk(dev, KERN_INFO, "serial number mismatch "
3155 "'%s' != '%s'\n", serial[0], serial[1]);
3159 if (dev->class == ATA_DEV_ATA && dev->n_sectors != new_n_sectors) {
3160 ata_dev_printk(dev, KERN_INFO, "n_sectors mismatch "
3162 (unsigned long long)dev->n_sectors,
3163 (unsigned long long)new_n_sectors);
3171 * ata_dev_revalidate - Revalidate ATA device
3172 * @dev: device to revalidate
3173 * @readid_flags: read ID flags
3175 * Re-read IDENTIFY page and make sure @dev is still attached to
3179 * Kernel thread context (may sleep)
3182 * 0 on success, negative errno otherwise
3184 int ata_dev_revalidate(struct ata_device *dev, unsigned int readid_flags)
3186 unsigned int class = dev->class;
3187 u16 *id = (void *)dev->ap->sector_buf;
3190 if (!ata_dev_enabled(dev)) {
3196 rc = ata_dev_read_id(dev, &class, readid_flags, id);
3200 /* is the device still there? */
3201 if (!ata_dev_same_device(dev, class, id)) {
3206 memcpy(dev->id, id, sizeof(id[0]) * ATA_ID_WORDS);
3208 /* configure device according to the new ID */
3209 rc = ata_dev_configure(dev);
3214 ata_dev_printk(dev, KERN_ERR, "revalidation failed (errno=%d)\n", rc);
3218 struct ata_blacklist_entry {
3219 const char *model_num;
3220 const char *model_rev;
3221 unsigned long horkage;
3224 static const struct ata_blacklist_entry ata_device_blacklist [] = {
3225 /* Devices with DMA related problems under Linux */
3226 { "WDC AC11000H", NULL, ATA_HORKAGE_NODMA },
3227 { "WDC AC22100H", NULL, ATA_HORKAGE_NODMA },
3228 { "WDC AC32500H", NULL, ATA_HORKAGE_NODMA },
3229 { "WDC AC33100H", NULL, ATA_HORKAGE_NODMA },
3230 { "WDC AC31600H", NULL, ATA_HORKAGE_NODMA },
3231 { "WDC AC32100H", "24.09P07", ATA_HORKAGE_NODMA },
3232 { "WDC AC23200L", "21.10N21", ATA_HORKAGE_NODMA },
3233 { "Compaq CRD-8241B", NULL, ATA_HORKAGE_NODMA },
3234 { "CRD-8400B", NULL, ATA_HORKAGE_NODMA },
3235 { "CRD-8480B", NULL, ATA_HORKAGE_NODMA },
3236 { "CRD-8482B", NULL, ATA_HORKAGE_NODMA },
3237 { "CRD-84", NULL, ATA_HORKAGE_NODMA },
3238 { "SanDisk SDP3B", NULL, ATA_HORKAGE_NODMA },
3239 { "SanDisk SDP3B-64", NULL, ATA_HORKAGE_NODMA },
3240 { "SANYO CD-ROM CRD", NULL, ATA_HORKAGE_NODMA },
3241 { "HITACHI CDR-8", NULL, ATA_HORKAGE_NODMA },
3242 { "HITACHI CDR-8335", NULL, ATA_HORKAGE_NODMA },
3243 { "HITACHI CDR-8435", NULL, ATA_HORKAGE_NODMA },
3244 { "Toshiba CD-ROM XM-6202B", NULL, ATA_HORKAGE_NODMA },
3245 { "TOSHIBA CD-ROM XM-1702BC", NULL, ATA_HORKAGE_NODMA },
3246 { "CD-532E-A", NULL, ATA_HORKAGE_NODMA },
3247 { "E-IDE CD-ROM CR-840",NULL, ATA_HORKAGE_NODMA },
3248 { "CD-ROM Drive/F5A", NULL, ATA_HORKAGE_NODMA },
3249 { "WPI CDD-820", NULL, ATA_HORKAGE_NODMA },
3250 { "SAMSUNG CD-ROM SC-148C", NULL, ATA_HORKAGE_NODMA },
3251 { "SAMSUNG CD-ROM SC", NULL, ATA_HORKAGE_NODMA },
3252 { "SanDisk SDP3B-64", NULL, ATA_HORKAGE_NODMA },
3253 { "ATAPI CD-ROM DRIVE 40X MAXIMUM",NULL,ATA_HORKAGE_NODMA },
3254 { "_NEC DV5800A", NULL, ATA_HORKAGE_NODMA },
3255 { "SAMSUNG CD-ROM SN-124","N001", ATA_HORKAGE_NODMA },
3257 /* Devices we expect to fail diagnostics */
3259 /* Devices where NCQ should be avoided */
3261 { "WDC WD740ADFD-00", NULL, ATA_HORKAGE_NONCQ },
3263 /* Devices with NCQ limits */
3269 unsigned long ata_device_blacklisted(const struct ata_device *dev)
3271 unsigned char model_num[ATA_ID_PROD_LEN + 1];
3272 unsigned char model_rev[ATA_ID_FW_REV_LEN + 1];
3273 const struct ata_blacklist_entry *ad = ata_device_blacklist;
3275 ata_id_c_string(dev->id, model_num, ATA_ID_PROD, sizeof(model_num));
3276 ata_id_c_string(dev->id, model_rev, ATA_ID_FW_REV, sizeof(model_rev));
3278 while (ad->model_num) {
3279 if (!strcmp(ad->model_num, model_num)) {
3280 if (ad->model_rev == NULL)
3282 if (!strcmp(ad->model_rev, model_rev))
3290 static int ata_dma_blacklisted(const struct ata_device *dev)
3292 /* We don't support polling DMA.
3293 * DMA blacklist those ATAPI devices with CDB-intr (and use PIO)
3294 * if the LLDD handles only interrupts in the HSM_ST_LAST state.
3296 if ((dev->ap->flags & ATA_FLAG_PIO_POLLING) &&
3297 (dev->flags & ATA_DFLAG_CDB_INTR))
3299 return (ata_device_blacklisted(dev) & ATA_HORKAGE_NODMA) ? 1 : 0;
3303 * ata_dev_xfermask - Compute supported xfermask of the given device
3304 * @dev: Device to compute xfermask for
3306 * Compute supported xfermask of @dev and store it in
3307 * dev->*_mask. This function is responsible for applying all
3308 * known limits including host controller limits, device
3314 static void ata_dev_xfermask(struct ata_device *dev)
3316 struct ata_port *ap = dev->ap;
3317 struct ata_host *host = ap->host;
3318 unsigned long xfer_mask;
3320 /* controller modes available */
3321 xfer_mask = ata_pack_xfermask(ap->pio_mask,
3322 ap->mwdma_mask, ap->udma_mask);
3324 /* Apply cable rule here. Don't apply it early because when
3325 * we handle hot plug the cable type can itself change.
3327 if (ap->cbl == ATA_CBL_PATA40)
3328 xfer_mask &= ~(0xF8 << ATA_SHIFT_UDMA);
3329 /* Apply drive side cable rule. Unknown or 80 pin cables reported
3330 * host side are checked drive side as well. Cases where we know a
3331 * 40wire cable is used safely for 80 are not checked here.
3333 if (ata_drive_40wire(dev->id) && (ap->cbl == ATA_CBL_PATA_UNK || ap->cbl == ATA_CBL_PATA80))
3334 xfer_mask &= ~(0xF8 << ATA_SHIFT_UDMA);
3337 xfer_mask &= ata_pack_xfermask(dev->pio_mask,
3338 dev->mwdma_mask, dev->udma_mask);
3339 xfer_mask &= ata_id_xfermask(dev->id);
3342 * CFA Advanced TrueIDE timings are not allowed on a shared
3345 if (ata_dev_pair(dev)) {
3346 /* No PIO5 or PIO6 */
3347 xfer_mask &= ~(0x03 << (ATA_SHIFT_PIO + 5));
3348 /* No MWDMA3 or MWDMA 4 */
3349 xfer_mask &= ~(0x03 << (ATA_SHIFT_MWDMA + 3));
3352 if (ata_dma_blacklisted(dev)) {
3353 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
3354 ata_dev_printk(dev, KERN_WARNING,
3355 "device is on DMA blacklist, disabling DMA\n");
3358 if ((host->flags & ATA_HOST_SIMPLEX) && host->simplex_claimed) {
3359 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
3360 ata_dev_printk(dev, KERN_WARNING, "simplex DMA is claimed by "
3361 "other device, disabling DMA\n");
3364 if (ap->ops->mode_filter)
3365 xfer_mask = ap->ops->mode_filter(ap, dev, xfer_mask);
3367 ata_unpack_xfermask(xfer_mask, &dev->pio_mask,
3368 &dev->mwdma_mask, &dev->udma_mask);
3372 * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command
3373 * @dev: Device to which command will be sent
3375 * Issue SET FEATURES - XFER MODE command to device @dev
3379 * PCI/etc. bus probe sem.
3382 * 0 on success, AC_ERR_* mask otherwise.
3385 static unsigned int ata_dev_set_xfermode(struct ata_device *dev)
3387 struct ata_taskfile tf;
3388 unsigned int err_mask;
3390 /* set up set-features taskfile */
3391 DPRINTK("set features - xfer mode\n");
3393 ata_tf_init(dev, &tf);
3394 tf.command = ATA_CMD_SET_FEATURES;
3395 tf.feature = SETFEATURES_XFER;
3396 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
3397 tf.protocol = ATA_PROT_NODATA;
3398 tf.nsect = dev->xfer_mode;
3400 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
3402 DPRINTK("EXIT, err_mask=%x\n", err_mask);
3407 * ata_dev_init_params - Issue INIT DEV PARAMS command
3408 * @dev: Device to which command will be sent
3409 * @heads: Number of heads (taskfile parameter)
3410 * @sectors: Number of sectors (taskfile parameter)
3413 * Kernel thread context (may sleep)
3416 * 0 on success, AC_ERR_* mask otherwise.
3418 static unsigned int ata_dev_init_params(struct ata_device *dev,
3419 u16 heads, u16 sectors)
3421 struct ata_taskfile tf;
3422 unsigned int err_mask;
3424 /* Number of sectors per track 1-255. Number of heads 1-16 */
3425 if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16)
3426 return AC_ERR_INVALID;
3428 /* set up init dev params taskfile */
3429 DPRINTK("init dev params \n");
3431 ata_tf_init(dev, &tf);
3432 tf.command = ATA_CMD_INIT_DEV_PARAMS;
3433 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
3434 tf.protocol = ATA_PROT_NODATA;
3436 tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */
3438 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
3440 DPRINTK("EXIT, err_mask=%x\n", err_mask);
3445 * ata_sg_clean - Unmap DMA memory associated with command
3446 * @qc: Command containing DMA memory to be released
3448 * Unmap all mapped DMA memory associated with this command.
3451 * spin_lock_irqsave(host lock)
3453 void ata_sg_clean(struct ata_queued_cmd *qc)
3455 struct ata_port *ap = qc->ap;
3456 struct scatterlist *sg = qc->__sg;
3457 int dir = qc->dma_dir;
3458 void *pad_buf = NULL;
3460 WARN_ON(!(qc->flags & ATA_QCFLAG_DMAMAP));
3461 WARN_ON(sg == NULL);
3463 if (qc->flags & ATA_QCFLAG_SINGLE)
3464 WARN_ON(qc->n_elem > 1);
3466 VPRINTK("unmapping %u sg elements\n", qc->n_elem);
3468 /* if we padded the buffer out to 32-bit bound, and data
3469 * xfer direction is from-device, we must copy from the
3470 * pad buffer back into the supplied buffer
3472 if (qc->pad_len && !(qc->tf.flags & ATA_TFLAG_WRITE))
3473 pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3475 if (qc->flags & ATA_QCFLAG_SG) {
3477 dma_unmap_sg(ap->dev, sg, qc->n_elem, dir);
3478 /* restore last sg */
3479 sg[qc->orig_n_elem - 1].length += qc->pad_len;
3481 struct scatterlist *psg = &qc->pad_sgent;
3482 void *addr = kmap_atomic(psg->page, KM_IRQ0);
3483 memcpy(addr + psg->offset, pad_buf, qc->pad_len);
3484 kunmap_atomic(addr, KM_IRQ0);
3488 dma_unmap_single(ap->dev,
3489 sg_dma_address(&sg[0]), sg_dma_len(&sg[0]),
3492 sg->length += qc->pad_len;
3494 memcpy(qc->buf_virt + sg->length - qc->pad_len,
3495 pad_buf, qc->pad_len);
3498 qc->flags &= ~ATA_QCFLAG_DMAMAP;
3503 * ata_fill_sg - Fill PCI IDE PRD table
3504 * @qc: Metadata associated with taskfile to be transferred
3506 * Fill PCI IDE PRD (scatter-gather) table with segments
3507 * associated with the current disk command.
3510 * spin_lock_irqsave(host lock)
3513 static void ata_fill_sg(struct ata_queued_cmd *qc)
3515 struct ata_port *ap = qc->ap;
3516 struct scatterlist *sg;
3519 WARN_ON(qc->__sg == NULL);
3520 WARN_ON(qc->n_elem == 0 && qc->pad_len == 0);
3523 ata_for_each_sg(sg, qc) {
3527 /* determine if physical DMA addr spans 64K boundary.
3528 * Note h/w doesn't support 64-bit, so we unconditionally
3529 * truncate dma_addr_t to u32.
3531 addr = (u32) sg_dma_address(sg);
3532 sg_len = sg_dma_len(sg);
3535 offset = addr & 0xffff;
3537 if ((offset + sg_len) > 0x10000)
3538 len = 0x10000 - offset;
3540 ap->prd[idx].addr = cpu_to_le32(addr);
3541 ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff);
3542 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
3551 ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
3554 * ata_check_atapi_dma - Check whether ATAPI DMA can be supported
3555 * @qc: Metadata associated with taskfile to check
3557 * Allow low-level driver to filter ATA PACKET commands, returning
3558 * a status indicating whether or not it is OK to use DMA for the
3559 * supplied PACKET command.
3562 * spin_lock_irqsave(host lock)
3564 * RETURNS: 0 when ATAPI DMA can be used
3567 int ata_check_atapi_dma(struct ata_queued_cmd *qc)
3569 struct ata_port *ap = qc->ap;
3570 int rc = 0; /* Assume ATAPI DMA is OK by default */
3572 if (ap->ops->check_atapi_dma)
3573 rc = ap->ops->check_atapi_dma(qc);
3578 * ata_qc_prep - Prepare taskfile for submission
3579 * @qc: Metadata associated with taskfile to be prepared
3581 * Prepare ATA taskfile for submission.
3584 * spin_lock_irqsave(host lock)
3586 void ata_qc_prep(struct ata_queued_cmd *qc)
3588 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
3594 void ata_noop_qc_prep(struct ata_queued_cmd *qc) { }
3597 * ata_sg_init_one - Associate command with memory buffer
3598 * @qc: Command to be associated
3599 * @buf: Memory buffer
3600 * @buflen: Length of memory buffer, in bytes.
3602 * Initialize the data-related elements of queued_cmd @qc
3603 * to point to a single memory buffer, @buf of byte length @buflen.
3606 * spin_lock_irqsave(host lock)
3609 void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen)
3611 qc->flags |= ATA_QCFLAG_SINGLE;
3613 qc->__sg = &qc->sgent;
3615 qc->orig_n_elem = 1;
3617 qc->nbytes = buflen;
3619 sg_init_one(&qc->sgent, buf, buflen);
3623 * ata_sg_init - Associate command with scatter-gather table.
3624 * @qc: Command to be associated
3625 * @sg: Scatter-gather table.
3626 * @n_elem: Number of elements in s/g table.
3628 * Initialize the data-related elements of queued_cmd @qc
3629 * to point to a scatter-gather table @sg, containing @n_elem
3633 * spin_lock_irqsave(host lock)
3636 void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
3637 unsigned int n_elem)
3639 qc->flags |= ATA_QCFLAG_SG;
3641 qc->n_elem = n_elem;
3642 qc->orig_n_elem = n_elem;
3646 * ata_sg_setup_one - DMA-map the memory buffer associated with a command.
3647 * @qc: Command with memory buffer to be mapped.
3649 * DMA-map the memory buffer associated with queued_cmd @qc.
3652 * spin_lock_irqsave(host lock)
3655 * Zero on success, negative on error.
3658 static int ata_sg_setup_one(struct ata_queued_cmd *qc)
3660 struct ata_port *ap = qc->ap;
3661 int dir = qc->dma_dir;
3662 struct scatterlist *sg = qc->__sg;
3663 dma_addr_t dma_address;
3666 /* we must lengthen transfers to end on a 32-bit boundary */
3667 qc->pad_len = sg->length & 3;
3669 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3670 struct scatterlist *psg = &qc->pad_sgent;
3672 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
3674 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
3676 if (qc->tf.flags & ATA_TFLAG_WRITE)
3677 memcpy(pad_buf, qc->buf_virt + sg->length - qc->pad_len,
3680 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
3681 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
3683 sg->length -= qc->pad_len;
3684 if (sg->length == 0)
3687 DPRINTK("padding done, sg->length=%u pad_len=%u\n",
3688 sg->length, qc->pad_len);
3696 dma_address = dma_map_single(ap->dev, qc->buf_virt,
3698 if (dma_mapping_error(dma_address)) {
3700 sg->length += qc->pad_len;
3704 sg_dma_address(sg) = dma_address;
3705 sg_dma_len(sg) = sg->length;
3708 DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg),
3709 qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3715 * ata_sg_setup - DMA-map the scatter-gather table associated with a command.
3716 * @qc: Command with scatter-gather table to be mapped.
3718 * DMA-map the scatter-gather table associated with queued_cmd @qc.
3721 * spin_lock_irqsave(host lock)
3724 * Zero on success, negative on error.
3728 static int ata_sg_setup(struct ata_queued_cmd *qc)
3730 struct ata_port *ap = qc->ap;
3731 struct scatterlist *sg = qc->__sg;
3732 struct scatterlist *lsg = &sg[qc->n_elem - 1];
3733 int n_elem, pre_n_elem, dir, trim_sg = 0;
3735 VPRINTK("ENTER, ata%u\n", ap->id);
3736 WARN_ON(!(qc->flags & ATA_QCFLAG_SG));
3738 /* we must lengthen transfers to end on a 32-bit boundary */
3739 qc->pad_len = lsg->length & 3;
3741 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3742 struct scatterlist *psg = &qc->pad_sgent;
3743 unsigned int offset;
3745 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
3747 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
3750 * psg->page/offset are used to copy to-be-written
3751 * data in this function or read data in ata_sg_clean.
3753 offset = lsg->offset + lsg->length - qc->pad_len;
3754 psg->page = nth_page(lsg->page, offset >> PAGE_SHIFT);
3755 psg->offset = offset_in_page(offset);
3757 if (qc->tf.flags & ATA_TFLAG_WRITE) {
3758 void *addr = kmap_atomic(psg->page, KM_IRQ0);
3759 memcpy(pad_buf, addr + psg->offset, qc->pad_len);
3760 kunmap_atomic(addr, KM_IRQ0);
3763 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
3764 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
3766 lsg->length -= qc->pad_len;
3767 if (lsg->length == 0)
3770 DPRINTK("padding done, sg[%d].length=%u pad_len=%u\n",
3771 qc->n_elem - 1, lsg->length, qc->pad_len);
3774 pre_n_elem = qc->n_elem;
3775 if (trim_sg && pre_n_elem)
3784 n_elem = dma_map_sg(ap->dev, sg, pre_n_elem, dir);
3786 /* restore last sg */
3787 lsg->length += qc->pad_len;
3791 DPRINTK("%d sg elements mapped\n", n_elem);
3794 qc->n_elem = n_elem;
3800 * swap_buf_le16 - swap halves of 16-bit words in place
3801 * @buf: Buffer to swap
3802 * @buf_words: Number of 16-bit words in buffer.
3804 * Swap halves of 16-bit words if needed to convert from
3805 * little-endian byte order to native cpu byte order, or
3809 * Inherited from caller.
3811 void swap_buf_le16(u16 *buf, unsigned int buf_words)
3816 for (i = 0; i < buf_words; i++)
3817 buf[i] = le16_to_cpu(buf[i]);
3818 #endif /* __BIG_ENDIAN */
3822 * ata_data_xfer - Transfer data by PIO
3823 * @adev: device to target
3825 * @buflen: buffer length
3826 * @write_data: read/write
3828 * Transfer data from/to the device data register by PIO.
3831 * Inherited from caller.
3833 void ata_data_xfer(struct ata_device *adev, unsigned char *buf,
3834 unsigned int buflen, int write_data)
3836 struct ata_port *ap = adev->ap;
3837 unsigned int words = buflen >> 1;
3839 /* Transfer multiple of 2 bytes */
3841 iowrite16_rep(ap->ioaddr.data_addr, buf, words);
3843 ioread16_rep(ap->ioaddr.data_addr, buf, words);
3845 /* Transfer trailing 1 byte, if any. */
3846 if (unlikely(buflen & 0x01)) {
3847 u16 align_buf[1] = { 0 };
3848 unsigned char *trailing_buf = buf + buflen - 1;
3851 memcpy(align_buf, trailing_buf, 1);
3852 iowrite16(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr);
3854 align_buf[0] = cpu_to_le16(ioread16(ap->ioaddr.data_addr));
3855 memcpy(trailing_buf, align_buf, 1);
3861 * ata_data_xfer_noirq - Transfer data by PIO
3862 * @adev: device to target
3864 * @buflen: buffer length
3865 * @write_data: read/write
3867 * Transfer data from/to the device data register by PIO. Do the
3868 * transfer with interrupts disabled.
3871 * Inherited from caller.
3873 void ata_data_xfer_noirq(struct ata_device *adev, unsigned char *buf,
3874 unsigned int buflen, int write_data)
3876 unsigned long flags;
3877 local_irq_save(flags);
3878 ata_data_xfer(adev, buf, buflen, write_data);
3879 local_irq_restore(flags);
3884 * ata_pio_sector - Transfer ATA_SECT_SIZE (512 bytes) of data.
3885 * @qc: Command on going
3887 * Transfer ATA_SECT_SIZE of data from/to the ATA device.
3890 * Inherited from caller.
3893 static void ata_pio_sector(struct ata_queued_cmd *qc)
3895 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
3896 struct scatterlist *sg = qc->__sg;
3897 struct ata_port *ap = qc->ap;
3899 unsigned int offset;
3902 if (qc->curbytes == qc->nbytes - ATA_SECT_SIZE)
3903 ap->hsm_task_state = HSM_ST_LAST;
3905 page = sg[qc->cursg].page;
3906 offset = sg[qc->cursg].offset + qc->cursg_ofs;
3908 /* get the current page and offset */
3909 page = nth_page(page, (offset >> PAGE_SHIFT));
3910 offset %= PAGE_SIZE;
3912 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3914 if (PageHighMem(page)) {
3915 unsigned long flags;
3917 /* FIXME: use a bounce buffer */
3918 local_irq_save(flags);
3919 buf = kmap_atomic(page, KM_IRQ0);
3921 /* do the actual data transfer */
3922 ap->ops->data_xfer(qc->dev, buf + offset, ATA_SECT_SIZE, do_write);
3924 kunmap_atomic(buf, KM_IRQ0);
3925 local_irq_restore(flags);
3927 buf = page_address(page);
3928 ap->ops->data_xfer(qc->dev, buf + offset, ATA_SECT_SIZE, do_write);
3931 qc->curbytes += ATA_SECT_SIZE;
3932 qc->cursg_ofs += ATA_SECT_SIZE;
3934 if (qc->cursg_ofs == (&sg[qc->cursg])->length) {
3941 * ata_pio_sectors - Transfer one or many 512-byte sectors.
3942 * @qc: Command on going
3944 * Transfer one or many ATA_SECT_SIZE of data from/to the
3945 * ATA device for the DRQ request.
3948 * Inherited from caller.
3951 static void ata_pio_sectors(struct ata_queued_cmd *qc)
3953 if (is_multi_taskfile(&qc->tf)) {
3954 /* READ/WRITE MULTIPLE */
3957 WARN_ON(qc->dev->multi_count == 0);
3959 nsect = min((qc->nbytes - qc->curbytes) / ATA_SECT_SIZE,
3960 qc->dev->multi_count);
3968 * atapi_send_cdb - Write CDB bytes to hardware
3969 * @ap: Port to which ATAPI device is attached.
3970 * @qc: Taskfile currently active
3972 * When device has indicated its readiness to accept
3973 * a CDB, this function is called. Send the CDB.
3979 static void atapi_send_cdb(struct ata_port *ap, struct ata_queued_cmd *qc)
3982 DPRINTK("send cdb\n");
3983 WARN_ON(qc->dev->cdb_len < 12);
3985 ap->ops->data_xfer(qc->dev, qc->cdb, qc->dev->cdb_len, 1);
3986 ata_altstatus(ap); /* flush */
3988 switch (qc->tf.protocol) {
3989 case ATA_PROT_ATAPI:
3990 ap->hsm_task_state = HSM_ST;
3992 case ATA_PROT_ATAPI_NODATA:
3993 ap->hsm_task_state = HSM_ST_LAST;
3995 case ATA_PROT_ATAPI_DMA:
3996 ap->hsm_task_state = HSM_ST_LAST;
3997 /* initiate bmdma */
3998 ap->ops->bmdma_start(qc);
4004 * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
4005 * @qc: Command on going
4006 * @bytes: number of bytes
4008 * Transfer Transfer data from/to the ATAPI device.
4011 * Inherited from caller.
4015 static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
4017 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
4018 struct scatterlist *sg = qc->__sg;
4019 struct ata_port *ap = qc->ap;
4022 unsigned int offset, count;
4024 if (qc->curbytes + bytes >= qc->nbytes)
4025 ap->hsm_task_state = HSM_ST_LAST;
4028 if (unlikely(qc->cursg >= qc->n_elem)) {
4030 * The end of qc->sg is reached and the device expects
4031 * more data to transfer. In order not to overrun qc->sg
4032 * and fulfill length specified in the byte count register,
4033 * - for read case, discard trailing data from the device
4034 * - for write case, padding zero data to the device
4036 u16 pad_buf[1] = { 0 };
4037 unsigned int words = bytes >> 1;
4040 if (words) /* warning if bytes > 1 */
4041 ata_dev_printk(qc->dev, KERN_WARNING,
4042 "%u bytes trailing data\n", bytes);
4044 for (i = 0; i < words; i++)
4045 ap->ops->data_xfer(qc->dev, (unsigned char*)pad_buf, 2, do_write);
4047 ap->hsm_task_state = HSM_ST_LAST;
4051 sg = &qc->__sg[qc->cursg];
4054 offset = sg->offset + qc->cursg_ofs;
4056 /* get the current page and offset */
4057 page = nth_page(page, (offset >> PAGE_SHIFT));
4058 offset %= PAGE_SIZE;
4060 /* don't overrun current sg */
4061 count = min(sg->length - qc->cursg_ofs, bytes);
4063 /* don't cross page boundaries */
4064 count = min(count, (unsigned int)PAGE_SIZE - offset);
4066 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
4068 if (PageHighMem(page)) {
4069 unsigned long flags;
4071 /* FIXME: use bounce buffer */
4072 local_irq_save(flags);
4073 buf = kmap_atomic(page, KM_IRQ0);
4075 /* do the actual data transfer */
4076 ap->ops->data_xfer(qc->dev, buf + offset, count, do_write);
4078 kunmap_atomic(buf, KM_IRQ0);
4079 local_irq_restore(flags);
4081 buf = page_address(page);
4082 ap->ops->data_xfer(qc->dev, buf + offset, count, do_write);
4086 qc->curbytes += count;
4087 qc->cursg_ofs += count;
4089 if (qc->cursg_ofs == sg->length) {
4099 * atapi_pio_bytes - Transfer data from/to the ATAPI device.
4100 * @qc: Command on going
4102 * Transfer Transfer data from/to the ATAPI device.
4105 * Inherited from caller.
4108 static void atapi_pio_bytes(struct ata_queued_cmd *qc)
4110 struct ata_port *ap = qc->ap;
4111 struct ata_device *dev = qc->dev;
4112 unsigned int ireason, bc_lo, bc_hi, bytes;
4113 int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0;
4115 /* Abuse qc->result_tf for temp storage of intermediate TF
4116 * here to save some kernel stack usage.
4117 * For normal completion, qc->result_tf is not relevant. For
4118 * error, qc->result_tf is later overwritten by ata_qc_complete().
4119 * So, the correctness of qc->result_tf is not affected.
4121 ap->ops->tf_read(ap, &qc->result_tf);
4122 ireason = qc->result_tf.nsect;
4123 bc_lo = qc->result_tf.lbam;
4124 bc_hi = qc->result_tf.lbah;
4125 bytes = (bc_hi << 8) | bc_lo;
4127 /* shall be cleared to zero, indicating xfer of data */
4128 if (ireason & (1 << 0))
4131 /* make sure transfer direction matches expected */
4132 i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0;
4133 if (do_write != i_write)
4136 VPRINTK("ata%u: xfering %d bytes\n", ap->id, bytes);
4138 __atapi_pio_bytes(qc, bytes);
4143 ata_dev_printk(dev, KERN_INFO, "ATAPI check failed\n");
4144 qc->err_mask |= AC_ERR_HSM;
4145 ap->hsm_task_state = HSM_ST_ERR;
4149 * ata_hsm_ok_in_wq - Check if the qc can be handled in the workqueue.
4150 * @ap: the target ata_port
4154 * 1 if ok in workqueue, 0 otherwise.
4157 static inline int ata_hsm_ok_in_wq(struct ata_port *ap, struct ata_queued_cmd *qc)
4159 if (qc->tf.flags & ATA_TFLAG_POLLING)
4162 if (ap->hsm_task_state == HSM_ST_FIRST) {
4163 if (qc->tf.protocol == ATA_PROT_PIO &&
4164 (qc->tf.flags & ATA_TFLAG_WRITE))
4167 if (is_atapi_taskfile(&qc->tf) &&
4168 !(qc->dev->flags & ATA_DFLAG_CDB_INTR))
4176 * ata_hsm_qc_complete - finish a qc running on standard HSM
4177 * @qc: Command to complete
4178 * @in_wq: 1 if called from workqueue, 0 otherwise
4180 * Finish @qc which is running on standard HSM.
4183 * If @in_wq is zero, spin_lock_irqsave(host lock).
4184 * Otherwise, none on entry and grabs host lock.
4186 static void ata_hsm_qc_complete(struct ata_queued_cmd *qc, int in_wq)
4188 struct ata_port *ap = qc->ap;
4189 unsigned long flags;
4191 if (ap->ops->error_handler) {
4193 spin_lock_irqsave(ap->lock, flags);
4195 /* EH might have kicked in while host lock is
4198 qc = ata_qc_from_tag(ap, qc->tag);
4200 if (likely(!(qc->err_mask & AC_ERR_HSM))) {
4201 ap->ops->irq_on(ap);
4202 ata_qc_complete(qc);
4204 ata_port_freeze(ap);
4207 spin_unlock_irqrestore(ap->lock, flags);
4209 if (likely(!(qc->err_mask & AC_ERR_HSM)))
4210 ata_qc_complete(qc);
4212 ata_port_freeze(ap);
4216 spin_lock_irqsave(ap->lock, flags);
4217 ap->ops->irq_on(ap);
4218 ata_qc_complete(qc);
4219 spin_unlock_irqrestore(ap->lock, flags);
4221 ata_qc_complete(qc);
4224 ata_altstatus(ap); /* flush */
4228 * ata_hsm_move - move the HSM to the next state.
4229 * @ap: the target ata_port
4231 * @status: current device status
4232 * @in_wq: 1 if called from workqueue, 0 otherwise
4235 * 1 when poll next status needed, 0 otherwise.
4237 int ata_hsm_move(struct ata_port *ap, struct ata_queued_cmd *qc,
4238 u8 status, int in_wq)
4240 unsigned long flags = 0;
4243 WARN_ON((qc->flags & ATA_QCFLAG_ACTIVE) == 0);
4245 /* Make sure ata_qc_issue_prot() does not throw things
4246 * like DMA polling into the workqueue. Notice that
4247 * in_wq is not equivalent to (qc->tf.flags & ATA_TFLAG_POLLING).
4249 WARN_ON(in_wq != ata_hsm_ok_in_wq(ap, qc));
4252 DPRINTK("ata%u: protocol %d task_state %d (dev_stat 0x%X)\n",
4253 ap->id, qc->tf.protocol, ap->hsm_task_state, status);
4255 switch (ap->hsm_task_state) {
4257 /* Send first data block or PACKET CDB */
4259 /* If polling, we will stay in the work queue after
4260 * sending the data. Otherwise, interrupt handler
4261 * takes over after sending the data.
4263 poll_next = (qc->tf.flags & ATA_TFLAG_POLLING);
4265 /* check device status */
4266 if (unlikely((status & ATA_DRQ) == 0)) {
4267 /* handle BSY=0, DRQ=0 as error */
4268 if (likely(status & (ATA_ERR | ATA_DF)))
4269 /* device stops HSM for abort/error */
4270 qc->err_mask |= AC_ERR_DEV;
4272 /* HSM violation. Let EH handle this */
4273 qc->err_mask |= AC_ERR_HSM;
4275 ap->hsm_task_state = HSM_ST_ERR;
4279 /* Device should not ask for data transfer (DRQ=1)
4280 * when it finds something wrong.
4281 * We ignore DRQ here and stop the HSM by
4282 * changing hsm_task_state to HSM_ST_ERR and
4283 * let the EH abort the command or reset the device.
4285 if (unlikely(status & (ATA_ERR | ATA_DF))) {
4286 printk(KERN_WARNING "ata%d: DRQ=1 with device error, dev_stat 0x%X\n",
4288 qc->err_mask |= AC_ERR_HSM;
4289 ap->hsm_task_state = HSM_ST_ERR;
4293 /* Send the CDB (atapi) or the first data block (ata pio out).
4294 * During the state transition, interrupt handler shouldn't
4295 * be invoked before the data transfer is complete and
4296 * hsm_task_state is changed. Hence, the following locking.
4299 spin_lock_irqsave(ap->lock, flags);
4301 if (qc->tf.protocol == ATA_PROT_PIO) {
4302 /* PIO data out protocol.
4303 * send first data block.
4306 /* ata_pio_sectors() might change the state
4307 * to HSM_ST_LAST. so, the state is changed here
4308 * before ata_pio_sectors().
4310 ap->hsm_task_state = HSM_ST;
4311 ata_pio_sectors(qc);
4312 ata_altstatus(ap); /* flush */
4315 atapi_send_cdb(ap, qc);
4318 spin_unlock_irqrestore(ap->lock, flags);
4320 /* if polling, ata_pio_task() handles the rest.
4321 * otherwise, interrupt handler takes over from here.
4326 /* complete command or read/write the data register */
4327 if (qc->tf.protocol == ATA_PROT_ATAPI) {
4328 /* ATAPI PIO protocol */
4329 if ((status & ATA_DRQ) == 0) {
4330 /* No more data to transfer or device error.
4331 * Device error will be tagged in HSM_ST_LAST.
4333 ap->hsm_task_state = HSM_ST_LAST;
4337 /* Device should not ask for data transfer (DRQ=1)
4338 * when it finds something wrong.
4339 * We ignore DRQ here and stop the HSM by
4340 * changing hsm_task_state to HSM_ST_ERR and
4341 * let the EH abort the command or reset the device.
4343 if (unlikely(status & (ATA_ERR | ATA_DF))) {
4344 printk(KERN_WARNING "ata%d: DRQ=1 with device error, dev_stat 0x%X\n",
4346 qc->err_mask |= AC_ERR_HSM;
4347 ap->hsm_task_state = HSM_ST_ERR;
4351 atapi_pio_bytes(qc);
4353 if (unlikely(ap->hsm_task_state == HSM_ST_ERR))
4354 /* bad ireason reported by device */
4358 /* ATA PIO protocol */
4359 if (unlikely((status & ATA_DRQ) == 0)) {
4360 /* handle BSY=0, DRQ=0 as error */
4361 if (likely(status & (ATA_ERR | ATA_DF)))
4362 /* device stops HSM for abort/error */
4363 qc->err_mask |= AC_ERR_DEV;
4365 /* HSM violation. Let EH handle this.
4366 * Phantom devices also trigger this
4367 * condition. Mark hint.
4369 qc->err_mask |= AC_ERR_HSM |
4372 ap->hsm_task_state = HSM_ST_ERR;
4376 /* For PIO reads, some devices may ask for
4377 * data transfer (DRQ=1) alone with ERR=1.
4378 * We respect DRQ here and transfer one
4379 * block of junk data before changing the
4380 * hsm_task_state to HSM_ST_ERR.
4382 * For PIO writes, ERR=1 DRQ=1 doesn't make
4383 * sense since the data block has been
4384 * transferred to the device.
4386 if (unlikely(status & (ATA_ERR | ATA_DF))) {
4387 /* data might be corrputed */
4388 qc->err_mask |= AC_ERR_DEV;
4390 if (!(qc->tf.flags & ATA_TFLAG_WRITE)) {
4391 ata_pio_sectors(qc);
4393 status = ata_wait_idle(ap);
4396 if (status & (ATA_BUSY | ATA_DRQ))
4397 qc->err_mask |= AC_ERR_HSM;
4399 /* ata_pio_sectors() might change the
4400 * state to HSM_ST_LAST. so, the state
4401 * is changed after ata_pio_sectors().
4403 ap->hsm_task_state = HSM_ST_ERR;
4407 ata_pio_sectors(qc);
4409 if (ap->hsm_task_state == HSM_ST_LAST &&
4410 (!(qc->tf.flags & ATA_TFLAG_WRITE))) {
4413 status = ata_wait_idle(ap);
4418 ata_altstatus(ap); /* flush */
4423 if (unlikely(!ata_ok(status))) {
4424 qc->err_mask |= __ac_err_mask(status);
4425 ap->hsm_task_state = HSM_ST_ERR;
4429 /* no more data to transfer */
4430 DPRINTK("ata%u: dev %u command complete, drv_stat 0x%x\n",
4431 ap->id, qc->dev->devno, status);
4433 WARN_ON(qc->err_mask);
4435 ap->hsm_task_state = HSM_ST_IDLE;
4437 /* complete taskfile transaction */
4438 ata_hsm_qc_complete(qc, in_wq);
4444 /* make sure qc->err_mask is available to
4445 * know what's wrong and recover
4447 WARN_ON(qc->err_mask == 0);
4449 ap->hsm_task_state = HSM_ST_IDLE;
4451 /* complete taskfile transaction */
4452 ata_hsm_qc_complete(qc, in_wq);
4464 static void ata_pio_task(struct work_struct *work)
4466 struct ata_port *ap =
4467 container_of(work, struct ata_port, port_task.work);
4468 struct ata_queued_cmd *qc = ap->port_task_data;
4473 WARN_ON(ap->hsm_task_state == HSM_ST_IDLE);
4476 * This is purely heuristic. This is a fast path.
4477 * Sometimes when we enter, BSY will be cleared in
4478 * a chk-status or two. If not, the drive is probably seeking
4479 * or something. Snooze for a couple msecs, then
4480 * chk-status again. If still busy, queue delayed work.
4482 status = ata_busy_wait(ap, ATA_BUSY, 5);
4483 if (status & ATA_BUSY) {
4485 status = ata_busy_wait(ap, ATA_BUSY, 10);
4486 if (status & ATA_BUSY) {
4487 ata_port_queue_task(ap, ata_pio_task, qc, ATA_SHORT_PAUSE);
4493 poll_next = ata_hsm_move(ap, qc, status, 1);
4495 /* another command or interrupt handler
4496 * may be running at this point.
4503 * ata_qc_new - Request an available ATA command, for queueing
4504 * @ap: Port associated with device @dev
4505 * @dev: Device from whom we request an available command structure
4511 static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap)
4513 struct ata_queued_cmd *qc = NULL;
4516 /* no command while frozen */
4517 if (unlikely(ap->pflags & ATA_PFLAG_FROZEN))
4520 /* the last tag is reserved for internal command. */
4521 for (i = 0; i < ATA_MAX_QUEUE - 1; i++)
4522 if (!test_and_set_bit(i, &ap->qc_allocated)) {
4523 qc = __ata_qc_from_tag(ap, i);
4534 * ata_qc_new_init - Request an available ATA command, and initialize it
4535 * @dev: Device from whom we request an available command structure
4541 struct ata_queued_cmd *ata_qc_new_init(struct ata_device *dev)
4543 struct ata_port *ap = dev->ap;
4544 struct ata_queued_cmd *qc;
4546 qc = ata_qc_new(ap);
4559 * ata_qc_free - free unused ata_queued_cmd
4560 * @qc: Command to complete
4562 * Designed to free unused ata_queued_cmd object
4563 * in case something prevents using it.
4566 * spin_lock_irqsave(host lock)
4568 void ata_qc_free(struct ata_queued_cmd *qc)
4570 struct ata_port *ap = qc->ap;
4573 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
4577 if (likely(ata_tag_valid(tag))) {
4578 qc->tag = ATA_TAG_POISON;
4579 clear_bit(tag, &ap->qc_allocated);
4583 void __ata_qc_complete(struct ata_queued_cmd *qc)
4585 struct ata_port *ap = qc->ap;
4587 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
4588 WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE));
4590 if (likely(qc->flags & ATA_QCFLAG_DMAMAP))
4593 /* command should be marked inactive atomically with qc completion */
4594 if (qc->tf.protocol == ATA_PROT_NCQ)
4595 ap->sactive &= ~(1 << qc->tag);
4597 ap->active_tag = ATA_TAG_POISON;
4599 /* atapi: mark qc as inactive to prevent the interrupt handler
4600 * from completing the command twice later, before the error handler
4601 * is called. (when rc != 0 and atapi request sense is needed)
4603 qc->flags &= ~ATA_QCFLAG_ACTIVE;
4604 ap->qc_active &= ~(1 << qc->tag);
4606 /* call completion callback */
4607 qc->complete_fn(qc);
4610 static void fill_result_tf(struct ata_queued_cmd *qc)
4612 struct ata_port *ap = qc->ap;
4614 ap->ops->tf_read(ap, &qc->result_tf);
4615 qc->result_tf.flags = qc->tf.flags;
4619 * ata_qc_complete - Complete an active ATA command
4620 * @qc: Command to complete
4621 * @err_mask: ATA Status register contents
4623 * Indicate to the mid and upper layers that an ATA
4624 * command has completed, with either an ok or not-ok status.
4627 * spin_lock_irqsave(host lock)
4629 void ata_qc_complete(struct ata_queued_cmd *qc)
4631 struct ata_port *ap = qc->ap;
4633 /* XXX: New EH and old EH use different mechanisms to
4634 * synchronize EH with regular execution path.
4636 * In new EH, a failed qc is marked with ATA_QCFLAG_FAILED.
4637 * Normal execution path is responsible for not accessing a
4638 * failed qc. libata core enforces the rule by returning NULL
4639 * from ata_qc_from_tag() for failed qcs.
4641 * Old EH depends on ata_qc_complete() nullifying completion
4642 * requests if ATA_QCFLAG_EH_SCHEDULED is set. Old EH does
4643 * not synchronize with interrupt handler. Only PIO task is
4646 if (ap->ops->error_handler) {
4647 WARN_ON(ap->pflags & ATA_PFLAG_FROZEN);
4649 if (unlikely(qc->err_mask))
4650 qc->flags |= ATA_QCFLAG_FAILED;
4652 if (unlikely(qc->flags & ATA_QCFLAG_FAILED)) {
4653 if (!ata_tag_internal(qc->tag)) {
4654 /* always fill result TF for failed qc */
4656 ata_qc_schedule_eh(qc);
4661 /* read result TF if requested */
4662 if (qc->flags & ATA_QCFLAG_RESULT_TF)
4665 __ata_qc_complete(qc);
4667 if (qc->flags & ATA_QCFLAG_EH_SCHEDULED)
4670 /* read result TF if failed or requested */
4671 if (qc->err_mask || qc->flags & ATA_QCFLAG_RESULT_TF)
4674 __ata_qc_complete(qc);
4679 * ata_qc_complete_multiple - Complete multiple qcs successfully
4680 * @ap: port in question
4681 * @qc_active: new qc_active mask
4682 * @finish_qc: LLDD callback invoked before completing a qc
4684 * Complete in-flight commands. This functions is meant to be
4685 * called from low-level driver's interrupt routine to complete
4686 * requests normally. ap->qc_active and @qc_active is compared
4687 * and commands are completed accordingly.
4690 * spin_lock_irqsave(host lock)
4693 * Number of completed commands on success, -errno otherwise.
4695 int ata_qc_complete_multiple(struct ata_port *ap, u32 qc_active,
4696 void (*finish_qc)(struct ata_queued_cmd *))
4702 done_mask = ap->qc_active ^ qc_active;
4704 if (unlikely(done_mask & qc_active)) {
4705 ata_port_printk(ap, KERN_ERR, "illegal qc_active transition "
4706 "(%08x->%08x)\n", ap->qc_active, qc_active);
4710 for (i = 0; i < ATA_MAX_QUEUE; i++) {
4711 struct ata_queued_cmd *qc;
4713 if (!(done_mask & (1 << i)))
4716 if ((qc = ata_qc_from_tag(ap, i))) {
4719 ata_qc_complete(qc);
4727 static inline int ata_should_dma_map(struct ata_queued_cmd *qc)
4729 struct ata_port *ap = qc->ap;
4731 switch (qc->tf.protocol) {
4734 case ATA_PROT_ATAPI_DMA:
4737 case ATA_PROT_ATAPI:
4739 if (ap->flags & ATA_FLAG_PIO_DMA)
4752 * ata_qc_issue - issue taskfile to device
4753 * @qc: command to issue to device
4755 * Prepare an ATA command to submission to device.
4756 * This includes mapping the data into a DMA-able
4757 * area, filling in the S/G table, and finally
4758 * writing the taskfile to hardware, starting the command.
4761 * spin_lock_irqsave(host lock)
4763 void ata_qc_issue(struct ata_queued_cmd *qc)
4765 struct ata_port *ap = qc->ap;
4767 /* Make sure only one non-NCQ command is outstanding. The
4768 * check is skipped for old EH because it reuses active qc to
4769 * request ATAPI sense.
4771 WARN_ON(ap->ops->error_handler && ata_tag_valid(ap->active_tag));
4773 if (qc->tf.protocol == ATA_PROT_NCQ) {
4774 WARN_ON(ap->sactive & (1 << qc->tag));
4775 ap->sactive |= 1 << qc->tag;
4777 WARN_ON(ap->sactive);
4778 ap->active_tag = qc->tag;
4781 qc->flags |= ATA_QCFLAG_ACTIVE;
4782 ap->qc_active |= 1 << qc->tag;
4784 if (ata_should_dma_map(qc)) {
4785 if (qc->flags & ATA_QCFLAG_SG) {
4786 if (ata_sg_setup(qc))
4788 } else if (qc->flags & ATA_QCFLAG_SINGLE) {
4789 if (ata_sg_setup_one(qc))
4793 qc->flags &= ~ATA_QCFLAG_DMAMAP;
4796 ap->ops->qc_prep(qc);
4798 qc->err_mask |= ap->ops->qc_issue(qc);
4799 if (unlikely(qc->err_mask))
4804 qc->flags &= ~ATA_QCFLAG_DMAMAP;
4805 qc->err_mask |= AC_ERR_SYSTEM;
4807 ata_qc_complete(qc);
4811 * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner
4812 * @qc: command to issue to device
4814 * Using various libata functions and hooks, this function
4815 * starts an ATA command. ATA commands are grouped into
4816 * classes called "protocols", and issuing each type of protocol
4817 * is slightly different.
4819 * May be used as the qc_issue() entry in ata_port_operations.
4822 * spin_lock_irqsave(host lock)
4825 * Zero on success, AC_ERR_* mask on failure
4828 unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc)
4830 struct ata_port *ap = qc->ap;
4832 /* Use polling pio if the LLD doesn't handle
4833 * interrupt driven pio and atapi CDB interrupt.
4835 if (ap->flags & ATA_FLAG_PIO_POLLING) {
4836 switch (qc->tf.protocol) {
4838 case ATA_PROT_NODATA:
4839 case ATA_PROT_ATAPI:
4840 case ATA_PROT_ATAPI_NODATA:
4841 qc->tf.flags |= ATA_TFLAG_POLLING;
4843 case ATA_PROT_ATAPI_DMA:
4844 if (qc->dev->flags & ATA_DFLAG_CDB_INTR)
4845 /* see ata_dma_blacklisted() */
4853 /* Some controllers show flaky interrupt behavior after
4854 * setting xfer mode. Use polling instead.
4856 if (unlikely(qc->tf.command == ATA_CMD_SET_FEATURES &&
4857 qc->tf.feature == SETFEATURES_XFER) &&
4858 (ap->flags & ATA_FLAG_SETXFER_POLLING))
4859 qc->tf.flags |= ATA_TFLAG_POLLING;
4861 /* select the device */
4862 ata_dev_select(ap, qc->dev->devno, 1, 0);
4864 /* start the command */
4865 switch (qc->tf.protocol) {
4866 case ATA_PROT_NODATA:
4867 if (qc->tf.flags & ATA_TFLAG_POLLING)
4868 ata_qc_set_polling(qc);
4870 ata_tf_to_host(ap, &qc->tf);
4871 ap->hsm_task_state = HSM_ST_LAST;
4873 if (qc->tf.flags & ATA_TFLAG_POLLING)
4874 ata_port_queue_task(ap, ata_pio_task, qc, 0);
4879 WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING);
4881 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
4882 ap->ops->bmdma_setup(qc); /* set up bmdma */
4883 ap->ops->bmdma_start(qc); /* initiate bmdma */
4884 ap->hsm_task_state = HSM_ST_LAST;
4888 if (qc->tf.flags & ATA_TFLAG_POLLING)
4889 ata_qc_set_polling(qc);
4891 ata_tf_to_host(ap, &qc->tf);
4893 if (qc->tf.flags & ATA_TFLAG_WRITE) {
4894 /* PIO data out protocol */
4895 ap->hsm_task_state = HSM_ST_FIRST;
4896 ata_port_queue_task(ap, ata_pio_task, qc, 0);
4898 /* always send first data block using
4899 * the ata_pio_task() codepath.
4902 /* PIO data in protocol */
4903 ap->hsm_task_state = HSM_ST;
4905 if (qc->tf.flags & ATA_TFLAG_POLLING)
4906 ata_port_queue_task(ap, ata_pio_task, qc, 0);
4908 /* if polling, ata_pio_task() handles the rest.
4909 * otherwise, interrupt handler takes over from here.
4915 case ATA_PROT_ATAPI:
4916 case ATA_PROT_ATAPI_NODATA:
4917 if (qc->tf.flags & ATA_TFLAG_POLLING)
4918 ata_qc_set_polling(qc);
4920 ata_tf_to_host(ap, &qc->tf);
4922 ap->hsm_task_state = HSM_ST_FIRST;
4924 /* send cdb by polling if no cdb interrupt */
4925 if ((!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) ||
4926 (qc->tf.flags & ATA_TFLAG_POLLING))
4927 ata_port_queue_task(ap, ata_pio_task, qc, 0);
4930 case ATA_PROT_ATAPI_DMA:
4931 WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING);
4933 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
4934 ap->ops->bmdma_setup(qc); /* set up bmdma */
4935 ap->hsm_task_state = HSM_ST_FIRST;
4937 /* send cdb by polling if no cdb interrupt */
4938 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
4939 ata_port_queue_task(ap, ata_pio_task, qc, 0);
4944 return AC_ERR_SYSTEM;
4951 * ata_host_intr - Handle host interrupt for given (port, task)
4952 * @ap: Port on which interrupt arrived (possibly...)
4953 * @qc: Taskfile currently active in engine
4955 * Handle host interrupt for given queued command. Currently,
4956 * only DMA interrupts are handled. All other commands are
4957 * handled via polling with interrupts disabled (nIEN bit).
4960 * spin_lock_irqsave(host lock)
4963 * One if interrupt was handled, zero if not (shared irq).
4966 inline unsigned int ata_host_intr (struct ata_port *ap,
4967 struct ata_queued_cmd *qc)
4969 struct ata_eh_info *ehi = &ap->eh_info;
4970 u8 status, host_stat = 0;
4972 VPRINTK("ata%u: protocol %d task_state %d\n",
4973 ap->id, qc->tf.protocol, ap->hsm_task_state);
4975 /* Check whether we are expecting interrupt in this state */
4976 switch (ap->hsm_task_state) {
4978 /* Some pre-ATAPI-4 devices assert INTRQ
4979 * at this state when ready to receive CDB.
4982 /* Check the ATA_DFLAG_CDB_INTR flag is enough here.
4983 * The flag was turned on only for atapi devices.
4984 * No need to check is_atapi_taskfile(&qc->tf) again.
4986 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
4990 if (qc->tf.protocol == ATA_PROT_DMA ||
4991 qc->tf.protocol == ATA_PROT_ATAPI_DMA) {
4992 /* check status of DMA engine */
4993 host_stat = ap->ops->bmdma_status(ap);
4994 VPRINTK("ata%u: host_stat 0x%X\n", ap->id, host_stat);
4996 /* if it's not our irq... */
4997 if (!(host_stat & ATA_DMA_INTR))
5000 /* before we do anything else, clear DMA-Start bit */
5001 ap->ops->bmdma_stop(qc);
5003 if (unlikely(host_stat & ATA_DMA_ERR)) {
5004 /* error when transfering data to/from memory */
5005 qc->err_mask |= AC_ERR_HOST_BUS;
5006 ap->hsm_task_state = HSM_ST_ERR;
5016 /* check altstatus */
5017 status = ata_altstatus(ap);
5018 if (status & ATA_BUSY)
5021 /* check main status, clearing INTRQ */
5022 status = ata_chk_status(ap);
5023 if (unlikely(status & ATA_BUSY))
5026 /* ack bmdma irq events */
5027 ap->ops->irq_clear(ap);
5029 ata_hsm_move(ap, qc, status, 0);
5031 if (unlikely(qc->err_mask) && (qc->tf.protocol == ATA_PROT_DMA ||
5032 qc->tf.protocol == ATA_PROT_ATAPI_DMA))
5033 ata_ehi_push_desc(ehi, "BMDMA stat 0x%x", host_stat);
5035 return 1; /* irq handled */
5038 ap->stats.idle_irq++;
5041 if ((ap->stats.idle_irq % 1000) == 0) {
5042 ap->ops->irq_ack(ap, 0); /* debug trap */
5043 ata_port_printk(ap, KERN_WARNING, "irq trap\n");
5047 return 0; /* irq not handled */
5051 * ata_interrupt - Default ATA host interrupt handler
5052 * @irq: irq line (unused)
5053 * @dev_instance: pointer to our ata_host information structure
5055 * Default interrupt handler for PCI IDE devices. Calls
5056 * ata_host_intr() for each port that is not disabled.
5059 * Obtains host lock during operation.
5062 * IRQ_NONE or IRQ_HANDLED.
5065 irqreturn_t ata_interrupt (int irq, void *dev_instance)
5067 struct ata_host *host = dev_instance;
5069 unsigned int handled = 0;
5070 unsigned long flags;
5072 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
5073 spin_lock_irqsave(&host->lock, flags);
5075 for (i = 0; i < host->n_ports; i++) {
5076 struct ata_port *ap;
5078 ap = host->ports[i];
5080 !(ap->flags & ATA_FLAG_DISABLED)) {
5081 struct ata_queued_cmd *qc;
5083 qc = ata_qc_from_tag(ap, ap->active_tag);
5084 if (qc && (!(qc->tf.flags & ATA_TFLAG_POLLING)) &&
5085 (qc->flags & ATA_QCFLAG_ACTIVE))
5086 handled |= ata_host_intr(ap, qc);
5090 spin_unlock_irqrestore(&host->lock, flags);
5092 return IRQ_RETVAL(handled);
5096 * sata_scr_valid - test whether SCRs are accessible
5097 * @ap: ATA port to test SCR accessibility for
5099 * Test whether SCRs are accessible for @ap.
5105 * 1 if SCRs are accessible, 0 otherwise.
5107 int sata_scr_valid(struct ata_port *ap)
5109 return ap->cbl == ATA_CBL_SATA && ap->ops->scr_read;
5113 * sata_scr_read - read SCR register of the specified port
5114 * @ap: ATA port to read SCR for
5116 * @val: Place to store read value
5118 * Read SCR register @reg of @ap into *@val. This function is
5119 * guaranteed to succeed if the cable type of the port is SATA
5120 * and the port implements ->scr_read.
5126 * 0 on success, negative errno on failure.
5128 int sata_scr_read(struct ata_port *ap, int reg, u32 *val)
5130 if (sata_scr_valid(ap)) {
5131 *val = ap->ops->scr_read(ap, reg);
5138 * sata_scr_write - write SCR register of the specified port
5139 * @ap: ATA port to write SCR for
5140 * @reg: SCR to write
5141 * @val: value to write
5143 * Write @val to SCR register @reg of @ap. This function is
5144 * guaranteed to succeed if the cable type of the port is SATA
5145 * and the port implements ->scr_read.
5151 * 0 on success, negative errno on failure.
5153 int sata_scr_write(struct ata_port *ap, int reg, u32 val)
5155 if (sata_scr_valid(ap)) {
5156 ap->ops->scr_write(ap, reg, val);
5163 * sata_scr_write_flush - write SCR register of the specified port and flush
5164 * @ap: ATA port to write SCR for
5165 * @reg: SCR to write
5166 * @val: value to write
5168 * This function is identical to sata_scr_write() except that this
5169 * function performs flush after writing to the register.
5175 * 0 on success, negative errno on failure.
5177 int sata_scr_write_flush(struct ata_port *ap, int reg, u32 val)
5179 if (sata_scr_valid(ap)) {
5180 ap->ops->scr_write(ap, reg, val);
5181 ap->ops->scr_read(ap, reg);
5188 * ata_port_online - test whether the given port is online
5189 * @ap: ATA port to test
5191 * Test whether @ap is online. Note that this function returns 0
5192 * if online status of @ap cannot be obtained, so
5193 * ata_port_online(ap) != !ata_port_offline(ap).
5199 * 1 if the port online status is available and online.
5201 int ata_port_online(struct ata_port *ap)
5205 if (!sata_scr_read(ap, SCR_STATUS, &sstatus) && (sstatus & 0xf) == 0x3)
5211 * ata_port_offline - test whether the given port is offline
5212 * @ap: ATA port to test
5214 * Test whether @ap is offline. Note that this function returns
5215 * 0 if offline status of @ap cannot be obtained, so
5216 * ata_port_online(ap) != !ata_port_offline(ap).
5222 * 1 if the port offline status is available and offline.
5224 int ata_port_offline(struct ata_port *ap)
5228 if (!sata_scr_read(ap, SCR_STATUS, &sstatus) && (sstatus & 0xf) != 0x3)
5233 int ata_flush_cache(struct ata_device *dev)
5235 unsigned int err_mask;
5238 if (!ata_try_flush_cache(dev))
5241 if (dev->flags & ATA_DFLAG_FLUSH_EXT)
5242 cmd = ATA_CMD_FLUSH_EXT;
5244 cmd = ATA_CMD_FLUSH;
5246 err_mask = ata_do_simple_cmd(dev, cmd);
5248 ata_dev_printk(dev, KERN_ERR, "failed to flush cache\n");
5255 static int ata_host_request_pm(struct ata_host *host, pm_message_t mesg,
5256 unsigned int action, unsigned int ehi_flags,
5259 unsigned long flags;
5262 for (i = 0; i < host->n_ports; i++) {
5263 struct ata_port *ap = host->ports[i];
5265 /* Previous resume operation might still be in
5266 * progress. Wait for PM_PENDING to clear.
5268 if (ap->pflags & ATA_PFLAG_PM_PENDING) {
5269 ata_port_wait_eh(ap);
5270 WARN_ON(ap->pflags & ATA_PFLAG_PM_PENDING);
5273 /* request PM ops to EH */
5274 spin_lock_irqsave(ap->lock, flags);
5279 ap->pm_result = &rc;
5282 ap->pflags |= ATA_PFLAG_PM_PENDING;
5283 ap->eh_info.action |= action;
5284 ap->eh_info.flags |= ehi_flags;
5286 ata_port_schedule_eh(ap);
5288 spin_unlock_irqrestore(ap->lock, flags);
5290 /* wait and check result */
5292 ata_port_wait_eh(ap);
5293 WARN_ON(ap->pflags & ATA_PFLAG_PM_PENDING);
5303 * ata_host_suspend - suspend host
5304 * @host: host to suspend
5307 * Suspend @host. Actual operation is performed by EH. This
5308 * function requests EH to perform PM operations and waits for EH
5312 * Kernel thread context (may sleep).
5315 * 0 on success, -errno on failure.
5317 int ata_host_suspend(struct ata_host *host, pm_message_t mesg)
5321 rc = ata_host_request_pm(host, mesg, 0, ATA_EHI_QUIET, 1);
5325 /* EH is quiescent now. Fail if we have any ready device.
5326 * This happens if hotplug occurs between completion of device
5327 * suspension and here.
5329 for (i = 0; i < host->n_ports; i++) {
5330 struct ata_port *ap = host->ports[i];
5332 for (j = 0; j < ATA_MAX_DEVICES; j++) {
5333 struct ata_device *dev = &ap->device[j];
5335 if (ata_dev_ready(dev)) {
5336 ata_port_printk(ap, KERN_WARNING,
5337 "suspend failed, device %d "
5338 "still active\n", dev->devno);
5345 host->dev->power.power_state = mesg;
5349 ata_host_resume(host);
5354 * ata_host_resume - resume host
5355 * @host: host to resume
5357 * Resume @host. Actual operation is performed by EH. This
5358 * function requests EH to perform PM operations and returns.
5359 * Note that all resume operations are performed parallely.
5362 * Kernel thread context (may sleep).
5364 void ata_host_resume(struct ata_host *host)
5366 ata_host_request_pm(host, PMSG_ON, ATA_EH_SOFTRESET,
5367 ATA_EHI_NO_AUTOPSY | ATA_EHI_QUIET, 0);
5368 host->dev->power.power_state = PMSG_ON;
5372 * ata_port_start - Set port up for dma.
5373 * @ap: Port to initialize
5375 * Called just after data structures for each port are
5376 * initialized. Allocates space for PRD table.
5378 * May be used as the port_start() entry in ata_port_operations.
5381 * Inherited from caller.
5383 int ata_port_start(struct ata_port *ap)
5385 struct device *dev = ap->dev;
5388 ap->prd = dmam_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma,
5393 rc = ata_pad_alloc(ap, dev);
5397 DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd,
5398 (unsigned long long)ap->prd_dma);
5403 * ata_dev_init - Initialize an ata_device structure
5404 * @dev: Device structure to initialize
5406 * Initialize @dev in preparation for probing.
5409 * Inherited from caller.
5411 void ata_dev_init(struct ata_device *dev)
5413 struct ata_port *ap = dev->ap;
5414 unsigned long flags;
5416 /* SATA spd limit is bound to the first device */
5417 ap->sata_spd_limit = ap->hw_sata_spd_limit;
5419 /* High bits of dev->flags are used to record warm plug
5420 * requests which occur asynchronously. Synchronize using
5423 spin_lock_irqsave(ap->lock, flags);
5424 dev->flags &= ~ATA_DFLAG_INIT_MASK;
5425 spin_unlock_irqrestore(ap->lock, flags);
5427 memset((void *)dev + ATA_DEVICE_CLEAR_OFFSET, 0,
5428 sizeof(*dev) - ATA_DEVICE_CLEAR_OFFSET);
5429 dev->pio_mask = UINT_MAX;
5430 dev->mwdma_mask = UINT_MAX;
5431 dev->udma_mask = UINT_MAX;
5435 * ata_port_init - Initialize an ata_port structure
5436 * @ap: Structure to initialize
5437 * @host: Collection of hosts to which @ap belongs
5438 * @ent: Probe information provided by low-level driver
5439 * @port_no: Port number associated with this ata_port
5441 * Initialize a new ata_port structure.
5444 * Inherited from caller.
5446 void ata_port_init(struct ata_port *ap, struct ata_host *host,
5447 const struct ata_probe_ent *ent, unsigned int port_no)
5451 ap->lock = &host->lock;
5452 ap->flags = ATA_FLAG_DISABLED;
5453 ap->id = ata_unique_id++;
5454 ap->ctl = ATA_DEVCTL_OBS;
5457 ap->port_no = port_no;
5458 if (port_no == 1 && ent->pinfo2) {
5459 ap->pio_mask = ent->pinfo2->pio_mask;
5460 ap->mwdma_mask = ent->pinfo2->mwdma_mask;
5461 ap->udma_mask = ent->pinfo2->udma_mask;
5462 ap->flags |= ent->pinfo2->flags;
5463 ap->ops = ent->pinfo2->port_ops;
5465 ap->pio_mask = ent->pio_mask;
5466 ap->mwdma_mask = ent->mwdma_mask;
5467 ap->udma_mask = ent->udma_mask;
5468 ap->flags |= ent->port_flags;
5469 ap->ops = ent->port_ops;
5471 ap->hw_sata_spd_limit = UINT_MAX;
5472 ap->active_tag = ATA_TAG_POISON;
5473 ap->last_ctl = 0xFF;
5475 #if defined(ATA_VERBOSE_DEBUG)
5476 /* turn on all debugging levels */
5477 ap->msg_enable = 0x00FF;
5478 #elif defined(ATA_DEBUG)
5479 ap->msg_enable = ATA_MSG_DRV | ATA_MSG_INFO | ATA_MSG_CTL | ATA_MSG_WARN | ATA_MSG_ERR;
5481 ap->msg_enable = ATA_MSG_DRV | ATA_MSG_ERR | ATA_MSG_WARN;
5484 INIT_DELAYED_WORK(&ap->port_task, NULL);
5485 INIT_DELAYED_WORK(&ap->hotplug_task, ata_scsi_hotplug);
5486 INIT_WORK(&ap->scsi_rescan_task, ata_scsi_dev_rescan);
5487 INIT_LIST_HEAD(&ap->eh_done_q);
5488 init_waitqueue_head(&ap->eh_wait_q);
5490 /* set cable type */
5491 ap->cbl = ATA_CBL_NONE;
5492 if (ap->flags & ATA_FLAG_SATA)
5493 ap->cbl = ATA_CBL_SATA;
5495 for (i = 0; i < ATA_MAX_DEVICES; i++) {
5496 struct ata_device *dev = &ap->device[i];
5503 ap->stats.unhandled_irq = 1;
5504 ap->stats.idle_irq = 1;
5507 memcpy(&ap->ioaddr, &ent->port[port_no], sizeof(struct ata_ioports));
5511 * ata_port_init_shost - Initialize SCSI host associated with ATA port
5512 * @ap: ATA port to initialize SCSI host for
5513 * @shost: SCSI host associated with @ap
5515 * Initialize SCSI host @shost associated with ATA port @ap.
5518 * Inherited from caller.
5520 static void ata_port_init_shost(struct ata_port *ap, struct Scsi_Host *shost)
5522 ap->scsi_host = shost;
5524 shost->unique_id = ap->id;
5527 shost->max_channel = 1;
5528 shost->max_cmd_len = 12;
5532 * ata_port_add - Attach low-level ATA driver to system
5533 * @ent: Information provided by low-level driver
5534 * @host: Collections of ports to which we add
5535 * @port_no: Port number associated with this host
5537 * Attach low-level ATA driver to system.
5540 * PCI/etc. bus probe sem.
5543 * New ata_port on success, for NULL on error.
5545 static struct ata_port * ata_port_add(const struct ata_probe_ent *ent,
5546 struct ata_host *host,
5547 unsigned int port_no)
5549 struct Scsi_Host *shost;
5550 struct ata_port *ap;
5554 if (!ent->port_ops->error_handler &&
5555 !(ent->port_flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST))) {
5556 printk(KERN_ERR "ata%u: no reset mechanism available\n",
5561 shost = scsi_host_alloc(ent->sht, sizeof(struct ata_port));
5565 shost->transportt = &ata_scsi_transport_template;
5567 ap = ata_shost_to_port(shost);
5569 ata_port_init(ap, host, ent, port_no);
5570 ata_port_init_shost(ap, shost);
5575 static void ata_host_release(struct device *gendev, void *res)
5577 struct ata_host *host = dev_get_drvdata(gendev);
5580 for (i = 0; i < host->n_ports; i++) {
5581 struct ata_port *ap = host->ports[i];
5586 if (ap->ops->port_stop)
5587 ap->ops->port_stop(ap);
5589 scsi_host_put(ap->scsi_host);
5592 if (host->ops->host_stop)
5593 host->ops->host_stop(host);
5597 * ata_sas_host_init - Initialize a host struct
5598 * @host: host to initialize
5599 * @dev: device host is attached to
5600 * @flags: host flags
5604 * PCI/etc. bus probe sem.
5608 void ata_host_init(struct ata_host *host, struct device *dev,
5609 unsigned long flags, const struct ata_port_operations *ops)
5611 spin_lock_init(&host->lock);
5613 host->flags = flags;
5618 * ata_device_add - Register hardware device with ATA and SCSI layers
5619 * @ent: Probe information describing hardware device to be registered
5621 * This function processes the information provided in the probe
5622 * information struct @ent, allocates the necessary ATA and SCSI
5623 * host information structures, initializes them, and registers
5624 * everything with requisite kernel subsystems.
5626 * This function requests irqs, probes the ATA bus, and probes
5630 * PCI/etc. bus probe sem.
5633 * Number of ports registered. Zero on error (no ports registered).
5635 int ata_device_add(const struct ata_probe_ent *ent)
5638 struct device *dev = ent->dev;
5639 struct ata_host *host;
5644 if (ent->irq == 0) {
5645 dev_printk(KERN_ERR, dev, "is not available: No interrupt assigned.\n");
5649 if (!devres_open_group(dev, ata_device_add, GFP_KERNEL))
5652 /* alloc a container for our list of ATA ports (buses) */
5653 host = devres_alloc(ata_host_release, sizeof(struct ata_host) +
5654 (ent->n_ports * sizeof(void *)), GFP_KERNEL);
5657 devres_add(dev, host);
5658 dev_set_drvdata(dev, host);
5660 ata_host_init(host, dev, ent->_host_flags, ent->port_ops);
5661 host->n_ports = ent->n_ports;
5662 host->irq = ent->irq;
5663 host->irq2 = ent->irq2;
5664 host->iomap = ent->iomap;
5665 host->private_data = ent->private_data;
5667 /* register each port bound to this device */
5668 for (i = 0; i < host->n_ports; i++) {
5669 struct ata_port *ap;
5670 unsigned long xfer_mode_mask;
5671 int irq_line = ent->irq;
5673 ap = ata_port_add(ent, host, i);
5674 host->ports[i] = ap;
5679 if (ent->dummy_port_mask & (1 << i)) {
5680 ata_port_printk(ap, KERN_INFO, "DUMMY\n");
5681 ap->ops = &ata_dummy_port_ops;
5686 rc = ap->ops->port_start(ap);
5688 host->ports[i] = NULL;
5689 scsi_host_put(ap->scsi_host);
5693 /* Report the secondary IRQ for second channel legacy */
5694 if (i == 1 && ent->irq2)
5695 irq_line = ent->irq2;
5697 xfer_mode_mask =(ap->udma_mask << ATA_SHIFT_UDMA) |
5698 (ap->mwdma_mask << ATA_SHIFT_MWDMA) |
5699 (ap->pio_mask << ATA_SHIFT_PIO);
5701 /* print per-port info to dmesg */
5702 ata_port_printk(ap, KERN_INFO, "%cATA max %s cmd 0x%p "
5703 "ctl 0x%p bmdma 0x%p irq %d\n",
5704 ap->flags & ATA_FLAG_SATA ? 'S' : 'P',
5705 ata_mode_string(xfer_mode_mask),
5706 ap->ioaddr.cmd_addr,
5707 ap->ioaddr.ctl_addr,
5708 ap->ioaddr.bmdma_addr,
5711 /* freeze port before requesting IRQ */
5712 ata_eh_freeze_port(ap);
5715 /* obtain irq, that may be shared between channels */
5716 rc = devm_request_irq(dev, ent->irq, ent->port_ops->irq_handler,
5717 ent->irq_flags, DRV_NAME, host);
5719 dev_printk(KERN_ERR, dev, "irq %lu request failed: %d\n",
5724 /* do we have a second IRQ for the other channel, eg legacy mode */
5726 /* We will get weird core code crashes later if this is true
5728 BUG_ON(ent->irq == ent->irq2);
5730 rc = devm_request_irq(dev, ent->irq2,
5731 ent->port_ops->irq_handler, ent->irq_flags,
5734 dev_printk(KERN_ERR, dev, "irq %lu request failed: %d\n",
5740 /* resource acquisition complete */
5741 devres_remove_group(dev, ata_device_add);
5743 /* perform each probe synchronously */
5744 DPRINTK("probe begin\n");
5745 for (i = 0; i < host->n_ports; i++) {
5746 struct ata_port *ap = host->ports[i];
5750 /* init sata_spd_limit to the current value */
5751 if (sata_scr_read(ap, SCR_CONTROL, &scontrol) == 0) {
5752 int spd = (scontrol >> 4) & 0xf;
5753 ap->hw_sata_spd_limit &= (1 << spd) - 1;
5755 ap->sata_spd_limit = ap->hw_sata_spd_limit;
5757 rc = scsi_add_host(ap->scsi_host, dev);
5759 ata_port_printk(ap, KERN_ERR, "scsi_add_host failed\n");
5760 /* FIXME: do something useful here */
5761 /* FIXME: handle unconditional calls to
5762 * scsi_scan_host and ata_host_remove, below,
5767 if (ap->ops->error_handler) {
5768 struct ata_eh_info *ehi = &ap->eh_info;
5769 unsigned long flags;
5773 /* kick EH for boot probing */
5774 spin_lock_irqsave(ap->lock, flags);
5776 ehi->probe_mask = (1 << ATA_MAX_DEVICES) - 1;
5777 ehi->action |= ATA_EH_SOFTRESET;
5778 ehi->flags |= ATA_EHI_NO_AUTOPSY | ATA_EHI_QUIET;
5780 ap->pflags |= ATA_PFLAG_LOADING;
5781 ata_port_schedule_eh(ap);
5783 spin_unlock_irqrestore(ap->lock, flags);
5785 /* wait for EH to finish */
5786 ata_port_wait_eh(ap);
5788 DPRINTK("ata%u: bus probe begin\n", ap->id);
5789 rc = ata_bus_probe(ap);
5790 DPRINTK("ata%u: bus probe end\n", ap->id);
5793 /* FIXME: do something useful here?
5794 * Current libata behavior will
5795 * tear down everything when
5796 * the module is removed
5797 * or the h/w is unplugged.
5803 /* probes are done, now scan each port's disk(s) */
5804 DPRINTK("host probe begin\n");
5805 for (i = 0; i < host->n_ports; i++) {
5806 struct ata_port *ap = host->ports[i];
5808 ata_scsi_scan_host(ap);
5811 VPRINTK("EXIT, returning %u\n", ent->n_ports);
5812 return ent->n_ports; /* success */
5815 devres_release_group(dev, ata_device_add);
5816 dev_set_drvdata(dev, NULL);
5817 VPRINTK("EXIT, returning %d\n", rc);
5822 * ata_port_detach - Detach ATA port in prepration of device removal
5823 * @ap: ATA port to be detached
5825 * Detach all ATA devices and the associated SCSI devices of @ap;
5826 * then, remove the associated SCSI host. @ap is guaranteed to
5827 * be quiescent on return from this function.
5830 * Kernel thread context (may sleep).
5832 void ata_port_detach(struct ata_port *ap)
5834 unsigned long flags;
5837 if (!ap->ops->error_handler)
5840 /* tell EH we're leaving & flush EH */
5841 spin_lock_irqsave(ap->lock, flags);
5842 ap->pflags |= ATA_PFLAG_UNLOADING;
5843 spin_unlock_irqrestore(ap->lock, flags);
5845 ata_port_wait_eh(ap);
5847 /* EH is now guaranteed to see UNLOADING, so no new device
5848 * will be attached. Disable all existing devices.
5850 spin_lock_irqsave(ap->lock, flags);
5852 for (i = 0; i < ATA_MAX_DEVICES; i++)
5853 ata_dev_disable(&ap->device[i]);
5855 spin_unlock_irqrestore(ap->lock, flags);
5857 /* Final freeze & EH. All in-flight commands are aborted. EH
5858 * will be skipped and retrials will be terminated with bad
5861 spin_lock_irqsave(ap->lock, flags);
5862 ata_port_freeze(ap); /* won't be thawed */
5863 spin_unlock_irqrestore(ap->lock, flags);
5865 ata_port_wait_eh(ap);
5867 /* Flush hotplug task. The sequence is similar to
5868 * ata_port_flush_task().
5870 flush_workqueue(ata_aux_wq);
5871 cancel_delayed_work(&ap->hotplug_task);
5872 flush_workqueue(ata_aux_wq);
5875 /* remove the associated SCSI host */
5876 scsi_remove_host(ap->scsi_host);
5880 * ata_host_detach - Detach all ports of an ATA host
5881 * @host: Host to detach
5883 * Detach all ports of @host.
5886 * Kernel thread context (may sleep).
5888 void ata_host_detach(struct ata_host *host)
5892 for (i = 0; i < host->n_ports; i++)
5893 ata_port_detach(host->ports[i]);
5896 struct ata_probe_ent *
5897 ata_probe_ent_alloc(struct device *dev, const struct ata_port_info *port)
5899 struct ata_probe_ent *probe_ent;
5901 /* XXX - the following if can go away once all LLDs are managed */
5902 if (!list_empty(&dev->devres_head))
5903 probe_ent = devm_kzalloc(dev, sizeof(*probe_ent), GFP_KERNEL);
5905 probe_ent = kzalloc(sizeof(*probe_ent), GFP_KERNEL);
5907 printk(KERN_ERR DRV_NAME "(%s): out of memory\n",
5908 kobject_name(&(dev->kobj)));
5912 INIT_LIST_HEAD(&probe_ent->node);
5913 probe_ent->dev = dev;
5915 probe_ent->sht = port->sht;
5916 probe_ent->port_flags = port->flags;
5917 probe_ent->pio_mask = port->pio_mask;
5918 probe_ent->mwdma_mask = port->mwdma_mask;
5919 probe_ent->udma_mask = port->udma_mask;
5920 probe_ent->port_ops = port->port_ops;
5921 probe_ent->private_data = port->private_data;
5927 * ata_std_ports - initialize ioaddr with standard port offsets.
5928 * @ioaddr: IO address structure to be initialized
5930 * Utility function which initializes data_addr, error_addr,
5931 * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
5932 * device_addr, status_addr, and command_addr to standard offsets
5933 * relative to cmd_addr.
5935 * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
5938 void ata_std_ports(struct ata_ioports *ioaddr)
5940 ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA;
5941 ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR;
5942 ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE;
5943 ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT;
5944 ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL;
5945 ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM;
5946 ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH;
5947 ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE;
5948 ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS;
5949 ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD;
5956 * ata_pci_remove_one - PCI layer callback for device removal
5957 * @pdev: PCI device that was removed
5959 * PCI layer indicates to libata via this hook that hot-unplug or
5960 * module unload event has occurred. Detach all ports. Resource
5961 * release is handled via devres.
5964 * Inherited from PCI layer (may sleep).
5966 void ata_pci_remove_one(struct pci_dev *pdev)
5968 struct device *dev = pci_dev_to_dev(pdev);
5969 struct ata_host *host = dev_get_drvdata(dev);
5971 ata_host_detach(host);
5974 /* move to PCI subsystem */
5975 int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits)
5977 unsigned long tmp = 0;
5979 switch (bits->width) {
5982 pci_read_config_byte(pdev, bits->reg, &tmp8);
5988 pci_read_config_word(pdev, bits->reg, &tmp16);
5994 pci_read_config_dword(pdev, bits->reg, &tmp32);
6005 return (tmp == bits->val) ? 1 : 0;
6008 void ata_pci_device_do_suspend(struct pci_dev *pdev, pm_message_t mesg)
6010 pci_save_state(pdev);
6012 if (mesg.event == PM_EVENT_SUSPEND) {
6013 pci_disable_device(pdev);
6014 pci_set_power_state(pdev, PCI_D3hot);
6018 int ata_pci_device_do_resume(struct pci_dev *pdev)
6022 pci_set_power_state(pdev, PCI_D0);
6023 pci_restore_state(pdev);
6025 rc = pcim_enable_device(pdev);
6027 dev_printk(KERN_ERR, &pdev->dev,
6028 "failed to enable device after resume (%d)\n", rc);
6032 pci_set_master(pdev);
6036 int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg)
6038 struct ata_host *host = dev_get_drvdata(&pdev->dev);
6041 rc = ata_host_suspend(host, mesg);
6045 ata_pci_device_do_suspend(pdev, mesg);
6050 int ata_pci_device_resume(struct pci_dev *pdev)
6052 struct ata_host *host = dev_get_drvdata(&pdev->dev);
6055 rc = ata_pci_device_do_resume(pdev);
6057 ata_host_resume(host);
6060 #endif /* CONFIG_PCI */
6063 static int __init ata_init(void)
6065 ata_probe_timeout *= HZ;
6066 ata_wq = create_workqueue("ata");
6070 ata_aux_wq = create_singlethread_workqueue("ata_aux");
6072 destroy_workqueue(ata_wq);
6076 printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n");
6080 static void __exit ata_exit(void)
6082 destroy_workqueue(ata_wq);
6083 destroy_workqueue(ata_aux_wq);
6086 subsys_initcall(ata_init);
6087 module_exit(ata_exit);
6089 static unsigned long ratelimit_time;
6090 static DEFINE_SPINLOCK(ata_ratelimit_lock);
6092 int ata_ratelimit(void)
6095 unsigned long flags;
6097 spin_lock_irqsave(&ata_ratelimit_lock, flags);
6099 if (time_after(jiffies, ratelimit_time)) {
6101 ratelimit_time = jiffies + (HZ/5);
6105 spin_unlock_irqrestore(&ata_ratelimit_lock, flags);
6111 * ata_wait_register - wait until register value changes
6112 * @reg: IO-mapped register
6113 * @mask: Mask to apply to read register value
6114 * @val: Wait condition
6115 * @interval_msec: polling interval in milliseconds
6116 * @timeout_msec: timeout in milliseconds
6118 * Waiting for some bits of register to change is a common
6119 * operation for ATA controllers. This function reads 32bit LE
6120 * IO-mapped register @reg and tests for the following condition.
6122 * (*@reg & mask) != val
6124 * If the condition is met, it returns; otherwise, the process is
6125 * repeated after @interval_msec until timeout.
6128 * Kernel thread context (may sleep)
6131 * The final register value.
6133 u32 ata_wait_register(void __iomem *reg, u32 mask, u32 val,
6134 unsigned long interval_msec,
6135 unsigned long timeout_msec)
6137 unsigned long timeout;
6140 tmp = ioread32(reg);
6142 /* Calculate timeout _after_ the first read to make sure
6143 * preceding writes reach the controller before starting to
6144 * eat away the timeout.
6146 timeout = jiffies + (timeout_msec * HZ) / 1000;
6148 while ((tmp & mask) == val && time_before(jiffies, timeout)) {
6149 msleep(interval_msec);
6150 tmp = ioread32(reg);
6159 static void ata_dummy_noret(struct ata_port *ap) { }
6160 static int ata_dummy_ret0(struct ata_port *ap) { return 0; }
6161 static void ata_dummy_qc_noret(struct ata_queued_cmd *qc) { }
6163 static u8 ata_dummy_check_status(struct ata_port *ap)
6168 static unsigned int ata_dummy_qc_issue(struct ata_queued_cmd *qc)
6170 return AC_ERR_SYSTEM;
6173 const struct ata_port_operations ata_dummy_port_ops = {
6174 .port_disable = ata_port_disable,
6175 .check_status = ata_dummy_check_status,
6176 .check_altstatus = ata_dummy_check_status,
6177 .dev_select = ata_noop_dev_select,
6178 .qc_prep = ata_noop_qc_prep,
6179 .qc_issue = ata_dummy_qc_issue,
6180 .freeze = ata_dummy_noret,
6181 .thaw = ata_dummy_noret,
6182 .error_handler = ata_dummy_noret,
6183 .post_internal_cmd = ata_dummy_qc_noret,
6184 .irq_clear = ata_dummy_noret,
6185 .port_start = ata_dummy_ret0,
6186 .port_stop = ata_dummy_noret,
6190 * libata is essentially a library of internal helper functions for
6191 * low-level ATA host controller drivers. As such, the API/ABI is
6192 * likely to change as new drivers are added and updated.
6193 * Do not depend on ABI/API stability.
6196 EXPORT_SYMBOL_GPL(sata_deb_timing_normal);
6197 EXPORT_SYMBOL_GPL(sata_deb_timing_hotplug);
6198 EXPORT_SYMBOL_GPL(sata_deb_timing_long);
6199 EXPORT_SYMBOL_GPL(ata_dummy_port_ops);
6200 EXPORT_SYMBOL_GPL(ata_std_bios_param);
6201 EXPORT_SYMBOL_GPL(ata_std_ports);
6202 EXPORT_SYMBOL_GPL(ata_host_init);
6203 EXPORT_SYMBOL_GPL(ata_device_add);
6204 EXPORT_SYMBOL_GPL(ata_host_detach);
6205 EXPORT_SYMBOL_GPL(ata_sg_init);
6206 EXPORT_SYMBOL_GPL(ata_sg_init_one);
6207 EXPORT_SYMBOL_GPL(ata_hsm_move);
6208 EXPORT_SYMBOL_GPL(ata_qc_complete);
6209 EXPORT_SYMBOL_GPL(ata_qc_complete_multiple);
6210 EXPORT_SYMBOL_GPL(ata_qc_issue_prot);
6211 EXPORT_SYMBOL_GPL(ata_tf_load);
6212 EXPORT_SYMBOL_GPL(ata_tf_read);
6213 EXPORT_SYMBOL_GPL(ata_noop_dev_select);
6214 EXPORT_SYMBOL_GPL(ata_std_dev_select);
6215 EXPORT_SYMBOL_GPL(ata_tf_to_fis);
6216 EXPORT_SYMBOL_GPL(ata_tf_from_fis);
6217 EXPORT_SYMBOL_GPL(ata_check_status);
6218 EXPORT_SYMBOL_GPL(ata_altstatus);
6219 EXPORT_SYMBOL_GPL(ata_exec_command);
6220 EXPORT_SYMBOL_GPL(ata_port_start);
6221 EXPORT_SYMBOL_GPL(ata_interrupt);
6222 EXPORT_SYMBOL_GPL(ata_data_xfer);
6223 EXPORT_SYMBOL_GPL(ata_data_xfer_noirq);
6224 EXPORT_SYMBOL_GPL(ata_qc_prep);
6225 EXPORT_SYMBOL_GPL(ata_noop_qc_prep);
6226 EXPORT_SYMBOL_GPL(ata_bmdma_setup);
6227 EXPORT_SYMBOL_GPL(ata_bmdma_start);
6228 EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear);
6229 EXPORT_SYMBOL_GPL(ata_bmdma_status);
6230 EXPORT_SYMBOL_GPL(ata_bmdma_stop);
6231 EXPORT_SYMBOL_GPL(ata_bmdma_freeze);
6232 EXPORT_SYMBOL_GPL(ata_bmdma_thaw);
6233 EXPORT_SYMBOL_GPL(ata_bmdma_drive_eh);
6234 EXPORT_SYMBOL_GPL(ata_bmdma_error_handler);
6235 EXPORT_SYMBOL_GPL(ata_bmdma_post_internal_cmd);
6236 EXPORT_SYMBOL_GPL(ata_port_probe);
6237 EXPORT_SYMBOL_GPL(sata_set_spd);
6238 EXPORT_SYMBOL_GPL(sata_phy_debounce);
6239 EXPORT_SYMBOL_GPL(sata_phy_resume);
6240 EXPORT_SYMBOL_GPL(sata_phy_reset);
6241 EXPORT_SYMBOL_GPL(__sata_phy_reset);
6242 EXPORT_SYMBOL_GPL(ata_bus_reset);
6243 EXPORT_SYMBOL_GPL(ata_std_prereset);
6244 EXPORT_SYMBOL_GPL(ata_std_softreset);
6245 EXPORT_SYMBOL_GPL(sata_port_hardreset);
6246 EXPORT_SYMBOL_GPL(sata_std_hardreset);
6247 EXPORT_SYMBOL_GPL(ata_std_postreset);
6248 EXPORT_SYMBOL_GPL(ata_dev_classify);
6249 EXPORT_SYMBOL_GPL(ata_dev_pair);
6250 EXPORT_SYMBOL_GPL(ata_port_disable);
6251 EXPORT_SYMBOL_GPL(ata_ratelimit);
6252 EXPORT_SYMBOL_GPL(ata_wait_register);
6253 EXPORT_SYMBOL_GPL(ata_busy_sleep);
6254 EXPORT_SYMBOL_GPL(ata_port_queue_task);
6255 EXPORT_SYMBOL_GPL(ata_scsi_ioctl);
6256 EXPORT_SYMBOL_GPL(ata_scsi_queuecmd);
6257 EXPORT_SYMBOL_GPL(ata_scsi_slave_config);
6258 EXPORT_SYMBOL_GPL(ata_scsi_slave_destroy);
6259 EXPORT_SYMBOL_GPL(ata_scsi_change_queue_depth);
6260 EXPORT_SYMBOL_GPL(ata_host_intr);
6261 EXPORT_SYMBOL_GPL(sata_scr_valid);
6262 EXPORT_SYMBOL_GPL(sata_scr_read);
6263 EXPORT_SYMBOL_GPL(sata_scr_write);
6264 EXPORT_SYMBOL_GPL(sata_scr_write_flush);
6265 EXPORT_SYMBOL_GPL(ata_port_online);
6266 EXPORT_SYMBOL_GPL(ata_port_offline);
6267 EXPORT_SYMBOL_GPL(ata_host_suspend);
6268 EXPORT_SYMBOL_GPL(ata_host_resume);
6269 EXPORT_SYMBOL_GPL(ata_id_string);
6270 EXPORT_SYMBOL_GPL(ata_id_c_string);
6271 EXPORT_SYMBOL_GPL(ata_device_blacklisted);
6272 EXPORT_SYMBOL_GPL(ata_scsi_simulate);
6274 EXPORT_SYMBOL_GPL(ata_pio_need_iordy);
6275 EXPORT_SYMBOL_GPL(ata_timing_compute);
6276 EXPORT_SYMBOL_GPL(ata_timing_merge);
6279 EXPORT_SYMBOL_GPL(pci_test_config_bits);
6280 EXPORT_SYMBOL_GPL(ata_pci_init_native_mode);
6281 EXPORT_SYMBOL_GPL(ata_pci_init_one);
6282 EXPORT_SYMBOL_GPL(ata_pci_remove_one);
6283 EXPORT_SYMBOL_GPL(ata_pci_device_do_suspend);
6284 EXPORT_SYMBOL_GPL(ata_pci_device_do_resume);
6285 EXPORT_SYMBOL_GPL(ata_pci_device_suspend);
6286 EXPORT_SYMBOL_GPL(ata_pci_device_resume);
6287 EXPORT_SYMBOL_GPL(ata_pci_default_filter);
6288 EXPORT_SYMBOL_GPL(ata_pci_clear_simplex);
6289 #endif /* CONFIG_PCI */
6291 EXPORT_SYMBOL_GPL(ata_scsi_device_suspend);
6292 EXPORT_SYMBOL_GPL(ata_scsi_device_resume);
6294 EXPORT_SYMBOL_GPL(ata_eng_timeout);
6295 EXPORT_SYMBOL_GPL(ata_port_schedule_eh);
6296 EXPORT_SYMBOL_GPL(ata_port_abort);
6297 EXPORT_SYMBOL_GPL(ata_port_freeze);
6298 EXPORT_SYMBOL_GPL(ata_eh_freeze_port);
6299 EXPORT_SYMBOL_GPL(ata_eh_thaw_port);
6300 EXPORT_SYMBOL_GPL(ata_eh_qc_complete);
6301 EXPORT_SYMBOL_GPL(ata_eh_qc_retry);
6302 EXPORT_SYMBOL_GPL(ata_do_eh);
6303 EXPORT_SYMBOL_GPL(ata_irq_on);
6304 EXPORT_SYMBOL_GPL(ata_dummy_irq_on);
6305 EXPORT_SYMBOL_GPL(ata_irq_ack);
6306 EXPORT_SYMBOL_GPL(ata_dummy_irq_ack);