2 * libata-core.c - helper library for ATA
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
8 * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2004 Jeff Garzik
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
35 #include <linux/kernel.h>
36 #include <linux/module.h>
37 #include <linux/pci.h>
38 #include <linux/init.h>
39 #include <linux/list.h>
41 #include <linux/highmem.h>
42 #include <linux/spinlock.h>
43 #include <linux/blkdev.h>
44 #include <linux/delay.h>
45 #include <linux/timer.h>
46 #include <linux/interrupt.h>
47 #include <linux/completion.h>
48 #include <linux/suspend.h>
49 #include <linux/workqueue.h>
50 #include <linux/jiffies.h>
51 #include <linux/scatterlist.h>
52 #include <scsi/scsi.h>
53 #include <scsi/scsi_cmnd.h>
54 #include <scsi/scsi_host.h>
55 #include <linux/libata.h>
57 #include <asm/semaphore.h>
58 #include <asm/byteorder.h>
62 #define DRV_VERSION "2.10" /* must be exactly four chars */
65 /* debounce timing parameters in msecs { interval, duration, timeout } */
66 const unsigned long sata_deb_timing_normal[] = { 5, 100, 2000 };
67 const unsigned long sata_deb_timing_hotplug[] = { 25, 500, 2000 };
68 const unsigned long sata_deb_timing_long[] = { 100, 2000, 5000 };
70 static unsigned int ata_dev_init_params(struct ata_device *dev,
71 u16 heads, u16 sectors);
72 static unsigned int ata_dev_set_xfermode(struct ata_device *dev);
73 static void ata_dev_xfermask(struct ata_device *dev);
75 static unsigned int ata_unique_id = 1;
76 static struct workqueue_struct *ata_wq;
78 struct workqueue_struct *ata_aux_wq;
80 int atapi_enabled = 1;
81 module_param(atapi_enabled, int, 0444);
82 MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)");
85 module_param(atapi_dmadir, int, 0444);
86 MODULE_PARM_DESC(atapi_dmadir, "Enable ATAPI DMADIR bridge support (0=off, 1=on)");
89 module_param_named(fua, libata_fua, int, 0444);
90 MODULE_PARM_DESC(fua, "FUA support (0=off, 1=on)");
92 static int ata_probe_timeout = ATA_TMOUT_INTERNAL / HZ;
93 module_param(ata_probe_timeout, int, 0444);
94 MODULE_PARM_DESC(ata_probe_timeout, "Set ATA probing timeout (seconds)");
97 module_param(noacpi, int, 0444);
98 MODULE_PARM_DESC(noacpi, "Disables the use of ACPI in suspend/resume when set");
100 MODULE_AUTHOR("Jeff Garzik");
101 MODULE_DESCRIPTION("Library module for ATA devices");
102 MODULE_LICENSE("GPL");
103 MODULE_VERSION(DRV_VERSION);
107 * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure
108 * @tf: Taskfile to convert
109 * @fis: Buffer into which data will output
110 * @pmp: Port multiplier port
112 * Converts a standard ATA taskfile to a Serial ATA
113 * FIS structure (Register - Host to Device).
116 * Inherited from caller.
119 void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp)
121 fis[0] = 0x27; /* Register - Host to Device FIS */
122 fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number,
123 bit 7 indicates Command FIS */
124 fis[2] = tf->command;
125 fis[3] = tf->feature;
132 fis[8] = tf->hob_lbal;
133 fis[9] = tf->hob_lbam;
134 fis[10] = tf->hob_lbah;
135 fis[11] = tf->hob_feature;
138 fis[13] = tf->hob_nsect;
149 * ata_tf_from_fis - Convert SATA FIS to ATA taskfile
150 * @fis: Buffer from which data will be input
151 * @tf: Taskfile to output
153 * Converts a serial ATA FIS structure to a standard ATA taskfile.
156 * Inherited from caller.
159 void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf)
161 tf->command = fis[2]; /* status */
162 tf->feature = fis[3]; /* error */
169 tf->hob_lbal = fis[8];
170 tf->hob_lbam = fis[9];
171 tf->hob_lbah = fis[10];
174 tf->hob_nsect = fis[13];
177 static const u8 ata_rw_cmds[] = {
181 ATA_CMD_READ_MULTI_EXT,
182 ATA_CMD_WRITE_MULTI_EXT,
186 ATA_CMD_WRITE_MULTI_FUA_EXT,
190 ATA_CMD_PIO_READ_EXT,
191 ATA_CMD_PIO_WRITE_EXT,
204 ATA_CMD_WRITE_FUA_EXT
208 * ata_rwcmd_protocol - set taskfile r/w commands and protocol
209 * @tf: command to examine and configure
210 * @dev: device tf belongs to
212 * Examine the device configuration and tf->flags to calculate
213 * the proper read/write commands and protocol to use.
218 static int ata_rwcmd_protocol(struct ata_taskfile *tf, struct ata_device *dev)
222 int index, fua, lba48, write;
224 fua = (tf->flags & ATA_TFLAG_FUA) ? 4 : 0;
225 lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0;
226 write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0;
228 if (dev->flags & ATA_DFLAG_PIO) {
229 tf->protocol = ATA_PROT_PIO;
230 index = dev->multi_count ? 0 : 8;
231 } else if (lba48 && (dev->ap->flags & ATA_FLAG_PIO_LBA48)) {
232 /* Unable to use DMA due to host limitation */
233 tf->protocol = ATA_PROT_PIO;
234 index = dev->multi_count ? 0 : 8;
236 tf->protocol = ATA_PROT_DMA;
240 cmd = ata_rw_cmds[index + fua + lba48 + write];
249 * ata_tf_read_block - Read block address from ATA taskfile
250 * @tf: ATA taskfile of interest
251 * @dev: ATA device @tf belongs to
256 * Read block address from @tf. This function can handle all
257 * three address formats - LBA, LBA48 and CHS. tf->protocol and
258 * flags select the address format to use.
261 * Block address read from @tf.
263 u64 ata_tf_read_block(struct ata_taskfile *tf, struct ata_device *dev)
267 if (tf->flags & ATA_TFLAG_LBA) {
268 if (tf->flags & ATA_TFLAG_LBA48) {
269 block |= (u64)tf->hob_lbah << 40;
270 block |= (u64)tf->hob_lbam << 32;
271 block |= tf->hob_lbal << 24;
273 block |= (tf->device & 0xf) << 24;
275 block |= tf->lbah << 16;
276 block |= tf->lbam << 8;
281 cyl = tf->lbam | (tf->lbah << 8);
282 head = tf->device & 0xf;
285 block = (cyl * dev->heads + head) * dev->sectors + sect;
292 * ata_build_rw_tf - Build ATA taskfile for given read/write request
293 * @tf: Target ATA taskfile
294 * @dev: ATA device @tf belongs to
295 * @block: Block address
296 * @n_block: Number of blocks
297 * @tf_flags: RW/FUA etc...
303 * Build ATA taskfile @tf for read/write request described by
304 * @block, @n_block, @tf_flags and @tag on @dev.
308 * 0 on success, -ERANGE if the request is too large for @dev,
309 * -EINVAL if the request is invalid.
311 int ata_build_rw_tf(struct ata_taskfile *tf, struct ata_device *dev,
312 u64 block, u32 n_block, unsigned int tf_flags,
315 tf->flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
316 tf->flags |= tf_flags;
318 if (ata_ncq_enabled(dev) && likely(tag != ATA_TAG_INTERNAL)) {
320 if (!lba_48_ok(block, n_block))
323 tf->protocol = ATA_PROT_NCQ;
324 tf->flags |= ATA_TFLAG_LBA | ATA_TFLAG_LBA48;
326 if (tf->flags & ATA_TFLAG_WRITE)
327 tf->command = ATA_CMD_FPDMA_WRITE;
329 tf->command = ATA_CMD_FPDMA_READ;
331 tf->nsect = tag << 3;
332 tf->hob_feature = (n_block >> 8) & 0xff;
333 tf->feature = n_block & 0xff;
335 tf->hob_lbah = (block >> 40) & 0xff;
336 tf->hob_lbam = (block >> 32) & 0xff;
337 tf->hob_lbal = (block >> 24) & 0xff;
338 tf->lbah = (block >> 16) & 0xff;
339 tf->lbam = (block >> 8) & 0xff;
340 tf->lbal = block & 0xff;
343 if (tf->flags & ATA_TFLAG_FUA)
344 tf->device |= 1 << 7;
345 } else if (dev->flags & ATA_DFLAG_LBA) {
346 tf->flags |= ATA_TFLAG_LBA;
348 if (lba_28_ok(block, n_block)) {
350 tf->device |= (block >> 24) & 0xf;
351 } else if (lba_48_ok(block, n_block)) {
352 if (!(dev->flags & ATA_DFLAG_LBA48))
356 tf->flags |= ATA_TFLAG_LBA48;
358 tf->hob_nsect = (n_block >> 8) & 0xff;
360 tf->hob_lbah = (block >> 40) & 0xff;
361 tf->hob_lbam = (block >> 32) & 0xff;
362 tf->hob_lbal = (block >> 24) & 0xff;
364 /* request too large even for LBA48 */
367 if (unlikely(ata_rwcmd_protocol(tf, dev) < 0))
370 tf->nsect = n_block & 0xff;
372 tf->lbah = (block >> 16) & 0xff;
373 tf->lbam = (block >> 8) & 0xff;
374 tf->lbal = block & 0xff;
376 tf->device |= ATA_LBA;
379 u32 sect, head, cyl, track;
381 /* The request -may- be too large for CHS addressing. */
382 if (!lba_28_ok(block, n_block))
385 if (unlikely(ata_rwcmd_protocol(tf, dev) < 0))
388 /* Convert LBA to CHS */
389 track = (u32)block / dev->sectors;
390 cyl = track / dev->heads;
391 head = track % dev->heads;
392 sect = (u32)block % dev->sectors + 1;
394 DPRINTK("block %u track %u cyl %u head %u sect %u\n",
395 (u32)block, track, cyl, head, sect);
397 /* Check whether the converted CHS can fit.
401 if ((cyl >> 16) || (head >> 4) || (sect >> 8) || (!sect))
404 tf->nsect = n_block & 0xff; /* Sector count 0 means 256 sectors */
415 * ata_pack_xfermask - Pack pio, mwdma and udma masks into xfer_mask
416 * @pio_mask: pio_mask
417 * @mwdma_mask: mwdma_mask
418 * @udma_mask: udma_mask
420 * Pack @pio_mask, @mwdma_mask and @udma_mask into a single
421 * unsigned int xfer_mask.
429 static unsigned int ata_pack_xfermask(unsigned int pio_mask,
430 unsigned int mwdma_mask,
431 unsigned int udma_mask)
433 return ((pio_mask << ATA_SHIFT_PIO) & ATA_MASK_PIO) |
434 ((mwdma_mask << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA) |
435 ((udma_mask << ATA_SHIFT_UDMA) & ATA_MASK_UDMA);
439 * ata_unpack_xfermask - Unpack xfer_mask into pio, mwdma and udma masks
440 * @xfer_mask: xfer_mask to unpack
441 * @pio_mask: resulting pio_mask
442 * @mwdma_mask: resulting mwdma_mask
443 * @udma_mask: resulting udma_mask
445 * Unpack @xfer_mask into @pio_mask, @mwdma_mask and @udma_mask.
446 * Any NULL distination masks will be ignored.
448 static void ata_unpack_xfermask(unsigned int xfer_mask,
449 unsigned int *pio_mask,
450 unsigned int *mwdma_mask,
451 unsigned int *udma_mask)
454 *pio_mask = (xfer_mask & ATA_MASK_PIO) >> ATA_SHIFT_PIO;
456 *mwdma_mask = (xfer_mask & ATA_MASK_MWDMA) >> ATA_SHIFT_MWDMA;
458 *udma_mask = (xfer_mask & ATA_MASK_UDMA) >> ATA_SHIFT_UDMA;
461 static const struct ata_xfer_ent {
465 { ATA_SHIFT_PIO, ATA_BITS_PIO, XFER_PIO_0 },
466 { ATA_SHIFT_MWDMA, ATA_BITS_MWDMA, XFER_MW_DMA_0 },
467 { ATA_SHIFT_UDMA, ATA_BITS_UDMA, XFER_UDMA_0 },
472 * ata_xfer_mask2mode - Find matching XFER_* for the given xfer_mask
473 * @xfer_mask: xfer_mask of interest
475 * Return matching XFER_* value for @xfer_mask. Only the highest
476 * bit of @xfer_mask is considered.
482 * Matching XFER_* value, 0 if no match found.
484 static u8 ata_xfer_mask2mode(unsigned int xfer_mask)
486 int highbit = fls(xfer_mask) - 1;
487 const struct ata_xfer_ent *ent;
489 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
490 if (highbit >= ent->shift && highbit < ent->shift + ent->bits)
491 return ent->base + highbit - ent->shift;
496 * ata_xfer_mode2mask - Find matching xfer_mask for XFER_*
497 * @xfer_mode: XFER_* of interest
499 * Return matching xfer_mask for @xfer_mode.
505 * Matching xfer_mask, 0 if no match found.
507 static unsigned int ata_xfer_mode2mask(u8 xfer_mode)
509 const struct ata_xfer_ent *ent;
511 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
512 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
513 return 1 << (ent->shift + xfer_mode - ent->base);
518 * ata_xfer_mode2shift - Find matching xfer_shift for XFER_*
519 * @xfer_mode: XFER_* of interest
521 * Return matching xfer_shift for @xfer_mode.
527 * Matching xfer_shift, -1 if no match found.
529 static int ata_xfer_mode2shift(unsigned int xfer_mode)
531 const struct ata_xfer_ent *ent;
533 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
534 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
540 * ata_mode_string - convert xfer_mask to string
541 * @xfer_mask: mask of bits supported; only highest bit counts.
543 * Determine string which represents the highest speed
544 * (highest bit in @modemask).
550 * Constant C string representing highest speed listed in
551 * @mode_mask, or the constant C string "<n/a>".
553 static const char *ata_mode_string(unsigned int xfer_mask)
555 static const char * const xfer_mode_str[] = {
579 highbit = fls(xfer_mask) - 1;
580 if (highbit >= 0 && highbit < ARRAY_SIZE(xfer_mode_str))
581 return xfer_mode_str[highbit];
585 static const char *sata_spd_string(unsigned int spd)
587 static const char * const spd_str[] = {
592 if (spd == 0 || (spd - 1) >= ARRAY_SIZE(spd_str))
594 return spd_str[spd - 1];
597 void ata_dev_disable(struct ata_device *dev)
599 if (ata_dev_enabled(dev) && ata_msg_drv(dev->ap)) {
600 ata_dev_printk(dev, KERN_WARNING, "disabled\n");
601 ata_down_xfermask_limit(dev, ATA_DNXFER_FORCE_PIO0 |
608 * ata_devchk - PATA device presence detection
609 * @ap: ATA channel to examine
610 * @device: Device to examine (starting at zero)
612 * This technique was originally described in
613 * Hale Landis's ATADRVR (www.ata-atapi.com), and
614 * later found its way into the ATA/ATAPI spec.
616 * Write a pattern to the ATA shadow registers,
617 * and if a device is present, it will respond by
618 * correctly storing and echoing back the
619 * ATA shadow register contents.
625 static unsigned int ata_devchk(struct ata_port *ap, unsigned int device)
627 struct ata_ioports *ioaddr = &ap->ioaddr;
630 ap->ops->dev_select(ap, device);
632 iowrite8(0x55, ioaddr->nsect_addr);
633 iowrite8(0xaa, ioaddr->lbal_addr);
635 iowrite8(0xaa, ioaddr->nsect_addr);
636 iowrite8(0x55, ioaddr->lbal_addr);
638 iowrite8(0x55, ioaddr->nsect_addr);
639 iowrite8(0xaa, ioaddr->lbal_addr);
641 nsect = ioread8(ioaddr->nsect_addr);
642 lbal = ioread8(ioaddr->lbal_addr);
644 if ((nsect == 0x55) && (lbal == 0xaa))
645 return 1; /* we found a device */
647 return 0; /* nothing found */
651 * ata_dev_classify - determine device type based on ATA-spec signature
652 * @tf: ATA taskfile register set for device to be identified
654 * Determine from taskfile register contents whether a device is
655 * ATA or ATAPI, as per "Signature and persistence" section
656 * of ATA/PI spec (volume 1, sect 5.14).
662 * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, or %ATA_DEV_UNKNOWN
663 * the event of failure.
666 unsigned int ata_dev_classify(const struct ata_taskfile *tf)
668 /* Apple's open source Darwin code hints that some devices only
669 * put a proper signature into the LBA mid/high registers,
670 * So, we only check those. It's sufficient for uniqueness.
673 if (((tf->lbam == 0) && (tf->lbah == 0)) ||
674 ((tf->lbam == 0x3c) && (tf->lbah == 0xc3))) {
675 DPRINTK("found ATA device by sig\n");
679 if (((tf->lbam == 0x14) && (tf->lbah == 0xeb)) ||
680 ((tf->lbam == 0x69) && (tf->lbah == 0x96))) {
681 DPRINTK("found ATAPI device by sig\n");
682 return ATA_DEV_ATAPI;
685 DPRINTK("unknown device\n");
686 return ATA_DEV_UNKNOWN;
690 * ata_dev_try_classify - Parse returned ATA device signature
691 * @ap: ATA channel to examine
692 * @device: Device to examine (starting at zero)
693 * @r_err: Value of error register on completion
695 * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
696 * an ATA/ATAPI-defined set of values is placed in the ATA
697 * shadow registers, indicating the results of device detection
700 * Select the ATA device, and read the values from the ATA shadow
701 * registers. Then parse according to the Error register value,
702 * and the spec-defined values examined by ata_dev_classify().
708 * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE.
712 ata_dev_try_classify(struct ata_port *ap, unsigned int device, u8 *r_err)
714 struct ata_taskfile tf;
718 ap->ops->dev_select(ap, device);
720 memset(&tf, 0, sizeof(tf));
722 ap->ops->tf_read(ap, &tf);
727 /* see if device passed diags: if master then continue and warn later */
728 if (err == 0 && device == 0)
729 /* diagnostic fail : do nothing _YET_ */
730 ap->device[device].horkage |= ATA_HORKAGE_DIAGNOSTIC;
733 else if ((device == 0) && (err == 0x81))
738 /* determine if device is ATA or ATAPI */
739 class = ata_dev_classify(&tf);
741 if (class == ATA_DEV_UNKNOWN)
743 if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0))
749 * ata_id_string - Convert IDENTIFY DEVICE page into string
750 * @id: IDENTIFY DEVICE results we will examine
751 * @s: string into which data is output
752 * @ofs: offset into identify device page
753 * @len: length of string to return. must be an even number.
755 * The strings in the IDENTIFY DEVICE page are broken up into
756 * 16-bit chunks. Run through the string, and output each
757 * 8-bit chunk linearly, regardless of platform.
763 void ata_id_string(const u16 *id, unsigned char *s,
764 unsigned int ofs, unsigned int len)
783 * ata_id_c_string - Convert IDENTIFY DEVICE page into C string
784 * @id: IDENTIFY DEVICE results we will examine
785 * @s: string into which data is output
786 * @ofs: offset into identify device page
787 * @len: length of string to return. must be an odd number.
789 * This function is identical to ata_id_string except that it
790 * trims trailing spaces and terminates the resulting string with
791 * null. @len must be actual maximum length (even number) + 1.
796 void ata_id_c_string(const u16 *id, unsigned char *s,
797 unsigned int ofs, unsigned int len)
803 ata_id_string(id, s, ofs, len - 1);
805 p = s + strnlen(s, len - 1);
806 while (p > s && p[-1] == ' ')
811 static u64 ata_id_n_sectors(const u16 *id)
813 if (ata_id_has_lba(id)) {
814 if (ata_id_has_lba48(id))
815 return ata_id_u64(id, 100);
817 return ata_id_u32(id, 60);
819 if (ata_id_current_chs_valid(id))
820 return ata_id_u32(id, 57);
822 return id[1] * id[3] * id[6];
827 * ata_noop_dev_select - Select device 0/1 on ATA bus
828 * @ap: ATA channel to manipulate
829 * @device: ATA device (numbered from zero) to select
831 * This function performs no actual function.
833 * May be used as the dev_select() entry in ata_port_operations.
838 void ata_noop_dev_select (struct ata_port *ap, unsigned int device)
844 * ata_std_dev_select - Select device 0/1 on ATA bus
845 * @ap: ATA channel to manipulate
846 * @device: ATA device (numbered from zero) to select
848 * Use the method defined in the ATA specification to
849 * make either device 0, or device 1, active on the
850 * ATA channel. Works with both PIO and MMIO.
852 * May be used as the dev_select() entry in ata_port_operations.
858 void ata_std_dev_select (struct ata_port *ap, unsigned int device)
863 tmp = ATA_DEVICE_OBS;
865 tmp = ATA_DEVICE_OBS | ATA_DEV1;
867 iowrite8(tmp, ap->ioaddr.device_addr);
868 ata_pause(ap); /* needed; also flushes, for mmio */
872 * ata_dev_select - Select device 0/1 on ATA bus
873 * @ap: ATA channel to manipulate
874 * @device: ATA device (numbered from zero) to select
875 * @wait: non-zero to wait for Status register BSY bit to clear
876 * @can_sleep: non-zero if context allows sleeping
878 * Use the method defined in the ATA specification to
879 * make either device 0, or device 1, active on the
882 * This is a high-level version of ata_std_dev_select(),
883 * which additionally provides the services of inserting
884 * the proper pauses and status polling, where needed.
890 void ata_dev_select(struct ata_port *ap, unsigned int device,
891 unsigned int wait, unsigned int can_sleep)
893 if (ata_msg_probe(ap))
894 ata_port_printk(ap, KERN_INFO, "ata_dev_select: ENTER, ata%u: "
895 "device %u, wait %u\n", ap->id, device, wait);
900 ap->ops->dev_select(ap, device);
903 if (can_sleep && ap->device[device].class == ATA_DEV_ATAPI)
910 * ata_dump_id - IDENTIFY DEVICE info debugging output
911 * @id: IDENTIFY DEVICE page to dump
913 * Dump selected 16-bit words from the given IDENTIFY DEVICE
920 static inline void ata_dump_id(const u16 *id)
922 DPRINTK("49==0x%04x "
932 DPRINTK("80==0x%04x "
942 DPRINTK("88==0x%04x "
949 * ata_id_xfermask - Compute xfermask from the given IDENTIFY data
950 * @id: IDENTIFY data to compute xfer mask from
952 * Compute the xfermask for this device. This is not as trivial
953 * as it seems if we must consider early devices correctly.
955 * FIXME: pre IDE drive timing (do we care ?).
963 static unsigned int ata_id_xfermask(const u16 *id)
965 unsigned int pio_mask, mwdma_mask, udma_mask;
967 /* Usual case. Word 53 indicates word 64 is valid */
968 if (id[ATA_ID_FIELD_VALID] & (1 << 1)) {
969 pio_mask = id[ATA_ID_PIO_MODES] & 0x03;
973 /* If word 64 isn't valid then Word 51 high byte holds
974 * the PIO timing number for the maximum. Turn it into
977 u8 mode = (id[ATA_ID_OLD_PIO_MODES] >> 8) & 0xFF;
978 if (mode < 5) /* Valid PIO range */
979 pio_mask = (2 << mode) - 1;
983 /* But wait.. there's more. Design your standards by
984 * committee and you too can get a free iordy field to
985 * process. However its the speeds not the modes that
986 * are supported... Note drivers using the timing API
987 * will get this right anyway
991 mwdma_mask = id[ATA_ID_MWDMA_MODES] & 0x07;
993 if (ata_id_is_cfa(id)) {
995 * Process compact flash extended modes
997 int pio = id[163] & 0x7;
998 int dma = (id[163] >> 3) & 7;
1001 pio_mask |= (1 << 5);
1003 pio_mask |= (1 << 6);
1005 mwdma_mask |= (1 << 3);
1007 mwdma_mask |= (1 << 4);
1011 if (id[ATA_ID_FIELD_VALID] & (1 << 2))
1012 udma_mask = id[ATA_ID_UDMA_MODES] & 0xff;
1014 return ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask);
1018 * ata_port_queue_task - Queue port_task
1019 * @ap: The ata_port to queue port_task for
1020 * @fn: workqueue function to be scheduled
1021 * @data: data for @fn to use
1022 * @delay: delay time for workqueue function
1024 * Schedule @fn(@data) for execution after @delay jiffies using
1025 * port_task. There is one port_task per port and it's the
1026 * user(low level driver)'s responsibility to make sure that only
1027 * one task is active at any given time.
1029 * libata core layer takes care of synchronization between
1030 * port_task and EH. ata_port_queue_task() may be ignored for EH
1034 * Inherited from caller.
1036 void ata_port_queue_task(struct ata_port *ap, work_func_t fn, void *data,
1037 unsigned long delay)
1041 if (ap->pflags & ATA_PFLAG_FLUSH_PORT_TASK)
1044 PREPARE_DELAYED_WORK(&ap->port_task, fn);
1045 ap->port_task_data = data;
1047 rc = queue_delayed_work(ata_wq, &ap->port_task, delay);
1049 /* rc == 0 means that another user is using port task */
1054 * ata_port_flush_task - Flush port_task
1055 * @ap: The ata_port to flush port_task for
1057 * After this function completes, port_task is guranteed not to
1058 * be running or scheduled.
1061 * Kernel thread context (may sleep)
1063 void ata_port_flush_task(struct ata_port *ap)
1065 unsigned long flags;
1069 spin_lock_irqsave(ap->lock, flags);
1070 ap->pflags |= ATA_PFLAG_FLUSH_PORT_TASK;
1071 spin_unlock_irqrestore(ap->lock, flags);
1073 DPRINTK("flush #1\n");
1074 flush_workqueue(ata_wq);
1077 * At this point, if a task is running, it's guaranteed to see
1078 * the FLUSH flag; thus, it will never queue pio tasks again.
1081 if (!cancel_delayed_work(&ap->port_task)) {
1082 if (ata_msg_ctl(ap))
1083 ata_port_printk(ap, KERN_DEBUG, "%s: flush #2\n",
1085 flush_workqueue(ata_wq);
1088 spin_lock_irqsave(ap->lock, flags);
1089 ap->pflags &= ~ATA_PFLAG_FLUSH_PORT_TASK;
1090 spin_unlock_irqrestore(ap->lock, flags);
1092 if (ata_msg_ctl(ap))
1093 ata_port_printk(ap, KERN_DEBUG, "%s: EXIT\n", __FUNCTION__);
1096 static void ata_qc_complete_internal(struct ata_queued_cmd *qc)
1098 struct completion *waiting = qc->private_data;
1104 * ata_exec_internal_sg - execute libata internal command
1105 * @dev: Device to which the command is sent
1106 * @tf: Taskfile registers for the command and the result
1107 * @cdb: CDB for packet command
1108 * @dma_dir: Data tranfer direction of the command
1109 * @sg: sg list for the data buffer of the command
1110 * @n_elem: Number of sg entries
1112 * Executes libata internal command with timeout. @tf contains
1113 * command on entry and result on return. Timeout and error
1114 * conditions are reported via return value. No recovery action
1115 * is taken after a command times out. It's caller's duty to
1116 * clean up after timeout.
1119 * None. Should be called with kernel context, might sleep.
1122 * Zero on success, AC_ERR_* mask on failure
1124 unsigned ata_exec_internal_sg(struct ata_device *dev,
1125 struct ata_taskfile *tf, const u8 *cdb,
1126 int dma_dir, struct scatterlist *sg,
1127 unsigned int n_elem)
1129 struct ata_port *ap = dev->ap;
1130 u8 command = tf->command;
1131 struct ata_queued_cmd *qc;
1132 unsigned int tag, preempted_tag;
1133 u32 preempted_sactive, preempted_qc_active;
1134 DECLARE_COMPLETION_ONSTACK(wait);
1135 unsigned long flags;
1136 unsigned int err_mask;
1139 spin_lock_irqsave(ap->lock, flags);
1141 /* no internal command while frozen */
1142 if (ap->pflags & ATA_PFLAG_FROZEN) {
1143 spin_unlock_irqrestore(ap->lock, flags);
1144 return AC_ERR_SYSTEM;
1147 /* initialize internal qc */
1149 /* XXX: Tag 0 is used for drivers with legacy EH as some
1150 * drivers choke if any other tag is given. This breaks
1151 * ata_tag_internal() test for those drivers. Don't use new
1152 * EH stuff without converting to it.
1154 if (ap->ops->error_handler)
1155 tag = ATA_TAG_INTERNAL;
1159 if (test_and_set_bit(tag, &ap->qc_allocated))
1161 qc = __ata_qc_from_tag(ap, tag);
1169 preempted_tag = ap->active_tag;
1170 preempted_sactive = ap->sactive;
1171 preempted_qc_active = ap->qc_active;
1172 ap->active_tag = ATA_TAG_POISON;
1176 /* prepare & issue qc */
1179 memcpy(qc->cdb, cdb, ATAPI_CDB_LEN);
1180 qc->flags |= ATA_QCFLAG_RESULT_TF;
1181 qc->dma_dir = dma_dir;
1182 if (dma_dir != DMA_NONE) {
1183 unsigned int i, buflen = 0;
1185 for (i = 0; i < n_elem; i++)
1186 buflen += sg[i].length;
1188 ata_sg_init(qc, sg, n_elem);
1189 qc->nbytes = buflen;
1192 qc->private_data = &wait;
1193 qc->complete_fn = ata_qc_complete_internal;
1197 spin_unlock_irqrestore(ap->lock, flags);
1199 rc = wait_for_completion_timeout(&wait, ata_probe_timeout);
1201 ata_port_flush_task(ap);
1204 spin_lock_irqsave(ap->lock, flags);
1206 /* We're racing with irq here. If we lose, the
1207 * following test prevents us from completing the qc
1208 * twice. If we win, the port is frozen and will be
1209 * cleaned up by ->post_internal_cmd().
1211 if (qc->flags & ATA_QCFLAG_ACTIVE) {
1212 qc->err_mask |= AC_ERR_TIMEOUT;
1214 if (ap->ops->error_handler)
1215 ata_port_freeze(ap);
1217 ata_qc_complete(qc);
1219 if (ata_msg_warn(ap))
1220 ata_dev_printk(dev, KERN_WARNING,
1221 "qc timeout (cmd 0x%x)\n", command);
1224 spin_unlock_irqrestore(ap->lock, flags);
1227 /* do post_internal_cmd */
1228 if (ap->ops->post_internal_cmd)
1229 ap->ops->post_internal_cmd(qc);
1231 if ((qc->flags & ATA_QCFLAG_FAILED) && !qc->err_mask) {
1232 if (ata_msg_warn(ap))
1233 ata_dev_printk(dev, KERN_WARNING,
1234 "zero err_mask for failed "
1235 "internal command, assuming AC_ERR_OTHER\n");
1236 qc->err_mask |= AC_ERR_OTHER;
1240 spin_lock_irqsave(ap->lock, flags);
1242 *tf = qc->result_tf;
1243 err_mask = qc->err_mask;
1246 ap->active_tag = preempted_tag;
1247 ap->sactive = preempted_sactive;
1248 ap->qc_active = preempted_qc_active;
1250 /* XXX - Some LLDDs (sata_mv) disable port on command failure.
1251 * Until those drivers are fixed, we detect the condition
1252 * here, fail the command with AC_ERR_SYSTEM and reenable the
1255 * Note that this doesn't change any behavior as internal
1256 * command failure results in disabling the device in the
1257 * higher layer for LLDDs without new reset/EH callbacks.
1259 * Kill the following code as soon as those drivers are fixed.
1261 if (ap->flags & ATA_FLAG_DISABLED) {
1262 err_mask |= AC_ERR_SYSTEM;
1266 spin_unlock_irqrestore(ap->lock, flags);
1272 * ata_exec_internal - execute libata internal command
1273 * @dev: Device to which the command is sent
1274 * @tf: Taskfile registers for the command and the result
1275 * @cdb: CDB for packet command
1276 * @dma_dir: Data tranfer direction of the command
1277 * @buf: Data buffer of the command
1278 * @buflen: Length of data buffer
1280 * Wrapper around ata_exec_internal_sg() which takes simple
1281 * buffer instead of sg list.
1284 * None. Should be called with kernel context, might sleep.
1287 * Zero on success, AC_ERR_* mask on failure
1289 unsigned ata_exec_internal(struct ata_device *dev,
1290 struct ata_taskfile *tf, const u8 *cdb,
1291 int dma_dir, void *buf, unsigned int buflen)
1293 struct scatterlist *psg = NULL, sg;
1294 unsigned int n_elem = 0;
1296 if (dma_dir != DMA_NONE) {
1298 sg_init_one(&sg, buf, buflen);
1303 return ata_exec_internal_sg(dev, tf, cdb, dma_dir, psg, n_elem);
1307 * ata_do_simple_cmd - execute simple internal command
1308 * @dev: Device to which the command is sent
1309 * @cmd: Opcode to execute
1311 * Execute a 'simple' command, that only consists of the opcode
1312 * 'cmd' itself, without filling any other registers
1315 * Kernel thread context (may sleep).
1318 * Zero on success, AC_ERR_* mask on failure
1320 unsigned int ata_do_simple_cmd(struct ata_device *dev, u8 cmd)
1322 struct ata_taskfile tf;
1324 ata_tf_init(dev, &tf);
1327 tf.flags |= ATA_TFLAG_DEVICE;
1328 tf.protocol = ATA_PROT_NODATA;
1330 return ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
1334 * ata_pio_need_iordy - check if iordy needed
1337 * Check if the current speed of the device requires IORDY. Used
1338 * by various controllers for chip configuration.
1341 unsigned int ata_pio_need_iordy(const struct ata_device *adev)
1344 int speed = adev->pio_mode - XFER_PIO_0;
1351 /* If we have no drive specific rule, then PIO 2 is non IORDY */
1353 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE */
1354 pio = adev->id[ATA_ID_EIDE_PIO];
1355 /* Is the speed faster than the drive allows non IORDY ? */
1357 /* This is cycle times not frequency - watch the logic! */
1358 if (pio > 240) /* PIO2 is 240nS per cycle */
1367 * ata_dev_read_id - Read ID data from the specified device
1368 * @dev: target device
1369 * @p_class: pointer to class of the target device (may be changed)
1370 * @flags: ATA_READID_* flags
1371 * @id: buffer to read IDENTIFY data into
1373 * Read ID data from the specified device. ATA_CMD_ID_ATA is
1374 * performed on ATA devices and ATA_CMD_ID_ATAPI on ATAPI
1375 * devices. This function also issues ATA_CMD_INIT_DEV_PARAMS
1376 * for pre-ATA4 drives.
1379 * Kernel thread context (may sleep)
1382 * 0 on success, -errno otherwise.
1384 int ata_dev_read_id(struct ata_device *dev, unsigned int *p_class,
1385 unsigned int flags, u16 *id)
1387 struct ata_port *ap = dev->ap;
1388 unsigned int class = *p_class;
1389 struct ata_taskfile tf;
1390 unsigned int err_mask = 0;
1394 if (ata_msg_ctl(ap))
1395 ata_dev_printk(dev, KERN_DEBUG, "%s: ENTER, host %u, dev %u\n",
1396 __FUNCTION__, ap->id, dev->devno);
1398 ata_dev_select(ap, dev->devno, 1, 1); /* select device 0/1 */
1401 ata_tf_init(dev, &tf);
1405 tf.command = ATA_CMD_ID_ATA;
1408 tf.command = ATA_CMD_ID_ATAPI;
1412 reason = "unsupported class";
1416 tf.protocol = ATA_PROT_PIO;
1418 /* Some devices choke if TF registers contain garbage. Make
1419 * sure those are properly initialized.
1421 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
1423 /* Device presence detection is unreliable on some
1424 * controllers. Always poll IDENTIFY if available.
1426 tf.flags |= ATA_TFLAG_POLLING;
1428 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_FROM_DEVICE,
1429 id, sizeof(id[0]) * ATA_ID_WORDS);
1431 if (err_mask & AC_ERR_NODEV_HINT) {
1432 DPRINTK("ata%u.%d: NODEV after polling detection\n",
1433 ap->id, dev->devno);
1438 reason = "I/O error";
1442 swap_buf_le16(id, ATA_ID_WORDS);
1446 reason = "device reports illegal type";
1448 if (class == ATA_DEV_ATA) {
1449 if (!ata_id_is_ata(id) && !ata_id_is_cfa(id))
1452 if (ata_id_is_ata(id))
1456 if ((flags & ATA_READID_POSTRESET) && class == ATA_DEV_ATA) {
1458 * The exact sequence expected by certain pre-ATA4 drives is:
1461 * INITIALIZE DEVICE PARAMETERS
1463 * Some drives were very specific about that exact sequence.
1465 if (ata_id_major_version(id) < 4 || !ata_id_has_lba(id)) {
1466 err_mask = ata_dev_init_params(dev, id[3], id[6]);
1469 reason = "INIT_DEV_PARAMS failed";
1473 /* current CHS translation info (id[53-58]) might be
1474 * changed. reread the identify device info.
1476 flags &= ~ATA_READID_POSTRESET;
1486 if (ata_msg_warn(ap))
1487 ata_dev_printk(dev, KERN_WARNING, "failed to IDENTIFY "
1488 "(%s, err_mask=0x%x)\n", reason, err_mask);
1492 static inline u8 ata_dev_knobble(struct ata_device *dev)
1494 return ((dev->ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(dev->id)));
1497 static void ata_dev_config_ncq(struct ata_device *dev,
1498 char *desc, size_t desc_sz)
1500 struct ata_port *ap = dev->ap;
1501 int hdepth = 0, ddepth = ata_id_queue_depth(dev->id);
1503 if (!ata_id_has_ncq(dev->id)) {
1507 if (ata_device_blacklisted(dev) & ATA_HORKAGE_NONCQ) {
1508 snprintf(desc, desc_sz, "NCQ (not used)");
1511 if (ap->flags & ATA_FLAG_NCQ) {
1512 hdepth = min(ap->scsi_host->can_queue, ATA_MAX_QUEUE - 1);
1513 dev->flags |= ATA_DFLAG_NCQ;
1516 if (hdepth >= ddepth)
1517 snprintf(desc, desc_sz, "NCQ (depth %d)", ddepth);
1519 snprintf(desc, desc_sz, "NCQ (depth %d/%d)", hdepth, ddepth);
1522 static void ata_set_port_max_cmd_len(struct ata_port *ap)
1526 if (ap->scsi_host) {
1527 unsigned int len = 0;
1529 for (i = 0; i < ATA_MAX_DEVICES; i++)
1530 len = max(len, ap->device[i].cdb_len);
1532 ap->scsi_host->max_cmd_len = len;
1537 * ata_dev_configure - Configure the specified ATA/ATAPI device
1538 * @dev: Target device to configure
1540 * Configure @dev according to @dev->id. Generic and low-level
1541 * driver specific fixups are also applied.
1544 * Kernel thread context (may sleep)
1547 * 0 on success, -errno otherwise
1549 int ata_dev_configure(struct ata_device *dev)
1551 struct ata_port *ap = dev->ap;
1552 int print_info = ap->eh_context.i.flags & ATA_EHI_PRINTINFO;
1553 const u16 *id = dev->id;
1554 unsigned int xfer_mask;
1555 char revbuf[7]; /* XYZ-99\0 */
1556 char fwrevbuf[ATA_ID_FW_REV_LEN+1];
1557 char modelbuf[ATA_ID_PROD_LEN+1];
1560 if (!ata_dev_enabled(dev) && ata_msg_info(ap)) {
1561 ata_dev_printk(dev, KERN_INFO,
1562 "%s: ENTER/EXIT (host %u, dev %u) -- nodev\n",
1563 __FUNCTION__, ap->id, dev->devno);
1567 if (ata_msg_probe(ap))
1568 ata_dev_printk(dev, KERN_DEBUG, "%s: ENTER, host %u, dev %u\n",
1569 __FUNCTION__, ap->id, dev->devno);
1572 rc = ata_acpi_push_id(ap, dev->devno);
1574 ata_dev_printk(dev, KERN_WARNING, "failed to set _SDD(%d)\n",
1578 /* retrieve and execute the ATA task file of _GTF */
1579 ata_acpi_exec_tfs(ap);
1581 /* print device capabilities */
1582 if (ata_msg_probe(ap))
1583 ata_dev_printk(dev, KERN_DEBUG,
1584 "%s: cfg 49:%04x 82:%04x 83:%04x 84:%04x "
1585 "85:%04x 86:%04x 87:%04x 88:%04x\n",
1587 id[49], id[82], id[83], id[84],
1588 id[85], id[86], id[87], id[88]);
1590 /* initialize to-be-configured parameters */
1591 dev->flags &= ~ATA_DFLAG_CFG_MASK;
1592 dev->max_sectors = 0;
1600 * common ATA, ATAPI feature tests
1603 /* find max transfer mode; for printk only */
1604 xfer_mask = ata_id_xfermask(id);
1606 if (ata_msg_probe(ap))
1609 /* ATA-specific feature tests */
1610 if (dev->class == ATA_DEV_ATA) {
1611 if (ata_id_is_cfa(id)) {
1612 if (id[162] & 1) /* CPRM may make this media unusable */
1613 ata_dev_printk(dev, KERN_WARNING, "ata%u: device %u supports DRM functions and may not be fully accessable.\n",
1614 ap->id, dev->devno);
1615 snprintf(revbuf, 7, "CFA");
1618 snprintf(revbuf, 7, "ATA-%d", ata_id_major_version(id));
1620 dev->n_sectors = ata_id_n_sectors(id);
1622 /* SCSI only uses 4-char revisions, dump full 8 chars from ATA */
1623 ata_id_c_string(dev->id, fwrevbuf, ATA_ID_FW_REV,
1626 ata_id_c_string(dev->id, modelbuf, ATA_ID_PROD,
1629 if (dev->id[59] & 0x100)
1630 dev->multi_count = dev->id[59] & 0xff;
1632 if (ata_id_has_lba(id)) {
1633 const char *lba_desc;
1637 dev->flags |= ATA_DFLAG_LBA;
1638 if (ata_id_has_lba48(id)) {
1639 dev->flags |= ATA_DFLAG_LBA48;
1642 if (dev->n_sectors >= (1UL << 28) &&
1643 ata_id_has_flush_ext(id))
1644 dev->flags |= ATA_DFLAG_FLUSH_EXT;
1648 ata_dev_config_ncq(dev, ncq_desc, sizeof(ncq_desc));
1650 /* print device info to dmesg */
1651 if (ata_msg_drv(ap) && print_info) {
1652 ata_dev_printk(dev, KERN_INFO,
1653 "%s: %s, %s, max %s\n",
1654 revbuf, modelbuf, fwrevbuf,
1655 ata_mode_string(xfer_mask));
1656 ata_dev_printk(dev, KERN_INFO,
1657 "%Lu sectors, multi %u: %s %s\n",
1658 (unsigned long long)dev->n_sectors,
1659 dev->multi_count, lba_desc, ncq_desc);
1664 /* Default translation */
1665 dev->cylinders = id[1];
1667 dev->sectors = id[6];
1669 if (ata_id_current_chs_valid(id)) {
1670 /* Current CHS translation is valid. */
1671 dev->cylinders = id[54];
1672 dev->heads = id[55];
1673 dev->sectors = id[56];
1676 /* print device info to dmesg */
1677 if (ata_msg_drv(ap) && print_info) {
1678 ata_dev_printk(dev, KERN_INFO,
1679 "%s: %s, %s, max %s\n",
1680 revbuf, modelbuf, fwrevbuf,
1681 ata_mode_string(xfer_mask));
1682 ata_dev_printk(dev, KERN_INFO,
1683 "%Lu sectors, multi %u, CHS %u/%u/%u\n",
1684 (unsigned long long)dev->n_sectors,
1685 dev->multi_count, dev->cylinders,
1686 dev->heads, dev->sectors);
1693 /* ATAPI-specific feature tests */
1694 else if (dev->class == ATA_DEV_ATAPI) {
1695 char *cdb_intr_string = "";
1697 rc = atapi_cdb_len(id);
1698 if ((rc < 12) || (rc > ATAPI_CDB_LEN)) {
1699 if (ata_msg_warn(ap))
1700 ata_dev_printk(dev, KERN_WARNING,
1701 "unsupported CDB len\n");
1705 dev->cdb_len = (unsigned int) rc;
1707 if (ata_id_cdb_intr(dev->id)) {
1708 dev->flags |= ATA_DFLAG_CDB_INTR;
1709 cdb_intr_string = ", CDB intr";
1712 /* print device info to dmesg */
1713 if (ata_msg_drv(ap) && print_info)
1714 ata_dev_printk(dev, KERN_INFO, "ATAPI, max %s%s\n",
1715 ata_mode_string(xfer_mask),
1719 /* determine max_sectors */
1720 dev->max_sectors = ATA_MAX_SECTORS;
1721 if (dev->flags & ATA_DFLAG_LBA48)
1722 dev->max_sectors = ATA_MAX_SECTORS_LBA48;
1724 if (dev->horkage & ATA_HORKAGE_DIAGNOSTIC) {
1725 /* Let the user know. We don't want to disallow opens for
1726 rescue purposes, or in case the vendor is just a blithering
1729 ata_dev_printk(dev, KERN_WARNING,
1730 "Drive reports diagnostics failure. This may indicate a drive\n");
1731 ata_dev_printk(dev, KERN_WARNING,
1732 "fault or invalid emulation. Contact drive vendor for information.\n");
1736 ata_set_port_max_cmd_len(ap);
1738 /* limit bridge transfers to udma5, 200 sectors */
1739 if (ata_dev_knobble(dev)) {
1740 if (ata_msg_drv(ap) && print_info)
1741 ata_dev_printk(dev, KERN_INFO,
1742 "applying bridge limits\n");
1743 dev->udma_mask &= ATA_UDMA5;
1744 dev->max_sectors = ATA_MAX_SECTORS;
1747 if (ap->ops->dev_config)
1748 ap->ops->dev_config(ap, dev);
1750 if (ata_msg_probe(ap))
1751 ata_dev_printk(dev, KERN_DEBUG, "%s: EXIT, drv_stat = 0x%x\n",
1752 __FUNCTION__, ata_chk_status(ap));
1756 if (ata_msg_probe(ap))
1757 ata_dev_printk(dev, KERN_DEBUG,
1758 "%s: EXIT, err\n", __FUNCTION__);
1763 * ata_bus_probe - Reset and probe ATA bus
1766 * Master ATA bus probing function. Initiates a hardware-dependent
1767 * bus reset, then attempts to identify any devices found on
1771 * PCI/etc. bus probe sem.
1774 * Zero on success, negative errno otherwise.
1777 int ata_bus_probe(struct ata_port *ap)
1779 unsigned int classes[ATA_MAX_DEVICES];
1780 int tries[ATA_MAX_DEVICES];
1782 struct ata_device *dev;
1786 for (i = 0; i < ATA_MAX_DEVICES; i++)
1787 tries[i] = ATA_PROBE_MAX_TRIES;
1790 /* reset and determine device classes */
1791 ap->ops->phy_reset(ap);
1793 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1794 dev = &ap->device[i];
1796 if (!(ap->flags & ATA_FLAG_DISABLED) &&
1797 dev->class != ATA_DEV_UNKNOWN)
1798 classes[dev->devno] = dev->class;
1800 classes[dev->devno] = ATA_DEV_NONE;
1802 dev->class = ATA_DEV_UNKNOWN;
1807 /* after the reset the device state is PIO 0 and the controller
1808 state is undefined. Record the mode */
1810 for (i = 0; i < ATA_MAX_DEVICES; i++)
1811 ap->device[i].pio_mode = XFER_PIO_0;
1813 /* read IDENTIFY page and configure devices */
1814 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1815 dev = &ap->device[i];
1818 dev->class = classes[i];
1820 if (!ata_dev_enabled(dev))
1823 rc = ata_dev_read_id(dev, &dev->class, ATA_READID_POSTRESET,
1828 ap->eh_context.i.flags |= ATA_EHI_PRINTINFO;
1829 rc = ata_dev_configure(dev);
1830 ap->eh_context.i.flags &= ~ATA_EHI_PRINTINFO;
1835 /* configure transfer mode */
1836 rc = ata_set_mode(ap, &dev);
1840 for (i = 0; i < ATA_MAX_DEVICES; i++)
1841 if (ata_dev_enabled(&ap->device[i]))
1844 /* no device present, disable port */
1845 ata_port_disable(ap);
1846 ap->ops->port_disable(ap);
1850 tries[dev->devno]--;
1854 /* eeek, something went very wrong, give up */
1855 tries[dev->devno] = 0;
1859 /* give it just one more chance */
1860 tries[dev->devno] = min(tries[dev->devno], 1);
1862 if (tries[dev->devno] == 1) {
1863 /* This is the last chance, better to slow
1864 * down than lose it.
1866 sata_down_spd_limit(ap);
1867 ata_down_xfermask_limit(dev, ATA_DNXFER_PIO);
1871 if (!tries[dev->devno])
1872 ata_dev_disable(dev);
1878 * ata_port_probe - Mark port as enabled
1879 * @ap: Port for which we indicate enablement
1881 * Modify @ap data structure such that the system
1882 * thinks that the entire port is enabled.
1884 * LOCKING: host lock, or some other form of
1888 void ata_port_probe(struct ata_port *ap)
1890 ap->flags &= ~ATA_FLAG_DISABLED;
1894 * sata_print_link_status - Print SATA link status
1895 * @ap: SATA port to printk link status about
1897 * This function prints link speed and status of a SATA link.
1902 static void sata_print_link_status(struct ata_port *ap)
1904 u32 sstatus, scontrol, tmp;
1906 if (sata_scr_read(ap, SCR_STATUS, &sstatus))
1908 sata_scr_read(ap, SCR_CONTROL, &scontrol);
1910 if (ata_port_online(ap)) {
1911 tmp = (sstatus >> 4) & 0xf;
1912 ata_port_printk(ap, KERN_INFO,
1913 "SATA link up %s (SStatus %X SControl %X)\n",
1914 sata_spd_string(tmp), sstatus, scontrol);
1916 ata_port_printk(ap, KERN_INFO,
1917 "SATA link down (SStatus %X SControl %X)\n",
1923 * __sata_phy_reset - Wake/reset a low-level SATA PHY
1924 * @ap: SATA port associated with target SATA PHY.
1926 * This function issues commands to standard SATA Sxxx
1927 * PHY registers, to wake up the phy (and device), and
1928 * clear any reset condition.
1931 * PCI/etc. bus probe sem.
1934 void __sata_phy_reset(struct ata_port *ap)
1937 unsigned long timeout = jiffies + (HZ * 5);
1939 if (ap->flags & ATA_FLAG_SATA_RESET) {
1940 /* issue phy wake/reset */
1941 sata_scr_write_flush(ap, SCR_CONTROL, 0x301);
1942 /* Couldn't find anything in SATA I/II specs, but
1943 * AHCI-1.1 10.4.2 says at least 1 ms. */
1946 /* phy wake/clear reset */
1947 sata_scr_write_flush(ap, SCR_CONTROL, 0x300);
1949 /* wait for phy to become ready, if necessary */
1952 sata_scr_read(ap, SCR_STATUS, &sstatus);
1953 if ((sstatus & 0xf) != 1)
1955 } while (time_before(jiffies, timeout));
1957 /* print link status */
1958 sata_print_link_status(ap);
1960 /* TODO: phy layer with polling, timeouts, etc. */
1961 if (!ata_port_offline(ap))
1964 ata_port_disable(ap);
1966 if (ap->flags & ATA_FLAG_DISABLED)
1969 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
1970 ata_port_disable(ap);
1974 ap->cbl = ATA_CBL_SATA;
1978 * sata_phy_reset - Reset SATA bus.
1979 * @ap: SATA port associated with target SATA PHY.
1981 * This function resets the SATA bus, and then probes
1982 * the bus for devices.
1985 * PCI/etc. bus probe sem.
1988 void sata_phy_reset(struct ata_port *ap)
1990 __sata_phy_reset(ap);
1991 if (ap->flags & ATA_FLAG_DISABLED)
1997 * ata_dev_pair - return other device on cable
2000 * Obtain the other device on the same cable, or if none is
2001 * present NULL is returned
2004 struct ata_device *ata_dev_pair(struct ata_device *adev)
2006 struct ata_port *ap = adev->ap;
2007 struct ata_device *pair = &ap->device[1 - adev->devno];
2008 if (!ata_dev_enabled(pair))
2014 * ata_port_disable - Disable port.
2015 * @ap: Port to be disabled.
2017 * Modify @ap data structure such that the system
2018 * thinks that the entire port is disabled, and should
2019 * never attempt to probe or communicate with devices
2022 * LOCKING: host lock, or some other form of
2026 void ata_port_disable(struct ata_port *ap)
2028 ap->device[0].class = ATA_DEV_NONE;
2029 ap->device[1].class = ATA_DEV_NONE;
2030 ap->flags |= ATA_FLAG_DISABLED;
2034 * sata_down_spd_limit - adjust SATA spd limit downward
2035 * @ap: Port to adjust SATA spd limit for
2037 * Adjust SATA spd limit of @ap downward. Note that this
2038 * function only adjusts the limit. The change must be applied
2039 * using sata_set_spd().
2042 * Inherited from caller.
2045 * 0 on success, negative errno on failure
2047 int sata_down_spd_limit(struct ata_port *ap)
2049 u32 sstatus, spd, mask;
2052 rc = sata_scr_read(ap, SCR_STATUS, &sstatus);
2056 mask = ap->sata_spd_limit;
2059 highbit = fls(mask) - 1;
2060 mask &= ~(1 << highbit);
2062 spd = (sstatus >> 4) & 0xf;
2066 mask &= (1 << spd) - 1;
2070 ap->sata_spd_limit = mask;
2072 ata_port_printk(ap, KERN_WARNING, "limiting SATA link speed to %s\n",
2073 sata_spd_string(fls(mask)));
2078 static int __sata_set_spd_needed(struct ata_port *ap, u32 *scontrol)
2082 if (ap->sata_spd_limit == UINT_MAX)
2085 limit = fls(ap->sata_spd_limit);
2087 spd = (*scontrol >> 4) & 0xf;
2088 *scontrol = (*scontrol & ~0xf0) | ((limit & 0xf) << 4);
2090 return spd != limit;
2094 * sata_set_spd_needed - is SATA spd configuration needed
2095 * @ap: Port in question
2097 * Test whether the spd limit in SControl matches
2098 * @ap->sata_spd_limit. This function is used to determine
2099 * whether hardreset is necessary to apply SATA spd
2103 * Inherited from caller.
2106 * 1 if SATA spd configuration is needed, 0 otherwise.
2108 int sata_set_spd_needed(struct ata_port *ap)
2112 if (sata_scr_read(ap, SCR_CONTROL, &scontrol))
2115 return __sata_set_spd_needed(ap, &scontrol);
2119 * sata_set_spd - set SATA spd according to spd limit
2120 * @ap: Port to set SATA spd for
2122 * Set SATA spd of @ap according to sata_spd_limit.
2125 * Inherited from caller.
2128 * 0 if spd doesn't need to be changed, 1 if spd has been
2129 * changed. Negative errno if SCR registers are inaccessible.
2131 int sata_set_spd(struct ata_port *ap)
2136 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
2139 if (!__sata_set_spd_needed(ap, &scontrol))
2142 if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol)))
2149 * This mode timing computation functionality is ported over from
2150 * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik
2153 * PIO 0-4, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
2154 * These were taken from ATA/ATAPI-6 standard, rev 0a, except
2155 * for UDMA6, which is currently supported only by Maxtor drives.
2157 * For PIO 5/6 MWDMA 3/4 see the CFA specification 3.0.
2160 static const struct ata_timing ata_timing[] = {
2162 { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 },
2163 { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 },
2164 { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 },
2165 { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 },
2167 { XFER_MW_DMA_4, 25, 0, 0, 0, 55, 20, 80, 0 },
2168 { XFER_MW_DMA_3, 25, 0, 0, 0, 65, 25, 100, 0 },
2169 { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 },
2170 { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 },
2171 { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 },
2173 /* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */
2175 { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 },
2176 { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 },
2177 { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 },
2179 { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 },
2180 { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 },
2181 { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 },
2183 { XFER_PIO_6, 10, 55, 20, 80, 55, 20, 80, 0 },
2184 { XFER_PIO_5, 15, 65, 25, 100, 65, 25, 100, 0 },
2185 { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 },
2186 { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 },
2188 { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 },
2189 { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 },
2190 { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 },
2192 /* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */
2197 #define ENOUGH(v,unit) (((v)-1)/(unit)+1)
2198 #define EZ(v,unit) ((v)?ENOUGH(v,unit):0)
2200 static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT)
2202 q->setup = EZ(t->setup * 1000, T);
2203 q->act8b = EZ(t->act8b * 1000, T);
2204 q->rec8b = EZ(t->rec8b * 1000, T);
2205 q->cyc8b = EZ(t->cyc8b * 1000, T);
2206 q->active = EZ(t->active * 1000, T);
2207 q->recover = EZ(t->recover * 1000, T);
2208 q->cycle = EZ(t->cycle * 1000, T);
2209 q->udma = EZ(t->udma * 1000, UT);
2212 void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b,
2213 struct ata_timing *m, unsigned int what)
2215 if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup);
2216 if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b);
2217 if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b);
2218 if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b);
2219 if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active);
2220 if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover);
2221 if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle);
2222 if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma);
2225 static const struct ata_timing* ata_timing_find_mode(unsigned short speed)
2227 const struct ata_timing *t;
2229 for (t = ata_timing; t->mode != speed; t++)
2230 if (t->mode == 0xFF)
2235 int ata_timing_compute(struct ata_device *adev, unsigned short speed,
2236 struct ata_timing *t, int T, int UT)
2238 const struct ata_timing *s;
2239 struct ata_timing p;
2245 if (!(s = ata_timing_find_mode(speed)))
2248 memcpy(t, s, sizeof(*s));
2251 * If the drive is an EIDE drive, it can tell us it needs extended
2252 * PIO/MW_DMA cycle timing.
2255 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
2256 memset(&p, 0, sizeof(p));
2257 if(speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) {
2258 if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO];
2259 else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY];
2260 } else if(speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) {
2261 p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN];
2263 ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B);
2267 * Convert the timing to bus clock counts.
2270 ata_timing_quantize(t, t, T, UT);
2273 * Even in DMA/UDMA modes we still use PIO access for IDENTIFY,
2274 * S.M.A.R.T * and some other commands. We have to ensure that the
2275 * DMA cycle timing is slower/equal than the fastest PIO timing.
2278 if (speed > XFER_PIO_6) {
2279 ata_timing_compute(adev, adev->pio_mode, &p, T, UT);
2280 ata_timing_merge(&p, t, t, ATA_TIMING_ALL);
2284 * Lengthen active & recovery time so that cycle time is correct.
2287 if (t->act8b + t->rec8b < t->cyc8b) {
2288 t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2;
2289 t->rec8b = t->cyc8b - t->act8b;
2292 if (t->active + t->recover < t->cycle) {
2293 t->active += (t->cycle - (t->active + t->recover)) / 2;
2294 t->recover = t->cycle - t->active;
2301 * ata_down_xfermask_limit - adjust dev xfer masks downward
2302 * @dev: Device to adjust xfer masks
2303 * @sel: ATA_DNXFER_* selector
2305 * Adjust xfer masks of @dev downward. Note that this function
2306 * does not apply the change. Invoking ata_set_mode() afterwards
2307 * will apply the limit.
2310 * Inherited from caller.
2313 * 0 on success, negative errno on failure
2315 int ata_down_xfermask_limit(struct ata_device *dev, unsigned int sel)
2318 unsigned int orig_mask, xfer_mask;
2319 unsigned int pio_mask, mwdma_mask, udma_mask;
2322 quiet = !!(sel & ATA_DNXFER_QUIET);
2323 sel &= ~ATA_DNXFER_QUIET;
2325 xfer_mask = orig_mask = ata_pack_xfermask(dev->pio_mask,
2328 ata_unpack_xfermask(xfer_mask, &pio_mask, &mwdma_mask, &udma_mask);
2331 case ATA_DNXFER_PIO:
2332 highbit = fls(pio_mask) - 1;
2333 pio_mask &= ~(1 << highbit);
2336 case ATA_DNXFER_DMA:
2338 highbit = fls(udma_mask) - 1;
2339 udma_mask &= ~(1 << highbit);
2342 } else if (mwdma_mask) {
2343 highbit = fls(mwdma_mask) - 1;
2344 mwdma_mask &= ~(1 << highbit);
2350 case ATA_DNXFER_40C:
2351 udma_mask &= ATA_UDMA_MASK_40C;
2354 case ATA_DNXFER_FORCE_PIO0:
2356 case ATA_DNXFER_FORCE_PIO:
2365 xfer_mask &= ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask);
2367 if (!(xfer_mask & ATA_MASK_PIO) || xfer_mask == orig_mask)
2371 if (xfer_mask & (ATA_MASK_MWDMA | ATA_MASK_UDMA))
2372 snprintf(buf, sizeof(buf), "%s:%s",
2373 ata_mode_string(xfer_mask),
2374 ata_mode_string(xfer_mask & ATA_MASK_PIO));
2376 snprintf(buf, sizeof(buf), "%s",
2377 ata_mode_string(xfer_mask));
2379 ata_dev_printk(dev, KERN_WARNING,
2380 "limiting speed to %s\n", buf);
2383 ata_unpack_xfermask(xfer_mask, &dev->pio_mask, &dev->mwdma_mask,
2389 static int ata_dev_set_mode(struct ata_device *dev)
2391 struct ata_eh_context *ehc = &dev->ap->eh_context;
2392 unsigned int err_mask;
2395 dev->flags &= ~ATA_DFLAG_PIO;
2396 if (dev->xfer_shift == ATA_SHIFT_PIO)
2397 dev->flags |= ATA_DFLAG_PIO;
2399 err_mask = ata_dev_set_xfermode(dev);
2400 /* Old CFA may refuse this command, which is just fine */
2401 if (dev->xfer_shift == ATA_SHIFT_PIO && ata_id_is_cfa(dev->id))
2402 err_mask &= ~AC_ERR_DEV;
2405 ata_dev_printk(dev, KERN_ERR, "failed to set xfermode "
2406 "(err_mask=0x%x)\n", err_mask);
2410 ehc->i.flags |= ATA_EHI_POST_SETMODE;
2411 rc = ata_dev_revalidate(dev, 0);
2412 ehc->i.flags &= ~ATA_EHI_POST_SETMODE;
2416 DPRINTK("xfer_shift=%u, xfer_mode=0x%x\n",
2417 dev->xfer_shift, (int)dev->xfer_mode);
2419 ata_dev_printk(dev, KERN_INFO, "configured for %s\n",
2420 ata_mode_string(ata_xfer_mode2mask(dev->xfer_mode)));
2425 * ata_set_mode - Program timings and issue SET FEATURES - XFER
2426 * @ap: port on which timings will be programmed
2427 * @r_failed_dev: out paramter for failed device
2429 * Set ATA device disk transfer mode (PIO3, UDMA6, etc.). If
2430 * ata_set_mode() fails, pointer to the failing device is
2431 * returned in @r_failed_dev.
2434 * PCI/etc. bus probe sem.
2437 * 0 on success, negative errno otherwise
2439 int ata_set_mode(struct ata_port *ap, struct ata_device **r_failed_dev)
2441 struct ata_device *dev;
2442 int i, rc = 0, used_dma = 0, found = 0;
2444 /* has private set_mode? */
2445 if (ap->ops->set_mode)
2446 return ap->ops->set_mode(ap, r_failed_dev);
2448 /* step 1: calculate xfer_mask */
2449 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2450 unsigned int pio_mask, dma_mask;
2452 dev = &ap->device[i];
2454 if (!ata_dev_enabled(dev))
2457 ata_dev_xfermask(dev);
2459 pio_mask = ata_pack_xfermask(dev->pio_mask, 0, 0);
2460 dma_mask = ata_pack_xfermask(0, dev->mwdma_mask, dev->udma_mask);
2461 dev->pio_mode = ata_xfer_mask2mode(pio_mask);
2462 dev->dma_mode = ata_xfer_mask2mode(dma_mask);
2471 /* step 2: always set host PIO timings */
2472 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2473 dev = &ap->device[i];
2474 if (!ata_dev_enabled(dev))
2477 if (!dev->pio_mode) {
2478 ata_dev_printk(dev, KERN_WARNING, "no PIO support\n");
2483 dev->xfer_mode = dev->pio_mode;
2484 dev->xfer_shift = ATA_SHIFT_PIO;
2485 if (ap->ops->set_piomode)
2486 ap->ops->set_piomode(ap, dev);
2489 /* step 3: set host DMA timings */
2490 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2491 dev = &ap->device[i];
2493 if (!ata_dev_enabled(dev) || !dev->dma_mode)
2496 dev->xfer_mode = dev->dma_mode;
2497 dev->xfer_shift = ata_xfer_mode2shift(dev->dma_mode);
2498 if (ap->ops->set_dmamode)
2499 ap->ops->set_dmamode(ap, dev);
2502 /* step 4: update devices' xfer mode */
2503 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2504 dev = &ap->device[i];
2506 /* don't update suspended devices' xfer mode */
2507 if (!ata_dev_ready(dev))
2510 rc = ata_dev_set_mode(dev);
2515 /* Record simplex status. If we selected DMA then the other
2516 * host channels are not permitted to do so.
2518 if (used_dma && (ap->host->flags & ATA_HOST_SIMPLEX))
2519 ap->host->simplex_claimed = 1;
2521 /* step5: chip specific finalisation */
2522 if (ap->ops->post_set_mode)
2523 ap->ops->post_set_mode(ap);
2527 *r_failed_dev = dev;
2532 * ata_tf_to_host - issue ATA taskfile to host controller
2533 * @ap: port to which command is being issued
2534 * @tf: ATA taskfile register set
2536 * Issues ATA taskfile register set to ATA host controller,
2537 * with proper synchronization with interrupt handler and
2541 * spin_lock_irqsave(host lock)
2544 static inline void ata_tf_to_host(struct ata_port *ap,
2545 const struct ata_taskfile *tf)
2547 ap->ops->tf_load(ap, tf);
2548 ap->ops->exec_command(ap, tf);
2552 * ata_busy_sleep - sleep until BSY clears, or timeout
2553 * @ap: port containing status register to be polled
2554 * @tmout_pat: impatience timeout
2555 * @tmout: overall timeout
2557 * Sleep until ATA Status register bit BSY clears,
2558 * or a timeout occurs.
2561 * Kernel thread context (may sleep).
2564 * 0 on success, -errno otherwise.
2566 int ata_busy_sleep(struct ata_port *ap,
2567 unsigned long tmout_pat, unsigned long tmout)
2569 unsigned long timer_start, timeout;
2572 status = ata_busy_wait(ap, ATA_BUSY, 300);
2573 timer_start = jiffies;
2574 timeout = timer_start + tmout_pat;
2575 while (status != 0xff && (status & ATA_BUSY) &&
2576 time_before(jiffies, timeout)) {
2578 status = ata_busy_wait(ap, ATA_BUSY, 3);
2581 if (status != 0xff && (status & ATA_BUSY))
2582 ata_port_printk(ap, KERN_WARNING,
2583 "port is slow to respond, please be patient "
2584 "(Status 0x%x)\n", status);
2586 timeout = timer_start + tmout;
2587 while (status != 0xff && (status & ATA_BUSY) &&
2588 time_before(jiffies, timeout)) {
2590 status = ata_chk_status(ap);
2596 if (status & ATA_BUSY) {
2597 ata_port_printk(ap, KERN_ERR, "port failed to respond "
2598 "(%lu secs, Status 0x%x)\n",
2599 tmout / HZ, status);
2606 static void ata_bus_post_reset(struct ata_port *ap, unsigned int devmask)
2608 struct ata_ioports *ioaddr = &ap->ioaddr;
2609 unsigned int dev0 = devmask & (1 << 0);
2610 unsigned int dev1 = devmask & (1 << 1);
2611 unsigned long timeout;
2613 /* if device 0 was found in ata_devchk, wait for its
2617 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2619 /* if device 1 was found in ata_devchk, wait for
2620 * register access, then wait for BSY to clear
2622 timeout = jiffies + ATA_TMOUT_BOOT;
2626 ap->ops->dev_select(ap, 1);
2627 nsect = ioread8(ioaddr->nsect_addr);
2628 lbal = ioread8(ioaddr->lbal_addr);
2629 if ((nsect == 1) && (lbal == 1))
2631 if (time_after(jiffies, timeout)) {
2635 msleep(50); /* give drive a breather */
2638 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2640 /* is all this really necessary? */
2641 ap->ops->dev_select(ap, 0);
2643 ap->ops->dev_select(ap, 1);
2645 ap->ops->dev_select(ap, 0);
2648 static unsigned int ata_bus_softreset(struct ata_port *ap,
2649 unsigned int devmask)
2651 struct ata_ioports *ioaddr = &ap->ioaddr;
2653 DPRINTK("ata%u: bus reset via SRST\n", ap->id);
2655 /* software reset. causes dev0 to be selected */
2656 iowrite8(ap->ctl, ioaddr->ctl_addr);
2657 udelay(20); /* FIXME: flush */
2658 iowrite8(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
2659 udelay(20); /* FIXME: flush */
2660 iowrite8(ap->ctl, ioaddr->ctl_addr);
2662 /* spec mandates ">= 2ms" before checking status.
2663 * We wait 150ms, because that was the magic delay used for
2664 * ATAPI devices in Hale Landis's ATADRVR, for the period of time
2665 * between when the ATA command register is written, and then
2666 * status is checked. Because waiting for "a while" before
2667 * checking status is fine, post SRST, we perform this magic
2668 * delay here as well.
2670 * Old drivers/ide uses the 2mS rule and then waits for ready
2674 /* Before we perform post reset processing we want to see if
2675 * the bus shows 0xFF because the odd clown forgets the D7
2676 * pulldown resistor.
2678 if (ata_check_status(ap) == 0xFF)
2681 ata_bus_post_reset(ap, devmask);
2687 * ata_bus_reset - reset host port and associated ATA channel
2688 * @ap: port to reset
2690 * This is typically the first time we actually start issuing
2691 * commands to the ATA channel. We wait for BSY to clear, then
2692 * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its
2693 * result. Determine what devices, if any, are on the channel
2694 * by looking at the device 0/1 error register. Look at the signature
2695 * stored in each device's taskfile registers, to determine if
2696 * the device is ATA or ATAPI.
2699 * PCI/etc. bus probe sem.
2700 * Obtains host lock.
2703 * Sets ATA_FLAG_DISABLED if bus reset fails.
2706 void ata_bus_reset(struct ata_port *ap)
2708 struct ata_ioports *ioaddr = &ap->ioaddr;
2709 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2711 unsigned int dev0, dev1 = 0, devmask = 0;
2713 DPRINTK("ENTER, host %u, port %u\n", ap->id, ap->port_no);
2715 /* determine if device 0/1 are present */
2716 if (ap->flags & ATA_FLAG_SATA_RESET)
2719 dev0 = ata_devchk(ap, 0);
2721 dev1 = ata_devchk(ap, 1);
2725 devmask |= (1 << 0);
2727 devmask |= (1 << 1);
2729 /* select device 0 again */
2730 ap->ops->dev_select(ap, 0);
2732 /* issue bus reset */
2733 if (ap->flags & ATA_FLAG_SRST)
2734 if (ata_bus_softreset(ap, devmask))
2738 * determine by signature whether we have ATA or ATAPI devices
2740 ap->device[0].class = ata_dev_try_classify(ap, 0, &err);
2741 if ((slave_possible) && (err != 0x81))
2742 ap->device[1].class = ata_dev_try_classify(ap, 1, &err);
2744 /* re-enable interrupts */
2745 ap->ops->irq_on(ap);
2747 /* is double-select really necessary? */
2748 if (ap->device[1].class != ATA_DEV_NONE)
2749 ap->ops->dev_select(ap, 1);
2750 if (ap->device[0].class != ATA_DEV_NONE)
2751 ap->ops->dev_select(ap, 0);
2753 /* if no devices were detected, disable this port */
2754 if ((ap->device[0].class == ATA_DEV_NONE) &&
2755 (ap->device[1].class == ATA_DEV_NONE))
2758 if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) {
2759 /* set up device control for ATA_FLAG_SATA_RESET */
2760 iowrite8(ap->ctl, ioaddr->ctl_addr);
2767 ata_port_printk(ap, KERN_ERR, "disabling port\n");
2768 ap->ops->port_disable(ap);
2774 * sata_phy_debounce - debounce SATA phy status
2775 * @ap: ATA port to debounce SATA phy status for
2776 * @params: timing parameters { interval, duratinon, timeout } in msec
2778 * Make sure SStatus of @ap reaches stable state, determined by
2779 * holding the same value where DET is not 1 for @duration polled
2780 * every @interval, before @timeout. Timeout constraints the
2781 * beginning of the stable state. Because, after hot unplugging,
2782 * DET gets stuck at 1 on some controllers, this functions waits
2783 * until timeout then returns 0 if DET is stable at 1.
2786 * Kernel thread context (may sleep)
2789 * 0 on success, -errno on failure.
2791 int sata_phy_debounce(struct ata_port *ap, const unsigned long *params)
2793 unsigned long interval_msec = params[0];
2794 unsigned long duration = params[1] * HZ / 1000;
2795 unsigned long timeout = jiffies + params[2] * HZ / 1000;
2796 unsigned long last_jiffies;
2800 if ((rc = sata_scr_read(ap, SCR_STATUS, &cur)))
2805 last_jiffies = jiffies;
2808 msleep(interval_msec);
2809 if ((rc = sata_scr_read(ap, SCR_STATUS, &cur)))
2815 if (cur == 1 && time_before(jiffies, timeout))
2817 if (time_after(jiffies, last_jiffies + duration))
2822 /* unstable, start over */
2824 last_jiffies = jiffies;
2827 if (time_after(jiffies, timeout))
2833 * sata_phy_resume - resume SATA phy
2834 * @ap: ATA port to resume SATA phy for
2835 * @params: timing parameters { interval, duratinon, timeout } in msec
2837 * Resume SATA phy of @ap and debounce it.
2840 * Kernel thread context (may sleep)
2843 * 0 on success, -errno on failure.
2845 int sata_phy_resume(struct ata_port *ap, const unsigned long *params)
2850 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
2853 scontrol = (scontrol & 0x0f0) | 0x300;
2855 if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol)))
2858 /* Some PHYs react badly if SStatus is pounded immediately
2859 * after resuming. Delay 200ms before debouncing.
2863 return sata_phy_debounce(ap, params);
2866 static void ata_wait_spinup(struct ata_port *ap)
2868 struct ata_eh_context *ehc = &ap->eh_context;
2869 unsigned long end, secs;
2872 /* first, debounce phy if SATA */
2873 if (ap->cbl == ATA_CBL_SATA) {
2874 rc = sata_phy_debounce(ap, sata_deb_timing_hotplug);
2876 /* if debounced successfully and offline, no need to wait */
2877 if ((rc == 0 || rc == -EOPNOTSUPP) && ata_port_offline(ap))
2881 /* okay, let's give the drive time to spin up */
2882 end = ehc->i.hotplug_timestamp + ATA_SPINUP_WAIT * HZ / 1000;
2883 secs = ((end - jiffies) + HZ - 1) / HZ;
2885 if (time_after(jiffies, end))
2889 ata_port_printk(ap, KERN_INFO, "waiting for device to spin up "
2890 "(%lu secs)\n", secs);
2892 schedule_timeout_uninterruptible(end - jiffies);
2896 * ata_std_prereset - prepare for reset
2897 * @ap: ATA port to be reset
2899 * @ap is about to be reset. Initialize it.
2902 * Kernel thread context (may sleep)
2905 * 0 on success, -errno otherwise.
2907 int ata_std_prereset(struct ata_port *ap)
2909 struct ata_eh_context *ehc = &ap->eh_context;
2910 const unsigned long *timing = sata_ehc_deb_timing(ehc);
2913 /* handle link resume & hotplug spinup */
2914 if ((ehc->i.flags & ATA_EHI_RESUME_LINK) &&
2915 (ap->flags & ATA_FLAG_HRST_TO_RESUME))
2916 ehc->i.action |= ATA_EH_HARDRESET;
2918 if ((ehc->i.flags & ATA_EHI_HOTPLUGGED) &&
2919 (ap->flags & ATA_FLAG_SKIP_D2H_BSY))
2920 ata_wait_spinup(ap);
2922 /* if we're about to do hardreset, nothing more to do */
2923 if (ehc->i.action & ATA_EH_HARDRESET)
2926 /* if SATA, resume phy */
2927 if (ap->cbl == ATA_CBL_SATA) {
2928 rc = sata_phy_resume(ap, timing);
2929 if (rc && rc != -EOPNOTSUPP) {
2930 /* phy resume failed */
2931 ata_port_printk(ap, KERN_WARNING, "failed to resume "
2932 "link for reset (errno=%d)\n", rc);
2937 /* Wait for !BSY if the controller can wait for the first D2H
2938 * Reg FIS and we don't know that no device is attached.
2940 if (!(ap->flags & ATA_FLAG_SKIP_D2H_BSY) && !ata_port_offline(ap))
2941 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2947 * ata_std_softreset - reset host port via ATA SRST
2948 * @ap: port to reset
2949 * @classes: resulting classes of attached devices
2951 * Reset host port using ATA SRST.
2954 * Kernel thread context (may sleep)
2957 * 0 on success, -errno otherwise.
2959 int ata_std_softreset(struct ata_port *ap, unsigned int *classes)
2961 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2962 unsigned int devmask = 0, err_mask;
2967 if (ata_port_offline(ap)) {
2968 classes[0] = ATA_DEV_NONE;
2972 /* determine if device 0/1 are present */
2973 if (ata_devchk(ap, 0))
2974 devmask |= (1 << 0);
2975 if (slave_possible && ata_devchk(ap, 1))
2976 devmask |= (1 << 1);
2978 /* select device 0 again */
2979 ap->ops->dev_select(ap, 0);
2981 /* issue bus reset */
2982 DPRINTK("about to softreset, devmask=%x\n", devmask);
2983 err_mask = ata_bus_softreset(ap, devmask);
2985 ata_port_printk(ap, KERN_ERR, "SRST failed (err_mask=0x%x)\n",
2990 /* determine by signature whether we have ATA or ATAPI devices */
2991 classes[0] = ata_dev_try_classify(ap, 0, &err);
2992 if (slave_possible && err != 0x81)
2993 classes[1] = ata_dev_try_classify(ap, 1, &err);
2996 DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]);
3001 * sata_port_hardreset - reset port via SATA phy reset
3002 * @ap: port to reset
3003 * @timing: timing parameters { interval, duratinon, timeout } in msec
3005 * SATA phy-reset host port using DET bits of SControl register.
3008 * Kernel thread context (may sleep)
3011 * 0 on success, -errno otherwise.
3013 int sata_port_hardreset(struct ata_port *ap, const unsigned long *timing)
3020 if (sata_set_spd_needed(ap)) {
3021 /* SATA spec says nothing about how to reconfigure
3022 * spd. To be on the safe side, turn off phy during
3023 * reconfiguration. This works for at least ICH7 AHCI
3026 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
3029 scontrol = (scontrol & 0x0f0) | 0x304;
3031 if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol)))
3037 /* issue phy wake/reset */
3038 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
3041 scontrol = (scontrol & 0x0f0) | 0x301;
3043 if ((rc = sata_scr_write_flush(ap, SCR_CONTROL, scontrol)))
3046 /* Couldn't find anything in SATA I/II specs, but AHCI-1.1
3047 * 10.4.2 says at least 1 ms.
3051 /* bring phy back */
3052 rc = sata_phy_resume(ap, timing);
3054 DPRINTK("EXIT, rc=%d\n", rc);
3059 * sata_std_hardreset - reset host port via SATA phy reset
3060 * @ap: port to reset
3061 * @class: resulting class of attached device
3063 * SATA phy-reset host port using DET bits of SControl register,
3064 * wait for !BSY and classify the attached device.
3067 * Kernel thread context (may sleep)
3070 * 0 on success, -errno otherwise.
3072 int sata_std_hardreset(struct ata_port *ap, unsigned int *class)
3074 const unsigned long *timing = sata_ehc_deb_timing(&ap->eh_context);
3080 rc = sata_port_hardreset(ap, timing);
3082 ata_port_printk(ap, KERN_ERR,
3083 "COMRESET failed (errno=%d)\n", rc);
3087 /* TODO: phy layer with polling, timeouts, etc. */
3088 if (ata_port_offline(ap)) {
3089 *class = ATA_DEV_NONE;
3090 DPRINTK("EXIT, link offline\n");
3094 /* wait a while before checking status, see SRST for more info */
3097 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
3098 ata_port_printk(ap, KERN_ERR,
3099 "COMRESET failed (device not ready)\n");
3103 ap->ops->dev_select(ap, 0); /* probably unnecessary */
3105 *class = ata_dev_try_classify(ap, 0, NULL);
3107 DPRINTK("EXIT, class=%u\n", *class);
3112 * ata_std_postreset - standard postreset callback
3113 * @ap: the target ata_port
3114 * @classes: classes of attached devices
3116 * This function is invoked after a successful reset. Note that
3117 * the device might have been reset more than once using
3118 * different reset methods before postreset is invoked.
3121 * Kernel thread context (may sleep)
3123 void ata_std_postreset(struct ata_port *ap, unsigned int *classes)
3129 /* print link status */
3130 sata_print_link_status(ap);
3133 if (sata_scr_read(ap, SCR_ERROR, &serror) == 0)
3134 sata_scr_write(ap, SCR_ERROR, serror);
3136 /* re-enable interrupts */
3137 if (!ap->ops->error_handler)
3138 ap->ops->irq_on(ap);
3140 /* is double-select really necessary? */
3141 if (classes[0] != ATA_DEV_NONE)
3142 ap->ops->dev_select(ap, 1);
3143 if (classes[1] != ATA_DEV_NONE)
3144 ap->ops->dev_select(ap, 0);
3146 /* bail out if no device is present */
3147 if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) {
3148 DPRINTK("EXIT, no device\n");
3152 /* set up device control */
3153 if (ap->ioaddr.ctl_addr)
3154 iowrite8(ap->ctl, ap->ioaddr.ctl_addr);
3160 * ata_dev_same_device - Determine whether new ID matches configured device
3161 * @dev: device to compare against
3162 * @new_class: class of the new device
3163 * @new_id: IDENTIFY page of the new device
3165 * Compare @new_class and @new_id against @dev and determine
3166 * whether @dev is the device indicated by @new_class and
3173 * 1 if @dev matches @new_class and @new_id, 0 otherwise.
3175 static int ata_dev_same_device(struct ata_device *dev, unsigned int new_class,
3178 const u16 *old_id = dev->id;
3179 unsigned char model[2][ATA_ID_PROD_LEN + 1];
3180 unsigned char serial[2][ATA_ID_SERNO_LEN + 1];
3183 if (dev->class != new_class) {
3184 ata_dev_printk(dev, KERN_INFO, "class mismatch %d != %d\n",
3185 dev->class, new_class);
3189 ata_id_c_string(old_id, model[0], ATA_ID_PROD, sizeof(model[0]));
3190 ata_id_c_string(new_id, model[1], ATA_ID_PROD, sizeof(model[1]));
3191 ata_id_c_string(old_id, serial[0], ATA_ID_SERNO, sizeof(serial[0]));
3192 ata_id_c_string(new_id, serial[1], ATA_ID_SERNO, sizeof(serial[1]));
3193 new_n_sectors = ata_id_n_sectors(new_id);
3195 if (strcmp(model[0], model[1])) {
3196 ata_dev_printk(dev, KERN_INFO, "model number mismatch "
3197 "'%s' != '%s'\n", model[0], model[1]);
3201 if (strcmp(serial[0], serial[1])) {
3202 ata_dev_printk(dev, KERN_INFO, "serial number mismatch "
3203 "'%s' != '%s'\n", serial[0], serial[1]);
3207 if (dev->class == ATA_DEV_ATA && dev->n_sectors != new_n_sectors) {
3208 ata_dev_printk(dev, KERN_INFO, "n_sectors mismatch "
3210 (unsigned long long)dev->n_sectors,
3211 (unsigned long long)new_n_sectors);
3219 * ata_dev_revalidate - Revalidate ATA device
3220 * @dev: device to revalidate
3221 * @readid_flags: read ID flags
3223 * Re-read IDENTIFY page and make sure @dev is still attached to
3227 * Kernel thread context (may sleep)
3230 * 0 on success, negative errno otherwise
3232 int ata_dev_revalidate(struct ata_device *dev, unsigned int readid_flags)
3234 unsigned int class = dev->class;
3235 u16 *id = (void *)dev->ap->sector_buf;
3238 if (!ata_dev_enabled(dev)) {
3244 rc = ata_dev_read_id(dev, &class, readid_flags, id);
3248 /* is the device still there? */
3249 if (!ata_dev_same_device(dev, class, id)) {
3254 memcpy(dev->id, id, sizeof(id[0]) * ATA_ID_WORDS);
3256 /* configure device according to the new ID */
3257 rc = ata_dev_configure(dev);
3262 ata_dev_printk(dev, KERN_ERR, "revalidation failed (errno=%d)\n", rc);
3266 struct ata_blacklist_entry {
3267 const char *model_num;
3268 const char *model_rev;
3269 unsigned long horkage;
3272 static const struct ata_blacklist_entry ata_device_blacklist [] = {
3273 /* Devices with DMA related problems under Linux */
3274 { "WDC AC11000H", NULL, ATA_HORKAGE_NODMA },
3275 { "WDC AC22100H", NULL, ATA_HORKAGE_NODMA },
3276 { "WDC AC32500H", NULL, ATA_HORKAGE_NODMA },
3277 { "WDC AC33100H", NULL, ATA_HORKAGE_NODMA },
3278 { "WDC AC31600H", NULL, ATA_HORKAGE_NODMA },
3279 { "WDC AC32100H", "24.09P07", ATA_HORKAGE_NODMA },
3280 { "WDC AC23200L", "21.10N21", ATA_HORKAGE_NODMA },
3281 { "Compaq CRD-8241B", NULL, ATA_HORKAGE_NODMA },
3282 { "CRD-8400B", NULL, ATA_HORKAGE_NODMA },
3283 { "CRD-8480B", NULL, ATA_HORKAGE_NODMA },
3284 { "CRD-8482B", NULL, ATA_HORKAGE_NODMA },
3285 { "CRD-84", NULL, ATA_HORKAGE_NODMA },
3286 { "SanDisk SDP3B", NULL, ATA_HORKAGE_NODMA },
3287 { "SanDisk SDP3B-64", NULL, ATA_HORKAGE_NODMA },
3288 { "SANYO CD-ROM CRD", NULL, ATA_HORKAGE_NODMA },
3289 { "HITACHI CDR-8", NULL, ATA_HORKAGE_NODMA },
3290 { "HITACHI CDR-8335", NULL, ATA_HORKAGE_NODMA },
3291 { "HITACHI CDR-8435", NULL, ATA_HORKAGE_NODMA },
3292 { "Toshiba CD-ROM XM-6202B", NULL, ATA_HORKAGE_NODMA },
3293 { "TOSHIBA CD-ROM XM-1702BC", NULL, ATA_HORKAGE_NODMA },
3294 { "CD-532E-A", NULL, ATA_HORKAGE_NODMA },
3295 { "E-IDE CD-ROM CR-840",NULL, ATA_HORKAGE_NODMA },
3296 { "CD-ROM Drive/F5A", NULL, ATA_HORKAGE_NODMA },
3297 { "WPI CDD-820", NULL, ATA_HORKAGE_NODMA },
3298 { "SAMSUNG CD-ROM SC-148C", NULL, ATA_HORKAGE_NODMA },
3299 { "SAMSUNG CD-ROM SC", NULL, ATA_HORKAGE_NODMA },
3300 { "SanDisk SDP3B-64", NULL, ATA_HORKAGE_NODMA },
3301 { "ATAPI CD-ROM DRIVE 40X MAXIMUM",NULL,ATA_HORKAGE_NODMA },
3302 { "_NEC DV5800A", NULL, ATA_HORKAGE_NODMA },
3303 { "SAMSUNG CD-ROM SN-124","N001", ATA_HORKAGE_NODMA },
3305 /* Devices we expect to fail diagnostics */
3307 /* Devices where NCQ should be avoided */
3309 { "WDC WD740ADFD-00", NULL, ATA_HORKAGE_NONCQ },
3311 /* Devices with NCQ limits */
3317 unsigned long ata_device_blacklisted(const struct ata_device *dev)
3319 unsigned char model_num[ATA_ID_PROD_LEN + 1];
3320 unsigned char model_rev[ATA_ID_FW_REV_LEN + 1];
3321 const struct ata_blacklist_entry *ad = ata_device_blacklist;
3323 ata_id_c_string(dev->id, model_num, ATA_ID_PROD, sizeof(model_num));
3324 ata_id_c_string(dev->id, model_rev, ATA_ID_FW_REV, sizeof(model_rev));
3326 while (ad->model_num) {
3327 if (!strcmp(ad->model_num, model_num)) {
3328 if (ad->model_rev == NULL)
3330 if (!strcmp(ad->model_rev, model_rev))
3338 static int ata_dma_blacklisted(const struct ata_device *dev)
3340 /* We don't support polling DMA.
3341 * DMA blacklist those ATAPI devices with CDB-intr (and use PIO)
3342 * if the LLDD handles only interrupts in the HSM_ST_LAST state.
3344 if ((dev->ap->flags & ATA_FLAG_PIO_POLLING) &&
3345 (dev->flags & ATA_DFLAG_CDB_INTR))
3347 return (ata_device_blacklisted(dev) & ATA_HORKAGE_NODMA) ? 1 : 0;
3351 * ata_dev_xfermask - Compute supported xfermask of the given device
3352 * @dev: Device to compute xfermask for
3354 * Compute supported xfermask of @dev and store it in
3355 * dev->*_mask. This function is responsible for applying all
3356 * known limits including host controller limits, device
3362 static void ata_dev_xfermask(struct ata_device *dev)
3364 struct ata_port *ap = dev->ap;
3365 struct ata_host *host = ap->host;
3366 unsigned long xfer_mask;
3368 /* controller modes available */
3369 xfer_mask = ata_pack_xfermask(ap->pio_mask,
3370 ap->mwdma_mask, ap->udma_mask);
3372 /* Apply cable rule here. Don't apply it early because when
3373 * we handle hot plug the cable type can itself change.
3375 if (ap->cbl == ATA_CBL_PATA40)
3376 xfer_mask &= ~(0xF8 << ATA_SHIFT_UDMA);
3377 /* Apply drive side cable rule. Unknown or 80 pin cables reported
3378 * host side are checked drive side as well. Cases where we know a
3379 * 40wire cable is used safely for 80 are not checked here.
3381 if (ata_drive_40wire(dev->id) && (ap->cbl == ATA_CBL_PATA_UNK || ap->cbl == ATA_CBL_PATA80))
3382 xfer_mask &= ~(0xF8 << ATA_SHIFT_UDMA);
3385 xfer_mask &= ata_pack_xfermask(dev->pio_mask,
3386 dev->mwdma_mask, dev->udma_mask);
3387 xfer_mask &= ata_id_xfermask(dev->id);
3390 * CFA Advanced TrueIDE timings are not allowed on a shared
3393 if (ata_dev_pair(dev)) {
3394 /* No PIO5 or PIO6 */
3395 xfer_mask &= ~(0x03 << (ATA_SHIFT_PIO + 5));
3396 /* No MWDMA3 or MWDMA 4 */
3397 xfer_mask &= ~(0x03 << (ATA_SHIFT_MWDMA + 3));
3400 if (ata_dma_blacklisted(dev)) {
3401 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
3402 ata_dev_printk(dev, KERN_WARNING,
3403 "device is on DMA blacklist, disabling DMA\n");
3406 if ((host->flags & ATA_HOST_SIMPLEX) && host->simplex_claimed) {
3407 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
3408 ata_dev_printk(dev, KERN_WARNING, "simplex DMA is claimed by "
3409 "other device, disabling DMA\n");
3412 if (ap->ops->mode_filter)
3413 xfer_mask = ap->ops->mode_filter(ap, dev, xfer_mask);
3415 ata_unpack_xfermask(xfer_mask, &dev->pio_mask,
3416 &dev->mwdma_mask, &dev->udma_mask);
3420 * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command
3421 * @dev: Device to which command will be sent
3423 * Issue SET FEATURES - XFER MODE command to device @dev
3427 * PCI/etc. bus probe sem.
3430 * 0 on success, AC_ERR_* mask otherwise.
3433 static unsigned int ata_dev_set_xfermode(struct ata_device *dev)
3435 struct ata_taskfile tf;
3436 unsigned int err_mask;
3438 /* set up set-features taskfile */
3439 DPRINTK("set features - xfer mode\n");
3441 ata_tf_init(dev, &tf);
3442 tf.command = ATA_CMD_SET_FEATURES;
3443 tf.feature = SETFEATURES_XFER;
3444 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
3445 tf.protocol = ATA_PROT_NODATA;
3446 tf.nsect = dev->xfer_mode;
3448 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
3450 DPRINTK("EXIT, err_mask=%x\n", err_mask);
3455 * ata_dev_init_params - Issue INIT DEV PARAMS command
3456 * @dev: Device to which command will be sent
3457 * @heads: Number of heads (taskfile parameter)
3458 * @sectors: Number of sectors (taskfile parameter)
3461 * Kernel thread context (may sleep)
3464 * 0 on success, AC_ERR_* mask otherwise.
3466 static unsigned int ata_dev_init_params(struct ata_device *dev,
3467 u16 heads, u16 sectors)
3469 struct ata_taskfile tf;
3470 unsigned int err_mask;
3472 /* Number of sectors per track 1-255. Number of heads 1-16 */
3473 if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16)
3474 return AC_ERR_INVALID;
3476 /* set up init dev params taskfile */
3477 DPRINTK("init dev params \n");
3479 ata_tf_init(dev, &tf);
3480 tf.command = ATA_CMD_INIT_DEV_PARAMS;
3481 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
3482 tf.protocol = ATA_PROT_NODATA;
3484 tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */
3486 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
3488 DPRINTK("EXIT, err_mask=%x\n", err_mask);
3493 * ata_sg_clean - Unmap DMA memory associated with command
3494 * @qc: Command containing DMA memory to be released
3496 * Unmap all mapped DMA memory associated with this command.
3499 * spin_lock_irqsave(host lock)
3501 void ata_sg_clean(struct ata_queued_cmd *qc)
3503 struct ata_port *ap = qc->ap;
3504 struct scatterlist *sg = qc->__sg;
3505 int dir = qc->dma_dir;
3506 void *pad_buf = NULL;
3508 WARN_ON(!(qc->flags & ATA_QCFLAG_DMAMAP));
3509 WARN_ON(sg == NULL);
3511 if (qc->flags & ATA_QCFLAG_SINGLE)
3512 WARN_ON(qc->n_elem > 1);
3514 VPRINTK("unmapping %u sg elements\n", qc->n_elem);
3516 /* if we padded the buffer out to 32-bit bound, and data
3517 * xfer direction is from-device, we must copy from the
3518 * pad buffer back into the supplied buffer
3520 if (qc->pad_len && !(qc->tf.flags & ATA_TFLAG_WRITE))
3521 pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3523 if (qc->flags & ATA_QCFLAG_SG) {
3525 dma_unmap_sg(ap->dev, sg, qc->n_elem, dir);
3526 /* restore last sg */
3527 sg[qc->orig_n_elem - 1].length += qc->pad_len;
3529 struct scatterlist *psg = &qc->pad_sgent;
3530 void *addr = kmap_atomic(psg->page, KM_IRQ0);
3531 memcpy(addr + psg->offset, pad_buf, qc->pad_len);
3532 kunmap_atomic(addr, KM_IRQ0);
3536 dma_unmap_single(ap->dev,
3537 sg_dma_address(&sg[0]), sg_dma_len(&sg[0]),
3540 sg->length += qc->pad_len;
3542 memcpy(qc->buf_virt + sg->length - qc->pad_len,
3543 pad_buf, qc->pad_len);
3546 qc->flags &= ~ATA_QCFLAG_DMAMAP;
3551 * ata_fill_sg - Fill PCI IDE PRD table
3552 * @qc: Metadata associated with taskfile to be transferred
3554 * Fill PCI IDE PRD (scatter-gather) table with segments
3555 * associated with the current disk command.
3558 * spin_lock_irqsave(host lock)
3561 static void ata_fill_sg(struct ata_queued_cmd *qc)
3563 struct ata_port *ap = qc->ap;
3564 struct scatterlist *sg;
3567 WARN_ON(qc->__sg == NULL);
3568 WARN_ON(qc->n_elem == 0 && qc->pad_len == 0);
3571 ata_for_each_sg(sg, qc) {
3575 /* determine if physical DMA addr spans 64K boundary.
3576 * Note h/w doesn't support 64-bit, so we unconditionally
3577 * truncate dma_addr_t to u32.
3579 addr = (u32) sg_dma_address(sg);
3580 sg_len = sg_dma_len(sg);
3583 offset = addr & 0xffff;
3585 if ((offset + sg_len) > 0x10000)
3586 len = 0x10000 - offset;
3588 ap->prd[idx].addr = cpu_to_le32(addr);
3589 ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff);
3590 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
3599 ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
3602 * ata_check_atapi_dma - Check whether ATAPI DMA can be supported
3603 * @qc: Metadata associated with taskfile to check
3605 * Allow low-level driver to filter ATA PACKET commands, returning
3606 * a status indicating whether or not it is OK to use DMA for the
3607 * supplied PACKET command.
3610 * spin_lock_irqsave(host lock)
3612 * RETURNS: 0 when ATAPI DMA can be used
3615 int ata_check_atapi_dma(struct ata_queued_cmd *qc)
3617 struct ata_port *ap = qc->ap;
3618 int rc = 0; /* Assume ATAPI DMA is OK by default */
3620 if (ap->ops->check_atapi_dma)
3621 rc = ap->ops->check_atapi_dma(qc);
3626 * ata_qc_prep - Prepare taskfile for submission
3627 * @qc: Metadata associated with taskfile to be prepared
3629 * Prepare ATA taskfile for submission.
3632 * spin_lock_irqsave(host lock)
3634 void ata_qc_prep(struct ata_queued_cmd *qc)
3636 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
3642 void ata_noop_qc_prep(struct ata_queued_cmd *qc) { }
3645 * ata_sg_init_one - Associate command with memory buffer
3646 * @qc: Command to be associated
3647 * @buf: Memory buffer
3648 * @buflen: Length of memory buffer, in bytes.
3650 * Initialize the data-related elements of queued_cmd @qc
3651 * to point to a single memory buffer, @buf of byte length @buflen.
3654 * spin_lock_irqsave(host lock)
3657 void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen)
3659 qc->flags |= ATA_QCFLAG_SINGLE;
3661 qc->__sg = &qc->sgent;
3663 qc->orig_n_elem = 1;
3665 qc->nbytes = buflen;
3667 sg_init_one(&qc->sgent, buf, buflen);
3671 * ata_sg_init - Associate command with scatter-gather table.
3672 * @qc: Command to be associated
3673 * @sg: Scatter-gather table.
3674 * @n_elem: Number of elements in s/g table.
3676 * Initialize the data-related elements of queued_cmd @qc
3677 * to point to a scatter-gather table @sg, containing @n_elem
3681 * spin_lock_irqsave(host lock)
3684 void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
3685 unsigned int n_elem)
3687 qc->flags |= ATA_QCFLAG_SG;
3689 qc->n_elem = n_elem;
3690 qc->orig_n_elem = n_elem;
3694 * ata_sg_setup_one - DMA-map the memory buffer associated with a command.
3695 * @qc: Command with memory buffer to be mapped.
3697 * DMA-map the memory buffer associated with queued_cmd @qc.
3700 * spin_lock_irqsave(host lock)
3703 * Zero on success, negative on error.
3706 static int ata_sg_setup_one(struct ata_queued_cmd *qc)
3708 struct ata_port *ap = qc->ap;
3709 int dir = qc->dma_dir;
3710 struct scatterlist *sg = qc->__sg;
3711 dma_addr_t dma_address;
3714 /* we must lengthen transfers to end on a 32-bit boundary */
3715 qc->pad_len = sg->length & 3;
3717 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3718 struct scatterlist *psg = &qc->pad_sgent;
3720 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
3722 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
3724 if (qc->tf.flags & ATA_TFLAG_WRITE)
3725 memcpy(pad_buf, qc->buf_virt + sg->length - qc->pad_len,
3728 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
3729 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
3731 sg->length -= qc->pad_len;
3732 if (sg->length == 0)
3735 DPRINTK("padding done, sg->length=%u pad_len=%u\n",
3736 sg->length, qc->pad_len);
3744 dma_address = dma_map_single(ap->dev, qc->buf_virt,
3746 if (dma_mapping_error(dma_address)) {
3748 sg->length += qc->pad_len;
3752 sg_dma_address(sg) = dma_address;
3753 sg_dma_len(sg) = sg->length;
3756 DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg),
3757 qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3763 * ata_sg_setup - DMA-map the scatter-gather table associated with a command.
3764 * @qc: Command with scatter-gather table to be mapped.
3766 * DMA-map the scatter-gather table associated with queued_cmd @qc.
3769 * spin_lock_irqsave(host lock)
3772 * Zero on success, negative on error.
3776 static int ata_sg_setup(struct ata_queued_cmd *qc)
3778 struct ata_port *ap = qc->ap;
3779 struct scatterlist *sg = qc->__sg;
3780 struct scatterlist *lsg = &sg[qc->n_elem - 1];
3781 int n_elem, pre_n_elem, dir, trim_sg = 0;
3783 VPRINTK("ENTER, ata%u\n", ap->id);
3784 WARN_ON(!(qc->flags & ATA_QCFLAG_SG));
3786 /* we must lengthen transfers to end on a 32-bit boundary */
3787 qc->pad_len = lsg->length & 3;
3789 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3790 struct scatterlist *psg = &qc->pad_sgent;
3791 unsigned int offset;
3793 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
3795 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
3798 * psg->page/offset are used to copy to-be-written
3799 * data in this function or read data in ata_sg_clean.
3801 offset = lsg->offset + lsg->length - qc->pad_len;
3802 psg->page = nth_page(lsg->page, offset >> PAGE_SHIFT);
3803 psg->offset = offset_in_page(offset);
3805 if (qc->tf.flags & ATA_TFLAG_WRITE) {
3806 void *addr = kmap_atomic(psg->page, KM_IRQ0);
3807 memcpy(pad_buf, addr + psg->offset, qc->pad_len);
3808 kunmap_atomic(addr, KM_IRQ0);
3811 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
3812 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
3814 lsg->length -= qc->pad_len;
3815 if (lsg->length == 0)
3818 DPRINTK("padding done, sg[%d].length=%u pad_len=%u\n",
3819 qc->n_elem - 1, lsg->length, qc->pad_len);
3822 pre_n_elem = qc->n_elem;
3823 if (trim_sg && pre_n_elem)
3832 n_elem = dma_map_sg(ap->dev, sg, pre_n_elem, dir);
3834 /* restore last sg */
3835 lsg->length += qc->pad_len;
3839 DPRINTK("%d sg elements mapped\n", n_elem);
3842 qc->n_elem = n_elem;
3848 * swap_buf_le16 - swap halves of 16-bit words in place
3849 * @buf: Buffer to swap
3850 * @buf_words: Number of 16-bit words in buffer.
3852 * Swap halves of 16-bit words if needed to convert from
3853 * little-endian byte order to native cpu byte order, or
3857 * Inherited from caller.
3859 void swap_buf_le16(u16 *buf, unsigned int buf_words)
3864 for (i = 0; i < buf_words; i++)
3865 buf[i] = le16_to_cpu(buf[i]);
3866 #endif /* __BIG_ENDIAN */
3870 * ata_data_xfer - Transfer data by PIO
3871 * @adev: device to target
3873 * @buflen: buffer length
3874 * @write_data: read/write
3876 * Transfer data from/to the device data register by PIO.
3879 * Inherited from caller.
3881 void ata_data_xfer(struct ata_device *adev, unsigned char *buf,
3882 unsigned int buflen, int write_data)
3884 struct ata_port *ap = adev->ap;
3885 unsigned int words = buflen >> 1;
3887 /* Transfer multiple of 2 bytes */
3889 iowrite16_rep(ap->ioaddr.data_addr, buf, words);
3891 ioread16_rep(ap->ioaddr.data_addr, buf, words);
3893 /* Transfer trailing 1 byte, if any. */
3894 if (unlikely(buflen & 0x01)) {
3895 u16 align_buf[1] = { 0 };
3896 unsigned char *trailing_buf = buf + buflen - 1;
3899 memcpy(align_buf, trailing_buf, 1);
3900 iowrite16(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr);
3902 align_buf[0] = cpu_to_le16(ioread16(ap->ioaddr.data_addr));
3903 memcpy(trailing_buf, align_buf, 1);
3909 * ata_data_xfer_noirq - Transfer data by PIO
3910 * @adev: device to target
3912 * @buflen: buffer length
3913 * @write_data: read/write
3915 * Transfer data from/to the device data register by PIO. Do the
3916 * transfer with interrupts disabled.
3919 * Inherited from caller.
3921 void ata_data_xfer_noirq(struct ata_device *adev, unsigned char *buf,
3922 unsigned int buflen, int write_data)
3924 unsigned long flags;
3925 local_irq_save(flags);
3926 ata_data_xfer(adev, buf, buflen, write_data);
3927 local_irq_restore(flags);
3932 * ata_pio_sector - Transfer ATA_SECT_SIZE (512 bytes) of data.
3933 * @qc: Command on going
3935 * Transfer ATA_SECT_SIZE of data from/to the ATA device.
3938 * Inherited from caller.
3941 static void ata_pio_sector(struct ata_queued_cmd *qc)
3943 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
3944 struct scatterlist *sg = qc->__sg;
3945 struct ata_port *ap = qc->ap;
3947 unsigned int offset;
3950 if (qc->curbytes == qc->nbytes - ATA_SECT_SIZE)
3951 ap->hsm_task_state = HSM_ST_LAST;
3953 page = sg[qc->cursg].page;
3954 offset = sg[qc->cursg].offset + qc->cursg_ofs;
3956 /* get the current page and offset */
3957 page = nth_page(page, (offset >> PAGE_SHIFT));
3958 offset %= PAGE_SIZE;
3960 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3962 if (PageHighMem(page)) {
3963 unsigned long flags;
3965 /* FIXME: use a bounce buffer */
3966 local_irq_save(flags);
3967 buf = kmap_atomic(page, KM_IRQ0);
3969 /* do the actual data transfer */
3970 ap->ops->data_xfer(qc->dev, buf + offset, ATA_SECT_SIZE, do_write);
3972 kunmap_atomic(buf, KM_IRQ0);
3973 local_irq_restore(flags);
3975 buf = page_address(page);
3976 ap->ops->data_xfer(qc->dev, buf + offset, ATA_SECT_SIZE, do_write);
3979 qc->curbytes += ATA_SECT_SIZE;
3980 qc->cursg_ofs += ATA_SECT_SIZE;
3982 if (qc->cursg_ofs == (&sg[qc->cursg])->length) {
3989 * ata_pio_sectors - Transfer one or many 512-byte sectors.
3990 * @qc: Command on going
3992 * Transfer one or many ATA_SECT_SIZE of data from/to the
3993 * ATA device for the DRQ request.
3996 * Inherited from caller.
3999 static void ata_pio_sectors(struct ata_queued_cmd *qc)
4001 if (is_multi_taskfile(&qc->tf)) {
4002 /* READ/WRITE MULTIPLE */
4005 WARN_ON(qc->dev->multi_count == 0);
4007 nsect = min((qc->nbytes - qc->curbytes) / ATA_SECT_SIZE,
4008 qc->dev->multi_count);
4016 * atapi_send_cdb - Write CDB bytes to hardware
4017 * @ap: Port to which ATAPI device is attached.
4018 * @qc: Taskfile currently active
4020 * When device has indicated its readiness to accept
4021 * a CDB, this function is called. Send the CDB.
4027 static void atapi_send_cdb(struct ata_port *ap, struct ata_queued_cmd *qc)
4030 DPRINTK("send cdb\n");
4031 WARN_ON(qc->dev->cdb_len < 12);
4033 ap->ops->data_xfer(qc->dev, qc->cdb, qc->dev->cdb_len, 1);
4034 ata_altstatus(ap); /* flush */
4036 switch (qc->tf.protocol) {
4037 case ATA_PROT_ATAPI:
4038 ap->hsm_task_state = HSM_ST;
4040 case ATA_PROT_ATAPI_NODATA:
4041 ap->hsm_task_state = HSM_ST_LAST;
4043 case ATA_PROT_ATAPI_DMA:
4044 ap->hsm_task_state = HSM_ST_LAST;
4045 /* initiate bmdma */
4046 ap->ops->bmdma_start(qc);
4052 * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
4053 * @qc: Command on going
4054 * @bytes: number of bytes
4056 * Transfer Transfer data from/to the ATAPI device.
4059 * Inherited from caller.
4063 static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
4065 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
4066 struct scatterlist *sg = qc->__sg;
4067 struct ata_port *ap = qc->ap;
4070 unsigned int offset, count;
4072 if (qc->curbytes + bytes >= qc->nbytes)
4073 ap->hsm_task_state = HSM_ST_LAST;
4076 if (unlikely(qc->cursg >= qc->n_elem)) {
4078 * The end of qc->sg is reached and the device expects
4079 * more data to transfer. In order not to overrun qc->sg
4080 * and fulfill length specified in the byte count register,
4081 * - for read case, discard trailing data from the device
4082 * - for write case, padding zero data to the device
4084 u16 pad_buf[1] = { 0 };
4085 unsigned int words = bytes >> 1;
4088 if (words) /* warning if bytes > 1 */
4089 ata_dev_printk(qc->dev, KERN_WARNING,
4090 "%u bytes trailing data\n", bytes);
4092 for (i = 0; i < words; i++)
4093 ap->ops->data_xfer(qc->dev, (unsigned char*)pad_buf, 2, do_write);
4095 ap->hsm_task_state = HSM_ST_LAST;
4099 sg = &qc->__sg[qc->cursg];
4102 offset = sg->offset + qc->cursg_ofs;
4104 /* get the current page and offset */
4105 page = nth_page(page, (offset >> PAGE_SHIFT));
4106 offset %= PAGE_SIZE;
4108 /* don't overrun current sg */
4109 count = min(sg->length - qc->cursg_ofs, bytes);
4111 /* don't cross page boundaries */
4112 count = min(count, (unsigned int)PAGE_SIZE - offset);
4114 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
4116 if (PageHighMem(page)) {
4117 unsigned long flags;
4119 /* FIXME: use bounce buffer */
4120 local_irq_save(flags);
4121 buf = kmap_atomic(page, KM_IRQ0);
4123 /* do the actual data transfer */
4124 ap->ops->data_xfer(qc->dev, buf + offset, count, do_write);
4126 kunmap_atomic(buf, KM_IRQ0);
4127 local_irq_restore(flags);
4129 buf = page_address(page);
4130 ap->ops->data_xfer(qc->dev, buf + offset, count, do_write);
4134 qc->curbytes += count;
4135 qc->cursg_ofs += count;
4137 if (qc->cursg_ofs == sg->length) {
4147 * atapi_pio_bytes - Transfer data from/to the ATAPI device.
4148 * @qc: Command on going
4150 * Transfer Transfer data from/to the ATAPI device.
4153 * Inherited from caller.
4156 static void atapi_pio_bytes(struct ata_queued_cmd *qc)
4158 struct ata_port *ap = qc->ap;
4159 struct ata_device *dev = qc->dev;
4160 unsigned int ireason, bc_lo, bc_hi, bytes;
4161 int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0;
4163 /* Abuse qc->result_tf for temp storage of intermediate TF
4164 * here to save some kernel stack usage.
4165 * For normal completion, qc->result_tf is not relevant. For
4166 * error, qc->result_tf is later overwritten by ata_qc_complete().
4167 * So, the correctness of qc->result_tf is not affected.
4169 ap->ops->tf_read(ap, &qc->result_tf);
4170 ireason = qc->result_tf.nsect;
4171 bc_lo = qc->result_tf.lbam;
4172 bc_hi = qc->result_tf.lbah;
4173 bytes = (bc_hi << 8) | bc_lo;
4175 /* shall be cleared to zero, indicating xfer of data */
4176 if (ireason & (1 << 0))
4179 /* make sure transfer direction matches expected */
4180 i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0;
4181 if (do_write != i_write)
4184 VPRINTK("ata%u: xfering %d bytes\n", ap->id, bytes);
4186 __atapi_pio_bytes(qc, bytes);
4191 ata_dev_printk(dev, KERN_INFO, "ATAPI check failed\n");
4192 qc->err_mask |= AC_ERR_HSM;
4193 ap->hsm_task_state = HSM_ST_ERR;
4197 * ata_hsm_ok_in_wq - Check if the qc can be handled in the workqueue.
4198 * @ap: the target ata_port
4202 * 1 if ok in workqueue, 0 otherwise.
4205 static inline int ata_hsm_ok_in_wq(struct ata_port *ap, struct ata_queued_cmd *qc)
4207 if (qc->tf.flags & ATA_TFLAG_POLLING)
4210 if (ap->hsm_task_state == HSM_ST_FIRST) {
4211 if (qc->tf.protocol == ATA_PROT_PIO &&
4212 (qc->tf.flags & ATA_TFLAG_WRITE))
4215 if (is_atapi_taskfile(&qc->tf) &&
4216 !(qc->dev->flags & ATA_DFLAG_CDB_INTR))
4224 * ata_hsm_qc_complete - finish a qc running on standard HSM
4225 * @qc: Command to complete
4226 * @in_wq: 1 if called from workqueue, 0 otherwise
4228 * Finish @qc which is running on standard HSM.
4231 * If @in_wq is zero, spin_lock_irqsave(host lock).
4232 * Otherwise, none on entry and grabs host lock.
4234 static void ata_hsm_qc_complete(struct ata_queued_cmd *qc, int in_wq)
4236 struct ata_port *ap = qc->ap;
4237 unsigned long flags;
4239 if (ap->ops->error_handler) {
4241 spin_lock_irqsave(ap->lock, flags);
4243 /* EH might have kicked in while host lock is
4246 qc = ata_qc_from_tag(ap, qc->tag);
4248 if (likely(!(qc->err_mask & AC_ERR_HSM))) {
4249 ap->ops->irq_on(ap);
4250 ata_qc_complete(qc);
4252 ata_port_freeze(ap);
4255 spin_unlock_irqrestore(ap->lock, flags);
4257 if (likely(!(qc->err_mask & AC_ERR_HSM)))
4258 ata_qc_complete(qc);
4260 ata_port_freeze(ap);
4264 spin_lock_irqsave(ap->lock, flags);
4265 ap->ops->irq_on(ap);
4266 ata_qc_complete(qc);
4267 spin_unlock_irqrestore(ap->lock, flags);
4269 ata_qc_complete(qc);
4272 ata_altstatus(ap); /* flush */
4276 * ata_hsm_move - move the HSM to the next state.
4277 * @ap: the target ata_port
4279 * @status: current device status
4280 * @in_wq: 1 if called from workqueue, 0 otherwise
4283 * 1 when poll next status needed, 0 otherwise.
4285 int ata_hsm_move(struct ata_port *ap, struct ata_queued_cmd *qc,
4286 u8 status, int in_wq)
4288 unsigned long flags = 0;
4291 WARN_ON((qc->flags & ATA_QCFLAG_ACTIVE) == 0);
4293 /* Make sure ata_qc_issue_prot() does not throw things
4294 * like DMA polling into the workqueue. Notice that
4295 * in_wq is not equivalent to (qc->tf.flags & ATA_TFLAG_POLLING).
4297 WARN_ON(in_wq != ata_hsm_ok_in_wq(ap, qc));
4300 DPRINTK("ata%u: protocol %d task_state %d (dev_stat 0x%X)\n",
4301 ap->id, qc->tf.protocol, ap->hsm_task_state, status);
4303 switch (ap->hsm_task_state) {
4305 /* Send first data block or PACKET CDB */
4307 /* If polling, we will stay in the work queue after
4308 * sending the data. Otherwise, interrupt handler
4309 * takes over after sending the data.
4311 poll_next = (qc->tf.flags & ATA_TFLAG_POLLING);
4313 /* check device status */
4314 if (unlikely((status & ATA_DRQ) == 0)) {
4315 /* handle BSY=0, DRQ=0 as error */
4316 if (likely(status & (ATA_ERR | ATA_DF)))
4317 /* device stops HSM for abort/error */
4318 qc->err_mask |= AC_ERR_DEV;
4320 /* HSM violation. Let EH handle this */
4321 qc->err_mask |= AC_ERR_HSM;
4323 ap->hsm_task_state = HSM_ST_ERR;
4327 /* Device should not ask for data transfer (DRQ=1)
4328 * when it finds something wrong.
4329 * We ignore DRQ here and stop the HSM by
4330 * changing hsm_task_state to HSM_ST_ERR and
4331 * let the EH abort the command or reset the device.
4333 if (unlikely(status & (ATA_ERR | ATA_DF))) {
4334 printk(KERN_WARNING "ata%d: DRQ=1 with device error, dev_stat 0x%X\n",
4336 qc->err_mask |= AC_ERR_HSM;
4337 ap->hsm_task_state = HSM_ST_ERR;
4341 /* Send the CDB (atapi) or the first data block (ata pio out).
4342 * During the state transition, interrupt handler shouldn't
4343 * be invoked before the data transfer is complete and
4344 * hsm_task_state is changed. Hence, the following locking.
4347 spin_lock_irqsave(ap->lock, flags);
4349 if (qc->tf.protocol == ATA_PROT_PIO) {
4350 /* PIO data out protocol.
4351 * send first data block.
4354 /* ata_pio_sectors() might change the state
4355 * to HSM_ST_LAST. so, the state is changed here
4356 * before ata_pio_sectors().
4358 ap->hsm_task_state = HSM_ST;
4359 ata_pio_sectors(qc);
4360 ata_altstatus(ap); /* flush */
4363 atapi_send_cdb(ap, qc);
4366 spin_unlock_irqrestore(ap->lock, flags);
4368 /* if polling, ata_pio_task() handles the rest.
4369 * otherwise, interrupt handler takes over from here.
4374 /* complete command or read/write the data register */
4375 if (qc->tf.protocol == ATA_PROT_ATAPI) {
4376 /* ATAPI PIO protocol */
4377 if ((status & ATA_DRQ) == 0) {
4378 /* No more data to transfer or device error.
4379 * Device error will be tagged in HSM_ST_LAST.
4381 ap->hsm_task_state = HSM_ST_LAST;
4385 /* Device should not ask for data transfer (DRQ=1)
4386 * when it finds something wrong.
4387 * We ignore DRQ here and stop the HSM by
4388 * changing hsm_task_state to HSM_ST_ERR and
4389 * let the EH abort the command or reset the device.
4391 if (unlikely(status & (ATA_ERR | ATA_DF))) {
4392 printk(KERN_WARNING "ata%d: DRQ=1 with device error, dev_stat 0x%X\n",
4394 qc->err_mask |= AC_ERR_HSM;
4395 ap->hsm_task_state = HSM_ST_ERR;
4399 atapi_pio_bytes(qc);
4401 if (unlikely(ap->hsm_task_state == HSM_ST_ERR))
4402 /* bad ireason reported by device */
4406 /* ATA PIO protocol */
4407 if (unlikely((status & ATA_DRQ) == 0)) {
4408 /* handle BSY=0, DRQ=0 as error */
4409 if (likely(status & (ATA_ERR | ATA_DF)))
4410 /* device stops HSM for abort/error */
4411 qc->err_mask |= AC_ERR_DEV;
4413 /* HSM violation. Let EH handle this.
4414 * Phantom devices also trigger this
4415 * condition. Mark hint.
4417 qc->err_mask |= AC_ERR_HSM |
4420 ap->hsm_task_state = HSM_ST_ERR;
4424 /* For PIO reads, some devices may ask for
4425 * data transfer (DRQ=1) alone with ERR=1.
4426 * We respect DRQ here and transfer one
4427 * block of junk data before changing the
4428 * hsm_task_state to HSM_ST_ERR.
4430 * For PIO writes, ERR=1 DRQ=1 doesn't make
4431 * sense since the data block has been
4432 * transferred to the device.
4434 if (unlikely(status & (ATA_ERR | ATA_DF))) {
4435 /* data might be corrputed */
4436 qc->err_mask |= AC_ERR_DEV;
4438 if (!(qc->tf.flags & ATA_TFLAG_WRITE)) {
4439 ata_pio_sectors(qc);
4441 status = ata_wait_idle(ap);
4444 if (status & (ATA_BUSY | ATA_DRQ))
4445 qc->err_mask |= AC_ERR_HSM;
4447 /* ata_pio_sectors() might change the
4448 * state to HSM_ST_LAST. so, the state
4449 * is changed after ata_pio_sectors().
4451 ap->hsm_task_state = HSM_ST_ERR;
4455 ata_pio_sectors(qc);
4457 if (ap->hsm_task_state == HSM_ST_LAST &&
4458 (!(qc->tf.flags & ATA_TFLAG_WRITE))) {
4461 status = ata_wait_idle(ap);
4466 ata_altstatus(ap); /* flush */
4471 if (unlikely(!ata_ok(status))) {
4472 qc->err_mask |= __ac_err_mask(status);
4473 ap->hsm_task_state = HSM_ST_ERR;
4477 /* no more data to transfer */
4478 DPRINTK("ata%u: dev %u command complete, drv_stat 0x%x\n",
4479 ap->id, qc->dev->devno, status);
4481 WARN_ON(qc->err_mask);
4483 ap->hsm_task_state = HSM_ST_IDLE;
4485 /* complete taskfile transaction */
4486 ata_hsm_qc_complete(qc, in_wq);
4492 /* make sure qc->err_mask is available to
4493 * know what's wrong and recover
4495 WARN_ON(qc->err_mask == 0);
4497 ap->hsm_task_state = HSM_ST_IDLE;
4499 /* complete taskfile transaction */
4500 ata_hsm_qc_complete(qc, in_wq);
4512 static void ata_pio_task(struct work_struct *work)
4514 struct ata_port *ap =
4515 container_of(work, struct ata_port, port_task.work);
4516 struct ata_queued_cmd *qc = ap->port_task_data;
4521 WARN_ON(ap->hsm_task_state == HSM_ST_IDLE);
4524 * This is purely heuristic. This is a fast path.
4525 * Sometimes when we enter, BSY will be cleared in
4526 * a chk-status or two. If not, the drive is probably seeking
4527 * or something. Snooze for a couple msecs, then
4528 * chk-status again. If still busy, queue delayed work.
4530 status = ata_busy_wait(ap, ATA_BUSY, 5);
4531 if (status & ATA_BUSY) {
4533 status = ata_busy_wait(ap, ATA_BUSY, 10);
4534 if (status & ATA_BUSY) {
4535 ata_port_queue_task(ap, ata_pio_task, qc, ATA_SHORT_PAUSE);
4541 poll_next = ata_hsm_move(ap, qc, status, 1);
4543 /* another command or interrupt handler
4544 * may be running at this point.
4551 * ata_qc_new - Request an available ATA command, for queueing
4552 * @ap: Port associated with device @dev
4553 * @dev: Device from whom we request an available command structure
4559 static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap)
4561 struct ata_queued_cmd *qc = NULL;
4564 /* no command while frozen */
4565 if (unlikely(ap->pflags & ATA_PFLAG_FROZEN))
4568 /* the last tag is reserved for internal command. */
4569 for (i = 0; i < ATA_MAX_QUEUE - 1; i++)
4570 if (!test_and_set_bit(i, &ap->qc_allocated)) {
4571 qc = __ata_qc_from_tag(ap, i);
4582 * ata_qc_new_init - Request an available ATA command, and initialize it
4583 * @dev: Device from whom we request an available command structure
4589 struct ata_queued_cmd *ata_qc_new_init(struct ata_device *dev)
4591 struct ata_port *ap = dev->ap;
4592 struct ata_queued_cmd *qc;
4594 qc = ata_qc_new(ap);
4607 * ata_qc_free - free unused ata_queued_cmd
4608 * @qc: Command to complete
4610 * Designed to free unused ata_queued_cmd object
4611 * in case something prevents using it.
4614 * spin_lock_irqsave(host lock)
4616 void ata_qc_free(struct ata_queued_cmd *qc)
4618 struct ata_port *ap = qc->ap;
4621 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
4625 if (likely(ata_tag_valid(tag))) {
4626 qc->tag = ATA_TAG_POISON;
4627 clear_bit(tag, &ap->qc_allocated);
4631 void __ata_qc_complete(struct ata_queued_cmd *qc)
4633 struct ata_port *ap = qc->ap;
4635 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
4636 WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE));
4638 if (likely(qc->flags & ATA_QCFLAG_DMAMAP))
4641 /* command should be marked inactive atomically with qc completion */
4642 if (qc->tf.protocol == ATA_PROT_NCQ)
4643 ap->sactive &= ~(1 << qc->tag);
4645 ap->active_tag = ATA_TAG_POISON;
4647 /* atapi: mark qc as inactive to prevent the interrupt handler
4648 * from completing the command twice later, before the error handler
4649 * is called. (when rc != 0 and atapi request sense is needed)
4651 qc->flags &= ~ATA_QCFLAG_ACTIVE;
4652 ap->qc_active &= ~(1 << qc->tag);
4654 /* call completion callback */
4655 qc->complete_fn(qc);
4658 static void fill_result_tf(struct ata_queued_cmd *qc)
4660 struct ata_port *ap = qc->ap;
4662 ap->ops->tf_read(ap, &qc->result_tf);
4663 qc->result_tf.flags = qc->tf.flags;
4667 * ata_qc_complete - Complete an active ATA command
4668 * @qc: Command to complete
4669 * @err_mask: ATA Status register contents
4671 * Indicate to the mid and upper layers that an ATA
4672 * command has completed, with either an ok or not-ok status.
4675 * spin_lock_irqsave(host lock)
4677 void ata_qc_complete(struct ata_queued_cmd *qc)
4679 struct ata_port *ap = qc->ap;
4681 /* XXX: New EH and old EH use different mechanisms to
4682 * synchronize EH with regular execution path.
4684 * In new EH, a failed qc is marked with ATA_QCFLAG_FAILED.
4685 * Normal execution path is responsible for not accessing a
4686 * failed qc. libata core enforces the rule by returning NULL
4687 * from ata_qc_from_tag() for failed qcs.
4689 * Old EH depends on ata_qc_complete() nullifying completion
4690 * requests if ATA_QCFLAG_EH_SCHEDULED is set. Old EH does
4691 * not synchronize with interrupt handler. Only PIO task is
4694 if (ap->ops->error_handler) {
4695 WARN_ON(ap->pflags & ATA_PFLAG_FROZEN);
4697 if (unlikely(qc->err_mask))
4698 qc->flags |= ATA_QCFLAG_FAILED;
4700 if (unlikely(qc->flags & ATA_QCFLAG_FAILED)) {
4701 if (!ata_tag_internal(qc->tag)) {
4702 /* always fill result TF for failed qc */
4704 ata_qc_schedule_eh(qc);
4709 /* read result TF if requested */
4710 if (qc->flags & ATA_QCFLAG_RESULT_TF)
4713 __ata_qc_complete(qc);
4715 if (qc->flags & ATA_QCFLAG_EH_SCHEDULED)
4718 /* read result TF if failed or requested */
4719 if (qc->err_mask || qc->flags & ATA_QCFLAG_RESULT_TF)
4722 __ata_qc_complete(qc);
4727 * ata_qc_complete_multiple - Complete multiple qcs successfully
4728 * @ap: port in question
4729 * @qc_active: new qc_active mask
4730 * @finish_qc: LLDD callback invoked before completing a qc
4732 * Complete in-flight commands. This functions is meant to be
4733 * called from low-level driver's interrupt routine to complete
4734 * requests normally. ap->qc_active and @qc_active is compared
4735 * and commands are completed accordingly.
4738 * spin_lock_irqsave(host lock)
4741 * Number of completed commands on success, -errno otherwise.
4743 int ata_qc_complete_multiple(struct ata_port *ap, u32 qc_active,
4744 void (*finish_qc)(struct ata_queued_cmd *))
4750 done_mask = ap->qc_active ^ qc_active;
4752 if (unlikely(done_mask & qc_active)) {
4753 ata_port_printk(ap, KERN_ERR, "illegal qc_active transition "
4754 "(%08x->%08x)\n", ap->qc_active, qc_active);
4758 for (i = 0; i < ATA_MAX_QUEUE; i++) {
4759 struct ata_queued_cmd *qc;
4761 if (!(done_mask & (1 << i)))
4764 if ((qc = ata_qc_from_tag(ap, i))) {
4767 ata_qc_complete(qc);
4775 static inline int ata_should_dma_map(struct ata_queued_cmd *qc)
4777 struct ata_port *ap = qc->ap;
4779 switch (qc->tf.protocol) {
4782 case ATA_PROT_ATAPI_DMA:
4785 case ATA_PROT_ATAPI:
4787 if (ap->flags & ATA_FLAG_PIO_DMA)
4800 * ata_qc_issue - issue taskfile to device
4801 * @qc: command to issue to device
4803 * Prepare an ATA command to submission to device.
4804 * This includes mapping the data into a DMA-able
4805 * area, filling in the S/G table, and finally
4806 * writing the taskfile to hardware, starting the command.
4809 * spin_lock_irqsave(host lock)
4811 void ata_qc_issue(struct ata_queued_cmd *qc)
4813 struct ata_port *ap = qc->ap;
4815 /* Make sure only one non-NCQ command is outstanding. The
4816 * check is skipped for old EH because it reuses active qc to
4817 * request ATAPI sense.
4819 WARN_ON(ap->ops->error_handler && ata_tag_valid(ap->active_tag));
4821 if (qc->tf.protocol == ATA_PROT_NCQ) {
4822 WARN_ON(ap->sactive & (1 << qc->tag));
4823 ap->sactive |= 1 << qc->tag;
4825 WARN_ON(ap->sactive);
4826 ap->active_tag = qc->tag;
4829 qc->flags |= ATA_QCFLAG_ACTIVE;
4830 ap->qc_active |= 1 << qc->tag;
4832 if (ata_should_dma_map(qc)) {
4833 if (qc->flags & ATA_QCFLAG_SG) {
4834 if (ata_sg_setup(qc))
4836 } else if (qc->flags & ATA_QCFLAG_SINGLE) {
4837 if (ata_sg_setup_one(qc))
4841 qc->flags &= ~ATA_QCFLAG_DMAMAP;
4844 ap->ops->qc_prep(qc);
4846 qc->err_mask |= ap->ops->qc_issue(qc);
4847 if (unlikely(qc->err_mask))
4852 qc->flags &= ~ATA_QCFLAG_DMAMAP;
4853 qc->err_mask |= AC_ERR_SYSTEM;
4855 ata_qc_complete(qc);
4859 * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner
4860 * @qc: command to issue to device
4862 * Using various libata functions and hooks, this function
4863 * starts an ATA command. ATA commands are grouped into
4864 * classes called "protocols", and issuing each type of protocol
4865 * is slightly different.
4867 * May be used as the qc_issue() entry in ata_port_operations.
4870 * spin_lock_irqsave(host lock)
4873 * Zero on success, AC_ERR_* mask on failure
4876 unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc)
4878 struct ata_port *ap = qc->ap;
4880 /* Use polling pio if the LLD doesn't handle
4881 * interrupt driven pio and atapi CDB interrupt.
4883 if (ap->flags & ATA_FLAG_PIO_POLLING) {
4884 switch (qc->tf.protocol) {
4886 case ATA_PROT_NODATA:
4887 case ATA_PROT_ATAPI:
4888 case ATA_PROT_ATAPI_NODATA:
4889 qc->tf.flags |= ATA_TFLAG_POLLING;
4891 case ATA_PROT_ATAPI_DMA:
4892 if (qc->dev->flags & ATA_DFLAG_CDB_INTR)
4893 /* see ata_dma_blacklisted() */
4901 /* Some controllers show flaky interrupt behavior after
4902 * setting xfer mode. Use polling instead.
4904 if (unlikely(qc->tf.command == ATA_CMD_SET_FEATURES &&
4905 qc->tf.feature == SETFEATURES_XFER) &&
4906 (ap->flags & ATA_FLAG_SETXFER_POLLING))
4907 qc->tf.flags |= ATA_TFLAG_POLLING;
4909 /* select the device */
4910 ata_dev_select(ap, qc->dev->devno, 1, 0);
4912 /* start the command */
4913 switch (qc->tf.protocol) {
4914 case ATA_PROT_NODATA:
4915 if (qc->tf.flags & ATA_TFLAG_POLLING)
4916 ata_qc_set_polling(qc);
4918 ata_tf_to_host(ap, &qc->tf);
4919 ap->hsm_task_state = HSM_ST_LAST;
4921 if (qc->tf.flags & ATA_TFLAG_POLLING)
4922 ata_port_queue_task(ap, ata_pio_task, qc, 0);
4927 WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING);
4929 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
4930 ap->ops->bmdma_setup(qc); /* set up bmdma */
4931 ap->ops->bmdma_start(qc); /* initiate bmdma */
4932 ap->hsm_task_state = HSM_ST_LAST;
4936 if (qc->tf.flags & ATA_TFLAG_POLLING)
4937 ata_qc_set_polling(qc);
4939 ata_tf_to_host(ap, &qc->tf);
4941 if (qc->tf.flags & ATA_TFLAG_WRITE) {
4942 /* PIO data out protocol */
4943 ap->hsm_task_state = HSM_ST_FIRST;
4944 ata_port_queue_task(ap, ata_pio_task, qc, 0);
4946 /* always send first data block using
4947 * the ata_pio_task() codepath.
4950 /* PIO data in protocol */
4951 ap->hsm_task_state = HSM_ST;
4953 if (qc->tf.flags & ATA_TFLAG_POLLING)
4954 ata_port_queue_task(ap, ata_pio_task, qc, 0);
4956 /* if polling, ata_pio_task() handles the rest.
4957 * otherwise, interrupt handler takes over from here.
4963 case ATA_PROT_ATAPI:
4964 case ATA_PROT_ATAPI_NODATA:
4965 if (qc->tf.flags & ATA_TFLAG_POLLING)
4966 ata_qc_set_polling(qc);
4968 ata_tf_to_host(ap, &qc->tf);
4970 ap->hsm_task_state = HSM_ST_FIRST;
4972 /* send cdb by polling if no cdb interrupt */
4973 if ((!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) ||
4974 (qc->tf.flags & ATA_TFLAG_POLLING))
4975 ata_port_queue_task(ap, ata_pio_task, qc, 0);
4978 case ATA_PROT_ATAPI_DMA:
4979 WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING);
4981 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
4982 ap->ops->bmdma_setup(qc); /* set up bmdma */
4983 ap->hsm_task_state = HSM_ST_FIRST;
4985 /* send cdb by polling if no cdb interrupt */
4986 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
4987 ata_port_queue_task(ap, ata_pio_task, qc, 0);
4992 return AC_ERR_SYSTEM;
4999 * ata_host_intr - Handle host interrupt for given (port, task)
5000 * @ap: Port on which interrupt arrived (possibly...)
5001 * @qc: Taskfile currently active in engine
5003 * Handle host interrupt for given queued command. Currently,
5004 * only DMA interrupts are handled. All other commands are
5005 * handled via polling with interrupts disabled (nIEN bit).
5008 * spin_lock_irqsave(host lock)
5011 * One if interrupt was handled, zero if not (shared irq).
5014 inline unsigned int ata_host_intr (struct ata_port *ap,
5015 struct ata_queued_cmd *qc)
5017 struct ata_eh_info *ehi = &ap->eh_info;
5018 u8 status, host_stat = 0;
5020 VPRINTK("ata%u: protocol %d task_state %d\n",
5021 ap->id, qc->tf.protocol, ap->hsm_task_state);
5023 /* Check whether we are expecting interrupt in this state */
5024 switch (ap->hsm_task_state) {
5026 /* Some pre-ATAPI-4 devices assert INTRQ
5027 * at this state when ready to receive CDB.
5030 /* Check the ATA_DFLAG_CDB_INTR flag is enough here.
5031 * The flag was turned on only for atapi devices.
5032 * No need to check is_atapi_taskfile(&qc->tf) again.
5034 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
5038 if (qc->tf.protocol == ATA_PROT_DMA ||
5039 qc->tf.protocol == ATA_PROT_ATAPI_DMA) {
5040 /* check status of DMA engine */
5041 host_stat = ap->ops->bmdma_status(ap);
5042 VPRINTK("ata%u: host_stat 0x%X\n", ap->id, host_stat);
5044 /* if it's not our irq... */
5045 if (!(host_stat & ATA_DMA_INTR))
5048 /* before we do anything else, clear DMA-Start bit */
5049 ap->ops->bmdma_stop(qc);
5051 if (unlikely(host_stat & ATA_DMA_ERR)) {
5052 /* error when transfering data to/from memory */
5053 qc->err_mask |= AC_ERR_HOST_BUS;
5054 ap->hsm_task_state = HSM_ST_ERR;
5064 /* check altstatus */
5065 status = ata_altstatus(ap);
5066 if (status & ATA_BUSY)
5069 /* check main status, clearing INTRQ */
5070 status = ata_chk_status(ap);
5071 if (unlikely(status & ATA_BUSY))
5074 /* ack bmdma irq events */
5075 ap->ops->irq_clear(ap);
5077 ata_hsm_move(ap, qc, status, 0);
5079 if (unlikely(qc->err_mask) && (qc->tf.protocol == ATA_PROT_DMA ||
5080 qc->tf.protocol == ATA_PROT_ATAPI_DMA))
5081 ata_ehi_push_desc(ehi, "BMDMA stat 0x%x", host_stat);
5083 return 1; /* irq handled */
5086 ap->stats.idle_irq++;
5089 if ((ap->stats.idle_irq % 1000) == 0) {
5090 ap->ops->irq_ack(ap, 0); /* debug trap */
5091 ata_port_printk(ap, KERN_WARNING, "irq trap\n");
5095 return 0; /* irq not handled */
5099 * ata_interrupt - Default ATA host interrupt handler
5100 * @irq: irq line (unused)
5101 * @dev_instance: pointer to our ata_host information structure
5103 * Default interrupt handler for PCI IDE devices. Calls
5104 * ata_host_intr() for each port that is not disabled.
5107 * Obtains host lock during operation.
5110 * IRQ_NONE or IRQ_HANDLED.
5113 irqreturn_t ata_interrupt (int irq, void *dev_instance)
5115 struct ata_host *host = dev_instance;
5117 unsigned int handled = 0;
5118 unsigned long flags;
5120 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
5121 spin_lock_irqsave(&host->lock, flags);
5123 for (i = 0; i < host->n_ports; i++) {
5124 struct ata_port *ap;
5126 ap = host->ports[i];
5128 !(ap->flags & ATA_FLAG_DISABLED)) {
5129 struct ata_queued_cmd *qc;
5131 qc = ata_qc_from_tag(ap, ap->active_tag);
5132 if (qc && (!(qc->tf.flags & ATA_TFLAG_POLLING)) &&
5133 (qc->flags & ATA_QCFLAG_ACTIVE))
5134 handled |= ata_host_intr(ap, qc);
5138 spin_unlock_irqrestore(&host->lock, flags);
5140 return IRQ_RETVAL(handled);
5144 * sata_scr_valid - test whether SCRs are accessible
5145 * @ap: ATA port to test SCR accessibility for
5147 * Test whether SCRs are accessible for @ap.
5153 * 1 if SCRs are accessible, 0 otherwise.
5155 int sata_scr_valid(struct ata_port *ap)
5157 return ap->cbl == ATA_CBL_SATA && ap->ops->scr_read;
5161 * sata_scr_read - read SCR register of the specified port
5162 * @ap: ATA port to read SCR for
5164 * @val: Place to store read value
5166 * Read SCR register @reg of @ap into *@val. This function is
5167 * guaranteed to succeed if the cable type of the port is SATA
5168 * and the port implements ->scr_read.
5174 * 0 on success, negative errno on failure.
5176 int sata_scr_read(struct ata_port *ap, int reg, u32 *val)
5178 if (sata_scr_valid(ap)) {
5179 *val = ap->ops->scr_read(ap, reg);
5186 * sata_scr_write - write SCR register of the specified port
5187 * @ap: ATA port to write SCR for
5188 * @reg: SCR to write
5189 * @val: value to write
5191 * Write @val to SCR register @reg of @ap. This function is
5192 * guaranteed to succeed if the cable type of the port is SATA
5193 * and the port implements ->scr_read.
5199 * 0 on success, negative errno on failure.
5201 int sata_scr_write(struct ata_port *ap, int reg, u32 val)
5203 if (sata_scr_valid(ap)) {
5204 ap->ops->scr_write(ap, reg, val);
5211 * sata_scr_write_flush - write SCR register of the specified port and flush
5212 * @ap: ATA port to write SCR for
5213 * @reg: SCR to write
5214 * @val: value to write
5216 * This function is identical to sata_scr_write() except that this
5217 * function performs flush after writing to the register.
5223 * 0 on success, negative errno on failure.
5225 int sata_scr_write_flush(struct ata_port *ap, int reg, u32 val)
5227 if (sata_scr_valid(ap)) {
5228 ap->ops->scr_write(ap, reg, val);
5229 ap->ops->scr_read(ap, reg);
5236 * ata_port_online - test whether the given port is online
5237 * @ap: ATA port to test
5239 * Test whether @ap is online. Note that this function returns 0
5240 * if online status of @ap cannot be obtained, so
5241 * ata_port_online(ap) != !ata_port_offline(ap).
5247 * 1 if the port online status is available and online.
5249 int ata_port_online(struct ata_port *ap)
5253 if (!sata_scr_read(ap, SCR_STATUS, &sstatus) && (sstatus & 0xf) == 0x3)
5259 * ata_port_offline - test whether the given port is offline
5260 * @ap: ATA port to test
5262 * Test whether @ap is offline. Note that this function returns
5263 * 0 if offline status of @ap cannot be obtained, so
5264 * ata_port_online(ap) != !ata_port_offline(ap).
5270 * 1 if the port offline status is available and offline.
5272 int ata_port_offline(struct ata_port *ap)
5276 if (!sata_scr_read(ap, SCR_STATUS, &sstatus) && (sstatus & 0xf) != 0x3)
5281 int ata_flush_cache(struct ata_device *dev)
5283 unsigned int err_mask;
5286 if (!ata_try_flush_cache(dev))
5289 if (dev->flags & ATA_DFLAG_FLUSH_EXT)
5290 cmd = ATA_CMD_FLUSH_EXT;
5292 cmd = ATA_CMD_FLUSH;
5294 err_mask = ata_do_simple_cmd(dev, cmd);
5296 ata_dev_printk(dev, KERN_ERR, "failed to flush cache\n");
5303 static int ata_host_request_pm(struct ata_host *host, pm_message_t mesg,
5304 unsigned int action, unsigned int ehi_flags,
5307 unsigned long flags;
5310 for (i = 0; i < host->n_ports; i++) {
5311 struct ata_port *ap = host->ports[i];
5313 /* Previous resume operation might still be in
5314 * progress. Wait for PM_PENDING to clear.
5316 if (ap->pflags & ATA_PFLAG_PM_PENDING) {
5317 ata_port_wait_eh(ap);
5318 WARN_ON(ap->pflags & ATA_PFLAG_PM_PENDING);
5321 /* request PM ops to EH */
5322 spin_lock_irqsave(ap->lock, flags);
5327 ap->pm_result = &rc;
5330 ap->pflags |= ATA_PFLAG_PM_PENDING;
5331 ap->eh_info.action |= action;
5332 ap->eh_info.flags |= ehi_flags;
5334 ata_port_schedule_eh(ap);
5336 spin_unlock_irqrestore(ap->lock, flags);
5338 /* wait and check result */
5340 ata_port_wait_eh(ap);
5341 WARN_ON(ap->pflags & ATA_PFLAG_PM_PENDING);
5351 * ata_host_suspend - suspend host
5352 * @host: host to suspend
5355 * Suspend @host. Actual operation is performed by EH. This
5356 * function requests EH to perform PM operations and waits for EH
5360 * Kernel thread context (may sleep).
5363 * 0 on success, -errno on failure.
5365 int ata_host_suspend(struct ata_host *host, pm_message_t mesg)
5369 rc = ata_host_request_pm(host, mesg, 0, ATA_EHI_QUIET, 1);
5373 /* EH is quiescent now. Fail if we have any ready device.
5374 * This happens if hotplug occurs between completion of device
5375 * suspension and here.
5377 for (i = 0; i < host->n_ports; i++) {
5378 struct ata_port *ap = host->ports[i];
5380 for (j = 0; j < ATA_MAX_DEVICES; j++) {
5381 struct ata_device *dev = &ap->device[j];
5383 if (ata_dev_ready(dev)) {
5384 ata_port_printk(ap, KERN_WARNING,
5385 "suspend failed, device %d "
5386 "still active\n", dev->devno);
5393 host->dev->power.power_state = mesg;
5397 ata_host_resume(host);
5402 * ata_host_resume - resume host
5403 * @host: host to resume
5405 * Resume @host. Actual operation is performed by EH. This
5406 * function requests EH to perform PM operations and returns.
5407 * Note that all resume operations are performed parallely.
5410 * Kernel thread context (may sleep).
5412 void ata_host_resume(struct ata_host *host)
5414 ata_host_request_pm(host, PMSG_ON, ATA_EH_SOFTRESET,
5415 ATA_EHI_NO_AUTOPSY | ATA_EHI_QUIET, 0);
5416 host->dev->power.power_state = PMSG_ON;
5420 * ata_port_start - Set port up for dma.
5421 * @ap: Port to initialize
5423 * Called just after data structures for each port are
5424 * initialized. Allocates space for PRD table.
5426 * May be used as the port_start() entry in ata_port_operations.
5429 * Inherited from caller.
5431 int ata_port_start(struct ata_port *ap)
5433 struct device *dev = ap->dev;
5436 ap->prd = dmam_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma,
5441 rc = ata_pad_alloc(ap, dev);
5445 DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd,
5446 (unsigned long long)ap->prd_dma);
5451 * ata_dev_init - Initialize an ata_device structure
5452 * @dev: Device structure to initialize
5454 * Initialize @dev in preparation for probing.
5457 * Inherited from caller.
5459 void ata_dev_init(struct ata_device *dev)
5461 struct ata_port *ap = dev->ap;
5462 unsigned long flags;
5464 /* SATA spd limit is bound to the first device */
5465 ap->sata_spd_limit = ap->hw_sata_spd_limit;
5467 /* High bits of dev->flags are used to record warm plug
5468 * requests which occur asynchronously. Synchronize using
5471 spin_lock_irqsave(ap->lock, flags);
5472 dev->flags &= ~ATA_DFLAG_INIT_MASK;
5473 spin_unlock_irqrestore(ap->lock, flags);
5475 memset((void *)dev + ATA_DEVICE_CLEAR_OFFSET, 0,
5476 sizeof(*dev) - ATA_DEVICE_CLEAR_OFFSET);
5477 dev->pio_mask = UINT_MAX;
5478 dev->mwdma_mask = UINT_MAX;
5479 dev->udma_mask = UINT_MAX;
5483 * ata_port_init - Initialize an ata_port structure
5484 * @ap: Structure to initialize
5485 * @host: Collection of hosts to which @ap belongs
5486 * @ent: Probe information provided by low-level driver
5487 * @port_no: Port number associated with this ata_port
5489 * Initialize a new ata_port structure.
5492 * Inherited from caller.
5494 void ata_port_init(struct ata_port *ap, struct ata_host *host,
5495 const struct ata_probe_ent *ent, unsigned int port_no)
5499 ap->lock = &host->lock;
5500 ap->flags = ATA_FLAG_DISABLED;
5501 ap->id = ata_unique_id++;
5502 ap->ctl = ATA_DEVCTL_OBS;
5505 ap->port_no = port_no;
5506 if (port_no == 1 && ent->pinfo2) {
5507 ap->pio_mask = ent->pinfo2->pio_mask;
5508 ap->mwdma_mask = ent->pinfo2->mwdma_mask;
5509 ap->udma_mask = ent->pinfo2->udma_mask;
5510 ap->flags |= ent->pinfo2->flags;
5511 ap->ops = ent->pinfo2->port_ops;
5513 ap->pio_mask = ent->pio_mask;
5514 ap->mwdma_mask = ent->mwdma_mask;
5515 ap->udma_mask = ent->udma_mask;
5516 ap->flags |= ent->port_flags;
5517 ap->ops = ent->port_ops;
5519 ap->hw_sata_spd_limit = UINT_MAX;
5520 ap->active_tag = ATA_TAG_POISON;
5521 ap->last_ctl = 0xFF;
5523 #if defined(ATA_VERBOSE_DEBUG)
5524 /* turn on all debugging levels */
5525 ap->msg_enable = 0x00FF;
5526 #elif defined(ATA_DEBUG)
5527 ap->msg_enable = ATA_MSG_DRV | ATA_MSG_INFO | ATA_MSG_CTL | ATA_MSG_WARN | ATA_MSG_ERR;
5529 ap->msg_enable = ATA_MSG_DRV | ATA_MSG_ERR | ATA_MSG_WARN;
5532 INIT_DELAYED_WORK(&ap->port_task, NULL);
5533 INIT_DELAYED_WORK(&ap->hotplug_task, ata_scsi_hotplug);
5534 INIT_WORK(&ap->scsi_rescan_task, ata_scsi_dev_rescan);
5535 INIT_LIST_HEAD(&ap->eh_done_q);
5536 init_waitqueue_head(&ap->eh_wait_q);
5538 /* set cable type */
5539 ap->cbl = ATA_CBL_NONE;
5540 if (ap->flags & ATA_FLAG_SATA)
5541 ap->cbl = ATA_CBL_SATA;
5543 for (i = 0; i < ATA_MAX_DEVICES; i++) {
5544 struct ata_device *dev = &ap->device[i];
5551 ap->stats.unhandled_irq = 1;
5552 ap->stats.idle_irq = 1;
5555 memcpy(&ap->ioaddr, &ent->port[port_no], sizeof(struct ata_ioports));
5559 * ata_port_init_shost - Initialize SCSI host associated with ATA port
5560 * @ap: ATA port to initialize SCSI host for
5561 * @shost: SCSI host associated with @ap
5563 * Initialize SCSI host @shost associated with ATA port @ap.
5566 * Inherited from caller.
5568 static void ata_port_init_shost(struct ata_port *ap, struct Scsi_Host *shost)
5570 ap->scsi_host = shost;
5572 shost->unique_id = ap->id;
5575 shost->max_channel = 1;
5576 shost->max_cmd_len = 12;
5580 * ata_port_add - Attach low-level ATA driver to system
5581 * @ent: Information provided by low-level driver
5582 * @host: Collections of ports to which we add
5583 * @port_no: Port number associated with this host
5585 * Attach low-level ATA driver to system.
5588 * PCI/etc. bus probe sem.
5591 * New ata_port on success, for NULL on error.
5593 static struct ata_port * ata_port_add(const struct ata_probe_ent *ent,
5594 struct ata_host *host,
5595 unsigned int port_no)
5597 struct Scsi_Host *shost;
5598 struct ata_port *ap;
5602 if (!ent->port_ops->error_handler &&
5603 !(ent->port_flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST))) {
5604 printk(KERN_ERR "ata%u: no reset mechanism available\n",
5609 shost = scsi_host_alloc(ent->sht, sizeof(struct ata_port));
5613 shost->transportt = &ata_scsi_transport_template;
5615 ap = ata_shost_to_port(shost);
5617 ata_port_init(ap, host, ent, port_no);
5618 ata_port_init_shost(ap, shost);
5623 static void ata_host_release(struct device *gendev, void *res)
5625 struct ata_host *host = dev_get_drvdata(gendev);
5628 for (i = 0; i < host->n_ports; i++) {
5629 struct ata_port *ap = host->ports[i];
5634 if (ap->ops->port_stop)
5635 ap->ops->port_stop(ap);
5637 scsi_host_put(ap->scsi_host);
5640 if (host->ops->host_stop)
5641 host->ops->host_stop(host);
5645 * ata_sas_host_init - Initialize a host struct
5646 * @host: host to initialize
5647 * @dev: device host is attached to
5648 * @flags: host flags
5652 * PCI/etc. bus probe sem.
5656 void ata_host_init(struct ata_host *host, struct device *dev,
5657 unsigned long flags, const struct ata_port_operations *ops)
5659 spin_lock_init(&host->lock);
5661 host->flags = flags;
5666 * ata_device_add - Register hardware device with ATA and SCSI layers
5667 * @ent: Probe information describing hardware device to be registered
5669 * This function processes the information provided in the probe
5670 * information struct @ent, allocates the necessary ATA and SCSI
5671 * host information structures, initializes them, and registers
5672 * everything with requisite kernel subsystems.
5674 * This function requests irqs, probes the ATA bus, and probes
5678 * PCI/etc. bus probe sem.
5681 * Number of ports registered. Zero on error (no ports registered).
5683 int ata_device_add(const struct ata_probe_ent *ent)
5686 struct device *dev = ent->dev;
5687 struct ata_host *host;
5692 if (ent->irq == 0) {
5693 dev_printk(KERN_ERR, dev, "is not available: No interrupt assigned.\n");
5697 if (!devres_open_group(dev, ata_device_add, GFP_KERNEL))
5700 /* alloc a container for our list of ATA ports (buses) */
5701 host = devres_alloc(ata_host_release, sizeof(struct ata_host) +
5702 (ent->n_ports * sizeof(void *)), GFP_KERNEL);
5705 devres_add(dev, host);
5706 dev_set_drvdata(dev, host);
5708 ata_host_init(host, dev, ent->_host_flags, ent->port_ops);
5709 host->n_ports = ent->n_ports;
5710 host->irq = ent->irq;
5711 host->irq2 = ent->irq2;
5712 host->iomap = ent->iomap;
5713 host->private_data = ent->private_data;
5715 /* register each port bound to this device */
5716 for (i = 0; i < host->n_ports; i++) {
5717 struct ata_port *ap;
5718 unsigned long xfer_mode_mask;
5719 int irq_line = ent->irq;
5721 ap = ata_port_add(ent, host, i);
5722 host->ports[i] = ap;
5727 if (ent->dummy_port_mask & (1 << i)) {
5728 ata_port_printk(ap, KERN_INFO, "DUMMY\n");
5729 ap->ops = &ata_dummy_port_ops;
5734 rc = ap->ops->port_start(ap);
5736 host->ports[i] = NULL;
5737 scsi_host_put(ap->scsi_host);
5741 /* Report the secondary IRQ for second channel legacy */
5742 if (i == 1 && ent->irq2)
5743 irq_line = ent->irq2;
5745 xfer_mode_mask =(ap->udma_mask << ATA_SHIFT_UDMA) |
5746 (ap->mwdma_mask << ATA_SHIFT_MWDMA) |
5747 (ap->pio_mask << ATA_SHIFT_PIO);
5749 /* print per-port info to dmesg */
5750 ata_port_printk(ap, KERN_INFO, "%cATA max %s cmd 0x%p "
5751 "ctl 0x%p bmdma 0x%p irq %d\n",
5752 ap->flags & ATA_FLAG_SATA ? 'S' : 'P',
5753 ata_mode_string(xfer_mode_mask),
5754 ap->ioaddr.cmd_addr,
5755 ap->ioaddr.ctl_addr,
5756 ap->ioaddr.bmdma_addr,
5759 /* freeze port before requesting IRQ */
5760 ata_eh_freeze_port(ap);
5763 /* obtain irq, that may be shared between channels */
5764 rc = devm_request_irq(dev, ent->irq, ent->port_ops->irq_handler,
5765 ent->irq_flags, DRV_NAME, host);
5767 dev_printk(KERN_ERR, dev, "irq %lu request failed: %d\n",
5772 /* do we have a second IRQ for the other channel, eg legacy mode */
5774 /* We will get weird core code crashes later if this is true
5776 BUG_ON(ent->irq == ent->irq2);
5778 rc = devm_request_irq(dev, ent->irq2,
5779 ent->port_ops->irq_handler, ent->irq_flags,
5782 dev_printk(KERN_ERR, dev, "irq %lu request failed: %d\n",
5788 /* resource acquisition complete */
5789 devres_remove_group(dev, ata_device_add);
5791 /* perform each probe synchronously */
5792 DPRINTK("probe begin\n");
5793 for (i = 0; i < host->n_ports; i++) {
5794 struct ata_port *ap = host->ports[i];
5798 /* init sata_spd_limit to the current value */
5799 if (sata_scr_read(ap, SCR_CONTROL, &scontrol) == 0) {
5800 int spd = (scontrol >> 4) & 0xf;
5801 ap->hw_sata_spd_limit &= (1 << spd) - 1;
5803 ap->sata_spd_limit = ap->hw_sata_spd_limit;
5805 rc = scsi_add_host(ap->scsi_host, dev);
5807 ata_port_printk(ap, KERN_ERR, "scsi_add_host failed\n");
5808 /* FIXME: do something useful here */
5809 /* FIXME: handle unconditional calls to
5810 * scsi_scan_host and ata_host_remove, below,
5815 if (ap->ops->error_handler) {
5816 struct ata_eh_info *ehi = &ap->eh_info;
5817 unsigned long flags;
5821 /* kick EH for boot probing */
5822 spin_lock_irqsave(ap->lock, flags);
5824 ehi->probe_mask = (1 << ATA_MAX_DEVICES) - 1;
5825 ehi->action |= ATA_EH_SOFTRESET;
5826 ehi->flags |= ATA_EHI_NO_AUTOPSY | ATA_EHI_QUIET;
5828 ap->pflags |= ATA_PFLAG_LOADING;
5829 ata_port_schedule_eh(ap);
5831 spin_unlock_irqrestore(ap->lock, flags);
5833 /* wait for EH to finish */
5834 ata_port_wait_eh(ap);
5836 DPRINTK("ata%u: bus probe begin\n", ap->id);
5837 rc = ata_bus_probe(ap);
5838 DPRINTK("ata%u: bus probe end\n", ap->id);
5841 /* FIXME: do something useful here?
5842 * Current libata behavior will
5843 * tear down everything when
5844 * the module is removed
5845 * or the h/w is unplugged.
5851 /* probes are done, now scan each port's disk(s) */
5852 DPRINTK("host probe begin\n");
5853 for (i = 0; i < host->n_ports; i++) {
5854 struct ata_port *ap = host->ports[i];
5856 ata_scsi_scan_host(ap);
5859 VPRINTK("EXIT, returning %u\n", ent->n_ports);
5860 return ent->n_ports; /* success */
5863 devres_release_group(dev, ata_device_add);
5864 dev_set_drvdata(dev, NULL);
5865 VPRINTK("EXIT, returning %d\n", rc);
5870 * ata_port_detach - Detach ATA port in prepration of device removal
5871 * @ap: ATA port to be detached
5873 * Detach all ATA devices and the associated SCSI devices of @ap;
5874 * then, remove the associated SCSI host. @ap is guaranteed to
5875 * be quiescent on return from this function.
5878 * Kernel thread context (may sleep).
5880 void ata_port_detach(struct ata_port *ap)
5882 unsigned long flags;
5885 if (!ap->ops->error_handler)
5888 /* tell EH we're leaving & flush EH */
5889 spin_lock_irqsave(ap->lock, flags);
5890 ap->pflags |= ATA_PFLAG_UNLOADING;
5891 spin_unlock_irqrestore(ap->lock, flags);
5893 ata_port_wait_eh(ap);
5895 /* EH is now guaranteed to see UNLOADING, so no new device
5896 * will be attached. Disable all existing devices.
5898 spin_lock_irqsave(ap->lock, flags);
5900 for (i = 0; i < ATA_MAX_DEVICES; i++)
5901 ata_dev_disable(&ap->device[i]);
5903 spin_unlock_irqrestore(ap->lock, flags);
5905 /* Final freeze & EH. All in-flight commands are aborted. EH
5906 * will be skipped and retrials will be terminated with bad
5909 spin_lock_irqsave(ap->lock, flags);
5910 ata_port_freeze(ap); /* won't be thawed */
5911 spin_unlock_irqrestore(ap->lock, flags);
5913 ata_port_wait_eh(ap);
5915 /* Flush hotplug task. The sequence is similar to
5916 * ata_port_flush_task().
5918 flush_workqueue(ata_aux_wq);
5919 cancel_delayed_work(&ap->hotplug_task);
5920 flush_workqueue(ata_aux_wq);
5923 /* remove the associated SCSI host */
5924 scsi_remove_host(ap->scsi_host);
5928 * ata_host_detach - Detach all ports of an ATA host
5929 * @host: Host to detach
5931 * Detach all ports of @host.
5934 * Kernel thread context (may sleep).
5936 void ata_host_detach(struct ata_host *host)
5940 for (i = 0; i < host->n_ports; i++)
5941 ata_port_detach(host->ports[i]);
5944 struct ata_probe_ent *
5945 ata_probe_ent_alloc(struct device *dev, const struct ata_port_info *port)
5947 struct ata_probe_ent *probe_ent;
5949 probe_ent = devm_kzalloc(dev, sizeof(*probe_ent), GFP_KERNEL);
5951 printk(KERN_ERR DRV_NAME "(%s): out of memory\n",
5952 kobject_name(&(dev->kobj)));
5956 INIT_LIST_HEAD(&probe_ent->node);
5957 probe_ent->dev = dev;
5959 probe_ent->sht = port->sht;
5960 probe_ent->port_flags = port->flags;
5961 probe_ent->pio_mask = port->pio_mask;
5962 probe_ent->mwdma_mask = port->mwdma_mask;
5963 probe_ent->udma_mask = port->udma_mask;
5964 probe_ent->port_ops = port->port_ops;
5965 probe_ent->private_data = port->private_data;
5971 * ata_std_ports - initialize ioaddr with standard port offsets.
5972 * @ioaddr: IO address structure to be initialized
5974 * Utility function which initializes data_addr, error_addr,
5975 * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
5976 * device_addr, status_addr, and command_addr to standard offsets
5977 * relative to cmd_addr.
5979 * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
5982 void ata_std_ports(struct ata_ioports *ioaddr)
5984 ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA;
5985 ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR;
5986 ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE;
5987 ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT;
5988 ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL;
5989 ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM;
5990 ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH;
5991 ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE;
5992 ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS;
5993 ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD;
6000 * ata_pci_remove_one - PCI layer callback for device removal
6001 * @pdev: PCI device that was removed
6003 * PCI layer indicates to libata via this hook that hot-unplug or
6004 * module unload event has occurred. Detach all ports. Resource
6005 * release is handled via devres.
6008 * Inherited from PCI layer (may sleep).
6010 void ata_pci_remove_one(struct pci_dev *pdev)
6012 struct device *dev = pci_dev_to_dev(pdev);
6013 struct ata_host *host = dev_get_drvdata(dev);
6015 ata_host_detach(host);
6018 /* move to PCI subsystem */
6019 int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits)
6021 unsigned long tmp = 0;
6023 switch (bits->width) {
6026 pci_read_config_byte(pdev, bits->reg, &tmp8);
6032 pci_read_config_word(pdev, bits->reg, &tmp16);
6038 pci_read_config_dword(pdev, bits->reg, &tmp32);
6049 return (tmp == bits->val) ? 1 : 0;
6052 void ata_pci_device_do_suspend(struct pci_dev *pdev, pm_message_t mesg)
6054 pci_save_state(pdev);
6055 pci_disable_device(pdev);
6057 if (mesg.event == PM_EVENT_SUSPEND)
6058 pci_set_power_state(pdev, PCI_D3hot);
6061 int ata_pci_device_do_resume(struct pci_dev *pdev)
6065 pci_set_power_state(pdev, PCI_D0);
6066 pci_restore_state(pdev);
6068 rc = pcim_enable_device(pdev);
6070 dev_printk(KERN_ERR, &pdev->dev,
6071 "failed to enable device after resume (%d)\n", rc);
6075 pci_set_master(pdev);
6079 int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg)
6081 struct ata_host *host = dev_get_drvdata(&pdev->dev);
6084 rc = ata_host_suspend(host, mesg);
6088 ata_pci_device_do_suspend(pdev, mesg);
6093 int ata_pci_device_resume(struct pci_dev *pdev)
6095 struct ata_host *host = dev_get_drvdata(&pdev->dev);
6098 rc = ata_pci_device_do_resume(pdev);
6100 ata_host_resume(host);
6103 #endif /* CONFIG_PCI */
6106 static int __init ata_init(void)
6108 ata_probe_timeout *= HZ;
6109 ata_wq = create_workqueue("ata");
6113 ata_aux_wq = create_singlethread_workqueue("ata_aux");
6115 destroy_workqueue(ata_wq);
6119 printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n");
6123 static void __exit ata_exit(void)
6125 destroy_workqueue(ata_wq);
6126 destroy_workqueue(ata_aux_wq);
6129 subsys_initcall(ata_init);
6130 module_exit(ata_exit);
6132 static unsigned long ratelimit_time;
6133 static DEFINE_SPINLOCK(ata_ratelimit_lock);
6135 int ata_ratelimit(void)
6138 unsigned long flags;
6140 spin_lock_irqsave(&ata_ratelimit_lock, flags);
6142 if (time_after(jiffies, ratelimit_time)) {
6144 ratelimit_time = jiffies + (HZ/5);
6148 spin_unlock_irqrestore(&ata_ratelimit_lock, flags);
6154 * ata_wait_register - wait until register value changes
6155 * @reg: IO-mapped register
6156 * @mask: Mask to apply to read register value
6157 * @val: Wait condition
6158 * @interval_msec: polling interval in milliseconds
6159 * @timeout_msec: timeout in milliseconds
6161 * Waiting for some bits of register to change is a common
6162 * operation for ATA controllers. This function reads 32bit LE
6163 * IO-mapped register @reg and tests for the following condition.
6165 * (*@reg & mask) != val
6167 * If the condition is met, it returns; otherwise, the process is
6168 * repeated after @interval_msec until timeout.
6171 * Kernel thread context (may sleep)
6174 * The final register value.
6176 u32 ata_wait_register(void __iomem *reg, u32 mask, u32 val,
6177 unsigned long interval_msec,
6178 unsigned long timeout_msec)
6180 unsigned long timeout;
6183 tmp = ioread32(reg);
6185 /* Calculate timeout _after_ the first read to make sure
6186 * preceding writes reach the controller before starting to
6187 * eat away the timeout.
6189 timeout = jiffies + (timeout_msec * HZ) / 1000;
6191 while ((tmp & mask) == val && time_before(jiffies, timeout)) {
6192 msleep(interval_msec);
6193 tmp = ioread32(reg);
6202 static void ata_dummy_noret(struct ata_port *ap) { }
6203 static int ata_dummy_ret0(struct ata_port *ap) { return 0; }
6204 static void ata_dummy_qc_noret(struct ata_queued_cmd *qc) { }
6206 static u8 ata_dummy_check_status(struct ata_port *ap)
6211 static unsigned int ata_dummy_qc_issue(struct ata_queued_cmd *qc)
6213 return AC_ERR_SYSTEM;
6216 const struct ata_port_operations ata_dummy_port_ops = {
6217 .port_disable = ata_port_disable,
6218 .check_status = ata_dummy_check_status,
6219 .check_altstatus = ata_dummy_check_status,
6220 .dev_select = ata_noop_dev_select,
6221 .qc_prep = ata_noop_qc_prep,
6222 .qc_issue = ata_dummy_qc_issue,
6223 .freeze = ata_dummy_noret,
6224 .thaw = ata_dummy_noret,
6225 .error_handler = ata_dummy_noret,
6226 .post_internal_cmd = ata_dummy_qc_noret,
6227 .irq_clear = ata_dummy_noret,
6228 .port_start = ata_dummy_ret0,
6229 .port_stop = ata_dummy_noret,
6233 * libata is essentially a library of internal helper functions for
6234 * low-level ATA host controller drivers. As such, the API/ABI is
6235 * likely to change as new drivers are added and updated.
6236 * Do not depend on ABI/API stability.
6239 EXPORT_SYMBOL_GPL(sata_deb_timing_normal);
6240 EXPORT_SYMBOL_GPL(sata_deb_timing_hotplug);
6241 EXPORT_SYMBOL_GPL(sata_deb_timing_long);
6242 EXPORT_SYMBOL_GPL(ata_dummy_port_ops);
6243 EXPORT_SYMBOL_GPL(ata_std_bios_param);
6244 EXPORT_SYMBOL_GPL(ata_std_ports);
6245 EXPORT_SYMBOL_GPL(ata_host_init);
6246 EXPORT_SYMBOL_GPL(ata_device_add);
6247 EXPORT_SYMBOL_GPL(ata_host_detach);
6248 EXPORT_SYMBOL_GPL(ata_sg_init);
6249 EXPORT_SYMBOL_GPL(ata_sg_init_one);
6250 EXPORT_SYMBOL_GPL(ata_hsm_move);
6251 EXPORT_SYMBOL_GPL(ata_qc_complete);
6252 EXPORT_SYMBOL_GPL(ata_qc_complete_multiple);
6253 EXPORT_SYMBOL_GPL(ata_qc_issue_prot);
6254 EXPORT_SYMBOL_GPL(ata_tf_load);
6255 EXPORT_SYMBOL_GPL(ata_tf_read);
6256 EXPORT_SYMBOL_GPL(ata_noop_dev_select);
6257 EXPORT_SYMBOL_GPL(ata_std_dev_select);
6258 EXPORT_SYMBOL_GPL(ata_tf_to_fis);
6259 EXPORT_SYMBOL_GPL(ata_tf_from_fis);
6260 EXPORT_SYMBOL_GPL(ata_check_status);
6261 EXPORT_SYMBOL_GPL(ata_altstatus);
6262 EXPORT_SYMBOL_GPL(ata_exec_command);
6263 EXPORT_SYMBOL_GPL(ata_port_start);
6264 EXPORT_SYMBOL_GPL(ata_interrupt);
6265 EXPORT_SYMBOL_GPL(ata_data_xfer);
6266 EXPORT_SYMBOL_GPL(ata_data_xfer_noirq);
6267 EXPORT_SYMBOL_GPL(ata_qc_prep);
6268 EXPORT_SYMBOL_GPL(ata_noop_qc_prep);
6269 EXPORT_SYMBOL_GPL(ata_bmdma_setup);
6270 EXPORT_SYMBOL_GPL(ata_bmdma_start);
6271 EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear);
6272 EXPORT_SYMBOL_GPL(ata_bmdma_status);
6273 EXPORT_SYMBOL_GPL(ata_bmdma_stop);
6274 EXPORT_SYMBOL_GPL(ata_bmdma_freeze);
6275 EXPORT_SYMBOL_GPL(ata_bmdma_thaw);
6276 EXPORT_SYMBOL_GPL(ata_bmdma_drive_eh);
6277 EXPORT_SYMBOL_GPL(ata_bmdma_error_handler);
6278 EXPORT_SYMBOL_GPL(ata_bmdma_post_internal_cmd);
6279 EXPORT_SYMBOL_GPL(ata_port_probe);
6280 EXPORT_SYMBOL_GPL(sata_set_spd);
6281 EXPORT_SYMBOL_GPL(sata_phy_debounce);
6282 EXPORT_SYMBOL_GPL(sata_phy_resume);
6283 EXPORT_SYMBOL_GPL(sata_phy_reset);
6284 EXPORT_SYMBOL_GPL(__sata_phy_reset);
6285 EXPORT_SYMBOL_GPL(ata_bus_reset);
6286 EXPORT_SYMBOL_GPL(ata_std_prereset);
6287 EXPORT_SYMBOL_GPL(ata_std_softreset);
6288 EXPORT_SYMBOL_GPL(sata_port_hardreset);
6289 EXPORT_SYMBOL_GPL(sata_std_hardreset);
6290 EXPORT_SYMBOL_GPL(ata_std_postreset);
6291 EXPORT_SYMBOL_GPL(ata_dev_classify);
6292 EXPORT_SYMBOL_GPL(ata_dev_pair);
6293 EXPORT_SYMBOL_GPL(ata_port_disable);
6294 EXPORT_SYMBOL_GPL(ata_ratelimit);
6295 EXPORT_SYMBOL_GPL(ata_wait_register);
6296 EXPORT_SYMBOL_GPL(ata_busy_sleep);
6297 EXPORT_SYMBOL_GPL(ata_port_queue_task);
6298 EXPORT_SYMBOL_GPL(ata_scsi_ioctl);
6299 EXPORT_SYMBOL_GPL(ata_scsi_queuecmd);
6300 EXPORT_SYMBOL_GPL(ata_scsi_slave_config);
6301 EXPORT_SYMBOL_GPL(ata_scsi_slave_destroy);
6302 EXPORT_SYMBOL_GPL(ata_scsi_change_queue_depth);
6303 EXPORT_SYMBOL_GPL(ata_host_intr);
6304 EXPORT_SYMBOL_GPL(sata_scr_valid);
6305 EXPORT_SYMBOL_GPL(sata_scr_read);
6306 EXPORT_SYMBOL_GPL(sata_scr_write);
6307 EXPORT_SYMBOL_GPL(sata_scr_write_flush);
6308 EXPORT_SYMBOL_GPL(ata_port_online);
6309 EXPORT_SYMBOL_GPL(ata_port_offline);
6310 EXPORT_SYMBOL_GPL(ata_host_suspend);
6311 EXPORT_SYMBOL_GPL(ata_host_resume);
6312 EXPORT_SYMBOL_GPL(ata_id_string);
6313 EXPORT_SYMBOL_GPL(ata_id_c_string);
6314 EXPORT_SYMBOL_GPL(ata_device_blacklisted);
6315 EXPORT_SYMBOL_GPL(ata_scsi_simulate);
6317 EXPORT_SYMBOL_GPL(ata_pio_need_iordy);
6318 EXPORT_SYMBOL_GPL(ata_timing_compute);
6319 EXPORT_SYMBOL_GPL(ata_timing_merge);
6322 EXPORT_SYMBOL_GPL(pci_test_config_bits);
6323 EXPORT_SYMBOL_GPL(ata_pci_init_native_mode);
6324 EXPORT_SYMBOL_GPL(ata_pci_init_one);
6325 EXPORT_SYMBOL_GPL(ata_pci_remove_one);
6326 EXPORT_SYMBOL_GPL(ata_pci_device_do_suspend);
6327 EXPORT_SYMBOL_GPL(ata_pci_device_do_resume);
6328 EXPORT_SYMBOL_GPL(ata_pci_device_suspend);
6329 EXPORT_SYMBOL_GPL(ata_pci_device_resume);
6330 EXPORT_SYMBOL_GPL(ata_pci_default_filter);
6331 EXPORT_SYMBOL_GPL(ata_pci_clear_simplex);
6332 #endif /* CONFIG_PCI */
6334 EXPORT_SYMBOL_GPL(ata_scsi_device_suspend);
6335 EXPORT_SYMBOL_GPL(ata_scsi_device_resume);
6337 EXPORT_SYMBOL_GPL(ata_eng_timeout);
6338 EXPORT_SYMBOL_GPL(ata_port_schedule_eh);
6339 EXPORT_SYMBOL_GPL(ata_port_abort);
6340 EXPORT_SYMBOL_GPL(ata_port_freeze);
6341 EXPORT_SYMBOL_GPL(ata_eh_freeze_port);
6342 EXPORT_SYMBOL_GPL(ata_eh_thaw_port);
6343 EXPORT_SYMBOL_GPL(ata_eh_qc_complete);
6344 EXPORT_SYMBOL_GPL(ata_eh_qc_retry);
6345 EXPORT_SYMBOL_GPL(ata_do_eh);
6346 EXPORT_SYMBOL_GPL(ata_irq_on);
6347 EXPORT_SYMBOL_GPL(ata_dummy_irq_on);
6348 EXPORT_SYMBOL_GPL(ata_irq_ack);
6349 EXPORT_SYMBOL_GPL(ata_dummy_irq_ack);
6350 EXPORT_SYMBOL_GPL(ata_dev_try_classify);