2 * processor_idle - idle state submodule to the ACPI processor driver
4 * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
5 * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
6 * Copyright (C) 2004 Dominik Brodowski <linux@brodo.de>
7 * Copyright (C) 2004 Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
8 * - Added processor hotplug support
9 * Copyright (C) 2005 Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
10 * - Added support for C3 on SMP
12 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or (at
17 * your option) any later version.
19 * This program is distributed in the hope that it will be useful, but
20 * WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
22 * General Public License for more details.
24 * You should have received a copy of the GNU General Public License along
25 * with this program; if not, write to the Free Software Foundation, Inc.,
26 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
28 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
31 #include <linux/kernel.h>
32 #include <linux/module.h>
33 #include <linux/init.h>
34 #include <linux/cpufreq.h>
35 #include <linux/proc_fs.h>
36 #include <linux/seq_file.h>
37 #include <linux/acpi.h>
38 #include <linux/dmi.h>
39 #include <linux/moduleparam.h>
40 #include <linux/sched.h> /* need_resched() */
43 #include <asm/uaccess.h>
45 #include <acpi/acpi_bus.h>
46 #include <acpi/processor.h>
48 #define ACPI_PROCESSOR_COMPONENT 0x01000000
49 #define ACPI_PROCESSOR_CLASS "processor"
50 #define ACPI_PROCESSOR_DRIVER_NAME "ACPI Processor Driver"
51 #define _COMPONENT ACPI_PROCESSOR_COMPONENT
52 ACPI_MODULE_NAME("acpi_processor")
53 #define ACPI_PROCESSOR_FILE_POWER "power"
54 #define US_TO_PM_TIMER_TICKS(t) ((t * (PM_TIMER_FREQUENCY/1000)) / 1000)
55 #define C2_OVERHEAD 4 /* 1us (3.579 ticks per us) */
56 #define C3_OVERHEAD 4 /* 1us (3.579 ticks per us) */
57 static void (*pm_idle_save) (void) __read_mostly;
58 module_param(max_cstate, uint, 0644);
60 static unsigned int nocst __read_mostly;
61 module_param(nocst, uint, 0000);
64 * bm_history -- bit-mask with a bit per jiffy of bus-master activity
65 * 1000 HZ: 0xFFFFFFFF: 32 jiffies = 32ms
66 * 800 HZ: 0xFFFFFFFF: 32 jiffies = 40ms
67 * 100 HZ: 0x0000000F: 4 jiffies = 40ms
68 * reduce history for more aggressive entry into C3
70 static unsigned int bm_history __read_mostly =
71 (HZ >= 800 ? 0xFFFFFFFF : ((1U << (HZ / 25)) - 1));
72 module_param(bm_history, uint, 0644);
73 /* --------------------------------------------------------------------------
75 -------------------------------------------------------------------------- */
78 * IBM ThinkPad R40e crashes mysteriously when going into C2 or C3.
79 * For now disable this. Probably a bug somewhere else.
81 * To skip this limit, boot/load with a large max_cstate limit.
83 static int set_max_cstate(struct dmi_system_id *id)
85 if (max_cstate > ACPI_PROCESSOR_MAX_POWER)
88 printk(KERN_NOTICE PREFIX "%s detected - limiting to C%ld max_cstate."
89 " Override with \"processor.max_cstate=%d\"\n", id->ident,
90 (long)id->driver_data, ACPI_PROCESSOR_MAX_POWER + 1);
92 max_cstate = (long)id->driver_data;
97 /* Actually this shouldn't be __cpuinitdata, would be better to fix the
98 callers to only run once -AK */
99 static struct dmi_system_id __cpuinitdata processor_power_dmi_table[] = {
100 { set_max_cstate, "IBM ThinkPad R40e", {
101 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
102 DMI_MATCH(DMI_BIOS_VERSION,"1SET60WW")}, (void *)1},
103 { set_max_cstate, "IBM ThinkPad R40e", {
104 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
105 DMI_MATCH(DMI_BIOS_VERSION,"1SET43WW") }, (void*)1},
106 { set_max_cstate, "IBM ThinkPad R40e", {
107 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
108 DMI_MATCH(DMI_BIOS_VERSION,"1SET45WW") }, (void*)1},
109 { set_max_cstate, "IBM ThinkPad R40e", {
110 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
111 DMI_MATCH(DMI_BIOS_VERSION,"1SET47WW") }, (void*)1},
112 { set_max_cstate, "IBM ThinkPad R40e", {
113 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
114 DMI_MATCH(DMI_BIOS_VERSION,"1SET50WW") }, (void*)1},
115 { set_max_cstate, "IBM ThinkPad R40e", {
116 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
117 DMI_MATCH(DMI_BIOS_VERSION,"1SET52WW") }, (void*)1},
118 { set_max_cstate, "IBM ThinkPad R40e", {
119 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
120 DMI_MATCH(DMI_BIOS_VERSION,"1SET55WW") }, (void*)1},
121 { set_max_cstate, "IBM ThinkPad R40e", {
122 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
123 DMI_MATCH(DMI_BIOS_VERSION,"1SET56WW") }, (void*)1},
124 { set_max_cstate, "IBM ThinkPad R40e", {
125 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
126 DMI_MATCH(DMI_BIOS_VERSION,"1SET59WW") }, (void*)1},
127 { set_max_cstate, "IBM ThinkPad R40e", {
128 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
129 DMI_MATCH(DMI_BIOS_VERSION,"1SET60WW") }, (void*)1},
130 { set_max_cstate, "IBM ThinkPad R40e", {
131 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
132 DMI_MATCH(DMI_BIOS_VERSION,"1SET61WW") }, (void*)1},
133 { set_max_cstate, "IBM ThinkPad R40e", {
134 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
135 DMI_MATCH(DMI_BIOS_VERSION,"1SET62WW") }, (void*)1},
136 { set_max_cstate, "IBM ThinkPad R40e", {
137 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
138 DMI_MATCH(DMI_BIOS_VERSION,"1SET64WW") }, (void*)1},
139 { set_max_cstate, "IBM ThinkPad R40e", {
140 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
141 DMI_MATCH(DMI_BIOS_VERSION,"1SET65WW") }, (void*)1},
142 { set_max_cstate, "IBM ThinkPad R40e", {
143 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
144 DMI_MATCH(DMI_BIOS_VERSION,"1SET68WW") }, (void*)1},
145 { set_max_cstate, "Medion 41700", {
146 DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"),
147 DMI_MATCH(DMI_BIOS_VERSION,"R01-A1J")}, (void *)1},
148 { set_max_cstate, "Clevo 5600D", {
149 DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"),
150 DMI_MATCH(DMI_BIOS_VERSION,"SHE845M0.86C.0013.D.0302131307")},
155 static inline u32 ticks_elapsed(u32 t1, u32 t2)
159 else if (!acpi_fadt.tmr_val_ext)
160 return (((0x00FFFFFF - t1) + t2) & 0x00FFFFFF);
162 return ((0xFFFFFFFF - t1) + t2);
166 acpi_processor_power_activate(struct acpi_processor *pr,
167 struct acpi_processor_cx *new)
169 struct acpi_processor_cx *old;
174 old = pr->power.state;
177 old->promotion.count = 0;
178 new->demotion.count = 0;
180 /* Cleanup from old state. */
184 /* Disable bus master reload */
185 if (new->type != ACPI_STATE_C3 && pr->flags.bm_check)
186 acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD, 0,
187 ACPI_MTX_DO_NOT_LOCK);
192 /* Prepare to use new state. */
195 /* Enable bus master reload */
196 if (old->type != ACPI_STATE_C3 && pr->flags.bm_check)
197 acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD, 1,
198 ACPI_MTX_DO_NOT_LOCK);
202 pr->power.state = new;
207 static void acpi_safe_halt(void)
209 clear_thread_flag(TIF_POLLING_NRFLAG);
210 smp_mb__after_clear_bit();
213 set_thread_flag(TIF_POLLING_NRFLAG);
216 static atomic_t c3_cpu_count;
218 static void acpi_processor_idle(void)
220 struct acpi_processor *pr = NULL;
221 struct acpi_processor_cx *cx = NULL;
222 struct acpi_processor_cx *next_state = NULL;
226 pr = processors[smp_processor_id()];
231 * Interrupts must be disabled during bus mastering calculations and
232 * for C2/C3 transitions.
237 * Check whether we truly need to go idle, or should
240 if (unlikely(need_resched())) {
245 cx = pr->power.state;
257 * Check for bus mastering activity (if required), record, and check
260 if (pr->flags.bm_check) {
262 unsigned long diff = jiffies - pr->power.bm_check_timestamp;
268 /* if we didn't get called, assume there was busmaster activity */
271 pr->power.bm_activity |= 0x1;
272 pr->power.bm_activity <<= 1;
275 acpi_get_register(ACPI_BITREG_BUS_MASTER_STATUS,
276 &bm_status, ACPI_MTX_DO_NOT_LOCK);
278 pr->power.bm_activity++;
279 acpi_set_register(ACPI_BITREG_BUS_MASTER_STATUS,
280 1, ACPI_MTX_DO_NOT_LOCK);
283 * PIIX4 Erratum #18: Note that BM_STS doesn't always reflect
284 * the true state of bus mastering activity; forcing us to
285 * manually check the BMIDEA bit of each IDE channel.
287 else if (errata.piix4.bmisx) {
288 if ((inb_p(errata.piix4.bmisx + 0x02) & 0x01)
289 || (inb_p(errata.piix4.bmisx + 0x0A) & 0x01))
290 pr->power.bm_activity++;
293 pr->power.bm_check_timestamp = jiffies;
296 * Apply bus mastering demotion policy. Automatically demote
297 * to avoid a faulty transition. Note that the processor
298 * won't enter a low-power state during this call (to this
299 * funciton) but should upon the next.
301 * TBD: A better policy might be to fallback to the demotion
302 * state (use it for this quantum only) istead of
303 * demoting -- and rely on duration as our sole demotion
304 * qualification. This may, however, introduce DMA
305 * issues (e.g. floppy DMA transfer overrun/underrun).
307 if (pr->power.bm_activity & cx->demotion.threshold.bm) {
309 next_state = cx->demotion.state;
314 #ifdef CONFIG_HOTPLUG_CPU
316 * Check for P_LVL2_UP flag before entering C2 and above on
317 * an SMP system. We do it here instead of doing it at _CST/P_LVL
318 * detection phase, to work cleanly with logical CPU hotplug.
320 if ((cx->type != ACPI_STATE_C1) && (num_online_cpus() > 1) &&
321 !pr->flags.has_cst && !acpi_fadt.plvl2_up)
322 cx = &pr->power.states[ACPI_STATE_C1];
330 * Invoke the current Cx state to put the processor to sleep.
332 if (cx->type == ACPI_STATE_C2 || cx->type == ACPI_STATE_C3) {
333 clear_thread_flag(TIF_POLLING_NRFLAG);
334 smp_mb__after_clear_bit();
335 if (need_resched()) {
336 set_thread_flag(TIF_POLLING_NRFLAG);
347 * Use the appropriate idle routine, the one that would
348 * be used without acpi C-states.
356 * TBD: Can't get time duration while in C1, as resumes
357 * go to an ISR rather than here. Need to instrument
358 * base interrupt handler.
360 sleep_ticks = 0xFFFFFFFF;
364 /* Get start time (ticks) */
365 t1 = inl(acpi_fadt.xpm_tmr_blk.address);
368 /* Dummy op - must do something useless after P_LVL2 read */
369 t2 = inl(acpi_fadt.xpm_tmr_blk.address);
370 /* Get end time (ticks) */
371 t2 = inl(acpi_fadt.xpm_tmr_blk.address);
373 #ifdef CONFIG_GENERIC_TIME
374 /* TSC halts in C2, so notify users */
377 /* Re-enable interrupts */
379 set_thread_flag(TIF_POLLING_NRFLAG);
380 /* Compute time (ticks) that we were actually asleep */
382 ticks_elapsed(t1, t2) - cx->latency_ticks - C2_OVERHEAD;
387 if (pr->flags.bm_check) {
388 if (atomic_inc_return(&c3_cpu_count) ==
391 * All CPUs are trying to go to C3
392 * Disable bus master arbitration
394 acpi_set_register(ACPI_BITREG_ARB_DISABLE, 1,
395 ACPI_MTX_DO_NOT_LOCK);
398 /* SMP with no shared cache... Invalidate cache */
399 ACPI_FLUSH_CPU_CACHE();
402 /* Get start time (ticks) */
403 t1 = inl(acpi_fadt.xpm_tmr_blk.address);
406 /* Dummy op - must do something useless after P_LVL3 read */
407 t2 = inl(acpi_fadt.xpm_tmr_blk.address);
408 /* Get end time (ticks) */
409 t2 = inl(acpi_fadt.xpm_tmr_blk.address);
410 if (pr->flags.bm_check) {
411 /* Enable bus master arbitration */
412 atomic_dec(&c3_cpu_count);
413 acpi_set_register(ACPI_BITREG_ARB_DISABLE, 0,
414 ACPI_MTX_DO_NOT_LOCK);
417 #ifdef CONFIG_GENERIC_TIME
418 /* TSC halts in C3, so notify users */
421 /* Re-enable interrupts */
423 set_thread_flag(TIF_POLLING_NRFLAG);
424 /* Compute time (ticks) that we were actually asleep */
426 ticks_elapsed(t1, t2) - cx->latency_ticks - C3_OVERHEAD;
434 next_state = pr->power.state;
436 #ifdef CONFIG_HOTPLUG_CPU
437 /* Don't do promotion/demotion */
438 if ((cx->type == ACPI_STATE_C1) && (num_online_cpus() > 1) &&
439 !pr->flags.has_cst && !acpi_fadt.plvl2_up) {
448 * Track the number of longs (time asleep is greater than threshold)
449 * and promote when the count threshold is reached. Note that bus
450 * mastering activity may prevent promotions.
451 * Do not promote above max_cstate.
453 if (cx->promotion.state &&
454 ((cx->promotion.state - pr->power.states) <= max_cstate)) {
455 if (sleep_ticks > cx->promotion.threshold.ticks) {
456 cx->promotion.count++;
457 cx->demotion.count = 0;
458 if (cx->promotion.count >=
459 cx->promotion.threshold.count) {
460 if (pr->flags.bm_check) {
462 (pr->power.bm_activity & cx->
463 promotion.threshold.bm)) {
469 next_state = cx->promotion.state;
479 * Track the number of shorts (time asleep is less than time threshold)
480 * and demote when the usage threshold is reached.
482 if (cx->demotion.state) {
483 if (sleep_ticks < cx->demotion.threshold.ticks) {
484 cx->demotion.count++;
485 cx->promotion.count = 0;
486 if (cx->demotion.count >= cx->demotion.threshold.count) {
487 next_state = cx->demotion.state;
495 * Demote if current state exceeds max_cstate
497 if ((pr->power.state - pr->power.states) > max_cstate) {
498 if (cx->demotion.state)
499 next_state = cx->demotion.state;
505 * If we're going to start using a new Cx state we must clean up
506 * from the previous and prepare to use the new.
508 if (next_state != pr->power.state)
509 acpi_processor_power_activate(pr, next_state);
512 static int acpi_processor_set_power_policy(struct acpi_processor *pr)
515 unsigned int state_is_set = 0;
516 struct acpi_processor_cx *lower = NULL;
517 struct acpi_processor_cx *higher = NULL;
518 struct acpi_processor_cx *cx;
520 ACPI_FUNCTION_TRACE("acpi_processor_set_power_policy");
523 return_VALUE(-EINVAL);
526 * This function sets the default Cx state policy (OS idle handler).
527 * Our scheme is to promote quickly to C2 but more conservatively
528 * to C3. We're favoring C2 for its characteristics of low latency
529 * (quick response), good power savings, and ability to allow bus
530 * mastering activity. Note that the Cx state policy is completely
531 * customizable and can be altered dynamically.
535 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
536 cx = &pr->power.states[i];
541 pr->power.state = cx;
547 return_VALUE(-ENODEV);
550 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
551 cx = &pr->power.states[i];
556 cx->demotion.state = lower;
557 cx->demotion.threshold.ticks = cx->latency_ticks;
558 cx->demotion.threshold.count = 1;
559 if (cx->type == ACPI_STATE_C3)
560 cx->demotion.threshold.bm = bm_history;
567 for (i = (ACPI_PROCESSOR_MAX_POWER - 1); i > 0; i--) {
568 cx = &pr->power.states[i];
573 cx->promotion.state = higher;
574 cx->promotion.threshold.ticks = cx->latency_ticks;
575 if (cx->type >= ACPI_STATE_C2)
576 cx->promotion.threshold.count = 4;
578 cx->promotion.threshold.count = 10;
579 if (higher->type == ACPI_STATE_C3)
580 cx->promotion.threshold.bm = bm_history;
589 static int acpi_processor_get_power_info_fadt(struct acpi_processor *pr)
591 ACPI_FUNCTION_TRACE("acpi_processor_get_power_info_fadt");
594 return_VALUE(-EINVAL);
597 return_VALUE(-ENODEV);
599 /* if info is obtained from pblk/fadt, type equals state */
600 pr->power.states[ACPI_STATE_C2].type = ACPI_STATE_C2;
601 pr->power.states[ACPI_STATE_C3].type = ACPI_STATE_C3;
603 #ifndef CONFIG_HOTPLUG_CPU
605 * Check for P_LVL2_UP flag before entering C2 and above on
608 if ((num_online_cpus() > 1) && !acpi_fadt.plvl2_up)
609 return_VALUE(-ENODEV);
612 /* determine C2 and C3 address from pblk */
613 pr->power.states[ACPI_STATE_C2].address = pr->pblk + 4;
614 pr->power.states[ACPI_STATE_C3].address = pr->pblk + 5;
616 /* determine latencies from FADT */
617 pr->power.states[ACPI_STATE_C2].latency = acpi_fadt.plvl2_lat;
618 pr->power.states[ACPI_STATE_C3].latency = acpi_fadt.plvl3_lat;
620 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
621 "lvl2[0x%08x] lvl3[0x%08x]\n",
622 pr->power.states[ACPI_STATE_C2].address,
623 pr->power.states[ACPI_STATE_C3].address));
628 static int acpi_processor_get_power_info_default_c1(struct acpi_processor *pr)
630 ACPI_FUNCTION_TRACE("acpi_processor_get_power_info_default_c1");
632 /* Zero initialize all the C-states info. */
633 memset(pr->power.states, 0, sizeof(pr->power.states));
635 /* set the first C-State to C1 */
636 pr->power.states[ACPI_STATE_C1].type = ACPI_STATE_C1;
638 /* the C0 state only exists as a filler in our array,
639 * and all processors need to support C1 */
640 pr->power.states[ACPI_STATE_C0].valid = 1;
641 pr->power.states[ACPI_STATE_C1].valid = 1;
646 static int acpi_processor_get_power_info_cst(struct acpi_processor *pr)
648 acpi_status status = 0;
652 struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
653 union acpi_object *cst;
655 ACPI_FUNCTION_TRACE("acpi_processor_get_power_info_cst");
658 return_VALUE(-ENODEV);
662 /* Zero initialize C2 onwards and prepare for fresh CST lookup */
663 for (i = 2; i < ACPI_PROCESSOR_MAX_POWER; i++)
664 memset(&(pr->power.states[i]), 0,
665 sizeof(struct acpi_processor_cx));
667 status = acpi_evaluate_object(pr->handle, "_CST", NULL, &buffer);
668 if (ACPI_FAILURE(status)) {
669 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "No _CST, giving up\n"));
670 return_VALUE(-ENODEV);
673 cst = (union acpi_object *)buffer.pointer;
675 /* There must be at least 2 elements */
676 if (!cst || (cst->type != ACPI_TYPE_PACKAGE) || cst->package.count < 2) {
677 ACPI_DEBUG_PRINT((ACPI_DB_ERROR,
678 "not enough elements in _CST\n"));
683 count = cst->package.elements[0].integer.value;
685 /* Validate number of power states. */
686 if (count < 1 || count != cst->package.count - 1) {
687 ACPI_DEBUG_PRINT((ACPI_DB_ERROR,
688 "count given by _CST is not valid\n"));
693 /* Tell driver that at least _CST is supported. */
694 pr->flags.has_cst = 1;
696 for (i = 1; i <= count; i++) {
697 union acpi_object *element;
698 union acpi_object *obj;
699 struct acpi_power_register *reg;
700 struct acpi_processor_cx cx;
702 memset(&cx, 0, sizeof(cx));
704 element = (union acpi_object *)&(cst->package.elements[i]);
705 if (element->type != ACPI_TYPE_PACKAGE)
708 if (element->package.count != 4)
711 obj = (union acpi_object *)&(element->package.elements[0]);
713 if (obj->type != ACPI_TYPE_BUFFER)
716 reg = (struct acpi_power_register *)obj->buffer.pointer;
718 if (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO &&
719 (reg->space_id != ACPI_ADR_SPACE_FIXED_HARDWARE))
722 cx.address = (reg->space_id == ACPI_ADR_SPACE_FIXED_HARDWARE) ?
725 /* There should be an easy way to extract an integer... */
726 obj = (union acpi_object *)&(element->package.elements[1]);
727 if (obj->type != ACPI_TYPE_INTEGER)
730 cx.type = obj->integer.value;
732 if ((cx.type != ACPI_STATE_C1) &&
733 (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO))
736 if ((cx.type < ACPI_STATE_C2) || (cx.type > ACPI_STATE_C3))
739 obj = (union acpi_object *)&(element->package.elements[2]);
740 if (obj->type != ACPI_TYPE_INTEGER)
743 cx.latency = obj->integer.value;
745 obj = (union acpi_object *)&(element->package.elements[3]);
746 if (obj->type != ACPI_TYPE_INTEGER)
749 cx.power = obj->integer.value;
752 memcpy(&(pr->power.states[current_count]), &cx, sizeof(cx));
755 * We support total ACPI_PROCESSOR_MAX_POWER - 1
756 * (From 1 through ACPI_PROCESSOR_MAX_POWER - 1)
758 if (current_count >= (ACPI_PROCESSOR_MAX_POWER - 1)) {
760 "Limiting number of power states to max (%d)\n",
761 ACPI_PROCESSOR_MAX_POWER);
763 "Please increase ACPI_PROCESSOR_MAX_POWER if needed.\n");
768 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Found %d power states\n",
771 /* Validate number of power states discovered */
772 if (current_count < 2)
776 acpi_os_free(buffer.pointer);
778 return_VALUE(status);
781 static void acpi_processor_power_verify_c2(struct acpi_processor_cx *cx)
783 ACPI_FUNCTION_TRACE("acpi_processor_get_power_verify_c2");
789 * C2 latency must be less than or equal to 100
792 else if (cx->latency > ACPI_PROCESSOR_MAX_C2_LATENCY) {
793 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
794 "latency too large [%d]\n", cx->latency));
799 * Otherwise we've met all of our C2 requirements.
800 * Normalize the C2 latency to expidite policy
803 cx->latency_ticks = US_TO_PM_TIMER_TICKS(cx->latency);
808 static void acpi_processor_power_verify_c3(struct acpi_processor *pr,
809 struct acpi_processor_cx *cx)
811 static int bm_check_flag;
813 ACPI_FUNCTION_TRACE("acpi_processor_get_power_verify_c3");
819 * C3 latency must be less than or equal to 1000
822 else if (cx->latency > ACPI_PROCESSOR_MAX_C3_LATENCY) {
823 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
824 "latency too large [%d]\n", cx->latency));
829 * PIIX4 Erratum #18: We don't support C3 when Type-F (fast)
830 * DMA transfers are used by any ISA device to avoid livelock.
831 * Note that we could disable Type-F DMA (as recommended by
832 * the erratum), but this is known to disrupt certain ISA
833 * devices thus we take the conservative approach.
835 else if (errata.piix4.fdma) {
836 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
837 "C3 not supported on PIIX4 with Type-F DMA\n"));
841 /* All the logic here assumes flags.bm_check is same across all CPUs */
842 if (!bm_check_flag) {
843 /* Determine whether bm_check is needed based on CPU */
844 acpi_processor_power_init_bm_check(&(pr->flags), pr->id);
845 bm_check_flag = pr->flags.bm_check;
847 pr->flags.bm_check = bm_check_flag;
850 if (pr->flags.bm_check) {
851 /* bus mastering control is necessary */
852 if (!pr->flags.bm_control) {
853 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
854 "C3 support requires bus mastering control\n"));
859 * WBINVD should be set in fadt, for C3 state to be
860 * supported on when bm_check is not required.
862 if (acpi_fadt.wb_invd != 1) {
863 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
864 "Cache invalidation should work properly"
865 " for C3 to be enabled on SMP systems\n"));
868 acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD,
869 0, ACPI_MTX_DO_NOT_LOCK);
873 * Otherwise we've met all of our C3 requirements.
874 * Normalize the C3 latency to expidite policy. Enable
875 * checking of bus mastering status (bm_check) so we can
876 * use this in our C3 policy
879 cx->latency_ticks = US_TO_PM_TIMER_TICKS(cx->latency);
884 static int acpi_processor_power_verify(struct acpi_processor *pr)
887 unsigned int working = 0;
889 #ifdef ARCH_APICTIMER_STOPS_ON_C3
890 int timer_broadcast = 0;
891 cpumask_t mask = cpumask_of_cpu(pr->id);
892 on_each_cpu(switch_ipi_to_APIC_timer, &mask, 1, 1);
895 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
896 struct acpi_processor_cx *cx = &pr->power.states[i];
904 acpi_processor_power_verify_c2(cx);
905 #ifdef ARCH_APICTIMER_STOPS_ON_C3
906 /* Some AMD systems fake C3 as C2, but still
907 have timer troubles */
909 boot_cpu_data.x86_vendor == X86_VENDOR_AMD)
915 acpi_processor_power_verify_c3(pr, cx);
916 #ifdef ARCH_APICTIMER_STOPS_ON_C3
927 #ifdef ARCH_APICTIMER_STOPS_ON_C3
929 on_each_cpu(switch_APIC_timer_to_ipi, &mask, 1, 1);
935 static int acpi_processor_get_power_info(struct acpi_processor *pr)
940 ACPI_FUNCTION_TRACE("acpi_processor_get_power_info");
942 /* NOTE: the idle thread may not be running while calling
945 /* Adding C1 state */
946 acpi_processor_get_power_info_default_c1(pr);
947 result = acpi_processor_get_power_info_cst(pr);
948 if (result == -ENODEV)
949 acpi_processor_get_power_info_fadt(pr);
951 pr->power.count = acpi_processor_power_verify(pr);
956 * Now that we know which states are supported, set the default
957 * policy. Note that this policy can be changed dynamically
958 * (e.g. encourage deeper sleeps to conserve battery life when
961 result = acpi_processor_set_power_policy(pr);
963 return_VALUE(result);
966 * if one state of type C2 or C3 is available, mark this
967 * CPU as being "idle manageable"
969 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
970 if (pr->power.states[i].valid) {
972 if (pr->power.states[i].type >= ACPI_STATE_C2)
980 int acpi_processor_cst_has_changed(struct acpi_processor *pr)
984 ACPI_FUNCTION_TRACE("acpi_processor_cst_has_changed");
987 return_VALUE(-EINVAL);
990 return_VALUE(-ENODEV);
993 if (!pr->flags.power_setup_done)
994 return_VALUE(-ENODEV);
996 /* Fall back to the default idle loop */
997 pm_idle = pm_idle_save;
998 synchronize_sched(); /* Relies on interrupts forcing exit from idle. */
1000 pr->flags.power = 0;
1001 result = acpi_processor_get_power_info(pr);
1002 if ((pr->flags.power == 1) && (pr->flags.power_setup_done))
1003 pm_idle = acpi_processor_idle;
1005 return_VALUE(result);
1008 /* proc interface */
1010 static int acpi_processor_power_seq_show(struct seq_file *seq, void *offset)
1012 struct acpi_processor *pr = (struct acpi_processor *)seq->private;
1015 ACPI_FUNCTION_TRACE("acpi_processor_power_seq_show");
1020 seq_printf(seq, "active state: C%zd\n"
1022 "bus master activity: %08x\n",
1023 pr->power.state ? pr->power.state - pr->power.states : 0,
1024 max_cstate, (unsigned)pr->power.bm_activity);
1026 seq_puts(seq, "states:\n");
1028 for (i = 1; i <= pr->power.count; i++) {
1029 seq_printf(seq, " %cC%d: ",
1030 (&pr->power.states[i] ==
1031 pr->power.state ? '*' : ' '), i);
1033 if (!pr->power.states[i].valid) {
1034 seq_puts(seq, "<not supported>\n");
1038 switch (pr->power.states[i].type) {
1040 seq_printf(seq, "type[C1] ");
1043 seq_printf(seq, "type[C2] ");
1046 seq_printf(seq, "type[C3] ");
1049 seq_printf(seq, "type[--] ");
1053 if (pr->power.states[i].promotion.state)
1054 seq_printf(seq, "promotion[C%zd] ",
1055 (pr->power.states[i].promotion.state -
1058 seq_puts(seq, "promotion[--] ");
1060 if (pr->power.states[i].demotion.state)
1061 seq_printf(seq, "demotion[C%zd] ",
1062 (pr->power.states[i].demotion.state -
1065 seq_puts(seq, "demotion[--] ");
1067 seq_printf(seq, "latency[%03d] usage[%08d]\n",
1068 pr->power.states[i].latency,
1069 pr->power.states[i].usage);
1076 static int acpi_processor_power_open_fs(struct inode *inode, struct file *file)
1078 return single_open(file, acpi_processor_power_seq_show,
1082 static struct file_operations acpi_processor_power_fops = {
1083 .open = acpi_processor_power_open_fs,
1085 .llseek = seq_lseek,
1086 .release = single_release,
1089 int acpi_processor_power_init(struct acpi_processor *pr,
1090 struct acpi_device *device)
1092 acpi_status status = 0;
1093 static int first_run;
1094 struct proc_dir_entry *entry = NULL;
1097 ACPI_FUNCTION_TRACE("acpi_processor_power_init");
1100 dmi_check_system(processor_power_dmi_table);
1101 if (max_cstate < ACPI_C_STATES_MAX)
1103 "ACPI: processor limited to max C-state %d\n",
1109 return_VALUE(-EINVAL);
1111 if (acpi_fadt.cst_cnt && !nocst) {
1113 acpi_os_write_port(acpi_fadt.smi_cmd, acpi_fadt.cst_cnt, 8);
1114 if (ACPI_FAILURE(status)) {
1115 ACPI_DEBUG_PRINT((ACPI_DB_ERROR,
1116 "Notifying BIOS of _CST ability failed\n"));
1120 acpi_processor_get_power_info(pr);
1123 * Install the idle handler if processor power management is supported.
1124 * Note that we use previously set idle handler will be used on
1125 * platforms that only support C1.
1127 if ((pr->flags.power) && (!boot_option_idle_override)) {
1128 printk(KERN_INFO PREFIX "CPU%d (power states:", pr->id);
1129 for (i = 1; i <= pr->power.count; i++)
1130 if (pr->power.states[i].valid)
1131 printk(" C%d[C%d]", i,
1132 pr->power.states[i].type);
1136 pm_idle_save = pm_idle;
1137 pm_idle = acpi_processor_idle;
1142 entry = create_proc_entry(ACPI_PROCESSOR_FILE_POWER,
1143 S_IRUGO, acpi_device_dir(device));
1145 ACPI_DEBUG_PRINT((ACPI_DB_ERROR,
1146 "Unable to create '%s' fs entry\n",
1147 ACPI_PROCESSOR_FILE_POWER));
1149 entry->proc_fops = &acpi_processor_power_fops;
1150 entry->data = acpi_driver_data(device);
1151 entry->owner = THIS_MODULE;
1154 pr->flags.power_setup_done = 1;
1159 int acpi_processor_power_exit(struct acpi_processor *pr,
1160 struct acpi_device *device)
1162 ACPI_FUNCTION_TRACE("acpi_processor_power_exit");
1164 pr->flags.power_setup_done = 0;
1166 if (acpi_device_dir(device))
1167 remove_proc_entry(ACPI_PROCESSOR_FILE_POWER,
1168 acpi_device_dir(device));
1170 /* Unregister the idle handler when processor #0 is removed. */
1172 pm_idle = pm_idle_save;
1175 * We are about to unload the current idle thread pm callback
1176 * (pm_idle), Wait for all processors to update cached/local
1177 * copies of pm_idle before proceeding.