3 * Trampoline.S Derived from Setup.S by Linus Torvalds
5 * 4 Jan 1997 Michael Chastain: changed to gnu as.
6 * 15 Sept 2005 Eric Biederman: 64bit PIC support
8 * Entry: CS:IP point to the start of our code, we are
9 * in real mode with no stack, but the rest of the
10 * trampoline page to make our stack and everything else
13 * In fact we don't actually need a stack so we don't
16 * On entry to trampoline_data, the processor is in real mode
17 * with 16-bit addressing and 16-bit data. CS has some value
18 * and IP is zero. Thus, data addresses need to be absolute
19 * (no relocation) and are taken with regard to r_base.
21 * With the addition of trampoline_level4_pgt this code can
22 * now enter a 64bit kernel that lives at arbitrary 64bit
25 * If you work on this file, check the object module with objdump
26 * --full-contents --reloc to make sure there are no relocation
30 #include <linux/linkage.h>
31 #include <asm/pgtable.h>
34 #include <asm/segment.h>
40 ENTRY(trampoline_data)
42 cli # We should be safe anyway
44 mov %cs, %ax # Code and data in the same place
50 movl $0xA5A5A5A5, trampoline_data - r_base
51 # write marker for master knows we're running
54 movw $(trampoline_stack_end - r_base), %sp
56 call verify_cpu # Verify the cpu supports long mode
59 movzx %ax, %esi # Find the 32bit trampoline location
63 addl %esi, startup_32_vector - r_base
64 addl %esi, startup_64_vector - r_base
65 addl %esi, tgdt + 2 - r_base # Fixup the gdt pointer
68 * GDT tables in non default location kernel can be beyond 16MB and
69 * lgdt will not be able to load the address as in real mode default
70 * operand size is 16bit. Use lgdtl instead to force operand size
74 lidtl tidt - r_base # load idt with 0, 0
75 lgdtl tgdt - r_base # load gdt with whatever is appropriate
78 inc %ax # protected mode (PE) bit
79 lmsw %ax # into protected mode
81 # flush prefetch and jump to startup_32
82 ljmpl *(startup_32_vector - r_base)
87 movl $__KERNEL_DS, %eax # Initialize the %ds segment register
91 btsl $5, %eax # Enable PAE mode
94 # Setup trampoline 4 level pagetables
95 leal (trampoline_level4_pgt - r_base)(%esi), %eax
99 movl $(1 << _EFER_LME), %eax # Enable Long Mode
104 btsl $31, %eax # Enable paging and in turn activate Long Mode
105 btsl $0, %eax # Enable protected mode
109 * At this point we're in long mode but in 32bit compatibility mode
110 * with EFER.LME = 1, CS.L = 0, CS.D = 1 (and in turn
111 * EFER.LMA = 1). Now we want to jump in 64bit mode, to do that we use
112 * the new gdt/idt that has __KERNEL_CS with CS.L = 1.
114 ljmp *(startup_64_vector - r_base)(%esi)
119 # Now jump into the kernel using virtual addresses
120 movq $secondary_startup_64, %rax
125 pushl $0 # Kill any dangerous flags
128 /* minimum CPUID flags for x86-64 */
129 /* see http://www.x86-64.org/lists/discuss/msg02971.html */
130 #define REQUIRED_MASK1 ((1<<0)|(1<<3)|(1<<4)|(1<<5)|(1<<6)|(1<<8)|\
131 (1<<13)|(1<<15)|(1<<24)|(1<<25)|(1<<26))
132 #define REQUIRED_MASK2 (1<<29)
134 pushfl # check for cpuid
147 xorl %eax, %eax # See if cpuid 1 is implemented
152 movl $0x01, %eax # Does the cpu have what it takes?
154 andl $REQUIRED_MASK1, %edx
155 xorl $REQUIRED_MASK1, %edx
158 movl $0x80000000, %eax # See if extended cpuid is implemented
160 cmpl $0x80000001, %eax
163 movl $0x80000001, %eax # Does the cpu have what it takes?
165 andl $REQUIRED_MASK2, %edx
166 xorl $REQUIRED_MASK2, %edx
169 ret # The cpu supports long mode
176 # Careful these need to be in the same 64K segment as the above;
178 .word 0 # idt limit = 0
179 .word 0, 0 # idt base = 0L
181 # Duplicate the global descriptor table
182 # so the kernel can live anywhere
185 .short tgdt_end - tgdt # gdt limit
188 .quad 0x00cf9b000000ffff # __KERNEL32_CS
189 .quad 0x00af9b000000ffff # __KERNEL_CS
190 .quad 0x00cf93000000ffff # __KERNEL_DS
195 .long startup_32 - r_base
196 .word __KERNEL32_CS, 0
200 .long startup_64 - r_base
205 trampoline_stack_end:
206 ENTRY(trampoline_level4_pgt)
207 .quad level3_ident_pgt - __START_KERNEL_map + _KERNPG_TABLE
209 .quad level3_kernel_pgt - __START_KERNEL_map + _KERNPG_TABLE
211 ENTRY(trampoline_end)