2 * linux/arch/x86-64/kernel/setup.c
4 * Copyright (C) 1995 Linus Torvalds
6 * Nov 2001 Dave Jones <davej@suse.de>
7 * Forked from i386 setup code.
13 * This file handles the architecture-dependent parts of initialization
16 #include <linux/errno.h>
17 #include <linux/sched.h>
18 #include <linux/kernel.h>
20 #include <linux/stddef.h>
21 #include <linux/unistd.h>
22 #include <linux/ptrace.h>
23 #include <linux/slab.h>
24 #include <linux/user.h>
25 #include <linux/a.out.h>
26 #include <linux/tty.h>
27 #include <linux/ioport.h>
28 #include <linux/delay.h>
29 #include <linux/config.h>
30 #include <linux/init.h>
31 #include <linux/initrd.h>
32 #include <linux/highmem.h>
33 #include <linux/bootmem.h>
34 #include <linux/module.h>
35 #include <asm/processor.h>
36 #include <linux/console.h>
37 #include <linux/seq_file.h>
38 #include <linux/root_dev.h>
39 #include <linux/pci.h>
40 #include <linux/acpi.h>
41 #include <linux/kallsyms.h>
42 #include <linux/edd.h>
44 #include <asm/uaccess.h>
45 #include <asm/system.h>
50 #include <video/edid.h>
53 #include <asm/mpspec.h>
54 #include <asm/mmu_context.h>
55 #include <asm/bootsetup.h>
56 #include <asm/proto.h>
57 #include <asm/setup.h>
58 #include <asm/mach_apic.h>
65 struct cpuinfo_x86 boot_cpu_data;
67 unsigned long mmu_cr4_features;
70 EXPORT_SYMBOL(acpi_disabled);
71 #ifdef CONFIG_ACPI_BOOT
72 extern int __initdata acpi_ht;
73 extern acpi_interrupt_flags acpi_sci_flags;
74 int __initdata acpi_force = 0;
77 int acpi_numa __initdata;
79 /* For PCI or other memory-mapped resources */
80 unsigned long pci_mem_start = 0x10000000;
82 /* Boot loader ID as an integer, for the benefit of proc_dointvec */
85 unsigned long saved_video_mode;
89 EXPORT_SYMBOL(swiotlb);
95 struct drive_info_struct { char dummy[32]; } drive_info;
96 struct screen_info screen_info;
97 struct sys_desc_table_struct {
98 unsigned short length;
99 unsigned char table[0];
102 struct edid_info edid_info;
105 extern int root_mountflags;
106 extern char _text, _etext, _edata, _end;
108 char command_line[COMMAND_LINE_SIZE];
110 struct resource standard_io_resources[] = {
111 { .name = "dma1", .start = 0x00, .end = 0x1f,
112 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
113 { .name = "pic1", .start = 0x20, .end = 0x21,
114 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
115 { .name = "timer0", .start = 0x40, .end = 0x43,
116 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
117 { .name = "timer1", .start = 0x50, .end = 0x53,
118 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
119 { .name = "keyboard", .start = 0x60, .end = 0x6f,
120 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
121 { .name = "dma page reg", .start = 0x80, .end = 0x8f,
122 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
123 { .name = "pic2", .start = 0xa0, .end = 0xa1,
124 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
125 { .name = "dma2", .start = 0xc0, .end = 0xdf,
126 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
127 { .name = "fpu", .start = 0xf0, .end = 0xff,
128 .flags = IORESOURCE_BUSY | IORESOURCE_IO }
131 #define STANDARD_IO_RESOURCES \
132 (sizeof standard_io_resources / sizeof standard_io_resources[0])
134 #define IORESOURCE_RAM (IORESOURCE_BUSY | IORESOURCE_MEM)
136 struct resource data_resource = {
137 .name = "Kernel data",
140 .flags = IORESOURCE_RAM,
142 struct resource code_resource = {
143 .name = "Kernel code",
146 .flags = IORESOURCE_RAM,
149 #define IORESOURCE_ROM (IORESOURCE_BUSY | IORESOURCE_READONLY | IORESOURCE_MEM)
151 static struct resource system_rom_resource = {
152 .name = "System ROM",
155 .flags = IORESOURCE_ROM,
158 static struct resource extension_rom_resource = {
159 .name = "Extension ROM",
162 .flags = IORESOURCE_ROM,
165 static struct resource adapter_rom_resources[] = {
166 { .name = "Adapter ROM", .start = 0xc8000, .end = 0,
167 .flags = IORESOURCE_ROM },
168 { .name = "Adapter ROM", .start = 0, .end = 0,
169 .flags = IORESOURCE_ROM },
170 { .name = "Adapter ROM", .start = 0, .end = 0,
171 .flags = IORESOURCE_ROM },
172 { .name = "Adapter ROM", .start = 0, .end = 0,
173 .flags = IORESOURCE_ROM },
174 { .name = "Adapter ROM", .start = 0, .end = 0,
175 .flags = IORESOURCE_ROM },
176 { .name = "Adapter ROM", .start = 0, .end = 0,
177 .flags = IORESOURCE_ROM }
180 #define ADAPTER_ROM_RESOURCES \
181 (sizeof adapter_rom_resources / sizeof adapter_rom_resources[0])
183 static struct resource video_rom_resource = {
187 .flags = IORESOURCE_ROM,
190 static struct resource video_ram_resource = {
191 .name = "Video RAM area",
194 .flags = IORESOURCE_RAM,
197 #define romsignature(x) (*(unsigned short *)(x) == 0xaa55)
199 static int __init romchecksum(unsigned char *rom, unsigned long length)
201 unsigned char *p, sum = 0;
203 for (p = rom; p < rom + length; p++)
208 static void __init probe_roms(void)
210 unsigned long start, length, upper;
215 upper = adapter_rom_resources[0].start;
216 for (start = video_rom_resource.start; start < upper; start += 2048) {
217 rom = isa_bus_to_virt(start);
218 if (!romsignature(rom))
221 video_rom_resource.start = start;
223 /* 0 < length <= 0x7f * 512, historically */
224 length = rom[2] * 512;
226 /* if checksum okay, trust length byte */
227 if (length && romchecksum(rom, length))
228 video_rom_resource.end = start + length - 1;
230 request_resource(&iomem_resource, &video_rom_resource);
234 start = (video_rom_resource.end + 1 + 2047) & ~2047UL;
239 request_resource(&iomem_resource, &system_rom_resource);
240 upper = system_rom_resource.start;
242 /* check for extension rom (ignore length byte!) */
243 rom = isa_bus_to_virt(extension_rom_resource.start);
244 if (romsignature(rom)) {
245 length = extension_rom_resource.end - extension_rom_resource.start + 1;
246 if (romchecksum(rom, length)) {
247 request_resource(&iomem_resource, &extension_rom_resource);
248 upper = extension_rom_resource.start;
252 /* check for adapter roms on 2k boundaries */
253 for (i = 0; i < ADAPTER_ROM_RESOURCES && start < upper; start += 2048) {
254 rom = isa_bus_to_virt(start);
255 if (!romsignature(rom))
258 /* 0 < length <= 0x7f * 512, historically */
259 length = rom[2] * 512;
261 /* but accept any length that fits if checksum okay */
262 if (!length || start + length > upper || !romchecksum(rom, length))
265 adapter_rom_resources[i].start = start;
266 adapter_rom_resources[i].end = start + length - 1;
267 request_resource(&iomem_resource, &adapter_rom_resources[i]);
269 start = adapter_rom_resources[i++].end & ~2047UL;
273 static __init void parse_cmdline_early (char ** cmdline_p)
275 char c = ' ', *to = command_line, *from = COMMAND_LINE;
278 /* Save unparsed command line copy for /proc/cmdline */
279 memcpy(saved_command_line, COMMAND_LINE, COMMAND_LINE_SIZE);
280 saved_command_line[COMMAND_LINE_SIZE-1] = '\0';
288 * If the BIOS enumerates physical processors before logical,
289 * maxcpus=N at enumeration-time can be used to disable HT.
291 else if (!memcmp(from, "maxcpus=", 8)) {
292 extern unsigned int maxcpus;
294 maxcpus = simple_strtoul(from + 8, NULL, 0);
297 #ifdef CONFIG_ACPI_BOOT
298 /* "acpi=off" disables both ACPI table parsing and interpreter init */
299 if (!memcmp(from, "acpi=off", 8))
302 if (!memcmp(from, "acpi=force", 10)) {
303 /* add later when we do DMI horrors: */
308 /* acpi=ht just means: do ACPI MADT parsing
309 at bootup, but don't enable the full ACPI interpreter */
310 if (!memcmp(from, "acpi=ht", 7)) {
315 else if (!memcmp(from, "pci=noacpi", 10))
317 else if (!memcmp(from, "acpi=noirq", 10))
320 else if (!memcmp(from, "acpi_sci=edge", 13))
321 acpi_sci_flags.trigger = 1;
322 else if (!memcmp(from, "acpi_sci=level", 14))
323 acpi_sci_flags.trigger = 3;
324 else if (!memcmp(from, "acpi_sci=high", 13))
325 acpi_sci_flags.polarity = 1;
326 else if (!memcmp(from, "acpi_sci=low", 12))
327 acpi_sci_flags.polarity = 3;
329 /* acpi=strict disables out-of-spec workarounds */
330 else if (!memcmp(from, "acpi=strict", 11)) {
335 if (!memcmp(from, "nolapic", 7) ||
336 !memcmp(from, "disableapic", 11))
339 if (!memcmp(from, "noapic", 6))
340 skip_ioapic_setup = 1;
342 if (!memcmp(from, "apic", 4)) {
343 skip_ioapic_setup = 0;
347 if (!memcmp(from, "mem=", 4))
348 parse_memopt(from+4, &from);
350 #ifdef CONFIG_DISCONTIGMEM
351 if (!memcmp(from, "numa=", 5))
355 #ifdef CONFIG_GART_IOMMU
356 if (!memcmp(from,"iommu=",6)) {
361 if (!memcmp(from,"oops=panic", 10))
364 if (!memcmp(from, "noexec=", 7))
365 nonx_setup(from + 7);
371 if (COMMAND_LINE_SIZE <= ++len)
376 *cmdline_p = command_line;
379 #ifndef CONFIG_DISCONTIGMEM
380 static void __init contig_initmem_init(void)
382 unsigned long bootmap_size, bootmap;
383 bootmap_size = bootmem_bootmap_pages(end_pfn)<<PAGE_SHIFT;
384 bootmap = find_e820_area(0, end_pfn<<PAGE_SHIFT, bootmap_size);
386 panic("Cannot find bootmem map of size %ld\n",bootmap_size);
387 bootmap_size = init_bootmem(bootmap >> PAGE_SHIFT, end_pfn);
388 e820_bootmem_free(&contig_page_data, 0, end_pfn << PAGE_SHIFT);
389 reserve_bootmem(bootmap, bootmap_size);
393 /* Use inline assembly to define this because the nops are defined
394 as inline assembly strings in the include files and we cannot
395 get them easily into strings. */
396 asm("\t.data\nk8nops: "
397 K8_NOP1 K8_NOP2 K8_NOP3 K8_NOP4 K8_NOP5 K8_NOP6
400 extern unsigned char k8nops[];
401 static unsigned char *k8_nops[ASM_NOP_MAX+1] = {
407 k8nops + 1 + 2 + 3 + 4,
408 k8nops + 1 + 2 + 3 + 4 + 5,
409 k8nops + 1 + 2 + 3 + 4 + 5 + 6,
410 k8nops + 1 + 2 + 3 + 4 + 5 + 6 + 7,
413 /* Replace instructions with better alternatives for this CPU type.
415 This runs before SMP is initialized to avoid SMP problems with
416 self modifying code. This implies that assymetric systems where
417 APs have less capabilities than the boot processor are not handled.
418 In this case boot with "noreplacement". */
419 void apply_alternatives(void *start, void *end)
423 for (a = start; (void *)a < end; a++) {
424 if (!boot_cpu_has(a->cpuid))
427 BUG_ON(a->replacementlen > a->instrlen);
428 __inline_memcpy(a->instr, a->replacement, a->replacementlen);
429 diff = a->instrlen - a->replacementlen;
431 /* Pad the rest with nops */
432 for (i = a->replacementlen; diff > 0; diff -= k, i += k) {
436 __inline_memcpy(a->instr + i, k8_nops[k], k);
441 static int no_replacement __initdata = 0;
443 void __init alternative_instructions(void)
445 extern struct alt_instr __alt_instructions[], __alt_instructions_end[];
448 apply_alternatives(__alt_instructions, __alt_instructions_end);
451 static int __init noreplacement_setup(char *s)
457 __setup("noreplacement", noreplacement_setup);
459 #if defined(CONFIG_EDD) || defined(CONFIG_EDD_MODULE)
461 #ifdef CONFIG_EDD_MODULE
465 * copy_edd() - Copy the BIOS EDD information
466 * from boot_params into a safe place.
469 static inline void copy_edd(void)
471 memcpy(edd.mbr_signature, EDD_MBR_SIGNATURE, sizeof(edd.mbr_signature));
472 memcpy(edd.edd_info, EDD_BUF, sizeof(edd.edd_info));
473 edd.mbr_signature_nr = EDD_MBR_SIG_NR;
474 edd.edd_info_nr = EDD_NR;
477 static inline void copy_edd(void)
482 #define EBDA_ADDR_POINTER 0x40E
483 static void __init reserve_ebda_region(void)
487 * there is a real-mode segmented pointer pointing to the
488 * 4K EBDA area at 0x40E
490 addr = *(unsigned short *)phys_to_virt(EBDA_ADDR_POINTER);
493 reserve_bootmem_generic(addr, PAGE_SIZE);
496 void __init setup_arch(char **cmdline_p)
498 unsigned long low_mem_size;
499 unsigned long kernel_end;
501 ROOT_DEV = old_decode_dev(ORIG_ROOT_DEV);
502 drive_info = DRIVE_INFO;
503 screen_info = SCREEN_INFO;
504 edid_info = EDID_INFO;
505 saved_video_mode = SAVED_VIDEO_MODE;
506 bootloader_type = LOADER_TYPE;
508 #ifdef CONFIG_BLK_DEV_RAM
509 rd_image_start = RAMDISK_FLAGS & RAMDISK_IMAGE_START_MASK;
510 rd_prompt = ((RAMDISK_FLAGS & RAMDISK_PROMPT_FLAG) != 0);
511 rd_doload = ((RAMDISK_FLAGS & RAMDISK_LOAD_FLAG) != 0);
513 setup_memory_region();
516 if (!MOUNT_ROOT_RDONLY)
517 root_mountflags &= ~MS_RDONLY;
518 init_mm.start_code = (unsigned long) &_text;
519 init_mm.end_code = (unsigned long) &_etext;
520 init_mm.end_data = (unsigned long) &_edata;
521 init_mm.brk = (unsigned long) &_end;
523 code_resource.start = virt_to_phys(&_text);
524 code_resource.end = virt_to_phys(&_etext)-1;
525 data_resource.start = virt_to_phys(&_etext);
526 data_resource.end = virt_to_phys(&_edata)-1;
528 parse_cmdline_early(cmdline_p);
530 early_identify_cpu(&boot_cpu_data);
533 * partially used pages are not usable - thus
534 * we are rounding upwards:
536 end_pfn = e820_end_of_ram();
540 init_memory_mapping(0, (end_pfn_map << PAGE_SHIFT));
542 #ifdef CONFIG_ACPI_BOOT
544 * Initialize the ACPI boot-time table parser (gets the RSDP and SDT).
545 * Call this early for SRAT node setup.
547 acpi_boot_table_init();
550 #ifdef CONFIG_ACPI_NUMA
552 * Parse SRAT to discover nodes.
557 #ifdef CONFIG_DISCONTIGMEM
558 numa_initmem_init(0, end_pfn);
560 contig_initmem_init();
563 /* Reserve direct mapping */
564 reserve_bootmem_generic(table_start << PAGE_SHIFT,
565 (table_end - table_start) << PAGE_SHIFT);
568 kernel_end = round_up(__pa_symbol(&_end),PAGE_SIZE);
569 reserve_bootmem_generic(HIGH_MEMORY, kernel_end - HIGH_MEMORY);
572 * reserve physical page 0 - it's a special BIOS page on many boxes,
573 * enabling clean reboots, SMP operation, laptop functions.
575 reserve_bootmem_generic(0, PAGE_SIZE);
577 /* reserve ebda region */
578 reserve_ebda_region();
582 * But first pinch a few for the stack/trampoline stuff
583 * FIXME: Don't need the extra page at 4K, but need to fix
584 * trampoline before removing it. (see the GDT stuff)
586 reserve_bootmem_generic(PAGE_SIZE, PAGE_SIZE);
588 /* Reserve SMP trampoline */
589 reserve_bootmem_generic(SMP_TRAMPOLINE_BASE, PAGE_SIZE);
592 #ifdef CONFIG_ACPI_SLEEP
594 * Reserve low memory region for sleep support.
596 acpi_reserve_bootmem();
598 #ifdef CONFIG_X86_LOCAL_APIC
600 * Find and reserve possible boot-time SMP configuration:
604 #ifdef CONFIG_BLK_DEV_INITRD
605 if (LOADER_TYPE && INITRD_START) {
606 if (INITRD_START + INITRD_SIZE <= (end_pfn << PAGE_SHIFT)) {
607 reserve_bootmem_generic(INITRD_START, INITRD_SIZE);
609 INITRD_START ? INITRD_START + PAGE_OFFSET : 0;
610 initrd_end = initrd_start+INITRD_SIZE;
613 printk(KERN_ERR "initrd extends beyond end of memory "
614 "(0x%08lx > 0x%08lx)\ndisabling initrd\n",
615 (unsigned long)(INITRD_START + INITRD_SIZE),
616 (unsigned long)(end_pfn << PAGE_SHIFT));
625 #ifdef CONFIG_ACPI_BOOT
627 * Read APIC and some other early information from ACPI tables.
632 #ifdef CONFIG_X86_LOCAL_APIC
634 * get boot-time SMP configuration:
636 if (smp_found_config)
638 init_apic_mappings();
642 * Request address space for all standard RAM and ROM resources
643 * and also for regions reported as reserved by the e820.
646 e820_reserve_resources();
648 request_resource(&iomem_resource, &video_ram_resource);
652 /* request I/O space for devices used on all i[345]86 PCs */
653 for (i = 0; i < STANDARD_IO_RESOURCES; i++)
654 request_resource(&ioport_resource, &standard_io_resources[i]);
657 /* Will likely break when you have unassigned resources with more
658 than 4GB memory and bridges that don't support more than 4GB.
659 Doing it properly would require to use pci_alloc_consistent
661 low_mem_size = ((end_pfn << PAGE_SHIFT) + 0xfffff) & ~0xfffff;
662 if (low_mem_size > pci_mem_start)
663 pci_mem_start = low_mem_size;
665 #ifdef CONFIG_GART_IOMMU
670 #if defined(CONFIG_VGA_CONSOLE)
671 conswitchp = &vga_con;
672 #elif defined(CONFIG_DUMMY_CONSOLE)
673 conswitchp = &dummy_con;
678 static int __init get_model_name(struct cpuinfo_x86 *c)
682 if (c->x86_cpuid_level < 0x80000004)
685 v = (unsigned int *) c->x86_model_id;
686 cpuid(0x80000002, &v[0], &v[1], &v[2], &v[3]);
687 cpuid(0x80000003, &v[4], &v[5], &v[6], &v[7]);
688 cpuid(0x80000004, &v[8], &v[9], &v[10], &v[11]);
689 c->x86_model_id[48] = 0;
694 static void __init display_cacheinfo(struct cpuinfo_x86 *c)
696 unsigned int n, dummy, eax, ebx, ecx, edx;
698 n = c->x86_cpuid_level;
700 if (n >= 0x80000005) {
701 cpuid(0x80000005, &dummy, &ebx, &ecx, &edx);
702 printk(KERN_INFO "CPU: L1 I Cache: %dK (%d bytes/line), D cache %dK (%d bytes/line)\n",
703 edx>>24, edx&0xFF, ecx>>24, ecx&0xFF);
704 c->x86_cache_size=(ecx>>24)+(edx>>24);
705 /* On K8 L1 TLB is inclusive, so don't count it */
709 if (n >= 0x80000006) {
710 cpuid(0x80000006, &dummy, &ebx, &ecx, &edx);
711 ecx = cpuid_ecx(0x80000006);
712 c->x86_cache_size = ecx >> 16;
713 c->x86_tlbsize += ((ebx >> 16) & 0xfff) + (ebx & 0xfff);
715 printk(KERN_INFO "CPU: L2 Cache: %dK (%d bytes/line)\n",
716 c->x86_cache_size, ecx & 0xFF);
720 cpuid(0x80000007, &dummy, &dummy, &dummy, &c->x86_power);
721 if (n >= 0x80000008) {
722 cpuid(0x80000008, &eax, &dummy, &dummy, &dummy);
723 c->x86_virt_bits = (eax >> 8) & 0xff;
724 c->x86_phys_bits = eax & 0xff;
729 static int __init init_amd(struct cpuinfo_x86 *c)
737 /* Bit 31 in normal CPUID used for nonstandard 3DNow ID;
738 3DNow is IDd by bit 31 in extended CPUID (1*32+31) anyway */
739 clear_bit(0*32+31, &c->x86_capability);
742 level = cpuid_eax(1);
743 if ((level >= 0x0f48 && level < 0x0f50) || level >= 0x0f58)
744 set_bit(X86_FEATURE_K8_C, &c->x86_capability);
746 r = get_model_name(c);
750 /* Should distinguish Models here, but this is only
751 a fallback anyways. */
752 strcpy(c->x86_model_id, "Hammer");
756 display_cacheinfo(c);
758 if (c->x86_cpuid_level >= 0x80000008) {
759 c->x86_num_cores = (cpuid_ecx(0x80000008) & 0xff) + 1;
760 if (c->x86_num_cores & (c->x86_num_cores - 1))
761 c->x86_num_cores = 1;
764 /* On a dual core setup the lower bits of apic id
765 distingush the cores. Fix up the CPU<->node mappings
767 Assumes number of cores is a power of two.
768 When using SRAT use mapping from SRAT. */
770 if (acpi_numa <= 0 && c->x86_num_cores > 1) {
771 cpu_to_node[cpu] = cpu >> hweight32(c->x86_num_cores - 1);
772 if (!node_online(cpu_to_node[cpu]))
773 cpu_to_node[cpu] = first_node(node_online_map);
775 printk(KERN_INFO "CPU %d(%d) -> Node %d\n",
776 cpu, c->x86_num_cores, cpu_to_node[cpu]);
783 static void __init detect_ht(struct cpuinfo_x86 *c)
786 u32 eax, ebx, ecx, edx;
787 int index_lsb, index_msb, tmp;
788 int cpu = smp_processor_id();
790 if (!cpu_has(c, X86_FEATURE_HT))
793 cpuid(1, &eax, &ebx, &ecx, &edx);
794 smp_num_siblings = (ebx & 0xff0000) >> 16;
796 if (smp_num_siblings == 1) {
797 printk(KERN_INFO "CPU: Hyper-Threading is disabled\n");
798 } else if (smp_num_siblings > 1) {
802 * At this point we only support two siblings per
805 if (smp_num_siblings > NR_CPUS) {
806 printk(KERN_WARNING "CPU: Unsupported number of the siblings %d", smp_num_siblings);
807 smp_num_siblings = 1;
810 tmp = smp_num_siblings;
811 while ((tmp & 1) == 0) {
815 tmp = smp_num_siblings;
816 while ((tmp & 0x80000000 ) == 0) {
820 if (index_lsb != index_msb )
822 phys_proc_id[cpu] = phys_pkg_id(index_msb);
824 printk(KERN_INFO "CPU: Physical Processor ID: %d\n",
830 static void __init sched_cmp_hack(struct cpuinfo_x86 *c)
833 /* AMD dual core looks like HT but isn't really. Hide it from the
834 scheduler. This works around problems with the domain scheduler.
835 Also probably gives slightly better scheduling and disables
836 SMT nice which is harmful on dual core.
837 TBD tune the domain scheduler for dual core. */
838 if (c->x86_vendor == X86_VENDOR_AMD && cpu_has(c, X86_FEATURE_CMP_LEGACY))
839 smp_num_siblings = 1;
843 static void __init init_intel(struct cpuinfo_x86 *c)
848 init_intel_cacheinfo(c);
849 n = c->x86_cpuid_level;
850 if (n >= 0x80000008) {
851 unsigned eax = cpuid_eax(0x80000008);
852 c->x86_virt_bits = (eax >> 8) & 0xff;
853 c->x86_phys_bits = eax & 0xff;
857 c->x86_cache_alignment = c->x86_clflush_size * 2;
859 set_bit(X86_FEATURE_CONSTANT_TSC, &c->x86_capability);
862 void __init get_cpu_vendor(struct cpuinfo_x86 *c)
864 char *v = c->x86_vendor_id;
866 if (!strcmp(v, "AuthenticAMD"))
867 c->x86_vendor = X86_VENDOR_AMD;
868 else if (!strcmp(v, "GenuineIntel"))
869 c->x86_vendor = X86_VENDOR_INTEL;
871 c->x86_vendor = X86_VENDOR_UNKNOWN;
874 struct cpu_model_info {
877 char *model_names[16];
880 /* Do some early cpuid on the boot CPU to get some parameter that are
881 needed before check_bugs. Everything advanced is in identify_cpu
883 void __init early_identify_cpu(struct cpuinfo_x86 *c)
887 c->loops_per_jiffy = loops_per_jiffy;
888 c->x86_cache_size = -1;
889 c->x86_vendor = X86_VENDOR_UNKNOWN;
890 c->x86_model = c->x86_mask = 0; /* So far unknown... */
891 c->x86_vendor_id[0] = '\0'; /* Unset */
892 c->x86_model_id[0] = '\0'; /* Unset */
893 c->x86_clflush_size = 64;
894 c->x86_cache_alignment = c->x86_clflush_size;
895 c->x86_num_cores = 1;
896 c->x86_apicid = c == &boot_cpu_data ? 0 : c - cpu_data;
897 c->x86_cpuid_level = 0;
898 memset(&c->x86_capability, 0, sizeof c->x86_capability);
900 /* Get vendor name */
901 cpuid(0x00000000, (unsigned int *)&c->cpuid_level,
902 (unsigned int *)&c->x86_vendor_id[0],
903 (unsigned int *)&c->x86_vendor_id[8],
904 (unsigned int *)&c->x86_vendor_id[4]);
908 /* Initialize the standard set of capabilities */
909 /* Note that the vendor-specific code below might override */
911 /* Intel-defined flags: level 0x00000001 */
912 if (c->cpuid_level >= 0x00000001) {
914 cpuid(0x00000001, &tfms, &misc, &c->x86_capability[4],
915 &c->x86_capability[0]);
916 c->x86 = (tfms >> 8) & 0xf;
917 c->x86_model = (tfms >> 4) & 0xf;
918 c->x86_mask = tfms & 0xf;
920 c->x86 += (tfms >> 20) & 0xff;
921 c->x86_model += ((tfms >> 16) & 0xF) << 4;
923 if (c->x86_capability[0] & (1<<19))
924 c->x86_clflush_size = ((misc >> 8) & 0xff) * 8;
925 c->x86_apicid = misc >> 24;
927 /* Have CPUID level 0 only - unheard of */
933 * This does the hard work of actually picking apart the CPU stuff...
935 void __init identify_cpu(struct cpuinfo_x86 *c)
940 early_identify_cpu(c);
942 /* AMD-defined flags: level 0x80000001 */
943 xlvl = cpuid_eax(0x80000000);
944 c->x86_cpuid_level = xlvl;
945 if ((xlvl & 0xffff0000) == 0x80000000) {
946 if (xlvl >= 0x80000001) {
947 c->x86_capability[1] = cpuid_edx(0x80000001);
948 c->x86_capability[5] = cpuid_ecx(0x80000001);
950 if (xlvl >= 0x80000004)
951 get_model_name(c); /* Default name */
954 /* Transmeta-defined flags: level 0x80860001 */
955 xlvl = cpuid_eax(0x80860000);
956 if ((xlvl & 0xffff0000) == 0x80860000) {
957 /* Don't set x86_cpuid_level here for now to not confuse. */
958 if (xlvl >= 0x80860001)
959 c->x86_capability[2] = cpuid_edx(0x80860001);
963 * Vendor-specific initialization. In this section we
964 * canonicalize the feature flags, meaning if there are
965 * features a certain CPU supports which CPUID doesn't
966 * tell us, CPUID claiming incorrect flags, or other bugs,
967 * we handle them here.
969 * At the end of this section, c->x86_capability better
970 * indicate the features this CPU genuinely supports!
972 switch (c->x86_vendor) {
977 case X86_VENDOR_INTEL:
981 case X86_VENDOR_UNKNOWN:
983 display_cacheinfo(c);
987 select_idle_routine(c);
992 * On SMP, boot_cpu_data holds the common feature set between
993 * all CPUs; so make sure that we indicate which features are
994 * common between the CPUs. The first time this routine gets
995 * executed, c == &boot_cpu_data.
997 if (c != &boot_cpu_data) {
998 /* AND the already accumulated flags with these */
999 for (i = 0 ; i < NCAPINTS ; i++)
1000 boot_cpu_data.x86_capability[i] &= c->x86_capability[i];
1003 #ifdef CONFIG_X86_MCE
1007 if (c != &boot_cpu_data)
1008 numa_add_cpu(c - cpu_data);
1013 void __init print_cpu_info(struct cpuinfo_x86 *c)
1015 if (c->x86_model_id[0])
1016 printk("%s", c->x86_model_id);
1018 if (c->x86_mask || c->cpuid_level >= 0)
1019 printk(" stepping %02x\n", c->x86_mask);
1025 * Get CPU information for use by the procfs.
1028 static int show_cpuinfo(struct seq_file *m, void *v)
1030 struct cpuinfo_x86 *c = v;
1033 * These flag bits must match the definitions in <asm/cpufeature.h>.
1034 * NULL means this bit is undefined or reserved; either way it doesn't
1035 * have meaning as far as Linux is concerned. Note that it's important
1036 * to realize there is a difference between this table and CPUID -- if
1037 * applications want to get the raw CPUID data, they should access
1038 * /dev/cpu/<cpu_nr>/cpuid instead.
1040 static char *x86_cap_flags[] = {
1042 "fpu", "vme", "de", "pse", "tsc", "msr", "pae", "mce",
1043 "cx8", "apic", NULL, "sep", "mtrr", "pge", "mca", "cmov",
1044 "pat", "pse36", "pn", "clflush", NULL, "dts", "acpi", "mmx",
1045 "fxsr", "sse", "sse2", "ss", "ht", "tm", "ia64", NULL,
1048 "pni", NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1049 NULL, NULL, NULL, "syscall", NULL, NULL, NULL, NULL,
1050 NULL, NULL, NULL, NULL, "nx", NULL, "mmxext", NULL,
1051 NULL, "fxsr_opt", NULL, NULL, NULL, "lm", "3dnowext", "3dnow",
1053 /* Transmeta-defined */
1054 "recovery", "longrun", NULL, "lrti", NULL, NULL, NULL, NULL,
1055 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1056 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1057 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1059 /* Other (Linux-defined) */
1060 "cxmmx", NULL, "cyrix_arr", "centaur_mcr", "k8c+",
1061 "constant_tsc", NULL, NULL,
1062 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1063 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1064 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1066 /* Intel-defined (#2) */
1067 "pni", NULL, NULL, "monitor", "ds_cpl", NULL, NULL, "est",
1068 "tm2", NULL, "cid", NULL, NULL, "cx16", "xtpr", NULL,
1069 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1070 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1072 /* AMD-defined (#2) */
1073 "lahf_lm", "cmp_legacy", NULL, NULL, NULL, NULL, NULL, NULL,
1074 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1075 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1076 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL
1078 static char *x86_power_flags[] = {
1079 "ts", /* temperature sensor */
1080 "fid", /* frequency id control */
1081 "vid", /* voltage id control */
1082 "ttp", /* thermal trip */
1089 if (!cpu_online(c-cpu_data))
1093 seq_printf(m,"processor\t: %u\n"
1095 "cpu family\t: %d\n"
1097 "model name\t: %s\n",
1098 (unsigned)(c-cpu_data),
1099 c->x86_vendor_id[0] ? c->x86_vendor_id : "unknown",
1102 c->x86_model_id[0] ? c->x86_model_id : "unknown");
1104 if (c->x86_mask || c->cpuid_level >= 0)
1105 seq_printf(m, "stepping\t: %d\n", c->x86_mask);
1107 seq_printf(m, "stepping\t: unknown\n");
1109 if (cpu_has(c,X86_FEATURE_TSC)) {
1110 seq_printf(m, "cpu MHz\t\t: %u.%03u\n",
1111 cpu_khz / 1000, (cpu_khz % 1000));
1115 if (c->x86_cache_size >= 0)
1116 seq_printf(m, "cache size\t: %d KB\n", c->x86_cache_size);
1119 if (smp_num_siblings * c->x86_num_cores > 1) {
1120 int cpu = c - cpu_data;
1121 seq_printf(m, "physical id\t: %d\n", phys_proc_id[cpu]);
1122 seq_printf(m, "siblings\t: %d\n",
1123 c->x86_num_cores * smp_num_siblings);
1129 "fpu_exception\t: yes\n"
1130 "cpuid level\t: %d\n"
1137 for ( i = 0 ; i < 32*NCAPINTS ; i++ )
1138 if ( test_bit(i, &c->x86_capability) &&
1139 x86_cap_flags[i] != NULL )
1140 seq_printf(m, " %s", x86_cap_flags[i]);
1143 seq_printf(m, "\nbogomips\t: %lu.%02lu\n",
1144 c->loops_per_jiffy/(500000/HZ),
1145 (c->loops_per_jiffy/(5000/HZ)) % 100);
1147 if (c->x86_tlbsize > 0)
1148 seq_printf(m, "TLB size\t: %d 4K pages\n", c->x86_tlbsize);
1149 seq_printf(m, "clflush size\t: %d\n", c->x86_clflush_size);
1150 seq_printf(m, "cache_alignment\t: %d\n", c->x86_cache_alignment);
1152 seq_printf(m, "address sizes\t: %u bits physical, %u bits virtual\n",
1153 c->x86_phys_bits, c->x86_virt_bits);
1155 seq_printf(m, "power management:");
1158 for (i = 0; i < 32; i++)
1159 if (c->x86_power & (1 << i)) {
1160 if (i < ARRAY_SIZE(x86_power_flags))
1161 seq_printf(m, " %s", x86_power_flags[i]);
1163 seq_printf(m, " [%d]", i);
1166 seq_printf(m, "\n");
1168 if (c->x86_num_cores > 1)
1169 seq_printf(m, "cpu cores\t: %d\n", c->x86_num_cores);
1171 seq_printf(m, "\n\n");
1176 static void *c_start(struct seq_file *m, loff_t *pos)
1178 return *pos < NR_CPUS ? cpu_data + *pos : NULL;
1181 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
1184 return c_start(m, pos);
1187 static void c_stop(struct seq_file *m, void *v)
1191 struct seq_operations cpuinfo_op = {
1195 .show = show_cpuinfo,