2 * linux/arch/x86-64/kernel/setup.c
4 * Copyright (C) 1995 Linus Torvalds
6 * Nov 2001 Dave Jones <davej@suse.de>
7 * Forked from i386 setup code.
13 * This file handles the architecture-dependent parts of initialization
16 #include <linux/errno.h>
17 #include <linux/sched.h>
18 #include <linux/kernel.h>
20 #include <linux/stddef.h>
21 #include <linux/unistd.h>
22 #include <linux/ptrace.h>
23 #include <linux/slab.h>
24 #include <linux/user.h>
25 #include <linux/a.out.h>
26 #include <linux/tty.h>
27 #include <linux/ioport.h>
28 #include <linux/delay.h>
29 #include <linux/config.h>
30 #include <linux/init.h>
31 #include <linux/initrd.h>
32 #include <linux/highmem.h>
33 #include <linux/bootmem.h>
34 #include <linux/module.h>
35 #include <asm/processor.h>
36 #include <linux/console.h>
37 #include <linux/seq_file.h>
38 #include <linux/root_dev.h>
39 #include <linux/pci.h>
40 #include <linux/acpi.h>
41 #include <linux/kallsyms.h>
42 #include <linux/edd.h>
43 #include <linux/mmzone.h>
44 #include <linux/kexec.h>
47 #include <asm/uaccess.h>
48 #include <asm/system.h>
53 #include <video/edid.h>
56 #include <asm/mpspec.h>
57 #include <asm/mmu_context.h>
58 #include <asm/bootsetup.h>
59 #include <asm/proto.h>
60 #include <asm/setup.h>
61 #include <asm/mach_apic.h>
63 #include <asm/sections.h>
69 struct cpuinfo_x86 boot_cpu_data __read_mostly;
71 unsigned long mmu_cr4_features;
74 EXPORT_SYMBOL(acpi_disabled);
76 extern int __initdata acpi_ht;
77 extern acpi_interrupt_flags acpi_sci_flags;
78 int __initdata acpi_force = 0;
81 int acpi_numa __initdata;
83 /* Boot loader ID as an integer, for the benefit of proc_dointvec */
86 unsigned long saved_video_mode;
90 EXPORT_SYMBOL(swiotlb);
96 struct drive_info_struct { char dummy[32]; } drive_info;
97 struct screen_info screen_info;
98 struct sys_desc_table_struct {
99 unsigned short length;
100 unsigned char table[0];
103 struct edid_info edid_info;
106 extern int root_mountflags;
108 char command_line[COMMAND_LINE_SIZE];
110 struct resource standard_io_resources[] = {
111 { .name = "dma1", .start = 0x00, .end = 0x1f,
112 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
113 { .name = "pic1", .start = 0x20, .end = 0x21,
114 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
115 { .name = "timer0", .start = 0x40, .end = 0x43,
116 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
117 { .name = "timer1", .start = 0x50, .end = 0x53,
118 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
119 { .name = "keyboard", .start = 0x60, .end = 0x6f,
120 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
121 { .name = "dma page reg", .start = 0x80, .end = 0x8f,
122 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
123 { .name = "pic2", .start = 0xa0, .end = 0xa1,
124 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
125 { .name = "dma2", .start = 0xc0, .end = 0xdf,
126 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
127 { .name = "fpu", .start = 0xf0, .end = 0xff,
128 .flags = IORESOURCE_BUSY | IORESOURCE_IO }
131 #define STANDARD_IO_RESOURCES \
132 (sizeof standard_io_resources / sizeof standard_io_resources[0])
134 #define IORESOURCE_RAM (IORESOURCE_BUSY | IORESOURCE_MEM)
136 struct resource data_resource = {
137 .name = "Kernel data",
140 .flags = IORESOURCE_RAM,
142 struct resource code_resource = {
143 .name = "Kernel code",
146 .flags = IORESOURCE_RAM,
149 #define IORESOURCE_ROM (IORESOURCE_BUSY | IORESOURCE_READONLY | IORESOURCE_MEM)
151 static struct resource system_rom_resource = {
152 .name = "System ROM",
155 .flags = IORESOURCE_ROM,
158 static struct resource extension_rom_resource = {
159 .name = "Extension ROM",
162 .flags = IORESOURCE_ROM,
165 static struct resource adapter_rom_resources[] = {
166 { .name = "Adapter ROM", .start = 0xc8000, .end = 0,
167 .flags = IORESOURCE_ROM },
168 { .name = "Adapter ROM", .start = 0, .end = 0,
169 .flags = IORESOURCE_ROM },
170 { .name = "Adapter ROM", .start = 0, .end = 0,
171 .flags = IORESOURCE_ROM },
172 { .name = "Adapter ROM", .start = 0, .end = 0,
173 .flags = IORESOURCE_ROM },
174 { .name = "Adapter ROM", .start = 0, .end = 0,
175 .flags = IORESOURCE_ROM },
176 { .name = "Adapter ROM", .start = 0, .end = 0,
177 .flags = IORESOURCE_ROM }
180 #define ADAPTER_ROM_RESOURCES \
181 (sizeof adapter_rom_resources / sizeof adapter_rom_resources[0])
183 static struct resource video_rom_resource = {
187 .flags = IORESOURCE_ROM,
190 static struct resource video_ram_resource = {
191 .name = "Video RAM area",
194 .flags = IORESOURCE_RAM,
197 #define romsignature(x) (*(unsigned short *)(x) == 0xaa55)
199 static int __init romchecksum(unsigned char *rom, unsigned long length)
201 unsigned char *p, sum = 0;
203 for (p = rom; p < rom + length; p++)
208 static void __init probe_roms(void)
210 unsigned long start, length, upper;
215 upper = adapter_rom_resources[0].start;
216 for (start = video_rom_resource.start; start < upper; start += 2048) {
217 rom = isa_bus_to_virt(start);
218 if (!romsignature(rom))
221 video_rom_resource.start = start;
223 /* 0 < length <= 0x7f * 512, historically */
224 length = rom[2] * 512;
226 /* if checksum okay, trust length byte */
227 if (length && romchecksum(rom, length))
228 video_rom_resource.end = start + length - 1;
230 request_resource(&iomem_resource, &video_rom_resource);
234 start = (video_rom_resource.end + 1 + 2047) & ~2047UL;
239 request_resource(&iomem_resource, &system_rom_resource);
240 upper = system_rom_resource.start;
242 /* check for extension rom (ignore length byte!) */
243 rom = isa_bus_to_virt(extension_rom_resource.start);
244 if (romsignature(rom)) {
245 length = extension_rom_resource.end - extension_rom_resource.start + 1;
246 if (romchecksum(rom, length)) {
247 request_resource(&iomem_resource, &extension_rom_resource);
248 upper = extension_rom_resource.start;
252 /* check for adapter roms on 2k boundaries */
253 for (i = 0; i < ADAPTER_ROM_RESOURCES && start < upper; start += 2048) {
254 rom = isa_bus_to_virt(start);
255 if (!romsignature(rom))
258 /* 0 < length <= 0x7f * 512, historically */
259 length = rom[2] * 512;
261 /* but accept any length that fits if checksum okay */
262 if (!length || start + length > upper || !romchecksum(rom, length))
265 adapter_rom_resources[i].start = start;
266 adapter_rom_resources[i].end = start + length - 1;
267 request_resource(&iomem_resource, &adapter_rom_resources[i]);
269 start = adapter_rom_resources[i++].end & ~2047UL;
273 static __init void parse_cmdline_early (char ** cmdline_p)
275 char c = ' ', *to = command_line, *from = COMMAND_LINE;
278 /* Save unparsed command line copy for /proc/cmdline */
279 memcpy(saved_command_line, COMMAND_LINE, COMMAND_LINE_SIZE);
280 saved_command_line[COMMAND_LINE_SIZE-1] = '\0';
288 * If the BIOS enumerates physical processors before logical,
289 * maxcpus=N at enumeration-time can be used to disable HT.
291 else if (!memcmp(from, "maxcpus=", 8)) {
292 extern unsigned int maxcpus;
294 maxcpus = simple_strtoul(from + 8, NULL, 0);
298 /* "acpi=off" disables both ACPI table parsing and interpreter init */
299 if (!memcmp(from, "acpi=off", 8))
302 if (!memcmp(from, "acpi=force", 10)) {
303 /* add later when we do DMI horrors: */
308 /* acpi=ht just means: do ACPI MADT parsing
309 at bootup, but don't enable the full ACPI interpreter */
310 if (!memcmp(from, "acpi=ht", 7)) {
315 else if (!memcmp(from, "pci=noacpi", 10))
317 else if (!memcmp(from, "acpi=noirq", 10))
320 else if (!memcmp(from, "acpi_sci=edge", 13))
321 acpi_sci_flags.trigger = 1;
322 else if (!memcmp(from, "acpi_sci=level", 14))
323 acpi_sci_flags.trigger = 3;
324 else if (!memcmp(from, "acpi_sci=high", 13))
325 acpi_sci_flags.polarity = 1;
326 else if (!memcmp(from, "acpi_sci=low", 12))
327 acpi_sci_flags.polarity = 3;
329 /* acpi=strict disables out-of-spec workarounds */
330 else if (!memcmp(from, "acpi=strict", 11)) {
333 #ifdef CONFIG_X86_IO_APIC
334 else if (!memcmp(from, "acpi_skip_timer_override", 24))
335 acpi_skip_timer_override = 1;
339 if (!memcmp(from, "disable_timer_pin_1", 19))
340 disable_timer_pin_1 = 1;
341 if (!memcmp(from, "enable_timer_pin_1", 18))
342 disable_timer_pin_1 = -1;
344 if (!memcmp(from, "nolapic", 7) ||
345 !memcmp(from, "disableapic", 11))
348 if (!memcmp(from, "noapic", 6))
349 skip_ioapic_setup = 1;
351 if (!memcmp(from, "apic", 4)) {
352 skip_ioapic_setup = 0;
356 if (!memcmp(from, "mem=", 4))
357 parse_memopt(from+4, &from);
360 if (!memcmp(from, "numa=", 5))
364 #ifdef CONFIG_GART_IOMMU
365 if (!memcmp(from,"iommu=",6)) {
370 if (!memcmp(from,"oops=panic", 10))
373 if (!memcmp(from, "noexec=", 7))
374 nonx_setup(from + 7);
377 /* crashkernel=size@addr specifies the location to reserve for
378 * a crash kernel. By reserving this memory we guarantee
379 * that linux never set's it up as a DMA target.
380 * Useful for holding code to do something appropriate
381 * after a kernel panic.
383 else if (!memcmp(from, "crashkernel=", 12)) {
384 unsigned long size, base;
385 size = memparse(from+12, &from);
387 base = memparse(from+1, &from);
388 /* FIXME: Do I want a sanity check
389 * to validate the memory range?
391 crashk_res.start = base;
392 crashk_res.end = base + size - 1;
401 if (COMMAND_LINE_SIZE <= ++len)
406 *cmdline_p = command_line;
411 contig_initmem_init(unsigned long start_pfn, unsigned long end_pfn)
413 unsigned long bootmap_size, bootmap;
415 memory_present(0, start_pfn, end_pfn);
416 bootmap_size = bootmem_bootmap_pages(end_pfn)<<PAGE_SHIFT;
417 bootmap = find_e820_area(0, end_pfn<<PAGE_SHIFT, bootmap_size);
419 panic("Cannot find bootmem map of size %ld\n",bootmap_size);
420 bootmap_size = init_bootmem(bootmap >> PAGE_SHIFT, end_pfn);
421 e820_bootmem_free(NODE_DATA(0), 0, end_pfn << PAGE_SHIFT);
422 reserve_bootmem(bootmap, bootmap_size);
426 /* Use inline assembly to define this because the nops are defined
427 as inline assembly strings in the include files and we cannot
428 get them easily into strings. */
429 asm("\t.data\nk8nops: "
430 K8_NOP1 K8_NOP2 K8_NOP3 K8_NOP4 K8_NOP5 K8_NOP6
433 extern unsigned char k8nops[];
434 static unsigned char *k8_nops[ASM_NOP_MAX+1] = {
440 k8nops + 1 + 2 + 3 + 4,
441 k8nops + 1 + 2 + 3 + 4 + 5,
442 k8nops + 1 + 2 + 3 + 4 + 5 + 6,
443 k8nops + 1 + 2 + 3 + 4 + 5 + 6 + 7,
446 /* Replace instructions with better alternatives for this CPU type.
448 This runs before SMP is initialized to avoid SMP problems with
449 self modifying code. This implies that assymetric systems where
450 APs have less capabilities than the boot processor are not handled.
451 In this case boot with "noreplacement". */
452 void apply_alternatives(void *start, void *end)
456 for (a = start; (void *)a < end; a++) {
457 if (!boot_cpu_has(a->cpuid))
460 BUG_ON(a->replacementlen > a->instrlen);
461 __inline_memcpy(a->instr, a->replacement, a->replacementlen);
462 diff = a->instrlen - a->replacementlen;
464 /* Pad the rest with nops */
465 for (i = a->replacementlen; diff > 0; diff -= k, i += k) {
469 __inline_memcpy(a->instr + i, k8_nops[k], k);
474 static int no_replacement __initdata = 0;
476 void __init alternative_instructions(void)
478 extern struct alt_instr __alt_instructions[], __alt_instructions_end[];
481 apply_alternatives(__alt_instructions, __alt_instructions_end);
484 static int __init noreplacement_setup(char *s)
490 __setup("noreplacement", noreplacement_setup);
492 #if defined(CONFIG_EDD) || defined(CONFIG_EDD_MODULE)
494 #ifdef CONFIG_EDD_MODULE
498 * copy_edd() - Copy the BIOS EDD information
499 * from boot_params into a safe place.
502 static inline void copy_edd(void)
504 memcpy(edd.mbr_signature, EDD_MBR_SIGNATURE, sizeof(edd.mbr_signature));
505 memcpy(edd.edd_info, EDD_BUF, sizeof(edd.edd_info));
506 edd.mbr_signature_nr = EDD_MBR_SIG_NR;
507 edd.edd_info_nr = EDD_NR;
510 static inline void copy_edd(void)
515 #define EBDA_ADDR_POINTER 0x40E
516 static void __init reserve_ebda_region(void)
520 * there is a real-mode segmented pointer pointing to the
521 * 4K EBDA area at 0x40E
523 addr = *(unsigned short *)phys_to_virt(EBDA_ADDR_POINTER);
526 reserve_bootmem_generic(addr, PAGE_SIZE);
529 void __init setup_arch(char **cmdline_p)
531 unsigned long kernel_end;
533 ROOT_DEV = old_decode_dev(ORIG_ROOT_DEV);
534 drive_info = DRIVE_INFO;
535 screen_info = SCREEN_INFO;
536 edid_info = EDID_INFO;
537 saved_video_mode = SAVED_VIDEO_MODE;
538 bootloader_type = LOADER_TYPE;
540 #ifdef CONFIG_BLK_DEV_RAM
541 rd_image_start = RAMDISK_FLAGS & RAMDISK_IMAGE_START_MASK;
542 rd_prompt = ((RAMDISK_FLAGS & RAMDISK_PROMPT_FLAG) != 0);
543 rd_doload = ((RAMDISK_FLAGS & RAMDISK_LOAD_FLAG) != 0);
545 setup_memory_region();
548 if (!MOUNT_ROOT_RDONLY)
549 root_mountflags &= ~MS_RDONLY;
550 init_mm.start_code = (unsigned long) &_text;
551 init_mm.end_code = (unsigned long) &_etext;
552 init_mm.end_data = (unsigned long) &_edata;
553 init_mm.brk = (unsigned long) &_end;
555 code_resource.start = virt_to_phys(&_text);
556 code_resource.end = virt_to_phys(&_etext)-1;
557 data_resource.start = virt_to_phys(&_etext);
558 data_resource.end = virt_to_phys(&_edata)-1;
560 parse_cmdline_early(cmdline_p);
562 early_identify_cpu(&boot_cpu_data);
565 * partially used pages are not usable - thus
566 * we are rounding upwards:
568 end_pfn = e820_end_of_ram();
572 init_memory_mapping(0, (end_pfn_map << PAGE_SHIFT));
578 * Initialize the ACPI boot-time table parser (gets the RSDP and SDT).
579 * Call this early for SRAT node setup.
581 acpi_boot_table_init();
584 #ifdef CONFIG_ACPI_NUMA
586 * Parse SRAT to discover nodes.
592 numa_initmem_init(0, end_pfn);
594 contig_initmem_init(0, end_pfn);
597 /* Reserve direct mapping */
598 reserve_bootmem_generic(table_start << PAGE_SHIFT,
599 (table_end - table_start) << PAGE_SHIFT);
602 kernel_end = round_up(__pa_symbol(&_end),PAGE_SIZE);
603 reserve_bootmem_generic(HIGH_MEMORY, kernel_end - HIGH_MEMORY);
606 * reserve physical page 0 - it's a special BIOS page on many boxes,
607 * enabling clean reboots, SMP operation, laptop functions.
609 reserve_bootmem_generic(0, PAGE_SIZE);
611 /* reserve ebda region */
612 reserve_ebda_region();
616 * But first pinch a few for the stack/trampoline stuff
617 * FIXME: Don't need the extra page at 4K, but need to fix
618 * trampoline before removing it. (see the GDT stuff)
620 reserve_bootmem_generic(PAGE_SIZE, PAGE_SIZE);
622 /* Reserve SMP trampoline */
623 reserve_bootmem_generic(SMP_TRAMPOLINE_BASE, PAGE_SIZE);
626 #ifdef CONFIG_ACPI_SLEEP
628 * Reserve low memory region for sleep support.
630 acpi_reserve_bootmem();
632 #ifdef CONFIG_X86_LOCAL_APIC
634 * Find and reserve possible boot-time SMP configuration:
638 #ifdef CONFIG_BLK_DEV_INITRD
639 if (LOADER_TYPE && INITRD_START) {
640 if (INITRD_START + INITRD_SIZE <= (end_pfn << PAGE_SHIFT)) {
641 reserve_bootmem_generic(INITRD_START, INITRD_SIZE);
643 INITRD_START ? INITRD_START + PAGE_OFFSET : 0;
644 initrd_end = initrd_start+INITRD_SIZE;
647 printk(KERN_ERR "initrd extends beyond end of memory "
648 "(0x%08lx > 0x%08lx)\ndisabling initrd\n",
649 (unsigned long)(INITRD_START + INITRD_SIZE),
650 (unsigned long)(end_pfn << PAGE_SHIFT));
656 if (crashk_res.start != crashk_res.end) {
657 reserve_bootmem(crashk_res.start,
658 crashk_res.end - crashk_res.start + 1);
670 * Read APIC and some other early information from ACPI tables.
675 #ifdef CONFIG_X86_LOCAL_APIC
677 * get boot-time SMP configuration:
679 if (smp_found_config)
681 init_apic_mappings();
685 * Request address space for all standard RAM and ROM resources
686 * and also for regions reported as reserved by the e820.
689 e820_reserve_resources();
691 request_resource(&iomem_resource, &video_ram_resource);
695 /* request I/O space for devices used on all i[345]86 PCs */
696 for (i = 0; i < STANDARD_IO_RESOURCES; i++)
697 request_resource(&ioport_resource, &standard_io_resources[i]);
702 #ifdef CONFIG_GART_IOMMU
707 #if defined(CONFIG_VGA_CONSOLE)
708 conswitchp = &vga_con;
709 #elif defined(CONFIG_DUMMY_CONSOLE)
710 conswitchp = &dummy_con;
715 static int __cpuinit get_model_name(struct cpuinfo_x86 *c)
719 if (c->extended_cpuid_level < 0x80000004)
722 v = (unsigned int *) c->x86_model_id;
723 cpuid(0x80000002, &v[0], &v[1], &v[2], &v[3]);
724 cpuid(0x80000003, &v[4], &v[5], &v[6], &v[7]);
725 cpuid(0x80000004, &v[8], &v[9], &v[10], &v[11]);
726 c->x86_model_id[48] = 0;
731 static void __cpuinit display_cacheinfo(struct cpuinfo_x86 *c)
733 unsigned int n, dummy, eax, ebx, ecx, edx;
735 n = c->extended_cpuid_level;
737 if (n >= 0x80000005) {
738 cpuid(0x80000005, &dummy, &ebx, &ecx, &edx);
739 printk(KERN_INFO "CPU: L1 I Cache: %dK (%d bytes/line), D cache %dK (%d bytes/line)\n",
740 edx>>24, edx&0xFF, ecx>>24, ecx&0xFF);
741 c->x86_cache_size=(ecx>>24)+(edx>>24);
742 /* On K8 L1 TLB is inclusive, so don't count it */
746 if (n >= 0x80000006) {
747 cpuid(0x80000006, &dummy, &ebx, &ecx, &edx);
748 ecx = cpuid_ecx(0x80000006);
749 c->x86_cache_size = ecx >> 16;
750 c->x86_tlbsize += ((ebx >> 16) & 0xfff) + (ebx & 0xfff);
752 printk(KERN_INFO "CPU: L2 Cache: %dK (%d bytes/line)\n",
753 c->x86_cache_size, ecx & 0xFF);
757 cpuid(0x80000007, &dummy, &dummy, &dummy, &c->x86_power);
758 if (n >= 0x80000008) {
759 cpuid(0x80000008, &eax, &dummy, &dummy, &dummy);
760 c->x86_virt_bits = (eax >> 8) & 0xff;
761 c->x86_phys_bits = eax & 0xff;
766 static int nearby_node(int apicid)
769 for (i = apicid - 1; i >= 0; i--) {
770 int node = apicid_to_node[i];
771 if (node != NUMA_NO_NODE && node_online(node))
774 for (i = apicid + 1; i < MAX_LOCAL_APIC; i++) {
775 int node = apicid_to_node[i];
776 if (node != NUMA_NO_NODE && node_online(node))
779 return first_node(node_online_map); /* Shouldn't happen */
784 * On a AMD dual core setup the lower bits of the APIC id distingush the cores.
785 * Assumes number of cores is a power of two.
787 static void __init amd_detect_cmp(struct cpuinfo_x86 *c)
790 int cpu = smp_processor_id();
794 unsigned apicid = phys_proc_id[cpu];
798 while ((1 << bits) < c->x86_num_cores)
801 /* Low order bits define the core id (index of core in socket) */
802 cpu_core_id[cpu] = phys_proc_id[cpu] & ((1 << bits)-1);
803 /* Convert the APIC ID into the socket ID */
804 phys_proc_id[cpu] >>= bits;
807 node = phys_proc_id[cpu];
808 if (apicid_to_node[apicid] != NUMA_NO_NODE)
809 node = apicid_to_node[apicid];
810 if (!node_online(node)) {
811 /* Two possibilities here:
812 - The CPU is missing memory and no node was created.
813 In that case try picking one from a nearby CPU
814 - The APIC IDs differ from the HyperTransport node IDs
815 which the K8 northbridge parsing fills in.
816 Assume they are all increased by a constant offset,
817 but in the same order as the HT nodeids.
818 If that doesn't result in a usable node fall back to the
819 path for the previous case. */
820 int ht_nodeid = apicid - (phys_proc_id[0] << bits);
821 if (ht_nodeid >= 0 &&
822 apicid_to_node[ht_nodeid] != NUMA_NO_NODE)
823 node = apicid_to_node[ht_nodeid];
824 /* Pick a nearby node */
825 if (!node_online(node))
826 node = nearby_node(apicid);
828 numa_set_node(cpu, node);
830 printk(KERN_INFO "CPU %d(%d) -> Node %d -> Core %d\n",
831 cpu, c->x86_num_cores, node, cpu_core_id[cpu]);
836 static int __init init_amd(struct cpuinfo_x86 *c)
845 * Disable TLB flush filter by setting HWCR.FFDIS on K8
846 * bit 6 of msr C001_0015
848 * Errata 63 for SH-B3 steppings
849 * Errata 122 for all steppings (F+ have it disabled by default)
852 rdmsrl(MSR_K8_HWCR, value);
854 wrmsrl(MSR_K8_HWCR, value);
858 /* Bit 31 in normal CPUID used for nonstandard 3DNow ID;
859 3DNow is IDd by bit 31 in extended CPUID (1*32+31) anyway */
860 clear_bit(0*32+31, &c->x86_capability);
863 level = cpuid_eax(1);
864 if ((level >= 0x0f48 && level < 0x0f50) || level >= 0x0f58)
865 set_bit(X86_FEATURE_K8_C, &c->x86_capability);
867 r = get_model_name(c);
871 /* Should distinguish Models here, but this is only
872 a fallback anyways. */
873 strcpy(c->x86_model_id, "Hammer");
877 display_cacheinfo(c);
879 if (c->extended_cpuid_level >= 0x80000008) {
880 c->x86_num_cores = (cpuid_ecx(0x80000008) & 0xff) + 1;
881 if (c->x86_num_cores & (c->x86_num_cores - 1))
882 c->x86_num_cores = 1;
890 static void __cpuinit detect_ht(struct cpuinfo_x86 *c)
893 u32 eax, ebx, ecx, edx;
895 int cpu = smp_processor_id();
897 if (!cpu_has(c, X86_FEATURE_HT) || cpu_has(c, X86_FEATURE_CMP_LEGACY))
900 cpuid(1, &eax, &ebx, &ecx, &edx);
901 smp_num_siblings = (ebx & 0xff0000) >> 16;
903 if (smp_num_siblings == 1) {
904 printk(KERN_INFO "CPU: Hyper-Threading is disabled\n");
905 } else if (smp_num_siblings > 1) {
908 * At this point we only support two siblings per
911 if (smp_num_siblings > NR_CPUS) {
912 printk(KERN_WARNING "CPU: Unsupported number of the siblings %d", smp_num_siblings);
913 smp_num_siblings = 1;
916 tmp = smp_num_siblings;
917 while ((tmp & 0x80000000 ) == 0) {
921 if (smp_num_siblings & (smp_num_siblings - 1))
923 phys_proc_id[cpu] = phys_pkg_id(index_msb);
925 printk(KERN_INFO "CPU: Physical Processor ID: %d\n",
928 smp_num_siblings = smp_num_siblings / c->x86_num_cores;
930 tmp = smp_num_siblings;
932 while ((tmp & 0x80000000) == 0) {
936 if (smp_num_siblings & (smp_num_siblings - 1))
939 cpu_core_id[cpu] = phys_pkg_id(index_msb);
941 if (c->x86_num_cores > 1)
942 printk(KERN_INFO "CPU: Processor Core ID: %d\n",
949 * find out the number of processor cores on the die
951 static int __cpuinit intel_num_cpu_cores(struct cpuinfo_x86 *c)
955 if (c->cpuid_level < 4)
964 return ((eax >> 26) + 1);
969 static void srat_detect_node(void)
973 int cpu = smp_processor_id();
975 /* Don't do the funky fallback heuristics the AMD version employs
977 node = apicid_to_node[hard_smp_processor_id()];
978 if (node == NUMA_NO_NODE)
980 numa_set_node(cpu, node);
983 printk(KERN_INFO "CPU %d -> Node %d\n", cpu, node);
987 static void __cpuinit init_intel(struct cpuinfo_x86 *c)
992 init_intel_cacheinfo(c);
993 n = c->extended_cpuid_level;
994 if (n >= 0x80000008) {
995 unsigned eax = cpuid_eax(0x80000008);
996 c->x86_virt_bits = (eax >> 8) & 0xff;
997 c->x86_phys_bits = eax & 0xff;
1001 c->x86_cache_alignment = c->x86_clflush_size * 2;
1003 set_bit(X86_FEATURE_CONSTANT_TSC, &c->x86_capability);
1004 c->x86_num_cores = intel_num_cpu_cores(c);
1009 static void __cpuinit get_cpu_vendor(struct cpuinfo_x86 *c)
1011 char *v = c->x86_vendor_id;
1013 if (!strcmp(v, "AuthenticAMD"))
1014 c->x86_vendor = X86_VENDOR_AMD;
1015 else if (!strcmp(v, "GenuineIntel"))
1016 c->x86_vendor = X86_VENDOR_INTEL;
1018 c->x86_vendor = X86_VENDOR_UNKNOWN;
1021 struct cpu_model_info {
1024 char *model_names[16];
1027 /* Do some early cpuid on the boot CPU to get some parameter that are
1028 needed before check_bugs. Everything advanced is in identify_cpu
1030 void __cpuinit early_identify_cpu(struct cpuinfo_x86 *c)
1034 c->loops_per_jiffy = loops_per_jiffy;
1035 c->x86_cache_size = -1;
1036 c->x86_vendor = X86_VENDOR_UNKNOWN;
1037 c->x86_model = c->x86_mask = 0; /* So far unknown... */
1038 c->x86_vendor_id[0] = '\0'; /* Unset */
1039 c->x86_model_id[0] = '\0'; /* Unset */
1040 c->x86_clflush_size = 64;
1041 c->x86_cache_alignment = c->x86_clflush_size;
1042 c->x86_num_cores = 1;
1043 c->extended_cpuid_level = 0;
1044 memset(&c->x86_capability, 0, sizeof c->x86_capability);
1046 /* Get vendor name */
1047 cpuid(0x00000000, (unsigned int *)&c->cpuid_level,
1048 (unsigned int *)&c->x86_vendor_id[0],
1049 (unsigned int *)&c->x86_vendor_id[8],
1050 (unsigned int *)&c->x86_vendor_id[4]);
1054 /* Initialize the standard set of capabilities */
1055 /* Note that the vendor-specific code below might override */
1057 /* Intel-defined flags: level 0x00000001 */
1058 if (c->cpuid_level >= 0x00000001) {
1060 cpuid(0x00000001, &tfms, &misc, &c->x86_capability[4],
1061 &c->x86_capability[0]);
1062 c->x86 = (tfms >> 8) & 0xf;
1063 c->x86_model = (tfms >> 4) & 0xf;
1064 c->x86_mask = tfms & 0xf;
1066 c->x86 += (tfms >> 20) & 0xff;
1068 c->x86_model += ((tfms >> 16) & 0xF) << 4;
1069 if (c->x86_capability[0] & (1<<19))
1070 c->x86_clflush_size = ((misc >> 8) & 0xff) * 8;
1072 /* Have CPUID level 0 only - unheard of */
1077 phys_proc_id[smp_processor_id()] = (cpuid_ebx(1) >> 24) & 0xff;
1082 * This does the hard work of actually picking apart the CPU stuff...
1084 void __cpuinit identify_cpu(struct cpuinfo_x86 *c)
1089 early_identify_cpu(c);
1091 /* AMD-defined flags: level 0x80000001 */
1092 xlvl = cpuid_eax(0x80000000);
1093 c->extended_cpuid_level = xlvl;
1094 if ((xlvl & 0xffff0000) == 0x80000000) {
1095 if (xlvl >= 0x80000001) {
1096 c->x86_capability[1] = cpuid_edx(0x80000001);
1097 c->x86_capability[6] = cpuid_ecx(0x80000001);
1099 if (xlvl >= 0x80000004)
1100 get_model_name(c); /* Default name */
1103 /* Transmeta-defined flags: level 0x80860001 */
1104 xlvl = cpuid_eax(0x80860000);
1105 if ((xlvl & 0xffff0000) == 0x80860000) {
1106 /* Don't set x86_cpuid_level here for now to not confuse. */
1107 if (xlvl >= 0x80860001)
1108 c->x86_capability[2] = cpuid_edx(0x80860001);
1112 * Vendor-specific initialization. In this section we
1113 * canonicalize the feature flags, meaning if there are
1114 * features a certain CPU supports which CPUID doesn't
1115 * tell us, CPUID claiming incorrect flags, or other bugs,
1116 * we handle them here.
1118 * At the end of this section, c->x86_capability better
1119 * indicate the features this CPU genuinely supports!
1121 switch (c->x86_vendor) {
1122 case X86_VENDOR_AMD:
1126 case X86_VENDOR_INTEL:
1130 case X86_VENDOR_UNKNOWN:
1132 display_cacheinfo(c);
1136 select_idle_routine(c);
1140 * On SMP, boot_cpu_data holds the common feature set between
1141 * all CPUs; so make sure that we indicate which features are
1142 * common between the CPUs. The first time this routine gets
1143 * executed, c == &boot_cpu_data.
1145 if (c != &boot_cpu_data) {
1146 /* AND the already accumulated flags with these */
1147 for (i = 0 ; i < NCAPINTS ; i++)
1148 boot_cpu_data.x86_capability[i] &= c->x86_capability[i];
1151 #ifdef CONFIG_X86_MCE
1154 if (c == &boot_cpu_data)
1159 numa_add_cpu(smp_processor_id());
1164 void __cpuinit print_cpu_info(struct cpuinfo_x86 *c)
1166 if (c->x86_model_id[0])
1167 printk("%s", c->x86_model_id);
1169 if (c->x86_mask || c->cpuid_level >= 0)
1170 printk(" stepping %02x\n", c->x86_mask);
1176 * Get CPU information for use by the procfs.
1179 static int show_cpuinfo(struct seq_file *m, void *v)
1181 struct cpuinfo_x86 *c = v;
1184 * These flag bits must match the definitions in <asm/cpufeature.h>.
1185 * NULL means this bit is undefined or reserved; either way it doesn't
1186 * have meaning as far as Linux is concerned. Note that it's important
1187 * to realize there is a difference between this table and CPUID -- if
1188 * applications want to get the raw CPUID data, they should access
1189 * /dev/cpu/<cpu_nr>/cpuid instead.
1191 static char *x86_cap_flags[] = {
1193 "fpu", "vme", "de", "pse", "tsc", "msr", "pae", "mce",
1194 "cx8", "apic", NULL, "sep", "mtrr", "pge", "mca", "cmov",
1195 "pat", "pse36", "pn", "clflush", NULL, "dts", "acpi", "mmx",
1196 "fxsr", "sse", "sse2", "ss", "ht", "tm", "ia64", NULL,
1199 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1200 NULL, NULL, NULL, "syscall", NULL, NULL, NULL, NULL,
1201 NULL, NULL, NULL, NULL, "nx", NULL, "mmxext", NULL,
1202 NULL, "fxsr_opt", NULL, NULL, NULL, "lm", "3dnowext", "3dnow",
1204 /* Transmeta-defined */
1205 "recovery", "longrun", NULL, "lrti", NULL, NULL, NULL, NULL,
1206 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1207 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1208 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1210 /* Other (Linux-defined) */
1211 "cxmmx", NULL, "cyrix_arr", "centaur_mcr", NULL,
1212 "constant_tsc", NULL, NULL,
1213 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1214 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1215 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1217 /* Intel-defined (#2) */
1218 "pni", NULL, NULL, "monitor", "ds_cpl", "vmx", NULL, "est",
1219 "tm2", NULL, "cid", NULL, NULL, "cx16", "xtpr", NULL,
1220 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1221 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1223 /* VIA/Cyrix/Centaur-defined */
1224 NULL, NULL, "rng", "rng_en", NULL, NULL, "ace", "ace_en",
1225 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1226 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1227 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1229 /* AMD-defined (#2) */
1230 "lahf_lm", "cmp_legacy", NULL, NULL, NULL, NULL, NULL, NULL,
1231 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1232 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1233 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1235 static char *x86_power_flags[] = {
1236 "ts", /* temperature sensor */
1237 "fid", /* frequency id control */
1238 "vid", /* voltage id control */
1239 "ttp", /* thermal trip */
1246 if (!cpu_online(c-cpu_data))
1250 seq_printf(m,"processor\t: %u\n"
1252 "cpu family\t: %d\n"
1254 "model name\t: %s\n",
1255 (unsigned)(c-cpu_data),
1256 c->x86_vendor_id[0] ? c->x86_vendor_id : "unknown",
1259 c->x86_model_id[0] ? c->x86_model_id : "unknown");
1261 if (c->x86_mask || c->cpuid_level >= 0)
1262 seq_printf(m, "stepping\t: %d\n", c->x86_mask);
1264 seq_printf(m, "stepping\t: unknown\n");
1266 if (cpu_has(c,X86_FEATURE_TSC)) {
1267 seq_printf(m, "cpu MHz\t\t: %u.%03u\n",
1268 cpu_khz / 1000, (cpu_khz % 1000));
1272 if (c->x86_cache_size >= 0)
1273 seq_printf(m, "cache size\t: %d KB\n", c->x86_cache_size);
1276 if (smp_num_siblings * c->x86_num_cores > 1) {
1277 int cpu = c - cpu_data;
1278 seq_printf(m, "physical id\t: %d\n", phys_proc_id[cpu]);
1279 seq_printf(m, "siblings\t: %d\n",
1280 c->x86_num_cores * smp_num_siblings);
1281 seq_printf(m, "core id\t\t: %d\n", cpu_core_id[cpu]);
1282 seq_printf(m, "cpu cores\t: %d\n", c->x86_num_cores);
1288 "fpu_exception\t: yes\n"
1289 "cpuid level\t: %d\n"
1296 for ( i = 0 ; i < 32*NCAPINTS ; i++ )
1297 if ( test_bit(i, &c->x86_capability) &&
1298 x86_cap_flags[i] != NULL )
1299 seq_printf(m, " %s", x86_cap_flags[i]);
1302 seq_printf(m, "\nbogomips\t: %lu.%02lu\n",
1303 c->loops_per_jiffy/(500000/HZ),
1304 (c->loops_per_jiffy/(5000/HZ)) % 100);
1306 if (c->x86_tlbsize > 0)
1307 seq_printf(m, "TLB size\t: %d 4K pages\n", c->x86_tlbsize);
1308 seq_printf(m, "clflush size\t: %d\n", c->x86_clflush_size);
1309 seq_printf(m, "cache_alignment\t: %d\n", c->x86_cache_alignment);
1311 seq_printf(m, "address sizes\t: %u bits physical, %u bits virtual\n",
1312 c->x86_phys_bits, c->x86_virt_bits);
1314 seq_printf(m, "power management:");
1317 for (i = 0; i < 32; i++)
1318 if (c->x86_power & (1 << i)) {
1319 if (i < ARRAY_SIZE(x86_power_flags))
1320 seq_printf(m, " %s", x86_power_flags[i]);
1322 seq_printf(m, " [%d]", i);
1326 seq_printf(m, "\n\n");
1331 static void *c_start(struct seq_file *m, loff_t *pos)
1333 return *pos < NR_CPUS ? cpu_data + *pos : NULL;
1336 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
1339 return c_start(m, pos);
1342 static void c_stop(struct seq_file *m, void *v)
1346 struct seq_operations cpuinfo_op = {
1350 .show = show_cpuinfo,