2 * Copyright 2002 Andi Kleen, SuSE Labs.
3 * Thanks to Ben LaHaise for precious feedback.
5 #include <linux/highmem.h>
6 #include <linux/bootmem.h>
7 #include <linux/module.h>
8 #include <linux/sched.h>
9 #include <linux/slab.h>
13 #include <asm/processor.h>
14 #include <asm/tlbflush.h>
15 #include <asm/sections.h>
16 #include <asm/uaccess.h>
17 #include <asm/pgalloc.h>
20 within(unsigned long addr, unsigned long start, unsigned long end)
22 return addr >= start && addr < end;
30 * clflush_cache_range - flush a cache range with clflush
31 * @addr: virtual start address
32 * @size: number of bytes to flush
34 * clflush is an unordered instruction which needs fencing with mfence
35 * to avoid ordering issues.
37 void clflush_cache_range(void *vaddr, unsigned int size)
39 void *vend = vaddr + size - 1;
43 for (; vaddr < vend; vaddr += boot_cpu_data.x86_clflush_size)
46 * Flush any possible final partial cacheline:
53 static void __cpa_flush_all(void *arg)
56 * Flush all to work around Errata in early athlons regarding
57 * large page flushing.
61 if (boot_cpu_data.x86_model >= 4)
65 static void cpa_flush_all(void)
67 BUG_ON(irqs_disabled());
69 on_each_cpu(__cpa_flush_all, NULL, 1, 1);
72 static void __cpa_flush_range(void *arg)
75 * We could optimize that further and do individual per page
76 * tlb invalidates for a low number of pages. Caveat: we must
77 * flush the high aliases on 64bit as well.
82 static void cpa_flush_range(unsigned long start, int numpages)
84 unsigned int i, level;
87 BUG_ON(irqs_disabled());
88 WARN_ON(PAGE_ALIGN(start) != start);
90 on_each_cpu(__cpa_flush_range, NULL, 1, 1);
93 * We only need to flush on one CPU,
94 * clflush is a MESI-coherent instruction that
95 * will cause all other CPUs to flush the same
98 for (i = 0, addr = start; i < numpages; i++, addr += PAGE_SIZE) {
99 pte_t *pte = lookup_address(addr, &level);
102 * Only flush present addresses:
104 if (pte && pte_present(*pte))
105 clflush_cache_range((void *) addr, PAGE_SIZE);
110 * Certain areas of memory on x86 require very specific protection flags,
111 * for example the BIOS area or kernel text. Callers don't always get this
112 * right (again, ioremap() on BIOS memory is not uncommon) so this function
113 * checks and fixes these known static required protection bits.
115 static inline pgprot_t static_protections(pgprot_t prot, unsigned long address)
117 pgprot_t forbidden = __pgprot(0);
120 * The BIOS area between 640k and 1Mb needs to be executable for
121 * PCI BIOS based config access (CONFIG_PCI_GOBIOS) support.
123 if (within(__pa(address), BIOS_BEGIN, BIOS_END))
124 pgprot_val(forbidden) |= _PAGE_NX;
127 * The kernel text needs to be executable for obvious reasons
128 * Does not cover __inittext since that is gone later on
130 if (within(address, (unsigned long)_text, (unsigned long)_etext))
131 pgprot_val(forbidden) |= _PAGE_NX;
133 #ifdef CONFIG_DEBUG_RODATA
134 /* The .rodata section needs to be read-only */
135 if (within(address, (unsigned long)__start_rodata,
136 (unsigned long)__end_rodata))
137 pgprot_val(forbidden) |= _PAGE_RW;
140 prot = __pgprot(pgprot_val(prot) & ~pgprot_val(forbidden));
145 pte_t *lookup_address(unsigned long address, int *level)
147 pgd_t *pgd = pgd_offset_k(address);
151 *level = PG_LEVEL_NONE;
155 pud = pud_offset(pgd, address);
158 pmd = pmd_offset(pud, address);
162 *level = PG_LEVEL_2M;
166 *level = PG_LEVEL_4K;
167 return pte_offset_kernel(pmd, address);
170 static void __set_pmd_pte(pte_t *kpte, unsigned long address, pte_t pte)
173 set_pte_atomic(kpte, pte);
175 if (!SHARED_KERNEL_PMD) {
178 for (page = pgd_list; page; page = (struct page *)page->index) {
183 pgd = (pgd_t *)page_address(page) + pgd_index(address);
184 pud = pud_offset(pgd, address);
185 pmd = pmd_offset(pud, address);
186 set_pte_atomic((pte_t *)pmd, pte);
192 static int split_large_page(pte_t *kpte, unsigned long address)
194 pgprot_t ref_prot = pte_pgprot(pte_clrhuge(*kpte));
195 gfp_t gfp_flags = GFP_KERNEL;
202 #ifdef CONFIG_DEBUG_PAGEALLOC
203 gfp_flags = GFP_ATOMIC;
205 base = alloc_pages(gfp_flags, 0);
209 spin_lock_irqsave(&pgd_lock, flags);
211 * Check for races, another CPU might have split this page
214 tmp = lookup_address(address, &level);
220 address = __pa(address);
221 addr = address & LARGE_PAGE_MASK;
222 pbase = (pte_t *)page_address(base);
224 paravirt_alloc_pt(&init_mm, page_to_pfn(base));
227 for (i = 0; i < PTRS_PER_PTE; i++, addr += PAGE_SIZE)
228 set_pte(&pbase[i], pfn_pte(addr >> PAGE_SHIFT, ref_prot));
231 * Install the new, split up pagetable. Important detail here:
233 * On Intel the NX bit of all levels must be cleared to make a
234 * page executable. See section 4.13.2 of Intel 64 and IA-32
235 * Architectures Software Developer's Manual).
237 ref_prot = pte_pgprot(pte_mkexec(pte_clrhuge(*kpte)));
238 __set_pmd_pte(kpte, address, mk_pte(base, ref_prot));
242 spin_unlock_irqrestore(&pgd_lock, flags);
245 __free_pages(base, 0);
251 __change_page_attr(unsigned long address, unsigned long pfn, pgprot_t prot)
253 struct page *kpte_page;
258 BUG_ON(pfn > max_low_pfn);
262 kpte = lookup_address(address, &level);
266 kpte_page = virt_to_page(kpte);
267 BUG_ON(PageLRU(kpte_page));
268 BUG_ON(PageCompound(kpte_page));
270 prot = static_protections(prot, address);
272 if (level == PG_LEVEL_4K) {
273 WARN_ON_ONCE(pgprot_val(prot) & _PAGE_PSE);
274 set_pte_atomic(kpte, pfn_pte(pfn, canon_pgprot(prot)));
276 /* Clear the PSE bit for the 4k level pages ! */
277 pgprot_val(prot) = pgprot_val(prot) & ~_PAGE_PSE;
279 err = split_large_page(kpte, address);
287 * change_page_attr_addr - Change page table attributes in linear mapping
288 * @address: Virtual address in linear mapping.
289 * @prot: New page table attribute (PAGE_*)
291 * Change page attributes of a page in the direct mapping. This is a variant
292 * of change_page_attr() that also works on memory holes that do not have
293 * mem_map entry (pfn_valid() is false).
295 * See change_page_attr() documentation for more details.
297 * Modules and drivers should use the set_memory_* APIs instead.
300 static int change_page_attr_addr(unsigned long address, pgprot_t prot)
302 int err = 0, kernel_map = 0;
303 unsigned long pfn = __pa(address) >> PAGE_SHIFT;
306 if (address >= __START_KERNEL_map &&
307 address < __START_KERNEL_map + KERNEL_TEXT_SIZE) {
309 address = (unsigned long)__va(__pa(address));
314 if (!kernel_map || pte_present(pfn_pte(0, prot))) {
315 err = __change_page_attr(address, pfn, prot);
322 * Handle kernel mapping too which aliases part of
325 if (__pa(address) < KERNEL_TEXT_SIZE) {
329 addr2 = __START_KERNEL_map + __pa(address);
330 /* Make sure the kernel mappings stay executable */
331 prot2 = pte_pgprot(pte_mkexec(pfn_pte(0, prot)));
332 err = __change_page_attr(addr2, pfn, prot2);
339 static int __change_page_attr_set_clr(unsigned long addr, int numpages,
340 pgprot_t mask_set, pgprot_t mask_clr)
347 for (i = 0; i < numpages ; i++) {
349 pte = lookup_address(addr, &level);
353 new_prot = pte_pgprot(*pte);
355 pgprot_val(new_prot) &= ~pgprot_val(mask_clr);
356 pgprot_val(new_prot) |= pgprot_val(mask_set);
358 ret = change_page_attr_addr(addr, new_prot);
367 static int change_page_attr_set_clr(unsigned long addr, int numpages,
368 pgprot_t mask_set, pgprot_t mask_clr)
370 int ret = __change_page_attr_set_clr(addr, numpages, mask_set,
374 * On success we use clflush, when the CPU supports it to
375 * avoid the wbindv. If the CPU does not support it and in the
376 * error case we fall back to cpa_flush_all (which uses
379 if (!ret && cpu_has_clflush)
380 cpa_flush_range(addr, numpages);
387 static inline int change_page_attr_set(unsigned long addr, int numpages,
390 return change_page_attr_set_clr(addr, numpages, mask, __pgprot(0));
393 static inline int change_page_attr_clear(unsigned long addr, int numpages,
396 return __change_page_attr_set_clr(addr, numpages, __pgprot(0), mask);
400 int set_memory_uc(unsigned long addr, int numpages)
402 return change_page_attr_set(addr, numpages,
403 __pgprot(_PAGE_PCD | _PAGE_PWT));
405 EXPORT_SYMBOL(set_memory_uc);
407 int set_memory_wb(unsigned long addr, int numpages)
409 return change_page_attr_clear(addr, numpages,
410 __pgprot(_PAGE_PCD | _PAGE_PWT));
412 EXPORT_SYMBOL(set_memory_wb);
414 int set_memory_x(unsigned long addr, int numpages)
416 return change_page_attr_clear(addr, numpages, __pgprot(_PAGE_NX));
418 EXPORT_SYMBOL(set_memory_x);
420 int set_memory_nx(unsigned long addr, int numpages)
422 return change_page_attr_set(addr, numpages, __pgprot(_PAGE_NX));
424 EXPORT_SYMBOL(set_memory_nx);
426 int set_memory_ro(unsigned long addr, int numpages)
428 return change_page_attr_clear(addr, numpages, __pgprot(_PAGE_RW));
431 int set_memory_rw(unsigned long addr, int numpages)
433 return change_page_attr_set(addr, numpages, __pgprot(_PAGE_RW));
436 int set_memory_np(unsigned long addr, int numpages)
438 return change_page_attr_clear(addr, numpages, __pgprot(_PAGE_PRESENT));
441 int set_pages_uc(struct page *page, int numpages)
443 unsigned long addr = (unsigned long)page_address(page);
445 return set_memory_uc(addr, numpages);
447 EXPORT_SYMBOL(set_pages_uc);
449 int set_pages_wb(struct page *page, int numpages)
451 unsigned long addr = (unsigned long)page_address(page);
453 return set_memory_wb(addr, numpages);
455 EXPORT_SYMBOL(set_pages_wb);
457 int set_pages_x(struct page *page, int numpages)
459 unsigned long addr = (unsigned long)page_address(page);
461 return set_memory_x(addr, numpages);
463 EXPORT_SYMBOL(set_pages_x);
465 int set_pages_nx(struct page *page, int numpages)
467 unsigned long addr = (unsigned long)page_address(page);
469 return set_memory_nx(addr, numpages);
471 EXPORT_SYMBOL(set_pages_nx);
473 int set_pages_ro(struct page *page, int numpages)
475 unsigned long addr = (unsigned long)page_address(page);
477 return set_memory_ro(addr, numpages);
480 int set_pages_rw(struct page *page, int numpages)
482 unsigned long addr = (unsigned long)page_address(page);
484 return set_memory_rw(addr, numpages);
488 #if defined(CONFIG_DEBUG_PAGEALLOC) || defined(CONFIG_CPA_DEBUG)
489 static inline int __change_page_attr_set(unsigned long addr, int numpages,
492 return __change_page_attr_set_clr(addr, numpages, mask, __pgprot(0));
495 static inline int __change_page_attr_clear(unsigned long addr, int numpages,
498 return __change_page_attr_set_clr(addr, numpages, __pgprot(0), mask);
502 #ifdef CONFIG_DEBUG_PAGEALLOC
504 static int __set_pages_p(struct page *page, int numpages)
506 unsigned long addr = (unsigned long)page_address(page);
508 return __change_page_attr_set(addr, numpages,
509 __pgprot(_PAGE_PRESENT | _PAGE_RW));
512 static int __set_pages_np(struct page *page, int numpages)
514 unsigned long addr = (unsigned long)page_address(page);
516 return __change_page_attr_clear(addr, numpages,
517 __pgprot(_PAGE_PRESENT));
520 void kernel_map_pages(struct page *page, int numpages, int enable)
522 if (PageHighMem(page))
525 debug_check_no_locks_freed(page_address(page),
526 numpages * PAGE_SIZE);
530 * If page allocator is not up yet then do not call c_p_a():
532 if (!debug_pagealloc_enabled)
536 * The return value is ignored - the calls cannot fail,
537 * large pages are disabled at boot time:
540 __set_pages_p(page, numpages);
542 __set_pages_np(page, numpages);
545 * We should perform an IPI and flush all tlbs,
546 * but that can deadlock->flush only current cpu:
553 * The testcases use internal knowledge of the implementation that shouldn't
554 * be exposed to the rest of the kernel. Include these directly here.
556 #ifdef CONFIG_CPA_DEBUG
557 #include "pageattr-test.c"