2 * Copyright 2002 Andi Kleen, SuSE Labs.
3 * Thanks to Ben LaHaise for precious feedback.
5 #include <linux/highmem.h>
6 #include <linux/bootmem.h>
7 #include <linux/module.h>
8 #include <linux/sched.h>
9 #include <linux/slab.h>
11 #include <linux/interrupt.h>
12 #include <linux/seq_file.h>
13 #include <linux/debugfs.h>
16 #include <asm/processor.h>
17 #include <asm/tlbflush.h>
18 #include <asm/sections.h>
19 #include <asm/uaccess.h>
20 #include <asm/pgalloc.h>
21 #include <asm/proto.h>
25 * The current flushing context - we pass it instead of 5 arguments:
34 unsigned force_split : 1;
37 static unsigned long direct_pages_count[PG_LEVEL_NUM];
39 void __meminit update_page_count(int level, unsigned long pages)
43 /* Protect against CPA */
44 spin_lock_irqsave(&pgd_lock, flags);
45 direct_pages_count[level] += pages;
46 spin_unlock_irqrestore(&pgd_lock, flags);
52 static inline unsigned long highmap_start_pfn(void)
54 return __pa(_text) >> PAGE_SHIFT;
57 static inline unsigned long highmap_end_pfn(void)
59 return __pa(round_up((unsigned long)_end, PMD_SIZE)) >> PAGE_SHIFT;
64 #ifdef CONFIG_DEBUG_PAGEALLOC
65 # define debug_pagealloc 1
67 # define debug_pagealloc 0
71 within(unsigned long addr, unsigned long start, unsigned long end)
73 return addr >= start && addr < end;
81 * clflush_cache_range - flush a cache range with clflush
82 * @addr: virtual start address
83 * @size: number of bytes to flush
85 * clflush is an unordered instruction which needs fencing with mfence
86 * to avoid ordering issues.
88 void clflush_cache_range(void *vaddr, unsigned int size)
90 void *vend = vaddr + size - 1;
94 for (; vaddr < vend; vaddr += boot_cpu_data.x86_clflush_size)
97 * Flush any possible final partial cacheline:
104 static void __cpa_flush_all(void *arg)
106 unsigned long cache = (unsigned long)arg;
109 * Flush all to work around Errata in early athlons regarding
110 * large page flushing.
114 if (cache && boot_cpu_data.x86_model >= 4)
118 static void cpa_flush_all(unsigned long cache)
120 BUG_ON(irqs_disabled());
122 on_each_cpu(__cpa_flush_all, (void *) cache, 1, 1);
125 static void __cpa_flush_range(void *arg)
128 * We could optimize that further and do individual per page
129 * tlb invalidates for a low number of pages. Caveat: we must
130 * flush the high aliases on 64bit as well.
135 static void cpa_flush_range(unsigned long start, int numpages, int cache)
137 unsigned int i, level;
140 BUG_ON(irqs_disabled());
141 WARN_ON(PAGE_ALIGN(start) != start);
143 on_each_cpu(__cpa_flush_range, NULL, 1, 1);
149 * We only need to flush on one CPU,
150 * clflush is a MESI-coherent instruction that
151 * will cause all other CPUs to flush the same
154 for (i = 0, addr = start; i < numpages; i++, addr += PAGE_SIZE) {
155 pte_t *pte = lookup_address(addr, &level);
158 * Only flush present addresses:
160 if (pte && (pte_val(*pte) & _PAGE_PRESENT))
161 clflush_cache_range((void *) addr, PAGE_SIZE);
166 * Certain areas of memory on x86 require very specific protection flags,
167 * for example the BIOS area or kernel text. Callers don't always get this
168 * right (again, ioremap() on BIOS memory is not uncommon) so this function
169 * checks and fixes these known static required protection bits.
171 static inline pgprot_t static_protections(pgprot_t prot, unsigned long address,
174 pgprot_t forbidden = __pgprot(0);
177 * The BIOS area between 640k and 1Mb needs to be executable for
178 * PCI BIOS based config access (CONFIG_PCI_GOBIOS) support.
180 if (within(pfn, BIOS_BEGIN >> PAGE_SHIFT, BIOS_END >> PAGE_SHIFT))
181 pgprot_val(forbidden) |= _PAGE_NX;
184 * The kernel text needs to be executable for obvious reasons
185 * Does not cover __inittext since that is gone later on. On
186 * 64bit we do not enforce !NX on the low mapping
188 if (within(address, (unsigned long)_text, (unsigned long)_etext))
189 pgprot_val(forbidden) |= _PAGE_NX;
192 * The .rodata section needs to be read-only. Using the pfn
193 * catches all aliases.
195 if (within(pfn, __pa((unsigned long)__start_rodata) >> PAGE_SHIFT,
196 __pa((unsigned long)__end_rodata) >> PAGE_SHIFT))
197 pgprot_val(forbidden) |= _PAGE_RW;
199 prot = __pgprot(pgprot_val(prot) & ~pgprot_val(forbidden));
205 * Lookup the page table entry for a virtual address. Return a pointer
206 * to the entry and the level of the mapping.
208 * Note: We return pud and pmd either when the entry is marked large
209 * or when the present bit is not set. Otherwise we would return a
210 * pointer to a nonexisting mapping.
212 pte_t *lookup_address(unsigned long address, unsigned int *level)
214 pgd_t *pgd = pgd_offset_k(address);
218 *level = PG_LEVEL_NONE;
223 pud = pud_offset(pgd, address);
227 *level = PG_LEVEL_1G;
228 if (pud_large(*pud) || !pud_present(*pud))
231 pmd = pmd_offset(pud, address);
235 *level = PG_LEVEL_2M;
236 if (pmd_large(*pmd) || !pmd_present(*pmd))
239 *level = PG_LEVEL_4K;
241 return pte_offset_kernel(pmd, address);
245 * Set the new pmd in all the pgds we know about:
247 static void __set_pmd_pte(pte_t *kpte, unsigned long address, pte_t pte)
250 set_pte_atomic(kpte, pte);
252 if (!SHARED_KERNEL_PMD) {
255 list_for_each_entry(page, &pgd_list, lru) {
260 pgd = (pgd_t *)page_address(page) + pgd_index(address);
261 pud = pud_offset(pgd, address);
262 pmd = pmd_offset(pud, address);
263 set_pte_atomic((pte_t *)pmd, pte);
270 try_preserve_large_page(pte_t *kpte, unsigned long address,
271 struct cpa_data *cpa)
273 unsigned long nextpage_addr, numpages, pmask, psize, flags, addr, pfn;
274 pte_t new_pte, old_pte, *tmp;
275 pgprot_t old_prot, new_prot;
279 if (cpa->force_split)
282 spin_lock_irqsave(&pgd_lock, flags);
284 * Check for races, another CPU might have split this page
287 tmp = lookup_address(address, &level);
293 psize = PMD_PAGE_SIZE;
294 pmask = PMD_PAGE_MASK;
298 psize = PUD_PAGE_SIZE;
299 pmask = PUD_PAGE_MASK;
308 * Calculate the number of pages, which fit into this large
309 * page starting at address:
311 nextpage_addr = (address + psize) & pmask;
312 numpages = (nextpage_addr - address) >> PAGE_SHIFT;
313 if (numpages < cpa->numpages)
314 cpa->numpages = numpages;
317 * We are safe now. Check whether the new pgprot is the same:
320 old_prot = new_prot = pte_pgprot(old_pte);
322 pgprot_val(new_prot) &= ~pgprot_val(cpa->mask_clr);
323 pgprot_val(new_prot) |= pgprot_val(cpa->mask_set);
326 * old_pte points to the large page base address. So we need
327 * to add the offset of the virtual address:
329 pfn = pte_pfn(old_pte) + ((address & (psize - 1)) >> PAGE_SHIFT);
332 new_prot = static_protections(new_prot, address, pfn);
335 * We need to check the full range, whether
336 * static_protection() requires a different pgprot for one of
337 * the pages in the range we try to preserve:
339 addr = address + PAGE_SIZE;
341 for (i = 1; i < cpa->numpages; i++, addr += PAGE_SIZE, pfn++) {
342 pgprot_t chk_prot = static_protections(new_prot, addr, pfn);
344 if (pgprot_val(chk_prot) != pgprot_val(new_prot))
349 * If there are no changes, return. maxpages has been updated
352 if (pgprot_val(new_prot) == pgprot_val(old_prot)) {
358 * We need to change the attributes. Check, whether we can
359 * change the large page in one go. We request a split, when
360 * the address is not aligned and the number of pages is
361 * smaller than the number of pages in the large page. Note
362 * that we limited the number of possible pages already to
363 * the number of pages in the large page.
365 if (address == (nextpage_addr - psize) && cpa->numpages == numpages) {
367 * The address is aligned and the number of pages
368 * covers the full page.
370 new_pte = pfn_pte(pte_pfn(old_pte), canon_pgprot(new_prot));
371 __set_pmd_pte(kpte, address, new_pte);
377 spin_unlock_irqrestore(&pgd_lock, flags);
382 static LIST_HEAD(page_pool);
383 static unsigned long pool_size, pool_pages, pool_low;
384 static unsigned long pool_used, pool_failed;
386 static void cpa_fill_pool(struct page **ret)
388 gfp_t gfp = GFP_KERNEL;
393 * Avoid recursion (on debug-pagealloc) and also signal
394 * our priority to get to these pagetables:
396 if (current->flags & PF_MEMALLOC)
398 current->flags |= PF_MEMALLOC;
401 * Allocate atomically from atomic contexts:
403 if (in_atomic() || irqs_disabled() || debug_pagealloc)
404 gfp = GFP_ATOMIC | __GFP_NORETRY | __GFP_NOWARN;
406 while (pool_pages < pool_size || (ret && !*ret)) {
407 p = alloc_pages(gfp, 0);
413 * If the call site needs a page right now, provide it:
419 spin_lock_irqsave(&pgd_lock, flags);
420 list_add(&p->lru, &page_pool);
422 spin_unlock_irqrestore(&pgd_lock, flags);
425 current->flags &= ~PF_MEMALLOC;
428 #define SHIFT_MB (20 - PAGE_SHIFT)
429 #define ROUND_MB_GB ((1 << 10) - 1)
430 #define SHIFT_MB_GB 10
431 #define POOL_PAGES_PER_GB 16
433 void __init cpa_init(void)
440 * Calculate the number of pool pages:
442 * Convert totalram (nr of pages) to MiB and round to the next
443 * GiB. Shift MiB to Gib and multiply the result by
446 if (debug_pagealloc) {
447 gb = ((si.totalram >> SHIFT_MB) + ROUND_MB_GB) >> SHIFT_MB_GB;
448 pool_size = POOL_PAGES_PER_GB * gb;
452 pool_low = pool_size;
456 "CPA: page pool initialized %lu of %lu pages preallocated\n",
457 pool_pages, pool_size);
460 static int split_large_page(pte_t *kpte, unsigned long address)
462 unsigned long flags, pfn, pfninc = 1;
463 unsigned int i, level;
469 * Get a page from the pool. The pool list is protected by the
470 * pgd_lock, which we have to take anyway for the split
473 spin_lock_irqsave(&pgd_lock, flags);
474 if (list_empty(&page_pool)) {
475 spin_unlock_irqrestore(&pgd_lock, flags);
477 cpa_fill_pool(&base);
480 spin_lock_irqsave(&pgd_lock, flags);
482 base = list_first_entry(&page_pool, struct page, lru);
483 list_del(&base->lru);
486 if (pool_pages < pool_low)
487 pool_low = pool_pages;
491 * Check for races, another CPU might have split this page
494 tmp = lookup_address(address, &level);
498 pbase = (pte_t *)page_address(base);
499 paravirt_alloc_pte(&init_mm, page_to_pfn(base));
500 ref_prot = pte_pgprot(pte_clrhuge(*kpte));
503 if (level == PG_LEVEL_1G) {
504 pfninc = PMD_PAGE_SIZE >> PAGE_SHIFT;
505 pgprot_val(ref_prot) |= _PAGE_PSE;
510 * Get the target pfn from the original entry:
512 pfn = pte_pfn(*kpte);
513 for (i = 0; i < PTRS_PER_PTE; i++, pfn += pfninc)
514 set_pte(&pbase[i], pfn_pte(pfn, ref_prot));
516 if (address >= (unsigned long)__va(0) &&
517 address < (unsigned long)__va(max_pfn_mapped << PAGE_SHIFT)) {
518 direct_pages_count[level]--;
519 direct_pages_count[level - 1] += PTRS_PER_PTE;
523 * Install the new, split up pagetable. Important details here:
525 * On Intel the NX bit of all levels must be cleared to make a
526 * page executable. See section 4.13.2 of Intel 64 and IA-32
527 * Architectures Software Developer's Manual).
529 * Mark the entry present. The current mapping might be
530 * set to not present, which we preserved above.
532 ref_prot = pte_pgprot(pte_mkexec(pte_clrhuge(*kpte)));
533 pgprot_val(ref_prot) |= _PAGE_PRESENT;
534 __set_pmd_pte(kpte, address, mk_pte(base, ref_prot));
539 * If we dropped out via the lookup_address check under
540 * pgd_lock then stick the page back into the pool:
543 list_add(&base->lru, &page_pool);
547 spin_unlock_irqrestore(&pgd_lock, flags);
552 static int __change_page_attr(struct cpa_data *cpa, int primary)
554 unsigned long address = cpa->vaddr;
557 pte_t *kpte, old_pte;
560 kpte = lookup_address(address, &level);
565 if (!pte_val(old_pte)) {
568 printk(KERN_WARNING "CPA: called for zero pte. "
569 "vaddr = %lx cpa->vaddr = %lx\n", address,
575 if (level == PG_LEVEL_4K) {
577 pgprot_t new_prot = pte_pgprot(old_pte);
578 unsigned long pfn = pte_pfn(old_pte);
580 pgprot_val(new_prot) &= ~pgprot_val(cpa->mask_clr);
581 pgprot_val(new_prot) |= pgprot_val(cpa->mask_set);
583 new_prot = static_protections(new_prot, address, pfn);
586 * We need to keep the pfn from the existing PTE,
587 * after all we're only going to change it's attributes
588 * not the memory it points to
590 new_pte = pfn_pte(pfn, canon_pgprot(new_prot));
593 * Do we really change anything ?
595 if (pte_val(old_pte) != pte_val(new_pte)) {
596 set_pte_atomic(kpte, new_pte);
604 * Check, whether we can keep the large page intact
605 * and just change the pte:
607 do_split = try_preserve_large_page(kpte, address, cpa);
609 * When the range fits into the existing large page,
610 * return. cp->numpages and cpa->tlbflush have been updated in
617 * We have to split the large page:
619 err = split_large_page(kpte, address);
628 static int __change_page_attr_set_clr(struct cpa_data *cpa, int checkalias);
630 static int cpa_process_alias(struct cpa_data *cpa)
632 struct cpa_data alias_cpa;
635 if (cpa->pfn > max_pfn_mapped)
639 * No need to redo, when the primary call touched the direct
642 if (!within(cpa->vaddr, PAGE_OFFSET,
643 PAGE_OFFSET + (max_pfn_mapped << PAGE_SHIFT))) {
646 alias_cpa.vaddr = (unsigned long) __va(cpa->pfn << PAGE_SHIFT);
648 ret = __change_page_attr_set_clr(&alias_cpa, 0);
655 * No need to redo, when the primary call touched the high
658 if (within(cpa->vaddr, (unsigned long) _text, (unsigned long) _end))
662 * If the physical address is inside the kernel map, we need
663 * to touch the high mapped kernel as well:
665 if (!within(cpa->pfn, highmap_start_pfn(), highmap_end_pfn()))
670 (cpa->pfn << PAGE_SHIFT) + __START_KERNEL_map - phys_base;
673 * The high mapping range is imprecise, so ignore the return value.
675 __change_page_attr_set_clr(&alias_cpa, 0);
680 static int __change_page_attr_set_clr(struct cpa_data *cpa, int checkalias)
682 int ret, numpages = cpa->numpages;
686 * Store the remaining nr of pages for the large page
687 * preservation check.
689 cpa->numpages = numpages;
691 ret = __change_page_attr(cpa, checkalias);
696 ret = cpa_process_alias(cpa);
702 * Adjust the number of pages with the result of the
703 * CPA operation. Either a large page has been
704 * preserved or a single page update happened.
706 BUG_ON(cpa->numpages > numpages);
707 numpages -= cpa->numpages;
708 cpa->vaddr += cpa->numpages * PAGE_SIZE;
713 static inline int cache_attr(pgprot_t attr)
715 return pgprot_val(attr) &
716 (_PAGE_PAT | _PAGE_PAT_LARGE | _PAGE_PWT | _PAGE_PCD);
719 static int change_page_attr_set_clr(unsigned long addr, int numpages,
720 pgprot_t mask_set, pgprot_t mask_clr,
724 int ret, cache, checkalias;
727 * Check, if we are requested to change a not supported
730 mask_set = canon_pgprot(mask_set);
731 mask_clr = canon_pgprot(mask_clr);
732 if (!pgprot_val(mask_set) && !pgprot_val(mask_clr) && !force_split)
735 /* Ensure we are PAGE_SIZE aligned */
736 if (addr & ~PAGE_MASK) {
739 * People should not be passing in unaligned addresses:
745 cpa.numpages = numpages;
746 cpa.mask_set = mask_set;
747 cpa.mask_clr = mask_clr;
749 cpa.force_split = force_split;
751 /* No alias checking for _NX bit modifications */
752 checkalias = (pgprot_val(mask_set) | pgprot_val(mask_clr)) != _PAGE_NX;
754 ret = __change_page_attr_set_clr(&cpa, checkalias);
757 * Check whether we really changed something:
763 * No need to flush, when we did not set any of the caching
766 cache = cache_attr(mask_set);
769 * On success we use clflush, when the CPU supports it to
770 * avoid the wbindv. If the CPU does not support it and in the
771 * error case we fall back to cpa_flush_all (which uses
774 if (!ret && cpu_has_clflush)
775 cpa_flush_range(addr, numpages, cache);
777 cpa_flush_all(cache);
785 static inline int change_page_attr_set(unsigned long addr, int numpages,
788 return change_page_attr_set_clr(addr, numpages, mask, __pgprot(0), 0);
791 static inline int change_page_attr_clear(unsigned long addr, int numpages,
794 return change_page_attr_set_clr(addr, numpages, __pgprot(0), mask, 0);
797 int _set_memory_uc(unsigned long addr, int numpages)
800 * for now UC MINUS. see comments in ioremap_nocache()
802 return change_page_attr_set(addr, numpages,
803 __pgprot(_PAGE_CACHE_UC_MINUS));
806 int set_memory_uc(unsigned long addr, int numpages)
809 * for now UC MINUS. see comments in ioremap_nocache()
811 if (reserve_memtype(addr, addr + numpages * PAGE_SIZE,
812 _PAGE_CACHE_UC_MINUS, NULL))
815 return _set_memory_uc(addr, numpages);
817 EXPORT_SYMBOL(set_memory_uc);
819 int _set_memory_wc(unsigned long addr, int numpages)
821 return change_page_attr_set(addr, numpages,
822 __pgprot(_PAGE_CACHE_WC));
825 int set_memory_wc(unsigned long addr, int numpages)
828 return set_memory_uc(addr, numpages);
830 if (reserve_memtype(addr, addr + numpages * PAGE_SIZE,
831 _PAGE_CACHE_WC, NULL))
834 return _set_memory_wc(addr, numpages);
836 EXPORT_SYMBOL(set_memory_wc);
838 int _set_memory_wb(unsigned long addr, int numpages)
840 return change_page_attr_clear(addr, numpages,
841 __pgprot(_PAGE_CACHE_MASK));
844 int set_memory_wb(unsigned long addr, int numpages)
846 free_memtype(addr, addr + numpages * PAGE_SIZE);
848 return _set_memory_wb(addr, numpages);
850 EXPORT_SYMBOL(set_memory_wb);
852 int set_memory_x(unsigned long addr, int numpages)
854 return change_page_attr_clear(addr, numpages, __pgprot(_PAGE_NX));
856 EXPORT_SYMBOL(set_memory_x);
858 int set_memory_nx(unsigned long addr, int numpages)
860 return change_page_attr_set(addr, numpages, __pgprot(_PAGE_NX));
862 EXPORT_SYMBOL(set_memory_nx);
864 int set_memory_ro(unsigned long addr, int numpages)
866 return change_page_attr_clear(addr, numpages, __pgprot(_PAGE_RW));
869 int set_memory_rw(unsigned long addr, int numpages)
871 return change_page_attr_set(addr, numpages, __pgprot(_PAGE_RW));
874 int set_memory_np(unsigned long addr, int numpages)
876 return change_page_attr_clear(addr, numpages, __pgprot(_PAGE_PRESENT));
879 int set_memory_4k(unsigned long addr, int numpages)
881 return change_page_attr_set_clr(addr, numpages, __pgprot(0),
885 int set_pages_uc(struct page *page, int numpages)
887 unsigned long addr = (unsigned long)page_address(page);
889 return set_memory_uc(addr, numpages);
891 EXPORT_SYMBOL(set_pages_uc);
893 int set_pages_wb(struct page *page, int numpages)
895 unsigned long addr = (unsigned long)page_address(page);
897 return set_memory_wb(addr, numpages);
899 EXPORT_SYMBOL(set_pages_wb);
901 int set_pages_x(struct page *page, int numpages)
903 unsigned long addr = (unsigned long)page_address(page);
905 return set_memory_x(addr, numpages);
907 EXPORT_SYMBOL(set_pages_x);
909 int set_pages_nx(struct page *page, int numpages)
911 unsigned long addr = (unsigned long)page_address(page);
913 return set_memory_nx(addr, numpages);
915 EXPORT_SYMBOL(set_pages_nx);
917 int set_pages_ro(struct page *page, int numpages)
919 unsigned long addr = (unsigned long)page_address(page);
921 return set_memory_ro(addr, numpages);
924 int set_pages_rw(struct page *page, int numpages)
926 unsigned long addr = (unsigned long)page_address(page);
928 return set_memory_rw(addr, numpages);
931 #ifdef CONFIG_DEBUG_PAGEALLOC
933 static int __set_pages_p(struct page *page, int numpages)
935 struct cpa_data cpa = { .vaddr = (unsigned long) page_address(page),
936 .numpages = numpages,
937 .mask_set = __pgprot(_PAGE_PRESENT | _PAGE_RW),
938 .mask_clr = __pgprot(0)};
940 return __change_page_attr_set_clr(&cpa, 1);
943 static int __set_pages_np(struct page *page, int numpages)
945 struct cpa_data cpa = { .vaddr = (unsigned long) page_address(page),
946 .numpages = numpages,
947 .mask_set = __pgprot(0),
948 .mask_clr = __pgprot(_PAGE_PRESENT | _PAGE_RW)};
950 return __change_page_attr_set_clr(&cpa, 1);
953 void kernel_map_pages(struct page *page, int numpages, int enable)
955 if (PageHighMem(page))
958 debug_check_no_locks_freed(page_address(page),
959 numpages * PAGE_SIZE);
963 * If page allocator is not up yet then do not call c_p_a():
965 if (!debug_pagealloc_enabled)
969 * The return value is ignored as the calls cannot fail.
970 * Large pages are kept enabled at boot time, and are
971 * split up quickly with DEBUG_PAGEALLOC. If a splitup
972 * fails here (due to temporary memory shortage) no damage
973 * is done because we just keep the largepage intact up
974 * to the next attempt when it will likely be split up:
977 __set_pages_p(page, numpages);
979 __set_pages_np(page, numpages);
982 * We should perform an IPI and flush all tlbs,
983 * but that can deadlock->flush only current cpu:
988 * Try to refill the page pool here. We can do this only after
994 #ifdef CONFIG_DEBUG_FS
995 static int dpa_show(struct seq_file *m, void *v)
997 seq_puts(m, "DEBUG_PAGEALLOC\n");
998 seq_printf(m, "pool_size : %lu\n", pool_size);
999 seq_printf(m, "pool_pages : %lu\n", pool_pages);
1000 seq_printf(m, "pool_low : %lu\n", pool_low);
1001 seq_printf(m, "pool_used : %lu\n", pool_used);
1002 seq_printf(m, "pool_failed : %lu\n", pool_failed);
1007 static int dpa_open(struct inode *inode, struct file *filp)
1009 return single_open(filp, dpa_show, NULL);
1012 static const struct file_operations dpa_fops = {
1015 .llseek = seq_lseek,
1016 .release = single_release,
1019 static int __init debug_pagealloc_proc_init(void)
1023 de = debugfs_create_file("debug_pagealloc", 0600, NULL, NULL,
1030 __initcall(debug_pagealloc_proc_init);
1033 #ifdef CONFIG_HIBERNATION
1035 bool kernel_page_present(struct page *page)
1040 if (PageHighMem(page))
1043 pte = lookup_address((unsigned long)page_address(page), &level);
1044 return (pte_val(*pte) & _PAGE_PRESENT);
1047 #endif /* CONFIG_HIBERNATION */
1049 #endif /* CONFIG_DEBUG_PAGEALLOC */
1051 #ifdef CONFIG_PROC_FS
1052 int arch_report_meminfo(char *page)
1055 n = sprintf(page, "DirectMap4k: %8lu\n"
1056 "DirectMap2M: %8lu\n",
1057 direct_pages_count[PG_LEVEL_4K],
1058 direct_pages_count[PG_LEVEL_2M]);
1059 #ifdef CONFIG_X86_64
1060 n += sprintf(page + n, "DirectMap1G: %8lu\n",
1061 direct_pages_count[PG_LEVEL_1G]);
1068 * The testcases use internal knowledge of the implementation that shouldn't
1069 * be exposed to the rest of the kernel. Include these directly here.
1071 #ifdef CONFIG_CPA_DEBUG
1072 #include "pageattr-test.c"