2 * Copyright 2002 Andi Kleen, SuSE Labs.
3 * Thanks to Ben LaHaise for precious feedback.
5 #include <linux/highmem.h>
6 #include <linux/bootmem.h>
7 #include <linux/module.h>
8 #include <linux/sched.h>
9 #include <linux/slab.h>
13 #include <asm/processor.h>
14 #include <asm/tlbflush.h>
15 #include <asm/sections.h>
16 #include <asm/uaccess.h>
17 #include <asm/pgalloc.h>
20 within(unsigned long addr, unsigned long start, unsigned long end)
22 return addr >= start && addr < end;
30 * clflush_cache_range - flush a cache range with clflush
31 * @addr: virtual start address
32 * @size: number of bytes to flush
34 * clflush is an unordered instruction which needs fencing with mfence
35 * to avoid ordering issues.
37 void clflush_cache_range(void *vaddr, unsigned int size)
39 void *vend = vaddr + size - 1;
43 for (; vaddr < vend; vaddr += boot_cpu_data.x86_clflush_size)
46 * Flush any possible final partial cacheline:
53 static void __cpa_flush_all(void *arg)
55 unsigned long cache = (unsigned long)arg;
58 * Flush all to work around Errata in early athlons regarding
59 * large page flushing.
63 if (cache && boot_cpu_data.x86_model >= 4)
67 static void cpa_flush_all(unsigned long cache)
69 BUG_ON(irqs_disabled());
71 on_each_cpu(__cpa_flush_all, (void *) cache, 1, 1);
74 static void __cpa_flush_range(void *arg)
77 * We could optimize that further and do individual per page
78 * tlb invalidates for a low number of pages. Caveat: we must
79 * flush the high aliases on 64bit as well.
84 static void cpa_flush_range(unsigned long start, int numpages, int cache)
86 unsigned int i, level;
89 BUG_ON(irqs_disabled());
90 WARN_ON(PAGE_ALIGN(start) != start);
92 on_each_cpu(__cpa_flush_range, NULL, 1, 1);
98 * We only need to flush on one CPU,
99 * clflush is a MESI-coherent instruction that
100 * will cause all other CPUs to flush the same
103 for (i = 0, addr = start; i < numpages; i++, addr += PAGE_SIZE) {
104 pte_t *pte = lookup_address(addr, &level);
107 * Only flush present addresses:
109 if (pte && pte_present(*pte))
110 clflush_cache_range((void *) addr, PAGE_SIZE);
114 #define HIGH_MAP_START __START_KERNEL_map
115 #define HIGH_MAP_END (__START_KERNEL_map + KERNEL_TEXT_SIZE)
119 * Converts a virtual address to a X86-64 highmap address
121 static unsigned long virt_to_highmap(void *address)
124 return __pa((unsigned long)address) + HIGH_MAP_START - phys_base;
126 return (unsigned long)address;
131 * Certain areas of memory on x86 require very specific protection flags,
132 * for example the BIOS area or kernel text. Callers don't always get this
133 * right (again, ioremap() on BIOS memory is not uncommon) so this function
134 * checks and fixes these known static required protection bits.
136 static inline pgprot_t static_protections(pgprot_t prot, unsigned long address)
138 pgprot_t forbidden = __pgprot(0);
141 * The BIOS area between 640k and 1Mb needs to be executable for
142 * PCI BIOS based config access (CONFIG_PCI_GOBIOS) support.
144 if (within(__pa(address), BIOS_BEGIN, BIOS_END))
145 pgprot_val(forbidden) |= _PAGE_NX;
148 * The kernel text needs to be executable for obvious reasons
149 * Does not cover __inittext since that is gone later on
151 if (within(address, (unsigned long)_text, (unsigned long)_etext))
152 pgprot_val(forbidden) |= _PAGE_NX;
154 * Do the same for the x86-64 high kernel mapping
156 if (within(address, virt_to_highmap(_text), virt_to_highmap(_etext)))
157 pgprot_val(forbidden) |= _PAGE_NX;
160 #ifdef CONFIG_DEBUG_RODATA
161 /* The .rodata section needs to be read-only */
162 if (within(address, (unsigned long)__start_rodata,
163 (unsigned long)__end_rodata))
164 pgprot_val(forbidden) |= _PAGE_RW;
166 * Do the same for the x86-64 high kernel mapping
168 if (within(address, virt_to_highmap(__start_rodata),
169 virt_to_highmap(__end_rodata)))
170 pgprot_val(forbidden) |= _PAGE_RW;
173 prot = __pgprot(pgprot_val(prot) & ~pgprot_val(forbidden));
178 pte_t *lookup_address(unsigned long address, int *level)
180 pgd_t *pgd = pgd_offset_k(address);
184 *level = PG_LEVEL_NONE;
188 pud = pud_offset(pgd, address);
191 pmd = pmd_offset(pud, address);
195 *level = PG_LEVEL_2M;
199 *level = PG_LEVEL_4K;
200 return pte_offset_kernel(pmd, address);
203 static void __set_pmd_pte(pte_t *kpte, unsigned long address, pte_t pte)
206 set_pte_atomic(kpte, pte);
208 if (!SHARED_KERNEL_PMD) {
211 list_for_each_entry(page, &pgd_list, lru) {
216 pgd = (pgd_t *)page_address(page) + pgd_index(address);
217 pud = pud_offset(pgd, address);
218 pmd = pmd_offset(pud, address);
219 set_pte_atomic((pte_t *)pmd, pte);
225 static int split_large_page(pte_t *kpte, unsigned long address)
227 pgprot_t ref_prot = pte_pgprot(pte_clrhuge(*kpte));
228 gfp_t gfp_flags = GFP_KERNEL;
229 unsigned long flags, addr, pfn;
232 unsigned int i, level;
234 #ifdef CONFIG_DEBUG_PAGEALLOC
235 gfp_flags = __GFP_HIGH | __GFP_NOFAIL | __GFP_NOWARN;
236 gfp_flags = GFP_ATOMIC | __GFP_NOWARN;
238 base = alloc_pages(gfp_flags, 0);
242 spin_lock_irqsave(&pgd_lock, flags);
244 * Check for races, another CPU might have split this page
247 tmp = lookup_address(address, &level);
253 address = __pa(address);
254 addr = address & LARGE_PAGE_MASK;
255 pbase = (pte_t *)page_address(base);
257 paravirt_alloc_pt(&init_mm, page_to_pfn(base));
261 * Get the target pfn from the original entry:
263 pfn = pte_pfn(*kpte);
264 for (i = 0; i < PTRS_PER_PTE; i++, pfn++)
265 set_pte(&pbase[i], pfn_pte(pfn, ref_prot));
268 * Install the new, split up pagetable. Important detail here:
270 * On Intel the NX bit of all levels must be cleared to make a
271 * page executable. See section 4.13.2 of Intel 64 and IA-32
272 * Architectures Software Developer's Manual).
274 ref_prot = pte_pgprot(pte_mkexec(pte_clrhuge(*kpte)));
275 __set_pmd_pte(kpte, address, mk_pte(base, ref_prot));
279 spin_unlock_irqrestore(&pgd_lock, flags);
282 __free_pages(base, 0);
288 __change_page_attr(unsigned long address, pgprot_t mask_set, pgprot_t mask_clr)
290 struct page *kpte_page;
295 kpte = lookup_address(address, &level);
299 kpte_page = virt_to_page(kpte);
300 BUG_ON(PageLRU(kpte_page));
301 BUG_ON(PageCompound(kpte_page));
303 if (level == PG_LEVEL_4K) {
304 pte_t new_pte, old_pte = *kpte;
305 pgprot_t new_prot = pte_pgprot(old_pte);
307 if(!pte_val(old_pte)) {
312 pgprot_val(new_prot) &= ~pgprot_val(mask_clr);
313 pgprot_val(new_prot) |= pgprot_val(mask_set);
315 new_prot = static_protections(new_prot, address);
318 * We need to keep the pfn from the existing PTE,
319 * after all we're only going to change it's attributes
320 * not the memory it points to
322 new_pte = pfn_pte(pte_pfn(old_pte), canon_pgprot(new_prot));
323 set_pte_atomic(kpte, new_pte);
325 err = split_large_page(kpte, address);
333 * change_page_attr_addr - Change page table attributes in linear mapping
334 * @address: Virtual address in linear mapping.
335 * @prot: New page table attribute (PAGE_*)
337 * Change page attributes of a page in the direct mapping. This is a variant
338 * of change_page_attr() that also works on memory holes that do not have
339 * mem_map entry (pfn_valid() is false).
341 * See change_page_attr() documentation for more details.
343 * Modules and drivers should use the set_memory_* APIs instead.
348 change_page_attr_addr(unsigned long address, pgprot_t mask_set,
354 unsigned long phys_addr = __pa(address);
357 * If we are inside the high mapped kernel range, then we
358 * fixup the low mapping first. __va() returns the virtual
359 * address in the linear mapping:
361 if (within(address, HIGH_MAP_START, HIGH_MAP_END))
362 address = (unsigned long) __va(phys_addr);
365 err = __change_page_attr(address, mask_set, mask_clr);
371 * If the physical address is inside the kernel map, we need
372 * to touch the high mapped kernel as well:
374 if (within(phys_addr, 0, KERNEL_TEXT_SIZE)) {
376 * Calc the high mapping address. See __phys_addr()
377 * for the non obvious details.
379 * Note that NX and other required permissions are
380 * checked in static_protections().
382 address = phys_addr + HIGH_MAP_START - phys_base;
385 * Our high aliases are imprecise, because we check
386 * everything between 0 and KERNEL_TEXT_SIZE, so do
387 * not propagate lookup failures back to users:
389 __change_page_attr(address, mask_set, mask_clr);
395 static int __change_page_attr_set_clr(unsigned long addr, int numpages,
396 pgprot_t mask_set, pgprot_t mask_clr)
401 for (i = 0; i < numpages ; i++, addr += PAGE_SIZE) {
402 ret = change_page_attr_addr(addr, mask_set, mask_clr);
410 static inline int cache_attr(pgprot_t attr)
412 return pgprot_val(attr) &
413 (_PAGE_PAT | _PAGE_PAT_LARGE | _PAGE_PWT | _PAGE_PCD);
416 static int change_page_attr_set_clr(unsigned long addr, int numpages,
417 pgprot_t mask_set, pgprot_t mask_clr)
422 * Check, if we are requested to change a not supported
425 mask_set = canon_pgprot(mask_set);
426 mask_clr = canon_pgprot(mask_clr);
427 if (!pgprot_val(mask_set) && !pgprot_val(mask_clr))
430 ret = __change_page_attr_set_clr(addr, numpages, mask_set, mask_clr);
433 * No need to flush, when we did not set any of the caching
436 cache = cache_attr(mask_set);
439 * On success we use clflush, when the CPU supports it to
440 * avoid the wbindv. If the CPU does not support it and in the
441 * error case we fall back to cpa_flush_all (which uses
444 if (!ret && cpu_has_clflush)
445 cpa_flush_range(addr, numpages, cache);
447 cpa_flush_all(cache);
452 static inline int change_page_attr_set(unsigned long addr, int numpages,
455 return change_page_attr_set_clr(addr, numpages, mask, __pgprot(0));
458 static inline int change_page_attr_clear(unsigned long addr, int numpages,
461 return change_page_attr_set_clr(addr, numpages, __pgprot(0), mask);
464 int set_memory_uc(unsigned long addr, int numpages)
466 return change_page_attr_set(addr, numpages,
467 __pgprot(_PAGE_PCD | _PAGE_PWT));
469 EXPORT_SYMBOL(set_memory_uc);
471 int set_memory_wb(unsigned long addr, int numpages)
473 return change_page_attr_clear(addr, numpages,
474 __pgprot(_PAGE_PCD | _PAGE_PWT));
476 EXPORT_SYMBOL(set_memory_wb);
478 int set_memory_x(unsigned long addr, int numpages)
480 return change_page_attr_clear(addr, numpages, __pgprot(_PAGE_NX));
482 EXPORT_SYMBOL(set_memory_x);
484 int set_memory_nx(unsigned long addr, int numpages)
486 return change_page_attr_set(addr, numpages, __pgprot(_PAGE_NX));
488 EXPORT_SYMBOL(set_memory_nx);
490 int set_memory_ro(unsigned long addr, int numpages)
492 return change_page_attr_clear(addr, numpages, __pgprot(_PAGE_RW));
495 int set_memory_rw(unsigned long addr, int numpages)
497 return change_page_attr_set(addr, numpages, __pgprot(_PAGE_RW));
500 int set_memory_np(unsigned long addr, int numpages)
502 return change_page_attr_clear(addr, numpages, __pgprot(_PAGE_PRESENT));
505 int set_pages_uc(struct page *page, int numpages)
507 unsigned long addr = (unsigned long)page_address(page);
509 return set_memory_uc(addr, numpages);
511 EXPORT_SYMBOL(set_pages_uc);
513 int set_pages_wb(struct page *page, int numpages)
515 unsigned long addr = (unsigned long)page_address(page);
517 return set_memory_wb(addr, numpages);
519 EXPORT_SYMBOL(set_pages_wb);
521 int set_pages_x(struct page *page, int numpages)
523 unsigned long addr = (unsigned long)page_address(page);
525 return set_memory_x(addr, numpages);
527 EXPORT_SYMBOL(set_pages_x);
529 int set_pages_nx(struct page *page, int numpages)
531 unsigned long addr = (unsigned long)page_address(page);
533 return set_memory_nx(addr, numpages);
535 EXPORT_SYMBOL(set_pages_nx);
537 int set_pages_ro(struct page *page, int numpages)
539 unsigned long addr = (unsigned long)page_address(page);
541 return set_memory_ro(addr, numpages);
544 int set_pages_rw(struct page *page, int numpages)
546 unsigned long addr = (unsigned long)page_address(page);
548 return set_memory_rw(addr, numpages);
552 #if defined(CONFIG_DEBUG_PAGEALLOC) || defined(CONFIG_CPA_DEBUG)
553 static inline int __change_page_attr_set(unsigned long addr, int numpages,
556 return __change_page_attr_set_clr(addr, numpages, mask, __pgprot(0));
559 static inline int __change_page_attr_clear(unsigned long addr, int numpages,
562 return __change_page_attr_set_clr(addr, numpages, __pgprot(0), mask);
566 #ifdef CONFIG_DEBUG_PAGEALLOC
568 static int __set_pages_p(struct page *page, int numpages)
570 unsigned long addr = (unsigned long)page_address(page);
572 return __change_page_attr_set(addr, numpages,
573 __pgprot(_PAGE_PRESENT | _PAGE_RW));
576 static int __set_pages_np(struct page *page, int numpages)
578 unsigned long addr = (unsigned long)page_address(page);
580 return __change_page_attr_clear(addr, numpages,
581 __pgprot(_PAGE_PRESENT));
584 void kernel_map_pages(struct page *page, int numpages, int enable)
586 if (PageHighMem(page))
589 debug_check_no_locks_freed(page_address(page),
590 numpages * PAGE_SIZE);
594 * If page allocator is not up yet then do not call c_p_a():
596 if (!debug_pagealloc_enabled)
600 * The return value is ignored - the calls cannot fail,
601 * large pages are disabled at boot time:
604 __set_pages_p(page, numpages);
606 __set_pages_np(page, numpages);
609 * We should perform an IPI and flush all tlbs,
610 * but that can deadlock->flush only current cpu:
617 * The testcases use internal knowledge of the implementation that shouldn't
618 * be exposed to the rest of the kernel. Include these directly here.
620 #ifdef CONFIG_CPA_DEBUG
621 #include "pageattr-test.c"