2 * "High Precision Event Timer" based timekeeping.
4 * Copyright (c) 1991,1992,1995 Linus Torvalds
5 * Copyright (c) 1994 Alan Modra
6 * Copyright (c) 1995 Markus Kuhn
7 * Copyright (c) 1996 Ingo Molnar
8 * Copyright (c) 1998 Andrea Arcangeli
9 * Copyright (c) 2002,2006 Vojtech Pavlik
10 * Copyright (c) 2003 Andi Kleen
11 * RTC support code taken from arch/i386/kernel/timers/time_hpet.c
14 #include <linux/kernel.h>
15 #include <linux/sched.h>
16 #include <linux/interrupt.h>
17 #include <linux/init.h>
18 #include <linux/mc146818rtc.h>
19 #include <linux/time.h>
20 #include <linux/ioport.h>
21 #include <linux/module.h>
22 #include <linux/device.h>
23 #include <linux/sysdev.h>
24 #include <linux/bcd.h>
25 #include <linux/notifier.h>
26 #include <linux/cpu.h>
27 #include <linux/kallsyms.h>
28 #include <linux/acpi.h>
29 #include <linux/clockchips.h>
32 #include <acpi/achware.h> /* for PM timer frequency */
33 #include <acpi/acpi_bus.h>
35 #include <asm/i8253.h>
36 #include <asm/pgtable.h>
37 #include <asm/vsyscall.h>
38 #include <asm/timex.h>
39 #include <asm/proto.h>
41 #include <asm/sections.h>
42 #include <linux/hpet.h>
45 #include <asm/mpspec.h>
47 #include <asm/vgtod.h>
49 DEFINE_SPINLOCK(rtc_lock);
50 EXPORT_SYMBOL(rtc_lock);
52 volatile unsigned long __jiffies __section_jiffies = INITIAL_JIFFIES;
54 unsigned long profile_pc(struct pt_regs *regs)
56 unsigned long pc = instruction_pointer(regs);
58 /* Assume the lock function has either no stack frame or a copy
60 Eflags always has bits 22 and up cleared unlike kernel addresses. */
61 if (!user_mode(regs) && in_lock_functions(pc)) {
62 unsigned long *sp = (unsigned long *)regs->rsp;
70 EXPORT_SYMBOL(profile_pc);
72 /* Routines for accessing the CMOS RAM/RTC. */
73 unsigned char rtc_cmos_read(unsigned char addr)
76 lock_cmos_prefix(addr);
77 outb_p(addr, RTC_PORT(0));
78 val = inb_p(RTC_PORT(1));
79 lock_cmos_suffix(addr);
82 EXPORT_SYMBOL(rtc_cmos_read);
84 void rtc_cmos_write(unsigned char val, unsigned char addr)
86 lock_cmos_prefix(addr);
87 outb_p(addr, RTC_PORT(0));
88 outb_p(val, RTC_PORT(1));
89 lock_cmos_suffix(addr);
91 EXPORT_SYMBOL(rtc_cmos_write);
94 * In order to set the CMOS clock precisely, set_rtc_mmss has to be called 500
95 * ms after the second nowtime has started, because when nowtime is written
96 * into the registers of the CMOS clock, it will jump to the next second
97 * precisely 500 ms later. Check the Motorola MC146818A or Dallas DS12887 data
101 static int set_rtc_mmss(unsigned long nowtime)
104 int real_seconds, real_minutes, cmos_minutes;
105 unsigned char control, freq_select;
109 * set_rtc_mmss is called when irqs are enabled, so disable irqs here
111 spin_lock_irqsave(&rtc_lock, flags);
113 * Tell the clock it's being set and stop it.
115 control = CMOS_READ(RTC_CONTROL);
116 CMOS_WRITE(control | RTC_SET, RTC_CONTROL);
118 freq_select = CMOS_READ(RTC_FREQ_SELECT);
119 CMOS_WRITE(freq_select | RTC_DIV_RESET2, RTC_FREQ_SELECT);
121 cmos_minutes = CMOS_READ(RTC_MINUTES);
122 BCD_TO_BIN(cmos_minutes);
125 * since we're only adjusting minutes and seconds, don't interfere with hour
126 * overflow. This avoids messing with unknown time zones but requires your RTC
127 * not to be off by more than 15 minutes. Since we're calling it only when
128 * our clock is externally synchronized using NTP, this shouldn't be a problem.
131 real_seconds = nowtime % 60;
132 real_minutes = nowtime / 60;
133 if (((abs(real_minutes - cmos_minutes) + 15) / 30) & 1)
134 real_minutes += 30; /* correct for half hour time zone */
137 if (abs(real_minutes - cmos_minutes) >= 30) {
138 printk(KERN_WARNING "time.c: can't update CMOS clock "
139 "from %d to %d\n", cmos_minutes, real_minutes);
142 BIN_TO_BCD(real_seconds);
143 BIN_TO_BCD(real_minutes);
144 CMOS_WRITE(real_seconds, RTC_SECONDS);
145 CMOS_WRITE(real_minutes, RTC_MINUTES);
149 * The following flags have to be released exactly in this order, otherwise the
150 * DS12887 (popular MC146818A clone with integrated battery and quartz) will
151 * not reset the oscillator and will not update precisely 500 ms later. You
152 * won't find this mentioned in the Dallas Semiconductor data sheets, but who
153 * believes data sheets anyway ... -- Markus Kuhn
156 CMOS_WRITE(control, RTC_CONTROL);
157 CMOS_WRITE(freq_select, RTC_FREQ_SELECT);
159 spin_unlock_irqrestore(&rtc_lock, flags);
164 int update_persistent_clock(struct timespec now)
166 return set_rtc_mmss(now.tv_sec);
169 static irqreturn_t timer_event_interrupt(int irq, void *dev_id)
171 add_pda(irq0_irqs, 1);
173 global_clock_event->event_handler(global_clock_event);
178 unsigned long read_persistent_clock(void)
180 unsigned int year, mon, day, hour, min, sec;
182 unsigned century = 0;
184 spin_lock_irqsave(&rtc_lock, flags);
186 * if UIP is clear, then we have >= 244 microseconds before RTC
187 * registers will be updated. Spec sheet says that this is the
188 * reliable way to read RTC - registers invalid (off bus) during update
190 while ((CMOS_READ(RTC_FREQ_SELECT) & RTC_UIP))
194 /* now read all RTC registers while stable with interrupts disabled */
195 sec = CMOS_READ(RTC_SECONDS);
196 min = CMOS_READ(RTC_MINUTES);
197 hour = CMOS_READ(RTC_HOURS);
198 day = CMOS_READ(RTC_DAY_OF_MONTH);
199 mon = CMOS_READ(RTC_MONTH);
200 year = CMOS_READ(RTC_YEAR);
202 if (acpi_gbl_FADT.header.revision >= FADT2_REVISION_ID &&
203 acpi_gbl_FADT.century)
204 century = CMOS_READ(acpi_gbl_FADT.century);
206 spin_unlock_irqrestore(&rtc_lock, flags);
209 * We know that x86-64 always uses BCD format, no need to check the
222 year += century * 100;
223 printk(KERN_INFO "Extended CMOS year: %d\n", century * 100);
226 * x86-64 systems only exists since 2002.
227 * This will work up to Dec 31, 2100
232 return mktime(year, mon, day, hour, min, sec);
235 /* calibrate_cpu is used on systems with fixed rate TSCs to determine
236 * processor frequency */
237 #define TICK_COUNT 100000000
238 static unsigned int __init tsc_calibrate_cpu_khz(void)
240 int tsc_start, tsc_now;
242 unsigned long evntsel3 = 0, pmc3 = 0, pmc_now = 0;
245 for (i = 0; i < 4; i++)
246 if (avail_to_resrv_perfctr_nmi_bit(i))
248 no_ctr_free = (i == 4);
251 rdmsrl(MSR_K7_EVNTSEL3, evntsel3);
252 wrmsrl(MSR_K7_EVNTSEL3, 0);
253 rdmsrl(MSR_K7_PERFCTR3, pmc3);
255 reserve_perfctr_nmi(MSR_K7_PERFCTR0 + i);
256 reserve_evntsel_nmi(MSR_K7_EVNTSEL0 + i);
258 local_irq_save(flags);
259 /* start meauring cycles, incrementing from 0 */
260 wrmsrl(MSR_K7_PERFCTR0 + i, 0);
261 wrmsrl(MSR_K7_EVNTSEL0 + i, 1 << 22 | 3 << 16 | 0x76);
264 rdmsrl(MSR_K7_PERFCTR0 + i, pmc_now);
265 tsc_now = get_cycles_sync();
266 } while ((tsc_now - tsc_start) < TICK_COUNT);
268 local_irq_restore(flags);
270 wrmsrl(MSR_K7_EVNTSEL3, 0);
271 wrmsrl(MSR_K7_PERFCTR3, pmc3);
272 wrmsrl(MSR_K7_EVNTSEL3, evntsel3);
274 release_perfctr_nmi(MSR_K7_PERFCTR0 + i);
275 release_evntsel_nmi(MSR_K7_EVNTSEL0 + i);
278 return pmc_now * tsc_khz / (tsc_now - tsc_start);
281 static struct irqaction irq0 = {
282 .handler = timer_event_interrupt,
283 .flags = IRQF_DISABLED | IRQF_IRQPOLL | IRQF_NOBALANCING,
284 .mask = CPU_MASK_NONE,
288 void __init time_init(void)
298 if (cpu_has(&boot_cpu_data, X86_FEATURE_CONSTANT_TSC) &&
299 boot_cpu_data.x86_vendor == X86_VENDOR_AMD &&
300 boot_cpu_data.x86 == 16)
301 cpu_khz = tsc_calibrate_cpu_khz();
303 if (unsynchronized_tsc())
304 mark_tsc_unstable("TSCs unsynchronized");
306 if (cpu_has(&boot_cpu_data, X86_FEATURE_RDTSCP))
307 vgetcpu_mode = VGETCPU_RDTSCP;
309 vgetcpu_mode = VGETCPU_LSL;
311 printk(KERN_INFO "time.c: Detected %d.%03d MHz processor.\n",
312 cpu_khz / 1000, cpu_khz % 1000);
313 init_tsc_clocksource();