2 * x86 SMP booting functions
4 * (c) 1995 Alan Cox, Building #3 <alan@redhat.com>
5 * (c) 1998, 1999, 2000 Ingo Molnar <mingo@redhat.com>
6 * Copyright 2001 Andi Kleen, SuSE Labs.
8 * Much of the core SMP work is based on previous work by Thomas Radke, to
9 * whom a great many thanks are extended.
11 * Thanks to Intel for making available several different Pentium,
12 * Pentium Pro and Pentium-II/Xeon MP machines.
13 * Original development of Linux SMP code supported by Caldera.
15 * This code is released under the GNU General Public License version 2
18 * Felix Koop : NR_CPUS used properly
19 * Jose Renau : Handle single CPU case.
20 * Alan Cox : By repeated request 8) - Total BogoMIP report.
21 * Greg Wright : Fix for kernel stacks panic.
22 * Erich Boleyn : MP v1.4 and additional changes.
23 * Matthias Sattler : Changes for 2.1 kernel map.
24 * Michel Lespinasse : Changes for 2.1 kernel map.
25 * Michael Chastain : Change trampoline.S to gnu as.
26 * Alan Cox : Dumb bug: 'B' step PPro's are fine
27 * Ingo Molnar : Added APIC timers, based on code
29 * Ingo Molnar : various cleanups and rewrites
30 * Tigran Aivazian : fixed "0.00 in /proc/uptime on SMP" bug.
31 * Maciej W. Rozycki : Bits for genuine 82489DX APICs
32 * Andi Kleen : Changed for SMP boot into long mode.
33 * Rusty Russell : Hacked into shape for new "hotplug" boot process.
34 * Andi Kleen : Converted to new state machine.
36 * Probably mostly hotplug CPU ready now.
37 * Ashok Raj : CPU hotplug support
41 #include <linux/init.h>
44 #include <linux/kernel_stat.h>
45 #include <linux/bootmem.h>
46 #include <linux/thread_info.h>
47 #include <linux/module.h>
48 #include <linux/delay.h>
49 #include <linux/mc146818rtc.h>
50 #include <linux/smp.h>
51 #include <linux/kdebug.h>
54 #include <asm/pgalloc.h>
56 #include <asm/tlbflush.h>
57 #include <asm/proto.h>
60 #include <asm/hw_irq.h>
63 /* Set when the idlers are all forked */
64 int smp_threads_ready;
66 /* State of each CPU */
67 DEFINE_PER_CPU(int, cpu_state) = { 0 };
70 * Store all idle threads, this can be reused instead of creating
71 * a new thread. Also avoids complicated thread destroy functionality
74 #ifdef CONFIG_HOTPLUG_CPU
76 * Needed only for CONFIG_HOTPLUG_CPU because __cpuinitdata is
77 * removed after init for !CONFIG_HOTPLUG_CPU.
79 static DEFINE_PER_CPU(struct task_struct *, idle_thread_array);
80 #define get_idle_for_cpu(x) (per_cpu(idle_thread_array, x))
81 #define set_idle_for_cpu(x,p) (per_cpu(idle_thread_array, x) = (p))
83 struct task_struct *idle_thread_array[NR_CPUS] __cpuinitdata ;
84 #define get_idle_for_cpu(x) (idle_thread_array[(x)])
85 #define set_idle_for_cpu(x,p) (idle_thread_array[(x)] = (p))
89 * The bootstrap kernel entry code has set these up. Save them for
93 static void __cpuinit smp_store_cpu_info(int id)
95 struct cpuinfo_x86 *c = &cpu_data(id);
103 static inline void wait_for_init_deassert(atomic_t *deassert)
105 while (!atomic_read(deassert))
110 static atomic_t init_deasserted __cpuinitdata;
113 * Report back to the Boot Processor.
116 void __cpuinit smp_callin(void)
119 unsigned long timeout;
122 * If waken up by an INIT in an 82489DX configuration
123 * we may get here before an INIT-deassert IPI reaches
124 * our local APIC. We have to wait for the IPI or we'll
125 * lock up on an APIC access.
127 wait_for_init_deassert(&init_deasserted);
130 * (This works even if the APIC is not enabled.)
132 phys_id = GET_APIC_ID(apic_read(APIC_ID));
133 cpuid = smp_processor_id();
134 if (cpu_isset(cpuid, cpu_callin_map)) {
135 panic("smp_callin: phys CPU#%d, CPU#%d already present??\n",
138 Dprintk("CPU#%d (phys ID: %d) waiting for CALLOUT\n", cpuid, phys_id);
141 * STARTUP IPIs are fragile beasts as they might sometimes
142 * trigger some glue motherboard logic. Complete APIC bus
143 * silence for 1 second, this overestimates the time the
144 * boot CPU is spending to send the up to 2 STARTUP IPIs
145 * by a factor of two. This should be enough.
149 * Waiting 2s total for startup (udelay is not yet working)
151 timeout = jiffies + 2*HZ;
152 while (time_before(jiffies, timeout)) {
154 * Has the boot CPU finished it's STARTUP sequence?
156 if (cpu_isset(cpuid, cpu_callout_map))
161 if (!time_before(jiffies, timeout)) {
162 panic("smp_callin: CPU%d started up but did not get a callout!\n",
167 * the boot CPU has finished the init stage and is spinning
168 * on callin_map until we finish. We are free to set up this
169 * CPU, first the APIC. (this is probably redundant on most
173 Dprintk("CALLIN, before setup_local_APIC().\n");
175 end_local_APIC_setup();
180 * Need to enable IRQs because it can take longer and then
181 * the NMI watchdog might kill us.
186 Dprintk("Stack at about %p\n",&cpuid);
189 * Save our processor parameters
191 smp_store_cpu_info(cpuid);
194 * Allow the master to continue.
196 cpu_set(cpuid, cpu_callin_map);
200 * Setup code on secondary processor (after comming out of the trampoline)
202 void __cpuinit start_secondary(void)
205 * Dont put anything before smp_callin(), SMP
206 * booting is too fragile that we want to limit the
207 * things done here to the most necessary things.
213 /* otherwise gcc will move up the smp_processor_id before the cpu_init */
217 * Check TSC sync first:
219 check_tsc_sync_target();
221 if (nmi_watchdog == NMI_IO_APIC) {
222 disable_8259A_irq(0);
223 enable_NMI_through_LVT0();
228 * The sibling maps must be set before turing the online map on for
231 set_cpu_sibling_map(smp_processor_id());
234 * We need to hold call_lock, so there is no inconsistency
235 * between the time smp_call_function() determines number of
236 * IPI recipients, and the time when the determination is made
237 * for which cpus receive the IPI in genapic_flat.c. Holding this
238 * lock helps us to not include this cpu in a currently in progress
239 * smp_call_function().
241 lock_ipi_call_lock();
242 spin_lock(&vector_lock);
244 /* Setup the per cpu irq handling data structures */
245 __setup_vector_irq(smp_processor_id());
247 * Allow the master to continue.
249 spin_unlock(&vector_lock);
250 cpu_set(smp_processor_id(), cpu_online_map);
251 per_cpu(cpu_state, smp_processor_id()) = CPU_ONLINE;
253 unlock_ipi_call_lock();
255 setup_secondary_clock();
260 extern volatile unsigned long init_rsp;
261 extern void (*initial_code)(void);
264 static void inquire_remote_apic(int apicid)
266 unsigned i, regs[] = { APIC_ID >> 4, APIC_LVR >> 4, APIC_SPIV >> 4 };
267 char *names[] = { "ID", "VERSION", "SPIV" };
271 printk(KERN_INFO "Inquiring remote APIC #%d...\n", apicid);
273 for (i = 0; i < ARRAY_SIZE(regs); i++) {
274 printk(KERN_INFO "... APIC #%d %s: ", apicid, names[i]);
279 status = safe_apic_wait_icr_idle();
282 "a previous APIC delivery may have failed\n");
284 apic_write(APIC_ICR2, SET_APIC_DEST_FIELD(apicid));
285 apic_write(APIC_ICR, APIC_DM_REMRD | regs[i]);
290 status = apic_read(APIC_ICR) & APIC_ICR_RR_MASK;
291 } while (status == APIC_ICR_RR_INPROG && timeout++ < 1000);
294 case APIC_ICR_RR_VALID:
295 status = apic_read(APIC_RRR);
296 printk(KERN_CONT "%08x\n", status);
299 printk(KERN_CONT "failed\n");
306 * Kick the secondary to wake up.
308 static int __cpuinit wakeup_secondary_via_INIT(int phys_apicid, unsigned int start_rip)
310 unsigned long send_status, accept_status = 0;
311 int maxlvt, num_starts, j;
313 Dprintk("Asserting INIT.\n");
316 * Turn INIT on target chip
318 apic_write(APIC_ICR2, SET_APIC_DEST_FIELD(phys_apicid));
323 apic_write(APIC_ICR, APIC_INT_LEVELTRIG | APIC_INT_ASSERT
326 Dprintk("Waiting for send to finish...\n");
327 send_status = safe_apic_wait_icr_idle();
331 Dprintk("Deasserting INIT.\n");
334 apic_write(APIC_ICR2, SET_APIC_DEST_FIELD(phys_apicid));
337 apic_write(APIC_ICR, APIC_INT_LEVELTRIG | APIC_DM_INIT);
339 Dprintk("Waiting for send to finish...\n");
340 send_status = safe_apic_wait_icr_idle();
343 atomic_set(&init_deasserted, 1);
348 * Run STARTUP IPI loop.
350 Dprintk("#startup loops: %d.\n", num_starts);
352 maxlvt = lapic_get_maxlvt();
354 for (j = 1; j <= num_starts; j++) {
355 Dprintk("Sending STARTUP #%d.\n",j);
356 apic_write(APIC_ESR, 0);
358 Dprintk("After apic_write.\n");
365 apic_write(APIC_ICR2, SET_APIC_DEST_FIELD(phys_apicid));
367 /* Boot on the stack */
368 /* Kick the second */
369 apic_write(APIC_ICR, APIC_DM_STARTUP | (start_rip >> 12));
372 * Give the other CPU some time to accept the IPI.
376 Dprintk("Startup point 1.\n");
378 Dprintk("Waiting for send to finish...\n");
379 send_status = safe_apic_wait_icr_idle();
382 * Give the other CPU some time to accept the IPI.
386 * Due to the Pentium erratum 3AP.
389 apic_write(APIC_ESR, 0);
391 accept_status = (apic_read(APIC_ESR) & 0xEF);
392 if (send_status || accept_status)
395 Dprintk("After Startup.\n");
398 printk(KERN_ERR "APIC never delivered???\n");
400 printk(KERN_ERR "APIC delivery error (%lx).\n", accept_status);
402 return (send_status | accept_status);
406 struct work_struct work;
407 struct task_struct *idle;
408 struct completion done;
412 static void __cpuinit do_fork_idle(struct work_struct *work)
414 struct create_idle *c_idle =
415 container_of(work, struct create_idle, work);
417 c_idle->idle = fork_idle(c_idle->cpu);
418 complete(&c_idle->done);
424 static int __cpuinit do_boot_cpu(int cpu, int apicid)
426 unsigned long boot_error;
428 unsigned long start_rip;
429 struct create_idle c_idle = {
431 .done = COMPLETION_INITIALIZER_ONSTACK(c_idle.done),
433 INIT_WORK(&c_idle.work, do_fork_idle);
435 /* allocate memory for gdts of secondary cpus. Hotplug is considered */
436 if (!cpu_gdt_descr[cpu].address &&
437 !(cpu_gdt_descr[cpu].address = get_zeroed_page(GFP_KERNEL))) {
438 printk(KERN_ERR "Failed to allocate GDT for CPU %d\n", cpu);
442 /* Allocate node local memory for AP pdas */
443 if (cpu_pda(cpu) == &boot_cpu_pda[cpu]) {
444 struct x8664_pda *newpda, *pda;
445 int node = cpu_to_node(cpu);
447 newpda = kmalloc_node(sizeof (struct x8664_pda), GFP_ATOMIC,
450 memcpy(newpda, pda, sizeof (struct x8664_pda));
451 cpu_pda(cpu) = newpda;
454 "Could not allocate node local PDA for CPU %d on node %d\n",
458 alternatives_smp_switch(1);
460 c_idle.idle = get_idle_for_cpu(cpu);
463 c_idle.idle->thread.sp = (unsigned long) (((struct pt_regs *)
464 (THREAD_SIZE + task_stack_page(c_idle.idle))) - 1);
465 init_idle(c_idle.idle, cpu);
470 * During cold boot process, keventd thread is not spun up yet.
471 * When we do cpu hot-add, we create idle threads on the fly, we should
472 * not acquire any attributes from the calling context. Hence the clean
473 * way to create kernel_threads() is to do that from keventd().
474 * We do the current_is_keventd() due to the fact that ACPI notifier
475 * was also queuing to keventd() and when the caller is already running
476 * in context of keventd(), we would end up with locking up the keventd
479 if (!keventd_up() || current_is_keventd())
480 c_idle.work.func(&c_idle.work);
482 schedule_work(&c_idle.work);
483 wait_for_completion(&c_idle.done);
486 if (IS_ERR(c_idle.idle)) {
487 printk("failed fork for CPU %d\n", cpu);
488 return PTR_ERR(c_idle.idle);
491 set_idle_for_cpu(cpu, c_idle.idle);
495 cpu_pda(cpu)->pcurrent = c_idle.idle;
497 start_rip = setup_trampoline();
499 init_rsp = c_idle.idle->thread.sp;
500 load_sp0(&per_cpu(init_tss, cpu), &c_idle.idle->thread);
501 initial_code = start_secondary;
502 clear_tsk_thread_flag(c_idle.idle, TIF_FORK);
504 printk(KERN_INFO "Booting processor %d/%d APIC 0x%x\n", cpu,
505 cpus_weight(cpu_present_map),
509 * This grunge runs the startup process for
510 * the targeted processor.
513 atomic_set(&init_deasserted, 0);
515 Dprintk("Setting warm reset code and vector.\n");
517 CMOS_WRITE(0xa, 0xf);
520 *((volatile unsigned short *) phys_to_virt(0x469)) = start_rip >> 4;
522 *((volatile unsigned short *) phys_to_virt(0x467)) = start_rip & 0xf;
526 * Be paranoid about clearing APIC errors.
528 apic_write(APIC_ESR, 0);
532 * Status is now clean
537 * Starting actual IPI sequence...
539 boot_error = wakeup_secondary_via_INIT(apicid, start_rip);
543 * allow APs to start initializing.
545 Dprintk("Before Callout %d.\n", cpu);
546 cpu_set(cpu, cpu_callout_map);
547 Dprintk("After Callout %d.\n", cpu);
550 * Wait 5s total for a response
552 for (timeout = 0; timeout < 50000; timeout++) {
553 if (cpu_isset(cpu, cpu_callin_map))
554 break; /* It has booted */
558 if (cpu_isset(cpu, cpu_callin_map)) {
559 /* number CPUs logically, starting from 1 (BSP is 0) */
560 Dprintk("CPU has booted.\n");
563 if (*((volatile unsigned char *)phys_to_virt(SMP_TRAMPOLINE_BASE))
565 /* trampoline started but...? */
566 printk("Stuck ??\n");
568 /* trampoline code not run */
569 printk("Not responding.\n");
571 inquire_remote_apic(apicid);
576 cpu_clear(cpu, cpu_callout_map); /* was set here (do_boot_cpu()) */
577 clear_bit(cpu, (unsigned long *)&cpu_initialized); /* was set by cpu_init() */
578 clear_node_cpumask(cpu); /* was set by numa_add_cpu */
579 cpu_clear(cpu, cpu_present_map);
580 cpu_clear(cpu, cpu_possible_map);
581 per_cpu(x86_cpu_to_apicid, cpu) = BAD_APICID;
588 cycles_t cacheflush_time;
589 unsigned long cache_decay_ticks;
592 * Cleanup possible dangling ends...
594 static __cpuinit void smp_cleanup_boot(void)
597 * Paranoid: Set warm reset code and vector here back
603 * Reset trampoline flag
605 *((volatile int *) phys_to_virt(0x467)) = 0;
609 * Fall back to non SMP mode after errors.
611 * RED-PEN audit/test this more. I bet there is more state messed up here.
613 static __init void disable_smp(void)
615 cpu_present_map = cpumask_of_cpu(0);
616 cpu_possible_map = cpumask_of_cpu(0);
617 if (smp_found_config)
618 phys_cpu_present_map = physid_mask_of_physid(boot_cpu_id);
620 phys_cpu_present_map = physid_mask_of_physid(0);
621 cpu_set(0, per_cpu(cpu_sibling_map, 0));
622 cpu_set(0, per_cpu(cpu_core_map, 0));
626 * Various sanity checks.
628 static int __init smp_sanity_check(unsigned max_cpus)
630 if (!physid_isset(hard_smp_processor_id(), phys_cpu_present_map)) {
631 printk("weird, boot CPU (#%d) not listed by the BIOS.\n",
632 hard_smp_processor_id());
633 physid_set(hard_smp_processor_id(), phys_cpu_present_map);
637 * If we couldn't find an SMP configuration at boot time,
638 * get out of here now!
640 if (!smp_found_config) {
641 printk(KERN_NOTICE "SMP motherboard not detected.\n");
643 if (APIC_init_uniprocessor())
644 printk(KERN_NOTICE "Local APIC not detected."
645 " Using dummy APIC emulation.\n");
650 * Should not be necessary because the MP table should list the boot
651 * CPU too, but we do it for the sake of robustness anyway.
653 if (!physid_isset(boot_cpu_id, phys_cpu_present_map)) {
654 printk(KERN_NOTICE "weird, boot CPU (#%d) not listed by the BIOS.\n",
656 physid_set(hard_smp_processor_id(), phys_cpu_present_map);
660 * If we couldn't find a local APIC, then get out of here now!
663 printk(KERN_ERR "BIOS bug, local APIC #%d not detected!...\n",
665 printk(KERN_ERR "... forcing use of dummy APIC emulation. (tell your hw vendor)\n");
671 * If SMP should be disabled, then really disable it!
674 printk(KERN_INFO "SMP mode deactivated, forcing use of dummy APIC emulation.\n");
682 static void __init smp_cpu_index_default(void)
685 struct cpuinfo_x86 *c;
687 for_each_cpu_mask(i, cpu_possible_map) {
689 /* mark all to hotplug */
690 c->cpu_index = NR_CPUS;
695 * Prepare for SMP bootup. The MP table or ACPI has been read
696 * earlier. Just do some sanity checking here and enable APIC mode.
698 void __init native_smp_prepare_cpus(unsigned int max_cpus)
700 nmi_watchdog_default();
701 smp_cpu_index_default();
702 current_cpu_data = boot_cpu_data;
703 current_thread_info()->cpu = 0; /* needed? */
704 set_cpu_sibling_map(0);
706 if (smp_sanity_check(max_cpus) < 0) {
707 printk(KERN_INFO "SMP disabled\n");
714 * Switch from PIC to APIC mode.
719 * Enable IO APIC before setting up error vector
721 if (!skip_ioapic_setup && nr_ioapics)
723 end_local_APIC_setup();
725 if (GET_APIC_ID(apic_read(APIC_ID)) != boot_cpu_id) {
726 panic("Boot APIC ID in local APIC unexpected (%d vs %d)",
727 GET_APIC_ID(apic_read(APIC_ID)), boot_cpu_id);
728 /* Or can we switch back to PIC here? */
732 * Now start the IO-APICs
734 if (!skip_ioapic_setup && nr_ioapics)
740 * Set up local APIC timer on boot CPU.
747 * Early setup to make printk work.
749 void __init native_smp_prepare_boot_cpu(void)
751 int me = smp_processor_id();
752 /* already set me in cpu_online_map in boot_cpu_init() */
753 cpu_set(me, cpu_callout_map);
754 per_cpu(cpu_state, me) = CPU_ONLINE;
758 * Entry point to boot a CPU.
760 int __cpuinit native_cpu_up(unsigned int cpu)
762 int apicid = cpu_present_to_apicid(cpu);
766 WARN_ON(irqs_disabled());
768 Dprintk("++++++++++++++++++++=_---CPU UP %u\n", cpu);
770 if (apicid == BAD_APICID || apicid == boot_cpu_id ||
771 !physid_isset(apicid, phys_cpu_present_map)) {
772 printk("__cpu_up: bad cpu %d\n", cpu);
777 * Already booted CPU?
779 if (cpu_isset(cpu, cpu_callin_map)) {
780 Dprintk("do_boot_cpu %d Already started\n", cpu);
785 * Save current MTRR state in case it was changed since early boot
786 * (e.g. by the ACPI SMI) to initialize new CPUs with MTRRs in sync:
790 per_cpu(cpu_state, cpu) = CPU_UP_PREPARE;
792 err = do_boot_cpu(cpu, apicid);
794 Dprintk("do_boot_cpu failed %d\n", err);
798 /* Unleash the CPU! */
799 Dprintk("waiting for cpu %d\n", cpu);
802 * Make sure and check TSC sync:
804 local_irq_save(flags);
805 check_tsc_sync_source(cpu);
806 local_irq_restore(flags);
808 while (!cpu_isset(cpu, cpu_online_map))
816 * Finish the SMP boot.
818 void __init native_smp_cpus_done(unsigned int max_cpus)
822 check_nmi_watchdog();