2 * x86 SMP booting functions
4 * (c) 1995 Alan Cox, Building #3 <alan@redhat.com>
5 * (c) 1998, 1999, 2000 Ingo Molnar <mingo@redhat.com>
6 * Copyright 2001 Andi Kleen, SuSE Labs.
8 * Much of the core SMP work is based on previous work by Thomas Radke, to
9 * whom a great many thanks are extended.
11 * Thanks to Intel for making available several different Pentium,
12 * Pentium Pro and Pentium-II/Xeon MP machines.
13 * Original development of Linux SMP code supported by Caldera.
15 * This code is released under the GNU General Public License version 2
18 * Felix Koop : NR_CPUS used properly
19 * Jose Renau : Handle single CPU case.
20 * Alan Cox : By repeated request 8) - Total BogoMIP report.
21 * Greg Wright : Fix for kernel stacks panic.
22 * Erich Boleyn : MP v1.4 and additional changes.
23 * Matthias Sattler : Changes for 2.1 kernel map.
24 * Michel Lespinasse : Changes for 2.1 kernel map.
25 * Michael Chastain : Change trampoline.S to gnu as.
26 * Alan Cox : Dumb bug: 'B' step PPro's are fine
27 * Ingo Molnar : Added APIC timers, based on code
29 * Ingo Molnar : various cleanups and rewrites
30 * Tigran Aivazian : fixed "0.00 in /proc/uptime on SMP" bug.
31 * Maciej W. Rozycki : Bits for genuine 82489DX APICs
32 * Andi Kleen : Changed for SMP boot into long mode.
33 * Rusty Russell : Hacked into shape for new "hotplug" boot process.
34 * Andi Kleen : Converted to new state machine.
36 * Probably mostly hotplug CPU ready now.
37 * Ashok Raj : CPU hotplug support
41 #include <linux/init.h>
44 #include <linux/kernel_stat.h>
45 #include <linux/bootmem.h>
46 #include <linux/thread_info.h>
47 #include <linux/module.h>
48 #include <linux/delay.h>
49 #include <linux/mc146818rtc.h>
50 #include <linux/smp.h>
51 #include <linux/kdebug.h>
54 #include <asm/pgalloc.h>
56 #include <asm/tlbflush.h>
57 #include <asm/proto.h>
60 #include <asm/hw_irq.h>
63 #include <mach_wakecpu.h>
64 #include <mach_apic.h>
65 #include <smpboot_hooks.h>
66 #include <mach_apic.h>
68 /* Set when the idlers are all forked */
69 int smp_threads_ready;
71 /* State of each CPU */
72 DEFINE_PER_CPU(int, cpu_state) = { 0 };
75 * Store all idle threads, this can be reused instead of creating
76 * a new thread. Also avoids complicated thread destroy functionality
79 #ifdef CONFIG_HOTPLUG_CPU
81 * Needed only for CONFIG_HOTPLUG_CPU because __cpuinitdata is
82 * removed after init for !CONFIG_HOTPLUG_CPU.
84 static DEFINE_PER_CPU(struct task_struct *, idle_thread_array);
85 #define get_idle_for_cpu(x) (per_cpu(idle_thread_array, x))
86 #define set_idle_for_cpu(x,p) (per_cpu(idle_thread_array, x) = (p))
88 struct task_struct *idle_thread_array[NR_CPUS] __cpuinitdata ;
89 #define get_idle_for_cpu(x) (idle_thread_array[(x)])
90 #define set_idle_for_cpu(x,p) (idle_thread_array[(x)] = (p))
93 static atomic_t init_deasserted __cpuinitdata;
95 #define smp_callin_clear_local_apic() do {} while (0)
96 #define map_cpu_to_logical_apicid() do {} while (0)
99 * Report back to the Boot Processor.
102 void __cpuinit smp_callin(void)
105 unsigned long timeout;
108 * If waken up by an INIT in an 82489DX configuration
109 * we may get here before an INIT-deassert IPI reaches
110 * our local APIC. We have to wait for the IPI or we'll
111 * lock up on an APIC access.
113 wait_for_init_deassert(&init_deasserted);
116 * (This works even if the APIC is not enabled.)
118 phys_id = GET_APIC_ID(apic_read(APIC_ID));
119 cpuid = smp_processor_id();
120 if (cpu_isset(cpuid, cpu_callin_map)) {
121 panic("smp_callin: phys CPU#%d, CPU#%d already present??\n",
124 Dprintk("CPU#%d (phys ID: %d) waiting for CALLOUT\n", cpuid, phys_id);
127 * STARTUP IPIs are fragile beasts as they might sometimes
128 * trigger some glue motherboard logic. Complete APIC bus
129 * silence for 1 second, this overestimates the time the
130 * boot CPU is spending to send the up to 2 STARTUP IPIs
131 * by a factor of two. This should be enough.
135 * Waiting 2s total for startup (udelay is not yet working)
137 timeout = jiffies + 2*HZ;
138 while (time_before(jiffies, timeout)) {
140 * Has the boot CPU finished it's STARTUP sequence?
142 if (cpu_isset(cpuid, cpu_callout_map))
147 if (!time_before(jiffies, timeout)) {
148 panic("smp_callin: CPU%d started up but did not get a callout!\n",
153 * the boot CPU has finished the init stage and is spinning
154 * on callin_map until we finish. We are free to set up this
155 * CPU, first the APIC. (this is probably redundant on most
159 Dprintk("CALLIN, before setup_local_APIC().\n");
160 smp_callin_clear_local_apic();
162 end_local_APIC_setup();
163 map_cpu_to_logical_apicid();
168 * Need to enable IRQs because it can take longer and then
169 * the NMI watchdog might kill us.
174 Dprintk("Stack at about %p\n",&cpuid);
177 * Save our processor parameters
179 smp_store_cpu_info(cpuid);
182 * Allow the master to continue.
184 cpu_set(cpuid, cpu_callin_map);
188 * Setup code on secondary processor (after comming out of the trampoline)
190 void __cpuinit start_secondary(void)
193 * Dont put anything before smp_callin(), SMP
194 * booting is too fragile that we want to limit the
195 * things done here to the most necessary things.
201 /* otherwise gcc will move up the smp_processor_id before the cpu_init */
205 * Check TSC sync first:
207 check_tsc_sync_target();
209 if (nmi_watchdog == NMI_IO_APIC) {
210 disable_8259A_irq(0);
211 enable_NMI_through_LVT0();
216 * The sibling maps must be set before turing the online map on for
219 set_cpu_sibling_map(smp_processor_id());
222 * We need to hold call_lock, so there is no inconsistency
223 * between the time smp_call_function() determines number of
224 * IPI recipients, and the time when the determination is made
225 * for which cpus receive the IPI in genapic_flat.c. Holding this
226 * lock helps us to not include this cpu in a currently in progress
227 * smp_call_function().
229 lock_ipi_call_lock();
230 spin_lock(&vector_lock);
232 /* Setup the per cpu irq handling data structures */
233 __setup_vector_irq(smp_processor_id());
235 * Allow the master to continue.
237 spin_unlock(&vector_lock);
238 cpu_set(smp_processor_id(), cpu_online_map);
239 unlock_ipi_call_lock();
241 per_cpu(cpu_state, smp_processor_id()) = CPU_ONLINE;
243 setup_secondary_clock();
249 extern volatile unsigned long init_rsp;
250 extern void (*initial_code)(void);
253 static void __inquire_remote_apic(int apicid)
255 unsigned i, regs[] = { APIC_ID >> 4, APIC_LVR >> 4, APIC_SPIV >> 4 };
256 char *names[] = { "ID", "VERSION", "SPIV" };
260 printk(KERN_INFO "Inquiring remote APIC #%d...\n", apicid);
262 for (i = 0; i < ARRAY_SIZE(regs); i++) {
263 printk(KERN_INFO "... APIC #%d %s: ", apicid, names[i]);
268 status = safe_apic_wait_icr_idle();
271 "a previous APIC delivery may have failed\n");
273 apic_write_around(APIC_ICR2, SET_APIC_DEST_FIELD(apicid));
274 apic_write_around(APIC_ICR, APIC_DM_REMRD | regs[i]);
279 status = apic_read(APIC_ICR) & APIC_ICR_RR_MASK;
280 } while (status == APIC_ICR_RR_INPROG && timeout++ < 1000);
283 case APIC_ICR_RR_VALID:
284 status = apic_read(APIC_RRR);
285 printk(KERN_CONT "%08x\n", status);
288 printk(KERN_CONT "failed\n");
295 * Kick the secondary to wake up.
297 static int __cpuinit wakeup_secondary_cpu(int phys_apicid,
298 unsigned int start_rip)
300 unsigned long send_status, accept_status = 0;
301 int maxlvt, num_starts, j;
304 * Be paranoid about clearing APIC errors.
306 if (APIC_INTEGRATED(apic_version[phys_apicid])) {
307 apic_read_around(APIC_SPIV);
308 apic_write(APIC_ESR, 0);
312 Dprintk("Asserting INIT.\n");
315 * Turn INIT on target chip
317 apic_write_around(APIC_ICR2, SET_APIC_DEST_FIELD(phys_apicid));
322 apic_write_around(APIC_ICR, APIC_INT_LEVELTRIG | APIC_INT_ASSERT
325 Dprintk("Waiting for send to finish...\n");
326 send_status = safe_apic_wait_icr_idle();
330 Dprintk("Deasserting INIT.\n");
333 apic_write_around(APIC_ICR2, SET_APIC_DEST_FIELD(phys_apicid));
336 apic_write_around(APIC_ICR, APIC_INT_LEVELTRIG | APIC_DM_INIT);
338 Dprintk("Waiting for send to finish...\n");
339 send_status = safe_apic_wait_icr_idle();
342 atomic_set(&init_deasserted, 1);
344 if (APIC_INTEGRATED(apic_version[phys_apicid]))
350 * Paravirt / VMI wants a startup IPI hook here to set up the
351 * target processor state.
353 startup_ipi_hook(phys_apicid, (unsigned long) start_secondary,
354 (unsigned long) init_rsp);
358 * Run STARTUP IPI loop.
360 Dprintk("#startup loops: %d.\n", num_starts);
362 maxlvt = lapic_get_maxlvt();
364 for (j = 1; j <= num_starts; j++) {
365 Dprintk("Sending STARTUP #%d.\n",j);
366 apic_read_around(APIC_SPIV);
367 apic_write(APIC_ESR, 0);
369 Dprintk("After apic_write.\n");
376 apic_write_around(APIC_ICR2, SET_APIC_DEST_FIELD(phys_apicid));
378 /* Boot on the stack */
379 /* Kick the second */
380 apic_write_around(APIC_ICR, APIC_DM_STARTUP | (start_rip>>12));
383 * Give the other CPU some time to accept the IPI.
387 Dprintk("Startup point 1.\n");
389 Dprintk("Waiting for send to finish...\n");
390 send_status = safe_apic_wait_icr_idle();
393 * Give the other CPU some time to accept the IPI.
397 * Due to the Pentium erratum 3AP.
400 apic_read_around(APIC_SPIV);
401 apic_write(APIC_ESR, 0);
403 accept_status = (apic_read(APIC_ESR) & 0xEF);
404 if (send_status || accept_status)
407 Dprintk("After Startup.\n");
410 printk(KERN_ERR "APIC never delivered???\n");
412 printk(KERN_ERR "APIC delivery error (%lx).\n", accept_status);
414 return (send_status | accept_status);
418 struct work_struct work;
419 struct task_struct *idle;
420 struct completion done;
424 static void __cpuinit do_fork_idle(struct work_struct *work)
426 struct create_idle *c_idle =
427 container_of(work, struct create_idle, work);
429 c_idle->idle = fork_idle(c_idle->cpu);
430 complete(&c_idle->done);
436 static int __cpuinit do_boot_cpu(int cpu, int apicid)
438 unsigned long boot_error = 0;
440 unsigned long start_rip;
441 struct create_idle c_idle = {
443 .done = COMPLETION_INITIALIZER_ONSTACK(c_idle.done),
445 INIT_WORK(&c_idle.work, do_fork_idle);
447 /* allocate memory for gdts of secondary cpus. Hotplug is considered */
448 if (!cpu_gdt_descr[cpu].address &&
449 !(cpu_gdt_descr[cpu].address = get_zeroed_page(GFP_KERNEL))) {
450 printk(KERN_ERR "Failed to allocate GDT for CPU %d\n", cpu);
454 /* Allocate node local memory for AP pdas */
455 if (cpu_pda(cpu) == &boot_cpu_pda[cpu]) {
456 struct x8664_pda *newpda, *pda;
457 int node = cpu_to_node(cpu);
459 newpda = kmalloc_node(sizeof (struct x8664_pda), GFP_ATOMIC,
462 memcpy(newpda, pda, sizeof (struct x8664_pda));
463 cpu_pda(cpu) = newpda;
466 "Could not allocate node local PDA for CPU %d on node %d\n",
470 alternatives_smp_switch(1);
472 c_idle.idle = get_idle_for_cpu(cpu);
475 c_idle.idle->thread.sp = (unsigned long) (((struct pt_regs *)
476 (THREAD_SIZE + task_stack_page(c_idle.idle))) - 1);
477 init_idle(c_idle.idle, cpu);
482 * During cold boot process, keventd thread is not spun up yet.
483 * When we do cpu hot-add, we create idle threads on the fly, we should
484 * not acquire any attributes from the calling context. Hence the clean
485 * way to create kernel_threads() is to do that from keventd().
486 * We do the current_is_keventd() due to the fact that ACPI notifier
487 * was also queuing to keventd() and when the caller is already running
488 * in context of keventd(), we would end up with locking up the keventd
491 if (!keventd_up() || current_is_keventd())
492 c_idle.work.func(&c_idle.work);
494 schedule_work(&c_idle.work);
495 wait_for_completion(&c_idle.done);
498 if (IS_ERR(c_idle.idle)) {
499 printk("failed fork for CPU %d\n", cpu);
500 return PTR_ERR(c_idle.idle);
503 set_idle_for_cpu(cpu, c_idle.idle);
507 cpu_pda(cpu)->pcurrent = c_idle.idle;
509 start_rip = setup_trampoline();
511 init_rsp = c_idle.idle->thread.sp;
512 load_sp0(&per_cpu(init_tss, cpu), &c_idle.idle->thread);
513 initial_code = start_secondary;
514 clear_tsk_thread_flag(c_idle.idle, TIF_FORK);
516 printk(KERN_INFO "Booting processor %d/%d APIC 0x%x\n", cpu,
517 cpus_weight(cpu_present_map),
521 * This grunge runs the startup process for
522 * the targeted processor.
525 atomic_set(&init_deasserted, 0);
527 Dprintk("Setting warm reset code and vector.\n");
529 smpboot_setup_warm_reset_vector(start_rip);
531 * Be paranoid about clearing APIC errors.
533 apic_write(APIC_ESR, 0);
537 * Starting actual IPI sequence...
539 boot_error = wakeup_secondary_cpu(apicid, start_rip);
543 * allow APs to start initializing.
545 Dprintk("Before Callout %d.\n", cpu);
546 cpu_set(cpu, cpu_callout_map);
547 Dprintk("After Callout %d.\n", cpu);
550 * Wait 5s total for a response
552 for (timeout = 0; timeout < 50000; timeout++) {
553 if (cpu_isset(cpu, cpu_callin_map))
554 break; /* It has booted */
558 if (cpu_isset(cpu, cpu_callin_map)) {
559 /* number CPUs logically, starting from 1 (BSP is 0) */
560 Dprintk("CPU has booted.\n");
561 printk(KERN_INFO "CPU%d: ", cpu);
562 print_cpu_info(&cpu_data(cpu));
565 if (*((volatile unsigned char *)trampoline_base)
567 /* trampoline started but...? */
568 printk("Stuck ??\n");
570 /* trampoline code not run */
571 printk("Not responding.\n");
573 inquire_remote_apic(apicid);
578 cpu_clear(cpu, cpu_callout_map); /* was set here (do_boot_cpu()) */
579 clear_bit(cpu, (unsigned long *)&cpu_initialized); /* was set by cpu_init() */
580 clear_node_cpumask(cpu); /* was set by numa_add_cpu */
581 cpu_clear(cpu, cpu_present_map);
582 cpu_clear(cpu, cpu_possible_map);
583 per_cpu(x86_cpu_to_apicid, cpu) = BAD_APICID;
586 /* mark "stuck" area as not stuck */
587 *((volatile unsigned long *)trampoline_base) = 0;
592 cycles_t cacheflush_time;
593 unsigned long cache_decay_ticks;
596 * Fall back to non SMP mode after errors.
598 * RED-PEN audit/test this more. I bet there is more state messed up here.
600 static __init void disable_smp(void)
602 cpu_present_map = cpumask_of_cpu(0);
603 cpu_possible_map = cpumask_of_cpu(0);
604 if (smp_found_config)
605 phys_cpu_present_map =
606 physid_mask_of_physid(boot_cpu_physical_apicid);
608 phys_cpu_present_map = physid_mask_of_physid(0);
609 cpu_set(0, per_cpu(cpu_sibling_map, 0));
610 cpu_set(0, per_cpu(cpu_core_map, 0));
614 * Various sanity checks.
616 static int __init smp_sanity_check(unsigned max_cpus)
618 if (!physid_isset(hard_smp_processor_id(), phys_cpu_present_map)) {
619 printk("weird, boot CPU (#%d) not listed by the BIOS.\n",
620 hard_smp_processor_id());
621 physid_set(hard_smp_processor_id(), phys_cpu_present_map);
625 * If we couldn't find an SMP configuration at boot time,
626 * get out of here now!
628 if (!smp_found_config) {
629 printk(KERN_NOTICE "SMP motherboard not detected.\n");
631 if (APIC_init_uniprocessor())
632 printk(KERN_NOTICE "Local APIC not detected."
633 " Using dummy APIC emulation.\n");
638 * Should not be necessary because the MP table should list the boot
639 * CPU too, but we do it for the sake of robustness anyway.
641 if (!physid_isset(boot_cpu_physical_apicid, phys_cpu_present_map)) {
643 "weird, boot CPU (#%d) not listed by the BIOS.\n",
644 boot_cpu_physical_apicid);
645 physid_set(hard_smp_processor_id(), phys_cpu_present_map);
649 * If we couldn't find a local APIC, then get out of here now!
652 printk(KERN_ERR "BIOS bug, local APIC #%d not detected!...\n",
653 boot_cpu_physical_apicid);
654 printk(KERN_ERR "... forcing use of dummy APIC emulation. (tell your hw vendor)\n");
660 * If SMP should be disabled, then really disable it!
663 printk(KERN_INFO "SMP mode deactivated, forcing use of dummy APIC emulation.\n");
671 static void __init smp_cpu_index_default(void)
674 struct cpuinfo_x86 *c;
676 for_each_cpu_mask(i, cpu_possible_map) {
678 /* mark all to hotplug */
679 c->cpu_index = NR_CPUS;
684 * Prepare for SMP bootup. The MP table or ACPI has been read
685 * earlier. Just do some sanity checking here and enable APIC mode.
687 void __init native_smp_prepare_cpus(unsigned int max_cpus)
689 nmi_watchdog_default();
690 smp_cpu_index_default();
691 current_cpu_data = boot_cpu_data;
692 current_thread_info()->cpu = 0; /* needed? */
693 set_cpu_sibling_map(0);
695 if (smp_sanity_check(max_cpus) < 0) {
696 printk(KERN_INFO "SMP disabled\n");
703 * Switch from PIC to APIC mode.
708 * Enable IO APIC before setting up error vector
710 if (!skip_ioapic_setup && nr_ioapics)
712 end_local_APIC_setup();
714 if (GET_APIC_ID(apic_read(APIC_ID)) != boot_cpu_physical_apicid) {
715 panic("Boot APIC ID in local APIC unexpected (%d vs %d)",
716 GET_APIC_ID(apic_read(APIC_ID)), boot_cpu_physical_apicid);
717 /* Or can we switch back to PIC here? */
721 * Now start the IO-APICs
723 if (!skip_ioapic_setup && nr_ioapics)
729 * Set up local APIC timer on boot CPU.
733 printk(KERN_INFO "CPU%d: ", 0);
734 print_cpu_info(&cpu_data(0));
738 * Early setup to make printk work.
740 void __init native_smp_prepare_boot_cpu(void)
742 int me = smp_processor_id();
743 /* already set me in cpu_online_map in boot_cpu_init() */
744 cpu_set(me, cpu_callout_map);
745 per_cpu(cpu_state, me) = CPU_ONLINE;
749 * Entry point to boot a CPU.
751 int __cpuinit native_cpu_up(unsigned int cpu)
753 int apicid = cpu_present_to_apicid(cpu);
757 WARN_ON(irqs_disabled());
759 Dprintk("++++++++++++++++++++=_---CPU UP %u\n", cpu);
761 if (apicid == BAD_APICID || apicid == boot_cpu_physical_apicid ||
762 !physid_isset(apicid, phys_cpu_present_map)) {
763 printk("__cpu_up: bad cpu %d\n", cpu);
768 * Already booted CPU?
770 if (cpu_isset(cpu, cpu_callin_map)) {
771 Dprintk("do_boot_cpu %d Already started\n", cpu);
776 * Save current MTRR state in case it was changed since early boot
777 * (e.g. by the ACPI SMI) to initialize new CPUs with MTRRs in sync:
781 per_cpu(cpu_state, cpu) = CPU_UP_PREPARE;
783 err = do_boot_cpu(cpu, apicid);
785 Dprintk("do_boot_cpu failed %d\n", err);
789 /* Unleash the CPU! */
790 Dprintk("waiting for cpu %d\n", cpu);
793 * Make sure and check TSC sync:
795 local_irq_save(flags);
796 check_tsc_sync_source(cpu);
797 local_irq_restore(flags);
799 while (!cpu_isset(cpu, cpu_online_map))
806 extern void impress_friends(void);
807 extern void smp_checks(void);
810 * Finish the SMP boot.
812 void __init native_smp_cpus_done(unsigned int max_cpus)
814 smpboot_restore_warm_reset_vector();
816 Dprintk("Boot done.\n");
821 check_nmi_watchdog();