2 * x86 SMP booting functions
4 * (c) 1995 Alan Cox, Building #3 <alan@redhat.com>
5 * (c) 1998, 1999, 2000 Ingo Molnar <mingo@redhat.com>
6 * Copyright 2001 Andi Kleen, SuSE Labs.
8 * Much of the core SMP work is based on previous work by Thomas Radke, to
9 * whom a great many thanks are extended.
11 * Thanks to Intel for making available several different Pentium,
12 * Pentium Pro and Pentium-II/Xeon MP machines.
13 * Original development of Linux SMP code supported by Caldera.
15 * This code is released under the GNU General Public License version 2
18 * Felix Koop : NR_CPUS used properly
19 * Jose Renau : Handle single CPU case.
20 * Alan Cox : By repeated request 8) - Total BogoMIP report.
21 * Greg Wright : Fix for kernel stacks panic.
22 * Erich Boleyn : MP v1.4 and additional changes.
23 * Matthias Sattler : Changes for 2.1 kernel map.
24 * Michel Lespinasse : Changes for 2.1 kernel map.
25 * Michael Chastain : Change trampoline.S to gnu as.
26 * Alan Cox : Dumb bug: 'B' step PPro's are fine
27 * Ingo Molnar : Added APIC timers, based on code
29 * Ingo Molnar : various cleanups and rewrites
30 * Tigran Aivazian : fixed "0.00 in /proc/uptime on SMP" bug.
31 * Maciej W. Rozycki : Bits for genuine 82489DX APICs
32 * Andi Kleen : Changed for SMP boot into long mode.
33 * Rusty Russell : Hacked into shape for new "hotplug" boot process.
34 * Andi Kleen : Converted to new state machine.
36 * Probably mostly hotplug CPU ready now.
37 * Ashok Raj : CPU hotplug support
41 #include <linux/init.h>
44 #include <linux/kernel_stat.h>
45 #include <linux/bootmem.h>
46 #include <linux/thread_info.h>
47 #include <linux/module.h>
48 #include <linux/delay.h>
49 #include <linux/mc146818rtc.h>
50 #include <linux/smp.h>
51 #include <linux/kdebug.h>
54 #include <asm/pgalloc.h>
56 #include <asm/tlbflush.h>
57 #include <asm/proto.h>
60 #include <asm/hw_irq.h>
63 /* Set when the idlers are all forked */
64 int smp_threads_ready;
66 /* State of each CPU */
67 DEFINE_PER_CPU(int, cpu_state) = { 0 };
70 * Store all idle threads, this can be reused instead of creating
71 * a new thread. Also avoids complicated thread destroy functionality
74 #ifdef CONFIG_HOTPLUG_CPU
76 * Needed only for CONFIG_HOTPLUG_CPU because __cpuinitdata is
77 * removed after init for !CONFIG_HOTPLUG_CPU.
79 static DEFINE_PER_CPU(struct task_struct *, idle_thread_array);
80 #define get_idle_for_cpu(x) (per_cpu(idle_thread_array, x))
81 #define set_idle_for_cpu(x,p) (per_cpu(idle_thread_array, x) = (p))
83 struct task_struct *idle_thread_array[NR_CPUS] __cpuinitdata ;
84 #define get_idle_for_cpu(x) (idle_thread_array[(x)])
85 #define set_idle_for_cpu(x,p) (idle_thread_array[(x)] = (p))
88 static inline void wait_for_init_deassert(atomic_t *deassert)
90 while (!atomic_read(deassert))
95 static atomic_t init_deasserted __cpuinitdata;
98 * Report back to the Boot Processor.
101 void __cpuinit smp_callin(void)
104 unsigned long timeout;
107 * If waken up by an INIT in an 82489DX configuration
108 * we may get here before an INIT-deassert IPI reaches
109 * our local APIC. We have to wait for the IPI or we'll
110 * lock up on an APIC access.
112 wait_for_init_deassert(&init_deasserted);
115 * (This works even if the APIC is not enabled.)
117 phys_id = GET_APIC_ID(apic_read(APIC_ID));
118 cpuid = smp_processor_id();
119 if (cpu_isset(cpuid, cpu_callin_map)) {
120 panic("smp_callin: phys CPU#%d, CPU#%d already present??\n",
123 Dprintk("CPU#%d (phys ID: %d) waiting for CALLOUT\n", cpuid, phys_id);
126 * STARTUP IPIs are fragile beasts as they might sometimes
127 * trigger some glue motherboard logic. Complete APIC bus
128 * silence for 1 second, this overestimates the time the
129 * boot CPU is spending to send the up to 2 STARTUP IPIs
130 * by a factor of two. This should be enough.
134 * Waiting 2s total for startup (udelay is not yet working)
136 timeout = jiffies + 2*HZ;
137 while (time_before(jiffies, timeout)) {
139 * Has the boot CPU finished it's STARTUP sequence?
141 if (cpu_isset(cpuid, cpu_callout_map))
146 if (!time_before(jiffies, timeout)) {
147 panic("smp_callin: CPU%d started up but did not get a callout!\n",
152 * the boot CPU has finished the init stage and is spinning
153 * on callin_map until we finish. We are free to set up this
154 * CPU, first the APIC. (this is probably redundant on most
158 Dprintk("CALLIN, before setup_local_APIC().\n");
160 end_local_APIC_setup();
165 * Need to enable IRQs because it can take longer and then
166 * the NMI watchdog might kill us.
171 Dprintk("Stack at about %p\n",&cpuid);
174 * Save our processor parameters
176 smp_store_cpu_info(cpuid);
179 * Allow the master to continue.
181 cpu_set(cpuid, cpu_callin_map);
185 * Setup code on secondary processor (after comming out of the trampoline)
187 void __cpuinit start_secondary(void)
190 * Dont put anything before smp_callin(), SMP
191 * booting is too fragile that we want to limit the
192 * things done here to the most necessary things.
198 /* otherwise gcc will move up the smp_processor_id before the cpu_init */
202 * Check TSC sync first:
204 check_tsc_sync_target();
206 if (nmi_watchdog == NMI_IO_APIC) {
207 disable_8259A_irq(0);
208 enable_NMI_through_LVT0();
213 * The sibling maps must be set before turing the online map on for
216 set_cpu_sibling_map(smp_processor_id());
219 * We need to hold call_lock, so there is no inconsistency
220 * between the time smp_call_function() determines number of
221 * IPI recipients, and the time when the determination is made
222 * for which cpus receive the IPI in genapic_flat.c. Holding this
223 * lock helps us to not include this cpu in a currently in progress
224 * smp_call_function().
226 lock_ipi_call_lock();
227 spin_lock(&vector_lock);
229 /* Setup the per cpu irq handling data structures */
230 __setup_vector_irq(smp_processor_id());
232 * Allow the master to continue.
234 spin_unlock(&vector_lock);
235 cpu_set(smp_processor_id(), cpu_online_map);
236 unlock_ipi_call_lock();
238 per_cpu(cpu_state, smp_processor_id()) = CPU_ONLINE;
240 setup_secondary_clock();
245 extern volatile unsigned long init_rsp;
246 extern void (*initial_code)(void);
249 static void inquire_remote_apic(int apicid)
251 unsigned i, regs[] = { APIC_ID >> 4, APIC_LVR >> 4, APIC_SPIV >> 4 };
252 char *names[] = { "ID", "VERSION", "SPIV" };
256 printk(KERN_INFO "Inquiring remote APIC #%d...\n", apicid);
258 for (i = 0; i < ARRAY_SIZE(regs); i++) {
259 printk(KERN_INFO "... APIC #%d %s: ", apicid, names[i]);
264 status = safe_apic_wait_icr_idle();
267 "a previous APIC delivery may have failed\n");
269 apic_write_around(APIC_ICR2, SET_APIC_DEST_FIELD(apicid));
270 apic_write_around(APIC_ICR, APIC_DM_REMRD | regs[i]);
275 status = apic_read(APIC_ICR) & APIC_ICR_RR_MASK;
276 } while (status == APIC_ICR_RR_INPROG && timeout++ < 1000);
279 case APIC_ICR_RR_VALID:
280 status = apic_read(APIC_RRR);
281 printk(KERN_CONT "%08x\n", status);
284 printk(KERN_CONT "failed\n");
291 * Kick the secondary to wake up.
293 static int __cpuinit wakeup_secondary_via_INIT(int phys_apicid, unsigned int start_rip)
295 unsigned long send_status, accept_status = 0;
296 int maxlvt, num_starts, j;
298 Dprintk("Asserting INIT.\n");
301 * Turn INIT on target chip
303 apic_write_around(APIC_ICR2, SET_APIC_DEST_FIELD(phys_apicid));
308 apic_write_around(APIC_ICR, APIC_INT_LEVELTRIG | APIC_INT_ASSERT
311 Dprintk("Waiting for send to finish...\n");
312 send_status = safe_apic_wait_icr_idle();
316 Dprintk("Deasserting INIT.\n");
319 apic_write_around(APIC_ICR2, SET_APIC_DEST_FIELD(phys_apicid));
322 apic_write_around(APIC_ICR, APIC_INT_LEVELTRIG | APIC_DM_INIT);
324 Dprintk("Waiting for send to finish...\n");
325 send_status = safe_apic_wait_icr_idle();
328 atomic_set(&init_deasserted, 1);
333 * Paravirt / VMI wants a startup IPI hook here to set up the
334 * target processor state.
336 startup_ipi_hook(phys_apicid, (unsigned long) start_secondary,
337 (unsigned long) init_rsp);
341 * Run STARTUP IPI loop.
343 Dprintk("#startup loops: %d.\n", num_starts);
345 maxlvt = lapic_get_maxlvt();
347 for (j = 1; j <= num_starts; j++) {
348 Dprintk("Sending STARTUP #%d.\n",j);
349 apic_read_around(APIC_SPIV);
350 apic_write(APIC_ESR, 0);
352 Dprintk("After apic_write.\n");
359 apic_write_around(APIC_ICR2, SET_APIC_DEST_FIELD(phys_apicid));
361 /* Boot on the stack */
362 /* Kick the second */
363 apic_write_around(APIC_ICR, APIC_DM_STARTUP | (start_rip>>12));
366 * Give the other CPU some time to accept the IPI.
370 Dprintk("Startup point 1.\n");
372 Dprintk("Waiting for send to finish...\n");
373 send_status = safe_apic_wait_icr_idle();
376 * Give the other CPU some time to accept the IPI.
380 * Due to the Pentium erratum 3AP.
383 apic_read_around(APIC_SPIV);
384 apic_write(APIC_ESR, 0);
386 accept_status = (apic_read(APIC_ESR) & 0xEF);
387 if (send_status || accept_status)
390 Dprintk("After Startup.\n");
393 printk(KERN_ERR "APIC never delivered???\n");
395 printk(KERN_ERR "APIC delivery error (%lx).\n", accept_status);
397 return (send_status | accept_status);
401 struct work_struct work;
402 struct task_struct *idle;
403 struct completion done;
407 static void __cpuinit do_fork_idle(struct work_struct *work)
409 struct create_idle *c_idle =
410 container_of(work, struct create_idle, work);
412 c_idle->idle = fork_idle(c_idle->cpu);
413 complete(&c_idle->done);
419 static int __cpuinit do_boot_cpu(int cpu, int apicid)
421 unsigned long boot_error;
423 unsigned long start_rip;
424 struct create_idle c_idle = {
426 .done = COMPLETION_INITIALIZER_ONSTACK(c_idle.done),
428 INIT_WORK(&c_idle.work, do_fork_idle);
430 /* allocate memory for gdts of secondary cpus. Hotplug is considered */
431 if (!cpu_gdt_descr[cpu].address &&
432 !(cpu_gdt_descr[cpu].address = get_zeroed_page(GFP_KERNEL))) {
433 printk(KERN_ERR "Failed to allocate GDT for CPU %d\n", cpu);
437 /* Allocate node local memory for AP pdas */
438 if (cpu_pda(cpu) == &boot_cpu_pda[cpu]) {
439 struct x8664_pda *newpda, *pda;
440 int node = cpu_to_node(cpu);
442 newpda = kmalloc_node(sizeof (struct x8664_pda), GFP_ATOMIC,
445 memcpy(newpda, pda, sizeof (struct x8664_pda));
446 cpu_pda(cpu) = newpda;
449 "Could not allocate node local PDA for CPU %d on node %d\n",
453 alternatives_smp_switch(1);
455 c_idle.idle = get_idle_for_cpu(cpu);
458 c_idle.idle->thread.sp = (unsigned long) (((struct pt_regs *)
459 (THREAD_SIZE + task_stack_page(c_idle.idle))) - 1);
460 init_idle(c_idle.idle, cpu);
465 * During cold boot process, keventd thread is not spun up yet.
466 * When we do cpu hot-add, we create idle threads on the fly, we should
467 * not acquire any attributes from the calling context. Hence the clean
468 * way to create kernel_threads() is to do that from keventd().
469 * We do the current_is_keventd() due to the fact that ACPI notifier
470 * was also queuing to keventd() and when the caller is already running
471 * in context of keventd(), we would end up with locking up the keventd
474 if (!keventd_up() || current_is_keventd())
475 c_idle.work.func(&c_idle.work);
477 schedule_work(&c_idle.work);
478 wait_for_completion(&c_idle.done);
481 if (IS_ERR(c_idle.idle)) {
482 printk("failed fork for CPU %d\n", cpu);
483 return PTR_ERR(c_idle.idle);
486 set_idle_for_cpu(cpu, c_idle.idle);
490 cpu_pda(cpu)->pcurrent = c_idle.idle;
492 start_rip = setup_trampoline();
494 init_rsp = c_idle.idle->thread.sp;
495 load_sp0(&per_cpu(init_tss, cpu), &c_idle.idle->thread);
496 initial_code = start_secondary;
497 clear_tsk_thread_flag(c_idle.idle, TIF_FORK);
499 printk(KERN_INFO "Booting processor %d/%d APIC 0x%x\n", cpu,
500 cpus_weight(cpu_present_map),
504 * This grunge runs the startup process for
505 * the targeted processor.
508 atomic_set(&init_deasserted, 0);
510 Dprintk("Setting warm reset code and vector.\n");
512 CMOS_WRITE(0xa, 0xf);
515 *((volatile unsigned short *) phys_to_virt(0x469)) = start_rip >> 4;
517 *((volatile unsigned short *) phys_to_virt(0x467)) = start_rip & 0xf;
521 * Be paranoid about clearing APIC errors.
523 apic_write(APIC_ESR, 0);
527 * Status is now clean
532 * Starting actual IPI sequence...
534 boot_error = wakeup_secondary_via_INIT(apicid, start_rip);
538 * allow APs to start initializing.
540 Dprintk("Before Callout %d.\n", cpu);
541 cpu_set(cpu, cpu_callout_map);
542 Dprintk("After Callout %d.\n", cpu);
545 * Wait 5s total for a response
547 for (timeout = 0; timeout < 50000; timeout++) {
548 if (cpu_isset(cpu, cpu_callin_map))
549 break; /* It has booted */
553 if (cpu_isset(cpu, cpu_callin_map)) {
554 /* number CPUs logically, starting from 1 (BSP is 0) */
555 Dprintk("CPU has booted.\n");
556 printk(KERN_INFO "CPU%d: ", cpu);
557 print_cpu_info(&cpu_data(cpu));
560 if (*((volatile unsigned char *)phys_to_virt(SMP_TRAMPOLINE_BASE))
562 /* trampoline started but...? */
563 printk("Stuck ??\n");
565 /* trampoline code not run */
566 printk("Not responding.\n");
568 inquire_remote_apic(apicid);
573 cpu_clear(cpu, cpu_callout_map); /* was set here (do_boot_cpu()) */
574 clear_bit(cpu, (unsigned long *)&cpu_initialized); /* was set by cpu_init() */
575 clear_node_cpumask(cpu); /* was set by numa_add_cpu */
576 cpu_clear(cpu, cpu_present_map);
577 cpu_clear(cpu, cpu_possible_map);
578 per_cpu(x86_cpu_to_apicid, cpu) = BAD_APICID;
585 cycles_t cacheflush_time;
586 unsigned long cache_decay_ticks;
589 * Cleanup possible dangling ends...
591 static __cpuinit void smp_cleanup_boot(void)
594 * Paranoid: Set warm reset code and vector here back
600 * Reset trampoline flag
602 *((volatile int *) phys_to_virt(0x467)) = 0;
606 * Fall back to non SMP mode after errors.
608 * RED-PEN audit/test this more. I bet there is more state messed up here.
610 static __init void disable_smp(void)
612 cpu_present_map = cpumask_of_cpu(0);
613 cpu_possible_map = cpumask_of_cpu(0);
614 if (smp_found_config)
615 phys_cpu_present_map = physid_mask_of_physid(boot_cpu_id);
617 phys_cpu_present_map = physid_mask_of_physid(0);
618 cpu_set(0, per_cpu(cpu_sibling_map, 0));
619 cpu_set(0, per_cpu(cpu_core_map, 0));
623 * Various sanity checks.
625 static int __init smp_sanity_check(unsigned max_cpus)
627 if (!physid_isset(hard_smp_processor_id(), phys_cpu_present_map)) {
628 printk("weird, boot CPU (#%d) not listed by the BIOS.\n",
629 hard_smp_processor_id());
630 physid_set(hard_smp_processor_id(), phys_cpu_present_map);
634 * If we couldn't find an SMP configuration at boot time,
635 * get out of here now!
637 if (!smp_found_config) {
638 printk(KERN_NOTICE "SMP motherboard not detected.\n");
640 if (APIC_init_uniprocessor())
641 printk(KERN_NOTICE "Local APIC not detected."
642 " Using dummy APIC emulation.\n");
647 * Should not be necessary because the MP table should list the boot
648 * CPU too, but we do it for the sake of robustness anyway.
650 if (!physid_isset(boot_cpu_id, phys_cpu_present_map)) {
651 printk(KERN_NOTICE "weird, boot CPU (#%d) not listed by the BIOS.\n",
653 physid_set(hard_smp_processor_id(), phys_cpu_present_map);
657 * If we couldn't find a local APIC, then get out of here now!
660 printk(KERN_ERR "BIOS bug, local APIC #%d not detected!...\n",
662 printk(KERN_ERR "... forcing use of dummy APIC emulation. (tell your hw vendor)\n");
668 * If SMP should be disabled, then really disable it!
671 printk(KERN_INFO "SMP mode deactivated, forcing use of dummy APIC emulation.\n");
679 static void __init smp_cpu_index_default(void)
682 struct cpuinfo_x86 *c;
684 for_each_cpu_mask(i, cpu_possible_map) {
686 /* mark all to hotplug */
687 c->cpu_index = NR_CPUS;
692 * Prepare for SMP bootup. The MP table or ACPI has been read
693 * earlier. Just do some sanity checking here and enable APIC mode.
695 void __init native_smp_prepare_cpus(unsigned int max_cpus)
697 nmi_watchdog_default();
698 smp_cpu_index_default();
699 current_cpu_data = boot_cpu_data;
700 current_thread_info()->cpu = 0; /* needed? */
701 set_cpu_sibling_map(0);
703 if (smp_sanity_check(max_cpus) < 0) {
704 printk(KERN_INFO "SMP disabled\n");
711 * Switch from PIC to APIC mode.
716 * Enable IO APIC before setting up error vector
718 if (!skip_ioapic_setup && nr_ioapics)
720 end_local_APIC_setup();
722 if (GET_APIC_ID(apic_read(APIC_ID)) != boot_cpu_id) {
723 panic("Boot APIC ID in local APIC unexpected (%d vs %d)",
724 GET_APIC_ID(apic_read(APIC_ID)), boot_cpu_id);
725 /* Or can we switch back to PIC here? */
729 * Now start the IO-APICs
731 if (!skip_ioapic_setup && nr_ioapics)
737 * Set up local APIC timer on boot CPU.
741 printk(KERN_INFO "CPU%d: ", 0);
742 print_cpu_info(&cpu_data(0));
746 * Early setup to make printk work.
748 void __init native_smp_prepare_boot_cpu(void)
750 int me = smp_processor_id();
751 /* already set me in cpu_online_map in boot_cpu_init() */
752 cpu_set(me, cpu_callout_map);
753 per_cpu(cpu_state, me) = CPU_ONLINE;
757 * Entry point to boot a CPU.
759 int __cpuinit native_cpu_up(unsigned int cpu)
761 int apicid = cpu_present_to_apicid(cpu);
765 WARN_ON(irqs_disabled());
767 Dprintk("++++++++++++++++++++=_---CPU UP %u\n", cpu);
769 if (apicid == BAD_APICID || apicid == boot_cpu_id ||
770 !physid_isset(apicid, phys_cpu_present_map)) {
771 printk("__cpu_up: bad cpu %d\n", cpu);
776 * Already booted CPU?
778 if (cpu_isset(cpu, cpu_callin_map)) {
779 Dprintk("do_boot_cpu %d Already started\n", cpu);
784 * Save current MTRR state in case it was changed since early boot
785 * (e.g. by the ACPI SMI) to initialize new CPUs with MTRRs in sync:
789 per_cpu(cpu_state, cpu) = CPU_UP_PREPARE;
791 err = do_boot_cpu(cpu, apicid);
793 Dprintk("do_boot_cpu failed %d\n", err);
797 /* Unleash the CPU! */
798 Dprintk("waiting for cpu %d\n", cpu);
801 * Make sure and check TSC sync:
803 local_irq_save(flags);
804 check_tsc_sync_source(cpu);
805 local_irq_restore(flags);
807 while (!cpu_isset(cpu, cpu_online_map))
815 * Finish the SMP boot.
817 void __init native_smp_cpus_done(unsigned int max_cpus)
821 check_nmi_watchdog();