2 * x86 SMP booting functions
4 * (c) 1995 Alan Cox, Building #3 <alan@redhat.com>
5 * (c) 1998, 1999, 2000 Ingo Molnar <mingo@redhat.com>
6 * Copyright 2001 Andi Kleen, SuSE Labs.
8 * Much of the core SMP work is based on previous work by Thomas Radke, to
9 * whom a great many thanks are extended.
11 * Thanks to Intel for making available several different Pentium,
12 * Pentium Pro and Pentium-II/Xeon MP machines.
13 * Original development of Linux SMP code supported by Caldera.
15 * This code is released under the GNU General Public License version 2
18 * Felix Koop : NR_CPUS used properly
19 * Jose Renau : Handle single CPU case.
20 * Alan Cox : By repeated request 8) - Total BogoMIP report.
21 * Greg Wright : Fix for kernel stacks panic.
22 * Erich Boleyn : MP v1.4 and additional changes.
23 * Matthias Sattler : Changes for 2.1 kernel map.
24 * Michel Lespinasse : Changes for 2.1 kernel map.
25 * Michael Chastain : Change trampoline.S to gnu as.
26 * Alan Cox : Dumb bug: 'B' step PPro's are fine
27 * Ingo Molnar : Added APIC timers, based on code
29 * Ingo Molnar : various cleanups and rewrites
30 * Tigran Aivazian : fixed "0.00 in /proc/uptime on SMP" bug.
31 * Maciej W. Rozycki : Bits for genuine 82489DX APICs
32 * Andi Kleen : Changed for SMP boot into long mode.
33 * Rusty Russell : Hacked into shape for new "hotplug" boot process.
34 * Andi Kleen : Converted to new state machine.
36 * Probably mostly hotplug CPU ready now.
37 * Ashok Raj : CPU hotplug support
41 #include <linux/init.h>
44 #include <linux/kernel_stat.h>
45 #include <linux/bootmem.h>
46 #include <linux/thread_info.h>
47 #include <linux/module.h>
48 #include <linux/delay.h>
49 #include <linux/mc146818rtc.h>
50 #include <linux/smp.h>
51 #include <linux/kdebug.h>
54 #include <asm/pgalloc.h>
56 #include <asm/tlbflush.h>
57 #include <asm/proto.h>
60 #include <asm/hw_irq.h>
63 #include <mach_wakecpu.h>
64 #include <smpboot_hooks.h>
66 /* Set when the idlers are all forked */
67 int smp_threads_ready;
69 /* State of each CPU */
70 DEFINE_PER_CPU(int, cpu_state) = { 0 };
73 * Store all idle threads, this can be reused instead of creating
74 * a new thread. Also avoids complicated thread destroy functionality
77 #ifdef CONFIG_HOTPLUG_CPU
79 * Needed only for CONFIG_HOTPLUG_CPU because __cpuinitdata is
80 * removed after init for !CONFIG_HOTPLUG_CPU.
82 static DEFINE_PER_CPU(struct task_struct *, idle_thread_array);
83 #define get_idle_for_cpu(x) (per_cpu(idle_thread_array, x))
84 #define set_idle_for_cpu(x,p) (per_cpu(idle_thread_array, x) = (p))
86 struct task_struct *idle_thread_array[NR_CPUS] __cpuinitdata ;
87 #define get_idle_for_cpu(x) (idle_thread_array[(x)])
88 #define set_idle_for_cpu(x,p) (idle_thread_array[(x)] = (p))
91 static atomic_t init_deasserted __cpuinitdata;
93 #define smp_callin_clear_local_apic() do {} while (0)
94 #define map_cpu_to_logical_apicid() do {} while (0)
97 * Report back to the Boot Processor.
100 void __cpuinit smp_callin(void)
103 unsigned long timeout;
106 * If waken up by an INIT in an 82489DX configuration
107 * we may get here before an INIT-deassert IPI reaches
108 * our local APIC. We have to wait for the IPI or we'll
109 * lock up on an APIC access.
111 wait_for_init_deassert(&init_deasserted);
114 * (This works even if the APIC is not enabled.)
116 phys_id = GET_APIC_ID(apic_read(APIC_ID));
117 cpuid = smp_processor_id();
118 if (cpu_isset(cpuid, cpu_callin_map)) {
119 panic("smp_callin: phys CPU#%d, CPU#%d already present??\n",
122 Dprintk("CPU#%d (phys ID: %d) waiting for CALLOUT\n", cpuid, phys_id);
125 * STARTUP IPIs are fragile beasts as they might sometimes
126 * trigger some glue motherboard logic. Complete APIC bus
127 * silence for 1 second, this overestimates the time the
128 * boot CPU is spending to send the up to 2 STARTUP IPIs
129 * by a factor of two. This should be enough.
133 * Waiting 2s total for startup (udelay is not yet working)
135 timeout = jiffies + 2*HZ;
136 while (time_before(jiffies, timeout)) {
138 * Has the boot CPU finished it's STARTUP sequence?
140 if (cpu_isset(cpuid, cpu_callout_map))
145 if (!time_before(jiffies, timeout)) {
146 panic("smp_callin: CPU%d started up but did not get a callout!\n",
151 * the boot CPU has finished the init stage and is spinning
152 * on callin_map until we finish. We are free to set up this
153 * CPU, first the APIC. (this is probably redundant on most
157 Dprintk("CALLIN, before setup_local_APIC().\n");
158 smp_callin_clear_local_apic();
160 end_local_APIC_setup();
161 map_cpu_to_logical_apicid();
166 * Need to enable IRQs because it can take longer and then
167 * the NMI watchdog might kill us.
172 Dprintk("Stack at about %p\n",&cpuid);
175 * Save our processor parameters
177 smp_store_cpu_info(cpuid);
180 * Allow the master to continue.
182 cpu_set(cpuid, cpu_callin_map);
186 * Setup code on secondary processor (after comming out of the trampoline)
188 void __cpuinit start_secondary(void)
191 * Dont put anything before smp_callin(), SMP
192 * booting is too fragile that we want to limit the
193 * things done here to the most necessary things.
199 /* otherwise gcc will move up the smp_processor_id before the cpu_init */
203 * Check TSC sync first:
205 check_tsc_sync_target();
207 if (nmi_watchdog == NMI_IO_APIC) {
208 disable_8259A_irq(0);
209 enable_NMI_through_LVT0();
214 * The sibling maps must be set before turing the online map on for
217 set_cpu_sibling_map(smp_processor_id());
220 * We need to hold call_lock, so there is no inconsistency
221 * between the time smp_call_function() determines number of
222 * IPI recipients, and the time when the determination is made
223 * for which cpus receive the IPI in genapic_flat.c. Holding this
224 * lock helps us to not include this cpu in a currently in progress
225 * smp_call_function().
227 lock_ipi_call_lock();
228 spin_lock(&vector_lock);
230 /* Setup the per cpu irq handling data structures */
231 __setup_vector_irq(smp_processor_id());
233 * Allow the master to continue.
235 spin_unlock(&vector_lock);
236 cpu_set(smp_processor_id(), cpu_online_map);
237 unlock_ipi_call_lock();
239 per_cpu(cpu_state, smp_processor_id()) = CPU_ONLINE;
241 setup_secondary_clock();
247 extern volatile unsigned long init_rsp;
248 extern void (*initial_code)(void);
251 static void __inquire_remote_apic(int apicid)
253 unsigned i, regs[] = { APIC_ID >> 4, APIC_LVR >> 4, APIC_SPIV >> 4 };
254 char *names[] = { "ID", "VERSION", "SPIV" };
258 printk(KERN_INFO "Inquiring remote APIC #%d...\n", apicid);
260 for (i = 0; i < ARRAY_SIZE(regs); i++) {
261 printk(KERN_INFO "... APIC #%d %s: ", apicid, names[i]);
266 status = safe_apic_wait_icr_idle();
269 "a previous APIC delivery may have failed\n");
271 apic_write_around(APIC_ICR2, SET_APIC_DEST_FIELD(apicid));
272 apic_write_around(APIC_ICR, APIC_DM_REMRD | regs[i]);
277 status = apic_read(APIC_ICR) & APIC_ICR_RR_MASK;
278 } while (status == APIC_ICR_RR_INPROG && timeout++ < 1000);
281 case APIC_ICR_RR_VALID:
282 status = apic_read(APIC_RRR);
283 printk(KERN_CONT "%08x\n", status);
286 printk(KERN_CONT "failed\n");
293 * Kick the secondary to wake up.
295 static int __cpuinit wakeup_secondary_via_INIT(int phys_apicid, unsigned int start_rip)
297 unsigned long send_status, accept_status = 0;
298 int maxlvt, num_starts, j;
301 * Be paranoid about clearing APIC errors.
303 if (APIC_INTEGRATED(apic_version[phys_apicid])) {
304 apic_read_around(APIC_SPIV);
305 apic_write(APIC_ESR, 0);
309 Dprintk("Asserting INIT.\n");
312 * Turn INIT on target chip
314 apic_write_around(APIC_ICR2, SET_APIC_DEST_FIELD(phys_apicid));
319 apic_write_around(APIC_ICR, APIC_INT_LEVELTRIG | APIC_INT_ASSERT
322 Dprintk("Waiting for send to finish...\n");
323 send_status = safe_apic_wait_icr_idle();
327 Dprintk("Deasserting INIT.\n");
330 apic_write_around(APIC_ICR2, SET_APIC_DEST_FIELD(phys_apicid));
333 apic_write_around(APIC_ICR, APIC_INT_LEVELTRIG | APIC_DM_INIT);
335 Dprintk("Waiting for send to finish...\n");
336 send_status = safe_apic_wait_icr_idle();
339 atomic_set(&init_deasserted, 1);
341 if (APIC_INTEGRATED(apic_version[phys_apicid]))
347 * Paravirt / VMI wants a startup IPI hook here to set up the
348 * target processor state.
350 startup_ipi_hook(phys_apicid, (unsigned long) start_secondary,
351 (unsigned long) init_rsp);
355 * Run STARTUP IPI loop.
357 Dprintk("#startup loops: %d.\n", num_starts);
359 maxlvt = lapic_get_maxlvt();
361 for (j = 1; j <= num_starts; j++) {
362 Dprintk("Sending STARTUP #%d.\n",j);
363 apic_read_around(APIC_SPIV);
364 apic_write(APIC_ESR, 0);
366 Dprintk("After apic_write.\n");
373 apic_write_around(APIC_ICR2, SET_APIC_DEST_FIELD(phys_apicid));
375 /* Boot on the stack */
376 /* Kick the second */
377 apic_write_around(APIC_ICR, APIC_DM_STARTUP | (start_rip>>12));
380 * Give the other CPU some time to accept the IPI.
384 Dprintk("Startup point 1.\n");
386 Dprintk("Waiting for send to finish...\n");
387 send_status = safe_apic_wait_icr_idle();
390 * Give the other CPU some time to accept the IPI.
394 * Due to the Pentium erratum 3AP.
397 apic_read_around(APIC_SPIV);
398 apic_write(APIC_ESR, 0);
400 accept_status = (apic_read(APIC_ESR) & 0xEF);
401 if (send_status || accept_status)
404 Dprintk("After Startup.\n");
407 printk(KERN_ERR "APIC never delivered???\n");
409 printk(KERN_ERR "APIC delivery error (%lx).\n", accept_status);
411 return (send_status | accept_status);
415 struct work_struct work;
416 struct task_struct *idle;
417 struct completion done;
421 static void __cpuinit do_fork_idle(struct work_struct *work)
423 struct create_idle *c_idle =
424 container_of(work, struct create_idle, work);
426 c_idle->idle = fork_idle(c_idle->cpu);
427 complete(&c_idle->done);
433 static int __cpuinit do_boot_cpu(int cpu, int apicid)
435 unsigned long boot_error = 0;
437 unsigned long start_rip;
438 struct create_idle c_idle = {
440 .done = COMPLETION_INITIALIZER_ONSTACK(c_idle.done),
442 INIT_WORK(&c_idle.work, do_fork_idle);
444 /* allocate memory for gdts of secondary cpus. Hotplug is considered */
445 if (!cpu_gdt_descr[cpu].address &&
446 !(cpu_gdt_descr[cpu].address = get_zeroed_page(GFP_KERNEL))) {
447 printk(KERN_ERR "Failed to allocate GDT for CPU %d\n", cpu);
451 /* Allocate node local memory for AP pdas */
452 if (cpu_pda(cpu) == &boot_cpu_pda[cpu]) {
453 struct x8664_pda *newpda, *pda;
454 int node = cpu_to_node(cpu);
456 newpda = kmalloc_node(sizeof (struct x8664_pda), GFP_ATOMIC,
459 memcpy(newpda, pda, sizeof (struct x8664_pda));
460 cpu_pda(cpu) = newpda;
463 "Could not allocate node local PDA for CPU %d on node %d\n",
467 alternatives_smp_switch(1);
469 c_idle.idle = get_idle_for_cpu(cpu);
472 c_idle.idle->thread.sp = (unsigned long) (((struct pt_regs *)
473 (THREAD_SIZE + task_stack_page(c_idle.idle))) - 1);
474 init_idle(c_idle.idle, cpu);
479 * During cold boot process, keventd thread is not spun up yet.
480 * When we do cpu hot-add, we create idle threads on the fly, we should
481 * not acquire any attributes from the calling context. Hence the clean
482 * way to create kernel_threads() is to do that from keventd().
483 * We do the current_is_keventd() due to the fact that ACPI notifier
484 * was also queuing to keventd() and when the caller is already running
485 * in context of keventd(), we would end up with locking up the keventd
488 if (!keventd_up() || current_is_keventd())
489 c_idle.work.func(&c_idle.work);
491 schedule_work(&c_idle.work);
492 wait_for_completion(&c_idle.done);
495 if (IS_ERR(c_idle.idle)) {
496 printk("failed fork for CPU %d\n", cpu);
497 return PTR_ERR(c_idle.idle);
500 set_idle_for_cpu(cpu, c_idle.idle);
504 cpu_pda(cpu)->pcurrent = c_idle.idle;
506 start_rip = setup_trampoline();
508 init_rsp = c_idle.idle->thread.sp;
509 load_sp0(&per_cpu(init_tss, cpu), &c_idle.idle->thread);
510 initial_code = start_secondary;
511 clear_tsk_thread_flag(c_idle.idle, TIF_FORK);
513 printk(KERN_INFO "Booting processor %d/%d APIC 0x%x\n", cpu,
514 cpus_weight(cpu_present_map),
518 * This grunge runs the startup process for
519 * the targeted processor.
522 atomic_set(&init_deasserted, 0);
524 Dprintk("Setting warm reset code and vector.\n");
526 smpboot_setup_warm_reset_vector(start_rip);
528 * Be paranoid about clearing APIC errors.
530 apic_write(APIC_ESR, 0);
534 * Starting actual IPI sequence...
536 boot_error = wakeup_secondary_via_INIT(apicid, start_rip);
540 * allow APs to start initializing.
542 Dprintk("Before Callout %d.\n", cpu);
543 cpu_set(cpu, cpu_callout_map);
544 Dprintk("After Callout %d.\n", cpu);
547 * Wait 5s total for a response
549 for (timeout = 0; timeout < 50000; timeout++) {
550 if (cpu_isset(cpu, cpu_callin_map))
551 break; /* It has booted */
555 if (cpu_isset(cpu, cpu_callin_map)) {
556 /* number CPUs logically, starting from 1 (BSP is 0) */
557 Dprintk("CPU has booted.\n");
558 printk(KERN_INFO "CPU%d: ", cpu);
559 print_cpu_info(&cpu_data(cpu));
562 if (*((volatile unsigned char *)trampoline_base)
564 /* trampoline started but...? */
565 printk("Stuck ??\n");
567 /* trampoline code not run */
568 printk("Not responding.\n");
570 inquire_remote_apic(apicid);
575 cpu_clear(cpu, cpu_callout_map); /* was set here (do_boot_cpu()) */
576 clear_bit(cpu, (unsigned long *)&cpu_initialized); /* was set by cpu_init() */
577 clear_node_cpumask(cpu); /* was set by numa_add_cpu */
578 cpu_clear(cpu, cpu_present_map);
579 cpu_clear(cpu, cpu_possible_map);
580 per_cpu(x86_cpu_to_apicid, cpu) = BAD_APICID;
583 /* mark "stuck" area as not stuck */
584 *((volatile unsigned long *)trampoline_base) = 0;
589 cycles_t cacheflush_time;
590 unsigned long cache_decay_ticks;
593 * Fall back to non SMP mode after errors.
595 * RED-PEN audit/test this more. I bet there is more state messed up here.
597 static __init void disable_smp(void)
599 cpu_present_map = cpumask_of_cpu(0);
600 cpu_possible_map = cpumask_of_cpu(0);
601 if (smp_found_config)
602 phys_cpu_present_map = physid_mask_of_physid(boot_cpu_id);
604 phys_cpu_present_map = physid_mask_of_physid(0);
605 cpu_set(0, per_cpu(cpu_sibling_map, 0));
606 cpu_set(0, per_cpu(cpu_core_map, 0));
610 * Various sanity checks.
612 static int __init smp_sanity_check(unsigned max_cpus)
614 if (!physid_isset(hard_smp_processor_id(), phys_cpu_present_map)) {
615 printk("weird, boot CPU (#%d) not listed by the BIOS.\n",
616 hard_smp_processor_id());
617 physid_set(hard_smp_processor_id(), phys_cpu_present_map);
621 * If we couldn't find an SMP configuration at boot time,
622 * get out of here now!
624 if (!smp_found_config) {
625 printk(KERN_NOTICE "SMP motherboard not detected.\n");
627 if (APIC_init_uniprocessor())
628 printk(KERN_NOTICE "Local APIC not detected."
629 " Using dummy APIC emulation.\n");
634 * Should not be necessary because the MP table should list the boot
635 * CPU too, but we do it for the sake of robustness anyway.
637 if (!physid_isset(boot_cpu_id, phys_cpu_present_map)) {
638 printk(KERN_NOTICE "weird, boot CPU (#%d) not listed by the BIOS.\n",
640 physid_set(hard_smp_processor_id(), phys_cpu_present_map);
644 * If we couldn't find a local APIC, then get out of here now!
647 printk(KERN_ERR "BIOS bug, local APIC #%d not detected!...\n",
649 printk(KERN_ERR "... forcing use of dummy APIC emulation. (tell your hw vendor)\n");
655 * If SMP should be disabled, then really disable it!
658 printk(KERN_INFO "SMP mode deactivated, forcing use of dummy APIC emulation.\n");
666 static void __init smp_cpu_index_default(void)
669 struct cpuinfo_x86 *c;
671 for_each_cpu_mask(i, cpu_possible_map) {
673 /* mark all to hotplug */
674 c->cpu_index = NR_CPUS;
679 * Prepare for SMP bootup. The MP table or ACPI has been read
680 * earlier. Just do some sanity checking here and enable APIC mode.
682 void __init native_smp_prepare_cpus(unsigned int max_cpus)
684 nmi_watchdog_default();
685 smp_cpu_index_default();
686 current_cpu_data = boot_cpu_data;
687 current_thread_info()->cpu = 0; /* needed? */
688 set_cpu_sibling_map(0);
690 if (smp_sanity_check(max_cpus) < 0) {
691 printk(KERN_INFO "SMP disabled\n");
698 * Switch from PIC to APIC mode.
703 * Enable IO APIC before setting up error vector
705 if (!skip_ioapic_setup && nr_ioapics)
707 end_local_APIC_setup();
709 if (GET_APIC_ID(apic_read(APIC_ID)) != boot_cpu_id) {
710 panic("Boot APIC ID in local APIC unexpected (%d vs %d)",
711 GET_APIC_ID(apic_read(APIC_ID)), boot_cpu_id);
712 /* Or can we switch back to PIC here? */
716 * Now start the IO-APICs
718 if (!skip_ioapic_setup && nr_ioapics)
724 * Set up local APIC timer on boot CPU.
728 printk(KERN_INFO "CPU%d: ", 0);
729 print_cpu_info(&cpu_data(0));
733 * Early setup to make printk work.
735 void __init native_smp_prepare_boot_cpu(void)
737 int me = smp_processor_id();
738 /* already set me in cpu_online_map in boot_cpu_init() */
739 cpu_set(me, cpu_callout_map);
740 per_cpu(cpu_state, me) = CPU_ONLINE;
744 * Entry point to boot a CPU.
746 int __cpuinit native_cpu_up(unsigned int cpu)
748 int apicid = cpu_present_to_apicid(cpu);
752 WARN_ON(irqs_disabled());
754 Dprintk("++++++++++++++++++++=_---CPU UP %u\n", cpu);
756 if (apicid == BAD_APICID || apicid == boot_cpu_id ||
757 !physid_isset(apicid, phys_cpu_present_map)) {
758 printk("__cpu_up: bad cpu %d\n", cpu);
763 * Already booted CPU?
765 if (cpu_isset(cpu, cpu_callin_map)) {
766 Dprintk("do_boot_cpu %d Already started\n", cpu);
771 * Save current MTRR state in case it was changed since early boot
772 * (e.g. by the ACPI SMI) to initialize new CPUs with MTRRs in sync:
776 per_cpu(cpu_state, cpu) = CPU_UP_PREPARE;
778 err = do_boot_cpu(cpu, apicid);
780 Dprintk("do_boot_cpu failed %d\n", err);
784 /* Unleash the CPU! */
785 Dprintk("waiting for cpu %d\n", cpu);
788 * Make sure and check TSC sync:
790 local_irq_save(flags);
791 check_tsc_sync_source(cpu);
792 local_irq_restore(flags);
794 while (!cpu_isset(cpu, cpu_online_map))
801 extern void impress_friends(void);
802 extern void smp_checks(void);
805 * Finish the SMP boot.
807 void __init native_smp_cpus_done(unsigned int max_cpus)
809 smpboot_restore_warm_reset_vector();
811 Dprintk("Boot done.\n");
816 check_nmi_watchdog();