2 * x86 SMP booting functions
4 * (c) 1995 Alan Cox, Building #3 <alan@redhat.com>
5 * (c) 1998, 1999, 2000 Ingo Molnar <mingo@redhat.com>
7 * Much of the core SMP work is based on previous work by Thomas Radke, to
8 * whom a great many thanks are extended.
10 * Thanks to Intel for making available several different Pentium,
11 * Pentium Pro and Pentium-II/Xeon MP machines.
12 * Original development of Linux SMP code supported by Caldera.
14 * This code is released under the GNU General Public License version 2 or
18 * Felix Koop : NR_CPUS used properly
19 * Jose Renau : Handle single CPU case.
20 * Alan Cox : By repeated request 8) - Total BogoMIPS report.
21 * Greg Wright : Fix for kernel stacks panic.
22 * Erich Boleyn : MP v1.4 and additional changes.
23 * Matthias Sattler : Changes for 2.1 kernel map.
24 * Michel Lespinasse : Changes for 2.1 kernel map.
25 * Michael Chastain : Change trampoline.S to gnu as.
26 * Alan Cox : Dumb bug: 'B' step PPro's are fine
27 * Ingo Molnar : Added APIC timers, based on code
29 * Ingo Molnar : various cleanups and rewrites
30 * Tigran Aivazian : fixed "0.00 in /proc/uptime on SMP" bug.
31 * Maciej W. Rozycki : Bits for genuine 82489DX APICs
32 * Martin J. Bligh : Added support for multi-quad systems
33 * Dave Jones : Report invalid combinations of Athlon CPUs.
34 * Rusty Russell : Hacked into shape for new "hotplug" boot process. */
36 #include <linux/module.h>
37 #include <linux/init.h>
38 #include <linux/kernel.h>
41 #include <linux/sched.h>
42 #include <linux/kernel_stat.h>
43 #include <linux/bootmem.h>
44 #include <linux/notifier.h>
45 #include <linux/cpu.h>
46 #include <linux/percpu.h>
47 #include <linux/nmi.h>
49 #include <linux/delay.h>
50 #include <linux/mc146818rtc.h>
51 #include <asm/tlbflush.h>
53 #include <asm/arch_hooks.h>
56 #include <mach_apic.h>
57 #include <mach_wakecpu.h>
58 #include <smpboot_hooks.h>
62 /* which logical CPU number maps to which CPU (physical APIC ID) */
63 u16 x86_cpu_to_apicid_init[NR_CPUS] __initdata =
64 { [0 ... NR_CPUS-1] = BAD_APICID };
65 void *x86_cpu_to_apicid_early_ptr;
66 DEFINE_PER_CPU(u16, x86_cpu_to_apicid) = BAD_APICID;
67 EXPORT_PER_CPU_SYMBOL(x86_cpu_to_apicid);
69 u16 x86_bios_cpu_apicid_init[NR_CPUS] __initdata
70 = { [0 ... NR_CPUS-1] = BAD_APICID };
71 void *x86_bios_cpu_apicid_early_ptr;
72 DEFINE_PER_CPU(u16, x86_bios_cpu_apicid) = BAD_APICID;
73 EXPORT_PER_CPU_SYMBOL(x86_bios_cpu_apicid);
75 u8 apicid_2_node[MAX_APICID];
77 extern void map_cpu_to_logical_apicid(void);
78 extern void unmap_cpu_to_logical_apicid(int cpu);
80 /* State of each CPU. */
81 DEFINE_PER_CPU(int, cpu_state) = { 0 };
83 extern void smp_callin(void);
86 * Activate a secondary processor.
88 void __cpuinit start_secondary(void *unused)
91 * Don't put *anything* before cpu_init(), SMP booting is too
92 * fragile that we want to limit the things done here to the
93 * most necessary things.
102 /* otherwise gcc will move up smp_processor_id before the cpu_init */
105 * Check TSC synchronization with the BP:
107 check_tsc_sync_target();
109 if (nmi_watchdog == NMI_IO_APIC) {
110 disable_8259A_irq(0);
111 enable_NMI_through_LVT0();
115 /* This must be done before setting cpu_online_map */
116 set_cpu_sibling_map(raw_smp_processor_id());
120 * We need to hold call_lock, so there is no inconsistency
121 * between the time smp_call_function() determines number of
122 * IPI recipients, and the time when the determination is made
123 * for which cpus receive the IPI. Holding this
124 * lock helps us to not include this cpu in a currently in progress
125 * smp_call_function().
127 lock_ipi_call_lock();
128 cpu_set(smp_processor_id(), cpu_online_map);
129 unlock_ipi_call_lock();
130 per_cpu(cpu_state, smp_processor_id()) = CPU_ONLINE;
132 setup_secondary_clock();
139 * Everything has been set up for the secondary
140 * CPUs - they just need to reload everything
141 * from the task structure
142 * This function must not return.
144 void __devinit initialize_secondary(void)
147 * We don't actually need to load the full TSS,
148 * basically just the stack pointer and the ip.
155 :"m" (current->thread.sp),"m" (current->thread.ip));
158 #ifdef CONFIG_HOTPLUG_CPU
159 void cpu_exit_clear(void)
161 int cpu = raw_smp_processor_id();
168 cpu_clear(cpu, cpu_callout_map);
169 cpu_clear(cpu, cpu_callin_map);
171 unmap_cpu_to_logical_apicid(cpu);
175 static int boot_cpu_logical_apicid;
176 /* Where the IO area was mapped on multiquad, always 0 otherwise */
178 #ifdef CONFIG_X86_NUMAQ
179 EXPORT_SYMBOL(xquad_portio);
182 static void __init disable_smp(void)
184 cpu_possible_map = cpumask_of_cpu(0);
185 cpu_present_map = cpumask_of_cpu(0);
186 smpboot_clear_io_apic_irqs();
187 phys_cpu_present_map = physid_mask_of_physid(0);
188 map_cpu_to_logical_apicid();
189 cpu_set(0, per_cpu(cpu_sibling_map, 0));
190 cpu_set(0, per_cpu(cpu_core_map, 0));
193 static int __init smp_sanity_check(unsigned max_cpus)
196 * If we couldn't find an SMP configuration at boot time,
197 * get out of here now!
199 if (!smp_found_config && !acpi_lapic) {
200 printk(KERN_NOTICE "SMP motherboard not detected.\n");
202 if (APIC_init_uniprocessor())
203 printk(KERN_NOTICE "Local APIC not detected."
204 " Using dummy APIC emulation.\n");
209 * Should not be necessary because the MP table should list the boot
210 * CPU too, but we do it for the sake of robustness anyway.
211 * Makes no sense to do this check in clustered apic mode, so skip it
213 if (!check_phys_apicid_present(boot_cpu_physical_apicid)) {
214 printk("weird, boot CPU (#%d) not listed by the BIOS.\n",
215 boot_cpu_physical_apicid);
216 physid_set(hard_smp_processor_id(), phys_cpu_present_map);
220 * If we couldn't find a local APIC, then get out of here now!
222 if (APIC_INTEGRATED(apic_version[boot_cpu_physical_apicid]) && !cpu_has_apic) {
223 printk(KERN_ERR "BIOS bug, local APIC #%d not detected!...\n",
224 boot_cpu_physical_apicid);
225 printk(KERN_ERR "... forcing use of dummy APIC emulation. (tell your hw vendor)\n");
232 * If SMP should be disabled, then really disable it!
235 smp_found_config = 0;
236 printk(KERN_INFO "SMP mode deactivated, forcing use of dummy APIC emulation.\n");
238 if (nmi_watchdog == NMI_LOCAL_APIC) {
239 printk(KERN_INFO "activating minimal APIC for NMI watchdog use.\n");
242 end_local_APIC_setup();
250 * Cycle through the processors sending APIC IPIs to boot each.
252 static void __init smp_boot_cpus(unsigned int max_cpus)
255 * Setup boot CPU information
257 smp_store_cpu_info(0); /* Final full version of the data */
258 printk(KERN_INFO "CPU%d: ", 0);
259 print_cpu_info(&cpu_data(0));
261 boot_cpu_physical_apicid = GET_APIC_ID(apic_read(APIC_ID));
262 boot_cpu_logical_apicid = logical_smp_processor_id();
264 current_thread_info()->cpu = 0;
266 set_cpu_sibling_map(0);
268 if (smp_sanity_check(max_cpus) < 0) {
269 printk(KERN_INFO "SMP disabled\n");
276 end_local_APIC_setup();
277 map_cpu_to_logical_apicid();
280 setup_portio_remap();
282 smpboot_setup_io_apic();
287 /* These are wrappers to interface to the new boot process. Someone
288 who understands all this stuff should rewrite it properly. --RR 15/Jul/02 */
289 void __init native_smp_prepare_cpus(unsigned int max_cpus)
291 nmi_watchdog_default();
292 cpu_callin_map = cpumask_of_cpu(0);
294 smp_boot_cpus(max_cpus);
297 void __init native_smp_prepare_boot_cpu(void)
299 unsigned int cpu = smp_processor_id();
304 cpu_set(cpu, cpu_callout_map);
305 __get_cpu_var(cpu_state) = CPU_ONLINE;
308 extern void impress_friends(void);
309 extern void smp_checks(void);
311 void __init native_smp_cpus_done(unsigned int max_cpus)
314 * Cleanup possible dangling ends...
316 smpboot_restore_warm_reset_vector();
318 Dprintk("Boot done.\n");
322 #ifdef CONFIG_X86_IO_APIC
325 check_nmi_watchdog();