2 * x86 SMP booting functions
4 * (c) 1995 Alan Cox, Building #3 <alan@redhat.com>
5 * (c) 1998, 1999, 2000 Ingo Molnar <mingo@redhat.com>
7 * Much of the core SMP work is based on previous work by Thomas Radke, to
8 * whom a great many thanks are extended.
10 * Thanks to Intel for making available several different Pentium,
11 * Pentium Pro and Pentium-II/Xeon MP machines.
12 * Original development of Linux SMP code supported by Caldera.
14 * This code is released under the GNU General Public License version 2 or
18 * Felix Koop : NR_CPUS used properly
19 * Jose Renau : Handle single CPU case.
20 * Alan Cox : By repeated request 8) - Total BogoMIPS report.
21 * Greg Wright : Fix for kernel stacks panic.
22 * Erich Boleyn : MP v1.4 and additional changes.
23 * Matthias Sattler : Changes for 2.1 kernel map.
24 * Michel Lespinasse : Changes for 2.1 kernel map.
25 * Michael Chastain : Change trampoline.S to gnu as.
26 * Alan Cox : Dumb bug: 'B' step PPro's are fine
27 * Ingo Molnar : Added APIC timers, based on code
29 * Ingo Molnar : various cleanups and rewrites
30 * Tigran Aivazian : fixed "0.00 in /proc/uptime on SMP" bug.
31 * Maciej W. Rozycki : Bits for genuine 82489DX APICs
32 * Martin J. Bligh : Added support for multi-quad systems
33 * Dave Jones : Report invalid combinations of Athlon CPUs.
34 * Rusty Russell : Hacked into shape for new "hotplug" boot process. */
36 #include <linux/module.h>
37 #include <linux/init.h>
38 #include <linux/kernel.h>
41 #include <linux/sched.h>
42 #include <linux/kernel_stat.h>
43 #include <linux/bootmem.h>
44 #include <linux/notifier.h>
45 #include <linux/cpu.h>
46 #include <linux/percpu.h>
47 #include <linux/nmi.h>
49 #include <linux/delay.h>
50 #include <linux/mc146818rtc.h>
51 #include <asm/tlbflush.h>
53 #include <asm/arch_hooks.h>
56 #include <mach_apic.h>
57 #include <mach_wakecpu.h>
58 #include <smpboot_hooks.h>
62 extern int smp_b_stepping;
64 static cpumask_t smp_commenced_mask;
66 /* which logical CPU number maps to which CPU (physical APIC ID) */
67 u16 x86_cpu_to_apicid_init[NR_CPUS] __initdata =
68 { [0 ... NR_CPUS-1] = BAD_APICID };
69 void *x86_cpu_to_apicid_early_ptr;
70 DEFINE_PER_CPU(u16, x86_cpu_to_apicid) = BAD_APICID;
71 EXPORT_PER_CPU_SYMBOL(x86_cpu_to_apicid);
73 u16 x86_bios_cpu_apicid_init[NR_CPUS] __initdata
74 = { [0 ... NR_CPUS-1] = BAD_APICID };
75 void *x86_bios_cpu_apicid_early_ptr;
76 DEFINE_PER_CPU(u16, x86_bios_cpu_apicid) = BAD_APICID;
77 EXPORT_PER_CPU_SYMBOL(x86_bios_cpu_apicid);
79 u8 apicid_2_node[MAX_APICID];
81 static void map_cpu_to_logical_apicid(void);
83 /* State of each CPU. */
84 DEFINE_PER_CPU(int, cpu_state) = { 0 };
86 static atomic_t init_deasserted;
88 static void __cpuinit smp_callin(void)
91 unsigned long timeout;
94 * If waken up by an INIT in an 82489DX configuration
95 * we may get here before an INIT-deassert IPI reaches
96 * our local APIC. We have to wait for the IPI or we'll
97 * lock up on an APIC access.
99 wait_for_init_deassert(&init_deasserted);
102 * (This works even if the APIC is not enabled.)
104 phys_id = GET_APIC_ID(apic_read(APIC_ID));
105 cpuid = smp_processor_id();
106 if (cpu_isset(cpuid, cpu_callin_map)) {
107 printk("huh, phys CPU#%d, CPU#%d already present??\n",
111 Dprintk("CPU#%d (phys ID: %d) waiting for CALLOUT\n", cpuid, phys_id);
114 * STARTUP IPIs are fragile beasts as they might sometimes
115 * trigger some glue motherboard logic. Complete APIC bus
116 * silence for 1 second, this overestimates the time the
117 * boot CPU is spending to send the up to 2 STARTUP IPIs
118 * by a factor of two. This should be enough.
122 * Waiting 2s total for startup (udelay is not yet working)
124 timeout = jiffies + 2*HZ;
125 while (time_before(jiffies, timeout)) {
127 * Has the boot CPU finished it's STARTUP sequence?
129 if (cpu_isset(cpuid, cpu_callout_map))
134 if (!time_before(jiffies, timeout)) {
135 printk("BUG: CPU%d started up but did not get a callout!\n",
141 * the boot CPU has finished the init stage and is spinning
142 * on callin_map until we finish. We are free to set up this
143 * CPU, first the APIC. (this is probably redundant on most
147 Dprintk("CALLIN, before setup_local_APIC().\n");
148 smp_callin_clear_local_apic();
150 map_cpu_to_logical_apicid();
156 Dprintk("Stack at about %p\n",&cpuid);
159 * Save our processor parameters
161 smp_store_cpu_info(cpuid);
164 * Allow the master to continue.
166 cpu_set(cpuid, cpu_callin_map);
172 * Activate a secondary processor.
174 static void __cpuinit start_secondary(void *unused)
177 * Don't put *anything* before cpu_init(), SMP booting is too
178 * fragile that we want to limit the things done here to the
179 * most necessary things.
187 while (!cpu_isset(smp_processor_id(), smp_commenced_mask))
190 /* otherwise gcc will move up smp_processor_id before the cpu_init */
193 * Check TSC synchronization with the BP:
195 check_tsc_sync_target();
197 if (nmi_watchdog == NMI_IO_APIC) {
198 disable_8259A_irq(0);
199 enable_NMI_through_LVT0();
203 * low-memory mappings have been cleared, flush them from
204 * the local TLBs too.
208 /* This must be done before setting cpu_online_map */
209 set_cpu_sibling_map(raw_smp_processor_id());
213 * We need to hold call_lock, so there is no inconsistency
214 * between the time smp_call_function() determines number of
215 * IPI recipients, and the time when the determination is made
216 * for which cpus receive the IPI. Holding this
217 * lock helps us to not include this cpu in a currently in progress
218 * smp_call_function().
220 lock_ipi_call_lock();
221 cpu_set(smp_processor_id(), cpu_online_map);
222 unlock_ipi_call_lock();
223 per_cpu(cpu_state, smp_processor_id()) = CPU_ONLINE;
225 setup_secondary_clock();
232 * Everything has been set up for the secondary
233 * CPUs - they just need to reload everything
234 * from the task structure
235 * This function must not return.
237 void __devinit initialize_secondary(void)
240 * We don't actually need to load the full TSS,
241 * basically just the stack pointer and the ip.
248 :"m" (current->thread.sp),"m" (current->thread.ip));
251 /* Static state in head.S used to set up a CPU */
259 /* which logical CPUs are on which nodes */
260 cpumask_t node_to_cpumask_map[MAX_NUMNODES] __read_mostly =
261 { [0 ... MAX_NUMNODES-1] = CPU_MASK_NONE };
262 EXPORT_SYMBOL(node_to_cpumask_map);
263 /* which node each logical CPU is on */
264 int cpu_to_node_map[NR_CPUS] __read_mostly = { [0 ... NR_CPUS-1] = 0 };
265 EXPORT_SYMBOL(cpu_to_node_map);
267 /* set up a mapping between cpu and node. */
268 static inline void map_cpu_to_node(int cpu, int node)
270 printk("Mapping cpu %d to node %d\n", cpu, node);
271 cpu_set(cpu, node_to_cpumask_map[node]);
272 cpu_to_node_map[cpu] = node;
275 /* undo a mapping between cpu and node. */
276 static inline void unmap_cpu_to_node(int cpu)
280 printk("Unmapping cpu %d from all nodes\n", cpu);
281 for (node = 0; node < MAX_NUMNODES; node ++)
282 cpu_clear(cpu, node_to_cpumask_map[node]);
283 cpu_to_node_map[cpu] = 0;
285 #else /* !CONFIG_NUMA */
287 #define map_cpu_to_node(cpu, node) ({})
288 #define unmap_cpu_to_node(cpu) ({})
290 #endif /* CONFIG_NUMA */
292 u8 cpu_2_logical_apicid[NR_CPUS] __read_mostly = { [0 ... NR_CPUS-1] = BAD_APICID };
294 static void map_cpu_to_logical_apicid(void)
296 int cpu = smp_processor_id();
297 int apicid = logical_smp_processor_id();
298 int node = apicid_to_node(apicid);
300 if (!node_online(node))
301 node = first_online_node;
303 cpu_2_logical_apicid[cpu] = apicid;
304 map_cpu_to_node(cpu, node);
307 static void unmap_cpu_to_logical_apicid(int cpu)
309 cpu_2_logical_apicid[cpu] = BAD_APICID;
310 unmap_cpu_to_node(cpu);
313 static inline void __inquire_remote_apic(int apicid)
315 unsigned i, regs[] = { APIC_ID >> 4, APIC_LVR >> 4, APIC_SPIV >> 4 };
316 char *names[] = { "ID", "VERSION", "SPIV" };
320 printk(KERN_INFO "Inquiring remote APIC #%d...\n", apicid);
322 for (i = 0; i < ARRAY_SIZE(regs); i++) {
323 printk(KERN_INFO "... APIC #%d %s: ", apicid, names[i]);
328 status = safe_apic_wait_icr_idle();
331 "a previous APIC delivery may have failed\n");
333 apic_write_around(APIC_ICR2, SET_APIC_DEST_FIELD(apicid));
334 apic_write_around(APIC_ICR, APIC_DM_REMRD | regs[i]);
339 status = apic_read(APIC_ICR) & APIC_ICR_RR_MASK;
340 } while (status == APIC_ICR_RR_INPROG && timeout++ < 1000);
343 case APIC_ICR_RR_VALID:
344 status = apic_read(APIC_RRR);
345 printk(KERN_CONT "%08x\n", status);
348 printk(KERN_CONT "failed\n");
353 #ifdef WAKE_SECONDARY_VIA_NMI
355 * Poke the other CPU in the eye via NMI to wake it up. Remember that the normal
356 * INIT, INIT, STARTUP sequence will reset the chip hard for us, and this
357 * won't ... remember to clear down the APIC, etc later.
360 wakeup_secondary_cpu(int logical_apicid, unsigned long start_eip)
362 unsigned long send_status, accept_status = 0;
366 apic_write_around(APIC_ICR2, SET_APIC_DEST_FIELD(logical_apicid));
368 /* Boot on the stack */
369 /* Kick the second */
370 apic_write_around(APIC_ICR, APIC_DM_NMI | APIC_DEST_LOGICAL);
372 Dprintk("Waiting for send to finish...\n");
373 send_status = safe_apic_wait_icr_idle();
376 * Give the other CPU some time to accept the IPI.
380 * Due to the Pentium erratum 3AP.
382 maxlvt = lapic_get_maxlvt();
384 apic_read_around(APIC_SPIV);
385 apic_write(APIC_ESR, 0);
387 accept_status = (apic_read(APIC_ESR) & 0xEF);
388 Dprintk("NMI sent.\n");
391 printk("APIC never delivered???\n");
393 printk("APIC delivery error (%lx).\n", accept_status);
395 return (send_status | accept_status);
397 #endif /* WAKE_SECONDARY_VIA_NMI */
399 #ifdef WAKE_SECONDARY_VIA_INIT
401 wakeup_secondary_cpu(int phys_apicid, unsigned long start_eip)
403 unsigned long send_status, accept_status = 0;
404 int maxlvt, num_starts, j;
407 * Be paranoid about clearing APIC errors.
409 if (APIC_INTEGRATED(apic_version[phys_apicid])) {
410 apic_read_around(APIC_SPIV);
411 apic_write(APIC_ESR, 0);
415 Dprintk("Asserting INIT.\n");
418 * Turn INIT on target chip
420 apic_write_around(APIC_ICR2, SET_APIC_DEST_FIELD(phys_apicid));
425 apic_write_around(APIC_ICR, APIC_INT_LEVELTRIG | APIC_INT_ASSERT
428 Dprintk("Waiting for send to finish...\n");
429 send_status = safe_apic_wait_icr_idle();
433 Dprintk("Deasserting INIT.\n");
436 apic_write_around(APIC_ICR2, SET_APIC_DEST_FIELD(phys_apicid));
439 apic_write_around(APIC_ICR, APIC_INT_LEVELTRIG | APIC_DM_INIT);
441 Dprintk("Waiting for send to finish...\n");
442 send_status = safe_apic_wait_icr_idle();
445 atomic_set(&init_deasserted, 1);
448 * Should we send STARTUP IPIs ?
450 * Determine this based on the APIC version.
451 * If we don't have an integrated APIC, don't send the STARTUP IPIs.
453 if (APIC_INTEGRATED(apic_version[phys_apicid]))
459 * Paravirt / VMI wants a startup IPI hook here to set up the
460 * target processor state.
462 startup_ipi_hook(phys_apicid, (unsigned long) start_secondary,
463 (unsigned long) stack_start.sp);
466 * Run STARTUP IPI loop.
468 Dprintk("#startup loops: %d.\n", num_starts);
470 maxlvt = lapic_get_maxlvt();
472 for (j = 1; j <= num_starts; j++) {
473 Dprintk("Sending STARTUP #%d.\n",j);
474 apic_read_around(APIC_SPIV);
475 apic_write(APIC_ESR, 0);
477 Dprintk("After apic_write.\n");
484 apic_write_around(APIC_ICR2, SET_APIC_DEST_FIELD(phys_apicid));
486 /* Boot on the stack */
487 /* Kick the second */
488 apic_write_around(APIC_ICR, APIC_DM_STARTUP
489 | (start_eip >> 12));
492 * Give the other CPU some time to accept the IPI.
496 Dprintk("Startup point 1.\n");
498 Dprintk("Waiting for send to finish...\n");
499 send_status = safe_apic_wait_icr_idle();
502 * Give the other CPU some time to accept the IPI.
506 * Due to the Pentium erratum 3AP.
509 apic_read_around(APIC_SPIV);
510 apic_write(APIC_ESR, 0);
512 accept_status = (apic_read(APIC_ESR) & 0xEF);
513 if (send_status || accept_status)
516 Dprintk("After Startup.\n");
519 printk("APIC never delivered???\n");
521 printk("APIC delivery error (%lx).\n", accept_status);
523 return (send_status | accept_status);
525 #endif /* WAKE_SECONDARY_VIA_INIT */
527 extern cpumask_t cpu_initialized;
529 #ifdef CONFIG_HOTPLUG_CPU
530 static struct task_struct * __cpuinitdata cpu_idle_tasks[NR_CPUS];
531 static inline struct task_struct * __cpuinit alloc_idle_task(int cpu)
533 struct task_struct *idle;
535 if ((idle = cpu_idle_tasks[cpu]) != NULL) {
536 /* initialize thread_struct. we really want to avoid destroy
539 idle->thread.sp = (unsigned long)task_pt_regs(idle);
540 init_idle(idle, cpu);
543 idle = fork_idle(cpu);
546 cpu_idle_tasks[cpu] = idle;
550 #define alloc_idle_task(cpu) fork_idle(cpu)
553 static int __cpuinit do_boot_cpu(int apicid, int cpu)
555 * NOTE - on most systems this is a PHYSICAL apic ID, but on multiquad
556 * (ie clustered apic addressing mode), this is a LOGICAL apic ID.
557 * Returns zero if CPU booted OK, else error code from wakeup_secondary_cpu.
560 struct task_struct *idle;
561 unsigned long boot_error;
563 unsigned long start_eip;
564 unsigned short nmi_high = 0, nmi_low = 0;
567 * Save current MTRR state in case it was changed since early boot
568 * (e.g. by the ACPI SMI) to initialize new CPUs with MTRRs in sync:
573 * We can't use kernel_thread since we must avoid to
574 * reschedule the child.
576 idle = alloc_idle_task(cpu);
578 panic("failed fork for CPU %d", cpu);
581 per_cpu(current_task, cpu) = idle;
582 early_gdt_descr.address = (unsigned long)get_cpu_gdt_table(cpu);
584 idle->thread.ip = (unsigned long) start_secondary;
585 /* start_eip had better be page-aligned! */
586 start_eip = setup_trampoline();
589 alternatives_smp_switch(1);
591 /* So we see what's up */
592 printk("Booting processor %d/%d ip %lx\n", cpu, apicid, start_eip);
593 /* Stack for startup_32 can be just as for start_secondary onwards */
594 stack_start.sp = (void *) idle->thread.sp;
599 * This grunge runs the startup process for
600 * the targeted processor.
603 atomic_set(&init_deasserted, 0);
605 Dprintk("Setting warm reset code and vector.\n");
607 store_NMI_vector(&nmi_high, &nmi_low);
609 smpboot_setup_warm_reset_vector(start_eip);
612 * Starting actual IPI sequence...
614 boot_error = wakeup_secondary_cpu(apicid, start_eip);
618 * allow APs to start initializing.
620 Dprintk("Before Callout %d.\n", cpu);
621 cpu_set(cpu, cpu_callout_map);
622 Dprintk("After Callout %d.\n", cpu);
625 * Wait 5s total for a response
627 for (timeout = 0; timeout < 50000; timeout++) {
628 if (cpu_isset(cpu, cpu_callin_map))
629 break; /* It has booted */
633 if (cpu_isset(cpu, cpu_callin_map)) {
634 /* number CPUs logically, starting from 1 (BSP is 0) */
636 printk("CPU%d: ", cpu);
637 print_cpu_info(&cpu_data(cpu));
638 Dprintk("CPU has booted.\n");
641 if (*((volatile unsigned char *)trampoline_base)
643 /* trampoline started but...? */
644 printk("Stuck ??\n");
646 /* trampoline code not run */
647 printk("Not responding.\n");
648 inquire_remote_apic(apicid);
653 /* Try to put things back the way they were before ... */
654 unmap_cpu_to_logical_apicid(cpu);
655 cpu_clear(cpu, cpu_callout_map); /* was set here (do_boot_cpu()) */
656 cpu_clear(cpu, cpu_initialized); /* was set by cpu_init() */
657 cpu_clear(cpu, cpu_possible_map);
658 per_cpu(x86_cpu_to_apicid, cpu) = BAD_APICID;
662 /* mark "stuck" area as not stuck */
663 *((volatile unsigned long *)trampoline_base) = 0;
668 #ifdef CONFIG_HOTPLUG_CPU
669 void cpu_exit_clear(void)
671 int cpu = raw_smp_processor_id();
679 cpu_clear(cpu, cpu_callout_map);
680 cpu_clear(cpu, cpu_callin_map);
682 cpu_clear(cpu, smp_commenced_mask);
683 unmap_cpu_to_logical_apicid(cpu);
686 struct warm_boot_cpu_info {
687 struct completion *complete;
688 struct work_struct task;
693 static void __cpuinit do_warm_boot_cpu(struct work_struct *work)
695 struct warm_boot_cpu_info *info =
696 container_of(work, struct warm_boot_cpu_info, task);
697 do_boot_cpu(info->apicid, info->cpu);
698 complete(info->complete);
701 static void __cpuinit __smp_prepare_cpu(int cpu)
703 DECLARE_COMPLETION_ONSTACK(done);
704 struct warm_boot_cpu_info info;
707 apicid = per_cpu(x86_cpu_to_apicid, cpu);
709 info.complete = &done;
710 info.apicid = apicid;
712 INIT_WORK(&info.task, do_warm_boot_cpu);
714 /* init low mem mapping */
715 clone_pgd_range(swapper_pg_dir, swapper_pg_dir + USER_PGD_PTRS,
716 min_t(unsigned long, KERNEL_PGD_PTRS, USER_PGD_PTRS));
718 schedule_work(&info.task);
719 wait_for_completion(&done);
725 static int boot_cpu_logical_apicid;
726 /* Where the IO area was mapped on multiquad, always 0 otherwise */
728 #ifdef CONFIG_X86_NUMAQ
729 EXPORT_SYMBOL(xquad_portio);
732 static void __init disable_smp(void)
734 cpu_possible_map = cpumask_of_cpu(0);
735 cpu_present_map = cpumask_of_cpu(0);
736 smpboot_clear_io_apic_irqs();
737 phys_cpu_present_map = physid_mask_of_physid(0);
738 map_cpu_to_logical_apicid();
739 cpu_set(0, per_cpu(cpu_sibling_map, 0));
740 cpu_set(0, per_cpu(cpu_core_map, 0));
743 static int __init smp_sanity_check(unsigned max_cpus)
746 * If we couldn't find an SMP configuration at boot time,
747 * get out of here now!
749 if (!smp_found_config && !acpi_lapic) {
750 printk(KERN_NOTICE "SMP motherboard not detected.\n");
752 if (APIC_init_uniprocessor())
753 printk(KERN_NOTICE "Local APIC not detected."
754 " Using dummy APIC emulation.\n");
759 * Should not be necessary because the MP table should list the boot
760 * CPU too, but we do it for the sake of robustness anyway.
761 * Makes no sense to do this check in clustered apic mode, so skip it
763 if (!check_phys_apicid_present(boot_cpu_physical_apicid)) {
764 printk("weird, boot CPU (#%d) not listed by the BIOS.\n",
765 boot_cpu_physical_apicid);
766 physid_set(hard_smp_processor_id(), phys_cpu_present_map);
770 * If we couldn't find a local APIC, then get out of here now!
772 if (APIC_INTEGRATED(apic_version[boot_cpu_physical_apicid]) && !cpu_has_apic) {
773 printk(KERN_ERR "BIOS bug, local APIC #%d not detected!...\n",
774 boot_cpu_physical_apicid);
775 printk(KERN_ERR "... forcing use of dummy APIC emulation. (tell your hw vendor)\n");
782 * If SMP should be disabled, then really disable it!
785 smp_found_config = 0;
786 printk(KERN_INFO "SMP mode deactivated, forcing use of dummy APIC emulation.\n");
788 if (nmi_watchdog == NMI_LOCAL_APIC) {
789 printk(KERN_INFO "activating minimal APIC for NMI watchdog use.\n");
800 * Cycle through the processors sending APIC IPIs to boot each.
802 static void __init smp_boot_cpus(unsigned int max_cpus)
804 int apicid, cpu, bit, kicked;
805 unsigned long bogosum = 0;
808 * Setup boot CPU information
810 smp_store_cpu_info(0); /* Final full version of the data */
811 printk(KERN_INFO "CPU%d: ", 0);
812 print_cpu_info(&cpu_data(0));
814 boot_cpu_physical_apicid = GET_APIC_ID(apic_read(APIC_ID));
815 boot_cpu_logical_apicid = logical_smp_processor_id();
817 current_thread_info()->cpu = 0;
819 set_cpu_sibling_map(0);
821 if (smp_sanity_check(max_cpus) < 0) {
822 printk(KERN_INFO "SMP disabled\n");
829 map_cpu_to_logical_apicid();
832 setup_portio_remap();
835 * Scan the CPU present map and fire up the other CPUs via do_boot_cpu
837 * In clustered apic mode, phys_cpu_present_map is a constructed thus:
838 * bits 0-3 are quad0, 4-7 are quad1, etc. A perverse twist on the
841 Dprintk("CPU present map: %lx\n", physids_coerce(phys_cpu_present_map));
844 for (bit = 0; kicked < NR_CPUS && bit < MAX_APICS; bit++) {
845 apicid = cpu_present_to_apicid(bit);
847 * Don't even attempt to start the boot CPU!
849 if ((apicid == boot_cpu_apicid) || (apicid == BAD_APICID))
852 if (!check_apicid_present(bit))
854 if (max_cpus <= cpucount+1)
856 /* Utterly temporary */
857 for (cpu = 0; cpu < NR_CPUS; cpu++)
858 if (per_cpu(x86_cpu_to_apicid, cpu) == apicid)
860 if (do_boot_cpu(apicid, cpu))
861 printk("CPU #%d not responding - cannot use it.\n",
868 * Cleanup possible dangling ends...
870 smpboot_restore_warm_reset_vector();
873 * Allow the user to impress friends.
875 Dprintk("Before bogomips.\n");
876 for_each_possible_cpu(cpu)
877 if (cpu_isset(cpu, cpu_callout_map))
878 bogosum += cpu_data(cpu).loops_per_jiffy;
880 "Total of %d processors activated (%lu.%02lu BogoMIPS).\n",
883 (bogosum/(5000/HZ))%100);
885 Dprintk("Before bogocount - setting activated=1.\n");
888 printk(KERN_WARNING "WARNING: SMP operation may be unreliable with B stepping processors.\n");
891 * Don't taint if we are running SMP kernel on a single non-MP
894 if (tainted & TAINT_UNSAFE_SMP) {
896 printk (KERN_INFO "WARNING: This combination of AMD processors is not suitable for SMP.\n");
898 tainted &= ~TAINT_UNSAFE_SMP;
901 Dprintk("Boot done.\n");
904 * construct cpu_sibling_map, so that we can tell sibling CPUs
907 for_each_possible_cpu(cpu) {
908 cpus_clear(per_cpu(cpu_sibling_map, cpu));
909 cpus_clear(per_cpu(cpu_core_map, cpu));
912 cpu_set(0, per_cpu(cpu_sibling_map, 0));
913 cpu_set(0, per_cpu(cpu_core_map, 0));
915 smpboot_setup_io_apic();
920 /* These are wrappers to interface to the new boot process. Someone
921 who understands all this stuff should rewrite it properly. --RR 15/Jul/02 */
922 void __init native_smp_prepare_cpus(unsigned int max_cpus)
924 smp_commenced_mask = cpumask_of_cpu(0);
925 cpu_callin_map = cpumask_of_cpu(0);
927 smp_boot_cpus(max_cpus);
930 void __init native_smp_prepare_boot_cpu(void)
932 unsigned int cpu = smp_processor_id();
937 cpu_set(cpu, cpu_online_map);
938 cpu_set(cpu, cpu_callout_map);
939 cpu_set(cpu, cpu_present_map);
940 cpu_set(cpu, cpu_possible_map);
941 __get_cpu_var(cpu_state) = CPU_ONLINE;
944 int __cpuinit native_cpu_up(unsigned int cpu)
946 int apicid = cpu_present_to_apicid(cpu);
949 WARN_ON(irqs_disabled());
951 Dprintk("++++++++++++++++++++=_---CPU UP %u\n", cpu);
953 if (apicid == BAD_APICID || apicid == boot_cpu_physical_apicid ||
954 !physid_isset(apicid, phys_cpu_present_map)) {
955 printk(KERN_ERR "%s: bad cpu %d\n", __func__, cpu);
959 per_cpu(cpu_state, cpu) = CPU_UP_PREPARE;
960 #ifdef CONFIG_HOTPLUG_CPU
963 * We do warm boot only on cpus that had booted earlier
964 * Otherwise cold boot is all handled from smp_boot_cpus().
965 * cpu_callin_map is set during AP kickstart process. Its reset
966 * when a cpu is taken offline from cpu_exit_clear().
968 if (!cpu_isset(cpu, cpu_callin_map))
969 __smp_prepare_cpu(cpu);
972 /* In case one didn't come up */
973 if (!cpu_isset(cpu, cpu_callin_map)) {
974 printk(KERN_DEBUG "skipping cpu%d, didn't come online\n", cpu);
978 /* Unleash the CPU! */
979 cpu_set(cpu, smp_commenced_mask);
982 * Check TSC synchronization with the AP (keep irqs disabled
985 local_irq_save(flags);
986 check_tsc_sync_source(cpu);
987 local_irq_restore(flags);
989 while (!cpu_isset(cpu, cpu_online_map)) {
991 touch_nmi_watchdog();
997 void __init native_smp_cpus_done(unsigned int max_cpus)
999 #ifdef CONFIG_X86_IO_APIC
1000 setup_ioapic_dest();
1005 void __init smp_intr_init(void)
1008 * IRQ0 must be given a fixed assignment and initialized,
1009 * because it's used before the IO-APIC is set up.
1011 set_intr_gate(FIRST_DEVICE_VECTOR, interrupt[0]);
1014 * The reschedule interrupt is a CPU-to-CPU reschedule-helper
1015 * IPI, driven by wakeup.
1017 set_intr_gate(RESCHEDULE_VECTOR, reschedule_interrupt);
1019 /* IPI for invalidation */
1020 set_intr_gate(INVALIDATE_TLB_VECTOR, invalidate_interrupt);
1022 /* IPI for generic function call */
1023 set_intr_gate(CALL_FUNCTION_VECTOR, call_function_interrupt);