2 * x86 SMP booting functions
4 * (c) 1995 Alan Cox, Building #3 <alan@redhat.com>
5 * (c) 1998, 1999, 2000 Ingo Molnar <mingo@redhat.com>
7 * Much of the core SMP work is based on previous work by Thomas Radke, to
8 * whom a great many thanks are extended.
10 * Thanks to Intel for making available several different Pentium,
11 * Pentium Pro and Pentium-II/Xeon MP machines.
12 * Original development of Linux SMP code supported by Caldera.
14 * This code is released under the GNU General Public License version 2 or
18 * Felix Koop : NR_CPUS used properly
19 * Jose Renau : Handle single CPU case.
20 * Alan Cox : By repeated request 8) - Total BogoMIPS report.
21 * Greg Wright : Fix for kernel stacks panic.
22 * Erich Boleyn : MP v1.4 and additional changes.
23 * Matthias Sattler : Changes for 2.1 kernel map.
24 * Michel Lespinasse : Changes for 2.1 kernel map.
25 * Michael Chastain : Change trampoline.S to gnu as.
26 * Alan Cox : Dumb bug: 'B' step PPro's are fine
27 * Ingo Molnar : Added APIC timers, based on code
29 * Ingo Molnar : various cleanups and rewrites
30 * Tigran Aivazian : fixed "0.00 in /proc/uptime on SMP" bug.
31 * Maciej W. Rozycki : Bits for genuine 82489DX APICs
32 * Martin J. Bligh : Added support for multi-quad systems
33 * Dave Jones : Report invalid combinations of Athlon CPUs.
34 * Rusty Russell : Hacked into shape for new "hotplug" boot process. */
36 #include <linux/module.h>
37 #include <linux/init.h>
38 #include <linux/kernel.h>
41 #include <linux/sched.h>
42 #include <linux/kernel_stat.h>
43 #include <linux/bootmem.h>
44 #include <linux/notifier.h>
45 #include <linux/cpu.h>
46 #include <linux/percpu.h>
47 #include <linux/nmi.h>
49 #include <linux/delay.h>
50 #include <linux/mc146818rtc.h>
51 #include <asm/tlbflush.h>
53 #include <asm/arch_hooks.h>
56 #include <mach_apic.h>
57 #include <mach_wakecpu.h>
58 #include <smpboot_hooks.h>
62 extern int smp_b_stepping;
64 static cpumask_t smp_commenced_mask;
66 /* which logical CPU number maps to which CPU (physical APIC ID) */
67 u16 x86_cpu_to_apicid_init[NR_CPUS] __initdata =
68 { [0 ... NR_CPUS-1] = BAD_APICID };
69 void *x86_cpu_to_apicid_early_ptr;
70 DEFINE_PER_CPU(u16, x86_cpu_to_apicid) = BAD_APICID;
71 EXPORT_PER_CPU_SYMBOL(x86_cpu_to_apicid);
73 u16 x86_bios_cpu_apicid_init[NR_CPUS] __initdata
74 = { [0 ... NR_CPUS-1] = BAD_APICID };
75 void *x86_bios_cpu_apicid_early_ptr;
76 DEFINE_PER_CPU(u16, x86_bios_cpu_apicid) = BAD_APICID;
77 EXPORT_PER_CPU_SYMBOL(x86_bios_cpu_apicid);
79 u8 apicid_2_node[MAX_APICID];
81 static void map_cpu_to_logical_apicid(void);
83 /* State of each CPU. */
84 DEFINE_PER_CPU(int, cpu_state) = { 0 };
86 static atomic_t init_deasserted;
88 static void __cpuinit smp_callin(void)
91 unsigned long timeout;
94 * If waken up by an INIT in an 82489DX configuration
95 * we may get here before an INIT-deassert IPI reaches
96 * our local APIC. We have to wait for the IPI or we'll
97 * lock up on an APIC access.
99 wait_for_init_deassert(&init_deasserted);
102 * (This works even if the APIC is not enabled.)
104 phys_id = GET_APIC_ID(apic_read(APIC_ID));
105 cpuid = smp_processor_id();
106 if (cpu_isset(cpuid, cpu_callin_map)) {
107 printk("huh, phys CPU#%d, CPU#%d already present??\n",
111 Dprintk("CPU#%d (phys ID: %d) waiting for CALLOUT\n", cpuid, phys_id);
114 * STARTUP IPIs are fragile beasts as they might sometimes
115 * trigger some glue motherboard logic. Complete APIC bus
116 * silence for 1 second, this overestimates the time the
117 * boot CPU is spending to send the up to 2 STARTUP IPIs
118 * by a factor of two. This should be enough.
122 * Waiting 2s total for startup (udelay is not yet working)
124 timeout = jiffies + 2*HZ;
125 while (time_before(jiffies, timeout)) {
127 * Has the boot CPU finished it's STARTUP sequence?
129 if (cpu_isset(cpuid, cpu_callout_map))
134 if (!time_before(jiffies, timeout)) {
135 printk("BUG: CPU%d started up but did not get a callout!\n",
141 * the boot CPU has finished the init stage and is spinning
142 * on callin_map until we finish. We are free to set up this
143 * CPU, first the APIC. (this is probably redundant on most
147 Dprintk("CALLIN, before setup_local_APIC().\n");
148 smp_callin_clear_local_apic();
150 map_cpu_to_logical_apicid();
156 Dprintk("Stack at about %p\n",&cpuid);
159 * Save our processor parameters
161 smp_store_cpu_info(cpuid);
164 * Allow the master to continue.
166 cpu_set(cpuid, cpu_callin_map);
170 * Activate a secondary processor.
172 static void __cpuinit start_secondary(void *unused)
175 * Don't put *anything* before cpu_init(), SMP booting is too
176 * fragile that we want to limit the things done here to the
177 * most necessary things.
185 while (!cpu_isset(smp_processor_id(), smp_commenced_mask))
188 /* otherwise gcc will move up smp_processor_id before the cpu_init */
191 * Check TSC synchronization with the BP:
193 check_tsc_sync_target();
195 if (nmi_watchdog == NMI_IO_APIC) {
196 disable_8259A_irq(0);
197 enable_NMI_through_LVT0();
201 * low-memory mappings have been cleared, flush them from
202 * the local TLBs too.
206 /* This must be done before setting cpu_online_map */
207 set_cpu_sibling_map(raw_smp_processor_id());
211 * We need to hold call_lock, so there is no inconsistency
212 * between the time smp_call_function() determines number of
213 * IPI recipients, and the time when the determination is made
214 * for which cpus receive the IPI. Holding this
215 * lock helps us to not include this cpu in a currently in progress
216 * smp_call_function().
218 lock_ipi_call_lock();
219 cpu_set(smp_processor_id(), cpu_online_map);
220 unlock_ipi_call_lock();
221 per_cpu(cpu_state, smp_processor_id()) = CPU_ONLINE;
223 setup_secondary_clock();
230 * Everything has been set up for the secondary
231 * CPUs - they just need to reload everything
232 * from the task structure
233 * This function must not return.
235 void __devinit initialize_secondary(void)
238 * We don't actually need to load the full TSS,
239 * basically just the stack pointer and the ip.
246 :"m" (current->thread.sp),"m" (current->thread.ip));
249 /* Static state in head.S used to set up a CPU */
257 /* which logical CPUs are on which nodes */
258 cpumask_t node_to_cpumask_map[MAX_NUMNODES] __read_mostly =
259 { [0 ... MAX_NUMNODES-1] = CPU_MASK_NONE };
260 EXPORT_SYMBOL(node_to_cpumask_map);
261 /* which node each logical CPU is on */
262 int cpu_to_node_map[NR_CPUS] __read_mostly = { [0 ... NR_CPUS-1] = 0 };
263 EXPORT_SYMBOL(cpu_to_node_map);
265 /* set up a mapping between cpu and node. */
266 static inline void map_cpu_to_node(int cpu, int node)
268 printk("Mapping cpu %d to node %d\n", cpu, node);
269 cpu_set(cpu, node_to_cpumask_map[node]);
270 cpu_to_node_map[cpu] = node;
273 /* undo a mapping between cpu and node. */
274 static inline void unmap_cpu_to_node(int cpu)
278 printk("Unmapping cpu %d from all nodes\n", cpu);
279 for (node = 0; node < MAX_NUMNODES; node ++)
280 cpu_clear(cpu, node_to_cpumask_map[node]);
281 cpu_to_node_map[cpu] = 0;
283 #else /* !CONFIG_NUMA */
285 #define map_cpu_to_node(cpu, node) ({})
286 #define unmap_cpu_to_node(cpu) ({})
288 #endif /* CONFIG_NUMA */
290 u8 cpu_2_logical_apicid[NR_CPUS] __read_mostly = { [0 ... NR_CPUS-1] = BAD_APICID };
292 static void map_cpu_to_logical_apicid(void)
294 int cpu = smp_processor_id();
295 int apicid = logical_smp_processor_id();
296 int node = apicid_to_node(apicid);
298 if (!node_online(node))
299 node = first_online_node;
301 cpu_2_logical_apicid[cpu] = apicid;
302 map_cpu_to_node(cpu, node);
305 static void unmap_cpu_to_logical_apicid(int cpu)
307 cpu_2_logical_apicid[cpu] = BAD_APICID;
308 unmap_cpu_to_node(cpu);
311 static inline void __inquire_remote_apic(int apicid)
313 unsigned i, regs[] = { APIC_ID >> 4, APIC_LVR >> 4, APIC_SPIV >> 4 };
314 char *names[] = { "ID", "VERSION", "SPIV" };
318 printk(KERN_INFO "Inquiring remote APIC #%d...\n", apicid);
320 for (i = 0; i < ARRAY_SIZE(regs); i++) {
321 printk(KERN_INFO "... APIC #%d %s: ", apicid, names[i]);
326 status = safe_apic_wait_icr_idle();
329 "a previous APIC delivery may have failed\n");
331 apic_write_around(APIC_ICR2, SET_APIC_DEST_FIELD(apicid));
332 apic_write_around(APIC_ICR, APIC_DM_REMRD | regs[i]);
337 status = apic_read(APIC_ICR) & APIC_ICR_RR_MASK;
338 } while (status == APIC_ICR_RR_INPROG && timeout++ < 1000);
341 case APIC_ICR_RR_VALID:
342 status = apic_read(APIC_RRR);
343 printk(KERN_CONT "%08x\n", status);
346 printk(KERN_CONT "failed\n");
351 #ifdef WAKE_SECONDARY_VIA_NMI
353 * Poke the other CPU in the eye via NMI to wake it up. Remember that the normal
354 * INIT, INIT, STARTUP sequence will reset the chip hard for us, and this
355 * won't ... remember to clear down the APIC, etc later.
358 wakeup_secondary_cpu(int logical_apicid, unsigned long start_eip)
360 unsigned long send_status, accept_status = 0;
364 apic_write_around(APIC_ICR2, SET_APIC_DEST_FIELD(logical_apicid));
366 /* Boot on the stack */
367 /* Kick the second */
368 apic_write_around(APIC_ICR, APIC_DM_NMI | APIC_DEST_LOGICAL);
370 Dprintk("Waiting for send to finish...\n");
371 send_status = safe_apic_wait_icr_idle();
374 * Give the other CPU some time to accept the IPI.
378 * Due to the Pentium erratum 3AP.
380 maxlvt = lapic_get_maxlvt();
382 apic_read_around(APIC_SPIV);
383 apic_write(APIC_ESR, 0);
385 accept_status = (apic_read(APIC_ESR) & 0xEF);
386 Dprintk("NMI sent.\n");
389 printk("APIC never delivered???\n");
391 printk("APIC delivery error (%lx).\n", accept_status);
393 return (send_status | accept_status);
395 #endif /* WAKE_SECONDARY_VIA_NMI */
397 #ifdef WAKE_SECONDARY_VIA_INIT
399 wakeup_secondary_cpu(int phys_apicid, unsigned long start_eip)
401 unsigned long send_status, accept_status = 0;
402 int maxlvt, num_starts, j;
405 * Be paranoid about clearing APIC errors.
407 if (APIC_INTEGRATED(apic_version[phys_apicid])) {
408 apic_read_around(APIC_SPIV);
409 apic_write(APIC_ESR, 0);
413 Dprintk("Asserting INIT.\n");
416 * Turn INIT on target chip
418 apic_write_around(APIC_ICR2, SET_APIC_DEST_FIELD(phys_apicid));
423 apic_write_around(APIC_ICR, APIC_INT_LEVELTRIG | APIC_INT_ASSERT
426 Dprintk("Waiting for send to finish...\n");
427 send_status = safe_apic_wait_icr_idle();
431 Dprintk("Deasserting INIT.\n");
434 apic_write_around(APIC_ICR2, SET_APIC_DEST_FIELD(phys_apicid));
437 apic_write_around(APIC_ICR, APIC_INT_LEVELTRIG | APIC_DM_INIT);
439 Dprintk("Waiting for send to finish...\n");
440 send_status = safe_apic_wait_icr_idle();
443 atomic_set(&init_deasserted, 1);
446 * Should we send STARTUP IPIs ?
448 * Determine this based on the APIC version.
449 * If we don't have an integrated APIC, don't send the STARTUP IPIs.
451 if (APIC_INTEGRATED(apic_version[phys_apicid]))
457 * Paravirt / VMI wants a startup IPI hook here to set up the
458 * target processor state.
460 startup_ipi_hook(phys_apicid, (unsigned long) start_secondary,
461 (unsigned long) stack_start.sp);
464 * Run STARTUP IPI loop.
466 Dprintk("#startup loops: %d.\n", num_starts);
468 maxlvt = lapic_get_maxlvt();
470 for (j = 1; j <= num_starts; j++) {
471 Dprintk("Sending STARTUP #%d.\n",j);
472 apic_read_around(APIC_SPIV);
473 apic_write(APIC_ESR, 0);
475 Dprintk("After apic_write.\n");
482 apic_write_around(APIC_ICR2, SET_APIC_DEST_FIELD(phys_apicid));
484 /* Boot on the stack */
485 /* Kick the second */
486 apic_write_around(APIC_ICR, APIC_DM_STARTUP
487 | (start_eip >> 12));
490 * Give the other CPU some time to accept the IPI.
494 Dprintk("Startup point 1.\n");
496 Dprintk("Waiting for send to finish...\n");
497 send_status = safe_apic_wait_icr_idle();
500 * Give the other CPU some time to accept the IPI.
504 * Due to the Pentium erratum 3AP.
507 apic_read_around(APIC_SPIV);
508 apic_write(APIC_ESR, 0);
510 accept_status = (apic_read(APIC_ESR) & 0xEF);
511 if (send_status || accept_status)
514 Dprintk("After Startup.\n");
517 printk("APIC never delivered???\n");
519 printk("APIC delivery error (%lx).\n", accept_status);
521 return (send_status | accept_status);
523 #endif /* WAKE_SECONDARY_VIA_INIT */
525 extern cpumask_t cpu_initialized;
527 #ifdef CONFIG_HOTPLUG_CPU
528 static struct task_struct * __cpuinitdata cpu_idle_tasks[NR_CPUS];
529 static inline struct task_struct * __cpuinit alloc_idle_task(int cpu)
531 struct task_struct *idle;
533 if ((idle = cpu_idle_tasks[cpu]) != NULL) {
534 /* initialize thread_struct. we really want to avoid destroy
537 idle->thread.sp = (unsigned long)task_pt_regs(idle);
538 init_idle(idle, cpu);
541 idle = fork_idle(cpu);
544 cpu_idle_tasks[cpu] = idle;
548 #define alloc_idle_task(cpu) fork_idle(cpu)
551 static int __cpuinit do_boot_cpu(int apicid, int cpu)
553 * NOTE - on most systems this is a PHYSICAL apic ID, but on multiquad
554 * (ie clustered apic addressing mode), this is a LOGICAL apic ID.
555 * Returns zero if CPU booted OK, else error code from wakeup_secondary_cpu.
558 struct task_struct *idle;
559 unsigned long boot_error;
561 unsigned long start_eip;
562 unsigned short nmi_high = 0, nmi_low = 0;
565 * Save current MTRR state in case it was changed since early boot
566 * (e.g. by the ACPI SMI) to initialize new CPUs with MTRRs in sync:
571 * We can't use kernel_thread since we must avoid to
572 * reschedule the child.
574 idle = alloc_idle_task(cpu);
576 panic("failed fork for CPU %d", cpu);
579 per_cpu(current_task, cpu) = idle;
580 early_gdt_descr.address = (unsigned long)get_cpu_gdt_table(cpu);
582 idle->thread.ip = (unsigned long) start_secondary;
583 /* start_eip had better be page-aligned! */
584 start_eip = setup_trampoline();
586 alternatives_smp_switch(1);
588 /* So we see what's up */
589 printk("Booting processor %d/%d ip %lx\n", cpu, apicid, start_eip);
590 /* Stack for startup_32 can be just as for start_secondary onwards */
591 stack_start.sp = (void *) idle->thread.sp;
596 * This grunge runs the startup process for
597 * the targeted processor.
600 atomic_set(&init_deasserted, 0);
602 Dprintk("Setting warm reset code and vector.\n");
604 store_NMI_vector(&nmi_high, &nmi_low);
606 smpboot_setup_warm_reset_vector(start_eip);
609 * Starting actual IPI sequence...
611 boot_error = wakeup_secondary_cpu(apicid, start_eip);
615 * allow APs to start initializing.
617 Dprintk("Before Callout %d.\n", cpu);
618 cpu_set(cpu, cpu_callout_map);
619 Dprintk("After Callout %d.\n", cpu);
622 * Wait 5s total for a response
624 for (timeout = 0; timeout < 50000; timeout++) {
625 if (cpu_isset(cpu, cpu_callin_map))
626 break; /* It has booted */
630 if (cpu_isset(cpu, cpu_callin_map)) {
631 /* number CPUs logically, starting from 1 (BSP is 0) */
633 printk("CPU%d: ", cpu);
634 print_cpu_info(&cpu_data(cpu));
635 Dprintk("CPU has booted.\n");
638 if (*((volatile unsigned char *)trampoline_base)
640 /* trampoline started but...? */
641 printk("Stuck ??\n");
643 /* trampoline code not run */
644 printk("Not responding.\n");
645 inquire_remote_apic(apicid);
650 /* Try to put things back the way they were before ... */
651 unmap_cpu_to_logical_apicid(cpu);
652 cpu_clear(cpu, cpu_callout_map); /* was set here (do_boot_cpu()) */
653 cpu_clear(cpu, cpu_initialized); /* was set by cpu_init() */
654 cpu_clear(cpu, cpu_possible_map);
655 per_cpu(x86_cpu_to_apicid, cpu) = BAD_APICID;
658 /* mark "stuck" area as not stuck */
659 *((volatile unsigned long *)trampoline_base) = 0;
664 #ifdef CONFIG_HOTPLUG_CPU
665 void cpu_exit_clear(void)
667 int cpu = raw_smp_processor_id();
674 cpu_clear(cpu, cpu_callout_map);
675 cpu_clear(cpu, cpu_callin_map);
677 cpu_clear(cpu, smp_commenced_mask);
678 unmap_cpu_to_logical_apicid(cpu);
681 struct warm_boot_cpu_info {
682 struct completion *complete;
683 struct work_struct task;
688 static void __cpuinit do_warm_boot_cpu(struct work_struct *work)
690 struct warm_boot_cpu_info *info =
691 container_of(work, struct warm_boot_cpu_info, task);
692 do_boot_cpu(info->apicid, info->cpu);
693 complete(info->complete);
696 static void __cpuinit __smp_prepare_cpu(int cpu)
698 DECLARE_COMPLETION_ONSTACK(done);
699 struct warm_boot_cpu_info info;
702 apicid = per_cpu(x86_cpu_to_apicid, cpu);
704 info.complete = &done;
705 info.apicid = apicid;
707 INIT_WORK(&info.task, do_warm_boot_cpu);
709 /* init low mem mapping */
710 clone_pgd_range(swapper_pg_dir, swapper_pg_dir + USER_PGD_PTRS,
711 min_t(unsigned long, KERNEL_PGD_PTRS, USER_PGD_PTRS));
713 schedule_work(&info.task);
714 wait_for_completion(&done);
720 static int boot_cpu_logical_apicid;
721 /* Where the IO area was mapped on multiquad, always 0 otherwise */
723 #ifdef CONFIG_X86_NUMAQ
724 EXPORT_SYMBOL(xquad_portio);
727 static void __init disable_smp(void)
729 cpu_possible_map = cpumask_of_cpu(0);
730 cpu_present_map = cpumask_of_cpu(0);
731 smpboot_clear_io_apic_irqs();
732 phys_cpu_present_map = physid_mask_of_physid(0);
733 map_cpu_to_logical_apicid();
734 cpu_set(0, per_cpu(cpu_sibling_map, 0));
735 cpu_set(0, per_cpu(cpu_core_map, 0));
738 static int __init smp_sanity_check(unsigned max_cpus)
741 * If we couldn't find an SMP configuration at boot time,
742 * get out of here now!
744 if (!smp_found_config && !acpi_lapic) {
745 printk(KERN_NOTICE "SMP motherboard not detected.\n");
747 if (APIC_init_uniprocessor())
748 printk(KERN_NOTICE "Local APIC not detected."
749 " Using dummy APIC emulation.\n");
754 * Should not be necessary because the MP table should list the boot
755 * CPU too, but we do it for the sake of robustness anyway.
756 * Makes no sense to do this check in clustered apic mode, so skip it
758 if (!check_phys_apicid_present(boot_cpu_physical_apicid)) {
759 printk("weird, boot CPU (#%d) not listed by the BIOS.\n",
760 boot_cpu_physical_apicid);
761 physid_set(hard_smp_processor_id(), phys_cpu_present_map);
765 * If we couldn't find a local APIC, then get out of here now!
767 if (APIC_INTEGRATED(apic_version[boot_cpu_physical_apicid]) && !cpu_has_apic) {
768 printk(KERN_ERR "BIOS bug, local APIC #%d not detected!...\n",
769 boot_cpu_physical_apicid);
770 printk(KERN_ERR "... forcing use of dummy APIC emulation. (tell your hw vendor)\n");
777 * If SMP should be disabled, then really disable it!
780 smp_found_config = 0;
781 printk(KERN_INFO "SMP mode deactivated, forcing use of dummy APIC emulation.\n");
783 if (nmi_watchdog == NMI_LOCAL_APIC) {
784 printk(KERN_INFO "activating minimal APIC for NMI watchdog use.\n");
794 * Cycle through the processors sending APIC IPIs to boot each.
796 static void __init smp_boot_cpus(unsigned int max_cpus)
798 int apicid, cpu, bit, kicked;
799 unsigned long bogosum = 0;
802 * Setup boot CPU information
804 smp_store_cpu_info(0); /* Final full version of the data */
805 printk(KERN_INFO "CPU%d: ", 0);
806 print_cpu_info(&cpu_data(0));
808 boot_cpu_physical_apicid = GET_APIC_ID(apic_read(APIC_ID));
809 boot_cpu_logical_apicid = logical_smp_processor_id();
811 current_thread_info()->cpu = 0;
813 set_cpu_sibling_map(0);
815 if (smp_sanity_check(max_cpus) < 0) {
816 printk(KERN_INFO "SMP disabled\n");
823 map_cpu_to_logical_apicid();
826 setup_portio_remap();
829 * Scan the CPU present map and fire up the other CPUs via do_boot_cpu
831 * In clustered apic mode, phys_cpu_present_map is a constructed thus:
832 * bits 0-3 are quad0, 4-7 are quad1, etc. A perverse twist on the
835 Dprintk("CPU present map: %lx\n", physids_coerce(phys_cpu_present_map));
838 for (bit = 0; kicked < NR_CPUS && bit < MAX_APICS; bit++) {
839 apicid = cpu_present_to_apicid(bit);
841 * Don't even attempt to start the boot CPU!
843 if ((apicid == boot_cpu_apicid) || (apicid == BAD_APICID))
846 if (!check_apicid_present(bit))
848 if (max_cpus <= cpus_weight(cpu_present_map))
850 /* Utterly temporary */
851 for (cpu = 0; cpu < NR_CPUS; cpu++)
852 if (per_cpu(x86_cpu_to_apicid, cpu) == apicid)
854 if (do_boot_cpu(apicid, cpu))
855 printk("CPU #%d not responding - cannot use it.\n",
862 * Cleanup possible dangling ends...
864 smpboot_restore_warm_reset_vector();
867 * Allow the user to impress friends.
869 Dprintk("Before bogomips.\n");
870 for_each_possible_cpu(cpu)
871 if (cpu_isset(cpu, cpu_callout_map))
872 bogosum += cpu_data(cpu).loops_per_jiffy;
874 "Total of %d processors activated (%lu.%02lu BogoMIPS).\n",
875 cpus_weight(cpu_present_map),
877 (bogosum/(5000/HZ))%100);
879 Dprintk("Before bogocount - setting activated=1.\n");
882 printk(KERN_WARNING "WARNING: SMP operation may be unreliable with B stepping processors.\n");
885 * Don't taint if we are running SMP kernel on a single non-MP
888 if (tainted & TAINT_UNSAFE_SMP) {
889 if (cpus_weight(cpu_present_map))
890 printk (KERN_INFO "WARNING: This combination of AMD processors is not suitable for SMP.\n");
892 tainted &= ~TAINT_UNSAFE_SMP;
895 Dprintk("Boot done.\n");
898 * construct cpu_sibling_map, so that we can tell sibling CPUs
901 for_each_possible_cpu(cpu) {
902 cpus_clear(per_cpu(cpu_sibling_map, cpu));
903 cpus_clear(per_cpu(cpu_core_map, cpu));
906 cpu_set(0, per_cpu(cpu_sibling_map, 0));
907 cpu_set(0, per_cpu(cpu_core_map, 0));
909 smpboot_setup_io_apic();
914 /* These are wrappers to interface to the new boot process. Someone
915 who understands all this stuff should rewrite it properly. --RR 15/Jul/02 */
916 void __init native_smp_prepare_cpus(unsigned int max_cpus)
918 smp_commenced_mask = cpumask_of_cpu(0);
919 cpu_callin_map = cpumask_of_cpu(0);
921 smp_boot_cpus(max_cpus);
924 void __init native_smp_prepare_boot_cpu(void)
926 unsigned int cpu = smp_processor_id();
931 cpu_set(cpu, cpu_online_map);
932 cpu_set(cpu, cpu_callout_map);
933 cpu_set(cpu, cpu_present_map);
934 cpu_set(cpu, cpu_possible_map);
935 __get_cpu_var(cpu_state) = CPU_ONLINE;
938 int __cpuinit native_cpu_up(unsigned int cpu)
940 int apicid = cpu_present_to_apicid(cpu);
943 WARN_ON(irqs_disabled());
945 Dprintk("++++++++++++++++++++=_---CPU UP %u\n", cpu);
947 if (apicid == BAD_APICID || apicid == boot_cpu_physical_apicid ||
948 !physid_isset(apicid, phys_cpu_present_map)) {
949 printk(KERN_ERR "%s: bad cpu %d\n", __func__, cpu);
953 per_cpu(cpu_state, cpu) = CPU_UP_PREPARE;
954 #ifdef CONFIG_HOTPLUG_CPU
957 * We do warm boot only on cpus that had booted earlier
958 * Otherwise cold boot is all handled from smp_boot_cpus().
959 * cpu_callin_map is set during AP kickstart process. Its reset
960 * when a cpu is taken offline from cpu_exit_clear().
962 if (!cpu_isset(cpu, cpu_callin_map))
963 __smp_prepare_cpu(cpu);
966 /* In case one didn't come up */
967 if (!cpu_isset(cpu, cpu_callin_map)) {
968 printk(KERN_DEBUG "skipping cpu%d, didn't come online\n", cpu);
972 /* Unleash the CPU! */
973 cpu_set(cpu, smp_commenced_mask);
976 * Check TSC synchronization with the AP (keep irqs disabled
979 local_irq_save(flags);
980 check_tsc_sync_source(cpu);
981 local_irq_restore(flags);
983 while (!cpu_isset(cpu, cpu_online_map)) {
985 touch_nmi_watchdog();
991 void __init native_smp_cpus_done(unsigned int max_cpus)
993 #ifdef CONFIG_X86_IO_APIC
999 void __init smp_intr_init(void)
1002 * IRQ0 must be given a fixed assignment and initialized,
1003 * because it's used before the IO-APIC is set up.
1005 set_intr_gate(FIRST_DEVICE_VECTOR, interrupt[0]);
1008 * The reschedule interrupt is a CPU-to-CPU reschedule-helper
1009 * IPI, driven by wakeup.
1011 set_intr_gate(RESCHEDULE_VECTOR, reschedule_interrupt);
1013 /* IPI for invalidation */
1014 set_intr_gate(INVALIDATE_TLB_VECTOR, invalidate_interrupt);
1016 /* IPI for generic function call */
1017 set_intr_gate(CALL_FUNCTION_VECTOR, call_function_interrupt);