2 * x86 SMP booting functions
4 * (c) 1995 Alan Cox, Building #3 <alan@redhat.com>
5 * (c) 1998, 1999, 2000 Ingo Molnar <mingo@redhat.com>
7 * Much of the core SMP work is based on previous work by Thomas Radke, to
8 * whom a great many thanks are extended.
10 * Thanks to Intel for making available several different Pentium,
11 * Pentium Pro and Pentium-II/Xeon MP machines.
12 * Original development of Linux SMP code supported by Caldera.
14 * This code is released under the GNU General Public License version 2 or
18 * Felix Koop : NR_CPUS used properly
19 * Jose Renau : Handle single CPU case.
20 * Alan Cox : By repeated request 8) - Total BogoMIPS report.
21 * Greg Wright : Fix for kernel stacks panic.
22 * Erich Boleyn : MP v1.4 and additional changes.
23 * Matthias Sattler : Changes for 2.1 kernel map.
24 * Michel Lespinasse : Changes for 2.1 kernel map.
25 * Michael Chastain : Change trampoline.S to gnu as.
26 * Alan Cox : Dumb bug: 'B' step PPro's are fine
27 * Ingo Molnar : Added APIC timers, based on code
29 * Ingo Molnar : various cleanups and rewrites
30 * Tigran Aivazian : fixed "0.00 in /proc/uptime on SMP" bug.
31 * Maciej W. Rozycki : Bits for genuine 82489DX APICs
32 * Martin J. Bligh : Added support for multi-quad systems
33 * Dave Jones : Report invalid combinations of Athlon CPUs.
34 * Rusty Russell : Hacked into shape for new "hotplug" boot process. */
36 #include <linux/module.h>
37 #include <linux/init.h>
38 #include <linux/kernel.h>
41 #include <linux/sched.h>
42 #include <linux/kernel_stat.h>
43 #include <linux/bootmem.h>
44 #include <linux/notifier.h>
45 #include <linux/cpu.h>
46 #include <linux/percpu.h>
47 #include <linux/nmi.h>
49 #include <linux/delay.h>
50 #include <linux/mc146818rtc.h>
51 #include <asm/tlbflush.h>
53 #include <asm/arch_hooks.h>
56 #include <mach_apic.h>
57 #include <mach_wakecpu.h>
58 #include <smpboot_hooks.h>
62 /* which logical CPU number maps to which CPU (physical APIC ID) */
63 u16 x86_cpu_to_apicid_init[NR_CPUS] __initdata =
64 { [0 ... NR_CPUS-1] = BAD_APICID };
65 void *x86_cpu_to_apicid_early_ptr;
66 DEFINE_PER_CPU(u16, x86_cpu_to_apicid) = BAD_APICID;
67 EXPORT_PER_CPU_SYMBOL(x86_cpu_to_apicid);
69 u16 x86_bios_cpu_apicid_init[NR_CPUS] __initdata
70 = { [0 ... NR_CPUS-1] = BAD_APICID };
71 void *x86_bios_cpu_apicid_early_ptr;
72 DEFINE_PER_CPU(u16, x86_bios_cpu_apicid) = BAD_APICID;
73 EXPORT_PER_CPU_SYMBOL(x86_bios_cpu_apicid);
75 u8 apicid_2_node[MAX_APICID];
77 extern void map_cpu_to_logical_apicid(void);
78 extern void unmap_cpu_to_logical_apicid(int cpu);
80 /* State of each CPU. */
81 DEFINE_PER_CPU(int, cpu_state) = { 0 };
83 /* Store all idle threads, this can be reused instead of creating
84 * a new thread. Also avoids complicated thread destroy functionality
87 #ifdef CONFIG_HOTPLUG_CPU
89 * Needed only for CONFIG_HOTPLUG_CPU because __cpuinitdata is
90 * removed after init for !CONFIG_HOTPLUG_CPU.
92 static DEFINE_PER_CPU(struct task_struct *, idle_thread_array);
93 #define get_idle_for_cpu(x) (per_cpu(idle_thread_array, x))
94 #define set_idle_for_cpu(x, p) (per_cpu(idle_thread_array, x) = (p))
96 struct task_struct *idle_thread_array[NR_CPUS] __cpuinitdata ;
97 #define get_idle_for_cpu(x) (idle_thread_array[(x)])
98 #define set_idle_for_cpu(x, p) (idle_thread_array[(x)] = (p))
101 static atomic_t init_deasserted;
103 static void __cpuinit smp_callin(void)
106 unsigned long timeout;
109 * If waken up by an INIT in an 82489DX configuration
110 * we may get here before an INIT-deassert IPI reaches
111 * our local APIC. We have to wait for the IPI or we'll
112 * lock up on an APIC access.
114 wait_for_init_deassert(&init_deasserted);
117 * (This works even if the APIC is not enabled.)
119 phys_id = GET_APIC_ID(apic_read(APIC_ID));
120 cpuid = smp_processor_id();
121 if (cpu_isset(cpuid, cpu_callin_map)) {
122 printk("huh, phys CPU#%d, CPU#%d already present??\n",
126 Dprintk("CPU#%d (phys ID: %d) waiting for CALLOUT\n", cpuid, phys_id);
129 * STARTUP IPIs are fragile beasts as they might sometimes
130 * trigger some glue motherboard logic. Complete APIC bus
131 * silence for 1 second, this overestimates the time the
132 * boot CPU is spending to send the up to 2 STARTUP IPIs
133 * by a factor of two. This should be enough.
137 * Waiting 2s total for startup (udelay is not yet working)
139 timeout = jiffies + 2*HZ;
140 while (time_before(jiffies, timeout)) {
142 * Has the boot CPU finished it's STARTUP sequence?
144 if (cpu_isset(cpuid, cpu_callout_map))
149 if (!time_before(jiffies, timeout)) {
150 printk("BUG: CPU%d started up but did not get a callout!\n",
156 * the boot CPU has finished the init stage and is spinning
157 * on callin_map until we finish. We are free to set up this
158 * CPU, first the APIC. (this is probably redundant on most
162 Dprintk("CALLIN, before setup_local_APIC().\n");
163 smp_callin_clear_local_apic();
165 end_local_APIC_setup();
166 map_cpu_to_logical_apicid();
174 Dprintk("Stack at about %p\n",&cpuid);
177 * Save our processor parameters
179 smp_store_cpu_info(cpuid);
182 * Allow the master to continue.
184 cpu_set(cpuid, cpu_callin_map);
188 * Activate a secondary processor.
190 static void __cpuinit start_secondary(void *unused)
193 * Don't put *anything* before cpu_init(), SMP booting is too
194 * fragile that we want to limit the things done here to the
195 * most necessary things.
204 /* otherwise gcc will move up smp_processor_id before the cpu_init */
207 * Check TSC synchronization with the BP:
209 check_tsc_sync_target();
211 if (nmi_watchdog == NMI_IO_APIC) {
212 disable_8259A_irq(0);
213 enable_NMI_through_LVT0();
217 /* This must be done before setting cpu_online_map */
218 set_cpu_sibling_map(raw_smp_processor_id());
222 * We need to hold call_lock, so there is no inconsistency
223 * between the time smp_call_function() determines number of
224 * IPI recipients, and the time when the determination is made
225 * for which cpus receive the IPI. Holding this
226 * lock helps us to not include this cpu in a currently in progress
227 * smp_call_function().
229 lock_ipi_call_lock();
230 cpu_set(smp_processor_id(), cpu_online_map);
231 unlock_ipi_call_lock();
232 per_cpu(cpu_state, smp_processor_id()) = CPU_ONLINE;
234 setup_secondary_clock();
241 * Everything has been set up for the secondary
242 * CPUs - they just need to reload everything
243 * from the task structure
244 * This function must not return.
246 void __devinit initialize_secondary(void)
249 * We don't actually need to load the full TSS,
250 * basically just the stack pointer and the ip.
257 :"m" (current->thread.sp),"m" (current->thread.ip));
260 /* Static state in head.S used to set up a CPU */
266 static inline void __inquire_remote_apic(int apicid)
268 unsigned i, regs[] = { APIC_ID >> 4, APIC_LVR >> 4, APIC_SPIV >> 4 };
269 char *names[] = { "ID", "VERSION", "SPIV" };
273 printk(KERN_INFO "Inquiring remote APIC #%d...\n", apicid);
275 for (i = 0; i < ARRAY_SIZE(regs); i++) {
276 printk(KERN_INFO "... APIC #%d %s: ", apicid, names[i]);
281 status = safe_apic_wait_icr_idle();
284 "a previous APIC delivery may have failed\n");
286 apic_write_around(APIC_ICR2, SET_APIC_DEST_FIELD(apicid));
287 apic_write_around(APIC_ICR, APIC_DM_REMRD | regs[i]);
292 status = apic_read(APIC_ICR) & APIC_ICR_RR_MASK;
293 } while (status == APIC_ICR_RR_INPROG && timeout++ < 1000);
296 case APIC_ICR_RR_VALID:
297 status = apic_read(APIC_RRR);
298 printk(KERN_CONT "%08x\n", status);
301 printk(KERN_CONT "failed\n");
306 #ifdef WAKE_SECONDARY_VIA_NMI
308 * Poke the other CPU in the eye via NMI to wake it up. Remember that the normal
309 * INIT, INIT, STARTUP sequence will reset the chip hard for us, and this
310 * won't ... remember to clear down the APIC, etc later.
313 wakeup_secondary_cpu(int logical_apicid, unsigned long start_eip)
315 unsigned long send_status, accept_status = 0;
319 apic_write_around(APIC_ICR2, SET_APIC_DEST_FIELD(logical_apicid));
321 /* Boot on the stack */
322 /* Kick the second */
323 apic_write_around(APIC_ICR, APIC_DM_NMI | APIC_DEST_LOGICAL);
325 Dprintk("Waiting for send to finish...\n");
326 send_status = safe_apic_wait_icr_idle();
329 * Give the other CPU some time to accept the IPI.
333 * Due to the Pentium erratum 3AP.
335 maxlvt = lapic_get_maxlvt();
337 apic_read_around(APIC_SPIV);
338 apic_write(APIC_ESR, 0);
340 accept_status = (apic_read(APIC_ESR) & 0xEF);
341 Dprintk("NMI sent.\n");
344 printk("APIC never delivered???\n");
346 printk("APIC delivery error (%lx).\n", accept_status);
348 return (send_status | accept_status);
350 #endif /* WAKE_SECONDARY_VIA_NMI */
352 #ifdef WAKE_SECONDARY_VIA_INIT
354 wakeup_secondary_cpu(int phys_apicid, unsigned long start_eip)
356 unsigned long send_status, accept_status = 0;
357 int maxlvt, num_starts, j;
360 * Be paranoid about clearing APIC errors.
362 if (APIC_INTEGRATED(apic_version[phys_apicid])) {
363 apic_read_around(APIC_SPIV);
364 apic_write(APIC_ESR, 0);
368 Dprintk("Asserting INIT.\n");
371 * Turn INIT on target chip
373 apic_write_around(APIC_ICR2, SET_APIC_DEST_FIELD(phys_apicid));
378 apic_write_around(APIC_ICR, APIC_INT_LEVELTRIG | APIC_INT_ASSERT
381 Dprintk("Waiting for send to finish...\n");
382 send_status = safe_apic_wait_icr_idle();
386 Dprintk("Deasserting INIT.\n");
389 apic_write_around(APIC_ICR2, SET_APIC_DEST_FIELD(phys_apicid));
392 apic_write_around(APIC_ICR, APIC_INT_LEVELTRIG | APIC_DM_INIT);
394 Dprintk("Waiting for send to finish...\n");
395 send_status = safe_apic_wait_icr_idle();
398 atomic_set(&init_deasserted, 1);
401 * Should we send STARTUP IPIs ?
403 * Determine this based on the APIC version.
404 * If we don't have an integrated APIC, don't send the STARTUP IPIs.
406 if (APIC_INTEGRATED(apic_version[phys_apicid]))
412 * Paravirt / VMI wants a startup IPI hook here to set up the
413 * target processor state.
415 startup_ipi_hook(phys_apicid, (unsigned long) start_secondary,
416 (unsigned long) stack_start.sp);
419 * Run STARTUP IPI loop.
421 Dprintk("#startup loops: %d.\n", num_starts);
423 maxlvt = lapic_get_maxlvt();
425 for (j = 1; j <= num_starts; j++) {
426 Dprintk("Sending STARTUP #%d.\n",j);
427 apic_read_around(APIC_SPIV);
428 apic_write(APIC_ESR, 0);
430 Dprintk("After apic_write.\n");
437 apic_write_around(APIC_ICR2, SET_APIC_DEST_FIELD(phys_apicid));
439 /* Boot on the stack */
440 /* Kick the second */
441 apic_write_around(APIC_ICR, APIC_DM_STARTUP
442 | (start_eip >> 12));
445 * Give the other CPU some time to accept the IPI.
449 Dprintk("Startup point 1.\n");
451 Dprintk("Waiting for send to finish...\n");
452 send_status = safe_apic_wait_icr_idle();
455 * Give the other CPU some time to accept the IPI.
459 * Due to the Pentium erratum 3AP.
462 apic_read_around(APIC_SPIV);
463 apic_write(APIC_ESR, 0);
465 accept_status = (apic_read(APIC_ESR) & 0xEF);
466 if (send_status || accept_status)
469 Dprintk("After Startup.\n");
472 printk("APIC never delivered???\n");
474 printk("APIC delivery error (%lx).\n", accept_status);
476 return (send_status | accept_status);
478 #endif /* WAKE_SECONDARY_VIA_INIT */
480 extern cpumask_t cpu_initialized;
483 struct work_struct work;
484 struct task_struct *idle;
485 struct completion done;
489 static void __cpuinit do_fork_idle(struct work_struct *work)
491 struct create_idle *c_idle =
492 container_of(work, struct create_idle, work);
494 c_idle->idle = fork_idle(c_idle->cpu);
495 complete(&c_idle->done);
497 static int __cpuinit do_boot_cpu(int apicid, int cpu)
499 * NOTE - on most systems this is a PHYSICAL apic ID, but on multiquad
500 * (ie clustered apic addressing mode), this is a LOGICAL apic ID.
501 * Returns zero if CPU booted OK, else error code from wakeup_secondary_cpu.
504 unsigned long boot_error = 0;
506 unsigned long start_eip;
507 unsigned short nmi_high = 0, nmi_low = 0;
508 struct create_idle c_idle = {
510 .done = COMPLETION_INITIALIZER_ONSTACK(c_idle.done),
512 INIT_WORK(&c_idle.work, do_fork_idle);
514 alternatives_smp_switch(1);
516 c_idle.idle = get_idle_for_cpu(cpu);
519 * We can't use kernel_thread since we must avoid to
520 * reschedule the child.
523 c_idle.idle->thread.sp = (unsigned long) (((struct pt_regs *)
524 (THREAD_SIZE + task_stack_page(c_idle.idle))) - 1);
525 init_idle(c_idle.idle, cpu);
529 if (!keventd_up() || current_is_keventd())
530 c_idle.work.func(&c_idle.work);
532 schedule_work(&c_idle.work);
533 wait_for_completion(&c_idle.done);
536 if (IS_ERR(c_idle.idle)) {
537 printk(KERN_ERR "failed fork for CPU %d\n", cpu);
538 return PTR_ERR(c_idle.idle);
541 set_idle_for_cpu(cpu, c_idle.idle);
543 per_cpu(current_task, cpu) = c_idle.idle;
545 early_gdt_descr.address = (unsigned long)get_cpu_gdt_table(cpu);
547 c_idle.idle->thread.ip = (unsigned long) start_secondary;
548 /* start_eip had better be page-aligned! */
549 start_eip = setup_trampoline();
551 /* So we see what's up */
552 printk("Booting processor %d/%d ip %lx\n", cpu, apicid, start_eip);
553 /* Stack for startup_32 can be just as for start_secondary onwards */
554 stack_start.sp = (void *) c_idle.idle->thread.sp;
559 * This grunge runs the startup process for
560 * the targeted processor.
563 atomic_set(&init_deasserted, 0);
565 Dprintk("Setting warm reset code and vector.\n");
567 store_NMI_vector(&nmi_high, &nmi_low);
569 smpboot_setup_warm_reset_vector(start_eip);
571 * Be paranoid about clearing APIC errors.
573 apic_write(APIC_ESR, 0);
578 * Starting actual IPI sequence...
580 boot_error = wakeup_secondary_cpu(apicid, start_eip);
584 * allow APs to start initializing.
586 Dprintk("Before Callout %d.\n", cpu);
587 cpu_set(cpu, cpu_callout_map);
588 Dprintk("After Callout %d.\n", cpu);
591 * Wait 5s total for a response
593 for (timeout = 0; timeout < 50000; timeout++) {
594 if (cpu_isset(cpu, cpu_callin_map))
595 break; /* It has booted */
599 if (cpu_isset(cpu, cpu_callin_map)) {
600 /* number CPUs logically, starting from 1 (BSP is 0) */
602 printk("CPU%d: ", cpu);
603 print_cpu_info(&cpu_data(cpu));
604 Dprintk("CPU has booted.\n");
607 if (*((volatile unsigned char *)trampoline_base)
609 /* trampoline started but...? */
610 printk("Stuck ??\n");
612 /* trampoline code not run */
613 printk("Not responding.\n");
614 inquire_remote_apic(apicid);
619 /* Try to put things back the way they were before ... */
620 unmap_cpu_to_logical_apicid(cpu);
621 cpu_clear(cpu, cpu_callout_map); /* was set here (do_boot_cpu()) */
622 cpu_clear(cpu, cpu_initialized); /* was set by cpu_init() */
623 cpu_clear(cpu, cpu_possible_map);
624 per_cpu(x86_cpu_to_apicid, cpu) = BAD_APICID;
627 /* mark "stuck" area as not stuck */
628 *((volatile unsigned long *)trampoline_base) = 0;
633 #ifdef CONFIG_HOTPLUG_CPU
634 void cpu_exit_clear(void)
636 int cpu = raw_smp_processor_id();
643 cpu_clear(cpu, cpu_callout_map);
644 cpu_clear(cpu, cpu_callin_map);
646 unmap_cpu_to_logical_apicid(cpu);
650 static int boot_cpu_logical_apicid;
651 /* Where the IO area was mapped on multiquad, always 0 otherwise */
653 #ifdef CONFIG_X86_NUMAQ
654 EXPORT_SYMBOL(xquad_portio);
657 static void __init disable_smp(void)
659 cpu_possible_map = cpumask_of_cpu(0);
660 cpu_present_map = cpumask_of_cpu(0);
661 smpboot_clear_io_apic_irqs();
662 phys_cpu_present_map = physid_mask_of_physid(0);
663 map_cpu_to_logical_apicid();
664 cpu_set(0, per_cpu(cpu_sibling_map, 0));
665 cpu_set(0, per_cpu(cpu_core_map, 0));
668 static int __init smp_sanity_check(unsigned max_cpus)
671 * If we couldn't find an SMP configuration at boot time,
672 * get out of here now!
674 if (!smp_found_config && !acpi_lapic) {
675 printk(KERN_NOTICE "SMP motherboard not detected.\n");
677 if (APIC_init_uniprocessor())
678 printk(KERN_NOTICE "Local APIC not detected."
679 " Using dummy APIC emulation.\n");
684 * Should not be necessary because the MP table should list the boot
685 * CPU too, but we do it for the sake of robustness anyway.
686 * Makes no sense to do this check in clustered apic mode, so skip it
688 if (!check_phys_apicid_present(boot_cpu_physical_apicid)) {
689 printk("weird, boot CPU (#%d) not listed by the BIOS.\n",
690 boot_cpu_physical_apicid);
691 physid_set(hard_smp_processor_id(), phys_cpu_present_map);
695 * If we couldn't find a local APIC, then get out of here now!
697 if (APIC_INTEGRATED(apic_version[boot_cpu_physical_apicid]) && !cpu_has_apic) {
698 printk(KERN_ERR "BIOS bug, local APIC #%d not detected!...\n",
699 boot_cpu_physical_apicid);
700 printk(KERN_ERR "... forcing use of dummy APIC emulation. (tell your hw vendor)\n");
707 * If SMP should be disabled, then really disable it!
710 smp_found_config = 0;
711 printk(KERN_INFO "SMP mode deactivated, forcing use of dummy APIC emulation.\n");
713 if (nmi_watchdog == NMI_LOCAL_APIC) {
714 printk(KERN_INFO "activating minimal APIC for NMI watchdog use.\n");
717 end_local_APIC_setup();
725 * Cycle through the processors sending APIC IPIs to boot each.
727 static void __init smp_boot_cpus(unsigned int max_cpus)
730 * Setup boot CPU information
732 smp_store_cpu_info(0); /* Final full version of the data */
733 printk(KERN_INFO "CPU%d: ", 0);
734 print_cpu_info(&cpu_data(0));
736 boot_cpu_physical_apicid = GET_APIC_ID(apic_read(APIC_ID));
737 boot_cpu_logical_apicid = logical_smp_processor_id();
739 current_thread_info()->cpu = 0;
741 set_cpu_sibling_map(0);
743 if (smp_sanity_check(max_cpus) < 0) {
744 printk(KERN_INFO "SMP disabled\n");
751 end_local_APIC_setup();
752 map_cpu_to_logical_apicid();
755 setup_portio_remap();
757 smpboot_setup_io_apic();
762 /* These are wrappers to interface to the new boot process. Someone
763 who understands all this stuff should rewrite it properly. --RR 15/Jul/02 */
764 void __init native_smp_prepare_cpus(unsigned int max_cpus)
766 nmi_watchdog_default();
767 cpu_callin_map = cpumask_of_cpu(0);
769 smp_boot_cpus(max_cpus);
772 void __init native_smp_prepare_boot_cpu(void)
774 unsigned int cpu = smp_processor_id();
779 cpu_set(cpu, cpu_callout_map);
780 __get_cpu_var(cpu_state) = CPU_ONLINE;
783 int __cpuinit native_cpu_up(unsigned int cpu)
785 int apicid = cpu_present_to_apicid(cpu);
789 WARN_ON(irqs_disabled());
791 Dprintk("++++++++++++++++++++=_---CPU UP %u\n", cpu);
793 if (apicid == BAD_APICID || apicid == boot_cpu_physical_apicid ||
794 !physid_isset(apicid, phys_cpu_present_map)) {
795 printk(KERN_ERR "%s: bad cpu %d\n", __func__, cpu);
800 * Already booted CPU?
802 if (cpu_isset(cpu, cpu_callin_map)) {
803 Dprintk("do_boot_cpu %d Already started\n", cpu);
808 * Save current MTRR state in case it was changed since early boot
809 * (e.g. by the ACPI SMI) to initialize new CPUs with MTRRs in sync:
813 per_cpu(cpu_state, cpu) = CPU_UP_PREPARE;
815 /* init low mem mapping */
816 clone_pgd_range(swapper_pg_dir, swapper_pg_dir + USER_PGD_PTRS,
817 min_t(unsigned long, KERNEL_PGD_PTRS, USER_PGD_PTRS));
820 err = do_boot_cpu(apicid, cpu);
822 Dprintk("do_boot_cpu failed %d\n", err);
827 * Check TSC synchronization with the AP (keep irqs disabled
830 local_irq_save(flags);
831 check_tsc_sync_source(cpu);
832 local_irq_restore(flags);
834 while (!cpu_isset(cpu, cpu_online_map)) {
836 touch_nmi_watchdog();
842 extern void impress_friends(void);
843 extern void smp_checks(void);
845 void __init native_smp_cpus_done(unsigned int max_cpus)
848 * Cleanup possible dangling ends...
850 smpboot_restore_warm_reset_vector();
852 Dprintk("Boot done.\n");
856 #ifdef CONFIG_X86_IO_APIC
859 check_nmi_watchdog();