2 * x86 SMP booting functions
4 * (c) 1995 Alan Cox, Building #3 <alan@redhat.com>
5 * (c) 1998, 1999, 2000 Ingo Molnar <mingo@redhat.com>
7 * Much of the core SMP work is based on previous work by Thomas Radke, to
8 * whom a great many thanks are extended.
10 * Thanks to Intel for making available several different Pentium,
11 * Pentium Pro and Pentium-II/Xeon MP machines.
12 * Original development of Linux SMP code supported by Caldera.
14 * This code is released under the GNU General Public License version 2 or
18 * Felix Koop : NR_CPUS used properly
19 * Jose Renau : Handle single CPU case.
20 * Alan Cox : By repeated request 8) - Total BogoMIPS report.
21 * Greg Wright : Fix for kernel stacks panic.
22 * Erich Boleyn : MP v1.4 and additional changes.
23 * Matthias Sattler : Changes for 2.1 kernel map.
24 * Michel Lespinasse : Changes for 2.1 kernel map.
25 * Michael Chastain : Change trampoline.S to gnu as.
26 * Alan Cox : Dumb bug: 'B' step PPro's are fine
27 * Ingo Molnar : Added APIC timers, based on code
29 * Ingo Molnar : various cleanups and rewrites
30 * Tigran Aivazian : fixed "0.00 in /proc/uptime on SMP" bug.
31 * Maciej W. Rozycki : Bits for genuine 82489DX APICs
32 * Martin J. Bligh : Added support for multi-quad systems
33 * Dave Jones : Report invalid combinations of Athlon CPUs.
34 * Rusty Russell : Hacked into shape for new "hotplug" boot process. */
36 #include <linux/module.h>
37 #include <linux/init.h>
38 #include <linux/kernel.h>
41 #include <linux/sched.h>
42 #include <linux/kernel_stat.h>
43 #include <linux/bootmem.h>
44 #include <linux/notifier.h>
45 #include <linux/cpu.h>
46 #include <linux/percpu.h>
47 #include <linux/nmi.h>
49 #include <linux/delay.h>
50 #include <linux/mc146818rtc.h>
51 #include <asm/tlbflush.h>
53 #include <asm/arch_hooks.h>
56 #include <mach_apic.h>
57 #include <mach_wakecpu.h>
58 #include <smpboot_hooks.h>
62 extern int smp_b_stepping;
64 static cpumask_t smp_commenced_mask;
66 /* which logical CPU number maps to which CPU (physical APIC ID) */
67 u16 x86_cpu_to_apicid_init[NR_CPUS] __initdata =
68 { [0 ... NR_CPUS-1] = BAD_APICID };
69 void *x86_cpu_to_apicid_early_ptr;
70 DEFINE_PER_CPU(u16, x86_cpu_to_apicid) = BAD_APICID;
71 EXPORT_PER_CPU_SYMBOL(x86_cpu_to_apicid);
73 u8 apicid_2_node[MAX_APICID];
75 static void map_cpu_to_logical_apicid(void);
77 /* State of each CPU. */
78 DEFINE_PER_CPU(int, cpu_state) = { 0 };
80 static atomic_t init_deasserted;
82 static void __cpuinit smp_callin(void)
85 unsigned long timeout;
88 * If waken up by an INIT in an 82489DX configuration
89 * we may get here before an INIT-deassert IPI reaches
90 * our local APIC. We have to wait for the IPI or we'll
91 * lock up on an APIC access.
93 wait_for_init_deassert(&init_deasserted);
96 * (This works even if the APIC is not enabled.)
98 phys_id = GET_APIC_ID(apic_read(APIC_ID));
99 cpuid = smp_processor_id();
100 if (cpu_isset(cpuid, cpu_callin_map)) {
101 printk("huh, phys CPU#%d, CPU#%d already present??\n",
105 Dprintk("CPU#%d (phys ID: %d) waiting for CALLOUT\n", cpuid, phys_id);
108 * STARTUP IPIs are fragile beasts as they might sometimes
109 * trigger some glue motherboard logic. Complete APIC bus
110 * silence for 1 second, this overestimates the time the
111 * boot CPU is spending to send the up to 2 STARTUP IPIs
112 * by a factor of two. This should be enough.
116 * Waiting 2s total for startup (udelay is not yet working)
118 timeout = jiffies + 2*HZ;
119 while (time_before(jiffies, timeout)) {
121 * Has the boot CPU finished it's STARTUP sequence?
123 if (cpu_isset(cpuid, cpu_callout_map))
128 if (!time_before(jiffies, timeout)) {
129 printk("BUG: CPU%d started up but did not get a callout!\n",
135 * the boot CPU has finished the init stage and is spinning
136 * on callin_map until we finish. We are free to set up this
137 * CPU, first the APIC. (this is probably redundant on most
141 Dprintk("CALLIN, before setup_local_APIC().\n");
142 smp_callin_clear_local_apic();
144 map_cpu_to_logical_apicid();
150 Dprintk("Stack at about %p\n",&cpuid);
153 * Save our processor parameters
155 smp_store_cpu_info(cpuid);
158 * Allow the master to continue.
160 cpu_set(cpuid, cpu_callin_map);
166 * Activate a secondary processor.
168 static void __cpuinit start_secondary(void *unused)
171 * Don't put *anything* before cpu_init(), SMP booting is too
172 * fragile that we want to limit the things done here to the
173 * most necessary things.
181 while (!cpu_isset(smp_processor_id(), smp_commenced_mask))
184 * Check TSC synchronization with the BP:
186 check_tsc_sync_target();
188 setup_secondary_clock();
189 if (nmi_watchdog == NMI_IO_APIC) {
190 disable_8259A_irq(0);
191 enable_NMI_through_LVT0();
195 * low-memory mappings have been cleared, flush them from
196 * the local TLBs too.
200 /* This must be done before setting cpu_online_map */
201 set_cpu_sibling_map(raw_smp_processor_id());
205 * We need to hold call_lock, so there is no inconsistency
206 * between the time smp_call_function() determines number of
207 * IPI recipients, and the time when the determination is made
208 * for which cpus receive the IPI. Holding this
209 * lock helps us to not include this cpu in a currently in progress
210 * smp_call_function().
212 lock_ipi_call_lock();
213 cpu_set(smp_processor_id(), cpu_online_map);
214 unlock_ipi_call_lock();
215 per_cpu(cpu_state, smp_processor_id()) = CPU_ONLINE;
217 /* We can take interrupts now: we're officially "up". */
225 * Everything has been set up for the secondary
226 * CPUs - they just need to reload everything
227 * from the task structure
228 * This function must not return.
230 void __devinit initialize_secondary(void)
233 * We don't actually need to load the full TSS,
234 * basically just the stack pointer and the ip.
241 :"m" (current->thread.sp),"m" (current->thread.ip));
244 /* Static state in head.S used to set up a CPU */
252 /* which logical CPUs are on which nodes */
253 cpumask_t node_to_cpumask_map[MAX_NUMNODES] __read_mostly =
254 { [0 ... MAX_NUMNODES-1] = CPU_MASK_NONE };
255 EXPORT_SYMBOL(node_to_cpumask_map);
256 /* which node each logical CPU is on */
257 int cpu_to_node_map[NR_CPUS] __read_mostly = { [0 ... NR_CPUS-1] = 0 };
258 EXPORT_SYMBOL(cpu_to_node_map);
260 /* set up a mapping between cpu and node. */
261 static inline void map_cpu_to_node(int cpu, int node)
263 printk("Mapping cpu %d to node %d\n", cpu, node);
264 cpu_set(cpu, node_to_cpumask_map[node]);
265 cpu_to_node_map[cpu] = node;
268 /* undo a mapping between cpu and node. */
269 static inline void unmap_cpu_to_node(int cpu)
273 printk("Unmapping cpu %d from all nodes\n", cpu);
274 for (node = 0; node < MAX_NUMNODES; node ++)
275 cpu_clear(cpu, node_to_cpumask_map[node]);
276 cpu_to_node_map[cpu] = 0;
278 #else /* !CONFIG_NUMA */
280 #define map_cpu_to_node(cpu, node) ({})
281 #define unmap_cpu_to_node(cpu) ({})
283 #endif /* CONFIG_NUMA */
285 u8 cpu_2_logical_apicid[NR_CPUS] __read_mostly = { [0 ... NR_CPUS-1] = BAD_APICID };
287 static void map_cpu_to_logical_apicid(void)
289 int cpu = smp_processor_id();
290 int apicid = logical_smp_processor_id();
291 int node = apicid_to_node(apicid);
293 if (!node_online(node))
294 node = first_online_node;
296 cpu_2_logical_apicid[cpu] = apicid;
297 map_cpu_to_node(cpu, node);
300 static void unmap_cpu_to_logical_apicid(int cpu)
302 cpu_2_logical_apicid[cpu] = BAD_APICID;
303 unmap_cpu_to_node(cpu);
306 static inline void __inquire_remote_apic(int apicid)
308 unsigned i, regs[] = { APIC_ID >> 4, APIC_LVR >> 4, APIC_SPIV >> 4 };
309 char *names[] = { "ID", "VERSION", "SPIV" };
313 printk(KERN_INFO "Inquiring remote APIC #%d...\n", apicid);
315 for (i = 0; i < ARRAY_SIZE(regs); i++) {
316 printk(KERN_INFO "... APIC #%d %s: ", apicid, names[i]);
321 status = safe_apic_wait_icr_idle();
324 "a previous APIC delivery may have failed\n");
326 apic_write_around(APIC_ICR2, SET_APIC_DEST_FIELD(apicid));
327 apic_write_around(APIC_ICR, APIC_DM_REMRD | regs[i]);
332 status = apic_read(APIC_ICR) & APIC_ICR_RR_MASK;
333 } while (status == APIC_ICR_RR_INPROG && timeout++ < 1000);
336 case APIC_ICR_RR_VALID:
337 status = apic_read(APIC_RRR);
338 printk(KERN_CONT "%08x\n", status);
341 printk(KERN_CONT "failed\n");
346 #ifdef WAKE_SECONDARY_VIA_NMI
348 * Poke the other CPU in the eye via NMI to wake it up. Remember that the normal
349 * INIT, INIT, STARTUP sequence will reset the chip hard for us, and this
350 * won't ... remember to clear down the APIC, etc later.
353 wakeup_secondary_cpu(int logical_apicid, unsigned long start_eip)
355 unsigned long send_status, accept_status = 0;
359 apic_write_around(APIC_ICR2, SET_APIC_DEST_FIELD(logical_apicid));
361 /* Boot on the stack */
362 /* Kick the second */
363 apic_write_around(APIC_ICR, APIC_DM_NMI | APIC_DEST_LOGICAL);
365 Dprintk("Waiting for send to finish...\n");
366 send_status = safe_apic_wait_icr_idle();
369 * Give the other CPU some time to accept the IPI.
373 * Due to the Pentium erratum 3AP.
375 maxlvt = lapic_get_maxlvt();
377 apic_read_around(APIC_SPIV);
378 apic_write(APIC_ESR, 0);
380 accept_status = (apic_read(APIC_ESR) & 0xEF);
381 Dprintk("NMI sent.\n");
384 printk("APIC never delivered???\n");
386 printk("APIC delivery error (%lx).\n", accept_status);
388 return (send_status | accept_status);
390 #endif /* WAKE_SECONDARY_VIA_NMI */
392 #ifdef WAKE_SECONDARY_VIA_INIT
394 wakeup_secondary_cpu(int phys_apicid, unsigned long start_eip)
396 unsigned long send_status, accept_status = 0;
397 int maxlvt, num_starts, j;
400 * Be paranoid about clearing APIC errors.
402 if (APIC_INTEGRATED(apic_version[phys_apicid])) {
403 apic_read_around(APIC_SPIV);
404 apic_write(APIC_ESR, 0);
408 Dprintk("Asserting INIT.\n");
411 * Turn INIT on target chip
413 apic_write_around(APIC_ICR2, SET_APIC_DEST_FIELD(phys_apicid));
418 apic_write_around(APIC_ICR, APIC_INT_LEVELTRIG | APIC_INT_ASSERT
421 Dprintk("Waiting for send to finish...\n");
422 send_status = safe_apic_wait_icr_idle();
426 Dprintk("Deasserting INIT.\n");
429 apic_write_around(APIC_ICR2, SET_APIC_DEST_FIELD(phys_apicid));
432 apic_write_around(APIC_ICR, APIC_INT_LEVELTRIG | APIC_DM_INIT);
434 Dprintk("Waiting for send to finish...\n");
435 send_status = safe_apic_wait_icr_idle();
437 atomic_set(&init_deasserted, 1);
440 * Should we send STARTUP IPIs ?
442 * Determine this based on the APIC version.
443 * If we don't have an integrated APIC, don't send the STARTUP IPIs.
445 if (APIC_INTEGRATED(apic_version[phys_apicid]))
451 * Paravirt / VMI wants a startup IPI hook here to set up the
452 * target processor state.
454 startup_ipi_hook(phys_apicid, (unsigned long) start_secondary,
455 (unsigned long) stack_start.sp);
458 * Run STARTUP IPI loop.
460 Dprintk("#startup loops: %d.\n", num_starts);
462 maxlvt = lapic_get_maxlvt();
464 for (j = 1; j <= num_starts; j++) {
465 Dprintk("Sending STARTUP #%d.\n",j);
466 apic_read_around(APIC_SPIV);
467 apic_write(APIC_ESR, 0);
469 Dprintk("After apic_write.\n");
476 apic_write_around(APIC_ICR2, SET_APIC_DEST_FIELD(phys_apicid));
478 /* Boot on the stack */
479 /* Kick the second */
480 apic_write_around(APIC_ICR, APIC_DM_STARTUP
481 | (start_eip >> 12));
484 * Give the other CPU some time to accept the IPI.
488 Dprintk("Startup point 1.\n");
490 Dprintk("Waiting for send to finish...\n");
491 send_status = safe_apic_wait_icr_idle();
494 * Give the other CPU some time to accept the IPI.
498 * Due to the Pentium erratum 3AP.
501 apic_read_around(APIC_SPIV);
502 apic_write(APIC_ESR, 0);
504 accept_status = (apic_read(APIC_ESR) & 0xEF);
505 if (send_status || accept_status)
508 Dprintk("After Startup.\n");
511 printk("APIC never delivered???\n");
513 printk("APIC delivery error (%lx).\n", accept_status);
515 return (send_status | accept_status);
517 #endif /* WAKE_SECONDARY_VIA_INIT */
519 extern cpumask_t cpu_initialized;
520 static inline int alloc_cpu_id(void)
524 cpus_complement(tmp_map, cpu_present_map);
525 cpu = first_cpu(tmp_map);
531 #ifdef CONFIG_HOTPLUG_CPU
532 static struct task_struct * __cpuinitdata cpu_idle_tasks[NR_CPUS];
533 static inline struct task_struct * __cpuinit alloc_idle_task(int cpu)
535 struct task_struct *idle;
537 if ((idle = cpu_idle_tasks[cpu]) != NULL) {
538 /* initialize thread_struct. we really want to avoid destroy
541 idle->thread.sp = (unsigned long)task_pt_regs(idle);
542 init_idle(idle, cpu);
545 idle = fork_idle(cpu);
548 cpu_idle_tasks[cpu] = idle;
552 #define alloc_idle_task(cpu) fork_idle(cpu)
555 static int __cpuinit do_boot_cpu(int apicid, int cpu)
557 * NOTE - on most systems this is a PHYSICAL apic ID, but on multiquad
558 * (ie clustered apic addressing mode), this is a LOGICAL apic ID.
559 * Returns zero if CPU booted OK, else error code from wakeup_secondary_cpu.
562 struct task_struct *idle;
563 unsigned long boot_error;
565 unsigned long start_eip;
566 unsigned short nmi_high = 0, nmi_low = 0;
569 * Save current MTRR state in case it was changed since early boot
570 * (e.g. by the ACPI SMI) to initialize new CPUs with MTRRs in sync:
575 * We can't use kernel_thread since we must avoid to
576 * reschedule the child.
578 idle = alloc_idle_task(cpu);
580 panic("failed fork for CPU %d", cpu);
583 per_cpu(current_task, cpu) = idle;
584 early_gdt_descr.address = (unsigned long)get_cpu_gdt_table(cpu);
586 idle->thread.ip = (unsigned long) start_secondary;
587 /* start_eip had better be page-aligned! */
588 start_eip = setup_trampoline();
591 alternatives_smp_switch(1);
593 /* So we see what's up */
594 printk("Booting processor %d/%d ip %lx\n", cpu, apicid, start_eip);
595 /* Stack for startup_32 can be just as for start_secondary onwards */
596 stack_start.sp = (void *) idle->thread.sp;
600 per_cpu(x86_cpu_to_apicid, cpu) = apicid;
602 * This grunge runs the startup process for
603 * the targeted processor.
606 atomic_set(&init_deasserted, 0);
608 Dprintk("Setting warm reset code and vector.\n");
610 store_NMI_vector(&nmi_high, &nmi_low);
612 smpboot_setup_warm_reset_vector(start_eip);
615 * Starting actual IPI sequence...
617 boot_error = wakeup_secondary_cpu(apicid, start_eip);
621 * allow APs to start initializing.
623 Dprintk("Before Callout %d.\n", cpu);
624 cpu_set(cpu, cpu_callout_map);
625 Dprintk("After Callout %d.\n", cpu);
628 * Wait 5s total for a response
630 for (timeout = 0; timeout < 50000; timeout++) {
631 if (cpu_isset(cpu, cpu_callin_map))
632 break; /* It has booted */
636 if (cpu_isset(cpu, cpu_callin_map)) {
637 /* number CPUs logically, starting from 1 (BSP is 0) */
639 printk("CPU%d: ", cpu);
640 print_cpu_info(&cpu_data(cpu));
641 Dprintk("CPU has booted.\n");
644 if (*((volatile unsigned char *)trampoline_base)
646 /* trampoline started but...? */
647 printk("Stuck ??\n");
649 /* trampoline code not run */
650 printk("Not responding.\n");
651 inquire_remote_apic(apicid);
656 /* Try to put things back the way they were before ... */
657 unmap_cpu_to_logical_apicid(cpu);
658 cpu_clear(cpu, cpu_callout_map); /* was set here (do_boot_cpu()) */
659 cpu_clear(cpu, cpu_initialized); /* was set by cpu_init() */
662 per_cpu(x86_cpu_to_apicid, cpu) = apicid;
663 cpu_set(cpu, cpu_present_map);
666 /* mark "stuck" area as not stuck */
667 *((volatile unsigned long *)trampoline_base) = 0;
672 #ifdef CONFIG_HOTPLUG_CPU
673 void cpu_exit_clear(void)
675 int cpu = raw_smp_processor_id();
683 cpu_clear(cpu, cpu_callout_map);
684 cpu_clear(cpu, cpu_callin_map);
686 cpu_clear(cpu, smp_commenced_mask);
687 unmap_cpu_to_logical_apicid(cpu);
690 struct warm_boot_cpu_info {
691 struct completion *complete;
692 struct work_struct task;
697 static void __cpuinit do_warm_boot_cpu(struct work_struct *work)
699 struct warm_boot_cpu_info *info =
700 container_of(work, struct warm_boot_cpu_info, task);
701 do_boot_cpu(info->apicid, info->cpu);
702 complete(info->complete);
705 static int __cpuinit __smp_prepare_cpu(int cpu)
707 DECLARE_COMPLETION_ONSTACK(done);
708 struct warm_boot_cpu_info info;
711 apicid = per_cpu(x86_cpu_to_apicid, cpu);
712 if (apicid == BAD_APICID) {
717 info.complete = &done;
718 info.apicid = apicid;
720 INIT_WORK(&info.task, do_warm_boot_cpu);
722 /* init low mem mapping */
723 clone_pgd_range(swapper_pg_dir, swapper_pg_dir + USER_PGD_PTRS,
724 min_t(unsigned long, KERNEL_PGD_PTRS, USER_PGD_PTRS));
726 schedule_work(&info.task);
727 wait_for_completion(&done);
737 * Cycle through the processors sending APIC IPIs to boot each.
740 static int boot_cpu_logical_apicid;
741 /* Where the IO area was mapped on multiquad, always 0 otherwise */
743 #ifdef CONFIG_X86_NUMAQ
744 EXPORT_SYMBOL(xquad_portio);
747 static void __init smp_boot_cpus(unsigned int max_cpus)
749 int apicid, cpu, bit, kicked;
750 unsigned long bogosum = 0;
753 * Setup boot CPU information
755 smp_store_cpu_info(0); /* Final full version of the data */
756 printk("CPU%d: ", 0);
757 print_cpu_info(&cpu_data(0));
759 boot_cpu_physical_apicid = GET_APIC_ID(apic_read(APIC_ID));
760 boot_cpu_logical_apicid = logical_smp_processor_id();
761 per_cpu(x86_cpu_to_apicid, 0) = boot_cpu_physical_apicid;
763 current_thread_info()->cpu = 0;
765 set_cpu_sibling_map(0);
768 * If we couldn't find an SMP configuration at boot time,
769 * get out of here now!
771 if (!smp_found_config && !acpi_lapic) {
772 printk(KERN_NOTICE "SMP motherboard not detected.\n");
773 smpboot_clear_io_apic_irqs();
774 phys_cpu_present_map = physid_mask_of_physid(0);
775 if (APIC_init_uniprocessor())
776 printk(KERN_NOTICE "Local APIC not detected."
777 " Using dummy APIC emulation.\n");
778 map_cpu_to_logical_apicid();
779 cpu_set(0, per_cpu(cpu_sibling_map, 0));
780 cpu_set(0, per_cpu(cpu_core_map, 0));
785 * Should not be necessary because the MP table should list the boot
786 * CPU too, but we do it for the sake of robustness anyway.
787 * Makes no sense to do this check in clustered apic mode, so skip it
789 if (!check_phys_apicid_present(boot_cpu_physical_apicid)) {
790 printk("weird, boot CPU (#%d) not listed by the BIOS.\n",
791 boot_cpu_physical_apicid);
792 physid_set(hard_smp_processor_id(), phys_cpu_present_map);
796 * If we couldn't find a local APIC, then get out of here now!
798 if (APIC_INTEGRATED(apic_version[boot_cpu_physical_apicid]) && !cpu_has_apic) {
799 printk(KERN_ERR "BIOS bug, local APIC #%d not detected!...\n",
800 boot_cpu_physical_apicid);
801 printk(KERN_ERR "... forcing use of dummy APIC emulation. (tell your hw vendor)\n");
802 smpboot_clear_io_apic_irqs();
803 phys_cpu_present_map = physid_mask_of_physid(0);
804 map_cpu_to_logical_apicid();
805 cpu_set(0, per_cpu(cpu_sibling_map, 0));
806 cpu_set(0, per_cpu(cpu_core_map, 0));
813 * If SMP should be disabled, then really disable it!
816 smp_found_config = 0;
817 printk(KERN_INFO "SMP mode deactivated, forcing use of dummy APIC emulation.\n");
819 if (nmi_watchdog == NMI_LOCAL_APIC) {
820 printk(KERN_INFO "activating minimal APIC for NMI watchdog use.\n");
824 smpboot_clear_io_apic_irqs();
825 phys_cpu_present_map = physid_mask_of_physid(0);
826 map_cpu_to_logical_apicid();
827 cpu_set(0, per_cpu(cpu_sibling_map, 0));
828 cpu_set(0, per_cpu(cpu_core_map, 0));
834 map_cpu_to_logical_apicid();
837 setup_portio_remap();
840 * Scan the CPU present map and fire up the other CPUs via do_boot_cpu
842 * In clustered apic mode, phys_cpu_present_map is a constructed thus:
843 * bits 0-3 are quad0, 4-7 are quad1, etc. A perverse twist on the
846 Dprintk("CPU present map: %lx\n", physids_coerce(phys_cpu_present_map));
849 for (bit = 0; kicked < NR_CPUS && bit < MAX_APICS; bit++) {
850 apicid = cpu_present_to_apicid(bit);
852 * Don't even attempt to start the boot CPU!
854 if ((apicid == boot_cpu_apicid) || (apicid == BAD_APICID))
857 if (!check_apicid_present(bit))
859 if (max_cpus <= cpucount+1)
862 if (((cpu = alloc_cpu_id()) <= 0) || do_boot_cpu(apicid, cpu))
863 printk("CPU #%d not responding - cannot use it.\n",
870 * Cleanup possible dangling ends...
872 smpboot_restore_warm_reset_vector();
875 * Allow the user to impress friends.
877 Dprintk("Before bogomips.\n");
878 for_each_possible_cpu(cpu)
879 if (cpu_isset(cpu, cpu_callout_map))
880 bogosum += cpu_data(cpu).loops_per_jiffy;
882 "Total of %d processors activated (%lu.%02lu BogoMIPS).\n",
885 (bogosum/(5000/HZ))%100);
887 Dprintk("Before bogocount - setting activated=1.\n");
890 printk(KERN_WARNING "WARNING: SMP operation may be unreliable with B stepping processors.\n");
893 * Don't taint if we are running SMP kernel on a single non-MP
896 if (tainted & TAINT_UNSAFE_SMP) {
898 printk (KERN_INFO "WARNING: This combination of AMD processors is not suitable for SMP.\n");
900 tainted &= ~TAINT_UNSAFE_SMP;
903 Dprintk("Boot done.\n");
906 * construct cpu_sibling_map, so that we can tell sibling CPUs
909 for_each_possible_cpu(cpu) {
910 cpus_clear(per_cpu(cpu_sibling_map, cpu));
911 cpus_clear(per_cpu(cpu_core_map, cpu));
914 cpu_set(0, per_cpu(cpu_sibling_map, 0));
915 cpu_set(0, per_cpu(cpu_core_map, 0));
917 smpboot_setup_io_apic();
922 /* These are wrappers to interface to the new boot process. Someone
923 who understands all this stuff should rewrite it properly. --RR 15/Jul/02 */
924 void __init native_smp_prepare_cpus(unsigned int max_cpus)
926 smp_commenced_mask = cpumask_of_cpu(0);
927 cpu_callin_map = cpumask_of_cpu(0);
929 smp_boot_cpus(max_cpus);
932 void __init native_smp_prepare_boot_cpu(void)
934 unsigned int cpu = smp_processor_id();
939 cpu_set(cpu, cpu_online_map);
940 cpu_set(cpu, cpu_callout_map);
941 cpu_set(cpu, cpu_present_map);
942 cpu_set(cpu, cpu_possible_map);
943 __get_cpu_var(cpu_state) = CPU_ONLINE;
946 int __cpuinit native_cpu_up(unsigned int cpu)
949 #ifdef CONFIG_HOTPLUG_CPU
953 * We do warm boot only on cpus that had booted earlier
954 * Otherwise cold boot is all handled from smp_boot_cpus().
955 * cpu_callin_map is set during AP kickstart process. Its reset
956 * when a cpu is taken offline from cpu_exit_clear().
958 if (!cpu_isset(cpu, cpu_callin_map))
959 ret = __smp_prepare_cpu(cpu);
965 /* In case one didn't come up */
966 if (!cpu_isset(cpu, cpu_callin_map)) {
967 printk(KERN_DEBUG "skipping cpu%d, didn't come online\n", cpu);
971 per_cpu(cpu_state, cpu) = CPU_UP_PREPARE;
972 /* Unleash the CPU! */
973 cpu_set(cpu, smp_commenced_mask);
976 * Check TSC synchronization with the AP (keep irqs disabled
979 local_irq_save(flags);
980 check_tsc_sync_source(cpu);
981 local_irq_restore(flags);
983 while (!cpu_isset(cpu, cpu_online_map)) {
985 touch_nmi_watchdog();
991 void __init native_smp_cpus_done(unsigned int max_cpus)
993 #ifdef CONFIG_X86_IO_APIC
999 void __init smp_intr_init(void)
1002 * IRQ0 must be given a fixed assignment and initialized,
1003 * because it's used before the IO-APIC is set up.
1005 set_intr_gate(FIRST_DEVICE_VECTOR, interrupt[0]);
1008 * The reschedule interrupt is a CPU-to-CPU reschedule-helper
1009 * IPI, driven by wakeup.
1011 set_intr_gate(RESCHEDULE_VECTOR, reschedule_interrupt);
1013 /* IPI for invalidation */
1014 set_intr_gate(INVALIDATE_TLB_VECTOR, invalidate_interrupt);
1016 /* IPI for generic function call */
1017 set_intr_gate(CALL_FUNCTION_VECTOR, call_function_interrupt);