2 * Intel SMP support routines.
4 * (c) 1995 Alan Cox, Building #3 <alan@redhat.com>
5 * (c) 1998-99, 2000 Ingo Molnar <mingo@redhat.com>
6 * (c) 2002,2003 Andi Kleen, SuSE Labs.
8 * i386 and x86_64 integration by Glauber Costa <gcosta@redhat.com>
10 * This code is released under the GNU General Public License version 2 or
14 #include <linux/init.h>
17 #include <linux/delay.h>
18 #include <linux/spinlock.h>
19 #include <linux/kernel_stat.h>
20 #include <linux/mc146818rtc.h>
21 #include <linux/cache.h>
22 #include <linux/interrupt.h>
23 #include <linux/cpu.h>
26 #include <asm/tlbflush.h>
27 #include <asm/mmu_context.h>
28 #include <asm/proto.h>
30 #include <mach_apic.h>
33 #include <asm/mach_apic.h>
36 * Some notes on x86 processor bugs affecting SMP operation:
38 * Pentium, Pentium Pro, II, III (and all CPUs) have bugs.
39 * The Linux implications for SMP are handled as follows:
41 * Pentium III / [Xeon]
42 * None of the E1AP-E3AP errata are visible to the user.
49 * None of the A1AP-A3AP errata are visible to the user.
56 * None of 1AP-9AP errata are visible to the normal user,
57 * except occasional delivery of 'spurious interrupt' as trap #15.
58 * This is very rare and a non-problem.
60 * 1AP. Linux maps APIC as non-cacheable
61 * 2AP. worked around in hardware
62 * 3AP. fixed in C0 and above steppings microcode update.
63 * Linux does not use excessive STARTUP_IPIs.
64 * 4AP. worked around in hardware
65 * 5AP. symmetric IO mode (normal Linux operation) not affected.
66 * 'noapic' mode has vector 0xf filled out properly.
67 * 6AP. 'noapic' mode might be affected - fixed in later steppings
68 * 7AP. We do not assume writes to the LVT deassering IRQs
69 * 8AP. We do not enable low power mode (deep sleep) during MP bootup
70 * 9AP. We do not use mixed mode
73 * There is a marginal case where REP MOVS on 100MHz SMP
74 * machines with B stepping processors can fail. XXX should provide
75 * an L1cache=Writethrough or L1cache=off option.
77 * B stepping CPUs may hang. There are hardware work arounds
78 * for this. We warn about it in case your board doesn't have the work
79 * arounds. Basically that's so I can tell anyone with a B stepping
80 * CPU and SMP problems "tough".
82 * Specific items [From Pentium Processor Specification Update]
84 * 1AP. Linux doesn't use remote read
85 * 2AP. Linux doesn't trust APIC errors
86 * 3AP. We work around this
87 * 4AP. Linux never generated 3 interrupts of the same priority
88 * to cause a lost local interrupt.
89 * 5AP. Remote read is never used
90 * 6AP. not affected - worked around in hardware
91 * 7AP. not affected - worked around in hardware
92 * 8AP. worked around in hardware - we get explicit CS errors if not
93 * 9AP. only 'noapic' mode affected. Might generate spurious
94 * interrupts, we log only the first one and count the
96 * 10AP. not affected - worked around in hardware
97 * 11AP. Linux reads the APIC between writes to avoid this, as per
98 * the documentation. Make sure you preserve this as it affects
99 * the C stepping chips too.
100 * 12AP. not affected - worked around in hardware
101 * 13AP. not affected - worked around in hardware
102 * 14AP. we always deassert INIT during bootup
103 * 15AP. not affected - worked around in hardware
104 * 16AP. not affected - worked around in hardware
105 * 17AP. not affected - worked around in hardware
106 * 18AP. not affected - worked around in hardware
107 * 19AP. not affected - worked around in BIOS
109 * If this sounds worrying believe me these bugs are either ___RARE___,
110 * or are signal timing bugs worked around in hardware and there's
111 * about nothing of note with C stepping upwards.
115 * this function sends a 'reschedule' IPI to another CPU.
116 * it goes straight through and wastes no time serializing
117 * anything. Worst case is that we lose a reschedule ...
119 static void native_smp_send_reschedule(int cpu)
121 WARN_ON(cpu_is_offline(cpu));
122 send_IPI_mask(cpumask_of_cpu(cpu), RESCHEDULE_VECTOR);
126 * Structure and data for smp_call_function(). This is designed to minimise
127 * static memory requirements. It also looks cleaner.
129 static DEFINE_SPINLOCK(call_lock);
131 struct call_data_struct {
132 void (*func) (void *info);
139 void lock_ipi_call_lock(void)
141 spin_lock_irq(&call_lock);
144 void unlock_ipi_call_lock(void)
146 spin_unlock_irq(&call_lock);
149 static struct call_data_struct *call_data;
151 static void __smp_call_function(void (*func) (void *info), void *info,
152 int nonatomic, int wait)
154 struct call_data_struct data;
155 int cpus = num_online_cpus() - 1;
162 atomic_set(&data.started, 0);
165 atomic_set(&data.finished, 0);
170 /* Send a message to all other CPUs and wait for them to respond */
171 send_IPI_allbutself(CALL_FUNCTION_VECTOR);
173 /* Wait for response */
174 while (atomic_read(&data.started) != cpus)
178 while (atomic_read(&data.finished) != cpus)
184 * smp_call_function_mask(): Run a function on a set of other CPUs.
185 * @mask: The set of cpus to run on. Must not include the current cpu.
186 * @func: The function to run. This must be fast and non-blocking.
187 * @info: An arbitrary pointer to pass to the function.
188 * @wait: If true, wait (atomically) until function has completed on other CPUs.
190 * Returns 0 on success, else a negative status code.
192 * If @wait is true, then returns once @func has returned; otherwise
193 * it returns just before the target cpu calls @func.
195 * You must not call this function with disabled interrupts or from a
196 * hardware interrupt handler or from a bottom half handler.
199 native_smp_call_function_mask(cpumask_t mask,
200 void (*func)(void *), void *info,
203 struct call_data_struct data;
204 cpumask_t allbutself;
207 /* Can deadlock when called with interrupts disabled */
208 WARN_ON(irqs_disabled());
210 /* Holding any lock stops cpus from going down. */
211 spin_lock(&call_lock);
213 allbutself = cpu_online_map;
214 cpu_clear(smp_processor_id(), allbutself);
216 cpus_and(mask, mask, allbutself);
217 cpus = cpus_weight(mask);
220 spin_unlock(&call_lock);
226 atomic_set(&data.started, 0);
229 atomic_set(&data.finished, 0);
234 /* Send a message to other CPUs */
235 if (cpus_equal(mask, allbutself))
236 send_IPI_allbutself(CALL_FUNCTION_VECTOR);
238 send_IPI_mask(mask, CALL_FUNCTION_VECTOR);
240 /* Wait for response */
241 while (atomic_read(&data.started) != cpus)
245 while (atomic_read(&data.finished) != cpus)
247 spin_unlock(&call_lock);
252 static void stop_this_cpu(void *dummy)
258 cpu_clear(smp_processor_id(), cpu_online_map);
259 disable_local_APIC();
260 if (hlt_works(smp_processor_id()))
266 * this function calls the 'stop' function on all other CPUs in the system.
269 static void native_smp_send_stop(void)
277 /* Don't deadlock on the call lock in panic */
278 nolock = !spin_trylock(&call_lock);
279 local_irq_save(flags);
280 __smp_call_function(stop_this_cpu, NULL, 0, 0);
282 spin_unlock(&call_lock);
283 disable_local_APIC();
284 local_irq_restore(flags);
288 * Reschedule call back. Nothing to do,
289 * all the work is done automatically when
290 * we return from the interrupt.
292 void smp_reschedule_interrupt(struct pt_regs *regs)
296 __get_cpu_var(irq_stat).irq_resched_count++;
298 add_pda(irq_resched_count, 1);
302 void smp_call_function_interrupt(struct pt_regs *regs)
304 void (*func) (void *info) = call_data->func;
305 void *info = call_data->info;
306 int wait = call_data->wait;
310 * Notify initiating CPU that I've grabbed the data and am
311 * about to execute the function
314 atomic_inc(&call_data->started);
316 * At this point the info structure may be out of scope unless wait==1
321 __get_cpu_var(irq_stat).irq_call_count++;
323 add_pda(irq_call_count, 1);
329 atomic_inc(&call_data->finished);
333 struct smp_ops smp_ops = {
334 .smp_prepare_boot_cpu = native_smp_prepare_boot_cpu,
335 .smp_prepare_cpus = native_smp_prepare_cpus,
336 .cpu_up = native_cpu_up,
337 .smp_cpus_done = native_smp_cpus_done,
339 .smp_send_stop = native_smp_send_stop,
340 .smp_send_reschedule = native_smp_send_reschedule,
341 .smp_call_function_mask = native_smp_call_function_mask,
343 EXPORT_SYMBOL_GPL(smp_ops);