2 * Intel Multiprocessor Specification 1.1 and 1.4
3 * compliant MP-table parsing routines.
5 * (c) 1995 Alan Cox, Building #3 <alan@redhat.com>
6 * (c) 1998, 1999, 2000 Ingo Molnar <mingo@redhat.com>
9 * Erich Boleyn : MP v1.4 and additional changes.
10 * Alan Cox : Added EBDA scanning
11 * Ingo Molnar : various cleanups and rewrites
12 * Maciej W. Rozycki: Bits for default MP configurations
13 * Paul Diefenbaugh: Added full ACPI support
17 #include <linux/init.h>
18 #include <linux/delay.h>
19 #include <linux/bootmem.h>
20 #include <linux/kernel_stat.h>
21 #include <linux/mc146818rtc.h>
22 #include <linux/acpi.h>
23 #include <linux/module.h>
27 #include <asm/mpspec.h>
28 #include <asm/pgalloc.h>
29 #include <asm/io_apic.h>
30 #include <asm/proto.h>
33 #include <mach_apic.h>
35 /* Have we found an MP table */
37 unsigned int __cpuinitdata maxcpus = NR_CPUS;
40 * Various Linux-internal data structures created from the
43 DECLARE_BITMAP(mp_bus_not_pci, MAX_MP_BUSSES);
44 int mp_bus_id_to_pci_bus [MAX_MP_BUSSES] = { [0 ... MAX_MP_BUSSES-1] = -1 };
46 static int mp_current_pci_id = 0;
47 /* I/O APIC entries */
48 struct mpc_config_ioapic mp_ioapics[MAX_IO_APICS];
50 /* # of MP IRQ source entries */
51 struct mpc_config_intsrc mp_irqs[MAX_IRQ_SOURCES];
53 /* MP IRQ source entries */
57 unsigned long mp_lapic_addr = 0;
61 /* Processor that is doing the boot up */
62 unsigned int boot_cpu_id = -1U;
63 EXPORT_SYMBOL(boot_cpu_id);
65 /* Internal processor count */
66 unsigned int num_processors;
68 unsigned disabled_cpus __cpuinitdata;
70 /* Bitmask of physically existing CPUs */
71 physid_mask_t phys_cpu_present_map = PHYSID_MASK_NONE;
73 u16 x86_bios_cpu_apicid_init[NR_CPUS] __initdata
74 = { [0 ... NR_CPUS-1] = BAD_APICID };
75 void *x86_bios_cpu_apicid_early_ptr;
76 DEFINE_PER_CPU(u16, x86_bios_cpu_apicid) = BAD_APICID;
77 EXPORT_PER_CPU_SYMBOL(x86_bios_cpu_apicid);
81 * Intel MP BIOS table parsing routines:
85 * Checksum an MP configuration block.
88 static int __init mpf_checksum(unsigned char *mp, int len)
98 static void __cpuinit MP_processor_info(struct mpc_config_processor *m)
102 char *bootup_cpu = "";
104 if (!(m->mpc_cpuflag & CPU_ENABLED)) {
108 if (m->mpc_cpuflag & CPU_BOOTPROCESSOR) {
109 bootup_cpu = " (Bootup-CPU)";
110 boot_cpu_id = m->mpc_apicid;
113 printk(KERN_INFO "Processor #%d%s\n", m->mpc_apicid, bootup_cpu);
115 if (num_processors >= NR_CPUS) {
116 printk(KERN_WARNING "WARNING: NR_CPUS limit of %i reached."
117 " Processor ignored.\n", NR_CPUS);
121 if (num_processors >= maxcpus) {
122 printk(KERN_WARNING "WARNING: maxcpus limit of %i reached."
123 " Processor ignored.\n", maxcpus);
128 cpus_complement(tmp_map, cpu_present_map);
129 cpu = first_cpu(tmp_map);
131 physid_set(m->mpc_apicid, phys_cpu_present_map);
132 if (m->mpc_cpuflag & CPU_BOOTPROCESSOR) {
134 * x86_bios_cpu_apicid is required to have processors listed
135 * in same order as logical cpu numbers. Hence the first
136 * entry is BSP, and so on.
140 /* are we being called early in kernel startup? */
141 if (x86_cpu_to_apicid_early_ptr) {
142 u16 *cpu_to_apicid = x86_cpu_to_apicid_early_ptr;
143 u16 *bios_cpu_apicid = x86_bios_cpu_apicid_early_ptr;
145 cpu_to_apicid[cpu] = m->mpc_apicid;
146 bios_cpu_apicid[cpu] = m->mpc_apicid;
148 per_cpu(x86_cpu_to_apicid, cpu) = m->mpc_apicid;
149 per_cpu(x86_bios_cpu_apicid, cpu) = m->mpc_apicid;
152 cpu_set(cpu, cpu_possible_map);
153 cpu_set(cpu, cpu_present_map);
156 static void __init MP_bus_info (struct mpc_config_bus *m)
160 memcpy(str, m->mpc_bustype, 6);
162 Dprintk("Bus #%d is %s\n", m->mpc_busid, str);
164 if (strncmp(str, "ISA", 3) == 0) {
165 set_bit(m->mpc_busid, mp_bus_not_pci);
166 } else if (strncmp(str, "PCI", 3) == 0) {
167 clear_bit(m->mpc_busid, mp_bus_not_pci);
168 mp_bus_id_to_pci_bus[m->mpc_busid] = mp_current_pci_id;
171 printk(KERN_ERR "Unknown bustype %s\n", str);
175 static int bad_ioapic(unsigned long address)
177 if (nr_ioapics >= MAX_IO_APICS) {
178 printk(KERN_ERR "ERROR: Max # of I/O APICs (%d) exceeded "
179 "(found %d)\n", MAX_IO_APICS, nr_ioapics);
180 panic("Recompile kernel with bigger MAX_IO_APICS!\n");
183 printk(KERN_ERR "WARNING: Bogus (zero) I/O APIC address"
184 " found in table, skipping!\n");
190 static void __init MP_ioapic_info (struct mpc_config_ioapic *m)
192 if (!(m->mpc_flags & MPC_APIC_USABLE))
195 printk("I/O APIC #%d at 0x%X.\n",
196 m->mpc_apicid, m->mpc_apicaddr);
198 if (bad_ioapic(m->mpc_apicaddr))
201 mp_ioapics[nr_ioapics] = *m;
205 static void __init MP_intsrc_info (struct mpc_config_intsrc *m)
207 mp_irqs [mp_irq_entries] = *m;
208 Dprintk("Int: type %d, pol %d, trig %d, bus %d,"
209 " IRQ %02x, APIC ID %x, APIC INT %02x\n",
210 m->mpc_irqtype, m->mpc_irqflag & 3,
211 (m->mpc_irqflag >> 2) & 3, m->mpc_srcbus,
212 m->mpc_srcbusirq, m->mpc_dstapic, m->mpc_dstirq);
213 if (++mp_irq_entries >= MAX_IRQ_SOURCES)
214 panic("Max # of irq sources exceeded!!\n");
217 static void __init MP_lintsrc_info (struct mpc_config_lintsrc *m)
219 Dprintk("Lint: type %d, pol %d, trig %d, bus %d,"
220 " IRQ %02x, APIC ID %x, APIC LINT %02x\n",
221 m->mpc_irqtype, m->mpc_irqflag & 3,
222 (m->mpc_irqflag >> 2) &3, m->mpc_srcbusid,
223 m->mpc_srcbusirq, m->mpc_destapic, m->mpc_destapiclint);
229 static int __init smp_read_mpc(struct mp_config_table *mpc, unsigned early)
232 int count=sizeof(*mpc);
233 unsigned char *mpt=((unsigned char *)mpc)+count;
235 if (memcmp(mpc->mpc_signature,MPC_SIGNATURE,4)) {
236 printk("MPTABLE: bad signature [%c%c%c%c]!\n",
237 mpc->mpc_signature[0],
238 mpc->mpc_signature[1],
239 mpc->mpc_signature[2],
240 mpc->mpc_signature[3]);
243 if (mpf_checksum((unsigned char *)mpc,mpc->mpc_length)) {
244 printk("MPTABLE: checksum error!\n");
247 if (mpc->mpc_spec!=0x01 && mpc->mpc_spec!=0x04) {
248 printk(KERN_ERR "MPTABLE: bad table version (%d)!!\n",
252 if (!mpc->mpc_lapic) {
253 printk(KERN_ERR "MPTABLE: null local APIC address!\n");
256 memcpy(str,mpc->mpc_oem,8);
258 printk(KERN_INFO "MPTABLE: OEM ID: %s ",str);
260 memcpy(str,mpc->mpc_productid,12);
262 printk("MPTABLE: Product ID: %s ",str);
264 printk("MPTABLE: APIC at: 0x%X\n",mpc->mpc_lapic);
266 /* save the local APIC address, it might be non-default */
268 mp_lapic_addr = mpc->mpc_lapic;
274 * Now process the configuration blocks.
276 while (count < mpc->mpc_length) {
280 struct mpc_config_processor *m=
281 (struct mpc_config_processor *)mpt;
283 MP_processor_info(m);
290 struct mpc_config_bus *m=
291 (struct mpc_config_bus *)mpt;
299 struct mpc_config_ioapic *m=
300 (struct mpc_config_ioapic *)mpt;
308 struct mpc_config_intsrc *m=
309 (struct mpc_config_intsrc *)mpt;
318 struct mpc_config_lintsrc *m=
319 (struct mpc_config_lintsrc *)mpt;
327 setup_apic_routing();
329 printk(KERN_ERR "MPTABLE: no processors registered!\n");
330 return num_processors;
333 static int __init ELCR_trigger(unsigned int irq)
337 port = 0x4d0 + (irq >> 3);
338 return (inb(port) >> (irq & 7)) & 1;
341 static void __init construct_default_ioirq_mptable(int mpc_default_type)
343 struct mpc_config_intsrc intsrc;
345 int ELCR_fallback = 0;
347 intsrc.mpc_type = MP_INTSRC;
348 intsrc.mpc_irqflag = 0; /* conforming */
349 intsrc.mpc_srcbus = 0;
350 intsrc.mpc_dstapic = mp_ioapics[0].mpc_apicid;
352 intsrc.mpc_irqtype = mp_INT;
355 * If true, we have an ISA/PCI system with no IRQ entries
356 * in the MP table. To prevent the PCI interrupts from being set up
357 * incorrectly, we try to use the ELCR. The sanity check to see if
358 * there is good ELCR data is very simple - IRQ0, 1, 2 and 13 can
359 * never be level sensitive, so we simply see if the ELCR agrees.
360 * If it does, we assume it's valid.
362 if (mpc_default_type == 5) {
363 printk(KERN_INFO "ISA/PCI bus type with no IRQ information... falling back to ELCR\n");
365 if (ELCR_trigger(0) || ELCR_trigger(1) || ELCR_trigger(2) || ELCR_trigger(13))
366 printk(KERN_ERR "ELCR contains invalid data... not using ELCR\n");
368 printk(KERN_INFO "Using ELCR to identify PCI interrupts\n");
373 for (i = 0; i < 16; i++) {
374 switch (mpc_default_type) {
376 if (i == 0 || i == 13)
377 continue; /* IRQ0 & IRQ13 not connected */
381 continue; /* IRQ2 is never connected */
386 * If the ELCR indicates a level-sensitive interrupt, we
387 * copy that information over to the MP table in the
388 * irqflag field (level sensitive, active high polarity).
391 intsrc.mpc_irqflag = 13;
393 intsrc.mpc_irqflag = 0;
396 intsrc.mpc_srcbusirq = i;
397 intsrc.mpc_dstirq = i ? i : 2; /* IRQ0 to INTIN2 */
398 MP_intsrc_info(&intsrc);
401 intsrc.mpc_irqtype = mp_ExtINT;
402 intsrc.mpc_srcbusirq = 0;
403 intsrc.mpc_dstirq = 0; /* 8259A to INTIN0 */
404 MP_intsrc_info(&intsrc);
407 static inline void __init construct_default_ISA_mptable(int mpc_default_type)
409 struct mpc_config_processor processor;
410 struct mpc_config_bus bus;
411 struct mpc_config_ioapic ioapic;
412 struct mpc_config_lintsrc lintsrc;
413 int linttypes[2] = { mp_ExtINT, mp_NMI };
417 * local APIC has default address
419 mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;
422 * 2 CPUs, numbered 0 & 1.
424 processor.mpc_type = MP_PROCESSOR;
425 processor.mpc_apicver = 0;
426 processor.mpc_cpuflag = CPU_ENABLED;
427 processor.mpc_cpufeature = 0;
428 processor.mpc_featureflag = 0;
429 processor.mpc_reserved[0] = 0;
430 processor.mpc_reserved[1] = 0;
431 for (i = 0; i < 2; i++) {
432 processor.mpc_apicid = i;
433 MP_processor_info(&processor);
436 bus.mpc_type = MP_BUS;
438 switch (mpc_default_type) {
440 printk(KERN_ERR "???\nUnknown standard configuration %d\n",
445 memcpy(bus.mpc_bustype, "ISA ", 6);
449 if (mpc_default_type > 4) {
451 memcpy(bus.mpc_bustype, "PCI ", 6);
455 ioapic.mpc_type = MP_IOAPIC;
456 ioapic.mpc_apicid = 2;
457 ioapic.mpc_apicver = 0;
458 ioapic.mpc_flags = MPC_APIC_USABLE;
459 ioapic.mpc_apicaddr = 0xFEC00000;
460 MP_ioapic_info(&ioapic);
463 * We set up most of the low 16 IO-APIC pins according to MPS rules.
465 construct_default_ioirq_mptable(mpc_default_type);
467 lintsrc.mpc_type = MP_LINTSRC;
468 lintsrc.mpc_irqflag = 0; /* conforming */
469 lintsrc.mpc_srcbusid = 0;
470 lintsrc.mpc_srcbusirq = 0;
471 lintsrc.mpc_destapic = MP_APIC_ALL;
472 for (i = 0; i < 2; i++) {
473 lintsrc.mpc_irqtype = linttypes[i];
474 lintsrc.mpc_destapiclint = i;
475 MP_lintsrc_info(&lintsrc);
479 static struct intel_mp_floating *mpf_found;
482 * Scan the memory blocks for an SMP configuration block.
484 static void __init __get_smp_config(unsigned early)
486 struct intel_mp_floating *mpf = mpf_found;
488 if (acpi_lapic && early)
491 * ACPI supports both logical (e.g. Hyper-Threading) and physical
492 * processors, where MPS only supports physical.
494 if (acpi_lapic && acpi_ioapic) {
495 printk(KERN_INFO "Using ACPI (MADT) for SMP configuration "
498 } else if (acpi_lapic)
499 printk(KERN_INFO "Using ACPI for processor (LAPIC) "
500 "configuration information\n");
502 printk(KERN_INFO "Intel MultiProcessor Specification v1.%d\n",
503 mpf->mpf_specification);
506 * Now see if we need to read further.
508 if (mpf->mpf_feature1 != 0) {
511 * local APIC has default address
513 mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;
517 printk(KERN_INFO "Default MP configuration #%d\n", mpf->mpf_feature1);
518 construct_default_ISA_mptable(mpf->mpf_feature1);
520 } else if (mpf->mpf_physptr) {
523 * Read the physical hardware table. Anything here will
524 * override the defaults.
526 if (!smp_read_mpc(phys_to_virt(mpf->mpf_physptr), early)) {
527 smp_found_config = 0;
528 printk(KERN_ERR "BIOS bug, MP table errors detected!...\n");
529 printk(KERN_ERR "... disabling SMP support. (tell your hw vendor)\n");
536 * If there are no explicit MP IRQ entries, then we are
537 * broken. We set up most of the low 16 IO-APIC pins to
538 * ISA defaults and hope it will work.
540 if (!mp_irq_entries) {
541 struct mpc_config_bus bus;
543 printk(KERN_ERR "BIOS bug, no explicit IRQ entries, using default mptable. (tell your hw vendor)\n");
545 bus.mpc_type = MP_BUS;
547 memcpy(bus.mpc_bustype, "ISA ", 6);
550 construct_default_ioirq_mptable(0);
557 printk(KERN_INFO "Processors: %d\n", num_processors);
559 * Only use the first configuration found.
563 void __init early_get_smp_config(void)
568 void __init get_smp_config(void)
573 static int __init smp_scan_config(unsigned long base, unsigned long length,
576 extern void __bad_mpf_size(void);
577 unsigned int *bp = phys_to_virt(base);
578 struct intel_mp_floating *mpf;
580 Dprintk("Scan SMP from %p for %ld bytes.\n", bp,length);
581 if (sizeof(*mpf) != 16)
585 mpf = (struct intel_mp_floating *)bp;
586 if ((*bp == SMP_MAGIC_IDENT) &&
587 (mpf->mpf_length == 1) &&
588 !mpf_checksum((unsigned char *)bp, 16) &&
589 ((mpf->mpf_specification == 1)
590 || (mpf->mpf_specification == 4)) ) {
592 smp_found_config = 1;
598 reserve_bootmem_generic(virt_to_phys(mpf), PAGE_SIZE);
599 if (mpf->mpf_physptr)
600 reserve_bootmem_generic(mpf->mpf_physptr,
610 static void __init __find_smp_config(unsigned reserve)
612 unsigned int address;
615 * FIXME: Linux assumes you have 640K of base ram..
616 * this continues the error...
618 * 1) Scan the bottom 1K for a signature
619 * 2) Scan the top 1K of base RAM
620 * 3) Scan the 64K of bios
622 if (smp_scan_config(0x0, 0x400, reserve) ||
623 smp_scan_config(639*0x400, 0x400, reserve) ||
624 smp_scan_config(0xF0000, 0x10000, reserve))
627 * If it is an SMP machine we should know now.
629 * there is a real-mode segmented pointer pointing to the
630 * 4K EBDA area at 0x40E, calculate and scan it here.
632 * NOTE! There are Linux loaders that will corrupt the EBDA
633 * area, and as such this kind of SMP config may be less
634 * trustworthy, simply because the SMP table may have been
635 * stomped on during early boot. These loaders are buggy and
639 address = *(unsigned short *)phys_to_virt(0x40E);
641 if (smp_scan_config(address, 0x1000, reserve))
644 /* If we have come this far, we did not find an MP table */
645 printk(KERN_INFO "No mptable found.\n");
648 void __init early_find_smp_config(void)
650 __find_smp_config(0);
653 void __init find_smp_config(void)
655 __find_smp_config(1);
658 /* --------------------------------------------------------------------------
659 ACPI-based MP Configuration
660 -------------------------------------------------------------------------- */
664 void __init mp_register_lapic_address(u64 address)
666 mp_lapic_addr = (unsigned long) address;
667 set_fixmap_nocache(FIX_APIC_BASE, mp_lapic_addr);
668 if (boot_cpu_id == -1U)
669 boot_cpu_id = GET_APIC_ID(apic_read(APIC_ID));
672 void __cpuinit mp_register_lapic (u8 id, u8 enabled)
674 struct mpc_config_processor processor;
677 if (id == boot_cpu_id)
680 processor.mpc_type = MP_PROCESSOR;
681 processor.mpc_apicid = id;
682 processor.mpc_apicver = 0;
683 processor.mpc_cpuflag = (enabled ? CPU_ENABLED : 0);
684 processor.mpc_cpuflag |= (boot_cpu ? CPU_BOOTPROCESSOR : 0);
685 processor.mpc_cpufeature = 0;
686 processor.mpc_featureflag = 0;
687 processor.mpc_reserved[0] = 0;
688 processor.mpc_reserved[1] = 0;
690 MP_processor_info(&processor);
694 #define MP_MAX_IOAPIC_PIN 127
696 static struct mp_ioapic_routing {
700 u32 pin_programmed[4];
701 } mp_ioapic_routing[MAX_IO_APICS];
703 static int mp_find_ioapic(int gsi)
707 /* Find the IOAPIC that manages this GSI. */
708 for (i = 0; i < nr_ioapics; i++) {
709 if ((gsi >= mp_ioapic_routing[i].gsi_start)
710 && (gsi <= mp_ioapic_routing[i].gsi_end))
714 printk(KERN_ERR "ERROR: Unable to locate IOAPIC for GSI %d\n", gsi);
718 static u8 uniq_ioapic_id(u8 id)
721 DECLARE_BITMAP(used, 256);
722 bitmap_zero(used, 256);
723 for (i = 0; i < nr_ioapics; i++) {
724 struct mpc_config_ioapic *ia = &mp_ioapics[i];
725 __set_bit(ia->mpc_apicid, used);
727 if (!test_bit(id, used))
729 return find_first_zero_bit(used, 256);
732 void __init mp_register_ioapic(u8 id, u32 address, u32 gsi_base)
736 if (bad_ioapic(address))
741 mp_ioapics[idx].mpc_type = MP_IOAPIC;
742 mp_ioapics[idx].mpc_flags = MPC_APIC_USABLE;
743 mp_ioapics[idx].mpc_apicaddr = address;
745 set_fixmap_nocache(FIX_IO_APIC_BASE_0 + idx, address);
746 mp_ioapics[idx].mpc_apicid = uniq_ioapic_id(id);
747 mp_ioapics[idx].mpc_apicver = 0;
750 * Build basic IRQ lookup table to facilitate gsi->io_apic lookups
751 * and to prevent reprogramming of IOAPIC pins (PCI IRQs).
753 mp_ioapic_routing[idx].apic_id = mp_ioapics[idx].mpc_apicid;
754 mp_ioapic_routing[idx].gsi_start = gsi_base;
755 mp_ioapic_routing[idx].gsi_end = gsi_base +
756 io_apic_get_redir_entries(idx);
758 printk(KERN_INFO "IOAPIC[%d]: apic_id %d, address 0x%x, "
759 "GSI %d-%d\n", idx, mp_ioapics[idx].mpc_apicid,
760 mp_ioapics[idx].mpc_apicaddr,
761 mp_ioapic_routing[idx].gsi_start,
762 mp_ioapic_routing[idx].gsi_end);
768 mp_override_legacy_irq(u8 bus_irq, u8 polarity, u8 trigger, u32 gsi)
770 struct mpc_config_intsrc intsrc;
775 * Convert 'gsi' to 'ioapic.pin'.
777 ioapic = mp_find_ioapic(gsi);
780 pin = gsi - mp_ioapic_routing[ioapic].gsi_start;
783 * TBD: This check is for faulty timer entries, where the override
784 * erroneously sets the trigger to level, resulting in a HUGE
785 * increase of timer interrupts!
787 if ((bus_irq == 0) && (trigger == 3))
790 intsrc.mpc_type = MP_INTSRC;
791 intsrc.mpc_irqtype = mp_INT;
792 intsrc.mpc_irqflag = (trigger << 2) | polarity;
793 intsrc.mpc_srcbus = MP_ISA_BUS;
794 intsrc.mpc_srcbusirq = bus_irq; /* IRQ */
795 intsrc.mpc_dstapic = mp_ioapics[ioapic].mpc_apicid; /* APIC ID */
796 intsrc.mpc_dstirq = pin; /* INTIN# */
798 Dprintk("Int: type %d, pol %d, trig %d, bus %d, irq %d, %d-%d\n",
799 intsrc.mpc_irqtype, intsrc.mpc_irqflag & 3,
800 (intsrc.mpc_irqflag >> 2) & 3, intsrc.mpc_srcbus,
801 intsrc.mpc_srcbusirq, intsrc.mpc_dstapic, intsrc.mpc_dstirq);
803 mp_irqs[mp_irq_entries] = intsrc;
804 if (++mp_irq_entries == MAX_IRQ_SOURCES)
805 panic("Max # of irq sources exceeded!\n");
808 void __init mp_config_acpi_legacy_irqs(void)
810 struct mpc_config_intsrc intsrc;
815 * Fabricate the legacy ISA bus (bus #31).
817 set_bit(MP_ISA_BUS, mp_bus_not_pci);
820 * Locate the IOAPIC that manages the ISA IRQs (0-15).
822 ioapic = mp_find_ioapic(0);
826 intsrc.mpc_type = MP_INTSRC;
827 intsrc.mpc_irqflag = 0; /* Conforming */
828 intsrc.mpc_srcbus = MP_ISA_BUS;
829 intsrc.mpc_dstapic = mp_ioapics[ioapic].mpc_apicid;
832 * Use the default configuration for the IRQs 0-15. Unless
833 * overridden by (MADT) interrupt source override entries.
835 for (i = 0; i < 16; i++) {
838 for (idx = 0; idx < mp_irq_entries; idx++) {
839 struct mpc_config_intsrc *irq = mp_irqs + idx;
841 /* Do we already have a mapping for this ISA IRQ? */
842 if (irq->mpc_srcbus == MP_ISA_BUS && irq->mpc_srcbusirq == i)
845 /* Do we already have a mapping for this IOAPIC pin */
846 if ((irq->mpc_dstapic == intsrc.mpc_dstapic) &&
847 (irq->mpc_dstirq == i))
851 if (idx != mp_irq_entries) {
852 printk(KERN_DEBUG "ACPI: IRQ%d used by override.\n", i);
853 continue; /* IRQ already used */
856 intsrc.mpc_irqtype = mp_INT;
857 intsrc.mpc_srcbusirq = i; /* Identity mapped */
858 intsrc.mpc_dstirq = i;
860 Dprintk("Int: type %d, pol %d, trig %d, bus %d, irq %d, "
861 "%d-%d\n", intsrc.mpc_irqtype, intsrc.mpc_irqflag & 3,
862 (intsrc.mpc_irqflag >> 2) & 3, intsrc.mpc_srcbus,
863 intsrc.mpc_srcbusirq, intsrc.mpc_dstapic,
866 mp_irqs[mp_irq_entries] = intsrc;
867 if (++mp_irq_entries == MAX_IRQ_SOURCES)
868 panic("Max # of irq sources exceeded!\n");
872 int mp_register_gsi(u32 gsi, int triggering, int polarity)
878 if (acpi_irq_model != ACPI_IRQ_MODEL_IOAPIC)
881 /* Don't set up the ACPI SCI because it's already set up */
882 if (acpi_gbl_FADT.sci_interrupt == gsi)
885 ioapic = mp_find_ioapic(gsi);
887 printk(KERN_WARNING "No IOAPIC for GSI %u\n", gsi);
891 ioapic_pin = gsi - mp_ioapic_routing[ioapic].gsi_start;
894 * Avoid pin reprogramming. PRTs typically include entries
895 * with redundant pin->gsi mappings (but unique PCI devices);
896 * we only program the IOAPIC on the first.
898 bit = ioapic_pin % 32;
899 idx = (ioapic_pin < 32) ? 0 : (ioapic_pin / 32);
901 printk(KERN_ERR "Invalid reference to IOAPIC pin "
902 "%d-%d\n", mp_ioapic_routing[ioapic].apic_id,
906 if ((1<<bit) & mp_ioapic_routing[ioapic].pin_programmed[idx]) {
907 Dprintk(KERN_DEBUG "Pin %d-%d already programmed\n",
908 mp_ioapic_routing[ioapic].apic_id, ioapic_pin);
912 mp_ioapic_routing[ioapic].pin_programmed[idx] |= (1<<bit);
914 io_apic_set_pci_routing(ioapic, ioapic_pin, gsi,
915 triggering == ACPI_EDGE_SENSITIVE ? 0 : 1,
916 polarity == ACPI_ACTIVE_HIGH ? 0 : 1);
919 #endif /*CONFIG_ACPI*/